mirror of
https://github.com/DrHo1y/orangepi-build.git
synced 2026-11-04 14:46:50 +07:00
Add linuxpg
This commit is contained in:
47
external/cache/sources/linuxpg/8103ELEF.cfg
vendored
Normal file
47
external/cache/sources/linuxpg/8103ELEF.cfg
vendored
Normal file
@@ -0,0 +1,47 @@
|
||||
NODEID = 00 E0 4C 36 00 01
|
||||
;ENDID = 00 E0 4C 36 FF FF
|
||||
;VID = 10 EC
|
||||
;DID = 81 36
|
||||
SVID = 10 EC
|
||||
SMID = 01 23
|
||||
|
||||
;Do not change following parameters without Realtek approval
|
||||
CONFIG0 = 00
|
||||
CONFIG1 = 0F
|
||||
;CONFIGx = 3C
|
||||
CONFIG3 = 62
|
||||
CONFIG4 = 14
|
||||
CONFIG5 = 82
|
||||
PMC = C3 FF
|
||||
ROMBAR = 00
|
||||
;LEDCFG = High-Byte(19H) Low-Byte(18H)
|
||||
LEDCFG = 00 00
|
||||
;Prefetchable memory access. Non-Prefetchable set to 04H, Prefetchable set to 0CH
|
||||
PREFETCHABLE = 04
|
||||
ROMCONF = 3F
|
||||
;Bit 7-6 Boot Protocol
|
||||
; 00 ==> PXE protocol
|
||||
; 01 ==> RPL protocol
|
||||
;Bit 5-4 Boot order (method)
|
||||
; 00 ==> ROM disable
|
||||
; 01 ==> Int 18h
|
||||
; 10 ==> Int 19h
|
||||
; 11 ==> PnP/BEV(BBS)
|
||||
;Bit 3 Show Config Message
|
||||
; 0 ==> Enable
|
||||
; 1 ==> Disable
|
||||
;Bit 2 Shift+F10 Menu Entry
|
||||
; 0 ==> Enable
|
||||
; 1 ==> Disable
|
||||
;Bit 1-0 Show Config Time
|
||||
; 00 ==> 3 Seconds
|
||||
; 01 ==> 5 Seconds
|
||||
; 10 ==> 1 Seconds
|
||||
; 11 ==> 0 Second
|
||||
|
||||
;EPHY = Address HIGH_BYTE LOW_BYTE ...
|
||||
;EPHY = 03 00 FB
|
||||
|
||||
;Serial Number in PCI Config Space
|
||||
SN = 00 E0 4C 36 00 00 00 01
|
||||
VERSION = 1.031
|
||||
Reference in New Issue
Block a user