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Add wl source code
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leeboby
139
external/cache/sources/wl/include/bcmspibrcm.h
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139
external/cache/sources/wl/include/bcmspibrcm.h
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/*
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* SD-SPI Protocol Conversion - BCMSDH->gSPI Translation Layer
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*
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* Copyright (C) 2013, Broadcom Corporation
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* All Rights Reserved.
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*
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* This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation;
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* the contents of this file may not be disclosed to third parties, copied
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* or duplicated in any form, in whole or in part, without the prior
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* written permission of Broadcom Corporation.
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*
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* $Id: bcmspibrcm.h 241182 2011-02-17 21:50:03Z $
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*/
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#ifndef _BCM_SPI_BRCM_H
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#define _BCM_SPI_BRCM_H
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/* global msglevel for debug messages - bitvals come from sdiovar.h */
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#define sd_err(x)
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#define sd_trace(x)
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#define sd_info(x)
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#define sd_debug(x)
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#define sd_data(x)
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#define sd_ctrl(x)
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#define sd_log(x)
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#define SDIOH_ASSERT(exp) \
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do { if (!(exp)) \
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printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \
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} while (0)
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#define BLOCK_SIZE_F1 64
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#define BLOCK_SIZE_F2 2048
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#define BLOCK_SIZE_F3 2048
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/* internal return code */
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#define SUCCESS 0
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#undef ERROR
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#define ERROR 1
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#define ERROR_UF 2
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#define ERROR_OF 3
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/* private bus modes */
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#define SDIOH_MODE_SPI 0
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#define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */
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#define USE_MULTIBLOCK 0x4
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struct sdioh_info {
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uint cfg_bar; /* pci cfg address for bar */
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uint32 caps; /* cached value of capabilities reg */
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void *bar0; /* BAR0 for PCI Device */
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osl_t *osh; /* osh handler */
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void *controller; /* Pointer to SPI Controller's private data struct */
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uint lockcount; /* nest count of spi_lock() calls */
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bool client_intr_enabled; /* interrupt connnected flag */
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bool intr_handler_valid; /* client driver interrupt handler valid */
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sdioh_cb_fn_t intr_handler; /* registered interrupt handler */
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void *intr_handler_arg; /* argument to call interrupt handler */
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bool initialized; /* card initialized */
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uint32 target_dev; /* Target device ID */
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uint32 intmask; /* Current active interrupts */
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void *sdos_info; /* Pointer to per-OS private data */
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uint32 controller_type; /* Host controller type */
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uint8 version; /* Host Controller Spec Compliance Version */
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uint irq; /* Client irq */
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uint32 intrcount; /* Client interrupts */
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uint32 local_intrcount; /* Controller interrupts */
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bool host_init_done; /* Controller initted */
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bool card_init_done; /* Client SDIO interface initted */
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bool polled_mode; /* polling for command completion */
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bool sd_use_dma; /* DMA on CMD53 */
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bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */
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/* Must be on for sd_multiblock to be effective */
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bool use_client_ints; /* If this is false, make sure to restore */
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/* polling hack in wl_linux.c:wl_timer() */
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int adapter_slot; /* Maybe dealing with multiple slots/controllers */
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int sd_mode; /* SD1/SD4/SPI */
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int client_block_size[SPI_MAX_IOFUNCS]; /* Blocksize */
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uint32 data_xfer_count; /* Current transfer */
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uint16 card_rca; /* Current Address */
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uint8 num_funcs; /* Supported funcs on client */
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uint32 card_dstatus; /* 32bit device status */
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uint32 com_cis_ptr;
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uint32 func_cis_ptr[SPI_MAX_IOFUNCS];
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void *dma_buf;
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ulong dma_phys;
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int r_cnt; /* rx count */
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int t_cnt; /* tx_count */
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uint32 wordlen; /* host processor 16/32bits */
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uint32 prev_fun;
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uint32 chip;
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uint32 chiprev;
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bool resp_delay_all;
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bool dwordmode;
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bool resp_delay_new;
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struct spierrstats_t spierrstats;
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};
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/************************************************************
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* Internal interfaces: per-port references into bcmspibrcm.c
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*/
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/* Global message bits */
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extern uint sd_msglevel;
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/**************************************************************
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* Internal interfaces: bcmspibrcm.c references to per-port code
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*/
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/* Interrupt (de)registration routines */
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extern int spi_register_irq(sdioh_info_t *sd, uint irq);
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extern void spi_free_irq(uint irq, sdioh_info_t *sd);
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/* OS-specific interrupt wrappers (atomic interrupt enable/disable) */
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extern void spi_lock(sdioh_info_t *sd);
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extern void spi_unlock(sdioh_info_t *sd);
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/* Allocate/init/free per-OS private data */
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extern int spi_osinit(sdioh_info_t *sd);
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extern void spi_osfree(sdioh_info_t *sd);
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#define SPI_RW_FLAG_M BITFIELD_MASK(1) /* Bit [31] - R/W Command Bit */
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#define SPI_RW_FLAG_S 31
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#define SPI_ACCESS_M BITFIELD_MASK(1) /* Bit [30] - Fixed/Incr Access */
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#define SPI_ACCESS_S 30
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#define SPI_FUNCTION_M BITFIELD_MASK(2) /* Bit [29:28] - Function Number */
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#define SPI_FUNCTION_S 28
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#define SPI_REG_ADDR_M BITFIELD_MASK(17) /* Bit [27:11] - Address */
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#define SPI_REG_ADDR_S 11
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#define SPI_LEN_M BITFIELD_MASK(11) /* Bit [10:0] - Packet length */
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#define SPI_LEN_S 0
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#endif /* _BCM_SPI_BRCM_H */
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