diff --git a/external/cache/sources/wl/Android.mk b/external/cache/sources/wl/Android.mk new file mode 100644 index 0000000..5053e7d --- /dev/null +++ b/external/cache/sources/wl/Android.mk @@ -0,0 +1 @@ +include $(call all-subdir-makefiles) diff --git a/external/cache/sources/wl/Makefile b/external/cache/sources/wl/Makefile new file mode 100644 index 0000000..cfba342 --- /dev/null +++ b/external/cache/sources/wl/Makefile @@ -0,0 +1,15 @@ + +all: wl_tool dhd_tool + +wl_tool: + $(MAKE) -C shared CROSS_COMPILE=$(CROSS_COMPILE) + $(MAKE) -C wl CROSS_COMPILE=$(CROSS_COMPILE) + +dhd_tool: + $(MAKE) -C shared CROSS_COMPILE=$(CROSS_COMPILE) + $(MAKE) -C dhd CROSS_COMPILE=$(CROSS_COMPILE) + +clean: + $(MAKE) clean -C shared CROSS_COMPILE=$(CROSS_COMPILE) + $(MAKE) clean -C wl CROSS_COMPILE=$(CROSS_COMPILE) + $(MAKE) clean -C dhd CROSS_COMPILE=$(CROSS_COMPILE) diff --git a/external/cache/sources/wl/dhd/Android.mk b/external/cache/sources/wl/dhd/Android.mk new file mode 100644 index 0000000..660303b --- /dev/null +++ b/external/cache/sources/wl/dhd/Android.mk @@ -0,0 +1,30 @@ +LOCAL_PATH:= $(call my-dir) + +#OBJS_c := dhdu.c dhdu_linux.c bcmutils.c miniopt.c +OBJS_c := dhdu.c dhdu_linux.c ucode_download.c +#OBJS_c += ../shared/bcmutils.c ../shared/miniopt.c ../shared/wlu_pipe.c ../shared/wlu_pipe_linux.c ../shared/wlu_client_shared.c +INCLUDES := $(LOCAL_PATH)/../include $(LOCAL_PATH)/../shared +L_CFLAGS := -DBCMWPA2 -DWLCNT -DWLBTAMP -Wextra -DWLPFN -DWLPFN_AUTO_CONNECT -DLINUX -DRWLASD -DRWL_SOCKET -DRWL_DONGLE -DRWL_WIFI +L_CFLAGS += -DSDTEST -DTARGETENV_android -Dlinux -DLINUX + +include $(CLEAR_VARS) +LOCAL_MODULE := dhd +LOCAL_MODULE_TAGS := debug tests +LOCAL_SHARED_LIBRARIES := libcutils +LOCAL_STATIC_LIBRARIES := libshared +LOCAL_CFLAGS = $(L_CFLAGS) +LOCAL_SRC_FILES := $(OBJS_c) +LOCAL_C_INCLUDES := $(INCLUDES) +LOCAL_MODULE_PATH := $(TARGET_OUT_OPTIONAL_EXECUTABLES) +include $(BUILD_EXECUTABLE) + +include $(CLEAR_VARS) +LOCAL_MODULE := libdhd +LOCAL_MODULE_TAGS := debug tests +LOCAL_SHARED_LIBRARIES := libcutils +LOCAL_STATIC_LIBRARIES := libshared +LOCAL_CFLAGS = $(L_CFLAGS) +LOCAL_CFLAGS += -DLIB +LOCAL_SRC_FILES := $(OBJS_c) +LOCAL_C_INCLUDES := $(INCLUDES) +include $(BUILD_STATIC_LIBRARY) diff --git a/external/cache/sources/wl/dhd/Makefile b/external/cache/sources/wl/dhd/Makefile new file mode 100644 index 0000000..6fded53 --- /dev/null +++ b/external/cache/sources/wl/dhd/Makefile @@ -0,0 +1,41 @@ +CC = $(CROSS_COMPILE)gcc + +#IFLAGS := -I../include -I../wl -I../shared -g -Wall -static +IFLAGS := -I../include -I../wl -I../shared -g -Wall +DFLAGS := -DBCMWPA2 -DWLCNT -DWLBTAMP -Wextra -DWLPFN -DWLPFN_AUTO_CONNECT -DLINUX -DRWLASD -DRWL_SOCKET -DRWL_DONGLE -DRWL_WIFI +#IFLAGS += -DIL_BIGENDIAN + +obj-dhd = dhdu.o dhdu_linux.o ucode_download.o + +DHD = dhd +ALL = all +LIBLINK := ../shared/libshared.a +LIBDHD = libdhd.a + +CFLAGS += $(IFLAGS) $(DFLAGS) +ifeq ($(LIB),y) +CFLAGS += -DLIB +endif + +all: $(ALL) + +$(ALL): + make clean + make $(DHD) + mv dhd dhd.back + make clean + make $(LIBDHD) LIB=y + mv dhd.back dhd + +$(DHD): $(obj-dhd) + $(CC) -o $@ $(obj-dhd) $(LIBLINK) + +$(LIBDHD): $(obj-dhd) + ar rscv $(LIBDHD) $(obj-dhd) $(LIBLINK) +# $(CC) $(obj-dhd) -shared -o $(LIBDHD) $(LIBLINK) + +# for sequance +# $(CC) -Wl,-elf2flt -o $@ $(obj-dhd) + +clean: + -rm -f $(DHD) *.o *.a *.so diff --git a/external/cache/sources/wl/dhd/dhdu.c b/external/cache/sources/wl/dhd/dhdu.c new file mode 100644 index 0000000..a13d3fc --- /dev/null +++ b/external/cache/sources/wl/dhd/dhdu.c @@ -0,0 +1,3103 @@ +/* + * Common code for dhd utility, hacked from wl utility + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: dhdu.c 381853 2013-01-30 03:36:11Z $ + */ + +/* For backwards compatibility, the absence of the define 'BWL_NO_FILESYSTEM_SUPPORT' + * implies that a filesystem is supported. + */ +#if !defined(BWL_NO_FILESYSTEM_SUPPORT) +#define BWL_FILESYSTEM_SUPPORT +#endif + +#ifndef PROP_TXSTATUS +#define PROP_TXSTATUS +#endif + +#include +#include +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include +#include "dhdu.h" +#include "miniopt.h" +#include +#include +#include +#include +#define IPV4_ADDR_LEN 4 +#ifdef WLBTAMP +#include +#endif + +#define DUMP_INFO_PTR_PTR 0x180878 + +#include + +#include +#include "ucode_download.h" + +#define stricmp strcasecmp +#define strnicmp strncasecmp + + +static cmd_func_t dhd_var_void; +static cmd_func_t dhd_varint, dhd_varstr; +static cmd_func_t dhd_var_getandprintstr, dhd_var_getint, dhd_var_get, dhd_var_ampak_otpmac; +static cmd_func_t dhd_var_setint; + +static cmd_func_t dhd_version, dhd_list, dhd_msglevel; + +#ifdef SDTEST +static cmd_func_t dhd_pktgen; +#endif +static cmd_func_t dhd_sprom; +static cmd_func_t dhd_sdreg; +static cmd_func_t dhd_sd_msglevel, dhd_sd_blocksize, dhd_sd_mode, dhd_sd_reg; +static cmd_func_t dhd_dma_mode; +static cmd_func_t dhd_membytes, dhd_download, dhd_dldn, + dhd_upload, dhd_coredump, dhd_vars, dhd_idleclock, dhd_idletime; +static cmd_func_t dhd_logstamp; +#ifdef BCMSPI +static cmd_func_t dhd_spierrstats; +#endif /* BCMSPI */ + +#ifdef PROP_TXSTATUS +static cmd_func_t dhd_proptxstatusenable; +static cmd_func_t dhd_proptxstatusmode; +#endif +static int dhd_var_getbuf(void *dhd, char *iovar, void *param, int param_len, void **bufptr); +static int dhd_var_setbuf(void *dhd, char *iovar, void *param, int param_len); + +static uint dhd_iovar_mkbuf(char *name, char *data, uint datalen, + char *buf, uint buflen, int *perr); +static int dhd_iovar_getint(void *dhd, char *name, int *var); +static int dhd_iovar_setint(void *dhd, char *name, int var); + +#if defined(BWL_FILESYSTEM_SUPPORT) +static int file_size(char *fname); +static int read_vars(char *fname, char *buf, int buf_maxlen); +#endif + +#ifdef WLBTAMP +static cmd_func_t wl_HCI_cmd; +static cmd_func_t wl_HCI_ACL_data; +#endif + +/* dword align allocation */ +static union { + char bufdata[DHD_IOCTL_MAXLEN]; + uint32 alignme; +} bufstruct_dhd; +static char *buf = (char*) &bufstruct_dhd.bufdata; + +/* integer output format, default to signed integer */ +static uint8 int_fmt; + +typedef struct { + uint value; + char *string; +} dbg_msg_t; + +static int dhd_do_msglevel(void *dhd, cmd_t *cmd, char **argv, dbg_msg_t *dbg_msg); + +/* Actual command table */ +cmd_t dhd_cmds[] = { + { "cmds", dhd_list, -1, -1, + "generate a short list of available commands"}, + { "version", dhd_version, DHD_GET_VAR, -1, + "get version information" }, + { "hang", dhd_msglevel, DHD_GET_VAR, DHD_SET_VAR, + "set hang event" }, + { "wlmsglevel", dhd_msglevel, DHD_GET_VAR, DHD_SET_VAR, + "get/set message bits" }, + { "msglevel", dhd_msglevel, DHD_GET_VAR, DHD_SET_VAR, + "get/set message bits" }, + { "bcmerrorstr", dhd_var_getandprintstr, DHD_GET_VAR, -1, + "errorstring"}, + { "wdtick", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "watchdog tick time (ms units)"}, + { "intr", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "use interrupts on the bus"}, + { "pollrate", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "number of ticks between bus polls (0 means no polling)"}, + { "idletime", dhd_idletime, DHD_GET_VAR, DHD_SET_VAR, + "number of ticks for activity timeout (-1: immediate, 0: never)"}, + { "idleclock", dhd_idleclock, DHD_GET_VAR, DHD_SET_VAR, + "idleclock active | stopped | \n" + "\tactive (0) - do not request any change to the SD clock\n" + "\tstopped (-1) - request SD clock be stopped on activity timeout\n" + "\t (other) - an sd_divisor value to request on activity timeout\n"}, + { "sd1idle", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "change mode to SD1 when turning off clock at idle"}, + { "forceeven", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "force SD tx/rx buffers to be even"}, + { "readahead", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "enable readahead feature (look for next frame len in headers)"}, + { "sdrxchain", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "enable packet chains to SDIO stack for glom receive"}, + { "alignctl", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "align control frames"}, + { "sdalign", dhd_varint, DHD_GET_VAR, -1, + "display the (compiled in) alignment target for sd requests"}, + { "txbound", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "get/set maximum number of tx frames per scheduling"}, + { "rxbound", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "get/set maximum number of rx frames per scheduling"}, + { "txminmax", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "get/set maximum number of tx frames per scheduling while rx frames outstanding"}, + { "dconpoll", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "g/set dongle console polling interval (ms)"}, + { "dump", dhd_varstr, DHD_GET_VAR, -1, + "dump information"}, + { "cons", dhd_varstr, -1, DHD_SET_VAR, + "send string to device console (sd only)"}, + { "clearcounts", dhd_var_void, -1, DHD_SET_VAR, + "reset the bus stats shown in the dhd dump"}, + { "logdump", dhd_varstr, DHD_GET_VAR, -1, + "dump the timestamp logging buffer"}, + { "logcal", dhd_varint, -1, DHD_SET_VAR, + "logcal -- log around an osl_delay of usecs"}, + { "logstamp", dhd_logstamp, -1, DHD_SET_VAR, + "logstamp [] [] -- add a message to the log"}, + { "memsize", dhd_varint, DHD_GET_VAR, -1, + "display size of onchip SOCRAM"}, + { "membytes", dhd_membytes, DHD_GET_VAR, DHD_SET_VAR, + "membytes [-h | -r | -i]
[]\n" + "\tread or write data in the dongle ram\n" + "\t-h is a sequence of hex digits, else a char string\n" + "\t-r output as a raw write rather than hexdump display\n"}, + { "download", dhd_download, -1, DHD_SET_VAR, + "download [-a
] [--noreset] [--norun] [--verify] []\n" + "\tdownload file to specified dongle ram address and start CPU\n" + "\toptional vars file will replace vars parsed from the CIS\n" + "\t--noreset do not reset SOCRAM core before download\n" + "\t--norun do not start dongle CPU after download\n" + "\t--verify do readback verify \n" + "\tdefault
is 0\n"}, + { "dldn", dhd_dldn, -1, DHD_SET_VAR, + "download \n" + "\tdownload file to specified dongle ram address 0\n"}, + { "vars", dhd_vars, DHD_GET_VAR, DHD_SET_VAR, + "vars []\n" + "\toverride SPROM vars with (before download)\n"}, + { "coredump", dhd_coredump, -1, -1, + "coredump \n" + "\tdump dongle RAM content into a file in dumpfile format\n" + "\tfor use with ELF core generator"}, + { "upload", dhd_upload, -1, -1, + "upload [-a
] []\n" + "\tupload dongle RAM content into a file\n" + "\tdefault
is 0, default is RAM size"}, + { "srdump", dhd_sprom, DHD_GET_VAR, -1, + "display SPROM content" }, + { "srwrite", dhd_sprom, -1, DHD_SET_VAR, + "write data or file content to SPROM\n" + "\tsrwrite ...\n" + "\tsrwrite [-c] \n" + "\t -c means write regardless of crc"}, + { "sleep", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "enter/exit simulated host sleep (bus powerdown w/OOB wakeup)"}, + { "kso", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "keep sdio on"}, + { "devcap", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "brcm device capabilities"}, + { "devsleep", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "Sleep CMD14"}, +#ifdef SDTEST + { "extloop", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "external loopback: convert all tx data to echo test frames"}, + { "pktgen", dhd_pktgen, DHD_GET_VAR, DHD_SET_VAR, + "configure/report pktgen status (SDIO)\n" + "\t-f N frequency: send/recv a burst every N ticks\n" + "\t-c N count: send/recv N packets each burst\n" + "\t-t N total: stop after a total of N packets\n" + "\t-p N print: display counts on console every N bursts\n" + "\t-m N min: set minimum length of packet data\n" + "\t-M N Max: set maximum length of packet data\n" + "\t-l N len: set fixed length of packet data\n" + "\t-s N stop after N tx failures\n" + "\t-d dir test direction/type:\n" + "\t send -- send packets discarded by dongle\n" + "\t echo -- send packets to be echoed by dongle\n" + "\t burst -- request bursts (of size <-c>) from dongle\n" + "\t one every <-f> ticks, until <-t> total requests\n" + "\t recv -- request dongle enter continuous send mode,\n" + "\t read up to <-c> pkts every <-f> ticks until <-t>\n" + "\t total reads\n"}, +#endif /* SDTEST */ + { "dngl_isolation", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "g/set dongle isolation, so the dev could be disabled with out effecting the dongle state"}, + { "sdreg", dhd_sdreg, DHD_GET_VAR, DHD_SET_VAR, + "g/set sdpcmdev core register (f1) across SDIO (CMD53)"}, + { "sbreg", dhd_sdreg, DHD_GET_VAR, DHD_SET_VAR, + "g/set any backplane core register (f1) across SDIO (CMD53)"}, + { "magic", dhd_var_ampak_otpmac, DHD_GET_VAR, -1, + "magic"}, + { "sd_cis", dhd_var_getandprintstr, DHD_GET_VAR, -1, + "dump sdio CIS"}, + { "sd_devreg", dhd_sd_reg, DHD_GET_VAR, DHD_SET_VAR, + "g/set device register across SDIO bus (CMD52)"}, + { "sd_hostreg", dhd_sd_reg, DHD_GET_VAR, DHD_SET_VAR, + "g/set local controller register"}, + { "sd_blocksize", dhd_sd_blocksize, DHD_GET_VAR, DHD_SET_VAR, + "g/set block size for a function"}, + { "sd_blockmode", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "g/set blockmode"}, + { "sd_ints", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "g/set client ints"}, + { "sd_dma", dhd_dma_mode, DHD_GET_VAR, DHD_SET_VAR, + "g/set dma usage: [PIO | SDMA | ADMA1 | ADMA2]"}, + { "sd_yieldcpu", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "allow blocking (yield of CPU) on data xfer"}, + { "sd_minyield", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "minimum xfer size to allow CPU yield"}, + { "sd_forcerb", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "force readback when changing local interrupt settings"}, + { "sd_numints", dhd_varint, DHD_GET_VAR, -1, + "number of device interrupts"}, + { "sd_numlocalints", dhd_varint, DHD_GET_VAR, -1, + "number of non-device interrupts"}, + { "sd_divisor", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "set the divisor for SDIO clock generation"}, + { "sd_power", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "set the SD Card slot power"}, + { "sd_clock", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "turn on/off the SD Clock"}, + { "sd_crc", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "turn on/off CRC checking in SPI mode"}, + { "sd_mode", dhd_sd_mode, DHD_GET_VAR, DHD_SET_VAR, + "g/set SDIO bus mode (spi, sd1, sd4)"}, + { "sd_highspeed", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "set the high-speed clocking mode"}, + { "sd_msglevel", dhd_sd_msglevel, DHD_GET_VAR, DHD_SET_VAR, + "g/set debug message level"}, + { "sd_hciregs", dhd_varstr, DHD_GET_VAR, -1, + "display host-controller interrupt registers"}, + { "sdiod_drive", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "SDIO Device drive strength in milliamps. (0=tri-state, 1-12mA)"}, +#ifdef BCMSPI + { "spi_errstats", dhd_spierrstats, DHD_GET_VAR, DHD_SET_VAR, + "SPI device status error statistics."}, + { "spi_respdelay", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "g/set response delay flag."}, +#endif /* BCMSPI */ + { "devreset", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "Move device into or out of reset state (1/reset, or 0/operational)"}, + { "ioctl_timeout", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "IOCTL response timeout (milliseconds)."}, +#ifdef WLBTAMP + { "HCI_cmd", wl_HCI_cmd, -1, DHD_SET_VAR, + "carries HCI commands to the driver\n" + "\tusage: dhd HCI_cmd \n" }, + { "HCI_ACL_data", wl_HCI_ACL_data, -1, DHD_SET_VAR, + "carries HCI ACL data packet to the driver\n" + "\tusage: dhd HCI_ACL_data \n" }, +#endif +#ifdef PROP_TXSTATUS + { "proptx", dhd_proptxstatusenable, DHD_GET_VAR, DHD_SET_VAR, + "enable/disable the proptxtstatus feature\n" + "0 - disabled\n" + "1 - enabled\n"}, + { "ptxmode", dhd_proptxstatusmode, DHD_GET_VAR, DHD_SET_VAR, + "set the proptxtstatus operation mode:\n" + "0 - Unsupported\n" + "1 - Use implied credit from a packet status\n" + "2 - Use explicit credit\n" }, +#endif + { "sd_uhsimode", dhd_varint, DHD_GET_VAR, DHD_SET_VAR, + "g/set UHSI Mode"}, + { NULL, NULL, 0, 0, NULL } +}; + +cmd_t dhd_varcmd = {"var", dhd_varint, -1, -1, "unrecognized name, type -h for help"}; +char *dhdu_av0; + +#if defined(BWL_FILESYSTEM_SUPPORT) +static int +file_size(char *fname) +{ + FILE *fp; + long size = -1; + + /* Can't use stat() because of Win CE */ + + if ((fp = fopen(fname, "rb")) == NULL || + fseek(fp, 0, SEEK_END) < 0 || + (size = ftell(fp)) < 0) + fprintf(stderr, "Could not determine size of %s: %s\n", + fname, strerror(errno)); + + if (fp != NULL) + fclose(fp); + + return (int)size; +} +#endif /* BWL_FILESYSTEM_SUPPORT */ + + +/* parse/validate the command line arguments */ +/* +* pargv is updated upon return if the first argument is an option. + * It remains intact otherwise. + */ +int +dhd_option(char ***pargv, char **pifname, int *phelp) +{ + char *ifname = NULL; + int help = FALSE; + int status = CMD_OPT; + char **argv = *pargv; + + int_fmt = INT_FMT_DEC; + + while (*argv) { + /* select different adapter */ + if (!strcmp(*argv, "-a") || !strcmp(*argv, "-i")) { + char *opt = *argv++; + ifname = *argv; + if (!ifname) { + fprintf(stderr, + "error: expected interface name after option %s\n", opt); + status = CMD_ERR; + break; + } + } + + /* integer output format */ + else if (!strcmp(*argv, "-d")) + int_fmt = INT_FMT_DEC; + else if (!strcmp(*argv, "-u")) + int_fmt = INT_FMT_UINT; + else if (!strcmp(*argv, "-x")) + int_fmt = INT_FMT_HEX; + + /* command usage */ + else if (!strcmp(*argv, "-h")) + help = TRUE; + + /* done with generic options */ + else { + status = CMD_DHD; + break; + } + + /* consume the argument */ + argv ++; + break; + } + + *phelp = help; + *pifname = ifname; + *pargv = argv; + + return status; +} + +void +dhd_cmd_usage(cmd_t *cmd) +{ + if (strlen(cmd->name) >= 8) + fprintf(stderr, "%s\n\t%s\n\n", cmd->name, cmd->help); + else + fprintf(stderr, "%s\t%s\n\n", cmd->name, cmd->help); +} + +/* Dump out short list of commands */ +static int +dhd_list(void *dhd, cmd_t *garb, char **argv) +{ + cmd_t *cmd; + int nrows, i, len; + char *buf; + int letter, col, row, pad; + + UNUSED_PARAMETER(dhd); + UNUSED_PARAMETER(garb); + UNUSED_PARAMETER(argv); + + for (cmd = dhd_cmds, nrows = 0; cmd->name; cmd++) + nrows++; + + nrows /= 4; + nrows++; + + len = nrows * 80 + 2; + buf = malloc(len); + if (buf == NULL) { + fprintf(stderr, "Failed to allocate buffer of %d bytes\n", len); + return COMMAND_ERROR; + } + for (i = 0; i < len; i++) + *(buf+i) = 0; + + row = col = 0; + for (letter = 'a'; letter < 'z'; letter++) { + for (cmd = dhd_cmds; cmd->name; cmd++) { + if (cmd->name[0] == letter || cmd->name[0] == letter - 0x20) { + strcat(buf+row*80, cmd->name); + pad = 18 * (col + 1) - strlen(buf+row*80); + if (pad < 1) + pad = 1; + for (; pad; pad--) + strcat(buf+row*80, " "); + row++; + if (row == nrows) { + col++; row = 0; + } + } + } + } + for (row = 0; row < nrows; row++) + printf("%s\n", buf+row*80); + + printf("\n"); + free(buf); + return (0); +} + +void +dhd_cmds_usage(cmd_t *port_cmds) +{ + cmd_t *port_cmd; + cmd_t *cmd; + + /* print usage of port commands */ + for (port_cmd = port_cmds; port_cmd && port_cmd->name; port_cmd++) + /* Check for wc_cmd */ + dhd_cmd_usage(port_cmd); + + /* print usage of common commands without port counterparts */ + for (cmd = dhd_cmds; cmd->name; cmd++) { + /* search if port counterpart exists */ + for (port_cmd = port_cmds; port_cmd && port_cmd->name; port_cmd++) + if (!strcmp(port_cmd->name, cmd->name)) + break; + if (!port_cmd || !port_cmd->name) + dhd_cmd_usage(cmd); + } +} + +void +dhd_usage(cmd_t *port_cmds) +{ + fprintf(stderr, + "Usage: %s [-a|i ] [-h] [-d|u|x] [arguments]\n", + dhdu_av0); + + fprintf(stderr, "\n"); + fprintf(stderr, " -h this message\n"); + fprintf(stderr, " -a, -i adapter name or number\n"); + fprintf(stderr, " -d display values as signed integer\n"); + fprintf(stderr, " -u display values as unsigned integer\n"); + fprintf(stderr, " -x display values as hexdecimal\n"); + fprintf(stderr, "\n"); + + dhd_cmds_usage(port_cmds); +} + +int +dhd_check(void *dhd) +{ + int ret; + int val; + + if ((ret = dhd_get(dhd, DHD_GET_MAGIC, &val, sizeof(int)) < 0)) + return ret; + if (val != DHD_IOCTL_MAGIC) + return -1; + if ((ret = dhd_get(dhd, DHD_GET_VERSION, &val, sizeof(int)) < 0)) + return ret; + if (val > DHD_IOCTL_VERSION) { + fprintf(stderr, "Version mismatch, please upgrade\n"); + return -1; + } + return 0; +} + +void +dhd_printint(int val) +{ + switch (int_fmt) { + case INT_FMT_UINT: + printf("%u\n", val); + break; + case INT_FMT_HEX: + printf("0x%x\n", val); + break; + case INT_FMT_DEC: + default: + printf("%d\n", val); + break; + } +} + +/* pretty hex print a contiguous buffer (tweaked from wlu) */ +void +dhd_hexdump(uchar *buf, uint nbytes, uint saddr) +{ + char line[256]; + char* p; + uint i; + + if (nbytes == 0) { + printf("\n"); + return; + } + + p = line; + for (i = 0; i < nbytes; i++) { + if (i % 16 == 0) { + p += sprintf(p, "%08x: ", saddr + i); /* line prefix */ + } + p += sprintf(p, "%02x ", buf[i]); + if (i % 16 == 15) { + uint j; + p += sprintf(p, " "); + for (j = i-15; j <= i; j++) + p += sprintf(p, "%c", + ((buf[j] >= 0x20 && buf[j] <= 0x7f) ? buf[j] : '.')); + printf("%s\n", line); /* flush line */ + p = line; + } + } + + /* flush last partial line */ + if (p != line) + printf("%s\n", line); +} + + +#ifdef SDTEST +static int +dhd_pktgen(void *dhd, cmd_t *cmd, char **argv) +{ + int ret = 0; + void *ptr = NULL; + dhd_pktgen_t pktgen; + char *str; + + UNUSED_PARAMETER(dhd); + UNUSED_PARAMETER(cmd); + + /* Get current settings */ + if ((ret = dhd_var_getbuf(dhd, "pktgen", NULL, 0, &ptr)) != 0) + return ret; + memcpy(&pktgen, ptr, sizeof(pktgen)); + + if (pktgen.version != DHD_PKTGEN_VERSION) { + fprintf(stderr, "pktgen version mismatch (module %d app %d)\n", + pktgen.version, DHD_PKTGEN_VERSION); + return COMMAND_ERROR; + } + + /* Presence of args implies a set, else a get */ + if (*++argv) { + miniopt_t opts; + int opt_err; + + /* Initialize option parser */ + miniopt_init(&opts, "pktgen", "", FALSE); + + while ((opt_err = miniopt(&opts, argv)) != -1) { + if (opt_err == 1) { + fprintf(stderr, "pktgen options error\n"); + ret = -1; + goto exit; + } + argv += opts.consumed; + + if (!opts.good_int && opts.opt != 'd') { + fprintf(stderr, "invalid integer %s\n", opts.valstr); + ret = -1; + goto exit; + } + + switch (opts.opt) { + case 'f': + pktgen.freq = opts.uval; + break; + case 'c': + pktgen.count = opts.uval; + break; + case 'p': + pktgen.print = opts.uval; + break; + case 't': + pktgen.total = opts.uval; + break; + case 's': + pktgen.stop = opts.uval; + break; + case 'm': + pktgen.minlen = opts.uval; + break; + case 'M': + pktgen.maxlen = opts.uval; + break; + case 'l': case 'L': + pktgen.minlen = pktgen.maxlen = opts.uval; + break; + case 'd': + if (!strcmp(opts.valstr, "send")) + pktgen.mode = DHD_PKTGEN_SEND; + else if (!strcmp(opts.valstr, "echo")) + pktgen.mode = DHD_PKTGEN_ECHO; + else if (!strcmp(opts.valstr, "burst")) + pktgen.mode = DHD_PKTGEN_RXBURST; + else if (!strcmp(opts.valstr, "recv")) + pktgen.mode = DHD_PKTGEN_RECV; + else { + fprintf(stderr, "unrecognized dir mode %s\n", + opts.valstr); + return USAGE_ERROR; + } + break; + + default: + fprintf(stderr, "option parsing error (key %s valstr %s)\n", + opts.key, opts.valstr); + ret = USAGE_ERROR; + goto exit; + } + } + + if (pktgen.maxlen < pktgen.minlen) { + fprintf(stderr, "min/max error (%d/%d)\n", pktgen.minlen, pktgen.maxlen); + ret = -1; + goto exit; + } + + /* Set the new values */ + ret = dhd_var_setbuf(dhd, "pktgen", &pktgen, sizeof(pktgen)); + } else { + printf("Counts: %d send attempts, %d received, %d tx failures\n", + pktgen.numsent, pktgen.numrcvd, pktgen.numfail); + } + + /* Show configuration in either case */ + switch (pktgen.mode) { + case DHD_PKTGEN_ECHO: str = "echo"; break; + case DHD_PKTGEN_SEND: str = "send"; break; + case DHD_PKTGEN_RECV: str = "recv"; break; + case DHD_PKTGEN_RXBURST: str = "burst"; break; + default: str = "UNKNOWN"; break; + } + + printf("Config: mode %s %d pkts (len %d-%d) each %d ticks\n", + str, pktgen.count, pktgen.minlen, pktgen.maxlen, pktgen.freq); + + /* Second config line for optional items */ + str = " "; + if (pktgen.total) { + printf("%slimit %d", str, pktgen.total); + str = ", "; + } + if (pktgen.print) { + printf("%sprint every %d ticks", str, (pktgen.freq * pktgen.print)); + str = ", "; + } + if (pktgen.stop) { + printf("%sstop after %d tx failures", str, pktgen.stop); + str = ", "; + } + if (str[0] == ',') + printf("\n"); + +exit: + return ret; +} +#endif /* SDTEST */ + +static dbg_msg_t dhd_sd_msgs[] = { + {SDH_ERROR_VAL, "error"}, + {SDH_TRACE_VAL, "trace"}, + {SDH_INFO_VAL, "info"}, + {SDH_DATA_VAL, "data"}, + {SDH_CTRL_VAL, "control"}, + {SDH_LOG_VAL, "log"}, + {SDH_DMA_VAL, "dma"}, + {0, NULL} +}; + +static int +dhd_sd_msglevel(void *dhd, cmd_t *cmd, char **argv) +{ + return dhd_do_msglevel(dhd, cmd, argv, dhd_sd_msgs); +} + +static int +dhd_sd_blocksize(void *dhd, cmd_t *cmd, char **argv) +{ + int ret; + int argc; + char *endptr = NULL; + void *ptr = NULL; + int func, size; + + /* arg count */ + for (argc = 0; argv[argc]; argc++); + argc--; + + if (argc < 1 || argc > 2) { + printf("required args: function [size] (size 0 means max)\n"); + return USAGE_ERROR; + } + + func = strtol(argv[1], &endptr, 0); + if (*endptr != '\0') { + printf("Invalid function: %s\n", argv[1]); + return USAGE_ERROR; + } + + if (argc > 1) { + size = strtol(argv[2], &endptr, 0); + if (*endptr != '\0') { + printf("Invalid size: %s\n", argv[1]); + return USAGE_ERROR; + } + } + + if (argc == 1) { + if ((ret = dhd_var_getbuf(dhd, cmd->name, &func, sizeof(func), &ptr)) >= 0) + printf("Function %d block size: %d\n", func, *(int*)ptr); + } else { + printf("Setting function %d block size to %d\n", func, size); + size &= 0x0000ffff; size |= (func << 16); + ret = dhd_var_setbuf(dhd, cmd->name, &size, sizeof(size)); + } + + return (ret); +} + +static int +dhd_sd_mode(void *wl, cmd_t *cmd, char **argv) +{ + int ret; + int argc; + int sdmode; + + /* arg count */ + for (argc = 0; argv[argc]; argc++); + argc--; + + if (argv[1]) { + if (!strcmp(argv[1], "spi")) { + strcpy(argv[1], "0"); + } else if (!strcmp(argv[1], "sd1")) { + strcpy(argv[1], "1"); + } else if (!strcmp(argv[1], "sd4")) { + strcpy(argv[1], "2"); + } else { + return USAGE_ERROR; + } + + ret = dhd_var_setint(wl, cmd, argv); + + } else { + if ((ret = dhd_var_get(wl, cmd, argv))) { + return (ret); + } else { + sdmode = *(int32*)buf; + + printf("SD Mode is: %s\n", + sdmode == 0 ? "SPI" + : sdmode == 1 ? "SD1" + : sdmode == 2 ? "SD4" : "Unknown"); + } + } + + return (ret); +} + +static int +dhd_dma_mode(void *wl, cmd_t *cmd, char **argv) +{ + int ret; + int argc; + int dmamode; + + /* arg count */ + for (argc = 0; argv[argc]; argc++); + argc--; + + if (argv[1]) { + if (!stricmp(argv[1], "pio")) { + strcpy(argv[1], "0"); + } else if (!strcmp(argv[1], "0")) { + } else if (!stricmp(argv[1], "dma")) { + strcpy(argv[1], "1"); + } else if (!stricmp(argv[1], "sdma")) { + strcpy(argv[1], "1"); + } else if (!strcmp(argv[1], "1")) { + } else if (!stricmp(argv[1], "adma1")) { + strcpy(argv[1], "2"); + } else if (!stricmp(argv[1], "adma")) { + strcpy(argv[1], "3"); + } else if (!stricmp(argv[1], "adma2")) { + strcpy(argv[1], "3"); + } else { + return USAGE_ERROR; + } + + ret = dhd_var_setint(wl, cmd, argv); + + } else { + if ((ret = dhd_var_get(wl, cmd, argv))) { + return (ret); + } else { + dmamode = *(int32*)buf; + + printf("DMA Mode is: %s\n", + dmamode == 0 ? "PIO" + : dmamode == 1 ? "SDMA" + : dmamode == 2 ? "ADMA1" + : dmamode == 3 ? "ADMA2" + : "Unknown"); + } + } + + return (ret); +} + + +static int +dhd_sdreg(void *dhd, cmd_t *cmd, char **argv) +{ + int ret; + sdreg_t sdreg; + uint argc; + char *ptr = NULL; + + UNUSED_PARAMETER(cmd); + + bzero(&sdreg, sizeof(sdreg)); + + /* arg count */ + for (argc = 0; argv[argc]; argc++); + argc--; + + /* required args: offset (will default size) */ + if (argc < 1) { + printf("required args: offset[/size] [value]\n"); + return USAGE_ERROR; + } + + sdreg.offset = strtoul(argv[1], &ptr, 0); + if (*ptr && *ptr != '/') { + printf("Bad arg: %s\n", argv[1]); + return USAGE_ERROR; + } + + /* read optional /size */ + if (*ptr == '/') { + sdreg.func = strtol((ptr+1), &ptr, 0); + if (*ptr || ((sdreg.func != 2) && sdreg.func != 4)) { + printf("Bad size option?\n"); + return USAGE_ERROR; + } + } + else { + sdreg.func = 4; + printf("Defaulting to register size 4\n"); + } + + if (argc > 1) { + sdreg.value = strtoul(argv[2], &ptr, 0); + if (*ptr) { + printf("Bad value: %s\n", argv[2]); + return USAGE_ERROR; + } + } + + if (argc <= 1) { + ret = dhd_var_getbuf(dhd, argv[0], &sdreg, sizeof(sdreg), (void**)&ptr); + if (ret >= 0) + printf("0x%0*x\n", (2 * sdreg.func), *(int *)ptr); + } else { + ret = dhd_var_setbuf(dhd, argv[0], &sdreg, sizeof(sdreg)); + } + + return (ret); +} + +static int +dhd_membytes(void *dhd, cmd_t *cmd, char **argv) +{ + int ret = -1; + uint argc; + char *ptr; + int params[2]; + uint addr; + uint len; + int align; + + int rawout, hexin; + + miniopt_t opts; + int opt_err; + + /* Parse command-line options */ + miniopt_init(&opts, "membytes", "rh", FALSE); + + rawout = hexin = 0; + + argv++; + while ((opt_err = miniopt(&opts, argv)) != -1) { + if (opt_err == 1) { + fprintf(stderr, "membytes options error\n"); + ret = -1; + goto exit; + } + + if (opts.positional) + break; + + argv += opts.consumed; + + if (opts.opt == 'h') { + hexin = 1; + } else if (opts.opt == 'r') { + rawout = 1; + } else { + fprintf(stderr, "membytes command error\n"); + ret = -1; + goto exit; + } + } + + /* arg count */ + for (argc = 0; argv[argc]; argc++); + + /* required args: address size []] */ + if (argc < 2) { + fprintf(stderr, "required args: address size []\n"); + return USAGE_ERROR; + } + if (argc < 3 && hexin) { + fprintf(stderr, "missing arg implies by -h\n"); + return USAGE_ERROR; + } + if ((argc > 2) && (rawout)) { + fprintf(stderr, "can't have input arg with -r or -i\n"); + return USAGE_ERROR; + } + + /* read address */ + addr = strtoul(argv[0], &ptr, 0); + if (*ptr) { + fprintf(stderr, "Bad arg: %s\n", argv[0]); + return USAGE_ERROR; + } + + /* read size */ + len = strtoul(argv[1], &ptr, 0); + if (*ptr) { + fprintf(stderr, "Bad value: %s\n", argv[1]); + return USAGE_ERROR; + } + + align = addr & 0x03; + if (align && argc > 2) { + fprintf(stderr, "Can only write starting at long-aligned addresses.\n"); + return USAGE_ERROR; + } + + /* get can just use utility function, set must copy custom buffer */ + if (argc == 2) { + uint chunk = DHD_IOCTL_MAXLEN; + for (addr -= align, len += align; len; addr += chunk, len -= chunk, align = 0) { + chunk = MIN(chunk, len); + params[0] = addr; params[1] = ROUNDUP(chunk, 4); + ret = dhd_var_getbuf(dhd, "membytes", + params, (2 * sizeof(int)), (void**)&ptr); + if (ret < 0) + goto exit; + + if (rawout) { + fwrite(ptr + align, sizeof(char), chunk - align, stdout); + } else { + dhd_hexdump((uchar*)ptr + align, chunk - align, addr + align); + } + } + } else { + uint patlen = strlen(argv[2]); + uint chunk, maxchunk; + char *sptr; + + if (hexin) { + char *inptr, *outptr; + if (patlen & 1) { + fprintf(stderr, "Hex (-h) must consist of whole bytes\n"); + ret = USAGE_ERROR; + goto exit; + } + + for (inptr = outptr = argv[2]; patlen; patlen -= 2) { + int n1, n2; + + n1 = (int)((unsigned char)*inptr++); + n2 = (int)((unsigned char)*inptr++); + if (!isxdigit(n1) || !isxdigit(n2)) { + fprintf(stderr, "invalid hex digit %c\n", + (isxdigit(n1) ? n2 : n1)); + ret = USAGE_ERROR; + goto exit; + } + n1 = isdigit(n1) ? (n1 - '0') + : ((islower(n1) ? (toupper(n1)) : n1) - 'A' + 10); + n2 = isdigit(n2) ? (n2 - '0') + : ((islower(n2) ? (toupper(n2)) : n2) - 'A' + 10); + *outptr++ = (n1 * 16) + n2; + } + + patlen = outptr - argv[2]; + } + + sptr = argv[2]; + maxchunk = DHD_IOCTL_MAXLEN - (strlen(cmd->name) + 1 + (2 * sizeof(int))); + + while (len) { + chunk = (len > maxchunk) ? (maxchunk & ~0x3) : len; + + /* build the iovar command */ + memset(buf, 0, DHD_IOCTL_MAXLEN); + strcpy(buf, cmd->name); + ptr = buf + strlen(buf) + 1; + params[0] = addr; params[1] = chunk; + memcpy(ptr, params, (2 * sizeof(int))); + ptr += (2 * sizeof(int)); + addr += chunk; len -= chunk; + + while (chunk--) { + *ptr++ = *sptr++; + if (sptr >= (argv[2] + patlen)) + sptr = argv[2]; + } + + ret = dhd_set(dhd, DHD_SET_VAR, &buf[0], (ptr - buf)); + if (ret < 0) + goto exit; + } + } + +exit: + return ret; +} + +static int +dhd_idletime(void *dhd, cmd_t *cmd, char **argv) +{ + int32 idletime; + char *endptr = NULL; + int err = 0; + + if (argv[1]) { + if (!strcmp(argv[1], "never")) { + idletime = 0; + } else if (!strcmp(argv[1], "immediate") || !strcmp(argv[1], "immed")) { + idletime = DHD_IDLE_IMMEDIATE; + } else { + idletime = strtol(argv[1], &endptr, 0); + if (*endptr != '\0') { + fprintf(stderr, "invalid number %s\n", argv[1]); + err = -1; + } + } + if ((idletime < 0) && (idletime != DHD_IDLE_IMMEDIATE)) { + fprintf(stderr, "invalid value %s\n", argv[1]); + err = -1; + } + + if (!err) { + strcpy(buf, "idletime"); + endptr = buf + strlen(buf) + 1; + memcpy(endptr, &idletime, sizeof(uint32)); + endptr += sizeof(uint32); + err = dhd_set(dhd, DHD_SET_VAR, &buf[0], (endptr - buf)); + } + } else { + if ((err = dhd_var_get(dhd, cmd, argv))) { + return err; + } else { + idletime = *(int32*)buf; + + if (idletime == 0) { + printf("0 (never)\n"); + } else if (idletime == DHD_IDLE_IMMEDIATE) { + printf("-1 (immediate)\n"); + } else if (idletime > 0) { + printf("%d\n", idletime); + } else printf("%d (invalid)\n", idletime); + } + } + return err; +} + +static int +dhd_idleclock(void *dhd, cmd_t *cmd, char **argv) +{ + int32 idleclock; + char *endptr = NULL; + int err = 0; + + if (argv[1]) { + if (!strcmp(argv[1], "active")) { + idleclock = DHD_IDLE_ACTIVE; + } else if (!strcmp(argv[1], "stopped")) { + idleclock = DHD_IDLE_STOP; + } else { + idleclock = strtol(argv[1], &endptr, 0); + if (*endptr != '\0') { + fprintf(stderr, "invalid number %s\n", argv[1]); + err = USAGE_ERROR; + } + } + + if (!err) { + strcpy(buf, "idleclock"); + endptr = buf + strlen(buf) + 1; + memcpy(endptr, &idleclock, sizeof(int32)); + endptr += sizeof(int32); + err = dhd_set(dhd, DHD_SET_VAR, &buf[0], (endptr - buf)); + } + } else { + if ((err = dhd_var_get(dhd, cmd, argv))) { + return err; + } else { + idleclock = *(int32*)buf; + + if (idleclock == DHD_IDLE_ACTIVE) + printf("Idleclock %d (active)\n", idleclock); + else if (idleclock == DHD_IDLE_STOP) + printf("Idleclock %d (stopped)\n", idleclock); + else + printf("Idleclock divisor %d\n", idleclock); + } + } + return err; +} + +/* Word count for a 4kb SPROM */ +#define SPROM_WORDS 256 + +static int +dhd_sprom(void *dhd, cmd_t *cmd, char **argv) +{ +#if !defined(BWL_FILESYSTEM_SUPPORT) + return (-1); +#else + int ret, i; + uint argc; + char *endptr; + char *bufp, *countptr; + uint16 *wordptr; + uint offset, words, bytes; + bool nocrc = FALSE; + + char *fname; + FILE *fp; + + UNUSED_PARAMETER(cmd); + + /* arg count */ + for (argc = 0; argv[argc]; argc++); + argc--; + + /* init buffer */ + bufp = buf; + memset(bufp, 0, DHD_IOCTL_MAXLEN); + strcpy(bufp, "sprom"); + bufp += strlen("sprom") + 1; + + if (strcmp(argv[0], "srdump") == 0) { + if (argc) { + fprintf(stderr, "Command srdump doesn't take args\n"); + return USAGE_ERROR; + } + offset = 0; + words = SPROM_WORDS; + bytes = 2 * words; + + memcpy(bufp, &offset, sizeof(int)); + bufp += sizeof(int); + memcpy(bufp, &bytes, sizeof(int)); + bufp += sizeof(int); + + if (!ISALIGNED(bufp, sizeof(uint16))) { + fprintf(stderr, "Internal error: unaligned word buffer\n"); + return COMMAND_ERROR; + } + } else { + if (strcmp(argv[0], "srwrite") != 0) { + fprintf(stderr, "Unimplemented sprom command: %s\n", argv[0]); + return USAGE_ERROR; + } + + if (argc == 0) { + return USAGE_ERROR; + } else if ((argc == 1) || + ((argc == 2) && ((nocrc = !strcmp(argv[1], "-c"))))) { + + fname = nocrc ? argv[2] : argv[1]; + + /* determine and validate file size */ + if ((ret = file_size(fname)) < 0) + return COMMAND_ERROR; + + bytes = ret; + offset = 0; + words = bytes / 2; + + if (bytes != 2 * SPROM_WORDS) { + fprintf(stderr, "Bad file size\n"); + return COMMAND_ERROR; + } + + memcpy(bufp, &offset, sizeof(int)); + bufp += sizeof(int); + memcpy(bufp, &bytes, sizeof(int)); + bufp += sizeof(int); + + if (!ISALIGNED(bufp, sizeof(uint16))) { + fprintf(stderr, "Internal error: unaligned word buffer\n"); + return COMMAND_ERROR; + } + + if ((fp = fopen(fname, "rb")) == NULL) { + fprintf(stderr, "Could not open %s: %s\n", + fname, strerror(errno)); + return COMMAND_ERROR; + } + + if (fread((uint16*)bufp, sizeof(uint16), words, fp) != words) { + fprintf(stderr, "Could not read %d bytes from %s\n", + words * 2, fname); + fclose(fp); + return COMMAND_ERROR; + } + + fclose(fp); + + if (!nocrc && + hndcrc8((uint8*)bufp, bytes, CRC8_INIT_VALUE) != CRC8_GOOD_VALUE) { + fprintf(stderr, "CRC check failed: 0x%02x, should be 0x%02x.\n", + ((uint8*)bufp)[bytes-1], + ~hndcrc8((uint8*)bufp, bytes - 1, CRC8_INIT_VALUE) & 0xff); + return COMMAND_ERROR; + } + + ltoh16_buf(bufp, bytes); + } else { + offset = strtoul(*++argv, &endptr, 0) * 2; + if (*endptr != '\0') { + fprintf(stderr, "offset %s is not an integer\n", *argv); + return USAGE_ERROR; + } + + memcpy(bufp, &offset, sizeof(int)); + bufp += sizeof(int); + countptr = bufp; + bufp += sizeof(int); + + if (!ISALIGNED(bufp, sizeof(uint16))) { + fprintf(stderr, "Internal error: unaligned word buffer\n"); + return COMMAND_ERROR; + } + + for (words = 0, wordptr = (uint16*)bufp; *++argv; words++) { + *wordptr++ = (uint16)strtoul(*argv, &endptr, 0); + if (*endptr != '\0') { + fprintf(stderr, "value %s is not an integer\n", *argv); + return USAGE_ERROR; + } + if (words > SPROM_WORDS) { + fprintf(stderr, "max of %d words\n", SPROM_WORDS); + return USAGE_ERROR; + } + } + + bytes = 2 * words; + memcpy(countptr, &bytes, sizeof(int)); + } + } + + if (argc) { + ret = dhd_set(dhd, DHD_SET_VAR, buf, + (strlen("sprom") + 1) + (2 * sizeof(int)) + bytes); + return (ret); + } else { + ret = dhd_get(dhd, DHD_GET_VAR, buf, + (strlen("sprom") + 1) + (2 * sizeof(int)) + bytes); + if (ret < 0) { + return ret; + } + + for (i = 0; i < (int)words; i++) { + if ((i % 8) == 0) + printf("\n srom[%03d]: ", i); + printf("0x%04x ", ((uint16*)buf)[i]); + } + printf("\n"); + } + + return 0; +#endif /* BWL_FILESYSTEM_SUPPORT */ +} + +/* + * read_vars: reads an environment variables file into a buffer, + * reformatting them and returning the length (-1 on error). + * + * The input text file consists of lines of the form "=\n". + * CRs are ignored, as are blank lines and comments beginning with '#'. + * + * The output buffer consists of blocks of the form "=\0" + * (the newlines have been replaced by NULs) + * + * Todo: allow quoted variable names and quoted values. +*/ + +#if defined(BWL_FILESYSTEM_SUPPORT) +static int +read_vars(char *fname, char *buf, int buf_maxlen) +{ + FILE *fp; + int buf_len, slen; + char line[256], *s, *e; + int line_no = 0; + + if ((fp = fopen(fname, "rb")) == NULL) { + fprintf(stderr, "Cannot open NVRAM file %s: %s\n", + fname, strerror(errno)); + exit(1); + } + + buf_len = 0; + + while (fgets(line, sizeof(line), fp) != NULL) { + bool found_eq = FALSE; + + /* Ensure line length is limited */ + line[sizeof(line) - 1] = 0; + + /* Skip any initial white space */ + for (s = line; *s == ' ' || *s == '\t'; s++) + ; + + /* Determine end of string */ + for (e = s; *e != 0 && *e != '#' && *e != '\r' && *e != '\n'; e++) + if (*e == '=') + found_eq = TRUE; + + /* Strip any white space from end of string */ + while (e > s && (e[-1] == ' ' || e[-1] == '\t')) + e--; + + slen = e - s; + + /* Skip lines that end up blank */ + if (slen == 0) + continue; + + if (!found_eq) { + fprintf(stderr, "Invalid line %d in NVRAM file %s\n", line_no, fname); + fclose(fp); + return -1; + } + + if (buf_len + slen + 1 > buf_maxlen) { + fprintf(stderr, "NVRAM file %s too long\n", fname); + fclose(fp); + return -1; + } + + memcpy(buf + buf_len, s, slen); + buf_len += slen; + buf[buf_len++] = 0; + } + + fclose(fp); + + return buf_len; +} +#endif /* BWL_FILESYSTEM_SUPPORT */ + +static int +dhd_vars(void *dhd, cmd_t *cmd, char **argv) +{ + int ret; + uint argc; + char *bufp; + + UNUSED_PARAMETER(cmd); + + /* arg count */ + for (argc = 0; argv[argc]; argc++); + argc--; + + switch (argc) { + case 0: /* get */ + { + if ((ret = dhd_var_getbuf(dhd, "vars", NULL, 0, (void**)&bufp))) + break; + while (*bufp) { + printf("%s\n", bufp); + bufp += strlen(bufp) + 1; + } + } + break; + +#if defined(BWL_FILESYSTEM_SUPPORT) + case 1: /* set */ + { + char *vname; + uint nvram_len; + + vname = argv[1]; + + bufp = buf; + strcpy(bufp, "vars"); + bufp += strlen("vars") + 1; + + if ((ret = read_vars(vname, bufp, + DHD_IOCTL_MAXLEN - (strlen("vars") + 3))) < 0) { + ret = -1; + break; + } + + nvram_len = ret; + bufp += nvram_len; + *bufp++ = 0; + + ret = dhd_set(dhd, DHD_SET_VAR, buf, bufp - buf); + } + break; +#endif /* BWL_FILESYSTEM_SUPPORT */ + + default: + ret = -1; + break; + } + + return ret; +} + +#define MEMBLOCK 2048 + +/* Check that strlen("membytes")+1 + 2*sizeof(int32) + MEMBLOCK <= DHD_IOCTL_MAXLEN */ +#if (MEMBLOCK + 17 > DHD_IOCTL_MAXLEN) +#error MEMBLOCK/DHD_IOCTL_MAXLEN sizing +#endif + + +#if defined(BWL_FILESYSTEM_SUPPORT) +static int +dhd_verify_file_bytes(void *dhd, uint8 *memblock, int start, uint len) +{ + int ret = 0, i; + char *ptr; + int params[2]; + uint8 *src, *dst; + + params[0] = start; + params[1] = len; + ret = dhd_var_getbuf(dhd, "membytes", params, 2 * sizeof(int), (void**)&ptr); + if (ret) { + fprintf(stderr, "%s: failed reading %d membytes from 0x%08x\n", + __FUNCTION__, len, start); + return -1; + } + + src = (uint8 *)memblock; + dst = (uint8 *)ptr; + while (i < len) { + if (src[i] != dst[i]) { + fprintf(stderr, " 0x%x: exp[0x%02X] != got[0x%02X]\n", + start+i, src[i], dst[i]); + ret = -1; + } + i++; + } + + return ret; +} + +static int +dhd_load_file_bytes(void *dhd, cmd_t *cmd, FILE *fp, int fsize, int start, uint blk_sz, bool verify) +{ + int tot_len = 0; + uint read_len; + char *bufp; + uint len; + uint8 memblock[MEMBLOCK]; + int ret; + + UNUSED_PARAMETER(cmd); + + if (!fsize || !fp) + return -1; + + assert(blk_sz <= MEMBLOCK); + + while (tot_len < fsize) { + read_len = fsize - tot_len; + if (read_len >= blk_sz) { + read_len = blk_sz; + + if (!ISALIGNED(start, MEMBLOCK)) + read_len = ROUNDUP(start, MEMBLOCK) - start; + } + + len = fread(memblock, sizeof(uint8), read_len, fp); + if ((len < read_len) && !feof(fp)) { + fprintf(stderr, "%s: error reading file\n", __FUNCTION__); + return -1; + + } + + bufp = buf; + memset(bufp, 0, DHD_IOCTL_MAXLEN); + strcpy(bufp, "membytes"); + bufp += strlen("membytes") + 1; + memcpy(bufp, &start, sizeof(int)); + bufp += sizeof(int); + memcpy(bufp, &len, sizeof(int)); + bufp += sizeof(int); + memcpy(bufp, memblock, len); + + ret = dhd_set(dhd, DHD_SET_VAR, &buf[0], (bufp - buf + len)); + + if (ret) { + fprintf(stderr, "%s: error %d on writing %d membytes at 0x%08x\n", + __FUNCTION__, ret, len, start); + return -1; + } + + if (verify == TRUE) { + if (len & 1) + len = ROUNDUP(len, 2); + + if (dhd_verify_file_bytes(dhd, memblock, start, len) != 0) { + fprintf(stderr, "%s: verify failed %d membytes " + "from 0x%08x\n", + __FUNCTION__, len, start); + } + } + + start += len; + tot_len += len; + } + return 0; +} +#endif /* BWL_FILESYSTEM_SUPPORT */ + +#ifdef PROP_TXSTATUS +static int +dhd_proptxstatusenable(void *dhd, cmd_t *cmd, char **argv) +{ + int flag = 0xdead; + + if (argv[1]) { + flag = atoi(argv[1]); + dhd_iovar_setint(dhd, cmd->name, flag); + } + else { + dhd_iovar_getint(dhd, cmd->name, &flag); + printf("proptxstatus: %d\n", flag); + } + return 0; +} + +static int +dhd_proptxstatusmode(void *dhd, cmd_t *cmd, char **argv) +{ + int mode = 0xdead; + + if (argv[1]) { + mode = atoi(argv[1]); + dhd_iovar_setint(dhd, cmd->name, mode); + } + else { + dhd_iovar_getint(dhd, cmd->name, &mode); + printf("proptxstatusmode: %d\n", mode); + } + return 0; +} +#endif /* PROP_TXSTATUS */ + +static int +dhd_download(void *dhd, cmd_t *cmd, char **argv) +{ +#if !defined(BWL_FILESYSTEM_SUPPORT) + return (-1); +#else + bool reset = TRUE; + bool run = TRUE; + bool verify = FALSE; + char *fname = NULL; + char *vname = NULL; + uint32 start = 0; + int ret = 0; + int fsize; + uint32 bustype; + long filepos; + + FILE *fp = NULL; + uint32 memsize; + char *memszargs[] = { "memsize", NULL }; + + char *bufp; + + miniopt_t opts; + int opt_err; + uint nvram_len; + struct trx_header trx_hdr; + uint32 trx_hdr_len; + bool trx_file = FALSE; + uint memblock_sz = MEMBLOCK; + bool embedded_ucode = FALSE; + + UNUSED_PARAMETER(cmd); + + /* Parse command-line options */ + miniopt_init(&opts, "download", "", TRUE); + + argv++; + while ((opt_err = miniopt(&opts, argv)) != -1) { + if (opt_err == 1) { + fprintf(stderr, "download options error\n"); + ret = -1; + goto exit; + } + argv += opts.consumed; + + if (opts.opt == 'a') { + if (!opts.good_int) { + fprintf(stderr, "invalid address %s\n", opts.valstr); + ret = -1; + goto exit; + } + start = (uint32)opts.uval; + } else if (opts.positional) { + if (fname && vname) { + fprintf(stderr, "extra positional arg, %s\n", + opts.valstr); + ret = -1; + goto exit; + } + if (fname) + vname = opts.valstr; + else + fname = opts.valstr; + } else if (!opts.opt) { + if (!strcmp(opts.key, "noreset")) { + reset = FALSE; + } else if (!strcmp(opts.key, "norun")) { + run = FALSE; + } else if (!strcmp(opts.key, "verify")) { + verify = TRUE; + } else { + fprintf(stderr, "unrecognized option %s\n", opts.valstr); + ret = -1; + goto exit; + } + } else { + fprintf(stderr, "unrecognized option %c\n", opts.opt); + ret = -1; + goto exit; + } + } + + /* validate arguments */ + if (!fname) { + fprintf(stderr, "filename required\n"); + ret = -1; + goto exit; + } + + /* validate file size compared to memory size */ + if ((fsize = file_size(fname)) < 0) { + ret = -1; + goto exit; + } + /* read the file and push blocks down to memory */ + if ((fp = fopen(fname, "rb")) == NULL) { + fprintf(stderr, "%s: unable to open %s: %s\n", + __FUNCTION__, fname, strerror(errno)); + ret = -1; + goto exit; + } + /* Verify the file is a regular bin file or trx file */ + { + uint32 tmp_len; + trx_hdr_len = sizeof(struct trx_header); + tmp_len = fread(&trx_hdr, sizeof(uint8), trx_hdr_len, fp); + if (tmp_len == trx_hdr_len) { + if (trx_hdr.magic == TRX_MAGIC) { + trx_file = TRUE; + if (trx_hdr.flag_version & TRX_EMBED_UCODE) + embedded_ucode = TRUE; + } + else + fseek(fp, 0, SEEK_SET); + } + else + fseek(fp, 0, SEEK_SET); + } + + /* Check on which bus the dhd driver is sitting. Downloading methodology differs from + * USB to SDIO. + */ + { + char* bustype_args[] = {"bustype", NULL}; + + /* Read the bus type the DHD driver is associated to */ + if ((ret = dhd_var_get(dhd, NULL, bustype_args))) { + fprintf(stderr, "%s: error obtaining bustype\n", __FUNCTION__); + goto exit; + } + + bustype = *(uint32*)buf; + } + + if (trx_file) + fsize = (int)(trx_hdr.offsets[0]); + + if (BUS_TYPE_SDIO == bustype) { + if ((ret = dhd_var_get(dhd, NULL, memszargs))) { + fprintf(stderr, "%s: error obtaining memsize\n", __FUNCTION__); + goto exit; + } + memsize = *(uint32*)buf; + } + + + BCM_REFERENCE(memsize); + + /* do the download reset if not suppressed */ + if (reset) { + if ((ret = dhd_iovar_setint(dhd, "dwnldstate", TRUE))) { + fprintf(stderr, "%s: failed to put dongle in download mode\n", + __FUNCTION__); + goto exit; + } + } + + if (BUS_TYPE_USB == bustype) { + /* store the cur pos pointing to base image which should be written */ + filepos = ftell(fp); + if (filepos == -1) { + fprintf(stderr, "%s: ftell failed.\n", __FUNCTION__); + } + + /* In case of USB, we need to write header information also to dongle. */ + fseek(fp, 0, SEEK_SET); + + /* The file size is "base_image + TRX_Header_size" */ + fsize = (int)(trx_hdr.offsets[0] + sizeof(struct trx_header)); + + memblock_sz = RDL_CHUNK; + } + + + /* Load the ram image */ + if (dhd_load_file_bytes(dhd, cmd, fp, fsize, start, memblock_sz, verify)) { + fprintf(stderr, "%s: error loading the ramimage at addr 0x%x\n", + __FUNCTION__, start); + ret = -1; + goto exit; + } + + if (trx_file) { + + filepos = ftell(fp); + if (filepos == -1) { + fprintf(stderr, "%s: ftell failed.\n", __FUNCTION__); + } + + if (BUS_TYPE_SDIO == bustype) { + + } + } + + fclose(fp); + fp = NULL; + + /* download the vars file if specified */ + if (vname) { + bufp = buf; + strcpy(bufp, "vars"); + bufp += strlen("vars") + 1; + + if ((ret = read_vars(vname, bufp, + DHD_IOCTL_MAXLEN - (strlen("vars") + 3))) < 0) { + ret = -1; + goto exit; + } + + nvram_len = ret; + bufp += nvram_len; + *bufp++ = 0; + + ret = dhd_set(dhd, DHD_SET_VAR, buf, (bufp - buf)); + if (ret) { + fprintf(stderr, "%s: error %d on delivering vars\n", + __FUNCTION__, ret); + goto exit; + } + } + + /* start running the downloaded code if not suppressed */ + if (run) { + if ((ret = dhd_iovar_setint(dhd, "dwnldstate", FALSE))) { + + fprintf(stderr, "%s: failed to take dongle out of download mode\n", + __FUNCTION__); + /* USB Error return values */ + if (BUS_TYPE_USB == bustype) { + if (ret == -1) + fprintf(stderr, "%s: CPU is not in RUNNABLE State\n", + __FUNCTION__); + else + fprintf(stderr, "%s: Error in setting CPU to RUN mode.\n", + __FUNCTION__); + } + goto exit; + } + } + if (embedded_ucode) { + int retval; + /* download the embedded ucode now */ + retval = proc_ucode_download(fname, dhd); + if (retval != 0) + printf("ucode & initvals download has failed\n"); + } + +exit: + if (fp) + fclose(fp); + + return ret; +#endif /* BWL_FILESYSTEM_SUPPORT */ +} + +static int +dhd_dldn(void *dhd, cmd_t *cmd, char **argv) +{ +#if !defined(BWL_FILESYSTEM_SUPPORT) + return (-1); +#else + char *fname = NULL; + uint32 start = 0; + int ret = 0; + int fsize; + int fd = 0; + + FILE *fp = NULL; + uint32 memsize; + + uint len; + uint8 memblock[MEMBLOCK]; + + miniopt_t opts; + int opt_err; + + UNUSED_PARAMETER(cmd); + + /* Parse command-line options */ + miniopt_init(&opts, "download", "", TRUE); + argv++; + + while ((opt_err = miniopt(&opts, argv)) != -1) { + if (opt_err == 1) { + fprintf(stderr, "download options error\n"); + ret = -1; + goto exit; + } + argv += opts.consumed; + + if (opts.positional) { + if (fname) { + fprintf(stderr, "extra positional arg, %s\n", + opts.valstr); + ret = -1; + goto exit; + } + if (!fname) + fname = opts.valstr; + } else { + fprintf(stderr, "unrecognized option %c\n", opts.opt); + ret = -1; + goto exit; + } + } + + fd = dhd_set(dhd, DHD_DLDN_ST, NULL, 0); + if (fd < 0) { + ret = -1; + goto exit; + } + + /* validate arguments */ + if (!fname) { + fprintf(stderr, "filename required\n"); + ret = -1; + goto exit; + } + + /* validate file size compared to memory size */ + if ((fsize = file_size(fname)) < 0) { + ret = -1; + goto exit; + } + + memsize = 393216; + + if (memsize && ((uint32)fsize > memsize)) { + fprintf(stderr, "%s: file %s too large (%d > %d)\n", + __FUNCTION__, fname, fsize, memsize); + ret = -1; + goto exit; + } + + /* read the file and push blocks down to memory */ + if ((fp = fopen(fname, "rb")) == NULL) { + fprintf(stderr, "%s: unable to open %s: %s\n", + __FUNCTION__, fname, strerror(errno)); + ret = -1; + goto exit; + } + + while ((len = fread(memblock, sizeof(uint8), MEMBLOCK, fp))) { + if (len < MEMBLOCK && !feof(fp)) { + fprintf(stderr, "%s: error reading file %s\n", __FUNCTION__, fname); + ret = -1; + goto exit; + } + + ret = dhd_set(dhd, DHD_DLDN_WRITE, memblock, len); + if (ret) { + fprintf(stderr, "%s: error %d on writing %d membytes at 0x%08x\n", + __FUNCTION__, ret, len, start); + goto exit; + } + + start += len; + } + + if (!feof(fp)) { + fprintf(stderr, "%s: error reading file %s\n", __FUNCTION__, fname); + ret = -1; + goto exit; + } + fclose(fp); + fp = NULL; + +exit: + if (fp) + fclose(fp); + + if (fd) + dhd_set(dhd, DHD_DLDN_END, NULL, 0); + + return ret; +#endif /* BWL_FILESYSTEM_SUPPORT */ +} + +static int +dhd_upload(void *dhd, cmd_t *cmd, char **argv) +{ +#if !defined(BWL_FILESYSTEM_SUPPORT) + return (-1); +#else + char *fname = NULL; + uint32 start = 0; + uint32 size = 0; + int ret = 0; + + FILE *fp; + uint32 memsize; + char *memszargs[] = { "memsize", NULL }; + + uint len; + + miniopt_t opts; + int opt_err; + + UNUSED_PARAMETER(cmd); + UNUSED_PARAMETER(argv); + + /* Parse command-line options */ + miniopt_init(&opts, "upload", "", TRUE); + + argv++; + while ((opt_err = miniopt(&opts, argv)) != -1) { + if (opt_err == 1) { + fprintf(stderr, "upload options error\n"); + ret = -1; + goto exit; + } + argv += opts.consumed; + + if (opts.opt == 'a') { + if (!opts.good_int) { + fprintf(stderr, "invalid address %s\n", opts.valstr); + ret = -1; + goto exit; + } + start = (uint32)opts.uval; + } else if (opts.positional) { + if (!fname) { + fname = opts.valstr; + } else if (opts.good_int) { + size = (uint32)opts.uval; + } else { + fprintf(stderr, "upload options error\n"); + ret = -1; + goto exit; + } + } else if (!opts.opt) { + fprintf(stderr, "unrecognized option %s\n", opts.valstr); + ret = -1; + goto exit; + } else { + fprintf(stderr, "unrecognized option %c\n", opts.opt); + ret = -1; + goto exit; + } + } + + /* validate arguments */ + if (!fname) { + fprintf(stderr, "filename required\n"); + ret = -1; + goto exit; + } + + if ((ret = dhd_var_get(dhd, NULL, memszargs))) { + fprintf(stderr, "%s: error obtaining memsize\n", __FUNCTION__); + goto exit; + } + memsize = *(uint32*)buf; + + if (!memsize) + memsize = start + size; + + if (start + size > memsize) { + fprintf(stderr, "%s: %d bytes at 0x%x exceeds ramsize 0x%x\n", + __FUNCTION__, size, start, memsize); + ret = -1; + goto exit; + } + + if ((fp = fopen(fname, "wb")) == NULL) { + fprintf(stderr, "%s: Could not open %s: %s\n", + __FUNCTION__, fname, strerror(errno)); + ret = -1; + goto exit; + } + + /* default size to full RAM */ + if (!size) + size = memsize - start; + + /* read memory and write to file */ + while (size) { + char *ptr; + int params[2]; + + len = MIN(MEMBLOCK, size); + + params[0] = start; + params[1] = len; + ret = dhd_var_getbuf(dhd, "membytes", params, 2 * sizeof(int), (void**)&ptr); + if (ret) { + fprintf(stderr, "%s: failed reading %d membytes from 0x%08x\n", + __FUNCTION__, len, start); + break; + } + + if (fwrite(ptr, sizeof(char), len, fp) != len) { + fprintf(stderr, "%s: error writing to file %s\n", __FUNCTION__, fname); + ret = -1; + break; + } + + start += len; + size -= len; + } + + fclose(fp); +exit: + return ret; +#endif /* BWL_FILESYSTEM_SUPPORT */ +} + +static int +dhd_coredump(void *dhd, cmd_t *cmd, char **argv) +{ +#if !defined(BWL_FILESYSTEM_SUPPORT) + return (-1); +#else + char *fname = NULL; + int ret = 0; + + FILE *fp; + + uint32 dumpInfoAddr; + hndrte_debug_t debugInfo; + + miniopt_t opts; + int opt_err; + + int params[2]; + char *ptr; + uint32 *iptr; + + unsigned int start; + unsigned int size; + + prstatus_t prstatus; + + UNUSED_PARAMETER(cmd); + UNUSED_PARAMETER(argv); + + /* Parse command-line options */ + miniopt_init(&opts, "dump", "", TRUE); + + argv++; + while ((opt_err = miniopt(&opts, argv)) != -1) { + if (opt_err == 1) { + fprintf(stderr, "dump options error\n"); + ret = -1; + goto exit; + } + argv += opts.consumed; + + if (opts.positional) { + if (!fname) { + fname = opts.valstr; + } else { + fprintf(stderr, "dump options error\n"); + ret = -1; + goto exit; + } + } else if (!opts.opt) { + fprintf(stderr, "unrecognized option %s\n", opts.valstr); + ret = -1; + goto exit; + } else { + fprintf(stderr, "unrecognized option %c\n", opts.opt); + ret = -1; + goto exit; + } + } + + /* validate arguments */ + if (!fname) { + fprintf(stderr, "filename required\n"); + ret = -1; + goto exit; + } + + params[0] = DUMP_INFO_PTR_PTR; + params[1] = 8; + ret = dhd_var_getbuf(dhd, "membytes", params, 2 * sizeof(int), (void**)&iptr); + if (ret) { + fprintf(stderr, "%s: failed reading %d membytes from 0x%08x\n", + __FUNCTION__, 8, DUMP_INFO_PTR_PTR); + ret = -1; + goto exit; + } + + if (*iptr != HNDRTE_DEBUG_PTR_PTR_MAGIC) { /* Sanity check */ + fprintf(stderr, "Error: cannot find dumpinfo area\n"); + ret = -1; + goto exit; + } + + dumpInfoAddr = *(iptr + 1); + if (dumpInfoAddr == 0) { + fprintf(stderr, "Error: Dump info pointer is zero\n"); + ret = -1; + goto exit; + } + + /* Read the area the debuginfoptr points at */ + params[0] = dumpInfoAddr; + params[1] = sizeof(hndrte_debug_t); + ret = dhd_var_getbuf(dhd, "membytes", params, 2 * sizeof(int), (void**)&ptr); + if (ret) { + fprintf(stderr, "%s: failed reading %lu membytes from 0x%08lx\n", + __FUNCTION__, (long unsigned) sizeof(hndrte_debug_t), + (long unsigned) dumpInfoAddr); + ret = -1; + goto exit; + } + + memcpy((char *) &debugInfo, ptr, sizeof(hndrte_debug_t)); + /* Sanity check the area */ + if ((debugInfo.magic != HNDRTE_DEBUG_MAGIC) || + (debugInfo.version != HNDRTE_DEBUG_VERSION)) { + fprintf(stderr, "Error: Invalid debug info area\n"); + ret = -1; + goto exit; + } + + + /* Get the base and size to dump */ + start = debugInfo.ram_base; + size = debugInfo.ram_size; + + /* Get the arm trap area */ + bzero(&prstatus, sizeof(prstatus_t)); + if (debugInfo.trap_ptr != 0) { + int i; + trap_t armtrap; + uint32 *reg; + + params[0] = debugInfo.trap_ptr; + params[1] = sizeof(trap_t); + ret = dhd_var_getbuf(dhd, "membytes", params, 2 * sizeof(int), (void**)&ptr); + if (ret) { + fprintf(stderr, "%s: failed reading %lu membytes from 0x%08lx\n", + __FUNCTION__, (long unsigned) sizeof(hndrte_debug_t), + (long unsigned) dumpInfoAddr); + ret = -1; + goto exit; + } + + memcpy((char *) &armtrap, ptr, sizeof(trap_t)); + + /* Populate the prstatus */ + prstatus.si_signo = armtrap.type; + reg = &armtrap.r0; + for (i = 0; i < 15; i++, reg++) { + prstatus.uregs[i] = *reg; + } + prstatus.uregs[15] = armtrap.epc; + } + + if ((fp = fopen(fname, "wb")) == NULL) { + fprintf(stderr, "%s: Could not open %s: %s\n", + __FUNCTION__, fname, strerror(errno)); + ret = -1; + goto exit; + } + + /* Write the preamble and debug header */ + fprintf(fp, "Dump starts for version %s FWID 01-%x\n", debugInfo.epivers, debugInfo.fwid); + fprintf(fp, "XXXXXXXXXXXXXXXXXXXX"); + fprintf(fp, "%8.8lX", (long unsigned) sizeof(debugInfo)); + if (fwrite(&debugInfo, sizeof(unsigned char), sizeof(debugInfo), fp) != sizeof(debugInfo)) { + fprintf(stderr, "%s: error writing to file %s\n", __FUNCTION__, fname); + ret = -1; + goto exit; + } + + /* Write the prstatus */ + if (fwrite(&prstatus, sizeof(unsigned char), sizeof(prstatus), fp) != sizeof(prstatus)) { + fprintf(stderr, "%s: error writing to file %s\n", __FUNCTION__, fname); + ret = -1; + goto exit; + } + + /* Write the ram size as another sanity check */ + fprintf(fp, "%8.8X", size); + + /* read memory and write to file */ + while (size) { + int len; + len = MIN(MEMBLOCK, size); + + params[0] = start; + params[1] = len; + ret = dhd_var_getbuf(dhd, "membytes", params, 2 * sizeof(int), (void**)&ptr); + if (ret) { + fprintf(stderr, "%s: failed reading %d membytes from 0x%08x\n", + __FUNCTION__, len, start); + break; + } + + if (fwrite(ptr, sizeof(*ptr), len, fp) != (uint) len) { + fprintf(stderr, "%s: error writing to file %s\n", __FUNCTION__, fname); + ret = -1; + break; + } + + start += len; + size -= len; + } + + fclose(fp); +exit: + return ret; +#endif /* BWL_FILESYSTEM_SUPPORT */ +} + +static int +dhd_logstamp(void *dhd, cmd_t *cmd, char **argv) +{ + int ret; + char *endptr = NULL; + uint argc; + int valn[2] = {0, 0}; + + /* arg count */ + for (argc = 0; argv[argc]; argc++); + argc--; argv++; + + if (argc > 2) + return USAGE_ERROR; + + if (argc) { + valn[0] = strtol(argv[0], &endptr, 0); + if (*endptr != '\0') { + printf("bad val1: %s\n", argv[0]); + return USAGE_ERROR; + } + } + + if (argc > 1) { + valn[1] = strtol(argv[1], &endptr, 0); + if (*endptr != '\0') { + printf("bad val2: %s\n", argv[1]); + return USAGE_ERROR; + } + } + + ret = dhd_var_setbuf(dhd, cmd->name, valn, argc * sizeof(int)); + + return (ret); +} + +static int +dhd_sd_reg(void *dhd, cmd_t *cmd, char **argv) +{ + int ret; + sdreg_t sdreg; + char *endptr = NULL; + uint argc; + void *ptr = NULL; + + bzero(&sdreg, sizeof(sdreg)); + + /* arg count */ + for (argc = 0; argv[argc]; argc++); + argc--; + + /* hostreg: offset [value]; devreg: func offset [value] */ + if (!strcmp(cmd->name, "sd_hostreg")) { + argv++; + if (argc < 1) { + printf("required args: offset [value]\n"); + return USAGE_ERROR; + } + + } else if (!strcmp(cmd->name, "sd_devreg")) { + argv++; + if (argc < 2) { + printf("required args: func offset [value]\n"); + return USAGE_ERROR; + } + + sdreg.func = strtoul(*argv++, &endptr, 0); + if (*endptr != '\0') { + printf("Invalid function number\n"); + return USAGE_ERROR; + } + } else { + return USAGE_ERROR; + } + + sdreg.offset = strtoul(*argv++, &endptr, 0); + if (*endptr != '\0') { + printf("Invalid offset value\n"); + return USAGE_ERROR; + } + + /* third arg: value */ + if (*argv) { + sdreg.value = strtoul(*argv, &endptr, 0); + if (*endptr != '\0') { + printf("Invalid value\n"); + return USAGE_ERROR; + } + } + + /* no third arg means get, otherwise set */ + if (!*argv) { + if ((ret = dhd_var_getbuf(dhd, cmd->name, &sdreg, sizeof(sdreg), &ptr)) >= 0) + printf("0x%x\n", *(int *)ptr); + } else { + ret = dhd_var_setbuf(dhd, cmd->name, &sdreg, sizeof(sdreg)); + } + + return (ret); +} + +static dbg_msg_t dhd_msgs[] = { + {DHD_ERROR_VAL, "error"}, + {DHD_ERROR_VAL, "err"}, + {DHD_TRACE_VAL, "trace"}, + {DHD_INFO_VAL, "inform"}, + {DHD_INFO_VAL, "info"}, + {DHD_INFO_VAL, "inf"}, + {DHD_DATA_VAL, "data"}, + {DHD_CTL_VAL, "ctl"}, + {DHD_TIMER_VAL, "timer"}, + {DHD_HDRS_VAL, "hdrs"}, + {DHD_BYTES_VAL, "bytes"}, + {DHD_INTR_VAL, "intr"}, + {DHD_LOG_VAL, "log"}, + {DHD_GLOM_VAL, "glom"}, + {DHD_EVENT_VAL, "event"}, + {DHD_BTA_VAL, "bta"}, + {0, NULL} +}; + +static int +dhd_msglevel(void *dhd, cmd_t *cmd, char **argv) +{ + return dhd_do_msglevel(dhd, cmd, argv, dhd_msgs); +} + +static int +dhd_do_msglevel(void *dhd, cmd_t *cmd, char **argv, dbg_msg_t *dbg_msg) +{ + int ret, i; + uint val, last_val = 0, msglevel = 0, msglevel_add = 0, msglevel_del = 0; + char *endptr = NULL; + + if ((ret = dhd_iovar_getint(dhd, cmd->name, (int*)&msglevel)) < 0) + return (ret); + + if (!*++argv) { + printf("0x%x ", msglevel); + for (i = 0; (val = dbg_msg[i].value); i++) { + if ((msglevel & val) && (val != last_val)) + printf(" %s", dbg_msg[i].string); + last_val = val; + } + printf("\n"); + return (0); + } + + while (*argv) { + char *s = *argv; + if (*s == '+' || *s == '-') + s++; + else + msglevel_del = ~0; /* make the whole list absolute */ + val = strtoul(s, &endptr, 0); + /* not a plain integer if not all the string was parsed by strtoul */ + if (*endptr != '\0') { + for (i = 0; (val = dbg_msg[i].value); i++) + if (stricmp(dbg_msg[i].string, s) == 0) + break; + if (!val) + goto usage; + } + if (**argv == '-') + msglevel_del |= val; + else + msglevel_add |= val; + ++argv; + } + + msglevel &= ~msglevel_del; + msglevel |= msglevel_add; + + return (dhd_iovar_setint(dhd, cmd->name, msglevel)); + +usage: + fprintf(stderr, "msg values may be a list of numbers or names from the following set.\n"); + fprintf(stderr, "Use a + or - prefix to make an incremental change."); + + for (i = 0; (val = dbg_msg[i].value); i++) { + if (val != last_val) + fprintf(stderr, "\n0x%04x %s", val, dbg_msg[i].string); + else + fprintf(stderr, ", %s", dbg_msg[i].string); + last_val = val; + } + fprintf(stderr, "\n"); + + return 0; +} + +static char * +ver2str(unsigned int vms, unsigned int vls) +{ + static char verstr[100]; + unsigned int maj, year, month, day, build; + + maj = (vms >> 16) & 0xFFFF; + if (maj > 1000) { + /* it is probably a date... */ + year = (vms >> 16) & 0xFFFF; + month = vms & 0xFFFF; + day = (vls >> 16) & 0xFFFF; + build = vls & 0xFFFF; + sprintf(verstr, "%d/%d/%d build %d", + month, day, year, build); + } else { + /* it is a tagged release. */ + sprintf(verstr, "%d.%d RC%d.%d", + (vms>>16)&0xFFFF, vms&0xFFFF, + (vls>>16)&0xFFFF, vls&0xFFFF); + } + return verstr; +} + +static int +dhd_version(void *dhd, cmd_t *cmd, char **argv) +{ + int ret; + char *ptr; + + UNUSED_PARAMETER(cmd); + UNUSED_PARAMETER(argv); + + /* Display the application version info */ + printf("%s: %s\n", dhdu_av0, + ver2str((EPI_MAJOR_VERSION << 16)| EPI_MINOR_VERSION, + (EPI_RC_NUMBER << 16) | EPI_INCREMENTAL_NUMBER)); + + if ((ret = dhd_var_getbuf(dhd, cmd->name, NULL, 0, (void**)&ptr)) < 0) + return ret; + + /* Display the returned string */ + printf("%s\n", ptr); + + return 0; +} + +static int +dhd_var_setint(void *dhd, cmd_t *cmd, char **argv) +{ + int32 val; + int len; + char *varname; + char *endptr = NULL; + char *p; + + if (cmd->set == -1) { + printf("set not defined for %s\n", cmd->name); + return COMMAND_ERROR; + } + + if (!*argv) { + printf("set: missing arguments\n"); + return USAGE_ERROR; + } + + varname = *argv++; + + if (!*argv) { + printf("set: missing value argument for set of \"%s\"\n", varname); + return USAGE_ERROR; + } + + val = strtol(*argv, &endptr, 0); + if (*endptr != '\0') { + /* not all the value string was parsed by strtol */ + printf("set: error parsing value \"%s\" as an integer for set of \"%s\"\n", + *argv, varname); + return USAGE_ERROR; + } + + strcpy(buf, varname); + p = buf; + while (*p != '\0') { + *p = tolower(*p); + p++; + } + + /* skip the NUL */ + p++; + + memcpy(p, &val, sizeof(uint)); + len = (p - buf) + sizeof(uint); + + return (dhd_set(dhd, DHD_SET_VAR, &buf[0], len)); +} + +static int +dhd_var_get(void *dhd, cmd_t *cmd, char **argv) +{ + char *varname; + char *p; + + UNUSED_PARAMETER(cmd); + + if (!*argv) { + printf("get: missing arguments\n"); + return USAGE_ERROR; + } + + varname = *argv++; + + if (*argv) { + printf("get: error, extra arg \"%s\"\n", *argv); + return USAGE_ERROR; + } + + strcpy(buf, varname); + p = buf; + while (*p != '\0') { + *p = tolower(*p); + p++; + } + return (dhd_get(dhd, DHD_GET_VAR, &buf[0], DHD_IOCTL_MAXLEN)); +} + +static int +dhd_var_getint(void *dhd, cmd_t *cmd, char **argv) +{ + int err; + int32 val; + if (cmd->get == -1) { + printf("get not defined for %s\n", cmd->name); + return COMMAND_ERROR; + } + + if ((err = dhd_var_get(dhd, cmd, argv))) + return (err); + + val = *(int32*)buf; + + if (val < 10) + printf("%d\n", val); + else + printf("%d (0x%x)\n", val, val); + + return (0); +} + +static int +dhd_var_ampak_otpmac(void *dhd, cmd_t *cmd, char **argv) +{ + int err, i, j; + char *pmacstr[] = {"sd_cis", NULL}; + char tpl[] = "80 07 19 "; + char mac[2][8] = {{"98 3b 16"}, {"00 22 f4"}}; + char *pch; + + if ((err = dhd_var_get(dhd, cmd, pmacstr))) + return (err); + + pch = strstr(buf, tpl); + if (!pch) { + printf("Empty\n"); + return -1; + } + pch += strlen(tpl); + + for (j=0; j<2; j++) { + if (!strncmp(pch, &mac[j][0], 8)) { + return 0; + } + } + for (i=0; i<18; i++) { + if (i%3 == 2) + continue; + printf("%c", pch[i]); + } + printf("\n"); + return -1; +} + +static int +dhd_var_getandprintstr(void *dhd, cmd_t *cmd, char **argv) +{ + int err; + + if ((err = dhd_var_get(dhd, cmd, argv))) + return (err); + + printf("%s\n", buf); + return (0); +} + + +void +dhd_printlasterror(void *dhd) +{ + char *cmd[2] = {"bcmerrorstr"}; + + if (dhd_var_get(dhd, NULL, cmd) != 0) { + fprintf(stderr, "%s: \nError getting the last error\n", dhdu_av0); + } else { + fprintf(stderr, "%s: %s\n", dhdu_av0, buf); + } +} + +static int +dhd_varint(void *dhd, cmd_t *cmd, char *argv[]) +{ + if (argv[1]) + return (dhd_var_setint(dhd, cmd, argv)); + else + return (dhd_var_getint(dhd, cmd, argv)); +} + +static int +dhd_var_getbuf(void *dhd, char *iovar, void *param, int param_len, void **bufptr) +{ + int len; + + memset(buf, 0, DHD_IOCTL_MAXLEN); + strcpy(buf, iovar); + + /* include the NUL */ + len = strlen(iovar) + 1; + + if (param_len) + memcpy(&buf[len], param, param_len); + + *bufptr = buf; + + return dhd_get(dhd, DHD_GET_VAR, &buf[0], DHD_IOCTL_MAXLEN); +} + +static int +dhd_var_setbuf(void *dhd, char *iovar, void *param, int param_len) +{ + int len; + + memset(buf, 0, DHD_IOCTL_MAXLEN); + strcpy(buf, iovar); + + /* include the NUL */ + len = strlen(iovar) + 1; + + if (param_len) + memcpy(&buf[len], param, param_len); + + len += param_len; + + return dhd_set(dhd, DHD_SET_VAR, &buf[0], len); +} + +static int +dhd_var_void(void *dhd, cmd_t *cmd, char **argv) +{ + UNUSED_PARAMETER(argv); + + if (cmd->set < 0) + return USAGE_ERROR; + + return dhd_var_setbuf(dhd, cmd->name, NULL, 0); +} + +/* + * format an iovar buffer + */ +static uint +dhd_iovar_mkbuf(char *name, char *data, uint datalen, char *buf, uint buflen, int *perr) +{ + uint len; + + len = strlen(name) + 1; + + /* check for overflow */ + if ((len + datalen) > buflen) { + *perr = BCME_BUFTOOSHORT; + return 0; + } + + strcpy(buf, name); + + /* append data onto the end of the name string */ + if (datalen > 0) + memcpy(&buf[len], data, datalen); + + len += datalen; + + *perr = 0; + return len; +} + +static int +dhd_iovar_getint(void *dhd, char *name, int *var) +{ + char ibuf[DHD_IOCTL_SMLEN]; + int error; + + dhd_iovar_mkbuf(name, NULL, 0, ibuf, sizeof(ibuf), &error); + if (error) + return error; + + if ((error = dhd_get(dhd, DHD_GET_VAR, &ibuf, sizeof(ibuf))) < 0) + return error; + + memcpy(var, ibuf, sizeof(int)); + + return 0; +} + +static int +dhd_iovar_setint(void *dhd, char *name, int var) +{ + int len; + char ibuf[DHD_IOCTL_SMLEN]; + int error; + + len = dhd_iovar_mkbuf(name, (char *)&var, sizeof(var), ibuf, sizeof(ibuf), &error); + if (error) + return error; + + if ((error = dhd_set(dhd, DHD_SET_VAR, &ibuf, len)) < 0) + return error; + + return 0; +} + +static int +dhd_varstr(void *dhd, cmd_t *cmd, char **argv) +{ + int error; + char *str; + + if (!*++argv) { + void *ptr; + + if ((error = dhd_var_getbuf(dhd, cmd->name, NULL, 0, &ptr)) < 0) + return (error); + + str = (char *)ptr; + printf("%s\n", str); + return (0); + } else { + str = *argv; + /* iovar buffer length includes NUL */ + return dhd_var_setbuf(dhd, cmd->name, str, strlen(str) + 1); + } +} + +#ifdef BCMSPI +static int +dhd_spierrstats(void *dhd, cmd_t *cmd, char **argv) +{ + int ret, i; + struct spierrstats_t spierrstats, *p; + uint argc; + void *ptr = NULL; + + bzero(&spierrstats, sizeof(spierrstats)); + + /* arg count */ + for (argc = 0; argv[argc]; argc++); + argc--; + + if (strcmp(cmd->name, "spi_errstats")) { + printf("Supported only for SPI. Required cmd name missing\n"); + return COMMAND_ERROR; + } + + /* Check 3rd argument */ + argv++; + + /* no third arg means get, otherwise set */ + if (!*argv) { + if ((ret = dhd_var_getbuf(dhd, cmd->name, NULL, 0, &ptr)) < 0) + return ret; + + p = (struct spierrstats_t *)ptr; + + printf("Last %d device-status-bits\n", NUM_PREV_TRANSACTIONS); + + for (i = 0; i < NUM_PREV_TRANSACTIONS; i++) + printf("dstatus[%d] = 0x%x, spicmd[%d] = 0x%x\n", i, p->dstatus[i], + i, p->spicmd[i]); + + printf("The requested data was not available = %d\n", + p->dna); + printf("FIFO underflow happened due to F2 rd command = %d\n", + p->rdunderflow); + printf("FIFO overflow happened due to F1/F2 wr command = %d\n", + p->wroverflow); + printf("F2 interrupt (OR of all F2 related intr status bits) = %d\n", + p->f2interrupt); + printf("F2 FIFO is not ready to receive data = %d\n", + p->f2rxnotready); + printf("Error in command or host data, detected by checksum = %d\n", + p->hostcmddataerr); + printf("Packet is available in F2 TX FIFO = %d\n", + p->f2pktavailable); + + } else { + ret = dhd_var_setbuf(dhd, cmd->name, &spierrstats, sizeof(spierrstats)); + } + + return (ret); +} +#endif /* BCMSPI */ + +#ifdef WLBTAMP + +#define MATCH_OP(op, opstr) (strlen(op) == strlen(opstr) && strncmp(op, opstr, strlen(op)) == 0) + +static int +wl_HCI_cmd(void *wl, cmd_t *cmd, char **argv) +{ + union { + char buf[HCI_CMD_PREAMBLE_SIZE + HCI_CMD_DATA_SIZE]; + uint32 alignme; + } cbuf; + amp_hci_cmd_t *cpkt = (amp_hci_cmd_t *)&cbuf.buf[0]; + + char *op; + uint8 plen; + + UNUSED_PARAMETER(cmd); + + if (!*++argv) + return USAGE_ERROR; + + /* recognize and encode operations */ + op = *argv++; + if (MATCH_OP(op, "Read_Link_Quality")) { + cpkt->opcode = HCI_Read_Link_Quality; + } else if (MATCH_OP(op, "Read_Local_AMP_Info")) { + cpkt->opcode = HCI_Read_Local_AMP_Info; + } else if (MATCH_OP(op, "Read_Local_AMP_ASSOC")) { + cpkt->opcode = HCI_Read_Local_AMP_ASSOC; + } else if (MATCH_OP(op, "Write_Remote_AMP_ASSOC")) { + cpkt->opcode = HCI_Write_Remote_AMP_ASSOC; + } else if (MATCH_OP(op, "Create_Physical_Link")) { + cpkt->opcode = HCI_Create_Physical_Link; + } else if (MATCH_OP(op, "Accept_Physical_Link_Request")) { + cpkt->opcode = HCI_Accept_Physical_Link_Request; + } else if (MATCH_OP(op, "Disconnect_Physical_Link")) { + cpkt->opcode = HCI_Disconnect_Physical_Link; + } else if (MATCH_OP(op, "Create_Logical_Link")) { + cpkt->opcode = HCI_Create_Logical_Link; + } else if (MATCH_OP(op, "Accept_Logical_Link")) { + cpkt->opcode = HCI_Accept_Logical_Link; + } else if (MATCH_OP(op, "Disconnect_Logical_Link")) { + cpkt->opcode = HCI_Disconnect_Logical_Link; + } else if (MATCH_OP(op, "Logical_Link_Cancel")) { + cpkt->opcode = HCI_Logical_Link_Cancel; + } else if (MATCH_OP(op, "Short_Range_Mode")) { + cpkt->opcode = HCI_Short_Range_Mode; + } else if (MATCH_OP(op, "Read_Connection_Accept_Timeout")) { + cpkt->opcode = HCI_Read_Connection_Accept_Timeout; + } else if (MATCH_OP(op, "Write_Connection_Accept_Timeout")) { + cpkt->opcode = HCI_Write_Connection_Accept_Timeout; + } else if (MATCH_OP(op, "Read_Link_Supervision_Timeout")) { + cpkt->opcode = HCI_Read_Link_Supervision_Timeout; + } else if (MATCH_OP(op, "Write_Link_Supervision_Timeout")) { + cpkt->opcode = HCI_Write_Link_Supervision_Timeout; + } else if (MATCH_OP(op, "Reset")) { + cpkt->opcode = HCI_Reset; + } else if (MATCH_OP(op, "Enhanced_Flush")) { + cpkt->opcode = HCI_Enhanced_Flush; + } else if (MATCH_OP(op, "Read_Best_Effort_Flush_Timeout")) { + cpkt->opcode = HCI_Read_Best_Effort_Flush_Timeout; + } else if (MATCH_OP(op, "Write_Best_Effort_Flush_Timeout")) { + cpkt->opcode = HCI_Write_Best_Effort_Flush_Timeout; + } else if (MATCH_OP(op, "Read_Logical_Link_Accept_Timeout")) { + cpkt->opcode = HCI_Read_Logical_Link_Accept_Timeout; + } else if (MATCH_OP(op, "Write_Logical_Link_Accept_Timeout")) { + cpkt->opcode = HCI_Write_Logical_Link_Accept_Timeout; + } else if (MATCH_OP(op, "Read_Buffer_Size")) { + cpkt->opcode = HCI_Read_Buffer_Size; + } else if (MATCH_OP(op, "Read_Data_Block_Size")) { + cpkt->opcode = HCI_Read_Data_Block_Size; + } else if (MATCH_OP(op, "Set_Event_Mask_Page_2")) { + cpkt->opcode = HCI_Set_Event_Mask_Page_2; + } else { + printf("unsupported HCI command: %s\n", op); + return (-1); + } + + plen = 0; + while (*argv && (plen < HCI_CMD_DATA_SIZE)) { + cpkt->parms[plen++] = (uint8)strtol(*argv++, NULL, 0); + } + cpkt->plen = plen; + + return dhd_var_setbuf(wl, cmd->name, cpkt, HCI_CMD_PREAMBLE_SIZE + plen); +} + +typedef union { + uint8 buf[HCI_ACL_DATA_PREAMBLE_SIZE + 2048]; + uint32 alignme; +} g_hci_dbuf_t; + +static int +wl_HCI_ACL_data(void *wl, cmd_t *cmd, char **argv) +{ + /* Align struct. Also declare static so that large array isn't allocated + * from the stack. + */ + static g_hci_dbuf_t g_hci_dbuf; + + amp_hci_ACL_data_t *dpkt = (amp_hci_ACL_data_t *)&g_hci_dbuf.buf[0]; + uint16 dlen; + + if (!*++argv) + return USAGE_ERROR; + + /* get logical link handle */ + dpkt->handle = (HCI_ACL_DATA_BC_FLAGS | HCI_ACL_DATA_PB_FLAGS); + dpkt->handle |= (uint16)strtol(*argv++, NULL, 0); + + /* get data */ + dlen = 0; + while (*argv && (dlen < 2048)) { + dpkt->data[dlen++] = (uint8)strtol(*argv++, NULL, 0); + } + dpkt->dlen = dlen; + + return dhd_var_setbuf(wl, cmd->name, dpkt, HCI_ACL_DATA_PREAMBLE_SIZE + dlen); +} +#endif /* WLBTAMP */ + +/* These two utility functions are used by dhdu_linux.c + * The code is taken from wlu.c. + */ +int +dhd_atoip(const char *a, struct ipv4_addr *n) +{ + char *c; + int i = 0; + + for (;;) { + n->addr[i++] = (uint8)strtoul(a, &c, 0); + if (*c++ != '.' || i == IPV4_ADDR_LEN) + break; + a = c; + } + return (i == IPV4_ADDR_LEN); +} + +int +dhd_ether_atoe(const char *a, struct ether_addr *n) +{ + char *c; + int i = 0; + + memset(n, 0, ETHER_ADDR_LEN); + for (;;) { + n->octet[i++] = (uint8)strtoul(a, &c, 16); + if (!*c++ || i == ETHER_ADDR_LEN) + break; + a = c; + } + return (i == ETHER_ADDR_LEN); +} diff --git a/external/cache/sources/wl/dhd/dhdu.h b/external/cache/sources/wl/dhd/dhdu.h new file mode 100644 index 0000000..4a04be0 --- /dev/null +++ b/external/cache/sources/wl/dhd/dhdu.h @@ -0,0 +1,51 @@ +/* + * Definitions for DHD command-line utility + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: dhdu.h 294362 2011-11-06 22:26:56Z $ + */ + +#ifndef _dhdu_h_ +#define _dhdu_h_ + +#include "dhdu_cmd.h" + +extern char *dhdu_av0; + +/* parse common option */ +extern int dhd_option(char ***pargv, char **pifname, int *phelp); +extern void dhd_cmd_init(void); + +/* print usage */ +extern void dhd_cmd_usage(cmd_t *cmd); +extern void dhd_usage(cmd_t *port_cmds); +extern void dhd_cmds_usage(cmd_t *port_cmds); + +/* print helpers */ +extern void dhd_printlasterror(void *dhd); +extern void dhd_printint(int val); + +/* check driver version */ +extern int dhd_check(void *dhd); + +/* utility functions */ +struct ipv4_addr; +int dhd_ether_atoe(const char *a, struct ether_addr *n); +int dhd_atoip(const char *a, struct ipv4_addr *n); + +#define USAGE_ERROR -1 /* Error code for Usage */ +#define IOCTL_ERROR -2 /* Error code for ioctl failure */ +#define COMMAND_ERROR -3 /* Error code for general command failure */ + +/* integer output format */ +#define INT_FMT_DEC 0 /* signed integer */ +#define INT_FMT_UINT 1 /* unsigned integer */ +#define INT_FMT_HEX 2 /* hexdecimal */ + +/* command line argument usage */ +#define CMD_ERR -1 /* Error for command */ +#define CMD_OPT 0 /* a command line option */ +#define CMD_DHD 1 /* the start of a dhd command */ + +#endif /* _dhdu_h_ */ diff --git a/external/cache/sources/wl/dhd/dhdu_cmd.h b/external/cache/sources/wl/dhd/dhdu_cmd.h new file mode 100644 index 0000000..e7f9a3e --- /dev/null +++ b/external/cache/sources/wl/dhd/dhdu_cmd.h @@ -0,0 +1,37 @@ +/* + * Command structure for dhd command line utility, copied from wl utility + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: dhdu_cmd.h 241182 2011-02-17 21:50:03Z $ + */ + +#ifndef _dhdu_cmd_h_ +#define _dhdu_cmd_h_ + +typedef struct cmd cmd_t; +typedef int (cmd_func_t)(void *dhd, cmd_t *cmd, char **argv); + +/* generic command line argument handler */ +struct cmd { + char *name; + cmd_func_t *func; + int get; + int set; + char *help; +}; + +/* list of command line arguments */ +extern cmd_t dhd_cmds[]; +extern cmd_t dhd_varcmd; + +/* Special set cmds to do download via dev node interface if present */ +#define DHD_DLDN_ST 0x400 +#define DHD_DLDN_WRITE (DHD_DLDN_ST + 1) +#define DHD_DLDN_END (DHD_DLDN_ST + 2) + +/* per-port ioctl handlers */ +extern int dhd_get(void *dhd, int cmd, void *buf, int len); +extern int dhd_set(void *dhd, int cmd, void *buf, int len); + +#endif /* _dhdu_cmd_h_ */ diff --git a/external/cache/sources/wl/dhd/dhdu_common.h b/external/cache/sources/wl/dhd/dhdu_common.h new file mode 100644 index 0000000..e0463fb --- /dev/null +++ b/external/cache/sources/wl/dhd/dhdu_common.h @@ -0,0 +1,40 @@ +/* + * Linux port of dhd command line utility, hacked from wl utility. + * + * Copyright (C) 2013, Broadcom Corporation + * All Rights Reserved. + * + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation; + * the contents of this file may not be disclosed to third parties, copied + * or duplicated in any form, in whole or in part, without the prior + * written permission of Broadcom Corporation. + * + * $Id: dhdu_common.h 281524 2011-09-02 17:09:25Z $ + */ + +/* Common header file for dhdu_linux.c and dhdu_ndis.c */ + +#ifndef _dhdu_common_h +#define _dhdu_common_h + +/* DHD utility function declarations */ +extern int dhd_check(void *dhd); +extern int dhd_atoip(const char *a, struct ipv4_addr *n); +extern int dhd_option(char ***pargv, char **pifname, int *phelp); +void dhd_usage(cmd_t *port_cmds); + +/* Remote DHD declarations */ +int remote_type = NO_REMOTE; +extern char *g_rwl_buf_mac; +extern char* g_rwl_device_name_serial; +unsigned short g_rwl_servport; +char *g_rwl_servIP = NULL; +unsigned short defined_debug = DEBUG_ERR | DEBUG_INFO; + + +static int process_args(struct ifreq* ifr, char **argv); + +#define dtoh32(i) i +#define dtoh16(i) i + +#endif /* _dhdu_common_h_ */ diff --git a/external/cache/sources/wl/dhd/dhdu_linux.c b/external/cache/sources/wl/dhd/dhdu_linux.c new file mode 100644 index 0000000..9b6dace --- /dev/null +++ b/external/cache/sources/wl/dhd/dhdu_linux.c @@ -0,0 +1,619 @@ +/* + * Linux port of dhd command line utility, hacked from wl utility. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: dhdu_linux.c 281524 2011-09-02 17:09:25Z $ + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef TARGETENV_android +#include +typedef u_int64_t u64; +typedef u_int32_t u32; +typedef u_int16_t u16; +typedef u_int8_t u8; +#endif /* TARGETENV_android */ +#include +#include +#include + +#include +#include +#include +#include +#include +#include +#include "dhdu.h" +#include "wlu_remote.h" +#include "wlu_client_shared.h" +#include "wlu_pipe.h" +#include +#include +#include +#include "dhdu_common.h" + +char *av0; +static int rwl_os_type = LINUX_OS; +/* Search the dhd_cmds table for a matching command name. + * Return the matching command or NULL if no match found. + */ +static cmd_t * +dhd_find_cmd(char* name) +{ + cmd_t *cmd = NULL; + /* search the dhd_cmds for a matching name */ + for (cmd = dhd_cmds; cmd->name && strcmp(cmd->name, name); cmd++); + if (cmd->name == NULL) + cmd = NULL; + return cmd; +} + +static void +syserr(char *s) +{ + fprintf(stderr, "%s: ", dhdu_av0); + perror(s); + exit(errno); +} + +/* This function is called by ioctl_setinformation_fe or ioctl_queryinformation_fe + * for executing remote commands or local commands + */ +static int +dhd_ioctl(void *dhd, int cmd, void *buf, int len, bool set) +{ + struct ifreq *ifr = (struct ifreq *)dhd; + dhd_ioctl_t ioc; + int ret = 0; + int s; + /* By default try to execute wl commands */ + int driver_magic = WLC_IOCTL_MAGIC; + int get_magic = WLC_GET_MAGIC; + + /* For local dhd commands execute dhd. For wifi transport we still + * execute wl commands. + */ + if (remote_type == NO_REMOTE && strncmp (buf, RWL_WIFI_ACTION_CMD, + strlen(RWL_WIFI_ACTION_CMD)) && strncmp(buf, RWL_WIFI_GET_ACTION_CMD, + strlen(RWL_WIFI_GET_ACTION_CMD))) { + driver_magic = DHD_IOCTL_MAGIC; + get_magic = DHD_GET_MAGIC; + } + + /* open socket to kernel */ + if ((s = socket(AF_INET, SOCK_DGRAM, 0)) < 0) + syserr("socket"); + + /* do it */ + ioc.cmd = cmd; + ioc.buf = buf; + ioc.len = len; + ioc.set = set; + ioc.driver = driver_magic; + ifr->ifr_data = (caddr_t) &ioc; + + if ((ret = ioctl(s, SIOCDEVPRIVATE, ifr)) < 0) { + if (cmd != get_magic) { + ret = IOCTL_ERROR; + } + } + + /* cleanup */ + close(s); + return ret; +} + +/* This function is called in wlu_pipe.c remote_wifi_ser_init() to execute + * the initial set of wl commands for wifi transport (e.g slow_timer, fast_timer etc) + */ +int wl_ioctl(void *wl, int cmd, void *buf, int len, bool set) +{ + return dhd_ioctl(wl, cmd, buf, len, set); /* Call actual wl_ioctl here: Shubhro */ +} + +/* Search if dhd adapter or wl adapter is present + * This is called by dhd_find to check if it supports wl or dhd + * The reason for checking wl adapter is that we can still send remote dhd commands over + * wifi transport. + */ +static int +dhd_get_dev_type(char *name, void *buf, char *type) +{ + int s; + int ret; + struct ifreq ifr; + struct ethtool_drvinfo info; + + /* open socket to kernel */ + if ((s = socket(AF_INET, SOCK_DGRAM, 0)) < 0) + syserr("socket"); + + /* get device type */ + memset(&info, 0, sizeof(info)); + info.cmd = ETHTOOL_GDRVINFO; + strcpy(info.driver, "?"); + strcat(info.driver, type); + ifr.ifr_data = (caddr_t)&info; + strncpy(ifr.ifr_name, name, IFNAMSIZ); + if ((ret = ioctl(s, SIOCETHTOOL, &ifr)) < 0) { + + /* print a good diagnostic if not superuser */ + if (errno == EPERM) + syserr("dhd_get_dev_type"); + + *(char *)buf = '\0'; + } + else + strcpy(buf, info.driver); + + close(s); + return ret; +} + +/* dhd_get/dhd_set is called by several functions in dhdu.c. This used to call dhd_ioctl + * directly. However now we need to execute the dhd commands remotely. + * So we make use of wl pipes to execute this. + * wl_get or wl_set functions also check if it is a local command hence they in turn + * call dhd_ioctl if required. Name wl_get/wl_set is retained because these functions are + * also called by wlu_pipe.c wlu_client_shared.c + */ +int +dhd_get(void *dhd, int cmd, void *buf, int len) +{ + return wl_get(dhd, cmd, buf, len); +} + +/* + * To use /dev/node interface: + * 1. mknod /dev/hnd0 c 248 0 + * 2. chmod 777 /dev/hnd0 + */ +#define NODE "/dev/hnd0" + +int +dhd_set(void *dhd, int cmd, void *buf, int len) +{ + static int dnode = -1; + + switch (cmd) { + case DHD_DLDN_ST: + if (dnode == -1) + dnode = open(NODE, O_RDWR); + else + fprintf(stderr, "devnode already opened!\n"); + + return dnode; + break; + case DHD_DLDN_WRITE: + if (dnode > 0) + return write(dnode, buf, len); + break; + case DHD_DLDN_END: + if (dnode > 0) + return close(dnode); + break; + default: + return wl_set(dhd, cmd, buf, len); + + } + + return -1; +} + +/* Verify the wl adapter found. + * This is called by dhd_find to check if it supports wl + * The reason for checking wl adapter is that we can still send remote dhd commands over + * wifi transport. The function is copied from wlu.c. + */ +int +wl_check(void *wl) +{ + int ret; + int val = 0; + + if (!dhd_check (wl)) + return 0; + + /* + * If dhd_check() fails then go for a regular wl driver verification + */ + if ((ret = wl_get(wl, WLC_GET_MAGIC, &val, sizeof(int))) < 0) + return ret; + if (val != WLC_IOCTL_MAGIC) + return BCME_ERROR; + if ((ret = wl_get(wl, WLC_GET_VERSION, &val, sizeof(int))) < 0) + return ret; + if (val > WLC_IOCTL_VERSION) { + fprintf(stderr, "Version mismatch, please upgrade\n"); + return BCME_ERROR; + } + return 0; +} +/* Search and verify the request type of adapter (wl or dhd) + * This is called by main before executing local dhd commands + * or sending remote dhd commands over wifi transport + */ +void +dhd_find(struct ifreq *ifr, char *type) +{ + char proc_net_dev[] = "/proc/net/dev"; + FILE *fp; + static char buf[400]; + char *c, *name; + char dev_type[32]; + + ifr->ifr_name[0] = '\0'; + /* eat first two lines */ + if (!(fp = fopen(proc_net_dev, "r")) || + !fgets(buf, sizeof(buf), fp) || + !fgets(buf, sizeof(buf), fp)) + return; + + while (fgets(buf, sizeof(buf), fp)) { + c = buf; + while (isspace(*c)) + c++; + if (!(name = strsep(&c, ":"))) + continue; + strncpy(ifr->ifr_name, name, IFNAMSIZ); + if (dhd_get_dev_type(name, dev_type, type) >= 0 && + !strncmp(dev_type, type, strlen(dev_type) - 1)) + { + if (!wl_check((void*)ifr)) + break; + } + ifr->ifr_name[0] = '\0'; + } + + fclose(fp); +} +/* This function is called by wl_get to execute either local dhd command + * or send a dhd command over wl transport + */ +static int +ioctl_queryinformation_fe(void *wl, int cmd, void* input_buf, int *input_len) +{ + if (remote_type == NO_REMOTE) { + return dhd_ioctl(wl, cmd, input_buf, *input_len, FALSE); + } else { + return rwl_queryinformation_fe(wl, cmd, input_buf, + (unsigned long*)input_len, 0, RDHD_GET_IOCTL); + } +} + +/* This function is called by wl_set to execute either local dhd command + * or send a dhd command over wl transport + */ +static int +ioctl_setinformation_fe(void *wl, int cmd, void* buf, int *len) +{ + if (remote_type == NO_REMOTE) { + return dhd_ioctl(wl, cmd, buf, *len, TRUE); + } else { + return rwl_setinformation_fe(wl, cmd, buf, (unsigned long*)len, 0, RDHD_SET_IOCTL); + + } +} + +/* The function is replica of wl_get in wlu_linux.c. Optimize when we have some + * common code between wlu_linux.c and dhdu_linux.c + */ +int +wl_get(void *wl, int cmd, void *buf, int len) +{ + int error = BCME_OK; + /* For RWL: When interfacing to a Windows client, need t add in OID_BASE */ + if ((rwl_os_type == WIN32_OS) && (remote_type != NO_REMOTE)) { + error = (int)ioctl_queryinformation_fe(wl, WL_OID_BASE + cmd, buf, &len); + } else { + error = (int)ioctl_queryinformation_fe(wl, cmd, buf, &len); + } + if (error == SERIAL_PORT_ERR) + return SERIAL_PORT_ERR; + + if (error != 0) + return IOCTL_ERROR; + + return error; +} + +/* The function is replica of wl_set in wlu_linux.c. Optimize when we have some + * common code between wlu_linux.c and dhdu_linux.c + */ +int +wl_set(void *wl, int cmd, void *buf, int len) +{ + int error = BCME_OK; + + /* For RWL: When interfacing to a Windows client, need t add in OID_BASE */ + if ((rwl_os_type == WIN32_OS) && (remote_type != NO_REMOTE)) { + error = (int)ioctl_setinformation_fe(wl, WL_OID_BASE + cmd, buf, &len); + } else { + error = (int)ioctl_setinformation_fe(wl, cmd, buf, &len); + } + + if (error == SERIAL_PORT_ERR) + return SERIAL_PORT_ERR; + + if (error != 0) { + return IOCTL_ERROR; + } + return error; +} + +int +wl_validatedev(void *dev_handle) +{ + int retval = 1; + struct ifreq *ifr = (struct ifreq *)dev_handle; + /* validate the interface */ + if (!ifr->ifr_name || wl_check((void *)ifr)) { + retval = 0; + } + return retval; +} + +/* Main client function + * The code is mostly from wlu_linux.c. This function takes care of executing remote dhd commands + * along with the local dhd commands now. + */ +int +#if defined(LIB) +dhd_main(int argc, char **argv) +#else +main(int argc, char **argv) +#endif +{ + struct ifreq ifr; + char *ifname = NULL; + int err = 0; + int help = 0; + int status = CMD_DHD; + void* serialHandle = NULL; + + UNUSED_PARAMETER(argc); + + av0 = argv[0]; + memset(&ifr, 0, sizeof(ifr)); + argv++; + + if ((status = dhd_option(&argv, &ifname, &help)) == CMD_OPT) { + if (ifname) + strncpy(ifr.ifr_name, ifname, IFNAMSIZ); + } + /* Linux client looking for a Win32 server */ + if (*argv && strncmp (*argv, "--wince", strlen(*argv)) == 0) { + rwl_os_type = WIN32_OS; + argv++; + } + + /* RWL socket transport Usage: --socket ipaddr [port num] */ + if (*argv && strncmp (*argv, "--socket", strlen(*argv)) == 0) { + argv++; + + remote_type = REMOTE_SOCKET; + + if (!(*argv)) { + rwl_usage(remote_type); + return err; + } + g_rwl_servIP = *argv; + argv++; + + g_rwl_servport = DEFAULT_SERVER_PORT; + if ((*argv) && isdigit(**argv)) { + g_rwl_servport = atoi(*argv); + argv++; + } + } + + /* RWL from system serial port on client to uart dongle port on server */ + /* Usage: --dongle /dev/ttyS0 */ + if (*argv && strncmp (*argv, "--dongle", strlen(*argv)) == 0) { + argv++; + remote_type = REMOTE_DONGLE; + + if (!(*argv)) { + rwl_usage(remote_type); + return err; + } + g_rwl_device_name_serial = *argv; + argv++; + if ((serialHandle = rwl_open_pipe(remote_type, "\0", 0, 0)) == NULL) { + DPRINT_ERR(ERR, "serial device open error\r\n"); + return BCME_ERROR; + } + ifr = (*(struct ifreq *)serialHandle); + } + + /* RWL over wifi. Usage: --wifi mac_address */ + if (*argv && strncmp (*argv, "--wifi", strlen(*argv)) == 0) { + argv++; + remote_type = NO_REMOTE; + if (!ifr.ifr_name[0]) + { + dhd_find(&ifr, "wl"); + } + /* validate the interface */ + if (!ifr.ifr_name[0] || wl_check((void*)&ifr)) { + fprintf(stderr, "%s: wl driver adapter not found\n", av0); + exit(1); + } + remote_type = REMOTE_WIFI; + + if (argc < 4) { + rwl_usage(remote_type); + return err; + } + /* copy server mac address to local buffer for later use by findserver cmd */ + if (!dhd_ether_atoe(*argv, (struct ether_addr *)g_rwl_buf_mac)) { + fprintf(stderr, + "could not parse as an ethernet MAC address\n"); + return FAIL; + } + argv++; + } + + /* Process for local dhd */ + if (remote_type == NO_REMOTE) { + err = process_args(&ifr, argv); + return err; + } + + if (*argv) { + err = process_args(&ifr, argv); + if ((err == SERIAL_PORT_ERR) && (remote_type == REMOTE_DONGLE)) { + DPRINT_ERR(ERR, "\n Retry again\n"); + err = process_args((struct ifreq*)&ifr, argv); + } + return err; + } + rwl_usage(remote_type); + + if (remote_type == REMOTE_DONGLE) + rwl_close_pipe(remote_type, (void*)&ifr); + + return err; +} +/* + * Function called for 'local' execution and for 'remote' non-interactive session + * (shell cmd, wl cmd) .The code is mostly from wlu_linux.c. This code can be + * common to wlu_linux.c and dhdu_linux.c + */ +static int +process_args(struct ifreq* ifr, char **argv) +{ + char *ifname = NULL; + int help = 0; + int status = 0; + int err = BCME_OK; + cmd_t *cmd = NULL; + while (*argv) { + if ((strcmp (*argv, "sh") == 0) && (remote_type != NO_REMOTE)) { + argv++; /* Get the shell command */ + if (*argv) { + /* Register handler in case of shell command only */ + signal(SIGINT, ctrlc_handler); + err = rwl_shell_cmd_proc((void*)ifr, argv, SHELL_CMD); + } else { + DPRINT_ERR(ERR, + "Enter the shell command (e.g ls(Linux) or dir(Win CE) \n"); + err = BCME_ERROR; + } + return err; + } + + if ((status = dhd_option(&argv, &ifname, &help)) == CMD_OPT) { + if (help) + break; + if (ifname) + strncpy(ifr->ifr_name, ifname, IFNAMSIZ); + continue; + } + /* parse error */ + else if (status == CMD_ERR) + break; + + if (remote_type == NO_REMOTE) { + /* use default interface */ + if (!ifr->ifr_name[0]) + dhd_find(ifr, "dhd"); + /* validate the interface */ + if (!ifr->ifr_name[0] || dhd_check((void *)ifr)) { + if (strcmp("dldn", *argv) != 0) { + fprintf(stderr, "%s: dhd driver adapter not found\n", av0); + exit(BCME_ERROR); + } + } + + } + /* search for command */ + cmd = dhd_find_cmd(*argv); + /* if not found, use default set_var and get_var commands */ + if (!cmd) { + cmd = &dhd_varcmd; + } + + /* do command */ + err = (*cmd->func)((void *) ifr, cmd, argv); + break; + } /* while loop end */ + + /* provide for help on a particular command */ + if (help && *argv) { + cmd = dhd_find_cmd(*argv); + if (cmd) { + dhd_cmd_usage(cmd); + } else { + DPRINT_ERR(ERR, "%s: Unrecognized command \"%s\", type -h for help\n", + av0, *argv); + } + } else if (!cmd) + dhd_usage(NULL); + else if (err == USAGE_ERROR) + dhd_cmd_usage(cmd); + else if (err == IOCTL_ERROR) + dhd_printlasterror((void *) ifr); + + return err; +} + +int +rwl_shell_createproc(void *wl) +{ + UNUSED_PARAMETER(wl); + return fork(); +} + +void +rwl_shell_killproc(int pid) +{ + kill(pid, SIGKILL); +} + +#ifdef RWL_SOCKET +/* to validate hostname/ip given by the client */ +int validate_server_address() +{ + struct hostent *he; + struct ipv4_addr temp; + if (!dhd_atoip(g_rwl_servIP, &temp)) { + /* Wrong IP address format check for hostname */ + if ((he = gethostbyname(g_rwl_servIP)) != NULL) { + if (!dhd_atoip(*he->h_addr_list, &temp)) { + g_rwl_servIP = + inet_ntoa(*(struct in_addr *)*he->h_addr_list); + if (g_rwl_servIP == NULL) { + DPRINT_ERR(ERR, "Error at inet_ntoa \n"); + return FAIL; + } + } else { + DPRINT_ERR(ERR, "Error in IP address \n"); + return FAIL; + } + } else { + DPRINT_ERR(ERR, "Enter correct IP address/hostname format\n"); + return FAIL; + } + } + return SUCCESS; +} +#endif /* RWL_SOCKET */ diff --git a/external/cache/sources/wl/dhd/ucode_download.c b/external/cache/sources/wl/dhd/ucode_download.c new file mode 100644 index 0000000..b2c7a3c --- /dev/null +++ b/external/cache/sources/wl/dhd/ucode_download.c @@ -0,0 +1,251 @@ +/* + * Ucode download related utility functions + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: ucode_download.c 297277 2011-11-18 14:10:09Z $ + */ + +#include +#include +#include +#include +#include + +#define DEVPRESENT_DELAY 10000 /* in microsecs */ +#define DEVPRESENT_RETRIES 100 + +extern int wl_validatedev(void *dev_handle); + +int +dload_generic_data(void *wl, uint16 dload_type, unsigned char *dload_buf, int len) +{ + struct wl_dload_data *dload_ptr = (struct wl_dload_data *)dload_buf; + int err = 0; + int actual_data_offset; + char *buf; + + actual_data_offset = OFFSETOF(struct wl_dload_data, data); + dload_ptr->flag = (DLOAD_HANDLER_VER << DLOAD_FLAG_VER_SHIFT); + dload_ptr->flag |= DL_CRC_NOT_INUSE; + dload_ptr->dload_type = dload_type; + dload_ptr->len = htod32(len - actual_data_offset); + dload_ptr->crc = 0; + + len = len + 8 - (len%8); + + buf = malloc(WLC_IOCTL_MEDLEN); + if (buf) { + bzero(buf, WLC_IOCTL_MEDLEN); + err = wlu_iovar_setbuf(wl, "generic_dload", dload_buf, len, buf, + WLC_IOCTL_MEDLEN); + } + free(buf); + return err; +} + +int +dload_ucode_part(void *wl, uint8 ucode_type, uint32 datalen, unsigned char *org_buf) +{ + int num_chunks, chunk_len, cumulative_len = 0; + int size2alloc, ucode_chunk_len = 0; + unsigned char *new_buf; + struct wl_ucode_info *ucode_ptr; + int err = 0, ucode_offset, chunk_offset; + + ucode_offset = OFFSETOF(wl_dload_data_t, data); + chunk_offset = OFFSETOF(wl_ucode_info_t, data_chunk); + + err = wlu_iovar_getint(wl, "ucdload_chunk_len", + &ucode_chunk_len); + if (err) { + printf("err in getting ucode chunk len, exiting\n"); + return err; + } + + num_chunks = datalen/ucode_chunk_len; + if (datalen % ucode_chunk_len != 0) + num_chunks++; + size2alloc = ucode_offset + chunk_offset + ucode_chunk_len; + + /* single chunk buffer */ + new_buf = (unsigned char *)malloc(size2alloc); + memset(new_buf, 0, size2alloc); + ucode_ptr = (struct wl_ucode_info *)((uint8 *)new_buf+ucode_offset); + ucode_ptr->ucode_type = ucode_type; + ucode_ptr->num_chunks = num_chunks; + do { + if (datalen >= ucode_chunk_len) + chunk_len = ucode_chunk_len; + else + chunk_len = datalen; + memset(new_buf+ucode_offset+chunk_offset, 0, size2alloc-ucode_offset-chunk_offset); + ucode_ptr->chunk_len = htod32(chunk_len); + ucode_ptr->chunk_num++; + memcpy(&ucode_ptr->data_chunk[0], org_buf + cumulative_len, chunk_len); + cumulative_len += chunk_len; + err = dload_generic_data(wl, DL_TYPE_UCODE, new_buf, size2alloc); + if (err) { + printf("error while writing %s to the memory\n", + (ucode_type == UCODE_FW)? "ucode" : "initvals"); + break; + } + datalen = datalen - chunk_len; + } while (datalen > 0); + free(new_buf); + + return err; +} + +static int +check_ucode_file(unsigned char *headers) +{ + struct trx_header *trx; + int actual_data_len = -1; + + /* Extract trx header */ + trx = (struct trx_header *)headers; + if (trx->magic != TRX_MAGIC) { + printf("Error: trx bad hdr\n"); + goto err; + } + actual_data_len = ROUNDUP(trx->offsets[0], 4) + ROUNDUP(trx->offsets[1], 4); +err: + return actual_data_len; +} + +int +proc_ucode_download(char* fw_filename, void *dev_handle) +{ + FILE *fp = NULL; + int ret = 0, loopcnt = 0; + struct trx_header main_trx_hdr, *ucode_trx_hdr; + uint32 maintrx_hdr_len, tmp_len; + uint32 fw_size, second_offset, ucode_trx_offset; + long ucode_pos; + unsigned long ucode_info_len = 0, status; + unsigned char *ucodetrx_buf, *initvals_ptr; + int ucode_len, initvals_len; + int ucdload_status = 0; + int is_devpresent; + + /* read the file and push blocks down to memory */ + if ((fp = fopen(fw_filename, "rb")) == NULL) { + fprintf(stderr, "%s: unable to open %s: %s\n", + __FUNCTION__, fw_filename, strerror(errno)); + ret = -1; + goto exit; + } + + maintrx_hdr_len = sizeof(struct trx_header); + tmp_len = fread(&main_trx_hdr, sizeof(uint8), maintrx_hdr_len, fp); + + if (tmp_len == maintrx_hdr_len) { + if (main_trx_hdr.magic == TRX_MAGIC) { + fw_size = main_trx_hdr.offsets[0]; + second_offset = main_trx_hdr.offsets[2]; + + if (second_offset == maintrx_hdr_len) { + second_offset = 0; + } + ucode_trx_offset = maintrx_hdr_len + + ROUNDUP(fw_size, 4) + ROUNDUP(second_offset, 4); + ucode_pos = fseek(fp, ucode_trx_offset, SEEK_SET); + BCM_REFERENCE(ucode_pos); + + if ((ucode_trx_hdr = malloc(sizeof(struct trx_header))) + == NULL) { + printf("Unable to allocate %d bytes!\n", maintrx_hdr_len); + ret = -ENOMEM; + goto exit; + } + + /* Read ONLY the firmware-file-header into the new_buffer */ + status = fread(ucode_trx_hdr, sizeof(uint8), + maintrx_hdr_len, fp); + if (status < sizeof(struct trx_header)) { + printf("Short read in hdr read for %s!\n", fw_filename); + ret = -EINVAL; + goto exit; + } + + if ((ucode_info_len = check_ucode_file( + (unsigned char *)ucode_trx_hdr)) <= 0) { + printf("not a valid ucode.trx\n"); + ret = -1; + goto exit; + } + + ucodetrx_buf = (unsigned char *)malloc(ucode_info_len * + sizeof(char)); + tmp_len = fread(ucodetrx_buf, sizeof(uint8), + ucode_info_len, fp); + if (ucode_info_len > 0) { + ucode_len = ucode_trx_hdr->offsets[0]; + initvals_ptr = ucodetrx_buf + + ROUNDUP(ucode_trx_hdr->offsets[0], 4); + initvals_len = ucode_trx_hdr->offsets[1]; + } + free(ucode_trx_hdr); + + init_cmd_batchingmode(); + do { + is_devpresent = wl_validatedev(dev_handle); + loopcnt++; + /* in USB after dongle fw starts running wl interface + might not appear in the list of interfaces immediately, hence try + after some delay of 10ms + */ + if (!is_devpresent) + usleep(DEVPRESENT_DELAY); + else { + /* below iovar to verify if the for foundout + interface has already ucode been downloaded + */ + ret = wlu_iovar_getint(dev_handle, "ucdload_status", + &ucdload_status); + if (ret) { + printf("err in ucdload_status, exiting\n"); + goto exit; + } + if (ucdload_status) { + /* Number of 'wl' interfaces to skip + in the next round of going thru wl_find + */ + printf("ucode is already downloaded\n"); + } + } + /* usb seems to take some time to come up, hence the + loop value of 100 + */ + } while (loopcnt < DEVPRESENT_RETRIES && !is_devpresent); + + if (loopcnt < DEVPRESENT_RETRIES) { + /* download the ucode fw */ + ret = dload_ucode_part(dev_handle, UCODE_FW, ucode_len, + ucodetrx_buf); + if (ret) { + printf("error while downloading ucode, exiting\n"); + goto exit; + } + /* download the initvals to the dongle */ + ret = dload_ucode_part(dev_handle, INIT_VALS, + initvals_len, initvals_ptr); + + if (ret) { + printf("error while downloading initvals, exiting\n"); + goto exit; + } + } + else { + printf("wl device is not present\n"); + } + free(ucodetrx_buf); + } + } + +exit: + if (fp) + fclose(fp); + return ret; +} diff --git a/external/cache/sources/wl/dhd/ucode_download.h b/external/cache/sources/wl/dhd/ucode_download.h new file mode 100644 index 0000000..ad0a3e5 --- /dev/null +++ b/external/cache/sources/wl/dhd/ucode_download.h @@ -0,0 +1,9 @@ +/* + * Ucode download related utility functions + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: ucode_download.h 241182 2011-02-17 21:50:03Z $ + */ +extern int +proc_ucode_download(char* fw_filename, void *dev_handle); diff --git a/external/cache/sources/wl/include/Makefile b/external/cache/sources/wl/include/Makefile new file mode 100644 index 0000000..42b3b68 --- /dev/null +++ b/external/cache/sources/wl/include/Makefile @@ -0,0 +1,53 @@ +#!/bin/bash +# +# This script serves following purpose: +# +# 1. It generates native version information by querying +# automerger maintained database to see where src/include +# came from +# 2. For select components, as listed in compvers.sh +# it generates component version files +# +# Copyright 2005, Broadcom, Inc. +# +# $Id: Makefile 241686 2011-02-19 00:22:45Z $ +# + +SRCBASE := .. + +TARGETS := epivers.h + +ifdef VERBOSE +export VERBOSE +endif + +all release: epivers compvers + +# Generate epivers.h for native branch version +epivers: + bash epivers.sh + +# Generate epivers.h for native branch version +compvers: + @if [ -s "compvers.sh" ]; then \ + echo "Generating component versions, if any"; \ + bash compvers.sh; \ + else \ + echo "Skipping component version generation"; \ + fi + +# Generate epivers.h for native branch version +clean_compvers: + @if [ -s "compvers.sh" ]; then \ + echo "bash compvers.sh clean"; \ + bash compvers.sh clean; \ + else \ + echo "Skipping component version clean"; \ + fi + +clean: + rm -f $(TARGETS) *.prev + +clean_all: clean clean_compvers + +.PHONY: all release clean epivers compvers clean_compvers diff --git a/external/cache/sources/wl/include/aidmp.h b/external/cache/sources/wl/include/aidmp.h new file mode 100644 index 0000000..f90ced6 --- /dev/null +++ b/external/cache/sources/wl/include/aidmp.h @@ -0,0 +1,368 @@ +/* + * Broadcom AMBA Interconnect definitions. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: aidmp.h 382794 2013-02-04 17:34:08Z $ + */ + +#ifndef _AIDMP_H +#define _AIDMP_H + + +#define MFGID_ARM 0x43b +#define MFGID_BRCM 0x4bf +#define MFGID_MIPS 0x4a7 + + +#define CC_SIM 0 +#define CC_EROM 1 +#define CC_CORESIGHT 9 +#define CC_VERIF 0xb +#define CC_OPTIMO 0xd +#define CC_GEN 0xe +#define CC_PRIMECELL 0xf + + +#define ER_EROMENTRY 0x000 +#define ER_REMAPCONTROL 0xe00 +#define ER_REMAPSELECT 0xe04 +#define ER_MASTERSELECT 0xe10 +#define ER_ITCR 0xf00 +#define ER_ITIP 0xf04 + + +#define ER_TAG 0xe +#define ER_TAG1 0x6 +#define ER_VALID 1 +#define ER_CI 0 +#define ER_MP 2 +#define ER_ADD 4 +#define ER_END 0xe +#define ER_BAD 0xffffffff + + +#define CIA_MFG_MASK 0xfff00000 +#define CIA_MFG_SHIFT 20 +#define CIA_CID_MASK 0x000fff00 +#define CIA_CID_SHIFT 8 +#define CIA_CCL_MASK 0x000000f0 +#define CIA_CCL_SHIFT 4 + + +#define CIB_REV_MASK 0xff000000 +#define CIB_REV_SHIFT 24 +#define CIB_NSW_MASK 0x00f80000 +#define CIB_NSW_SHIFT 19 +#define CIB_NMW_MASK 0x0007c000 +#define CIB_NMW_SHIFT 14 +#define CIB_NSP_MASK 0x00003e00 +#define CIB_NSP_SHIFT 9 +#define CIB_NMP_MASK 0x000001f0 +#define CIB_NMP_SHIFT 4 + + +#define MPD_MUI_MASK 0x0000ff00 +#define MPD_MUI_SHIFT 8 +#define MPD_MP_MASK 0x000000f0 +#define MPD_MP_SHIFT 4 + + +#define AD_ADDR_MASK 0xfffff000 +#define AD_SP_MASK 0x00000f00 +#define AD_SP_SHIFT 8 +#define AD_ST_MASK 0x000000c0 +#define AD_ST_SHIFT 6 +#define AD_ST_SLAVE 0x00000000 +#define AD_ST_BRIDGE 0x00000040 +#define AD_ST_SWRAP 0x00000080 +#define AD_ST_MWRAP 0x000000c0 +#define AD_SZ_MASK 0x00000030 +#define AD_SZ_SHIFT 4 +#define AD_SZ_4K 0x00000000 +#define AD_SZ_8K 0x00000010 +#define AD_SZ_16K 0x00000020 +#define AD_SZ_SZD 0x00000030 +#define AD_AG32 0x00000008 +#define AD_ADDR_ALIGN 0x00000fff +#define AD_SZ_BASE 0x00001000 + + +#define SD_SZ_MASK 0xfffff000 +#define SD_SG32 0x00000008 +#define SD_SZ_ALIGN 0x00000fff + + +#ifndef _LANGUAGE_ASSEMBLY + +typedef volatile struct _aidmp { + uint32 oobselina30; + uint32 oobselina74; + uint32 PAD[6]; + uint32 oobselinb30; + uint32 oobselinb74; + uint32 PAD[6]; + uint32 oobselinc30; + uint32 oobselinc74; + uint32 PAD[6]; + uint32 oobselind30; + uint32 oobselind74; + uint32 PAD[38]; + uint32 oobselouta30; + uint32 oobselouta74; + uint32 PAD[6]; + uint32 oobseloutb30; + uint32 oobseloutb74; + uint32 PAD[6]; + uint32 oobseloutc30; + uint32 oobseloutc74; + uint32 PAD[6]; + uint32 oobseloutd30; + uint32 oobseloutd74; + uint32 PAD[38]; + uint32 oobsynca; + uint32 oobseloutaen; + uint32 PAD[6]; + uint32 oobsyncb; + uint32 oobseloutben; + uint32 PAD[6]; + uint32 oobsyncc; + uint32 oobseloutcen; + uint32 PAD[6]; + uint32 oobsyncd; + uint32 oobseloutden; + uint32 PAD[38]; + uint32 oobaextwidth; + uint32 oobainwidth; + uint32 oobaoutwidth; + uint32 PAD[5]; + uint32 oobbextwidth; + uint32 oobbinwidth; + uint32 oobboutwidth; + uint32 PAD[5]; + uint32 oobcextwidth; + uint32 oobcinwidth; + uint32 oobcoutwidth; + uint32 PAD[5]; + uint32 oobdextwidth; + uint32 oobdinwidth; + uint32 oobdoutwidth; + uint32 PAD[37]; + uint32 ioctrlset; + uint32 ioctrlclear; + uint32 ioctrl; + uint32 PAD[61]; + uint32 iostatus; + uint32 PAD[127]; + uint32 ioctrlwidth; + uint32 iostatuswidth; + uint32 PAD[62]; + uint32 resetctrl; + uint32 resetstatus; + uint32 resetreadid; + uint32 resetwriteid; + uint32 PAD[60]; + uint32 errlogctrl; + uint32 errlogdone; + uint32 errlogstatus; + uint32 errlogaddrlo; + uint32 errlogaddrhi; + uint32 errlogid; + uint32 errloguser; + uint32 errlogflags; + uint32 PAD[56]; + uint32 intstatus; + uint32 PAD[255]; + uint32 config; + uint32 PAD[63]; + uint32 itcr; + uint32 PAD[3]; + uint32 itipooba; + uint32 itipoobb; + uint32 itipoobc; + uint32 itipoobd; + uint32 PAD[4]; + uint32 itipoobaout; + uint32 itipoobbout; + uint32 itipoobcout; + uint32 itipoobdout; + uint32 PAD[4]; + uint32 itopooba; + uint32 itopoobb; + uint32 itopoobc; + uint32 itopoobd; + uint32 PAD[4]; + uint32 itopoobain; + uint32 itopoobbin; + uint32 itopoobcin; + uint32 itopoobdin; + uint32 PAD[4]; + uint32 itopreset; + uint32 PAD[15]; + uint32 peripherialid4; + uint32 peripherialid5; + uint32 peripherialid6; + uint32 peripherialid7; + uint32 peripherialid0; + uint32 peripherialid1; + uint32 peripherialid2; + uint32 peripherialid3; + uint32 componentid0; + uint32 componentid1; + uint32 componentid2; + uint32 componentid3; +} aidmp_t; + +#endif + + +#define OOB_BUSCONFIG 0x020 +#define OOB_STATUSA 0x100 +#define OOB_STATUSB 0x104 +#define OOB_STATUSC 0x108 +#define OOB_STATUSD 0x10c +#define OOB_ENABLEA0 0x200 +#define OOB_ENABLEA1 0x204 +#define OOB_ENABLEA2 0x208 +#define OOB_ENABLEA3 0x20c +#define OOB_ENABLEB0 0x280 +#define OOB_ENABLEB1 0x284 +#define OOB_ENABLEB2 0x288 +#define OOB_ENABLEB3 0x28c +#define OOB_ENABLEC0 0x300 +#define OOB_ENABLEC1 0x304 +#define OOB_ENABLEC2 0x308 +#define OOB_ENABLEC3 0x30c +#define OOB_ENABLED0 0x380 +#define OOB_ENABLED1 0x384 +#define OOB_ENABLED2 0x388 +#define OOB_ENABLED3 0x38c +#define OOB_ITCR 0xf00 +#define OOB_ITIPOOBA 0xf10 +#define OOB_ITIPOOBB 0xf14 +#define OOB_ITIPOOBC 0xf18 +#define OOB_ITIPOOBD 0xf1c +#define OOB_ITOPOOBA 0xf30 +#define OOB_ITOPOOBB 0xf34 +#define OOB_ITOPOOBC 0xf38 +#define OOB_ITOPOOBD 0xf3c + + +#define AI_OOBSELINA30 0x000 +#define AI_OOBSELINA74 0x004 +#define AI_OOBSELINB30 0x020 +#define AI_OOBSELINB74 0x024 +#define AI_OOBSELINC30 0x040 +#define AI_OOBSELINC74 0x044 +#define AI_OOBSELIND30 0x060 +#define AI_OOBSELIND74 0x064 +#define AI_OOBSELOUTA30 0x100 +#define AI_OOBSELOUTA74 0x104 +#define AI_OOBSELOUTB30 0x120 +#define AI_OOBSELOUTB74 0x124 +#define AI_OOBSELOUTC30 0x140 +#define AI_OOBSELOUTC74 0x144 +#define AI_OOBSELOUTD30 0x160 +#define AI_OOBSELOUTD74 0x164 +#define AI_OOBSYNCA 0x200 +#define AI_OOBSELOUTAEN 0x204 +#define AI_OOBSYNCB 0x220 +#define AI_OOBSELOUTBEN 0x224 +#define AI_OOBSYNCC 0x240 +#define AI_OOBSELOUTCEN 0x244 +#define AI_OOBSYNCD 0x260 +#define AI_OOBSELOUTDEN 0x264 +#define AI_OOBAEXTWIDTH 0x300 +#define AI_OOBAINWIDTH 0x304 +#define AI_OOBAOUTWIDTH 0x308 +#define AI_OOBBEXTWIDTH 0x320 +#define AI_OOBBINWIDTH 0x324 +#define AI_OOBBOUTWIDTH 0x328 +#define AI_OOBCEXTWIDTH 0x340 +#define AI_OOBCINWIDTH 0x344 +#define AI_OOBCOUTWIDTH 0x348 +#define AI_OOBDEXTWIDTH 0x360 +#define AI_OOBDINWIDTH 0x364 +#define AI_OOBDOUTWIDTH 0x368 + + +#define AI_IOCTRLSET 0x400 +#define AI_IOCTRLCLEAR 0x404 +#define AI_IOCTRL 0x408 +#define AI_IOSTATUS 0x500 +#define AI_RESETCTRL 0x800 +#define AI_RESETSTATUS 0x804 + +#define AI_IOCTRLWIDTH 0x700 +#define AI_IOSTATUSWIDTH 0x704 + +#define AI_RESETREADID 0x808 +#define AI_RESETWRITEID 0x80c +#define AI_ERRLOGCTRL 0xa00 +#define AI_ERRLOGDONE 0xa04 +#define AI_ERRLOGSTATUS 0xa08 +#define AI_ERRLOGADDRLO 0xa0c +#define AI_ERRLOGADDRHI 0xa10 +#define AI_ERRLOGID 0xa14 +#define AI_ERRLOGUSER 0xa18 +#define AI_ERRLOGFLAGS 0xa1c +#define AI_INTSTATUS 0xa00 +#define AI_CONFIG 0xe00 +#define AI_ITCR 0xf00 +#define AI_ITIPOOBA 0xf10 +#define AI_ITIPOOBB 0xf14 +#define AI_ITIPOOBC 0xf18 +#define AI_ITIPOOBD 0xf1c +#define AI_ITIPOOBAOUT 0xf30 +#define AI_ITIPOOBBOUT 0xf34 +#define AI_ITIPOOBCOUT 0xf38 +#define AI_ITIPOOBDOUT 0xf3c +#define AI_ITOPOOBA 0xf50 +#define AI_ITOPOOBB 0xf54 +#define AI_ITOPOOBC 0xf58 +#define AI_ITOPOOBD 0xf5c +#define AI_ITOPOOBAIN 0xf70 +#define AI_ITOPOOBBIN 0xf74 +#define AI_ITOPOOBCIN 0xf78 +#define AI_ITOPOOBDIN 0xf7c +#define AI_ITOPRESET 0xf90 +#define AI_PERIPHERIALID4 0xfd0 +#define AI_PERIPHERIALID5 0xfd4 +#define AI_PERIPHERIALID6 0xfd8 +#define AI_PERIPHERIALID7 0xfdc +#define AI_PERIPHERIALID0 0xfe0 +#define AI_PERIPHERIALID1 0xfe4 +#define AI_PERIPHERIALID2 0xfe8 +#define AI_PERIPHERIALID3 0xfec +#define AI_COMPONENTID0 0xff0 +#define AI_COMPONENTID1 0xff4 +#define AI_COMPONENTID2 0xff8 +#define AI_COMPONENTID3 0xffc + + +#define AIRC_RESET 1 + + +#define AICFG_OOB 0x00000020 +#define AICFG_IOS 0x00000010 +#define AICFG_IOC 0x00000008 +#define AICFG_TO 0x00000004 +#define AICFG_ERRL 0x00000002 +#define AICFG_RST 0x00000001 + + +#define OOB_SEL_OUTEN_B_5 15 +#define OOB_SEL_OUTEN_B_6 23 + + +#define AI_OOBSEL_MASK 0x1F +#define AI_OOBSEL_0_SHIFT 0 +#define AI_OOBSEL_1_SHIFT 8 +#define AI_OOBSEL_2_SHIFT 16 +#define AI_OOBSEL_3_SHIFT 24 +#define AI_OOBSEL_4_SHIFT 0 +#define AI_OOBSEL_5_SHIFT 8 +#define AI_OOBSEL_6_SHIFT 16 +#define AI_OOBSEL_7_SHIFT 24 + +#endif diff --git a/external/cache/sources/wl/include/bcm_android_types.h b/external/cache/sources/wl/include/bcm_android_types.h new file mode 100644 index 0000000..6fee464 --- /dev/null +++ b/external/cache/sources/wl/include/bcm_android_types.h @@ -0,0 +1,44 @@ +/* + * Android related remote wl declarations + * + * Copyright (C) 2013, Broadcom Corporation + * All Rights Reserved. + * + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation; + * the contents of this file may not be disclosed to third parties, copied + * or duplicated in any form, in whole or in part, without the prior + * written permission of Broadcom Corporation. + * $Id: bcm_android_types.h 241182 2011-02-17 21:50:03Z $ + * + */ +#ifndef _wlu_android_h +#define _wlu_android_h +#define __fd_mask unsigned long +typedef struct + { + +#ifdef __USE_XOPEN + __fd_mask fds_bits[__FD_SETSIZE / __NFDBITS]; +# define __FDS_BITS(set) ((set)->fds_bits) +#else + __fd_mask __fds_bits[__FD_SETSIZE / __NFDBITS]; +# define __FDS_BITS(set) ((set)->__fds_bits) +#endif + } fd_set1; +#define fd_set fd_set1 + +#define htons(x) BCMSWAP16(x) +#define htonl(x) BCMSWAP32(x) +#define __FD_ZERO(s) \ + do { \ + unsigned int __i; \ + fd_set *__arr = (s); \ + for (__i = 0; __i < sizeof (fd_set) / sizeof (__fd_mask); ++__i) \ + __FDS_BITS(__arr)[__i] = 0; \ + } while (0) +#define __FD_SET(d, s) (__FDS_BITS (s)[__FDELT(d)] |= __FDMASK(d)) +#define __FD_CLR(d, s) (__FDS_BITS (s)[__FDELT(d)] &= ~__FDMASK(d)) +#define __FD_ISSET(d, s) ((__FDS_BITS (s)[__FDELT(d)] & __FDMASK(d)) != 0) +#define MCL_CURRENT 1 +#define MCL_FUTURE 2 +#endif diff --git a/external/cache/sources/wl/include/bcm_cfg.h b/external/cache/sources/wl/include/bcm_cfg.h new file mode 100644 index 0000000..fe20608 --- /dev/null +++ b/external/cache/sources/wl/include/bcm_cfg.h @@ -0,0 +1,16 @@ +/* + * BCM common config options + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcm_cfg.h 294399 2011-11-07 03:31:22Z hharte $ + */ + +#ifndef _bcm_cfg_h_ +#define _bcm_cfg_h_ +#if defined(__NetBSD__) || defined(__FreeBSD__) +#if defined(_KERNEL) +#include +#endif /* defined(_KERNEL) */ +#endif /* defined(__NetBSD__) || defined(__FreeBSD__) */ +#endif /* _bcm_cfg_h_ */ diff --git a/external/cache/sources/wl/include/bcm_mpool_pub.h b/external/cache/sources/wl/include/bcm_mpool_pub.h new file mode 100644 index 0000000..412fa99 --- /dev/null +++ b/external/cache/sources/wl/include/bcm_mpool_pub.h @@ -0,0 +1,343 @@ +/* + * Memory pools library, Public interface + * + * API Overview + * + * This package provides a memory allocation subsystem based on pools of + * homogenous objects. + * + * Instrumentation is available for reporting memory utilization both + * on a per-data-structure basis and system wide. + * + * There are two main types defined in this API. + * + * pool manager: A singleton object that acts as a factory for + * pool allocators. It also is used for global + * instrumentation, such as reporting all blocks + * in use across all data structures. The pool manager + * creates and provides individual memory pools + * upon request to application code. + * + * memory pool: An object for allocating homogenous memory blocks. + * + * Global identifiers in this module use the following prefixes: + * bcm_mpm_* Memory pool manager + * bcm_mp_* Memory pool + * + * There are two main types of memory pools: + * + * prealloc: The contiguous memory block of objects can either be supplied + * by the client or malloc'ed by the memory manager. The objects are + * allocated out of a block of memory and freed back to the block. + * + * heap: The memory pool allocator uses the heap (malloc/free) for memory. + * In this case, the pool allocator is just providing statistics + * and instrumentation on top of the heap, without modifying the heap + * allocation implementation. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id$ + */ + +#ifndef _BCM_MPOOL_PUB_H +#define _BCM_MPOOL_PUB_H 1 + +#include /* needed for uint16 */ + + +/* +************************************************************************** +* +* Type definitions, handles +* +************************************************************************** +*/ + +/* Forward declaration of OSL handle. */ +struct osl_info; + +/* Forward declaration of string buffer. */ +struct bcmstrbuf; + +/* + * Opaque type definition for the pool manager handle. This object is used for global + * memory pool operations such as obtaining a new pool, deleting a pool, iterating and + * instrumentation/debugging. + */ +struct bcm_mpm_mgr; +typedef struct bcm_mpm_mgr *bcm_mpm_mgr_h; + +/* + * Opaque type definition for an instance of a pool. This handle is used for allocating + * and freeing memory through the pool, as well as management/instrumentation on this + * specific pool. + */ +struct bcm_mp_pool; +typedef struct bcm_mp_pool *bcm_mp_pool_h; + + +/* + * To make instrumentation more readable, every memory + * pool must have a readable name. Pool names are up to + * 8 bytes including '\0' termination. (7 printable characters.) + */ +#define BCM_MP_NAMELEN 8 + + +/* + * Type definition for pool statistics. + */ +typedef struct bcm_mp_stats { + char name[BCM_MP_NAMELEN]; /* Name of this pool. */ + unsigned int objsz; /* Object size allocated in this pool */ + uint16 nobj; /* Total number of objects in this pool */ + uint16 num_alloc; /* Number of objects currently allocated */ + uint16 high_water; /* Max number of allocated objects. */ + uint16 failed_alloc; /* Failed allocations. */ +} bcm_mp_stats_t; + + +/* +************************************************************************** +* +* API Routines on the pool manager. +* +************************************************************************** +*/ + +/* + * bcm_mpm_init() - initialize the whole memory pool system. + * + * Parameters: + * osh: INPUT Operating system handle. Needed for heap memory allocation. + * max_pools: INPUT Maximum number of mempools supported. + * mgr: OUTPUT The handle is written with the new pools manager object/handle. + * + * Returns: + * BCME_OK Object initialized successfully. May be used. + * BCME_NOMEM Initialization failed due to no memory. Object must not be used. + */ +int bcm_mpm_init(struct osl_info *osh, int max_pools, bcm_mpm_mgr_h *mgrp); + + +/* + * bcm_mpm_deinit() - de-initialize the whole memory pool system. + * + * Parameters: + * mgr: INPUT Pointer to pool manager handle. + * + * Returns: + * BCME_OK Memory pool manager successfully de-initialized. + * other Indicated error occured during de-initialization. + */ +int bcm_mpm_deinit(bcm_mpm_mgr_h *mgrp); + +/* + * bcm_mpm_create_prealloc_pool() - Create a new pool for fixed size objects. The + * pool uses a contiguous block of pre-alloced + * memory. The memory block may either be provided + * by the client or dynamically allocated by the + * pool manager. + * + * Parameters: + * mgr: INPUT The handle to the pool manager + * obj_sz: INPUT Size of objects that will be allocated by the new pool + * Must be >= sizeof(void *). + * nobj: INPUT Maximum number of concurrently existing objects to support + * memstart INPUT Pointer to the memory to use, or NULL to malloc() + * memsize INPUT Number of bytes referenced from memstart (for error checking). + * Must be 0 if 'memstart' is NULL. + * poolname INPUT For instrumentation, the name of the pool + * newp: OUTPUT The handle for the new pool, if creation is successful + * + * Returns: + * BCME_OK Pool created ok. + * other Pool not created due to indicated error. newpoolp set to NULL. + * + * + */ +int bcm_mpm_create_prealloc_pool(bcm_mpm_mgr_h mgr, + unsigned int obj_sz, + int nobj, + void *memstart, + unsigned int memsize, + const char poolname[BCM_MP_NAMELEN], + bcm_mp_pool_h *newp); + + +/* + * bcm_mpm_delete_prealloc_pool() - Delete a memory pool. This should only be called after + * all memory objects have been freed back to the pool. + * + * Parameters: + * mgr: INPUT The handle to the pools manager + * pool: INPUT The handle of the pool to delete + * + * Returns: + * BCME_OK Pool deleted ok. + * other Pool not deleted due to indicated error. + * + */ +int bcm_mpm_delete_prealloc_pool(bcm_mpm_mgr_h mgr, bcm_mp_pool_h *poolp); + +/* + * bcm_mpm_create_heap_pool() - Create a new pool for fixed size objects. The memory + * pool allocator uses the heap (malloc/free) for memory. + * In this case, the pool allocator is just providing + * statistics and instrumentation on top of the heap, + * without modifying the heap allocation implementation. + * + * Parameters: + * mgr: INPUT The handle to the pool manager + * obj_sz: INPUT Size of objects that will be allocated by the new pool + * poolname INPUT For instrumentation, the name of the pool + * newp: OUTPUT The handle for the new pool, if creation is successful + * + * Returns: + * BCME_OK Pool created ok. + * other Pool not created due to indicated error. newpoolp set to NULL. + * + * + */ +int bcm_mpm_create_heap_pool(bcm_mpm_mgr_h mgr, unsigned int obj_sz, + const char poolname[BCM_MP_NAMELEN], + bcm_mp_pool_h *newp); + + +/* + * bcm_mpm_delete_heap_pool() - Delete a memory pool. This should only be called after + * all memory objects have been freed back to the pool. + * + * Parameters: + * mgr: INPUT The handle to the pools manager + * pool: INPUT The handle of the pool to delete + * + * Returns: + * BCME_OK Pool deleted ok. + * other Pool not deleted due to indicated error. + * + */ +int bcm_mpm_delete_heap_pool(bcm_mpm_mgr_h mgr, bcm_mp_pool_h *poolp); + + +/* + * bcm_mpm_stats() - Return stats for all pools + * + * Parameters: + * mgr: INPUT The handle to the pools manager + * stats: OUTPUT Array of pool statistics. + * nentries: MOD Max elements in 'stats' array on INPUT. Actual number + * of array elements copied to 'stats' on OUTPUT. + * + * Returns: + * BCME_OK Ok + * other Error getting stats. + * + */ +int bcm_mpm_stats(bcm_mpm_mgr_h mgr, bcm_mp_stats_t *stats, int *nentries); + + +/* + * bcm_mpm_dump() - Display statistics on all pools + * + * Parameters: + * mgr: INPUT The handle to the pools manager + * b: OUTPUT Output buffer. + * + * Returns: + * BCME_OK Ok + * other Error during dump. + * + */ +int bcm_mpm_dump(bcm_mpm_mgr_h mgr, struct bcmstrbuf *b); + + +/* + * bcm_mpm_get_obj_size() - The size of memory objects may need to be padded to + * compensate for alignment requirements of the objects. + * This function provides the padded object size. If clients + * pre-allocate a memory slab for a memory pool, the + * padded object size should be used by the client to allocate + * the memory slab (in order to provide sufficent space for + * the maximum number of objects). + * + * Parameters: + * mgr: INPUT The handle to the pools manager. + * obj_sz: INPUT Input object size. + * padded_obj_sz: OUTPUT Padded object size. + * + * Returns: + * BCME_OK Ok + * BCME_BADARG Bad arguments. + * + */ +int bcm_mpm_get_obj_size(bcm_mpm_mgr_h mgr, unsigned int obj_sz, unsigned int *padded_obj_sz); + + +/* +*************************************************************************** +* +* API Routines on a specific pool. +* +*************************************************************************** +*/ + + +/* + * bcm_mp_alloc() - Allocate a memory pool object. + * + * Parameters: + * pool: INPUT The handle to the pool. + * + * Returns: + * A pointer to the new object. NULL on error. + * + */ +void* bcm_mp_alloc(bcm_mp_pool_h pool); + +/* + * bcm_mp_free() - Free a memory pool object. + * + * Parameters: + * pool: INPUT The handle to the pool. + * objp: INPUT A pointer to the object to free. + * + * Returns: + * BCME_OK Ok + * other Error during free. + * + */ +int bcm_mp_free(bcm_mp_pool_h pool, void *objp); + +/* + * bcm_mp_stats() - Return stats for this pool + * + * Parameters: + * pool: INPUT The handle to the pool + * stats: OUTPUT Pool statistics + * + * Returns: + * BCME_OK Ok + * other Error getting statistics. + * + */ +int bcm_mp_stats(bcm_mp_pool_h pool, bcm_mp_stats_t *stats); + + +/* + * bcm_mp_dump() - Dump a pool + * + * Parameters: + * pool: INPUT The handle to the pool + * b OUTPUT Output buffer + * + * Returns: + * BCME_OK Ok + * other Error during dump. + * + */ +int bcm_mp_dump(bcm_mp_pool_h pool, struct bcmstrbuf *b); + + +#endif /* _BCM_MPOOL_PUB_H */ diff --git a/external/cache/sources/wl/include/bcmcdc.h b/external/cache/sources/wl/include/bcmcdc.h new file mode 100644 index 0000000..b374ee8 --- /dev/null +++ b/external/cache/sources/wl/include/bcmcdc.h @@ -0,0 +1,117 @@ +/* + * CDC network driver ioctl/indication encoding + * Broadcom 802.11abg Networking Device Driver + * + * Definitions subject to change without notice. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmcdc.h 291086 2011-10-21 01:17:24Z linm $ + */ +#ifndef _bcmcdc_h_ +#define _bcmcdc_h_ +#include + +typedef struct cdc_ioctl { + uint32 cmd; /* ioctl command value */ + uint32 len; /* lower 16: output buflen; upper 16: input buflen (excludes header) */ + uint32 flags; /* flag defns given below */ + uint32 status; /* status code returned from the device */ +} cdc_ioctl_t; + +/* Max valid buffer size that can be sent to the dongle */ +#define CDC_MAX_MSG_SIZE ETHER_MAX_LEN + +/* len field is divided into input and output buffer lengths */ +#define CDCL_IOC_OUTLEN_MASK 0x0000FFFF /* maximum or expected response length, */ + /* excluding IOCTL header */ +#define CDCL_IOC_OUTLEN_SHIFT 0 +#define CDCL_IOC_INLEN_MASK 0xFFFF0000 /* input buffer length, excluding IOCTL header */ +#define CDCL_IOC_INLEN_SHIFT 16 + +/* CDC flag definitions */ +#define CDCF_IOC_ERROR 0x01 /* 0=success, 1=ioctl cmd failed */ +#define CDCF_IOC_SET 0x02 /* 0=get, 1=set cmd */ +#define CDCF_IOC_OVL_IDX_MASK 0x3c /* overlay region index mask */ +#define CDCF_IOC_OVL_RSV 0x40 /* 1=reserve this overlay region */ +#define CDCF_IOC_OVL 0x80 /* 1=this ioctl corresponds to an overlay */ +#define CDCF_IOC_ACTION_MASK 0xfe /* SET/GET, OVL_IDX, OVL_RSV, OVL mask */ +#define CDCF_IOC_ACTION_SHIFT 1 /* SET/GET, OVL_IDX, OVL_RSV, OVL shift */ +#define CDCF_IOC_IF_MASK 0xF000 /* I/F index */ +#define CDCF_IOC_IF_SHIFT 12 +#define CDCF_IOC_ID_MASK 0xFFFF0000 /* used to uniquely id an ioctl req/resp pairing */ +#define CDCF_IOC_ID_SHIFT 16 /* # of bits of shift for ID Mask */ + +#define CDC_IOC_IF_IDX(flags) (((flags) & CDCF_IOC_IF_MASK) >> CDCF_IOC_IF_SHIFT) +#define CDC_IOC_ID(flags) (((flags) & CDCF_IOC_ID_MASK) >> CDCF_IOC_ID_SHIFT) + +#define CDC_GET_IF_IDX(hdr) \ + ((int)((((hdr)->flags) & CDCF_IOC_IF_MASK) >> CDCF_IOC_IF_SHIFT)) +#define CDC_SET_IF_IDX(hdr, idx) \ + ((hdr)->flags = (((hdr)->flags & ~CDCF_IOC_IF_MASK) | ((idx) << CDCF_IOC_IF_SHIFT))) + +/* + * BDC header + * + * The BDC header is used on data packets to convey priority across USB. + */ + +#define BDC_HEADER_LEN 4 + +#define BDC_PROTO_VER_1 1 /* Old Protocol version */ +#define BDC_PROTO_VER 2 /* Protocol version */ + +#define BDC_FLAG_VER_MASK 0xf0 /* Protocol version mask */ +#define BDC_FLAG_VER_SHIFT 4 /* Protocol version shift */ + +#ifndef EXT_STA +#define BDC_FLAG__UNUSED 0x03 /* Unassigned */ +#else +#define BDC_FLAG_EXEMPT 0x03 /* Vista/EXT_STA: use for encryption exemption */ +#endif /* EXT_STA */ +#define BDC_FLAG_SUM_GOOD 0x04 /* Dongle has verified good RX checksums */ +#define BDC_FLAG_SUM_NEEDED 0x08 /* Dongle needs to do TX checksums */ + +#define BDC_PRIORITY_MASK 0x7 + +#define BDC_FLAG2_FC_FLAG 0x10 /* flag to indicate if pkt contains */ + /* FLOW CONTROL info only */ +#define BDC_PRIORITY_FC_SHIFT 4 /* flow control info shift */ + +#define BDC_FLAG2_IF_MASK 0x0f /* APSTA: interface on which the packet was received */ +#define BDC_FLAG2_IF_SHIFT 0 +/* XXX PR86912 WAR: host pads out to multiple of 64 bytes; device trims pad bytes */ +#define BDC_FLAG2_PAD_MASK 0xf0 +#define BDC_FLAG_PAD_MASK 0x03 +#define BDC_FLAG2_PAD_SHIFT 2 +#define BDC_FLAG_PAD_SHIFT 0 +#define BDC_FLAG2_PAD_IDX 0x3c +#define BDC_FLAG_PAD_IDX 0x03 +#define BDC_GET_PAD_LEN(hdr) \ + ((int)(((((hdr)->flags2) & BDC_FLAG2_PAD_MASK) >> BDC_FLAG2_PAD_SHIFT) | \ + ((((hdr)->flags) & BDC_FLAG_PAD_MASK) >> BDC_FLAG_PAD_SHIFT))) +#define BDC_SET_PAD_LEN(hdr, idx) \ + ((hdr)->flags2 = (((hdr)->flags2 & ~BDC_FLAG2_PAD_MASK) | \ + (((idx) & BDC_FLAG2_PAD_IDX) << BDC_FLAG2_PAD_SHIFT))); \ + ((hdr)->flags = (((hdr)->flags & ~BDC_FLAG_PAD_MASK) | \ + (((idx) & BDC_FLAG_PAD_IDX) << BDC_FLAG_PAD_SHIFT))) +/* XXX END PR86912 WAR */ + +#define BDC_GET_IF_IDX(hdr) \ + ((int)((((hdr)->flags2) & BDC_FLAG2_IF_MASK) >> BDC_FLAG2_IF_SHIFT)) +#define BDC_SET_IF_IDX(hdr, idx) \ + ((hdr)->flags2 = (((hdr)->flags2 & ~BDC_FLAG2_IF_MASK) | ((idx) << BDC_FLAG2_IF_SHIFT))) + +struct bdc_header { + uint8 flags; /* Flags */ + uint8 priority; /* 802.1d Priority 0:2 bits, 4:7 USB flow control info */ + uint8 flags2; + uint8 dataOffset; /* Offset from end of BDC header to packet data, in + * 4-byte words. Leaves room for optional headers. + */ +}; + +/* XXX: Just to keep support for old twigs */ +#define BDC_PROTO_VER_1 1 /* Old Protocol version */ + +#endif /* _bcmcdc_h_ */ diff --git a/external/cache/sources/wl/include/bcmdefs.h b/external/cache/sources/wl/include/bcmdefs.h new file mode 100644 index 0000000..3270e20 --- /dev/null +++ b/external/cache/sources/wl/include/bcmdefs.h @@ -0,0 +1,371 @@ +/* + * Misc system wide definitions + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmdefs.h 401759 2013-05-13 16:08:08Z sudhirbs $ + */ + +#ifndef _bcmdefs_h_ +#define _bcmdefs_h_ + +/* + * One doesn't need to include this file explicitly, gets included automatically if + * typedefs.h is included. + */ + +/* Use BCM_REFERENCE to suppress warnings about intentionally-unused function + * arguments or local variables. + */ +#define BCM_REFERENCE(data) ((void)(data)) + +#ifdef EFI +#define STATIC_ASSERT(expr) ASSERT((expr)) +#else +/* Compile-time assert can be used in place of ASSERT if the expression evaluates + * to a constant at compile time. + */ +#define STATIC_ASSERT(expr) { \ + /* Make sure the expression is constant. */ \ + typedef enum { _STATIC_ASSERT_NOT_CONSTANT = (expr) } _static_assert_e; \ + /* Make sure the expression is true. */ \ + typedef char STATIC_ASSERT_FAIL[(expr) ? 1 : -1]; \ +} +#endif + +/* Reclaiming text and data : + * The following macros specify special linker sections that can be reclaimed + * after a system is considered 'up'. + * BCMATTACHFN is also used for detach functions (it's not worth having a BCMDETACHFN, + * as in most cases, the attach function calls the detach function to clean up on error). + */ +#ifdef DONGLEBUILD + +extern bool bcmreclaimed; +extern bool attach_part_reclaimed; + +#define BCMATTACHDATA(_data) __attribute__ ((__section__ (".dataini2." #_data))) _data +#define BCMATTACHFN(_fn) __attribute__ ((__section__ (".textini2." #_fn), noinline)) _fn + +#ifndef PREATTACH_NORECLAIM +#define BCMPREATTACHDATA(_data) __attribute__ ((__section__ (".dataini3." #_data))) _data +#define BCMPREATTACHFN(_fn) __attribute__ ((__section__ (".textini3." #_fn), noinline)) _fn +#else +#define BCMPREATTACHDATA(_data) __attribute__ ((__section__ (".dataini2." #_data))) _data +#define BCMPREATTACHFN(_fn) __attribute__ ((__section__ (".textini2." #_fn), noinline)) _fn +#endif + +#if defined(BCMRECLAIM) +#define BCMINITDATA(_data) __attribute__ ((__section__ (".dataini1." #_data))) _data +#define BCMINITFN(_fn) __attribute__ ((__section__ (".textini1." #_fn), noinline)) _fn +#define CONST +#else +#define BCMINITDATA(_data) _data +#define BCMINITFN(_fn) _fn +#define CONST const +#endif + +/* Non-manufacture or internal attach function/dat */ +#if !(defined(WLTEST) || defined(BCMINTERNAL)) +#define BCMNMIATTACHFN(_fn) BCMATTACHFN(_fn) +#define BCMNMIATTACHDATA(_data) BCMATTACHDATA(_data) +#else +#define BCMNMIATTACHFN(_fn) _fn +#define BCMNMIATTACHDATA(_data) _data +#endif /* WLTEST || BCMINTERNAL */ + +#ifdef BCMNODOWN +#define BCMUNINITFN(_fn) BCMINITFN(_fn) +#else +#define BCMUNINITFN(_fn) _fn +#endif + +#define BCMFASTPATH +#else /* DONGLEBUILD */ + +#define bcmreclaimed 0 +#define BCMATTACHDATA(_data) _data +#define BCMATTACHFN(_fn) _fn +#define BCMPREATTACHDATA(_data) _data +#define BCMPREATTACHFN(_fn) _fn +#define BCMINITDATA(_data) _data +#define BCMINITFN(_fn) _fn +#define BCMUNINITFN(_fn) _fn +#define BCMNMIATTACHFN(_fn) _fn +#define BCMNMIATTACHDATA(_data) _data +#define CONST const +#if defined(BCM47XX) && defined(__ARM_ARCH_7A__) +#define BCM47XX_CA9 +#else +#undef BCM47XX_CA9 +#endif +#ifndef BCMFASTPATH +#if defined(mips) || defined(BCM47XX_CA9) +#define BCMFASTPATH __attribute__ ((__section__ (".text.fastpath"))) +#define BCMFASTPATH_HOST __attribute__ ((__section__ (".text.fastpath_host"))) +#else +#define BCMFASTPATH +#define BCMFASTPATH_HOST +#endif +#endif /* BCMFASTPATH */ + +#endif /* DONGLEBUILD */ + +#if defined(BCMROMOFFLOAD) || defined(BCMROMBUILD) +typedef struct { + uint16 esiz; + uint16 cnt; + void *addr; +} bcmromdat_patch_t; +#endif + +/* Put some library data/code into ROM to reduce RAM requirements */ +#if defined(BCMROMOFFLOAD) +#define BCMROMBASE ((uint32) 0x1e000000) +#define BCMROMEND (BCMROMBASE + (uint32) 0x100000) + +/* These are legacy macros - make them nop's. */ +#define BCMROMDATA(_data) _data +#define BCMROMFN(_fn) _fn + +#define STATIC static + +#define BCMROMDAT_NAME(_data) _data +#define BCMROMDAT_ARYSIZ(data) ARRAYSIZE(data) +#define BCMROMDAT_SIZEOF(data) sizeof(data) +#define BCMROMDAT_APATCH(data) \ + bcmromdat_patch_t BCMROMDATA(data##__bcmpatch) = \ + { sizeof(data[0]), sizeof(data)/sizeof(data[0]), ((void*)data) }; +#define BCMROMDAT_SPATCH(data) \ + bcmromdat_patch_t BCMROMDATA(data##__bcmpatch) = \ + { sizeof(data), 1, ((void*)&data) }; +#define BCMROMFN_NAME(_fn) _fn +#elif defined(BCMROMBUILD) && !defined(BCMROMSYMGEN_BUILD) && !defined(BCMJMPTBL_TCAM) +#include +#define STATIC static +#else /* !BCMROMBUILD */ +#define BCMROMDATA(_data) _data +#define BCMROMDAT_NAME(_data) _data +#define BCMROMFN(_fn) _fn +#define BCMROMFN_NAME(_fn) _fn +#define STATIC static +#define BCMROMDAT_ARYSIZ(data) ARRAYSIZE(data) +#define BCMROMDAT_SIZEOF(data) sizeof(data) +#define BCMROMDAT_APATCH(data) +#define BCMROMDAT_SPATCH(data) +#endif /* !BCMROMBUILD */ + +/* Bus types */ +#define SI_BUS 0 /* SOC Interconnect */ +#define PCI_BUS 1 /* PCI target */ +#define PCMCIA_BUS 2 /* PCMCIA target */ +#define SDIO_BUS 3 /* SDIO target */ +#define JTAG_BUS 4 /* JTAG */ +#define USB_BUS 5 /* USB (does not support R/W REG) */ +#define SPI_BUS 6 /* gSPI target */ +#define RPC_BUS 7 /* RPC target */ + +/* Allows size optimization for single-bus image */ +#ifdef BCMBUSTYPE +#define BUSTYPE(bus) (BCMBUSTYPE) +#else +#define BUSTYPE(bus) (bus) +#endif + +/* Allows size optimization for single-backplane image */ +#ifdef BCMCHIPTYPE +#define CHIPTYPE(bus) (BCMCHIPTYPE) +#else +#define CHIPTYPE(bus) (bus) +#endif + + +/* Allows size optimization for SPROM support */ +#if defined(BCMSPROMBUS) +#define SPROMBUS (BCMSPROMBUS) +#elif defined(SI_PCMCIA_SROM) +#define SPROMBUS (PCMCIA_BUS) +#else +#define SPROMBUS (PCI_BUS) +#endif + +/* Allows size optimization for single-chip image */ +/* XXX These macros are NOT meant to encourage writing chip-specific code. + * Use them only when it is appropriate for example in PMU PLL/CHIP/SWREG + * controls and in chip-specific workarounds. + */ +#ifdef BCMCHIPID +#define CHIPID(chip) (BCMCHIPID) +#else +#define CHIPID(chip) (chip) +#endif + +#ifdef BCMCHIPREV +#define CHIPREV(rev) (BCMCHIPREV) +#else +#define CHIPREV(rev) (rev) +#endif + +/* Defines for DMA Address Width - Shared between OSL and HNDDMA */ +#define DMADDR_MASK_32 0x0 /* Address mask for 32-bits */ +#define DMADDR_MASK_30 0xc0000000 /* Address mask for 30-bits */ +#define DMADDR_MASK_0 0xffffffff /* Address mask for 0-bits (hi-part) */ + +#define DMADDRWIDTH_30 30 /* 30-bit addressing capability */ +#define DMADDRWIDTH_32 32 /* 32-bit addressing capability */ +#define DMADDRWIDTH_63 63 /* 64-bit addressing capability */ +#define DMADDRWIDTH_64 64 /* 64-bit addressing capability */ + +#ifdef BCMDMA64OSL +typedef struct { + uint32 loaddr; + uint32 hiaddr; +} dma64addr_t; + +typedef dma64addr_t dmaaddr_t; +#define PHYSADDRHI(_pa) ((_pa).hiaddr) +#define PHYSADDRHISET(_pa, _val) \ + do { \ + (_pa).hiaddr = (_val); \ + } while (0) +#define PHYSADDRLO(_pa) ((_pa).loaddr) +#define PHYSADDRLOSET(_pa, _val) \ + do { \ + (_pa).loaddr = (_val); \ + } while (0) + +#else +typedef unsigned long dmaaddr_t; +#define PHYSADDRHI(_pa) (0) +#define PHYSADDRHISET(_pa, _val) +#define PHYSADDRLO(_pa) ((_pa)) +#define PHYSADDRLOSET(_pa, _val) \ + do { \ + (_pa) = (_val); \ + } while (0) +#endif /* BCMDMA64OSL */ + +/* One physical DMA segment */ +typedef struct { + dmaaddr_t addr; + uint32 length; +} hnddma_seg_t; + +#if defined(MACOSX) +/* In MacOS, the OS API may return large number of segments. Setting this number lower + * will result in failure of dma map + */ +#define MAX_DMA_SEGS 8 +#elif defined(__NetBSD__) +/* In NetBSD we also want more segments because the lower level mbuf mapping api might + * allocate a large number of segments + */ +#define MAX_DMA_SEGS 32 +#elif defined(linux) +#define MAX_DMA_SEGS 8 +#else +#define MAX_DMA_SEGS 4 +#endif + + +typedef struct { + void *oshdmah; /* Opaque handle for OSL to store its information */ + uint origsize; /* Size of the virtual packet */ + uint nsegs; + hnddma_seg_t segs[MAX_DMA_SEGS]; +} hnddma_seg_map_t; + + +/* packet headroom necessary to accommodate the largest header in the system, (i.e TXOFF). + * By doing, we avoid the need to allocate an extra buffer for the header when bridging to WL. + * There is a compile time check in wlc.c which ensure that this value is at least as big + * as TXOFF. This value is used in dma_rxfill (hnddma.c). + */ + +#if defined(BCM_RPC_NOCOPY) || defined(BCM_RCP_TXNOCOPY) +/* add 40 bytes to allow for extra RPC header and info */ +#define BCMEXTRAHDROOM 260 +#else /* BCM_RPC_NOCOPY || BCM_RPC_TXNOCOPY */ +#ifdef CTFMAP +#define BCMEXTRAHDROOM 208 +#else /* CTFMAP */ +#define BCMEXTRAHDROOM 204 +#endif /* CTFMAP */ +#endif /* BCM_RPC_NOCOPY || BCM_RPC_TXNOCOPY */ + +/* Packet alignment for most efficient SDIO (can change based on platform) */ +#ifndef SDALIGN +#define SDALIGN 32 +#endif + +/* Headroom required for dongle-to-host communication. Packets allocated + * locally in the dongle (e.g. for CDC ioctls or RNDIS messages) should + * leave this much room in front for low-level message headers which may + * be needed to get across the dongle bus to the host. (These messages + * don't go over the network, so room for the full WL header above would + * be a waste.). +*/ +/* + * XXX: set the numbers to be MAX of all the devices, to avoid problems with ROM builds + * USB BCMDONGLEHDRSZ and BCMDONGLEPADSZ is 0 + * SDIO BCMDONGLEHDRSZ 12 and BCMDONGLEPADSZ 16 +*/ +#define BCMDONGLEHDRSZ 12 +#define BCMDONGLEPADSZ 16 + +#define BCMDONGLEOVERHEAD (BCMDONGLEHDRSZ + BCMDONGLEPADSZ) + +#ifdef BCMDBG + +#ifndef BCMDBG_ERR +#define BCMDBG_ERR +#endif /* BCMDBG_ERR */ + +#ifndef BCMDBG_ASSERT +#define BCMDBG_ASSERT +#endif /* BCMDBG_ASSERT */ + +#endif /* BCMDBG */ + +#if defined(BCMDBG_ASSERT) || defined(BCMASSERT_LOG) +#define BCMASSERT_SUPPORT +#endif /* BCMDBG_ASSERT || BCMASSERT_LOG */ + +/* Macros for doing definition and get/set of bitfields + * Usage example, e.g. a three-bit field (bits 4-6): + * #define _M BITFIELD_MASK(3) + * #define _S 4 + * ... + * regval = R_REG(osh, ®s->regfoo); + * field = GFIELD(regval, ); + * regval = SFIELD(regval, , 1); + * W_REG(osh, ®s->regfoo, regval); + */ +#define BITFIELD_MASK(width) \ + (((unsigned)1 << (width)) - 1) +#define GFIELD(val, field) \ + (((val) >> field ## _S) & field ## _M) +#define SFIELD(val, field, bits) \ + (((val) & (~(field ## _M << field ## _S))) | \ + ((unsigned)(bits) << field ## _S)) + +/* define BCMSMALL to remove misc features for memory-constrained environments */ +#ifdef BCMSMALL +#undef BCMSPACE +#define bcmspace FALSE /* if (bcmspace) code is discarded */ +#else +#define BCMSPACE +#define bcmspace TRUE /* if (bcmspace) code is retained */ +#endif + +/* Max. nvram variable table size */ +#ifndef MAXSZ_NVRAM_VARS +#define MAXSZ_NVRAM_VARS 4096 /* XXX should be reduced */ +#endif + + +#ifdef EFI +#define __attribute__(x) /* CSTYLED */ +#endif + +#endif /* _bcmdefs_h_ */ diff --git a/external/cache/sources/wl/include/bcmdevs.h b/external/cache/sources/wl/include/bcmdevs.h new file mode 100644 index 0000000..e55b15a --- /dev/null +++ b/external/cache/sources/wl/include/bcmdevs.h @@ -0,0 +1,1014 @@ +/* + * Broadcom device-specific manifest constants. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmdevs.h 401759 2013-05-13 16:08:08Z sudhirbs $ + */ + +#ifndef _BCMDEVS_H +#define _BCMDEVS_H + +/* PCI vendor IDs */ +#define VENDOR_EPIGRAM 0xfeda +#define VENDOR_BROADCOM 0x14e4 +#define VENDOR_3COM 0x10b7 +#define VENDOR_NETGEAR 0x1385 +#define VENDOR_DIAMOND 0x1092 +#define VENDOR_INTEL 0x8086 +#define VENDOR_DELL 0x1028 +#define VENDOR_HP 0x103c +#define VENDOR_HP_COMPAQ 0x0e11 +#define VENDOR_APPLE 0x106b +#define VENDOR_SI_IMAGE 0x1095 /* Silicon Image, used by Arasan SDIO Host */ +#define VENDOR_BUFFALO 0x1154 /* Buffalo vendor id */ +#define VENDOR_TI 0x104c /* Texas Instruments */ +#define VENDOR_RICOH 0x1180 /* Ricoh */ +#define VENDOR_JMICRON 0x197b + +#ifdef BCMINTERNAL +#define VENDOR_JINVANI 0x1947 /* Jinvani Systech, Inc. */ +#endif + +/* PCMCIA vendor IDs */ +#define VENDOR_BROADCOM_PCMCIA 0x02d0 + +/* SDIO vendor IDs */ +#define VENDOR_BROADCOM_SDIO 0x00BF + +/* DONGLE VID/PIDs */ +#define BCM_DNGL_VID 0x0a5c +#define BCM_DNGL_BL_PID_4328 0xbd12 +#define BCM_DNGL_BL_PID_4322 0xbd13 +#define BCM_DNGL_BL_PID_4319 0xbd16 +#define BCM_DNGL_BL_PID_43236 0xbd17 +#define BCM_DNGL_BL_PID_4332 0xbd18 +#define BCM_DNGL_BL_PID_4330 0xbd19 +#define BCM_DNGL_BL_PID_4334 0xbd1a +#define BCM_DNGL_BL_PID_43239 0xbd1b +#define BCM_DNGL_BL_PID_4324 0xbd1c +#define BCM_DNGL_BL_PID_4360 0xbd1d +#define BCM_DNGL_BL_PID_43143 0xbd1e +#define BCM_DNGL_BL_PID_43242 0xbd1f +#define BCM_DNGL_BL_PID_43342 0xbd21 +#define BCM_DNGL_BL_PID_4335 0xbd20 +#define BCM_DNGL_BL_PID_43341 0xbd22 +#define BCM_DNGL_BL_PID_4350 0xbd23 +#ifdef UNRELEASEDCHIP +#define BCM_DNGL_BL_PID_4345 0xbd24 +#endif /* UNRELEASEDCHIP */ + +#define BCM_DNGL_BDC_PID 0x0bdc +#define BCM_DNGL_JTAG_PID 0x4a44 + +/* HW USB BLOCK [CPULESS USB] PIDs */ +#define BCM_HWUSB_PID_43239 43239 + +/* PCI Device IDs */ +#define BCM4210_DEVICE_ID 0x1072 /* never used */ +#define BCM4230_DEVICE_ID 0x1086 /* never used */ +#define BCM4401_ENET_ID 0x170c /* 4401b0 production enet cards */ +#define BCM3352_DEVICE_ID 0x3352 /* bcm3352 device id */ +#define BCM3360_DEVICE_ID 0x3360 /* bcm3360 device id */ +#define BCM4211_DEVICE_ID 0x4211 +#define BCM4231_DEVICE_ID 0x4231 +#define BCM4303_D11B_ID 0x4303 /* 4303 802.11b */ +#define BCM4311_D11G_ID 0x4311 /* 4311 802.11b/g id */ +#define BCM4311_D11DUAL_ID 0x4312 /* 4311 802.11a/b/g id */ +#define BCM4311_D11A_ID 0x4313 /* 4311 802.11a id */ +#define BCM4328_D11DUAL_ID 0x4314 /* 4328/4312 802.11a/g id */ +#define BCM4328_D11G_ID 0x4315 /* 4328/4312 802.11g id */ +#define BCM4328_D11A_ID 0x4316 /* 4328/4312 802.11a id */ +#define BCM4318_D11G_ID 0x4318 /* 4318 802.11b/g id */ +#define BCM4318_D11DUAL_ID 0x4319 /* 4318 802.11a/b/g id */ +#define BCM4318_D11A_ID 0x431a /* 4318 802.11a id */ +#define BCM4325_D11DUAL_ID 0x431b /* 4325 802.11a/g id */ +#define BCM4325_D11G_ID 0x431c /* 4325 802.11g id */ +#define BCM4325_D11A_ID 0x431d /* 4325 802.11a id */ +#define BCM4306_D11G_ID 0x4320 /* 4306 802.11g */ +#define BCM4306_D11A_ID 0x4321 /* 4306 802.11a */ +#define BCM4306_UART_ID 0x4322 /* 4306 uart */ +#define BCM4306_V90_ID 0x4323 /* 4306 v90 codec */ +#define BCM4306_D11DUAL_ID 0x4324 /* 4306 dual A+B */ +#define BCM4306_D11G_ID2 0x4325 /* BCM4306_D11G_ID; INF w/loose binding war */ +#define BCM4321_D11N_ID 0x4328 /* 4321 802.11n dualband id */ +#define BCM4321_D11N2G_ID 0x4329 /* 4321 802.11n 2.4Ghz band id */ +#define BCM4321_D11N5G_ID 0x432a /* 4321 802.11n 5Ghz band id */ +#define BCM4322_D11N_ID 0x432b /* 4322 802.11n dualband device */ +#define BCM4322_D11N2G_ID 0x432c /* 4322 802.11n 2.4GHz device */ +#define BCM4322_D11N5G_ID 0x432d /* 4322 802.11n 5GHz device */ +#define BCM4329_D11N_ID 0x432e /* 4329 802.11n dualband device */ +#define BCM4329_D11N2G_ID 0x432f /* 4329 802.11n 2.4G device */ +#define BCM4329_D11N5G_ID 0x4330 /* 4329 802.11n 5G device */ +#define BCM4315_D11DUAL_ID 0x4334 /* 4315 802.11a/g id */ +#define BCM4315_D11G_ID 0x4335 /* 4315 802.11g id */ +#define BCM4315_D11A_ID 0x4336 /* 4315 802.11a id */ +#define BCM4319_D11N_ID 0x4337 /* 4319 802.11n dualband device */ +#define BCM4319_D11N2G_ID 0x4338 /* 4319 802.11n 2.4G device */ +#define BCM4319_D11N5G_ID 0x4339 /* 4319 802.11n 5G device */ +#define BCM43231_D11N2G_ID 0x4340 /* 43231 802.11n 2.4GHz device */ +#define BCM43221_D11N2G_ID 0x4341 /* 43221 802.11n 2.4GHz device */ +#define BCM43222_D11N_ID 0x4350 /* 43222 802.11n dualband device */ +#define BCM43222_D11N2G_ID 0x4351 /* 43222 802.11n 2.4GHz device */ +#define BCM43222_D11N5G_ID 0x4352 /* 43222 802.11n 5GHz device */ +#define BCM43224_D11N_ID 0x4353 /* 43224 802.11n dualband device */ +#define BCM43224_D11N_ID_VEN1 0x0576 /* Vendor specific 43224 802.11n db device */ +#define BCM43226_D11N_ID 0x4354 /* 43226 802.11n dualband device */ +#define BCM43236_D11N_ID 0x4346 /* 43236 802.11n dualband device */ +#define BCM43236_D11N2G_ID 0x4347 /* 43236 802.11n 2.4GHz device */ +#define BCM43236_D11N5G_ID 0x4348 /* 43236 802.11n 5GHz device */ +#define BCM43225_D11N2G_ID 0x4357 /* 43225 802.11n 2.4GHz device */ +#define BCM43421_D11N_ID 0xA99D /* 43421 802.11n dualband device */ +#define BCM4313_D11N2G_ID 0x4727 /* 4313 802.11n 2.4G device */ +#define BCM4330_D11N_ID 0x4360 /* 4330 802.11n dualband device */ +#define BCM4330_D11N2G_ID 0x4361 /* 4330 802.11n 2.4G device */ +#define BCM4330_D11N5G_ID 0x4362 /* 4330 802.11n 5G device */ +#define BCM4336_D11N_ID 0x4343 /* 4336 802.11n 2.4GHz device */ +#define BCM6362_D11N_ID 0x435f /* 6362 802.11n dualband device */ +#define BCM6362_D11N2G_ID 0x433f /* 6362 802.11n 2.4Ghz band id */ +#define BCM6362_D11N5G_ID 0x434f /* 6362 802.11n 5Ghz band id */ +#define BCM4331_D11N_ID 0x4331 /* 4331 802.11n dualband id */ +#define BCM4331_D11N2G_ID 0x4332 /* 4331 802.11n 2.4Ghz band id */ +#define BCM4331_D11N5G_ID 0x4333 /* 4331 802.11n 5Ghz band id */ +#define BCM43237_D11N_ID 0x4355 /* 43237 802.11n dualband device */ +#define BCM43237_D11N5G_ID 0x4356 /* 43237 802.11n 5GHz device */ +#define BCM43227_D11N2G_ID 0x4358 /* 43228 802.11n 2.4GHz device */ +#define BCM43228_D11N_ID 0x4359 /* 43228 802.11n DualBand device */ +#define BCM43228_D11N5G_ID 0x435a /* 43228 802.11n 5GHz device */ +#define BCM43362_D11N_ID 0x4363 /* 43362 802.11n 2.4GHz device */ +#define BCM43239_D11N_ID 0x4370 /* 43239 802.11n dualband device */ +#define BCM4324_D11N_ID 0x4374 /* 4324 802.11n dualband device */ +#define BCM43217_D11N2G_ID 0x43a9 /* 43217 802.11n 2.4GHz device */ +#define BCM43131_D11N2G_ID 0x43aa /* 43131 802.11n 2.4GHz device */ +#define BCM4314_D11N2G_ID 0x4364 /* 4314 802.11n 2.4G device */ +#define BCM43142_D11N2G_ID 0x4365 /* 43142 802.11n 2.4G device */ +#define BCM43143_D11N2G_ID 0x4366 /* 43143 802.11n 2.4G device */ +#define BCM4334_D11N_ID 0x4380 /* 4334 802.11n dualband device */ +#define BCM4334_D11N2G_ID 0x4381 /* 4334 802.11n 2.4G device */ +#define BCM4334_D11N5G_ID 0x4382 /* 4334 802.11n 5G device */ +#define BCM43342_D11N_ID 0x4383 /* 43342 802.11n dualband device */ +#define BCM43342_D11N2G_ID 0x4384 /* 43342 802.11n 2.4G device */ +#define BCM43342_D11N5G_ID 0x4385 /* 43342 802.11n 5G device */ +#define BCM43341_D11N_ID 0x4386 /* 43341 802.11n dualband device */ +#define BCM43341_D11N2G_ID 0x4387 /* 43341 802.11n 2.4G device */ +#define BCM43341_D11N5G_ID 0x4388 /* 43341 802.11n 5G device */ +#define BCM4360_D11AC_ID 0x43a0 +#define BCM4360_D11AC2G_ID 0x43a1 +#define BCM4360_D11AC5G_ID 0x43a2 +#ifdef UNRELEASEDCHIP +#define BCM4345_D11AC_ID 0x43ab /* 4345 802.11ac dualband device */ +#define BCM4345_D11AC2G_ID 0x43ac /* 4345 802.11ac 2.4G device */ +#define BCM4345_D11AC5G_ID 0x43ad /* 4345 802.11ac 5G device */ +#endif /* UNRELEASEDCHIP */ +#define BCM4335_D11AC_ID 0x43ae +#define BCM4335_D11AC2G_ID 0x43af +#define BCM4335_D11AC5G_ID 0x43b0 +#define BCM4352_D11AC_ID 0x43b1 /* 4352 802.11ac dualband device */ +#define BCM4352_D11AC2G_ID 0x43b2 /* 4352 802.11ac 2.4G device */ +#define BCM4352_D11AC5G_ID 0x43b3 /* 4352 802.11ac 5G device */ +#ifdef UNRELEASEDCHIP +#define BCM43602_D11AC_ID 0x43ba /* 43602 802.11ac dualband device */ +#define BCM43602_D11AC2G_ID 0x43bb /* 43602 802.11ac 2.4G device */ +#define BCM43602_D11AC5G_ID 0x43bc /* 43602 802.11ac 5G device */ +#endif /* UNRELEASEDCHIP */ + +/* PCI Subsystem ID */ +#define BCM943228HMB_SSID_VEN1 0x0607 +#define BCM94313HMGBL_SSID_VEN1 0x0608 +#define BCM94313HMG_SSID_VEN1 0x0609 +#define BCM943142HM_SSID_VEN1 0x0611 + +#define BCM43143_D11N2G_ID 0x4366 /* 43143 802.11n 2.4G device */ + +#define BCM43242_D11N_ID 0x4367 /* 43242 802.11n dualband device */ +#define BCM43242_D11N2G_ID 0x4368 /* 43242 802.11n 2.4G device */ +#define BCM43242_D11N5G_ID 0x4369 /* 43242 802.11n 5G device */ + +#define BCM4350_D11AC_ID 0x43a3 +#define BCM4350_D11AC2G_ID 0x43a4 +#define BCM4350_D11AC5G_ID 0x43a5 + +#define BCM43556_D11AC_ID 0x43b7 +#define BCM43556_D11AC2G_ID 0x43b8 +#define BCM43556_D11AC5G_ID 0x43b9 + +#ifdef UNRELEASEDCHIP +/* Unreleased PCI Device IDs */ +#define BCM43229_D11N_ID 0x435d /* 43229 802.11n dualband device */ +#define BCM43229_D11N2G_ID 0x435e /* 43229 802.11n 2.4GHz device */ +#define BCM43229_D11N5G_ID 0x435c /* 43229 802.11n 5GHz device (same as 43228?) */ + +#define BCM4337_D11AC_ID 0x43a6 +#define BCM4337_D11AC2G_ID 0x43a7 +#define BCM4337_D11AC5G_ID 0x43a8 + +#endif /* UNRELEASEDCHIP */ + +#define BCMGPRS_UART_ID 0x4333 /* Uart id used by 4306/gprs card */ +#define BCMGPRS2_UART_ID 0x4344 /* Uart id used by 4306/gprs card */ +#define FPGA_JTAGM_ID 0x43f0 /* FPGA jtagm device id */ +#define BCM_JTAGM_ID 0x43f1 /* BCM jtagm device id */ +#define SDIOH_FPGA_ID 0x43f2 /* sdio host fpga */ +#define BCM_SDIOH_ID 0x43f3 /* BCM sdio host id */ +#define SDIOD_FPGA_ID 0x43f4 /* sdio device fpga */ +#define SPIH_FPGA_ID 0x43f5 /* PCI SPI Host Controller FPGA */ +#define BCM_SPIH_ID 0x43f6 /* Synopsis SPI Host Controller */ +#define MIMO_FPGA_ID 0x43f8 /* FPGA mimo minimacphy device id */ +#define BCM_JTAGM2_ID 0x43f9 /* BCM alternate jtagm device id */ +#define SDHCI_FPGA_ID 0x43fa /* Standard SDIO Host Controller FPGA */ +#define BCM4402_ENET_ID 0x4402 /* 4402 enet */ +#define BCM4402_V90_ID 0x4403 /* 4402 v90 codec */ +#define BCM4410_DEVICE_ID 0x4410 /* bcm44xx family pci iline */ +#define BCM4412_DEVICE_ID 0x4412 /* bcm44xx family pci enet */ +#define BCM4430_DEVICE_ID 0x4430 /* bcm44xx family cardbus iline */ +#define BCM4432_DEVICE_ID 0x4432 /* bcm44xx family cardbus enet */ +#define BCM4704_ENET_ID 0x4706 /* 4704 enet (Use 47XX_ENET_ID instead!) */ +#define BCM4710_DEVICE_ID 0x4710 /* 4710 primary function 0 */ +#define BCM47XX_AUDIO_ID 0x4711 /* 47xx audio codec */ +#define BCM47XX_V90_ID 0x4712 /* 47xx v90 codec */ +#define BCM47XX_ENET_ID 0x4713 /* 47xx enet */ +#define BCM47XX_EXT_ID 0x4714 /* 47xx external i/f */ +#define BCM47XX_GMAC_ID 0x4715 /* 47xx Unimac based GbE */ +#define BCM47XX_USBH_ID 0x4716 /* 47xx usb host */ +#define BCM47XX_USBD_ID 0x4717 /* 47xx usb device */ +#define BCM47XX_IPSEC_ID 0x4718 /* 47xx ipsec */ +#define BCM47XX_ROBO_ID 0x4719 /* 47xx/53xx roboswitch core */ +#define BCM47XX_USB20H_ID 0x471a /* 47xx usb 2.0 host */ +#define BCM47XX_USB20D_ID 0x471b /* 47xx usb 2.0 device */ +#define BCM47XX_ATA100_ID 0x471d /* 47xx parallel ATA */ +#define BCM47XX_SATAXOR_ID 0x471e /* 47xx serial ATA & XOR DMA */ +#define BCM47XX_GIGETH_ID 0x471f /* 47xx GbE (5700) */ +#define BCM4712_MIPS_ID 0x4720 /* 4712 base devid */ +#define BCM4716_DEVICE_ID 0x4722 /* 4716 base devid */ +#define BCM47XX_USB30H_ID 0x472a /* 47xx usb 3.0 host */ +#define BCM47XX_USB30D_ID 0x472b /* 47xx usb 3.0 device */ +#define BCM47XX_SMBUS_EMU_ID 0x47fe /* 47xx emulated SMBus device */ +#define BCM47XX_XOR_EMU_ID 0x47ff /* 47xx emulated XOR engine */ +#define EPI41210_DEVICE_ID 0xa0fa /* bcm4210 */ +#define EPI41230_DEVICE_ID 0xa10e /* bcm4230 */ +#define JINVANI_SDIOH_ID 0x4743 /* Jinvani SDIO Gold Host */ +#define BCM27XX_SDIOH_ID 0x2702 /* BCM27xx Standard SDIO Host */ +#define PCIXX21_FLASHMEDIA_ID 0x803b /* TI PCI xx21 Standard Host Controller */ +#define PCIXX21_SDIOH_ID 0x803c /* TI PCI xx21 Standard Host Controller */ +#define R5C822_SDIOH_ID 0x0822 /* Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host */ +#define JMICRON_SDIOH_ID 0x2381 /* JMicron Standard SDIO Host Controller */ + +/* Chip IDs */ +#define BCM4306_CHIP_ID 0x4306 /* 4306 chipcommon chipid */ +#define BCM4311_CHIP_ID 0x4311 /* 4311 PCIe 802.11a/b/g */ +#define BCM43111_CHIP_ID 43111 /* 43111 chipcommon chipid (OTP chipid) */ +#define BCM43112_CHIP_ID 43112 /* 43112 chipcommon chipid (OTP chipid) */ +#define BCM4312_CHIP_ID 0x4312 /* 4312 chipcommon chipid */ +#define BCM4313_CHIP_ID 0x4313 /* 4313 chip id */ +#define BCM43131_CHIP_ID 43131 /* 43131 chip id (OTP chipid) */ +#define BCM4315_CHIP_ID 0x4315 /* 4315 chip id */ +#define BCM4318_CHIP_ID 0x4318 /* 4318 chipcommon chipid */ +#define BCM4319_CHIP_ID 0x4319 /* 4319 chip id */ +#define BCM4320_CHIP_ID 0x4320 /* 4320 chipcommon chipid */ +#define BCM4321_CHIP_ID 0x4321 /* 4321 chipcommon chipid */ +#define BCM43217_CHIP_ID 43217 /* 43217 chip id (OTP chipid) */ +#define BCM4322_CHIP_ID 0x4322 /* 4322 chipcommon chipid */ +#define BCM43221_CHIP_ID 43221 /* 43221 chipcommon chipid (OTP chipid) */ +#define BCM43222_CHIP_ID 43222 /* 43222 chipcommon chipid */ +#define BCM43224_CHIP_ID 43224 /* 43224 chipcommon chipid */ +#define BCM43225_CHIP_ID 43225 /* 43225 chipcommon chipid */ +#define BCM43227_CHIP_ID 43227 /* 43227 chipcommon chipid */ +#define BCM43228_CHIP_ID 43228 /* 43228 chipcommon chipid */ +#define BCM43226_CHIP_ID 43226 /* 43226 chipcommon chipid */ +#define BCM43231_CHIP_ID 43231 /* 43231 chipcommon chipid (OTP chipid) */ +#define BCM43234_CHIP_ID 43234 /* 43234 chipcommon chipid */ +#define BCM43235_CHIP_ID 43235 /* 43235 chipcommon chipid */ +#define BCM43236_CHIP_ID 43236 /* 43236 chipcommon chipid */ +#define BCM43237_CHIP_ID 43237 /* 43237 chipcommon chipid */ +#define BCM43238_CHIP_ID 43238 /* 43238 chipcommon chipid */ +#define BCM43239_CHIP_ID 43239 /* 43239 chipcommon chipid */ +#define BCM43420_CHIP_ID 43420 /* 43222 chipcommon chipid (OTP, RBBU) */ +#define BCM43421_CHIP_ID 43421 /* 43224 chipcommon chipid (OTP, RBBU) */ +#define BCM43428_CHIP_ID 43428 /* 43228 chipcommon chipid (OTP, RBBU) */ +#define BCM43431_CHIP_ID 43431 /* 4331 chipcommon chipid (OTP, RBBU) */ +#define BCM43460_CHIP_ID 43460 /* 4360 chipcommon chipid (OTP, RBBU) */ +#define BCM4325_CHIP_ID 0x4325 /* 4325 chip id */ +#define BCM4328_CHIP_ID 0x4328 /* 4328 chip id */ +#define BCM4329_CHIP_ID 0x4329 /* 4329 chipcommon chipid */ +#define BCM4331_CHIP_ID 0x4331 /* 4331 chipcommon chipid */ +#define BCM4336_CHIP_ID 0x4336 /* 4336 chipcommon chipid */ +#define BCM43362_CHIP_ID 43362 /* 43362 chipcommon chipid */ +#define BCM4330_CHIP_ID 0x4330 /* 4330 chipcommon chipid */ +#define BCM6362_CHIP_ID 0x6362 /* 6362 chipcommon chipid */ +#define BCM4314_CHIP_ID 0x4314 /* 4314 chipcommon chipid */ +#define BCM43142_CHIP_ID 43142 /* 43142 chipcommon chipid */ +#define BCM43143_CHIP_ID 43143 /* 43143 chipcommon chipid */ +#define BCM4324_CHIP_ID 0x4324 /* 4324 chipcommon chipid */ +#define BCM43242_CHIP_ID 43242 /* 43242 chipcommon chipid */ +#define BCM43243_CHIP_ID 43243 /* 43243 chipcommon chipid */ +#define BCM4334_CHIP_ID 0x4334 /* 4334 chipcommon chipid */ +#define BCM4335_CHIP_ID 0x4335 /* 4335 chipcommon chipid */ +#define BCM4339_CHIP_ID 0x4339 /* 4339 chipcommon chipid */ +#define BCM4360_CHIP_ID 0x4360 /* 4360 chipcommon chipid */ +#define BCM4352_CHIP_ID 0x4352 /* 4352 chipcommon chipid */ +#define BCM43526_CHIP_ID 0xAA06 +#define BCM43341_CHIP_ID 43341 /* 43341 chipcommon chipid */ +#define BCM43342_CHIP_ID 43342 /* 43342 chipcommon chipid */ +#define BCM4350_CHIP_ID 0x4350 /* 4350 chipcommon chipid */ +#define BCM43556_CHIP_ID 0xAA24 /* 43556 chipcommon chipid */ +#ifdef UNRELEASEDCHIP +#define BCM4337_CHIP_ID 0x4337 /* 4337 chipcommon chipid */ +#define BCM4345_CHIP_ID 0x4345 /* 4345 chipcommon chipid */ +#define BCM43602_CHIP_ID 0xaa52 /* 43602 chipcommon chipid */ +#endif /* UNRELEASEDCHIP */ + +#define BCM4342_CHIP_ID 4342 /* 4342 chipcommon chipid (OTP, RBBU) */ +#define BCM4402_CHIP_ID 0x4402 /* 4402 chipid */ +#define BCM4704_CHIP_ID 0x4704 /* 4704 chipcommon chipid */ +#define BCM4706_CHIP_ID 0x5300 /* 4706 chipcommon chipid */ +#define BCM4707_CHIP_ID 53010 /* 4707 chipcommon chipid */ +#define BCM53018_CHIP_ID 53018 /* 53018 chipcommon chipid */ +#define BCM4707_CHIP(chipid) (((chipid) == BCM4707_CHIP_ID) || ((chipid) == BCM53018_CHIP_ID)) +#define BCM4710_CHIP_ID 0x4710 /* 4710 chipid */ +#define BCM4712_CHIP_ID 0x4712 /* 4712 chipcommon chipid */ +#define BCM4716_CHIP_ID 0x4716 /* 4716 chipcommon chipid */ +#define BCM47162_CHIP_ID 47162 /* 47162 chipcommon chipid */ +#define BCM4748_CHIP_ID 0x4748 /* 4716 chipcommon chipid (OTP, RBBU) */ +#define BCM4749_CHIP_ID 0x4749 /* 5357 chipcommon chipid (OTP, RBBU) */ +#define BCM4785_CHIP_ID 0x4785 /* 4785 chipcommon chipid */ +#define BCM5350_CHIP_ID 0x5350 /* 5350 chipcommon chipid */ +#define BCM5352_CHIP_ID 0x5352 /* 5352 chipcommon chipid */ +#define BCM5354_CHIP_ID 0x5354 /* 5354 chipcommon chipid */ +#define BCM5365_CHIP_ID 0x5365 /* 5365 chipcommon chipid */ +#define BCM5356_CHIP_ID 0x5356 /* 5356 chipcommon chipid */ +#define BCM5357_CHIP_ID 0x5357 /* 5357 chipcommon chipid */ +#define BCM53572_CHIP_ID 53572 /* 53572 chipcommon chipid */ + +/* Package IDs */ +#define BCM4303_PKG_ID 2 /* 4303 package id */ +#define BCM4309_PKG_ID 1 /* 4309 package id */ +#define BCM4712LARGE_PKG_ID 0 /* 340pin 4712 package id */ +#define BCM4712SMALL_PKG_ID 1 /* 200pin 4712 package id */ +#define BCM4712MID_PKG_ID 2 /* 225pin 4712 package id */ +#define BCM4328USBD11G_PKG_ID 2 /* 4328 802.11g USB package id */ +#define BCM4328USBDUAL_PKG_ID 3 /* 4328 802.11a/g USB package id */ +#define BCM4328SDIOD11G_PKG_ID 4 /* 4328 802.11g SDIO package id */ +#define BCM4328SDIODUAL_PKG_ID 5 /* 4328 802.11a/g SDIO package id */ +#define BCM4329_289PIN_PKG_ID 0 /* 4329 289-pin package id */ +#define BCM4329_182PIN_PKG_ID 1 /* 4329N 182-pin package id */ +#define BCM5354E_PKG_ID 1 /* 5354E package id */ +#define BCM4716_PKG_ID 8 /* 4716 package id */ +#define BCM4717_PKG_ID 9 /* 4717 package id */ +#define BCM4718_PKG_ID 10 /* 4718 package id */ +#define BCM5356_PKG_NONMODE 1 /* 5356 package without nmode suppport */ +#define BCM5358U_PKG_ID 8 /* 5358U package id */ +#define BCM5358_PKG_ID 9 /* 5358 package id */ +#define BCM47186_PKG_ID 10 /* 47186 package id */ +#define BCM5357_PKG_ID 11 /* 5357 package id */ +#define BCM5356U_PKG_ID 12 /* 5356U package id */ +#define BCM53572_PKG_ID 8 /* 53572 package id */ +#define BCM5357C0_PKG_ID 8 /* 5357c0 package id (the same as 53572) */ +#define BCM47188_PKG_ID 9 /* 47188 package id */ +#define BCM5358C0_PKG_ID 0xa /* 5358c0 package id */ +#define BCM5356C0_PKG_ID 0xb /* 5356c0 package id */ +#define BCM4331TT_PKG_ID 8 /* 4331 12x12 package id */ +#define BCM4331TN_PKG_ID 9 /* 4331 12x9 package id */ +#define BCM4331TNA0_PKG_ID 0xb /* 4331 12x9 package id */ +/* XXX 4706L corresponding to BCM53001 */ +#define BCM4706L_PKG_ID 1 /* 4706L package id */ + +#define HDLSIM5350_PKG_ID 1 /* HDL simulator package id for a 5350 */ +#define HDLSIM_PKG_ID 14 /* HDL simulator package id */ +#define HWSIM_PKG_ID 15 /* Hardware simulator package id */ +#define BCM43224_FAB_CSM 0x8 /* the chip is manufactured by CSM */ +#define BCM43224_FAB_SMIC 0xa /* the chip is manufactured by SMIC */ +#define BCM4336_WLBGA_PKG_ID 0x8 +#define BCM4330_WLBGA_PKG_ID 0x0 +#define BCM4314PCIE_ARM_PKG_ID (8 | 0) /* 4314 QFN PCI package id, bit 3 tie high */ +#define BCM4314SDIO_PKG_ID (8 | 1) /* 4314 QFN SDIO package id */ +#define BCM4314PCIE_PKG_ID (8 | 2) /* 4314 QFN PCI (ARM-less) package id */ +#define BCM4314SDIO_ARM_PKG_ID (8 | 3) /* 4314 QFN SDIO (ARM-less) package id */ +#define BCM4314SDIO_FPBGA_PKG_ID (8 | 4) /* 4314 FpBGA SDIO package id */ +#define BCM4314DEV_PKG_ID (8 | 6) /* 4314 Developement package id */ + +#define BCM4707_PKG_ID 1 /* 4707 package id */ +#define BCM4708_PKG_ID 2 /* 4708 package id */ +#define BCM4709_PKG_ID 0 /* 4709 package id */ + +#define PCIXX21_FLASHMEDIA0_ID 0x8033 /* TI PCI xx21 Standard Host Controller */ +#define PCIXX21_SDIOH0_ID 0x8034 /* TI PCI xx21 Standard Host Controller */ + +#define BCM4335_WLCSP_PKG_ID (0x0) /* WLCSP Module/Mobile SDIO/HSIC. */ +#define BCM4335_FCBGA_PKG_ID (0x1) /* FCBGA PC/Embeded/Media PCIE/SDIO */ +#define BCM4335_WLBGA_PKG_ID (0x2) /* WLBGA COB/Mobile SDIO/HSIC. */ +#define BCM4335_FCBGAD_PKG_ID (0x3) /* FCBGA Debug Debug/Dev All if's. */ +#define BCM4335_PKG_MASK (0x3) + +/* boardflags */ +#define BFL_BTC2WIRE 0x00000001 /* old 2wire Bluetooth coexistence, OBSOLETE */ +#define BFL_BTCOEX 0x00000001 /* Board supports BTCOEX */ +#define BFL_PACTRL 0x00000002 /* Board has gpio 9 controlling the PA */ +#define BFL_AIRLINEMODE 0x00000004 /* Board implements gpio 13 radio disable indication, UNUSED */ +#define BFL_ADCDIV 0x00000008 /* Board has the rssi ADC divider */ +#define BFL_DIS_256QAM 0x00000008 + /* XXX: for 4360, this bit is to disable 256QAM support */ +#define BFL_ENETROBO 0x00000010 /* Board has robo switch or core */ +#define BFL_NOPLLDOWN 0x00000020 /* Not ok to power down the chip pll and oscillator */ +#define BFL_CCKHIPWR 0x00000040 /* Can do high-power CCK transmission */ +#define BFL_ENETADM 0x00000080 /* Board has ADMtek switch */ +#define BFL_ENETVLAN 0x00000100 /* Board has VLAN capability */ +#define BFL_UNUSED 0x00000200 /* XXX: unused flag */ +#define BFL_NOPCI 0x00000400 /* Board leaves PCI floating */ +#define BFL_FEM 0x00000800 /* Board supports the Front End Module */ +#define BFL_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */ +#define BFL_HGPA 0x00002000 /* Board has a high gain PA */ +#define BFL_BTC2WIRE_ALTGPIO 0x00004000 /* Board's BTC 2wire is in the alternate gpios */ +#define BFL_ALTIQ 0x00008000 /* Alternate I/Q settings */ +#define BFL_NOPA 0x00010000 /* Board has no PA */ +#define BFL_RSSIINV 0x00020000 /* Board's RSSI uses positive slope(not TSSI) */ +#define BFL_PAREF 0x00040000 /* Board uses the PARef LDO */ +#define BFL_3TSWITCH 0x00080000 /* Board uses a triple throw switch shared with BT */ +#define BFL_PHASESHIFT 0x00100000 /* Board can support phase shifter */ +#define BFL_BUCKBOOST 0x00200000 /* Power topology uses BUCKBOOST */ +#define BFL_FEM_BT 0x00400000 /* Board has FEM and switch to share antenna w/ BT */ +#define BFL_NOCBUCK 0x00800000 /* Power topology doesn't use CBUCK */ +#define BFL_CCKFAVOREVM 0x01000000 /* Favor CCK EVM over spectral mask */ +#define BFL_PALDO 0x02000000 /* Power topology uses PALDO */ +#define BFL_LNLDO2_2P5 0x04000000 /* Select 2.5V as LNLDO2 output voltage */ +/* XXX BFL_FASTPWR and BFL_UCPWRCTL_MININDX are non-overlaping features and use the same bit */ +#define BFL_FASTPWR 0x08000000 /* XXX Fast switch/antenna powerup (no POR WAR) */ +#define BFL_UCPWRCTL_MININDX 0x08000000 /* Enforce min power index to avoid FEM damage */ +#define BFL_EXTLNA_5GHz 0x10000000 /* Board has an external LNA in 5GHz band */ +#define BFL_TRSW_1by2 0x20000000 /* Board has 2 TRSW's in 1by2 designs */ +#define BFL_GAINBOOSTA01 0x20000000 /* 5g Gainboost for core0 and core1 */ +#define BFL_LO_TRSW_R_5GHz 0x40000000 /* In 5G do not throw TRSW to T for clipLO gain */ +#define BFL_ELNA_GAINDEF 0x80000000 /* Backoff InitGain based on elna_2g/5g field + * when this flag is set + */ +#define BFL_EXTLNA_TX 0x20000000 /* Temp boardflag to indicate to */ + +/* boardflags2 */ +#define BFL2_RXBB_INT_REG_DIS 0x00000001 /* Board has an external rxbb regulator */ +#define BFL2_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */ +#define BFL2_TXPWRCTRL_EN 0x00000004 /* Board permits enabling TX Power Control */ +#define BFL2_2X4_DIV 0x00000008 /* Board supports the 2X4 diversity switch */ +#define BFL2_5G_PWRGAIN 0x00000010 /* Board supports 5G band power gain */ +#define BFL2_PCIEWAR_OVR 0x00000020 /* Board overrides ASPM and Clkreq settings */ +#define BFL2_CAESERS_BRD 0x00000040 /* Board is Caesers brd (unused by sw) */ +#define BFL2_BTC3WIRE 0x00000080 /* Board support legacy 3 wire or 4 wire */ +#define BFL2_BTCLEGACY 0x00000080 /* Board support legacy 3/4 wire, to replace + * BFL2_BTC3WIRE + */ +#define BFL2_SKWRKFEM_BRD 0x00000100 /* 4321mcm93 board uses Skyworks FEM */ +#define BFL2_SPUR_WAR 0x00000200 /* Board has a WAR for clock-harmonic spurs */ +#define BFL2_GPLL_WAR 0x00000400 /* Flag to narrow G-band PLL loop b/w */ +#define BFL2_TRISTATE_LED 0x00000800 /* Tri-state the LED */ +#define BFL2_SINGLEANT_CCK 0x00001000 /* Tx CCK pkts on Ant 0 only */ +#define BFL2_2G_SPUR_WAR 0x00002000 /* WAR to reduce and avoid clock-harmonic spurs in 2G */ +#define BFL2_BPHY_ALL_TXCORES 0x00004000 /* Transmit bphy frames using all tx cores */ +#define BFL2_FCC_BANDEDGE_WAR 0x00008000 /* Activates WAR to improve FCC bandedge performance */ +#define BFL2_GPLL_WAR2 0x00010000 /* Flag to widen G-band PLL loop b/w */ +#define BFL2_IPALVLSHIFT_3P3 0x00020000 /* Flag to Activate the PR 74115 PA Level Shift + * Workaround where the gpaio pin is connected to 3.3V + */ +#define BFL2_INTERNDET_TXIQCAL 0x00040000 /* Use internal envelope detector for TX IQCAL */ +#define BFL2_XTALBUFOUTEN 0x00080000 /* Keep the buffered Xtal output from radio on */ + /* Most drivers will turn it off without this flag */ + /* to save power. */ + +#define BFL2_ANAPACTRL_2G 0x00100000 /* 2G ext PAs are controlled by analog PA ctrl lines */ +#define BFL2_ANAPACTRL_5G 0x00200000 /* 5G ext PAs are controlled by analog PA ctrl lines */ +#define BFL2_ELNACTRL_TRSW_2G 0x00400000 /* AZW4329: 2G gmode_elna_gain controls TR Switch */ +#define BFL2_BT_SHARE_ANT0 0x00800000 /* share core0 antenna with BT */ +#define BFL2_TEMPSENSE_HIGHER 0x01000000 /* The tempsense threshold can sustain higher value + * than programmed. The exact delta is decided by + * driver per chip/boardtype. This can be used + * when tempsense qualification happens after shipment + */ +#define BFL2_BTC3WIREONLY 0x02000000 /* standard 3 wire btc only. 4 wire not supported */ +#define BFL2_PWR_NOMINAL 0x04000000 /* 0: power reduction on, 1: no power reduction */ +#define BFL2_EXTLNA_PWRSAVE 0x08000000 /* boardflag to enable ucode to apply power save */ + /* ucode control of eLNA during Tx */ +#define BFL2_4313_RADIOREG 0x10000000 /* 4313 radio register change (PR82977) need to match */ + /* board rework */ +#define BFL2_DYNAMIC_VMID 0x10000000 /* enable dynamic Vmid in idle TSSI CAL for 4331 */ + +#define BFL2_SDR_EN 0x20000000 /* SDR enabled or disabled */ +#define BFL2_DYNAMIC_VMID 0x10000000 /* boardflag to enable dynamic Vmid idle TSSI CAL */ +#define BFL2_LNA1BYPFORTR2G 0x40000000 /* acphy, enable lna1 bypass for clip gain, 2g */ +#define BFL2_LNA1BYPFORTR5G 0x80000000 /* acphy, enable lna1 bypass for clip gain, 5g */ + +/* SROM 11 - 11ac boardflag definitions */ +#define BFL_SROM11_BTCOEX 0x00000001 /* Board supports BTCOEX */ +#define BFL_SROM11_WLAN_BT_SH_XTL 0x00000002 /* bluetooth and wlan share same crystal */ +#define BFL_SROM11_EXTLNA 0x00001000 /* Board has an external LNA in 2.4GHz band */ +#define BFL_SROM11_EXTLNA_5GHz 0x10000000 /* Board has an external LNA in 5GHz band */ +#define BFL_SROM11_GAINBOOSTA01 0x20000000 /* 5g Gainboost for core0 and core1 */ +#define BFL2_SROM11_APLL_WAR 0x00000002 /* Flag to implement alternative A-band PLL settings */ +#define BFL2_SROM11_ANAPACTRL_2G 0x00100000 /* 2G ext PAs are ctrl-ed by analog PA ctrl lines */ +#define BFL2_SROM11_ANAPACTRL_5G 0x00200000 /* 5G ext PAs are ctrl-ed by analog PA ctrl lines */ +#define BFL2_SROM11_SINGLEANT_CCK 0x00001000 /* Tx CCK pkts on Ant 0 only */ + +/* boardflags3 */ +#define BFL3_FEMCTRL_SUB 0x00000007 /* acphy, subrevs of femctrl on top of srom_femctrl */ +#define BFL3_RCAL_WAR 0x00000008 /* acphy, rcal war active on this board (4335a0) */ +#define BFL3_TXGAINTBLID 0x00000070 /* acphy, txgain table id */ +#define BFL3_TXGAINTBLID_SHIFT 0x4 /* acphy, txgain table id shift bit */ +#define BFL3_TSSI_DIV_WAR 0x00000080 /* acphy, Seperate paparam for 20/40/80 */ +#define BFL3_TSSI_DIV_WAR_SHIFT 0x7 /* acphy, Seperate paparam for 20/40/80 shift bit */ +#define BFL3_FEMTBL_FROM_NVRAM 0x00000100 /* acphy, femctrl table is read from nvram */ +#define BFL3_FEMTBL_FROM_NVRAM_SHIFT 0x8 /* acphy, femctrl table is read from nvram */ +#define BFL3_AGC_CFG_2G 0x00000200 /* acphy, gain control configuration for 2G */ +#define BFL3_AGC_CFG_5G 0x00000400 /* acphy, gain control configuration for 5G */ +#define BFL3_PPR_BIT_EXT 0x00000800 /* acphy, bit position for 1bit extension for ppr */ +#define BFL3_PPR_BIT_EXT_SHIFT 11 /* acphy, bit shift for 1bit extension for ppr */ +#define BFL3_BBPLL_SPR_MODE_DIS 0x00001000 /* acphy, disables bbpll spur modes */ +#define BFL3_RCAL_OTP_VAL_EN 0x00002000 /* acphy, to read rcal_trim value from otp */ +#define BFL3_2GTXGAINTBL_BLANK 0x00004000 /* acphy, blank the first X ticks of 2g gaintbl */ +#define BFL3_2GTXGAINTBL_BLANK_SHIFT 14 /* acphy, blank the first X ticks of 2g gaintbl */ +#define BFL3_5GTXGAINTBL_BLANK 0x00008000 /* acphy, blank the first X ticks of 5g gaintbl */ +#define BFL3_5GTXGAINTBL_BLANK_SHIFT 15 /* acphy, blank the first X ticks of 5g gaintbl */ +#define BFL3_PHASETRACK_MAX_ALPHABETA 0x00010000 /* acphy, to max out alpha,beta to 511 */ +#define BFL3_PHASETRACK_MAX_ALPHABETA_SHIFT 16 /* acphy, to max out alpha,beta to 511 */ +/* acphy, to use backed off gaintbl for lte-coex */ +#define BFL3_LTECOEX_GAINTBL_EN 0x00060000 +/* acphy, to use backed off gaintbl for lte-coex */ +#define BFL3_LTECOEX_GAINTBL_EN_SHIFT 17 +#define BFL3_5G_SPUR_WAR 0x00080000 /* acphy, enable spur WAR in 5G band */ + +/* acphy: lpmode2g and lpmode_5g related boardflags */ +#define BFL3_ACPHY_LPMODE_2G 0x00300000 /* bits 20:21 for lpmode_2g choice */ +#define BFL3_ACPHY_LPMODE_2G_SHIFT 20 + +#define BFL3_ACPHY_LPMODE_5G 0x00C00000 /* bits 22:23 for lpmode_5g choice */ +#define BFL3_ACPHY_LPMODE_5G_SHIFT 22 + +#define BFL3_EN_BRCM_IMPBF 0x10000000 /* acphy, Allow BRCM Implicit TxBF */ +#define BFL3_AVVMID_FROM_NVRAM 0x40000000 /* Read Av Vmid from NVRAM */ +#define BFL3_AVVMID_FROM_NVRAM_SHIFT 30 /* Read Av Vmid from NVRAM */ +#define BFL3_FORCE_INT_LPO_SEL 0x04000000 /* Force internal lpo */ +#define BFL3_FORCE_EXT_LPO_SEL 0x08000000 /* Force external lpo */ + + +/* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */ +#define BOARD_GPIO_BTC3W_IN 0x850 /* bit 4 is RF_ACTIVE, bit 6 is STATUS, bit 11 is PRI */ +#define BOARD_GPIO_BTC3W_OUT 0x020 /* bit 5 is TX_CONF */ +#define BOARD_GPIO_BTCMOD_IN 0x010 /* bit 4 is the alternate BT Coexistence Input */ +#define BOARD_GPIO_BTCMOD_OUT 0x020 /* bit 5 is the alternate BT Coexistence Out */ +#define BOARD_GPIO_BTC_IN 0x080 /* bit 7 is BT Coexistence Input */ +#define BOARD_GPIO_BTC_OUT 0x100 /* bit 8 is BT Coexistence Out */ +#define BOARD_GPIO_PACTRL 0x200 /* bit 9 controls the PA on new 4306 boards */ +#define BOARD_GPIO_12 0x1000 /* gpio 12 */ +#define BOARD_GPIO_13 0x2000 /* gpio 13 */ +#define BOARD_GPIO_BTC4_IN 0x0800 /* gpio 11, coex4, in */ +#define BOARD_GPIO_BTC4_BT 0x2000 /* gpio 12, coex4, bt active */ +#define BOARD_GPIO_BTC4_STAT 0x4000 /* gpio 14, coex4, status */ +#define BOARD_GPIO_BTC4_WLAN 0x8000 /* gpio 15, coex4, wlan active */ +#define BOARD_GPIO_1_WLAN_PWR 0x02 /* throttle WLAN power on X21 board */ +#define BOARD_GPIO_2_WLAN_PWR 0x04 /* throttle WLAN power on X29C board */ +#define BOARD_GPIO_3_WLAN_PWR 0x08 /* throttle WLAN power on X28 board */ +#define BOARD_GPIO_4_WLAN_PWR 0x10 /* throttle WLAN power on X19 board */ + +#define GPIO_BTC4W_OUT_4312 0x010 /* bit 4 is BT_IODISABLE */ +#define GPIO_BTC4W_OUT_43224 0x020 /* bit 5 is BT_IODISABLE */ +#define GPIO_BTC4W_OUT_43224_SHARED 0x0e0 /* bit 5 is BT_IODISABLE */ +#define GPIO_BTC4W_OUT_43225 0x0e0 /* bit 5 BT_IODISABLE, bit 6 SW_BT, bit 7 SW_WL */ +#define GPIO_BTC4W_OUT_43421 0x020 /* bit 5 is BT_IODISABLE */ +#define GPIO_BTC4W_OUT_4313 0x060 /* bit 5 SW_BT, bit 6 SW_WL */ +#define GPIO_BTC4W_OUT_4331_SHARED 0x010 /* GPIO 4 */ + +#define PCI_CFG_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */ +#define PCI_CFG_GPIO_HWRAD 0x20 /* PCI config space GPIO 13 for hw radio disable */ +#define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal power-up */ +#define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL power-down */ + +/* XXX, need to be moved to a chip specific header file */ +/* power control defines */ +#define PLL_DELAY 150 /* us pll on delay */ +#define FREF_DELAY 200 /* us fref change delay */ +#define MIN_SLOW_CLK 32 /* us Slow clock period */ +#define XTAL_ON_DELAY 1000 /* us crystal power-on delay */ + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +/* Reference Board Types */ +#define BU4710_BOARD 0x0400 +#define VSIM4710_BOARD 0x0401 +#define QT4710_BOARD 0x0402 + +#define BU4309_BOARD 0x040a +#define BCM94309CB_BOARD 0x040b +#define BCM94309MP_BOARD 0x040c +#define BCM4309AP_BOARD 0x040d + +#define BCM94302MP_BOARD 0x040e + +#define BU4306_BOARD 0x0416 +#define BCM94306CB_BOARD 0x0417 +#define BCM94306MP_BOARD 0x0418 + +#define BCM94710D_BOARD 0x041a +#define BCM94710R1_BOARD 0x041b +#define BCM94710R4_BOARD 0x041c +#define BCM94710AP_BOARD 0x041d + +#define BU2050_BOARD 0x041f + +#define BCM94306P50_BOARD 0x0420 + +#define BCM94309G_BOARD 0x0421 + +#define BU4704_BOARD 0x0423 +#define BU4702_BOARD 0x0424 + +#define BCM94306PC_BOARD 0x0425 /* pcmcia 3.3v 4306 card */ + +#define MPSG4306_BOARD 0x0427 + +#define BCM94702MN_BOARD 0x0428 + +/* BCM4702 1U CompactPCI Board */ +#define BCM94702CPCI_BOARD 0x0429 + +/* BCM4702 with BCM95380 VLAN Router */ +#define BCM95380RR_BOARD 0x042a + +/* cb4306 with SiGe PA */ +#define BCM94306CBSG_BOARD 0x042b + +/* cb4306 with SiGe PA */ +#define PCSG94306_BOARD 0x042d + +/* bu4704 with sdram */ +#define BU4704SD_BOARD 0x042e + +/* Dual 11a/11g Router */ +#define BCM94704AGR_BOARD 0x042f + +/* 11a-only minipci */ +#define BCM94308MP_BOARD 0x0430 + +/* 4306/gprs combo */ +#define BCM94306GPRS_BOARD 0x0432 + +/* BCM5365/BCM4704 FPGA Bringup Board */ +#define BU5365_FPGA_BOARD 0x0433 + +#define BU4712_BOARD 0x0444 +#define BU4712SD_BOARD 0x045d +#define BU4712L_BOARD 0x045f + +/* BCM4712 boards */ +#define BCM94712AP_BOARD 0x0445 +#define BCM94712P_BOARD 0x0446 + +/* BCM4318 boards */ +#define BU4318_BOARD 0x0447 +#define CB4318_BOARD 0x0448 +#define MPG4318_BOARD 0x0449 +#define MP4318_BOARD 0x044a +#define SD4318_BOARD 0x044b + +/* BCM4313 boards */ +#define BCM94313BU_BOARD 0x050f +#define BCM94313HM_BOARD 0x0510 +#define BCM94313EPA_BOARD 0x0511 +#define BCM94313HMG_BOARD 0x051C + +/* BCM63XX boards */ +#define BCM96338_BOARD 0x6338 +#define BCM96348_BOARD 0x6348 +#define BCM96358_BOARD 0x6358 +#define BCM96368_BOARD 0x6368 + +/* Another mp4306 with SiGe */ +#define BCM94306P_BOARD 0x044c + +/* mp4303 */ +#define BCM94303MP_BOARD 0x044e + +/* mpsgh4306 */ +#define BCM94306MPSGH_BOARD 0x044f + +/* BRCM 4306 w/ Front End Modules */ +#define BCM94306MPM 0x0450 +#define BCM94306MPL 0x0453 + +/* 4712agr */ +#define BCM94712AGR_BOARD 0x0451 + +/* pcmcia 4303 */ +#define PC4303_BOARD 0x0454 + +/* 5350K */ +#define BCM95350K_BOARD 0x0455 + +/* 5350R */ +#define BCM95350R_BOARD 0x0456 + +/* 4306mplna */ +#define BCM94306MPLNA_BOARD 0x0457 + +/* 4320 boards */ +#define BU4320_BOARD 0x0458 +#define BU4320S_BOARD 0x0459 +#define BCM94320PH_BOARD 0x045a + +/* 4306mph */ +#define BCM94306MPH_BOARD 0x045b + +/* 4306pciv */ +#define BCM94306PCIV_BOARD 0x045c + +#define BU4712SD_BOARD 0x045d + +#define BCM94320PFLSH_BOARD 0x045e + +#define BU4712L_BOARD 0x045f +#define BCM94712LGR_BOARD 0x0460 +#define BCM94320R_BOARD 0x0461 + +#define BU5352_BOARD 0x0462 + +#define BCM94318MPGH_BOARD 0x0463 + +#define BU4311_BOARD 0x0464 +#define BCM94311MC_BOARD 0x0465 +#define BCM94311MCAG_BOARD 0x0466 + +#define BCM95352GR_BOARD 0x0467 + +/* bcm95351agr */ +#define BCM95351AGR_BOARD 0x0470 + +/* bcm94704mpcb */ +#define BCM94704MPCB_BOARD 0x0472 + +/* 4785 boards */ +#define BU4785_BOARD 0x0478 + +/* 4321 boards */ +#define BU4321_BOARD 0x046b +#define BU4321E_BOARD 0x047c +#define MP4321_BOARD 0x046c +#define CB2_4321_BOARD 0x046d +#define CB2_4321_AG_BOARD 0x0066 +#define MC4321_BOARD 0x046e + +/* 4328 boards */ +#define BU4328_BOARD 0x0481 +#define BCM4328SDG_BOARD 0x0482 +#define BCM4328SDAG_BOARD 0x0483 +#define BCM4328UG_BOARD 0x0484 +#define BCM4328UAG_BOARD 0x0485 +#define BCM4328PC_BOARD 0x0486 +#define BCM4328CF_BOARD 0x0487 + +/* 4325 boards */ +#define BCM94325DEVBU_BOARD 0x0490 +#define BCM94325BGABU_BOARD 0x0491 + +#define BCM94325SDGWB_BOARD 0x0492 + +#define BCM94325SDGMDL_BOARD 0x04aa +#define BCM94325SDGMDL2_BOARD 0x04c6 +#define BCM94325SDGMDL3_BOARD 0x04c9 + +#define BCM94325SDABGWBA_BOARD 0x04e1 + +/* 4322 boards */ +#define BCM94322MC_SSID 0x04a4 +#define BCM94322USB_SSID 0x04a8 /* dualband */ +#define BCM94322HM_SSID 0x04b0 +#define BCM94322USB2D_SSID 0x04bf /* single band discrete front end */ + +/* 4312 boards */ +#define BCM4312MCGSG_BOARD 0x04b5 + +/* 4315 boards */ +#define BCM94315DEVBU_SSID 0x04c2 +#define BCM94315USBGP_SSID 0x04c7 +#define BCM94315BGABU_SSID 0x04ca +#define BCM94315USBGP41_SSID 0x04cb + +/* 4319 boards */ +#define BCM94319DEVBU_SSID 0X04e5 +#define BCM94319USB_SSID 0X04e6 +#define BCM94319SD_SSID 0X04e7 + +/* 4716 boards */ +#define BCM94716NR2_SSID 0x04cd + +/* 4319 boards */ +#define BCM94319DEVBU_SSID 0X04e5 +#define BCM94319USBNP4L_SSID 0X04e6 +#define BCM94319WLUSBN4L_SSID 0X04e7 +#define BCM94319SDG_SSID 0X04ea +#define BCM94319LCUSBSDN4L_SSID 0X04eb +#define BCM94319USBB_SSID 0x04ee +#define BCM94319LCSDN4L_SSID 0X0507 +#define BCM94319LSUSBN4L_SSID 0X0508 +#define BCM94319SDNA4L_SSID 0X0517 +#define BCM94319SDELNA4L_SSID 0X0518 +#define BCM94319SDELNA6L_SSID 0X0539 +#define BCM94319ARCADYAN_SSID 0X0546 +#define BCM94319WINDSOR_SSID 0x0561 +#define BCM94319MLAP_SSID 0x0562 +#define BCM94319SDNA_SSID 0x058b +#define BCM94319BHEMU3_SSID 0x0563 +#define BCM94319SDHMB_SSID 0x058c +#define BCM94319SDBREF_SSID 0x05a1 +#define BCM94319USBSDB_SSID 0x05a2 + + +/* 4329 boards */ +#define BCM94329AGB_SSID 0X04b9 +#define BCM94329TDKMDL1_SSID 0X04ba +#define BCM94329TDKMDL11_SSID 0X04fc +#define BCM94329OLYMPICN18_SSID 0X04fd +#define BCM94329OLYMPICN90_SSID 0X04fe +#define BCM94329OLYMPICN90U_SSID 0X050c +#define BCM94329OLYMPICN90M_SSID 0X050b +#define BCM94329AGBF_SSID 0X04ff +#define BCM94329OLYMPICX17_SSID 0X0504 +#define BCM94329OLYMPICX17M_SSID 0X050a +#define BCM94329OLYMPICX17U_SSID 0X0509 +#define BCM94329OLYMPICUNO_SSID 0X0564 +#define BCM94329MOTOROLA_SSID 0X0565 +#define BCM94329OLYMPICLOCO_SSID 0X0568 +/* 4336 SDIO board types */ +#define BCM94336SD_WLBGABU_SSID 0x0511 +#define BCM94336SD_WLBGAREF_SSID 0x0519 +#define BCM94336SDGP_SSID 0x0538 +#define BCM94336SDG_SSID 0x0519 +#define BCM94336SDGN_SSID 0x0538 +#define BCM94336SDGFC_SSID 0x056B + +/* 4330 SDIO board types */ +#define BCM94330SDG_SSID 0x0528 +#define BCM94330SD_FCBGABU_SSID 0x052e +#define BCM94330SD_WLBGABU_SSID 0x052f +#define BCM94330SD_FCBGA_SSID 0x0530 +#define BCM94330FCSDAGB_SSID 0x0532 +#define BCM94330OLYMPICAMG_SSID 0x0549 +#define BCM94330OLYMPICAMGEPA_SSID 0x054F +#define BCM94330OLYMPICUNO3_SSID 0x0551 +#define BCM94330WLSDAGB_SSID 0x0547 +#define BCM94330CSPSDAGBB_SSID 0x054A + +/* 43224 boards */ +#define BCM943224X21 0x056e +#define BCM943224X21_FCC 0x00d1 +#define BCM943224X21B 0x00e9 +#define BCM943224M93 0x008b +#define BCM943224M93A 0x0090 +#define BCM943224X16 0x0093 +#define BCM94322X9 0x008d +#define BCM94322M35e 0x008e + +/* 43228 Boards */ +#define BCM943228BU8_SSID 0x0540 +#define BCM943228BU9_SSID 0x0541 +#define BCM943228BU_SSID 0x0542 +#define BCM943227HM4L_SSID 0x0543 +#define BCM943227HMB_SSID 0x0544 +#define BCM943228HM4L_SSID 0x0545 +#define BCM943228SD_SSID 0x0573 + +/* 43239 Boards */ +#define BCM943239MOD_SSID 0x05ac +#define BCM943239REF_SSID 0x05aa + +/* 4331 boards */ +#define BCM94331X19 0x00D6 /* X19B */ +#define BCM94331X28 0x00E4 /* X28 */ +#define BCM94331X28B 0x010E /* X28B */ +#define BCM94331PCIEBT3Ax_SSID BCM94331X28 +#define BCM94331X12_2G_SSID 0x00EC /* X12 2G */ +#define BCM94331X12_5G_SSID 0x00ED /* X12 5G */ +#define BCM94331X29B 0x00EF /* X29B */ +#define BCM94331X29D 0x010F /* X29D */ +#define BCM94331CSAX_SSID BCM94331X29B +#define BCM94331X19C 0x00F5 /* X19C */ +#define BCM94331X33 0x00F4 /* X33 */ +#define BCM94331BU_SSID 0x0523 +#define BCM94331S9BU_SSID 0x0524 +#define BCM94331MC_SSID 0x0525 +#define BCM94331MCI_SSID 0x0526 +#define BCM94331PCIEBT4_SSID 0x0527 /* XXX BRCM Build of X19 */ +#define BCM94331HM_SSID 0x0574 +#define BCM94331PCIEDUAL_SSID 0x059B /* XXX BRCM Build of X12 */ +#define BCM94331MCH5_SSID 0x05A9 +#define BCM94331CS_SSID 0x05C6 /* XXX BRCM Build of X29 */ +#define BCM94331CD_SSID 0x05DA /* XXX BRCM Build of X33 */ + +/* 4314 Boards */ +#define BCM94314BU_SSID 0x05b1 + +/* 53572 Boards */ +#define BCM953572BU_SSID 0x058D +#define BCM953572NR2_SSID 0x058E +#define BCM947188NR2_SSID 0x058F +#define BCM953572SDRNR2_SSID 0x0590 + +/* 43236 boards */ +#define BCM943236OLYMPICSULLEY_SSID 0x594 +#define BCM943236PREPROTOBLU2O3_SSID 0x5b9 +#define BCM943236USBELNA_SSID 0x5f8 + +/* 4314 Boards */ +#define BCM94314BUSDIO_SSID 0x05c8 +#define BCM94314BGABU_SSID 0x05c9 +#define BCM94314HMEPA_SSID 0x05ca +#define BCM94314HMEPABK_SSID 0x05cb +#define BCM94314SUHMEPA_SSID 0x05cc +#define BCM94314SUHM_SSID 0x05cd +#define BCM94314HM_SSID 0x05d1 + +/* 4334 Boards */ +#define BCM94334FCAGBI_SSID 0x05df +#define BCM94334WLAGBI_SSID 0x05dd + +/* 4335 Boards */ +#define BCM94335X52 0x0114 + +#ifdef UNRELEASEDCHIP +/* 4345 Boards */ +#define BCM94345_SSID 0x0687 +#endif /* UNRELEASEDCHIP */ + +/* 4360 Boards */ +#define BCM94360X52C 0X0117 +#define BCM94360X29C 0X0112 +#define BCM94360X29CP2 0X1000 +#define BCM94360X51 0x0111 +#define BCM94360X51P2 0x0129 +#define BCM94360CS 0x061B +#define BCM94360J28_D11AC2G 0x0c00 +#define BCM94360J28_D11AC5G 0x0c01 + +/* 4350 Boards */ +#define BCM94350X52B 0X0116 + +/* 43217 Boards */ +#define BCM943217BU_SSID 0x05d5 +#define BCM943217HM2L_SSID 0x05d6 +#define BCM943217HMITR2L_SSID 0x05d7 + +/* 43142 Boards */ +#define BCM943142HM_SSID 0x05e0 +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +/* 43341 Boards */ +#define BCM943341WLABGS_SSID 0x062d + +/* 43342 Boards */ +#define BCM943342FCAGBI_SSID 0x0641 + +#ifdef UNRELEASEDCHIP +/* 43602 Boards, unclear yet what boards will be created. */ +#define BCM943602RSVD1_SSID 0x06a5 +#define BCM943602RSVD2_SSID 0x06a6 +#endif /* UNRELEASEDCHIP */ + +/* # of GPIO pins */ +#define GPIO_NUMPINS 32 + +/* These values are used by dhd host driver. */ +#define RDL_RAM_BASE_4319 0x60000000 +#define RDL_RAM_BASE_4329 0x60000000 +#define RDL_RAM_SIZE_4319 0x48000 +#define RDL_RAM_SIZE_4329 0x48000 +#define RDL_RAM_SIZE_43236 0x70000 +#define RDL_RAM_BASE_43236 0x60000000 +#define RDL_RAM_SIZE_4328 0x60000 +#define RDL_RAM_BASE_4328 0x80000000 +#define RDL_RAM_SIZE_4322 0x60000 +#define RDL_RAM_BASE_4322 0x60000000 +#define RDL_RAM_SIZE_4360 0xA0000 +#define RDL_RAM_BASE_4360 0x60000000 +#define RDL_RAM_SIZE_43242 0x90000 +#define RDL_RAM_BASE_43242 0x60000000 +#define RDL_RAM_SIZE_43143 0x70000 +#define RDL_RAM_BASE_43143 0x60000000 +#define RDL_RAM_SIZE_4350 0xC0000 +#define RDL_RAM_BASE_4350 0x180800 + +/* generic defs for nvram "muxenab" bits +* Note: these differ for 4335a0. refer bcmchipc.h for specific mux options. +*/ +#define MUXENAB_UART 0x00000001 +#define MUXENAB_GPIO 0x00000002 +#define MUXENAB_ERCX 0x00000004 /* External Radio BT coex */ +#define MUXENAB_JTAG 0x00000008 +#define MUXENAB_HOST_WAKE 0x00000010 /* configure GPIO for SDIO host_wake */ +#define MUXENAB_I2S_EN 0x00000020 +#define MUXENAB_I2S_MASTER 0x00000040 +#define MUXENAB_I2S_FULL 0x00000080 +#define MUXENAB_SFLASH 0x00000100 +#define MUXENAB_RFSWCTRL0 0x00000200 +#define MUXENAB_RFSWCTRL1 0x00000400 +#define MUXENAB_RFSWCTRL2 0x00000800 +#define MUXENAB_SECI 0x00001000 +#define MUXENAB_BT_LEGACY 0x00002000 +#define MUXENAB_HOST_WAKE1 0x00004000 /* configure alternative GPIO for SDIO host_wake */ + +/* Boot flags */ +#define FLASH_KERNEL_NFLASH 0x00000001 +#define FLASH_BOOT_NFLASH 0x00000002 + +#endif /* _BCMDEVS_H */ diff --git a/external/cache/sources/wl/include/bcmendian.h b/external/cache/sources/wl/include/bcmendian.h new file mode 100644 index 0000000..103c684 --- /dev/null +++ b/external/cache/sources/wl/include/bcmendian.h @@ -0,0 +1,344 @@ +/* + * Byte order utilities + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmendian.h 370210 2012-11-21 05:35:27Z nisar $ + * + * This file by default provides proper behavior on little-endian architectures. + * On big-endian architectures, IL_BIGENDIAN should be defined. + */ + +#ifndef _BCMENDIAN_H_ +#define _BCMENDIAN_H_ + +#include + +/* Reverse the bytes in a 16-bit value */ +#define BCMSWAP16(val) \ + ((uint16)((((uint16)(val) & (uint16)0x00ffU) << 8) | \ + (((uint16)(val) & (uint16)0xff00U) >> 8))) + +/* Reverse the bytes in a 32-bit value */ +#define BCMSWAP32(val) \ + ((uint32)((((uint32)(val) & (uint32)0x000000ffU) << 24) | \ + (((uint32)(val) & (uint32)0x0000ff00U) << 8) | \ + (((uint32)(val) & (uint32)0x00ff0000U) >> 8) | \ + (((uint32)(val) & (uint32)0xff000000U) >> 24))) + +/* Reverse the two 16-bit halves of a 32-bit value */ +#define BCMSWAP32BY16(val) \ + ((uint32)((((uint32)(val) & (uint32)0x0000ffffU) << 16) | \ + (((uint32)(val) & (uint32)0xffff0000U) >> 16))) + +/* Reverse the bytes in a 64-bit value */ +#define BCMSWAP64(val) \ + ((uint64)((((uint64)(val) & 0x00000000000000ffULL) << 56) | \ + (((uint64)(val) & 0x000000000000ff00ULL) << 40) | \ + (((uint64)(val) & 0x0000000000ff0000ULL) << 24) | \ + (((uint64)(val) & 0x00000000ff000000ULL) << 8) | \ + (((uint64)(val) & 0x000000ff00000000ULL) >> 8) | \ + (((uint64)(val) & 0x0000ff0000000000ULL) >> 24) | \ + (((uint64)(val) & 0x00ff000000000000ULL) >> 40) | \ + (((uint64)(val) & 0xff00000000000000ULL) >> 56))) + +/* Reverse the two 32-bit halves of a 64-bit value */ +#define BCMSWAP64BY32(val) \ + ((uint64)((((uint64)(val) & 0x00000000ffffffffULL) << 32) | \ + (((uint64)(val) & 0xffffffff00000000ULL) >> 32))) + + +/* Byte swapping macros + * Host <=> Network (Big Endian) for 16- and 32-bit values + * Host <=> Little-Endian for 16- and 32-bit values + */ +#ifndef hton16 +#ifndef IL_BIGENDIAN +#define HTON16(i) BCMSWAP16(i) +#define hton16(i) bcmswap16(i) +#define HTON32(i) BCMSWAP32(i) +#define hton32(i) bcmswap32(i) +#define NTOH16(i) BCMSWAP16(i) +#define ntoh16(i) bcmswap16(i) +#define NTOH32(i) BCMSWAP32(i) +#define ntoh32(i) bcmswap32(i) +#define LTOH16(i) (i) +#define ltoh16(i) (i) +#define LTOH32(i) (i) +#define ltoh32(i) (i) +#define HTOL16(i) (i) +#define htol16(i) (i) +#define HTOL32(i) (i) +#define htol32(i) (i) +#define HTOL64(i) (i) +#define htol64(i) (i) +#else /* IL_BIGENDIAN */ +#define HTON16(i) (i) +#define hton16(i) (i) +#define HTON32(i) (i) +#define hton32(i) (i) +#define NTOH16(i) (i) +#define ntoh16(i) (i) +#define NTOH32(i) (i) +#define ntoh32(i) (i) +#define LTOH16(i) BCMSWAP16(i) +#define ltoh16(i) bcmswap16(i) +#define LTOH32(i) BCMSWAP32(i) +#define ltoh32(i) bcmswap32(i) +#define HTOL16(i) BCMSWAP16(i) +#define htol16(i) bcmswap16(i) +#define HTOL32(i) BCMSWAP32(i) +#define htol32(i) bcmswap32(i) +#define HTOL64(i) BCMSWAP64(i) +#define htol64(i) bcmswap64(i) +#endif /* IL_BIGENDIAN */ +#endif /* hton16 */ + +#ifndef IL_BIGENDIAN +#define ltoh16_buf(buf, i) +#define htol16_buf(buf, i) +#else +#define ltoh16_buf(buf, i) bcmswap16_buf((uint16 *)(buf), (i)) +#define htol16_buf(buf, i) bcmswap16_buf((uint16 *)(buf), (i)) +#endif /* IL_BIGENDIAN */ + +/* Unaligned loads and stores in host byte order */ +#ifndef IL_BIGENDIAN +#define load32_ua(a) ltoh32_ua(a) +#define store32_ua(a, v) htol32_ua_store(v, a) +#define load16_ua(a) ltoh16_ua(a) +#define store16_ua(a, v) htol16_ua_store(v, a) +#else +#define load32_ua(a) ntoh32_ua(a) +#define store32_ua(a, v) hton32_ua_store(v, a) +#define load16_ua(a) ntoh16_ua(a) +#define store16_ua(a, v) hton16_ua_store(v, a) +#endif /* IL_BIGENDIAN */ + +#define _LTOH16_UA(cp) ((cp)[0] | ((cp)[1] << 8)) +#define _LTOH32_UA(cp) ((cp)[0] | ((cp)[1] << 8) | ((cp)[2] << 16) | ((cp)[3] << 24)) +#define _NTOH16_UA(cp) (((cp)[0] << 8) | (cp)[1]) +#define _NTOH32_UA(cp) (((cp)[0] << 24) | ((cp)[1] << 16) | ((cp)[2] << 8) | (cp)[3]) + +#define ltoh_ua(ptr) \ + (sizeof(*(ptr)) == sizeof(uint8) ? *(const uint8 *)(ptr) : \ + sizeof(*(ptr)) == sizeof(uint16) ? _LTOH16_UA((const uint8 *)(ptr)) : \ + sizeof(*(ptr)) == sizeof(uint32) ? _LTOH32_UA((const uint8 *)(ptr)) : \ + *(uint8 *)0) + +#define ntoh_ua(ptr) \ + (sizeof(*(ptr)) == sizeof(uint8) ? *(const uint8 *)(ptr) : \ + sizeof(*(ptr)) == sizeof(uint16) ? _NTOH16_UA((const uint8 *)(ptr)) : \ + sizeof(*(ptr)) == sizeof(uint32) ? _NTOH32_UA((const uint8 *)(ptr)) : \ + *(uint8 *)0) + +#ifdef __GNUC__ + +/* GNU macro versions avoid referencing the argument multiple times, while also + * avoiding the -fno-inline used in ROM builds. + */ + +#define bcmswap16(val) ({ \ + uint16 _val = (val); \ + BCMSWAP16(_val); \ +}) + +#define bcmswap32(val) ({ \ + uint32 _val = (val); \ + BCMSWAP32(_val); \ +}) + +#define bcmswap64(val) ({ \ + uint64 _val = (val); \ + BCMSWAP64(_val); \ +}) + +#define bcmswap32by16(val) ({ \ + uint32 _val = (val); \ + BCMSWAP32BY16(_val); \ +}) + +#define bcmswap16_buf(buf, len) ({ \ + uint16 *_buf = (uint16 *)(buf); \ + uint _wds = (len) / 2; \ + while (_wds--) { \ + *_buf = bcmswap16(*_buf); \ + _buf++; \ + } \ +}) + +#define htol16_ua_store(val, bytes) ({ \ + uint16 _val = (val); \ + uint8 *_bytes = (uint8 *)(bytes); \ + _bytes[0] = _val & 0xff; \ + _bytes[1] = _val >> 8; \ +}) + +#define htol32_ua_store(val, bytes) ({ \ + uint32 _val = (val); \ + uint8 *_bytes = (uint8 *)(bytes); \ + _bytes[0] = _val & 0xff; \ + _bytes[1] = (_val >> 8) & 0xff; \ + _bytes[2] = (_val >> 16) & 0xff; \ + _bytes[3] = _val >> 24; \ +}) + +#define hton16_ua_store(val, bytes) ({ \ + uint16 _val = (val); \ + uint8 *_bytes = (uint8 *)(bytes); \ + _bytes[0] = _val >> 8; \ + _bytes[1] = _val & 0xff; \ +}) + +#define hton32_ua_store(val, bytes) ({ \ + uint32 _val = (val); \ + uint8 *_bytes = (uint8 *)(bytes); \ + _bytes[0] = _val >> 24; \ + _bytes[1] = (_val >> 16) & 0xff; \ + _bytes[2] = (_val >> 8) & 0xff; \ + _bytes[3] = _val & 0xff; \ +}) + +#define ltoh16_ua(bytes) ({ \ + const uint8 *_bytes = (const uint8 *)(bytes); \ + _LTOH16_UA(_bytes); \ +}) + +#define ltoh32_ua(bytes) ({ \ + const uint8 *_bytes = (const uint8 *)(bytes); \ + _LTOH32_UA(_bytes); \ +}) + +#define ntoh16_ua(bytes) ({ \ + const uint8 *_bytes = (const uint8 *)(bytes); \ + _NTOH16_UA(_bytes); \ +}) + +#define ntoh32_ua(bytes) ({ \ + const uint8 *_bytes = (const uint8 *)(bytes); \ + _NTOH32_UA(_bytes); \ +}) + +#else /* !__GNUC__ */ + +/* Inline versions avoid referencing the argument multiple times */ +static INLINE uint16 +bcmswap16(uint16 val) +{ + return BCMSWAP16(val); +} + +static INLINE uint32 +bcmswap32(uint32 val) +{ + return BCMSWAP32(val); +} + +static INLINE uint64 +bcmswap64(uint64 val) +{ + return BCMSWAP64(val); +} + +static INLINE uint32 +bcmswap32by16(uint32 val) +{ + return BCMSWAP32BY16(val); +} + +/* Reverse pairs of bytes in a buffer (not for high-performance use) */ +/* buf - start of buffer of shorts to swap */ +/* len - byte length of buffer */ +static INLINE void +bcmswap16_buf(uint16 *buf, uint len) +{ + len = len / 2; + + while (len--) { + *buf = bcmswap16(*buf); + buf++; + } +} + +/* + * Store 16-bit value to unaligned little-endian byte array. + */ +static INLINE void +htol16_ua_store(uint16 val, uint8 *bytes) +{ + bytes[0] = val & 0xff; + bytes[1] = val >> 8; +} + +/* + * Store 32-bit value to unaligned little-endian byte array. + */ +static INLINE void +htol32_ua_store(uint32 val, uint8 *bytes) +{ + bytes[0] = val & 0xff; + bytes[1] = (val >> 8) & 0xff; + bytes[2] = (val >> 16) & 0xff; + bytes[3] = val >> 24; +} + +/* + * Store 16-bit value to unaligned network-(big-)endian byte array. + */ +static INLINE void +hton16_ua_store(uint16 val, uint8 *bytes) +{ + bytes[0] = val >> 8; + bytes[1] = val & 0xff; +} + +/* + * Store 32-bit value to unaligned network-(big-)endian byte array. + */ +static INLINE void +hton32_ua_store(uint32 val, uint8 *bytes) +{ + bytes[0] = val >> 24; + bytes[1] = (val >> 16) & 0xff; + bytes[2] = (val >> 8) & 0xff; + bytes[3] = val & 0xff; +} + +/* + * Load 16-bit value from unaligned little-endian byte array. + */ +static INLINE uint16 +ltoh16_ua(const void *bytes) +{ + return _LTOH16_UA((const uint8 *)bytes); +} + +/* + * Load 32-bit value from unaligned little-endian byte array. + */ +static INLINE uint32 +ltoh32_ua(const void *bytes) +{ + return _LTOH32_UA((const uint8 *)bytes); +} + +/* + * Load 16-bit value from unaligned big-(network-)endian byte array. + */ +static INLINE uint16 +ntoh16_ua(const void *bytes) +{ + return _NTOH16_UA((const uint8 *)bytes); +} + +/* + * Load 32-bit value from unaligned big-(network-)endian byte array. + */ +static INLINE uint32 +ntoh32_ua(const void *bytes) +{ + return _NTOH32_UA((const uint8 *)bytes); +} + +#endif /* !__GNUC__ */ +#endif /* !_BCMENDIAN_H_ */ diff --git a/external/cache/sources/wl/include/bcmnvram.h b/external/cache/sources/wl/include/bcmnvram.h new file mode 100644 index 0000000..a395a4f --- /dev/null +++ b/external/cache/sources/wl/include/bcmnvram.h @@ -0,0 +1,265 @@ +/* + * NVRAM variable manipulation + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmnvram.h 401759 2013-05-13 16:08:08Z sudhirbs $ + */ + +#ifndef _bcmnvram_h_ +#define _bcmnvram_h_ + +#ifndef _LANGUAGE_ASSEMBLY + +#include +#include + +struct nvram_header { + uint32 magic; + uint32 len; + uint32 crc_ver_init; /* 0:7 crc, 8:15 ver, 16:31 sdram_init */ + uint32 config_refresh; /* 0:15 sdram_config, 16:31 sdram_refresh */ + uint32 config_ncdl; /* ncdl values for memc */ +}; + +struct nvram_tuple { + char *name; + char *value; + struct nvram_tuple *next; +}; + +/* + * Get default value for an NVRAM variable + */ +extern char *nvram_default_get(const char *name); +/* + * validate/restore all per-interface related variables + */ +extern void nvram_validate_all(char *prefix, bool restore); + +/* + * restore specific per-interface variable + */ +extern void nvram_restore_var(char *prefix, char *name); + +/* + * Initialize NVRAM access. May be unnecessary or undefined on certain + * platforms. + */ +extern int nvram_init(void *sih); +extern int nvram_deinit(void *sih); + +#if defined(_CFE_) && defined(BCM_DEVINFO) +extern char *flashdrv_nvram; +extern char *devinfo_flashdrv_nvram; +extern int devinfo_nvram_init(void *sih); +extern int devinfo_nvram_sync(void); +extern void _nvram_hash_select(int idx); +#endif + +/* + * Append a chunk of nvram variables to the global list + */ +extern int nvram_append(void *si, char *vars, uint varsz); + +extern void nvram_get_global_vars(char **varlst, uint *varsz); + + +/* + * Check for reset button press for restoring factory defaults. + */ +extern int nvram_reset(void *sih); + +/* + * Disable NVRAM access. May be unnecessary or undefined on certain + * platforms. + */ +extern void nvram_exit(void *sih); + +/* + * Get the value of an NVRAM variable. The pointer returned may be + * invalid after a set. + * @param name name of variable to get + * @return value of variable or NULL if undefined + */ +extern char * nvram_get(const char *name); + +/* + * Read the reset GPIO value from the nvram and set the GPIO + * as input + */ +extern int BCMINITFN(nvram_resetgpio_init)(void *sih); + +/* + * Get the value of an NVRAM variable. + * @param name name of variable to get + * @return value of variable or NUL if undefined + */ +static INLINE char * +nvram_safe_get(const char *name) +{ + char *p = nvram_get(name); + return p ? p : ""; +} + +/* + * Match an NVRAM variable. + * @param name name of variable to match + * @param match value to compare against value of variable + * @return TRUE if variable is defined and its value is string equal + * to match or FALSE otherwise + */ +static INLINE int +nvram_match(const char *name, const char *match) +{ + const char *value = nvram_get(name); + return (value && !strcmp(value, match)); +} + +/* + * Inversely match an NVRAM variable. + * @param name name of variable to match + * @param match value to compare against value of variable + * @return TRUE if variable is defined and its value is not string + * equal to invmatch or FALSE otherwise + */ +static INLINE int +nvram_invmatch(const char *name, const char *invmatch) +{ + const char *value = nvram_get(name); + return (value && strcmp(value, invmatch)); +} + +/* + * Set the value of an NVRAM variable. The name and value strings are + * copied into private storage. Pointers to previously set values + * may become invalid. The new value may be immediately + * retrieved but will not be permanently stored until a commit. + * @param name name of variable to set + * @param value value of variable + * @return 0 on success and errno on failure + */ +extern int nvram_set(const char *name, const char *value); + +/* + * Unset an NVRAM variable. Pointers to previously set values + * remain valid until a set. + * @param name name of variable to unset + * @return 0 on success and errno on failure + * NOTE: use nvram_commit to commit this change to flash. + */ +extern int nvram_unset(const char *name); + +/* + * Commit NVRAM variables to permanent storage. All pointers to values + * may be invalid after a commit. + * NVRAM values are undefined after a commit. + * @param nvram_corrupt true to corrupt nvram, false otherwise. + * @return 0 on success and errno on failure + */ +extern int nvram_commit_internal(bool nvram_corrupt); + +/* + * Commit NVRAM variables to permanent storage. All pointers to values + * may be invalid after a commit. + * NVRAM values are undefined after a commit. + * @return 0 on success and errno on failure + */ +extern int nvram_commit(void); + +/* + * Get all NVRAM variables (format name=value\0 ... \0\0). + * @param buf buffer to store variables + * @param count size of buffer in bytes + * @return 0 on success and errno on failure + */ +extern int nvram_getall(char *nvram_buf, int count); + +/* + * returns the crc value of the nvram + * @param nvh nvram header pointer + */ +uint8 nvram_calc_crc(struct nvram_header * nvh); + +extern int nvram_space; +#endif /* _LANGUAGE_ASSEMBLY */ + +/* The NVRAM version number stored as an NVRAM variable */ +#define NVRAM_SOFTWARE_VERSION "1" + +#define NVRAM_MAGIC 0x48534C46 /* 'FLSH' */ +#define NVRAM_CLEAR_MAGIC 0x0 +#define NVRAM_INVALID_MAGIC 0xFFFFFFFF +#define NVRAM_VERSION 1 +#define NVRAM_HEADER_SIZE 20 +/* This definition is for precommit staging, and will be removed */ +#define NVRAM_SPACE 0x8000 +/* For CFE builds this gets passed in thru the makefile */ +#ifndef MAX_NVRAM_SPACE +#define MAX_NVRAM_SPACE 0x10000 +#endif +#define DEF_NVRAM_SPACE 0x8000 +#define ROM_ENVRAM_SPACE 0x1000 +#define NVRAM_LZMA_MAGIC 0x4c5a4d41 /* 'LZMA' */ + +#define NVRAM_MAX_VALUE_LEN 255 +#define NVRAM_MAX_PARAM_LEN 64 + +#define NVRAM_CRC_START_POSITION 9 /* magic, len, crc8 to be skipped */ +#define NVRAM_CRC_VER_MASK 0xffffff00 /* for crc_ver_init */ + +/* Offsets to embedded nvram area */ +#define NVRAM_START_COMPRESSED 0x400 +#define NVRAM_START 0x1000 + +#define BCM_JUMBO_NVRAM_DELIMIT '\n' +#define BCM_JUMBO_START "Broadcom Jumbo Nvram file" + +#if !defined(BCMDONGLEHOST) && !defined(BCMHIGHSDIO) && defined(BCMTRXV2) +extern char *_vars; +extern uint _varsz; +#endif /* !defined(BCMDONGLEHOST) && !defined(BCMHIGHSDIO) && defined(BCMTRXV2) */ + +#if (defined(FAILSAFE_UPGRADE) || defined(CONFIG_FAILSAFE_UPGRADE) || \ + defined(__CONFIG_FAILSAFE_UPGRADE_SUPPORT__)) +#define IMAGE_SIZE "image_size" +#define BOOTPARTITION "bootpartition" +#define IMAGE_BOOT BOOTPARTITION +#define PARTIALBOOTS "partialboots" +#define MAXPARTIALBOOTS "maxpartialboots" +#define IMAGE_1ST_FLASH_TRX "flash0.trx" +#define IMAGE_1ST_FLASH_OS "flash0.os" +#define IMAGE_2ND_FLASH_TRX "flash0.trx2" +#define IMAGE_2ND_FLASH_OS "flash0.os2" +#define IMAGE_FIRST_OFFSET "image_first_offset" +#define IMAGE_SECOND_OFFSET "image_second_offset" +#define LINUX_FIRST "linux" +#define LINUX_SECOND "linux2" +#endif + +#if (defined(DUAL_IMAGE) || defined(CONFIG_DUAL_IMAGE) || \ + defined(__CONFIG_DUAL_IMAGE_FLASH_SUPPORT__)) +/* Shared by all: CFE, Linux Kernel, and Ap */ +#define IMAGE_BOOT "image_boot" +#define BOOTPARTITION IMAGE_BOOT +/* CFE variables */ +#define IMAGE_1ST_FLASH_TRX "flash0.trx" +#define IMAGE_1ST_FLASH_OS "flash0.os" +#define IMAGE_2ND_FLASH_TRX "flash0.trx2" +#define IMAGE_2ND_FLASH_OS "flash0.os2" +#define IMAGE_SIZE "image_size" + +/* CFE and Linux Kernel shared variables */ +#define IMAGE_FIRST_OFFSET "image_first_offset" +#define IMAGE_SECOND_OFFSET "image_second_offset" + +/* Linux application variables */ +#define LINUX_FIRST "linux" +#define LINUX_SECOND "linux2" +#define POLICY_TOGGLE "toggle" +#define LINUX_PART_TO_FLASH "linux_to_flash" +#define LINUX_FLASH_POLICY "linux_flash_policy" + +#endif /* defined(DUAL_IMAGE||CONFIG_DUAL_IMAGE)||__CONFIG_DUAL_IMAGE_FLASH_SUPPORT__ */ + +#endif /* _bcmnvram_h_ */ diff --git a/external/cache/sources/wl/include/bcmotp.h b/external/cache/sources/wl/include/bcmotp.h new file mode 100644 index 0000000..e4c4271 --- /dev/null +++ b/external/cache/sources/wl/include/bcmotp.h @@ -0,0 +1,74 @@ +/* + * OTP support. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmotp.h 325751 2012-04-04 19:08:48Z nvalji $ + */ + +#ifndef _bcmotp_h_ +#define _bcmotp_h_ + +/* OTP regions */ +#define OTP_HW_RGN 1 +#define OTP_SW_RGN 2 +#define OTP_CI_RGN 4 +#define OTP_FUSE_RGN 8 +#define OTP_ALL_RGN 0xf /* From h/w region to end of OTP including checksum */ + +/* OTP Size */ +#define OTP_SZ_MAX (6144/8) /* maximum bytes in one CIS */ + +/* Fixed size subregions sizes in words */ +#define OTPGU_CI_SZ 2 + +/* OTP usage */ +#define OTP4325_FM_DISABLED_OFFSET 188 + +#if defined(BCMNVRAMW) || defined(OTP_REWRITE) +/* Global RDE index for chips not having an OTP PMU resource. */ +#define OTP_GLOBAL_RDE_IDX 0xFF +#endif + +/* Exported functions */ +extern int otp_status(void *oh); +extern int otp_size(void *oh); +extern uint16 otp_read_bit(void *oh, uint offset); +extern void* otp_init(si_t *sih); +#if !defined(BCMDONGLEHOST) +extern int otp_read_region(si_t *sih, int region, uint16 *data, uint *wlen); +extern int otp_read_word(si_t *sih, uint wn, uint16 *data); +extern int otp_nvread(void *oh, char *data, uint *len); +#ifdef BCMNVRAMW +extern int otp_write_region(si_t *sih, int region, uint16 *data, uint wlen); +extern int otp_write_word(si_t *sih, uint wn, uint16 data); +extern int otp_cis_append_region(si_t *sih, int region, char *vars, int count); +extern int otp_lock(si_t *sih); +extern int otp_nvwrite(void *oh, uint16 *data, uint wlen); +#endif /* BCMNVRAMW */ +#endif /* !defined(BCMDONGLEHOST) */ + +extern int otp_dump(void *oh, int arg, char *buf, uint size); +extern int otp_dumpstats(void *oh, int arg, char *buf, uint size); + +#if !defined(BCMDONGLEHOST) && defined(BCMNVRAMW) +#define otp_write_rde(oh, rde, bit, val) ipxotp_write_rde(oh, rde, bit, val) +extern int otp_write_bits(void *oh, uint offset, int bits, uint8* data); + +#ifdef OTP_DEBUG +extern int otp_verify1x(void *oh, uint off, uint fuse); +extern int otp_read1x(void *oh, uint off, uint fuse); +extern int otp_repair_bit(void *oh, uint off, uint val); +extern int otp_write_ones(void *oh, uint off, uint bits); +extern int otp_write_ones_old(void *oh, uint off, uint bits); +#endif + +#endif /* !defined(BCMDONGLEHOST) && defined(BCMNVRAMW) */ + + +#if !defined(BCMDONGLEHOST) && (defined(BCMNVRAMW) || defined(OTP_REWRITE)) +extern int ipxotp_write_rde(void *oh, int rde, uint bit, uint val); +extern int otp_rewrite_all(void *oh); +#endif /* !BCMDONGLEHOST) && (BCMNVRAMW || OTP_REWRITE) */ + +#endif /* _bcmotp_h_ */ diff --git a/external/cache/sources/wl/include/bcmpcispi.h b/external/cache/sources/wl/include/bcmpcispi.h new file mode 100644 index 0000000..d95f812 --- /dev/null +++ b/external/cache/sources/wl/include/bcmpcispi.h @@ -0,0 +1,163 @@ +/* + * Broadcom PCI-SPI Host Controller Register Definitions + * + * $ Copyright Open Broadcom Corporation $ + * + * $Id: bcmpcispi.h 241182 2011-02-17 21:50:03Z $ + */ +#ifndef _BCM_PCI_SPI_H +#define _BCM_PCI_SPI_H + +/* cpp contortions to concatenate w/arg prescan */ +#ifndef PAD +#define _PADLINE(line) pad ## line +#define _XSTR(line) _PADLINE(line) +#define PAD _XSTR(__LINE__) +#endif /* PAD */ + + +typedef volatile struct { + uint32 spih_ctrl; /* 0x00 SPI Control Register */ + uint32 spih_stat; /* 0x04 SPI Status Register */ + uint32 spih_data; /* 0x08 SPI Data Register, 32-bits wide */ + uint32 spih_ext; /* 0x0C SPI Extension Register */ + uint32 PAD[4]; /* 0x10-0x1F PADDING */ + + uint32 spih_gpio_ctrl; /* 0x20 SPI GPIO Control Register */ + uint32 spih_gpio_data; /* 0x24 SPI GPIO Data Register */ + uint32 PAD[6]; /* 0x28-0x3F PADDING */ + + uint32 spih_int_edge; /* 0x40 SPI Interrupt Edge Register (0=Level, 1=Edge) */ + uint32 spih_int_pol; /* 0x44 SPI Interrupt Polarity Register (0=Active Low, */ + /* 1=Active High) */ + uint32 spih_int_mask; /* 0x48 SPI Interrupt Mask */ + uint32 spih_int_status; /* 0x4C SPI Interrupt Status */ + uint32 PAD[4]; /* 0x50-0x5F PADDING */ + + uint32 spih_hex_disp; /* 0x60 SPI 4-digit hex display value */ + uint32 spih_current_ma; /* 0x64 SPI SD card current consumption in mA */ + uint32 PAD[1]; /* 0x68 PADDING */ + uint32 spih_disp_sel; /* 0x6c SPI 4-digit hex display mode select (1=current) */ + uint32 PAD[4]; /* 0x70-0x7F PADDING */ + uint32 PAD[8]; /* 0x80-0x9F PADDING */ + uint32 PAD[8]; /* 0xA0-0xBF PADDING */ + uint32 spih_pll_ctrl; /* 0xC0 PLL Control Register */ + uint32 spih_pll_status; /* 0xC4 PLL Status Register */ + uint32 spih_xtal_freq; /* 0xC8 External Clock Frequency in units of 10000Hz */ + uint32 spih_clk_count; /* 0xCC External Clock Count Register */ + +} spih_regs_t; + +typedef volatile struct { + uint32 cfg_space[0x40]; /* 0x000-0x0FF PCI Configuration Space (Read Only) */ + uint32 P_IMG_CTRL0; /* 0x100 PCI Image0 Control Register */ + + uint32 P_BA0; /* 0x104 32 R/W PCI Image0 Base Address register */ + uint32 P_AM0; /* 0x108 32 R/W PCI Image0 Address Mask register */ + uint32 P_TA0; /* 0x10C 32 R/W PCI Image0 Translation Address register */ + uint32 P_IMG_CTRL1; /* 0x110 32 R/W PCI Image1 Control register */ + uint32 P_BA1; /* 0x114 32 R/W PCI Image1 Base Address register */ + uint32 P_AM1; /* 0x118 32 R/W PCI Image1 Address Mask register */ + uint32 P_TA1; /* 0x11C 32 R/W PCI Image1 Translation Address register */ + uint32 P_IMG_CTRL2; /* 0x120 32 R/W PCI Image2 Control register */ + uint32 P_BA2; /* 0x124 32 R/W PCI Image2 Base Address register */ + uint32 P_AM2; /* 0x128 32 R/W PCI Image2 Address Mask register */ + uint32 P_TA2; /* 0x12C 32 R/W PCI Image2 Translation Address register */ + uint32 P_IMG_CTRL3; /* 0x130 32 R/W PCI Image3 Control register */ + uint32 P_BA3; /* 0x134 32 R/W PCI Image3 Base Address register */ + uint32 P_AM3; /* 0x138 32 R/W PCI Image3 Address Mask register */ + uint32 P_TA3; /* 0x13C 32 R/W PCI Image3 Translation Address register */ + uint32 P_IMG_CTRL4; /* 0x140 32 R/W PCI Image4 Control register */ + uint32 P_BA4; /* 0x144 32 R/W PCI Image4 Base Address register */ + uint32 P_AM4; /* 0x148 32 R/W PCI Image4 Address Mask register */ + uint32 P_TA4; /* 0x14C 32 R/W PCI Image4 Translation Address register */ + uint32 P_IMG_CTRL5; /* 0x150 32 R/W PCI Image5 Control register */ + uint32 P_BA5; /* 0x154 32 R/W PCI Image5 Base Address register */ + uint32 P_AM5; /* 0x158 32 R/W PCI Image5 Address Mask register */ + uint32 P_TA5; /* 0x15C 32 R/W PCI Image5 Translation Address register */ + uint32 P_ERR_CS; /* 0x160 32 R/W PCI Error Control and Status register */ + uint32 P_ERR_ADDR; /* 0x164 32 R PCI Erroneous Address register */ + uint32 P_ERR_DATA; /* 0x168 32 R PCI Erroneous Data register */ + + uint32 PAD[5]; /* 0x16C-0x17F PADDING */ + + uint32 WB_CONF_SPC_BAR; /* 0x180 32 R WISHBONE Configuration Space Base Address */ + uint32 W_IMG_CTRL1; /* 0x184 32 R/W WISHBONE Image1 Control register */ + uint32 W_BA1; /* 0x188 32 R/W WISHBONE Image1 Base Address register */ + uint32 W_AM1; /* 0x18C 32 R/W WISHBONE Image1 Address Mask register */ + uint32 W_TA1; /* 0x190 32 R/W WISHBONE Image1 Translation Address reg */ + uint32 W_IMG_CTRL2; /* 0x194 32 R/W WISHBONE Image2 Control register */ + uint32 W_BA2; /* 0x198 32 R/W WISHBONE Image2 Base Address register */ + uint32 W_AM2; /* 0x19C 32 R/W WISHBONE Image2 Address Mask register */ + uint32 W_TA2; /* 0x1A0 32 R/W WISHBONE Image2 Translation Address reg */ + uint32 W_IMG_CTRL3; /* 0x1A4 32 R/W WISHBONE Image3 Control register */ + uint32 W_BA3; /* 0x1A8 32 R/W WISHBONE Image3 Base Address register */ + uint32 W_AM3; /* 0x1AC 32 R/W WISHBONE Image3 Address Mask register */ + uint32 W_TA3; /* 0x1B0 32 R/W WISHBONE Image3 Translation Address reg */ + uint32 W_IMG_CTRL4; /* 0x1B4 32 R/W WISHBONE Image4 Control register */ + uint32 W_BA4; /* 0x1B8 32 R/W WISHBONE Image4 Base Address register */ + uint32 W_AM4; /* 0x1BC 32 R/W WISHBONE Image4 Address Mask register */ + uint32 W_TA4; /* 0x1C0 32 R/W WISHBONE Image4 Translation Address reg */ + uint32 W_IMG_CTRL5; /* 0x1C4 32 R/W WISHBONE Image5 Control register */ + uint32 W_BA5; /* 0x1C8 32 R/W WISHBONE Image5 Base Address register */ + uint32 W_AM5; /* 0x1CC 32 R/W WISHBONE Image5 Address Mask register */ + uint32 W_TA5; /* 0x1D0 32 R/W WISHBONE Image5 Translation Address reg */ + uint32 W_ERR_CS; /* 0x1D4 32 R/W WISHBONE Error Control and Status reg */ + uint32 W_ERR_ADDR; /* 0x1D8 32 R WISHBONE Erroneous Address register */ + uint32 W_ERR_DATA; /* 0x1DC 32 R WISHBONE Erroneous Data register */ + uint32 CNF_ADDR; /* 0x1E0 32 R/W Configuration Cycle register */ + uint32 CNF_DATA; /* 0x1E4 32 R/W Configuration Cycle Generation Data reg */ + + uint32 INT_ACK; /* 0x1E8 32 R Interrupt Acknowledge register */ + uint32 ICR; /* 0x1EC 32 R/W Interrupt Control register */ + uint32 ISR; /* 0x1F0 32 R/W Interrupt Status register */ +} spih_pciregs_t; + +/* + * PCI Core interrupt enable and status bit definitions. + */ + +/* PCI Core ICR Register bit definitions */ +#define PCI_INT_PROP_EN (1 << 0) /* Interrupt Propagation Enable */ +#define PCI_WB_ERR_INT_EN (1 << 1) /* Wishbone Error Interrupt Enable */ +#define PCI_PCI_ERR_INT_EN (1 << 2) /* PCI Error Interrupt Enable */ +#define PCI_PAR_ERR_INT_EN (1 << 3) /* Parity Error Interrupt Enable */ +#define PCI_SYS_ERR_INT_EN (1 << 4) /* System Error Interrupt Enable */ +#define PCI_SOFTWARE_RESET (1U << 31) /* Software reset of the PCI Core. */ + + +/* PCI Core ISR Register bit definitions */ +#define PCI_INT_PROP_ST (1 << 0) /* Interrupt Propagation Status */ +#define PCI_WB_ERR_INT_ST (1 << 1) /* Wishbone Error Interrupt Status */ +#define PCI_PCI_ERR_INT_ST (1 << 2) /* PCI Error Interrupt Status */ +#define PCI_PAR_ERR_INT_ST (1 << 3) /* Parity Error Interrupt Status */ +#define PCI_SYS_ERR_INT_ST (1 << 4) /* System Error Interrupt Status */ + + +/* Registers on the Wishbone bus */ +#define SPIH_CTLR_INTR (1 << 0) /* SPI Host Controller Core Interrupt */ +#define SPIH_DEV_INTR (1 << 1) /* SPI Device Interrupt */ +#define SPIH_WFIFO_INTR (1 << 2) /* SPI Tx FIFO Empty Intr (FPGA Rev >= 8) */ + +/* GPIO Bit definitions */ +#define SPIH_CS (1 << 0) /* SPI Chip Select (active low) */ +#define SPIH_SLOT_POWER (1 << 1) /* SD Card Slot Power Enable */ +#define SPIH_CARD_DETECT (1 << 2) /* SD Card Detect */ + +/* SPI Status Register Bit definitions */ +#define SPIH_STATE_MASK 0x30 /* SPI Transfer State Machine state mask */ +#define SPIH_STATE_SHIFT 4 /* SPI Transfer State Machine state shift */ +#define SPIH_WFFULL (1 << 3) /* SPI Write FIFO Full */ +#define SPIH_WFEMPTY (1 << 2) /* SPI Write FIFO Empty */ +#define SPIH_RFFULL (1 << 1) /* SPI Read FIFO Full */ +#define SPIH_RFEMPTY (1 << 0) /* SPI Read FIFO Empty */ + +#define SPIH_EXT_CLK (1U << 31) /* Use External Clock as PLL Clock source. */ + +#define SPIH_PLL_NO_CLK (1 << 1) /* Set to 1 if the PLL's input clock is lost. */ +#define SPIH_PLL_LOCKED (1 << 3) /* Set to 1 when the PLL is locked. */ + +/* Spin bit loop bound check */ +#define SPI_SPIN_BOUND 0xf4240 /* 1 million */ + +#endif /* _BCM_PCI_SPI_H */ diff --git a/external/cache/sources/wl/include/bcmperf.h b/external/cache/sources/wl/include/bcmperf.h new file mode 100644 index 0000000..39cfc45 --- /dev/null +++ b/external/cache/sources/wl/include/bcmperf.h @@ -0,0 +1,18 @@ +/* + * Performance counters software interface. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmperf.h 241182 2011-02-17 21:50:03Z $ + */ +/* essai */ +#ifndef _BCMPERF_H_ +#define _BCMPERF_H_ +/* get cache hits and misses */ +#define BCMPERF_ENABLE_INSTRCOUNT() +#define BCMPERF_ENABLE_ICACHE_MISS() +#define BCMPERF_ENABLE_ICACHE_HIT() +#define BCMPERF_GETICACHE_MISS(x) ((x) = 0) +#define BCMPERF_GETICACHE_HIT(x) ((x) = 0) +#define BCMPERF_GETINSTRCOUNT(x) ((x) = 0) +#endif /* _BCMPERF_H_ */ diff --git a/external/cache/sources/wl/include/bcmsdbrcm.h b/external/cache/sources/wl/include/bcmsdbrcm.h new file mode 100644 index 0000000..8cb7122 --- /dev/null +++ b/external/cache/sources/wl/include/bcmsdbrcm.h @@ -0,0 +1,98 @@ +/* + * BRCM SDIO HOST CONTROLLER driver + * + * Copyright (C) 2012, Broadcom Corporation + * All Rights Reserved. + * + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation; + * the contents of this file may not be disclosed to third parties, copied + * or duplicated in any form, in whole or in part, without the prior + * written permission of Broadcom Corporation. + * + * $Id: bcmsdbrcm.h 241182 2011-02-17 21:50:03Z gmo $ + */ + +/* global msglevel for debug messages */ +#ifdef BCMDBG +#define sd_err(x) do { if (sd_msglevel & SDH_ERROR_VAL) printf x; } while (0) +#define sd_trace(x) do { if (sd_msglevel & SDH_TRACE_VAL) printf x; } while (0) +#define sd_info(x) do { if (sd_msglevel & SDH_INFO_VAL) printf x; } while (0) +#define sd_debug(x) do { if (sd_msglevel & SDH_DEBUG_VAL) printf x; } while (0) +#define sd_data(x) do { if (sd_msglevel & SDH_DATA_VAL) printf x; } while (0) +#define sd_ctrl(x) do { if (sd_msglevel & SDH_CTRL_VAL) printf x; } while (0) +#else +#define sd_err(x) +#define sd_trace(x) +#define sd_info(x) +#define sd_debug(x) +#define sd_data(x) +#define sd_ctrl(x) +#endif + +#ifdef BCMPERFSTATS +#define sd_log(x) do { if (sd_msglevel & SDH_LOG_VAL) bcmlog x; } while (0) +#else +#define sd_log(x) +#endif + +/* SDIOH public information, used by per-port code */ +struct sdioh_pubinfo { + int local_intrcount; /* Controller interrupt count */ + bool dev_init_done; /* Client SDIO interface initted */ + bool host_init_done; /* Controller initted */ + bool intr_registered; /* Client handler registered */ + bool dev_intr_enabled; /* Device interrupt enabled/disabled */ + uint lockcount; /* Next count of sdbrcm_lock() calls */ + void *sdos_info; /* Pointer to per-OS private data */ +}; + + +#define BLOCK_SIZE_4318 64 +#define BLOCK_SIZE_4328 512 + +/* private bus modes */ +/* move to API or hardware header. */ +#define SDIOH_MODE_SPI 0 +#define SDIOH_MODE_SD1 1 +#define SDIOH_MODE_SD4 2 + +/* Expected dev status value for CMD7 */ +#define SDIOH_CMD7_EXP_STATUS 0x00001E00 + +#define RETRIES_SMALL 20 +#define RETRIES_LARGE 500000 +#define SD_TIMEOUT 250000 /* Timeout after several ms if CMD not complete. */ + +#define ARVM_MASK 0xFF10 + +#define USE_PIO 0x0 /* DMA or PIO */ +#define USE_DMA 0x1 + +#define NTXD 4 +#define NRXD 4 +#define RXBUFSZ 8192 +#define NRXBUFPOST 4 +#define HWRXOFF 8 + +#define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */ +#define USE_MULTIBLOCK 0x4 + +#define EXT_CLK 0xffffffff /* external clock improve comment. */ + +extern int isr_sdbrcm_check_dev_intr(struct sdioh_pubinfo *sd); +extern uint sd_msglevel; + +extern uint32 *sdbrcm_reg_map(osl_t *osh, int32 addr, int size); +extern void sdbrcm_reg_unmap(osl_t *osh, int32 addr, int size); +extern int sdbrcm_register_irq(sdioh_info_t *sd, uint irq); +extern void sdbrcm_free_irq(uint irq, sdioh_info_t *sd); + +extern void sdbrcm_lock(sdioh_info_t *sd); +extern void sdbrcm_unlock(sdioh_info_t *sd); + +extern void sdbrcm_devintr_on(sdioh_info_t *sd); +extern void sdbrcm_devintr_off(sdioh_info_t *sd); + +/* Allocate/init/free per-OS private data */ +extern int sdbrcm_osinit(sdioh_info_t *sd, osl_t *osh); +extern void sdbrcm_osfree(sdioh_info_t *sd, osl_t *osh); diff --git a/external/cache/sources/wl/include/bcmsdbus.h b/external/cache/sources/wl/include/bcmsdbus.h new file mode 100644 index 0000000..4b28d53 --- /dev/null +++ b/external/cache/sources/wl/include/bcmsdbus.h @@ -0,0 +1,121 @@ +/* + * Definitions for API from sdio common code (bcmsdh) to individual + * host controller drivers. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmsdbus.h 299859 2011-12-01 03:53:27Z $ + */ + +#ifndef _sdio_api_h_ +#define _sdio_api_h_ + + +#define SDIOH_API_RC_SUCCESS (0x00) +#define SDIOH_API_RC_FAIL (0x01) +#define SDIOH_API_SUCCESS(status) (status == 0) + +#define SDIOH_READ 0 /* Read request */ +#define SDIOH_WRITE 1 /* Write request */ + +#define SDIOH_DATA_FIX 0 /* Fixed addressing */ +#define SDIOH_DATA_INC 1 /* Incremental addressing */ + +#define SDIOH_CMD_TYPE_NORMAL 0 /* Normal command */ +#define SDIOH_CMD_TYPE_APPEND 1 /* Append command */ +#define SDIOH_CMD_TYPE_CUTTHRU 2 /* Cut-through command */ + +#define SDIOH_DATA_PIO 0 /* PIO mode */ +#define SDIOH_DATA_DMA 1 /* DMA mode */ + + +typedef int SDIOH_API_RC; + +/* SDio Host structure */ +typedef struct sdioh_info sdioh_info_t; + +/* callback function, taking one arg */ +typedef void (*sdioh_cb_fn_t)(void *); + +/* attach, return handler on success, NULL if failed. + * The handler shall be provided by all subsequent calls. No local cache + * cfghdl points to the starting address of pci device mapped memory + */ +extern sdioh_info_t * sdioh_attach(osl_t *osh, void *cfghdl, uint irq); +extern SDIOH_API_RC sdioh_detach(osl_t *osh, sdioh_info_t *si); +extern SDIOH_API_RC sdioh_interrupt_register(sdioh_info_t *si, sdioh_cb_fn_t fn, void *argh); +extern SDIOH_API_RC sdioh_interrupt_deregister(sdioh_info_t *si); + +/* query whether SD interrupt is enabled or not */ +extern SDIOH_API_RC sdioh_interrupt_query(sdioh_info_t *si, bool *onoff); + +/* enable or disable SD interrupt */ +extern SDIOH_API_RC sdioh_interrupt_set(sdioh_info_t *si, bool enable_disable); + +#if defined(DHD_DEBUG) +extern bool sdioh_interrupt_pending(sdioh_info_t *si); +#endif + +/* read or write one byte using cmd52 */ +extern SDIOH_API_RC sdioh_request_byte(sdioh_info_t *si, uint rw, uint fnc, uint addr, uint8 *byte); + +/* read or write 2/4 bytes using cmd53 */ +extern SDIOH_API_RC sdioh_request_word(sdioh_info_t *si, uint cmd_type, uint rw, uint fnc, + uint addr, uint32 *word, uint nbyte); + +/* read or write any buffer using cmd53 */ +extern SDIOH_API_RC sdioh_request_buffer(sdioh_info_t *si, uint pio_dma, uint fix_inc, + uint rw, uint fnc_num, uint32 addr, uint regwidth, uint32 buflen, uint8 *buffer, + void *pkt); + +/* get cis data */ +extern SDIOH_API_RC sdioh_cis_read(sdioh_info_t *si, uint fuc, uint8 *cis, uint32 length); + +extern SDIOH_API_RC sdioh_cfg_read(sdioh_info_t *si, uint fuc, uint32 addr, uint8 *data); +extern SDIOH_API_RC sdioh_cfg_write(sdioh_info_t *si, uint fuc, uint32 addr, uint8 *data); + +/* query number of io functions */ +extern uint sdioh_query_iofnum(sdioh_info_t *si); + +/* handle iovars */ +extern int sdioh_iovar_op(sdioh_info_t *si, const char *name, + void *params, int plen, void *arg, int len, bool set); + +/* Issue abort to the specified function and clear controller as needed */ +extern int sdioh_abort(sdioh_info_t *si, uint fnc); + +/* Start and Stop SDIO without re-enumerating the SD card. */ +extern int sdioh_start(sdioh_info_t *si, int stage); +extern int sdioh_stop(sdioh_info_t *si); + +/* Wait system lock free */ +extern int sdioh_waitlockfree(sdioh_info_t *si); + +/* Reset and re-initialize the device */ +extern int sdioh_sdio_reset(sdioh_info_t *si); + +/* Helper function */ +void *bcmsdh_get_sdioh(bcmsdh_info_t *sdh); + + +#ifdef BCMSPI +/* Function to pass gSPI specific device-status bits to dhd. */ +extern uint32 sdioh_get_dstatus(sdioh_info_t *si); + +/* chipid and chiprev info for lower layers to control sw WAR's for hw bugs. */ +extern void sdioh_chipinfo(sdioh_info_t *si, uint32 chip, uint32 chiprev); +extern void sdioh_dwordmode(sdioh_info_t *si, bool set); +#endif /* BCMSPI */ + +#if defined(BCMSDIOH_STD) + #define SDIOH_SLEEP_ENABLED +#endif +extern SDIOH_API_RC sdioh_sleep(sdioh_info_t *si, bool enab); + +/* GPIO support */ +extern SDIOH_API_RC sdioh_gpio_init(sdioh_info_t *sd); +extern bool sdioh_gpioin(sdioh_info_t *sd, uint32 gpio); +extern SDIOH_API_RC sdioh_gpioouten(sdioh_info_t *sd, uint32 gpio); +extern SDIOH_API_RC sdioh_gpioout(sdioh_info_t *sd, uint32 gpio, bool enab); + +#endif /* _sdio_api_h_ */ diff --git a/external/cache/sources/wl/include/bcmsdh.h b/external/cache/sources/wl/include/bcmsdh.h new file mode 100644 index 0000000..1a2d7b2 --- /dev/null +++ b/external/cache/sources/wl/include/bcmsdh.h @@ -0,0 +1,218 @@ +/* + * SDIO host client driver interface of Broadcom HNBU + * export functions to client drivers + * abstract OS and BUS specific details of SDIO + * + * $ Copyright Open License Broadcom Corporation $ + * + * $Id: bcmsdh.h 327775 2012-04-16 18:54:32Z $ + */ + +/** + * @file bcmsdh.h + */ + +#ifndef _bcmsdh_h_ +#define _bcmsdh_h_ + +#define BCMSDH_ERROR_VAL 0x0001 /* Error */ +#define BCMSDH_INFO_VAL 0x0002 /* Info */ +extern const uint bcmsdh_msglevel; + +#define BCMSDH_ERROR(x) +#define BCMSDH_INFO(x) + +#if (defined(BCMSDIOH_STD) || defined(BCMSDIOH_BCM) || defined(BCMSDIOH_SPI)) +#define BCMSDH_ADAPTER +#endif /* BCMSDIO && (BCMSDIOH_STD || BCMSDIOH_BCM || BCMSDIOH_SPI) */ + +/* forward declarations */ +typedef struct bcmsdh_info bcmsdh_info_t; +typedef void (*bcmsdh_cb_fn_t)(void *); + +/* Attach and build an interface to the underlying SD host driver. + * - Allocates resources (structs, arrays, mem, OS handles, etc) needed by bcmsdh. + * - Returns the bcmsdh handle and virtual address base for register access. + * The returned handle should be used in all subsequent calls, but the bcmsh + * implementation may maintain a single "default" handle (e.g. the first or + * most recent one) to enable single-instance implementations to pass NULL. + */ + +#if 0 && (NDISVER >= 0x0630) && 1 +extern bcmsdh_info_t *bcmsdh_attach(osl_t *osh, void *cfghdl, + void **regsva, uint irq, shared_info_t *sh); +#else +extern bcmsdh_info_t *bcmsdh_attach(osl_t *osh, void *cfghdl, void **regsva, uint irq); +#endif + +/* Detach - freeup resources allocated in attach */ +extern int bcmsdh_detach(osl_t *osh, void *sdh); + +/* Query if SD device interrupts are enabled */ +extern bool bcmsdh_intr_query(void *sdh); + +/* Enable/disable SD interrupt */ +extern int bcmsdh_intr_enable(void *sdh); +extern int bcmsdh_intr_disable(void *sdh); + +/* Register/deregister device interrupt handler. */ +extern int bcmsdh_intr_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); +extern int bcmsdh_intr_dereg(void *sdh); + +#if defined(DHD_DEBUG) +/* Query pending interrupt status from the host controller */ +extern bool bcmsdh_intr_pending(void *sdh); +#endif + +/* Register a callback to be called if and when bcmsdh detects + * device removal. No-op in the case of non-removable/hardwired devices. + */ +extern int bcmsdh_devremove_reg(void *sdh, bcmsdh_cb_fn_t fn, void *argh); + +/* Access SDIO address space (e.g. CCCR) using CMD52 (single-byte interface). + * fn: function number + * addr: unmodified SDIO-space address + * data: data byte to write + * err: pointer to error code (or NULL) + */ +extern uint8 bcmsdh_cfg_read(void *sdh, uint func, uint32 addr, int *err); +extern void bcmsdh_cfg_write(void *sdh, uint func, uint32 addr, uint8 data, int *err); + +/* Read/Write 4bytes from/to cfg space */ +extern uint32 bcmsdh_cfg_read_word(void *sdh, uint fnc_num, uint32 addr, int *err); +extern void bcmsdh_cfg_write_word(void *sdh, uint fnc_num, uint32 addr, uint32 data, int *err); + +/* Read CIS content for specified function. + * fn: function whose CIS is being requested (0 is common CIS) + * cis: pointer to memory location to place results + * length: number of bytes to read + * Internally, this routine uses the values from the cis base regs (0x9-0xB) + * to form an SDIO-space address to read the data from. + */ +extern int bcmsdh_cis_read(void *sdh, uint func, uint8 *cis, uint length); + +/* Synchronous access to device (client) core registers via CMD53 to F1. + * addr: backplane address (i.e. >= regsva from attach) + * size: register width in bytes (2 or 4) + * data: data for register write + */ +extern uint32 bcmsdh_reg_read(void *sdh, uint32 addr, uint size); +extern uint32 bcmsdh_reg_write(void *sdh, uint32 addr, uint size, uint32 data); + +/* set sb address window */ +extern int bcmsdhsdio_set_sbaddr_window(void *sdh, uint32 address, bool force_set); + +/* Indicate if last reg read/write failed */ +extern bool bcmsdh_regfail(void *sdh); + +/* Buffer transfer to/from device (client) core via cmd53. + * fn: function number + * addr: backplane address (i.e. >= regsva from attach) + * flags: backplane width, address increment, sync/async + * buf: pointer to memory data buffer + * nbytes: number of bytes to transfer to/from buf + * pkt: pointer to packet associated with buf (if any) + * complete: callback function for command completion (async only) + * handle: handle for completion callback (first arg in callback) + * Returns 0 or error code. + * NOTE: Async operation is not currently supported. + */ +typedef void (*bcmsdh_cmplt_fn_t)(void *handle, int status, bool sync_waiting); +extern int bcmsdh_send_buf(void *sdh, uint32 addr, uint fn, uint flags, + uint8 *buf, uint nbytes, void *pkt, + bcmsdh_cmplt_fn_t complete_fn, void *handle); +extern int bcmsdh_recv_buf(void *sdh, uint32 addr, uint fn, uint flags, + uint8 *buf, uint nbytes, void *pkt, + bcmsdh_cmplt_fn_t complete_fn, void *handle); + +/* Flags bits */ +#define SDIO_REQ_4BYTE 0x1 /* Four-byte target (backplane) width (vs. two-byte) */ +#define SDIO_REQ_FIXED 0x2 /* Fixed address (FIFO) (vs. incrementing address) */ +#define SDIO_REQ_ASYNC 0x4 /* Async request (vs. sync request) */ +#define SDIO_BYTE_MODE 0x8 /* Byte mode request(non-block mode) */ + +/* Pending (non-error) return code */ +#define BCME_PENDING 1 + +/* Read/write to memory block (F1, no FIFO) via CMD53 (sync only). + * rw: read or write (0/1) + * addr: direct SDIO address + * buf: pointer to memory data buffer + * nbytes: number of bytes to transfer to/from buf + * Returns 0 or error code. + */ +extern int bcmsdh_rwdata(void *sdh, uint rw, uint32 addr, uint8 *buf, uint nbytes); + +/* Issue an abort to the specified function */ +extern int bcmsdh_abort(void *sdh, uint fn); + +/* Start SDIO Host Controller communication */ +extern int bcmsdh_start(void *sdh, int stage); + +/* Stop SDIO Host Controller communication */ +extern int bcmsdh_stop(void *sdh); + +/* Wait system lock free */ +extern int bcmsdh_waitlockfree(void *sdh); + +/* Returns the "Device ID" of target device on the SDIO bus. */ +extern int bcmsdh_query_device(void *sdh); + +/* Returns the number of IO functions reported by the device */ +extern uint bcmsdh_query_iofnum(void *sdh); + +/* Miscellaneous knob tweaker. */ +extern int bcmsdh_iovar_op(void *sdh, const char *name, + void *params, int plen, void *arg, int len, bool set); + +/* Reset and reinitialize the device */ +extern int bcmsdh_reset(bcmsdh_info_t *sdh); + +/* helper functions */ + +extern void *bcmsdh_get_sdioh(bcmsdh_info_t *sdh); + +/* callback functions */ +typedef struct { + /* attach to device */ + void *(*attach)(uint16 vend_id, uint16 dev_id, uint16 bus, uint16 slot, + uint16 func, uint bustype, void * regsva, osl_t * osh, + void * param); + /* detach from device */ + void (*detach)(void *ch); +} bcmsdh_driver_t; + +/* platform specific/high level functions */ +extern int bcmsdh_register(bcmsdh_driver_t *driver); +extern void bcmsdh_unregister(void); +extern bool bcmsdh_chipmatch(uint16 vendor, uint16 device); +extern void bcmsdh_device_remove(void * sdh); + +#if defined(OOB_INTR_ONLY) +extern int bcmsdh_register_oob_intr(void * dhdp); +extern void bcmsdh_unregister_oob_intr(void); +extern void bcmsdh_oob_intr_set(bool enable); +#endif /* defined(OOB_INTR_ONLY) */ + +/* Function to pass device-status bits to DHD. */ +extern uint32 bcmsdh_get_dstatus(void *sdh); + +/* Function to return current window addr */ +extern uint32 bcmsdh_cur_sbwad(void *sdh); + +/* Function to pass chipid and rev to lower layers for controlling pr's */ +extern void bcmsdh_chipinfo(void *sdh, uint32 chip, uint32 chiprev); + +#ifdef BCMSPI +extern void bcmsdh_dwordmode(void *sdh, bool set); +#endif /* BCMSPI */ + +extern int bcmsdh_sleep(void *sdh, bool enab); + +/* GPIO support */ +extern int bcmsdh_gpio_init(void *sd); +extern bool bcmsdh_gpioin(void *sd, uint32 gpio); +extern int bcmsdh_gpioouten(void *sd, uint32 gpio); +extern int bcmsdh_gpioout(void *sd, uint32 gpio, bool enab); + +#endif /* _bcmsdh_h_ */ diff --git a/external/cache/sources/wl/include/bcmsdh_fd.h b/external/cache/sources/wl/include/bcmsdh_fd.h new file mode 100644 index 0000000..1589584 --- /dev/null +++ b/external/cache/sources/wl/include/bcmsdh_fd.h @@ -0,0 +1,149 @@ +/* + * BCMSDH Function Driver for SDIO-Linux + * + * Copyright (C) 1999-2012, Broadcom Corporation + * + * Unless you and Broadcom execute a separate written software license + * agreement governing use of this software, this software is licensed to you + * under the terms of the GNU General Public License version 2 (the "GPL"), + * available at http://www.broadcom.com/licenses/GPLv2.php, with the + * following added to such license: + * + * As a special exception, the copyright holders of this software give you + * permission to link this software with independent modules, and to copy and + * distribute the resulting executable under terms of your choice, provided that + * you also meet, for each linked independent module, the terms and conditions of + * the license of that module. An independent module is a module which is not + * derived from this software. The special exception does not apply to any + * modifications of the software. + * + * Notwithstanding the above, under no circumstances may you combine this + * software in any way with any other Broadcom software provided under a license + * other than the GPL, without Broadcom's express prior written consent. + * + * $Id: bcmsdh_fd.h 241182 2011-02-17 21:50:03Z gmo $ + */ + +#ifndef __BCMSDH_FD_H__ +#define __BCMSDH_FD_H__ + +#ifdef BCMDBG +#define sd_err(x) do { if (sd_msglevel & SDH_ERROR_VAL) printf x; } while (0) +#define sd_trace(x) do { if (sd_msglevel & SDH_TRACE_VAL) printf x; } while (0) +#define sd_info(x) do { if (sd_msglevel & SDH_INFO_VAL) printf x; } while (0) +#define sd_debug(x) do { if (sd_msglevel & SDH_DEBUG_VAL) printf x; } while (0) +#define sd_data(x) do { if (sd_msglevel & SDH_DATA_VAL) printf x; } while (0) +#define sd_ctrl(x) do { if (sd_msglevel & SDH_CTRL_VAL) printf x; } while (0) +#else +#define sd_err(x) +#define sd_trace(x) +#define sd_info(x) +#define sd_debug(x) +#define sd_data(x) +#define sd_ctrl(x) +#endif + +#define sd_sync_dma(sd, read, nbytes) +#define sd_init_dma(sd) +#define sd_ack_intr(sd) +#define sd_wakeup(sd); +/* Allocate/init/free per-OS private data */ +extern int sdiohfd_osinit(sdioh_info_t *sd); +extern void sdiohfd_osfree(sdioh_info_t *sd); + +#ifdef BCMPERFSTATS +#define sd_log(x) do { if (sd_msglevel & SDH_LOG_VAL) bcmlog x; } while (0) +#else +#define sd_log(x) +#endif + +#define SDIOH_ASSERT(exp) \ + do { if (!(exp)) \ + printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \ + } while (0) + +#define BLOCK_SIZE_4318 64 +#define BLOCK_SIZE_4328 512 + +/* internal return code */ +#define SUCCESS 0 +#define ERROR 1 + +/* private bus modes */ +#define SDIOH_MODE_SD4 2 +#define CLIENT_INTR 0x100 /* Get rid of this! */ +#define DMA_MAX_LEN (7*1024) + +struct sdioh_info { + osl_t *osh; /* osh handler */ + bool client_intr_enabled; /* interrupt connnected flag */ + bool intr_handler_valid; /* client driver interrupt handler valid */ + sdioh_cb_fn_t intr_handler; /* registered interrupt handler */ + void *intr_handler_arg; /* argument to call interrupt handler */ + uint16 intmask; /* Current active interrupts */ + void *sdos_info; /* Pointer to per-OS private data */ + + uint irq; /* Client irq */ + int intrcount; /* Client interrupts */ + + bool sd_use_dma; /* DMA on CMD53 */ + bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */ + /* Must be on for sd_multiblock to be effective */ + bool use_client_ints; /* If this is false, make sure to restore */ + int sd_mode; /* SD1/SD4/SPI */ + int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */ + uint8 num_funcs; /* Supported funcs on client */ + uint32 com_cis_ptr; + uint32 func_cis_ptr[SDIOD_MAX_IOFUNCS]; + uint max_dma_len; + uint max_dma_descriptors; /* DMA Descriptors supported by this controller. */ + SDDMA_DESCRIPTOR SGList[32]; /* Scatter/Gather DMA List */ +}; + +/************************************************************ + * Internal interfaces: per-port references into bcmsdiohfd.c + */ + +/* Global message bits */ +extern uint sd_msglevel; + +/* OS-independent interrupt handler */ +extern bool check_client_intr(sdioh_info_t *sd); + +/* Core interrupt enable/disable of device interrupts */ +extern void sdiohfd_devintr_on(sdioh_info_t *sd); +extern void sdiohfd_devintr_off(sdioh_info_t *sd); + + +/************************************************************** + * Internal interfaces: bcmsdiohfd.c references to per-port code + */ + +/* Register mapping routines */ +extern uint32 *sdiohfd_reg_map(osl_t *osh, int32 addr, int size); +extern void sdiohfd_reg_unmap(osl_t *osh, int32 addr, int size); + +/* Interrupt (de)registration routines */ +extern int sdiohfd_register_irq(sdioh_info_t *sd, uint irq); +extern void sdiohfd_free_irq(uint irq, sdioh_info_t *sd); + +typedef struct _BCMSDH_FD_INSTANCE { + PSDDEVICE pDevice[3]; /* bus driver's device we are supporting */ + sdioh_info_t *sd; + SDIO_STATUS LastRequestStatus; /* last request status */ +} BCMSDH_FD_INSTANCE, *PBCMSDH_FD_INSTANCE; + +typedef struct _BCMSDH_FD_CONTEXT { + SDFUNCTION Function; /* function description for bus driver */ + PBCMSDH_FD_INSTANCE pInstance; + SD_BUSCLOCK_RATE ClockOverride; /* clock rate override */ +} BCMSDH_FD_CONTEXT, *PBCMSDH_FD_CONTEXT; + +/* prototypes */ +SDIO_STATUS client_init(PBCMSDH_FD_CONTEXT pFuncContext, + PBCMSDH_FD_INSTANCE pInstance, + PSDDEVICE pDevice); +void client_detach(PBCMSDH_FD_CONTEXT pFuncContext, + PBCMSDH_FD_INSTANCE pInstance); + +#endif /* __BCMSDH_FD_H__ */ diff --git a/external/cache/sources/wl/include/bcmsdh_sdmmc.h b/external/cache/sources/wl/include/bcmsdh_sdmmc.h new file mode 100644 index 0000000..3561e7e --- /dev/null +++ b/external/cache/sources/wl/include/bcmsdh_sdmmc.h @@ -0,0 +1,122 @@ +/* + * BCMSDH Function Driver for the native SDIO/MMC driver in the Linux Kernel + * + * Copyright (C) 1999-2013, Broadcom Corporation + * + * Unless you and Broadcom execute a separate written software license + * agreement governing use of this software, this software is licensed to you + * under the terms of the GNU General Public License version 2 (the "GPL"), + * available at http://www.broadcom.com/licenses/GPLv2.php, with the + * following added to such license: + * + * As a special exception, the copyright holders of this software give you + * permission to link this software with independent modules, and to copy and + * distribute the resulting executable under terms of your choice, provided that + * you also meet, for each linked independent module, the terms and conditions of + * the license of that module. An independent module is a module which is not + * derived from this software. The special exception does not apply to any + * modifications of the software. + * + * Notwithstanding the above, under no circumstances may you combine this + * software in any way with any other Broadcom software provided under a license + * other than the GPL, without Broadcom's express prior written consent. + * + * $Id: bcmsdh_sdmmc.h 294363 2011-11-06 23:02:20Z $ + */ + +#ifndef __BCMSDH_SDMMC_H__ +#define __BCMSDH_SDMMC_H__ + +#define sd_err(x) +#define sd_trace(x) +#define sd_info(x) +#define sd_debug(x) +#define sd_data(x) +#define sd_ctrl(x) + +#define sd_sync_dma(sd, read, nbytes) +#define sd_init_dma(sd) +#define sd_ack_intr(sd) +#define sd_wakeup(sd); + +/* Allocate/init/free per-OS private data */ +extern int sdioh_sdmmc_osinit(sdioh_info_t *sd); +extern void sdioh_sdmmc_osfree(sdioh_info_t *sd); + +#define sd_log(x) + +#define SDIOH_ASSERT(exp) \ + do { if (!(exp)) \ + printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \ + } while (0) + +#define BLOCK_SIZE_4318 64 +#define BLOCK_SIZE_4328 512 + +/* internal return code */ +#define SUCCESS 0 +#define ERROR 1 + +/* private bus modes */ +#define SDIOH_MODE_SD4 2 +#define CLIENT_INTR 0x100 /* Get rid of this! */ + +struct sdioh_info { + osl_t *osh; /* osh handler */ + bool client_intr_enabled; /* interrupt connnected flag */ + bool intr_handler_valid; /* client driver interrupt handler valid */ + sdioh_cb_fn_t intr_handler; /* registered interrupt handler */ + void *intr_handler_arg; /* argument to call interrupt handler */ + uint16 intmask; /* Current active interrupts */ + void *sdos_info; /* Pointer to per-OS private data */ + + uint irq; /* Client irq */ + int intrcount; /* Client interrupts */ + + bool sd_use_dma; /* DMA on CMD53 */ + bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */ + /* Must be on for sd_multiblock to be effective */ + bool use_client_ints; /* If this is false, make sure to restore */ + int sd_mode; /* SD1/SD4/SPI */ + int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */ + uint8 num_funcs; /* Supported funcs on client */ + uint32 com_cis_ptr; + uint32 func_cis_ptr[SDIOD_MAX_IOFUNCS]; + uint max_dma_len; + uint max_dma_descriptors; /* DMA Descriptors supported by this controller. */ +// SDDMA_DESCRIPTOR SGList[32]; /* Scatter/Gather DMA List */ +}; + +/************************************************************ + * Internal interfaces: per-port references into bcmsdh_sdmmc.c + */ + +/* Global message bits */ +extern uint sd_msglevel; + +/* OS-independent interrupt handler */ +extern bool check_client_intr(sdioh_info_t *sd); + +/* Core interrupt enable/disable of device interrupts */ +extern void sdioh_sdmmc_devintr_on(sdioh_info_t *sd); +extern void sdioh_sdmmc_devintr_off(sdioh_info_t *sd); + + +/************************************************************** + * Internal interfaces: bcmsdh_sdmmc.c references to per-port code + */ + +/* Register mapping routines */ +extern uint32 *sdioh_sdmmc_reg_map(osl_t *osh, int32 addr, int size); +extern void sdioh_sdmmc_reg_unmap(osl_t *osh, int32 addr, int size); + +/* Interrupt (de)registration routines */ +extern int sdioh_sdmmc_register_irq(sdioh_info_t *sd, uint irq); +extern void sdioh_sdmmc_free_irq(uint irq, sdioh_info_t *sd); + +typedef struct _BCMSDH_SDMMC_INSTANCE { + sdioh_info_t *sd; + struct sdio_func *func[SDIOD_MAX_IOFUNCS]; +} BCMSDH_SDMMC_INSTANCE, *PBCMSDH_SDMMC_INSTANCE; + +#endif /* __BCMSDH_SDMMC_H__ */ diff --git a/external/cache/sources/wl/include/bcmsdpcm.h b/external/cache/sources/wl/include/bcmsdpcm.h new file mode 100644 index 0000000..b381d42 --- /dev/null +++ b/external/cache/sources/wl/include/bcmsdpcm.h @@ -0,0 +1,256 @@ +/* + * Broadcom SDIO/PCMCIA + * Software-specific definitions shared between device and host side + * + * $Copyright Open 2005 Broadcom Corporation$ + * + * $Id: bcmsdpcm.h 314495 2012-02-12 07:56:39Z $ + */ + +#ifndef _bcmsdpcm_h_ +#define _bcmsdpcm_h_ + +/* + * Software allocation of To SB Mailbox resources + */ + +/* intstatus bits */ +#define I_SMB_NAK I_SMB_SW0 /* To SB Mailbox Frame NAK */ +#define I_SMB_INT_ACK I_SMB_SW1 /* To SB Mailbox Host Interrupt ACK */ +#define I_SMB_USE_OOB I_SMB_SW2 /* To SB Mailbox Use OOB Wakeup */ +#define I_SMB_DEV_INT I_SMB_SW3 /* To SB Mailbox Miscellaneous Interrupt */ + +#define I_TOSBMAIL (I_SMB_NAK | I_SMB_INT_ACK | I_SMB_USE_OOB | I_SMB_DEV_INT) + +/* tosbmailbox bits corresponding to intstatus bits */ +#define SMB_NAK (1 << 0) /* To SB Mailbox Frame NAK */ +#define SMB_INT_ACK (1 << 1) /* To SB Mailbox Host Interrupt ACK */ +#define SMB_USE_OOB (1 << 2) /* To SB Mailbox Use OOB Wakeup */ +#define SMB_DEV_INT (1 << 3) /* To SB Mailbox Miscellaneous Interrupt */ +#define SMB_MASK 0x0000000f /* To SB Mailbox Mask */ + +/* tosbmailboxdata */ +#define SMB_DATA_VERSION_MASK 0x00ff0000 /* host protocol version (sent with F2 enable) */ +#define SMB_DATA_VERSION_SHIFT 16 /* host protocol version (sent with F2 enable) */ + +/* + * Software allocation of To Host Mailbox resources + */ + +/* intstatus bits */ +#define I_HMB_FC_STATE I_HMB_SW0 /* To Host Mailbox Flow Control State */ +#define I_HMB_FC_CHANGE I_HMB_SW1 /* To Host Mailbox Flow Control State Changed */ +#define I_HMB_FRAME_IND I_HMB_SW2 /* To Host Mailbox Frame Indication */ +#define I_HMB_HOST_INT I_HMB_SW3 /* To Host Mailbox Miscellaneous Interrupt */ + +#define I_TOHOSTMAIL (I_HMB_FC_CHANGE | I_HMB_FRAME_IND | I_HMB_HOST_INT) + +/* tohostmailbox bits corresponding to intstatus bits */ +#define HMB_FC_ON (1 << 0) /* To Host Mailbox Flow Control State */ +#define HMB_FC_CHANGE (1 << 1) /* To Host Mailbox Flow Control State Changed */ +#define HMB_FRAME_IND (1 << 2) /* To Host Mailbox Frame Indication */ +#define HMB_HOST_INT (1 << 3) /* To Host Mailbox Miscellaneous Interrupt */ +#define HMB_MASK 0x0000000f /* To Host Mailbox Mask */ + +/* tohostmailboxdata */ +#define HMB_DATA_NAKHANDLED 0x01 /* we're ready to retransmit NAK'd frame to host */ +#define HMB_DATA_DEVREADY 0x02 /* we're ready to to talk to host after enable */ +#define HMB_DATA_FC 0x04 /* per prio flowcontrol update flag to host */ +#define HMB_DATA_FWREADY 0x08 /* firmware is ready for protocol activity */ +#define HMB_DATA_FWHALT 0x10 /* firmware has halted operation */ + +#define HMB_DATA_FCDATA_MASK 0xff000000 /* per prio flowcontrol data */ +#define HMB_DATA_FCDATA_SHIFT 24 /* per prio flowcontrol data */ + +#define HMB_DATA_VERSION_MASK 0x00ff0000 /* device protocol version (with devready) */ +#define HMB_DATA_VERSION_SHIFT 16 /* device protocol version (with devready) */ + +/* + * Software-defined protocol header + */ + +/* Current protocol version */ +#define SDPCM_PROT_VERSION 4 + +/* SW frame header */ +#define SDPCM_SEQUENCE_MASK 0x000000ff /* Sequence Number Mask */ +#define SDPCM_PACKET_SEQUENCE(p) (((uint8 *)p)[0] & 0xff) /* p starts w/SW Header */ + +#define SDPCM_CHANNEL_MASK 0x00000f00 /* Channel Number Mask */ +#define SDPCM_CHANNEL_SHIFT 8 /* Channel Number Shift */ +#define SDPCM_PACKET_CHANNEL(p) (((uint8 *)p)[1] & 0x0f) /* p starts w/SW Header */ + +#define SDPCM_FLAGS_MASK 0x0000f000 /* Mask of flag bits */ +#define SDPCM_FLAGS_SHIFT 12 /* Flag bits shift */ +#define SDPCM_PACKET_FLAGS(p) ((((uint8 *)p)[1] & 0xf0) >> 4) /* p starts w/SW Header */ + +/* Next Read Len: lookahead length of next frame, in 16-byte units (rounded up) */ +#define SDPCM_NEXTLEN_MASK 0x00ff0000 /* Next Read Len Mask */ +#define SDPCM_NEXTLEN_SHIFT 16 /* Next Read Len Shift */ +#define SDPCM_NEXTLEN_VALUE(p) ((((uint8 *)p)[2] & 0xff) << 4) /* p starts w/SW Header */ +#define SDPCM_NEXTLEN_OFFSET 2 + +/* Data Offset from SOF (HW Tag, SW Tag, Pad) */ +#define SDPCM_DOFFSET_OFFSET 3 /* Data Offset */ +#define SDPCM_DOFFSET_VALUE(p) (((uint8 *)p)[SDPCM_DOFFSET_OFFSET] & 0xff) +#define SDPCM_DOFFSET_MASK 0xff000000 +#define SDPCM_DOFFSET_SHIFT 24 + +#define SDPCM_FCMASK_OFFSET 4 /* Flow control */ +#define SDPCM_FCMASK_VALUE(p) (((uint8 *)p)[SDPCM_FCMASK_OFFSET ] & 0xff) +#define SDPCM_WINDOW_OFFSET 5 /* Credit based fc */ +#define SDPCM_WINDOW_VALUE(p) (((uint8 *)p)[SDPCM_WINDOW_OFFSET] & 0xff) +#define SDPCM_VERSION_OFFSET 6 /* Version # */ +#define SDPCM_VERSION_VALUE(p) (((uint8 *)p)[SDPCM_VERSION_OFFSET] & 0xff) +#define SDPCM_UNUSED_OFFSET 7 /* Spare */ +#define SDPCM_UNUSED_VALUE(p) (((uint8 *)p)[SDPCM_UNUSED_OFFSET] & 0xff) + +#define SDPCM_SWHEADER_LEN 8 /* SW header is 64 bits */ + +/* logical channel numbers */ +#define SDPCM_CONTROL_CHANNEL 0 /* Control Request/Response Channel Id */ +#define SDPCM_EVENT_CHANNEL 1 /* Asyc Event Indication Channel Id */ +#define SDPCM_DATA_CHANNEL 2 /* Data Xmit/Recv Channel Id */ +#define SDPCM_GLOM_CHANNEL 3 /* For coalesced packets (superframes) */ +#define SDPCM_TEST_CHANNEL 15 /* Reserved for test/debug packets */ +#define SDPCM_MAX_CHANNEL 15 + +#define SDPCM_SEQUENCE_WRAP 256 /* wrap-around val for eight-bit frame seq number */ + +#define SDPCM_FLAG_RESVD0 0x01 +#define SDPCM_FLAG_RESVD1 0x02 +#define SDPCM_FLAG_GSPI_TXENAB 0x04 +#define SDPCM_FLAG_GLOMDESC 0x08 /* Superframe descriptor mask */ + +/* For GLOM_CHANNEL frames, use a flag to indicate descriptor frame */ +#define SDPCM_GLOMDESC_FLAG (SDPCM_FLAG_GLOMDESC << SDPCM_FLAGS_SHIFT) + +#define SDPCM_GLOMDESC(p) (((uint8 *)p)[1] & 0x80) + +/* For TEST_CHANNEL packets, define another 4-byte header */ +#define SDPCM_TEST_HDRLEN 4 /* Generally: Cmd(1), Ext(1), Len(2); + * Semantics of Ext byte depend on command. + * Len is current or requested frame length, not + * including test header; sent little-endian. + */ +#define SDPCM_TEST_DISCARD 0x01 /* Receiver discards. Ext is a pattern id. */ +#define SDPCM_TEST_ECHOREQ 0x02 /* Echo request. Ext is a pattern id. */ +#define SDPCM_TEST_ECHORSP 0x03 /* Echo response. Ext is a pattern id. */ +#define SDPCM_TEST_BURST 0x04 /* Receiver to send a burst. Ext is a frame count */ +#define SDPCM_TEST_SEND 0x05 /* Receiver sets send mode. Ext is boolean on/off */ + +/* Handy macro for filling in datagen packets with a pattern */ +#define SDPCM_TEST_FILL(byteno, id) ((uint8)(id + byteno)) + +/* + * Software counters (first part matches hardware counters) + */ + +typedef volatile struct { + uint32 cmd52rd; /* Cmd52RdCount, SDIO: cmd52 reads */ + uint32 cmd52wr; /* Cmd52WrCount, SDIO: cmd52 writes */ + uint32 cmd53rd; /* Cmd53RdCount, SDIO: cmd53 reads */ + uint32 cmd53wr; /* Cmd53WrCount, SDIO: cmd53 writes */ + uint32 abort; /* AbortCount, SDIO: aborts */ + uint32 datacrcerror; /* DataCrcErrorCount, SDIO: frames w/CRC error */ + uint32 rdoutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Rd Frm out of sync */ + uint32 wroutofsync; /* RdOutOfSyncCount, SDIO/PCMCIA: Wr Frm out of sync */ + uint32 writebusy; /* WriteBusyCount, SDIO: device asserted "busy" */ + uint32 readwait; /* ReadWaitCount, SDIO: no data ready for a read cmd */ + uint32 readterm; /* ReadTermCount, SDIO: read frame termination cmds */ + uint32 writeterm; /* WriteTermCount, SDIO: write frames termination cmds */ + uint32 rxdescuflo; /* receive descriptor underflows */ + uint32 rxfifooflo; /* receive fifo overflows */ + uint32 txfifouflo; /* transmit fifo underflows */ + uint32 runt; /* runt (too short) frames recv'd from bus */ + uint32 badlen; /* frame's rxh len does not match its hw tag len */ + uint32 badcksum; /* frame's hw tag chksum doesn't agree with len value */ + uint32 seqbreak; /* break in sequence # space from one rx frame to the next */ + uint32 rxfcrc; /* frame rx header indicates crc error */ + uint32 rxfwoos; /* frame rx header indicates write out of sync */ + uint32 rxfwft; /* frame rx header indicates write frame termination */ + uint32 rxfabort; /* frame rx header indicates frame aborted */ + uint32 woosint; /* write out of sync interrupt */ + uint32 roosint; /* read out of sync interrupt */ + uint32 rftermint; /* read frame terminate interrupt */ + uint32 wftermint; /* write frame terminate interrupt */ +} sdpcmd_cnt_t; + +/* + * Register Access Macros + */ + +#define SDIODREV_IS(var, val) ((var) == (val)) +#define SDIODREV_GE(var, val) ((var) >= (val)) +#define SDIODREV_GT(var, val) ((var) > (val)) +#define SDIODREV_LT(var, val) ((var) < (val)) +#define SDIODREV_LE(var, val) ((var) <= (val)) + +#define SDIODDMAREG32(h, dir, chnl) \ + ((dir) == DMA_TX ? \ + (void *)(uintptr)&((h)->regs->dma.sdiod32.dma32regs[chnl].xmt) : \ + (void *)(uintptr)&((h)->regs->dma.sdiod32.dma32regs[chnl].rcv)) + +#define SDIODDMAREG64(h, dir, chnl) \ + ((dir) == DMA_TX ? \ + (void *)(uintptr)&((h)->regs->dma.sdiod64.dma64regs[chnl].xmt) : \ + (void *)(uintptr)&((h)->regs->dma.sdiod64.dma64regs[chnl].rcv)) + +#define SDIODDMAREG(h, dir, chnl) \ + (SDIODREV_LT((h)->corerev, 1) ? \ + SDIODDMAREG32((h), (dir), (chnl)) : \ + SDIODDMAREG64((h), (dir), (chnl))) + +#define PCMDDMAREG(h, dir, chnl) \ + ((dir) == DMA_TX ? \ + (void *)(uintptr)&((h)->regs->dma.pcm32.dmaregs.xmt) : \ + (void *)(uintptr)&((h)->regs->dma.pcm32.dmaregs.rcv)) + +#define SDPCMDMAREG(h, dir, chnl, coreid) \ + ((coreid) == SDIOD_CORE_ID ? \ + SDIODDMAREG(h, dir, chnl) : \ + PCMDDMAREG(h, dir, chnl)) + +#define SDIODFIFOREG(h, corerev) \ + (SDIODREV_LT((corerev), 1) ? \ + ((dma32diag_t *)(uintptr)&((h)->regs->dma.sdiod32.dmafifo)) : \ + ((dma32diag_t *)(uintptr)&((h)->regs->dma.sdiod64.dmafifo))) + +#define PCMDFIFOREG(h) \ + ((dma32diag_t *)(uintptr)&((h)->regs->dma.pcm32.dmafifo)) + +#define SDPCMFIFOREG(h, coreid, corerev) \ + ((coreid) == SDIOD_CORE_ID ? \ + SDIODFIFOREG(h, corerev) : \ + PCMDFIFOREG(h)) + +/* + * Shared structure between dongle and the host. + * The structure contains pointers to trap or assert information. + */ +#define SDPCM_SHARED_VERSION 0x0001 +#define SDPCM_SHARED_VERSION_MASK 0x00FF +#define SDPCM_SHARED_ASSERT_BUILT 0x0100 +#define SDPCM_SHARED_ASSERT 0x0200 +#define SDPCM_SHARED_TRAP 0x0400 +#define SDPCM_SHARED_IN_BRPT 0x0800 +#define SDPCM_SHARED_SET_BRPT 0x1000 +#define SDPCM_SHARED_PENDING_BRPT 0x2000 + +typedef struct { + uint32 flags; + uint32 trap_addr; + uint32 assert_exp_addr; + uint32 assert_file_addr; + uint32 assert_line; + uint32 console_addr; /* Address of hndrte_cons_t */ + uint32 msgtrace_addr; + uint32 fwid; +} sdpcm_shared_t; + +extern sdpcm_shared_t sdpcm_shared; + +/* Function can be used to notify host of FW halt */ +extern void sdpcmd_fwhalt(void); + +#endif /* _bcmsdpcm_h_ */ diff --git a/external/cache/sources/wl/include/bcmsdspi.h b/external/cache/sources/wl/include/bcmsdspi.h new file mode 100644 index 0000000..9c082ec --- /dev/null +++ b/external/cache/sources/wl/include/bcmsdspi.h @@ -0,0 +1,117 @@ +/* + * SD-SPI Protocol Conversion - BCMSDH->SPI Translation Layer + * + * $ Copyright Open Broadcom Corporation $ + * + * $Id: bcmsdspi.h 294363 2011-11-06 23:02:20Z $ + */ +#ifndef _BCM_SD_SPI_H +#define _BCM_SD_SPI_H + +/* global msglevel for debug messages - bitvals come from sdiovar.h */ + +#define sd_err(x) +#define sd_trace(x) +#define sd_info(x) +#define sd_debug(x) +#define sd_data(x) +#define sd_ctrl(x) + +#define sd_log(x) + +#define SDIOH_ASSERT(exp) \ + do { if (!(exp)) \ + printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \ + } while (0) + +#define BLOCK_SIZE_4318 64 +#define BLOCK_SIZE_4328 512 + +/* internal return code */ +#define SUCCESS 0 +#undef ERROR +#define ERROR 1 + +/* private bus modes */ +#define SDIOH_MODE_SPI 0 + +#define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */ +#define USE_MULTIBLOCK 0x4 + +struct sdioh_info { + uint cfg_bar; /* pci cfg address for bar */ + uint32 caps; /* cached value of capabilities reg */ + uint bar0; /* BAR0 for PCI Device */ + osl_t *osh; /* osh handler */ + void *controller; /* Pointer to SPI Controller's private data struct */ + + uint lockcount; /* nest count of sdspi_lock() calls */ + bool client_intr_enabled; /* interrupt connnected flag */ + bool intr_handler_valid; /* client driver interrupt handler valid */ + sdioh_cb_fn_t intr_handler; /* registered interrupt handler */ + void *intr_handler_arg; /* argument to call interrupt handler */ + bool initialized; /* card initialized */ + uint32 target_dev; /* Target device ID */ + uint32 intmask; /* Current active interrupts */ + void *sdos_info; /* Pointer to per-OS private data */ + + uint32 controller_type; /* Host controller type */ + uint8 version; /* Host Controller Spec Compliance Version */ + uint irq; /* Client irq */ + uint32 intrcount; /* Client interrupts */ + uint32 local_intrcount; /* Controller interrupts */ + bool host_init_done; /* Controller initted */ + bool card_init_done; /* Client SDIO interface initted */ + bool polled_mode; /* polling for command completion */ + + bool sd_use_dma; /* DMA on CMD53 */ + bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */ + /* Must be on for sd_multiblock to be effective */ + bool use_client_ints; /* If this is false, make sure to restore */ + bool got_hcint; /* Host Controller interrupt. */ + /* polling hack in wl_linux.c:wl_timer() */ + int adapter_slot; /* Maybe dealing with multiple slots/controllers */ + int sd_mode; /* SD1/SD4/SPI */ + int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */ + uint32 data_xfer_count; /* Current register transfer size */ + uint32 cmd53_wr_data; /* Used to pass CMD53 write data */ + uint32 card_response; /* Used to pass back response status byte */ + uint32 card_rsp_data; /* Used to pass back response data word */ + uint16 card_rca; /* Current Address */ + uint8 num_funcs; /* Supported funcs on client */ + uint32 com_cis_ptr; + uint32 func_cis_ptr[SDIOD_MAX_IOFUNCS]; + void *dma_buf; + ulong dma_phys; + int r_cnt; /* rx count */ + int t_cnt; /* tx_count */ +}; + +/************************************************************ + * Internal interfaces: per-port references into bcmsdspi.c + */ + +/* Global message bits */ +extern uint sd_msglevel; + +/************************************************************** + * Internal interfaces: bcmsdspi.c references to per-port code + */ + +/* Register mapping routines */ +extern uint32 *spi_reg_map(osl_t *osh, uintptr addr, int size); +extern void spi_reg_unmap(osl_t *osh, uintptr addr, int size); + +/* Interrupt (de)registration routines */ +extern int spi_register_irq(sdioh_info_t *sd, uint irq); +extern void spi_free_irq(uint irq, sdioh_info_t *sd); + +/* OS-specific interrupt wrappers (atomic interrupt enable/disable) */ +extern void spi_lock(sdioh_info_t *sd); +extern void spi_unlock(sdioh_info_t *sd); + +/* Allocate/init/free per-OS private data */ +extern int spi_osinit(sdioh_info_t *sd); +extern void spi_osfree(sdioh_info_t *sd); + +#endif /* _BCM_SD_SPI_H */ diff --git a/external/cache/sources/wl/include/bcmsdstd.h b/external/cache/sources/wl/include/bcmsdstd.h new file mode 100644 index 0000000..e05342c --- /dev/null +++ b/external/cache/sources/wl/include/bcmsdstd.h @@ -0,0 +1,230 @@ +/* + * 'Standard' SDIO HOST CONTROLLER driver + * + * $ Copyright Open Broadcom Corporation $ + * + * $Id: bcmsdstd.h 324979 2012-03-30 23:47:19Z $ + */ +#ifndef _BCM_SD_STD_H +#define _BCM_SD_STD_H + +/* global msglevel for debug messages - bitvals come from sdiovar.h */ +#define sd_err(x) do { if (sd_msglevel & SDH_ERROR_VAL) printf x; } while (0) +#define sd_trace(x) +#define sd_info(x) +#define sd_debug(x) +#define sd_data(x) +#define sd_ctrl(x) +#define sd_dma(x) + +#define sd_sync_dma(sd, read, nbytes) +#define sd_init_dma(sd) +#define sd_ack_intr(sd) +#define sd_wakeup(sd); +/* Allocate/init/free per-OS private data */ +extern int sdstd_osinit(sdioh_info_t *sd); +extern void sdstd_osfree(sdioh_info_t *sd); + +#define sd_log(x) + +#define SDIOH_ASSERT(exp) \ + do { if (!(exp)) \ + printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \ + } while (0) + +#define BLOCK_SIZE_4318 64 +#define BLOCK_SIZE_4328 512 + +/* internal return code */ +#define SUCCESS 0 +#define ERROR 1 + +/* private bus modes */ +#define SDIOH_MODE_SPI 0 +#define SDIOH_MODE_SD1 1 +#define SDIOH_MODE_SD4 2 + +#define MAX_SLOTS 6 /* For PCI: Only 6 BAR entries => 6 slots */ +#define SDIOH_REG_WINSZ 0x100 /* Number of registers in Standard Host Controller */ + +#define SDIOH_TYPE_ARASAN_HDK 1 +#define SDIOH_TYPE_BCM27XX 2 +#define SDIOH_TYPE_TI_PCIXX21 4 /* TI PCIxx21 Standard Host Controller */ +#define SDIOH_TYPE_RICOH_R5C822 5 /* Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter */ +#define SDIOH_TYPE_JMICRON 6 /* JMicron Standard SDIO Host Controller */ + +/* For linux, allow yielding for dongle */ +#define BCMSDYIELD + +/* Expected card status value for CMD7 */ +#define SDIOH_CMD7_EXP_STATUS 0x00001E00 + +#define RETRIES_LARGE 100000 +#define sdstd_os_yield(sd) do {} while (0) +#define RETRIES_SMALL 100 + + +#define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */ +#define USE_MULTIBLOCK 0x4 + +#define USE_FIFO 0x8 /* Fifo vs non-fifo */ + +#define CLIENT_INTR 0x100 /* Get rid of this! */ + +#define HC_INTR_RETUNING 0x1000 + + +struct sdioh_info { + uint cfg_bar; /* pci cfg address for bar */ + uint32 caps; /* cached value of capabilities reg */ + uint32 curr_caps; /* max current capabilities reg */ + + osl_t *osh; /* osh handler */ + volatile char *mem_space; /* pci device memory va */ + uint lockcount; /* nest count of sdstd_lock() calls */ + bool client_intr_enabled; /* interrupt connnected flag */ + bool intr_handler_valid; /* client driver interrupt handler valid */ + sdioh_cb_fn_t intr_handler; /* registered interrupt handler */ + void *intr_handler_arg; /* argument to call interrupt handler */ + bool initialized; /* card initialized */ + uint target_dev; /* Target device ID */ + uint16 intmask; /* Current active interrupts */ + void *sdos_info; /* Pointer to per-OS private data */ + + uint32 controller_type; /* Host controller type */ + uint8 version; /* Host Controller Spec Compliance Version */ + uint irq; /* Client irq */ + int intrcount; /* Client interrupts */ + int local_intrcount; /* Controller interrupts */ + bool host_init_done; /* Controller initted */ + bool card_init_done; /* Client SDIO interface initted */ + bool polled_mode; /* polling for command completion */ + + bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */ + /* Must be on for sd_multiblock to be effective */ + bool use_client_ints; /* If this is false, make sure to restore */ + /* polling hack in wl_linux.c:wl_timer() */ + int adapter_slot; /* Maybe dealing with multiple slots/controllers */ + int sd_mode; /* SD1/SD4/SPI */ + int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */ + uint32 data_xfer_count; /* Current transfer */ + uint16 card_rca; /* Current Address */ + int8 sd_dma_mode; /* DMA Mode (PIO, SDMA, ... ADMA2) on CMD53 */ + uint8 num_funcs; /* Supported funcs on client */ + uint32 com_cis_ptr; + uint32 func_cis_ptr[SDIOD_MAX_FUNCS]; + void *dma_buf; /* DMA Buffer virtual address */ + ulong dma_phys; /* DMA Buffer physical address */ + void *adma2_dscr_buf; /* ADMA2 Descriptor Buffer virtual address */ + ulong adma2_dscr_phys; /* ADMA2 Descriptor Buffer physical address */ + + /* adjustments needed to make the dma align properly */ + void *dma_start_buf; + ulong dma_start_phys; + uint alloced_dma_size; + void *adma2_dscr_start_buf; + ulong adma2_dscr_start_phys; + uint alloced_adma2_dscr_size; + + int r_cnt; /* rx count */ + int t_cnt; /* tx_count */ + bool got_hcint; /* local interrupt flag */ + uint16 last_intrstatus; /* to cache intrstatus */ + int host_UHSISupported; /* whether UHSI is supported for HC. */ + int card_UHSI_voltage_Supported; /* whether UHSI is supported for + * Card in terms of Voltage [1.8 or 3.3]. + */ + int global_UHSI_Supp; /* type of UHSI support in both host and card. + * HOST_SDR_UNSUPP: capabilities not supported/matched + * HOST_SDR_12_25: SDR12 and SDR25 supported + * HOST_SDR_50_104_DDR: one of SDR50/SDR104 or DDR50 supptd + */ + volatile int sd3_dat_state; /* data transfer state used for retuning check */ + volatile int sd3_tun_state; /* tuning state used for retuning check */ + bool sd3_tuning_reqd; /* tuning requirement parameter */ + uint32 caps3; /* cached value of 32 MSbits capabilities reg (SDIO 3.0) */ +}; + +#define DMA_MODE_NONE 0 +#define DMA_MODE_SDMA 1 +#define DMA_MODE_ADMA1 2 +#define DMA_MODE_ADMA2 3 +#define DMA_MODE_ADMA2_64 4 +#define DMA_MODE_AUTO -1 + +#define USE_DMA(sd) ((bool)((sd->sd_dma_mode > 0) ? TRUE : FALSE)) + +/* States for Tuning and corr data */ +#define TUNING_IDLE 0 +#define TUNING_START 1 +#define TUNING_START_AFTER_DAT 2 +#define TUNING_ONGOING 3 + +#define DATA_TRANSFER_IDLE 0 +#define DATA_TRANSFER_ONGOING 1 + +#define CHECK_TUNING_PRE_DATA 1 +#define CHECK_TUNING_POST_DATA 2 + +/************************************************************ + * Internal interfaces: per-port references into bcmsdstd.c + */ + +/* Global message bits */ +extern uint sd_msglevel; + +/* OS-independent interrupt handler */ +extern bool check_client_intr(sdioh_info_t *sd); + +/* Core interrupt enable/disable of device interrupts */ +extern void sdstd_devintr_on(sdioh_info_t *sd); +extern void sdstd_devintr_off(sdioh_info_t *sd); + +/* Enable/disable interrupts for local controller events */ +extern void sdstd_intrs_on(sdioh_info_t *sd, uint16 norm, uint16 err); +extern void sdstd_intrs_off(sdioh_info_t *sd, uint16 norm, uint16 err); + +/* Wait for specified interrupt and error bits to be set */ +extern void sdstd_spinbits(sdioh_info_t *sd, uint16 norm, uint16 err); + + +/************************************************************** + * Internal interfaces: bcmsdstd.c references to per-port code + */ + +/* Register mapping routines */ +extern uint32 *sdstd_reg_map(osl_t *osh, int32 addr, int size); +extern void sdstd_reg_unmap(osl_t *osh, int32 addr, int size); + +/* Interrupt (de)registration routines */ +extern int sdstd_register_irq(sdioh_info_t *sd, uint irq); +extern void sdstd_free_irq(uint irq, sdioh_info_t *sd); + +/* OS-specific interrupt wrappers (atomic interrupt enable/disable) */ +extern void sdstd_lock(sdioh_info_t *sd); +extern void sdstd_unlock(sdioh_info_t *sd); +extern void sdstd_waitlockfree(sdioh_info_t *sd); + +/* OS-specific wait-for-interrupt-or-status */ +extern int sdstd_waitbits(sdioh_info_t *sd, uint16 norm, uint16 err, bool yield, uint16 *bits); + +/* used by bcmsdstd_linux [implemented in sdstd] */ +extern void sdstd_3_enable_retuning_int(sdioh_info_t *sd); +extern void sdstd_3_disable_retuning_int(sdioh_info_t *sd); +extern bool sdstd_3_is_retuning_int_set(sdioh_info_t *sd); +extern void sdstd_3_check_and_do_tuning(sdioh_info_t *sd, int tuning_param); +extern bool sdstd_3_check_and_set_retuning(sdioh_info_t *sd); +extern int sdstd_3_get_tune_state(sdioh_info_t *sd); +extern int sdstd_3_get_data_state(sdioh_info_t *sd); +extern void sdstd_3_set_tune_state(sdioh_info_t *sd, int state); +extern void sdstd_3_set_data_state(sdioh_info_t *sd, int state); +extern uint8 sdstd_3_get_tuning_exp(sdioh_info_t *sd); +extern uint32 sdstd_3_get_uhsi_clkmode(sdioh_info_t *sd); +extern int sdstd_3_clk_tuning(sdioh_info_t *sd, uint32 sd3ClkMode); + +/* used by sdstd [implemented in bcmsdstd_linux/ndis] */ +extern void sdstd_3_start_tuning(sdioh_info_t *sd); +extern void sdstd_3_osinit_tuning(sdioh_info_t *sd); +extern void sdstd_3_osclean_tuning(sdioh_info_t *sd); + +#endif /* _BCM_SD_STD_H */ diff --git a/external/cache/sources/wl/include/bcmspi.h b/external/cache/sources/wl/include/bcmspi.h new file mode 100644 index 0000000..bb0ee15 --- /dev/null +++ b/external/cache/sources/wl/include/bcmspi.h @@ -0,0 +1,22 @@ +/* + * Broadcom SPI Low-Level Hardware Driver API + * + * $ Copyright Open Broadcom Corporation $ + * + * $Id: bcmspi.h 241182 2011-02-17 21:50:03Z $ + */ +#ifndef _BCM_SPI_H +#define _BCM_SPI_H + +extern void spi_devintr_off(sdioh_info_t *sd); +extern void spi_devintr_on(sdioh_info_t *sd); +extern bool spi_start_clock(sdioh_info_t *sd, uint16 new_sd_divisor); +extern bool spi_controller_highspeed_mode(sdioh_info_t *sd, bool hsmode); +extern bool spi_check_client_intr(sdioh_info_t *sd, int *is_dev_intr); +extern bool spi_hw_attach(sdioh_info_t *sd); +extern bool spi_hw_detach(sdioh_info_t *sd); +extern void spi_sendrecv(sdioh_info_t *sd, uint8 *msg_out, uint8 *msg_in, int msglen); +extern void spi_spinbits(sdioh_info_t *sd); +extern void spi_waitbits(sdioh_info_t *sd, bool yield); + +#endif /* _BCM_SPI_H */ diff --git a/external/cache/sources/wl/include/bcmspibrcm.h b/external/cache/sources/wl/include/bcmspibrcm.h new file mode 100644 index 0000000..db173b6 --- /dev/null +++ b/external/cache/sources/wl/include/bcmspibrcm.h @@ -0,0 +1,139 @@ +/* + * SD-SPI Protocol Conversion - BCMSDH->gSPI Translation Layer + * + * Copyright (C) 2013, Broadcom Corporation + * All Rights Reserved. + * + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation; + * the contents of this file may not be disclosed to third parties, copied + * or duplicated in any form, in whole or in part, without the prior + * written permission of Broadcom Corporation. + * + * $Id: bcmspibrcm.h 241182 2011-02-17 21:50:03Z $ + */ +#ifndef _BCM_SPI_BRCM_H +#define _BCM_SPI_BRCM_H + +/* global msglevel for debug messages - bitvals come from sdiovar.h */ + +#define sd_err(x) +#define sd_trace(x) +#define sd_info(x) +#define sd_debug(x) +#define sd_data(x) +#define sd_ctrl(x) + +#define sd_log(x) + +#define SDIOH_ASSERT(exp) \ + do { if (!(exp)) \ + printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \ + } while (0) + +#define BLOCK_SIZE_F1 64 +#define BLOCK_SIZE_F2 2048 +#define BLOCK_SIZE_F3 2048 + +/* internal return code */ +#define SUCCESS 0 +#undef ERROR +#define ERROR 1 +#define ERROR_UF 2 +#define ERROR_OF 3 + +/* private bus modes */ +#define SDIOH_MODE_SPI 0 + +#define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */ +#define USE_MULTIBLOCK 0x4 + +struct sdioh_info { + uint cfg_bar; /* pci cfg address for bar */ + uint32 caps; /* cached value of capabilities reg */ + void *bar0; /* BAR0 for PCI Device */ + osl_t *osh; /* osh handler */ + void *controller; /* Pointer to SPI Controller's private data struct */ + + uint lockcount; /* nest count of spi_lock() calls */ + bool client_intr_enabled; /* interrupt connnected flag */ + bool intr_handler_valid; /* client driver interrupt handler valid */ + sdioh_cb_fn_t intr_handler; /* registered interrupt handler */ + void *intr_handler_arg; /* argument to call interrupt handler */ + bool initialized; /* card initialized */ + uint32 target_dev; /* Target device ID */ + uint32 intmask; /* Current active interrupts */ + void *sdos_info; /* Pointer to per-OS private data */ + + uint32 controller_type; /* Host controller type */ + uint8 version; /* Host Controller Spec Compliance Version */ + uint irq; /* Client irq */ + uint32 intrcount; /* Client interrupts */ + uint32 local_intrcount; /* Controller interrupts */ + bool host_init_done; /* Controller initted */ + bool card_init_done; /* Client SDIO interface initted */ + bool polled_mode; /* polling for command completion */ + + bool sd_use_dma; /* DMA on CMD53 */ + bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */ + /* Must be on for sd_multiblock to be effective */ + bool use_client_ints; /* If this is false, make sure to restore */ + /* polling hack in wl_linux.c:wl_timer() */ + int adapter_slot; /* Maybe dealing with multiple slots/controllers */ + int sd_mode; /* SD1/SD4/SPI */ + int client_block_size[SPI_MAX_IOFUNCS]; /* Blocksize */ + uint32 data_xfer_count; /* Current transfer */ + uint16 card_rca; /* Current Address */ + uint8 num_funcs; /* Supported funcs on client */ + uint32 card_dstatus; /* 32bit device status */ + uint32 com_cis_ptr; + uint32 func_cis_ptr[SPI_MAX_IOFUNCS]; + void *dma_buf; + ulong dma_phys; + int r_cnt; /* rx count */ + int t_cnt; /* tx_count */ + uint32 wordlen; /* host processor 16/32bits */ + uint32 prev_fun; + uint32 chip; + uint32 chiprev; + bool resp_delay_all; + bool dwordmode; + bool resp_delay_new; + + struct spierrstats_t spierrstats; +}; + +/************************************************************ + * Internal interfaces: per-port references into bcmspibrcm.c + */ + +/* Global message bits */ +extern uint sd_msglevel; + +/************************************************************** + * Internal interfaces: bcmspibrcm.c references to per-port code + */ + +/* Interrupt (de)registration routines */ +extern int spi_register_irq(sdioh_info_t *sd, uint irq); +extern void spi_free_irq(uint irq, sdioh_info_t *sd); + +/* OS-specific interrupt wrappers (atomic interrupt enable/disable) */ +extern void spi_lock(sdioh_info_t *sd); +extern void spi_unlock(sdioh_info_t *sd); + +/* Allocate/init/free per-OS private data */ +extern int spi_osinit(sdioh_info_t *sd); +extern void spi_osfree(sdioh_info_t *sd); + +#define SPI_RW_FLAG_M BITFIELD_MASK(1) /* Bit [31] - R/W Command Bit */ +#define SPI_RW_FLAG_S 31 +#define SPI_ACCESS_M BITFIELD_MASK(1) /* Bit [30] - Fixed/Incr Access */ +#define SPI_ACCESS_S 30 +#define SPI_FUNCTION_M BITFIELD_MASK(2) /* Bit [29:28] - Function Number */ +#define SPI_FUNCTION_S 28 +#define SPI_REG_ADDR_M BITFIELD_MASK(17) /* Bit [27:11] - Address */ +#define SPI_REG_ADDR_S 11 +#define SPI_LEN_M BITFIELD_MASK(11) /* Bit [10:0] - Packet length */ +#define SPI_LEN_S 0 + +#endif /* _BCM_SPI_BRCM_H */ diff --git a/external/cache/sources/wl/include/bcmsrom.h b/external/cache/sources/wl/include/bcmsrom.h new file mode 100644 index 0000000..ebb8c20 --- /dev/null +++ b/external/cache/sources/wl/include/bcmsrom.h @@ -0,0 +1,36 @@ +/* + * Misc useful routines to access NIC local SROM/OTP . + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmsrom.h 241182 2011-02-17 21:50:03Z gmo $ + */ + +#ifndef _bcmsrom_h_ +#define _bcmsrom_h_ + +#include + +/* Prototypes */ +extern int srom_var_init(si_t *sih, uint bus, void *curmap, osl_t *osh, + char **vars, uint *count); +extern void srom_var_deinit(si_t *sih); + +extern int srom_read(si_t *sih, uint bus, void *curmap, osl_t *osh, + uint byteoff, uint nbytes, uint16 *buf, + bool check_crc); + +extern int srom_write(si_t *sih, uint bus, void *curmap, osl_t *osh, + uint byteoff, uint nbytes, uint16 *buf); + +extern int srom_otp_cisrwvar(si_t *sih, osl_t *osh, char *vars, int *count); +extern int srom_otp_write_region_crc(si_t *sih, uint nbytes, uint16* buf16, bool write); + +/* parse standard PCMCIA cis, normally used by SB/PCMCIA/SDIO/SPI/OTP + * and extract from it into name=value pairs + */ +extern int srom_parsecis(osl_t *osh, uint8 **pcis, uint ciscnt, + char **vars, uint *count); + + +#endif /* _bcmsrom_h_ */ diff --git a/external/cache/sources/wl/include/bcmsrom_fmt.h b/external/cache/sources/wl/include/bcmsrom_fmt.h new file mode 100644 index 0000000..04093f3 --- /dev/null +++ b/external/cache/sources/wl/include/bcmsrom_fmt.h @@ -0,0 +1,617 @@ +/* + * SROM format definition. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmsrom_fmt.h 401759 2013-05-13 16:08:08Z sudhirbs $ + */ + +#ifndef _bcmsrom_fmt_h_ +#define _bcmsrom_fmt_h_ + +#define SROM_MAXREV 11 /* max revisiton supported by driver */ + +/* Maximum srom: 6 Kilobits == 768 bytes */ +#define SROM_MAX 768 +#define SROM_MAXW 384 +#define VARS_MAX 4096 + +/* PCI fields */ +#define PCI_F0DEVID 48 + +/* SROM Rev 2: 1 Kilobit map for 11a/b/g devices. + * SROM Rev 3: Upward compatible modification for lpphy and PCIe + * hardware workaround. + */ + +#define SROM_WORDS 64 + +#define SROM3_SWRGN_OFF 28 /* s/w region offset in words */ + +#define SROM_SSID 2 +#define SROM_SVID 3 + +#define SROM_WL1LHMAXP 29 + +#define SROM_WL1LPAB0 30 +#define SROM_WL1LPAB1 31 +#define SROM_WL1LPAB2 32 + +#define SROM_WL1HPAB0 33 +#define SROM_WL1HPAB1 34 +#define SROM_WL1HPAB2 35 + +#define SROM_MACHI_IL0 36 +#define SROM_MACMID_IL0 37 +#define SROM_MACLO_IL0 38 +#define SROM_MACHI_ET0 39 +#define SROM_MACMID_ET0 40 +#define SROM_MACLO_ET0 41 +#define SROM_MACHI_ET1 42 +#define SROM_MACMID_ET1 43 +#define SROM_MACLO_ET1 44 +#define SROM3_MACHI 37 +#define SROM3_MACMID 38 +#define SROM3_MACLO 39 + +#define SROM_BXARSSI2G 40 +#define SROM_BXARSSI5G 41 + +#define SROM_TRI52G 42 +#define SROM_TRI5GHL 43 + +#define SROM_RXPO52G 45 + +#define SROM2_ENETPHY 45 + +#define SROM_AABREV 46 +/* Fields in AABREV */ +#define SROM_BR_MASK 0x00ff +#define SROM_CC_MASK 0x0f00 +#define SROM_CC_SHIFT 8 +#define SROM_AA0_MASK 0x3000 +#define SROM_AA0_SHIFT 12 +#define SROM_AA1_MASK 0xc000 +#define SROM_AA1_SHIFT 14 + +#define SROM_WL0PAB0 47 +#define SROM_WL0PAB1 48 +#define SROM_WL0PAB2 49 + +#define SROM_LEDBH10 50 +#define SROM_LEDBH32 51 + +#define SROM_WL10MAXP 52 + +#define SROM_WL1PAB0 53 +#define SROM_WL1PAB1 54 +#define SROM_WL1PAB2 55 + +#define SROM_ITT 56 + +#define SROM_BFL 57 +#define SROM_BFL2 28 +#define SROM3_BFL2 61 + +#define SROM_AG10 58 + +#define SROM_CCODE 59 + +#define SROM_OPO 60 + +#define SROM3_LEDDC 62 + +#define SROM_CRCREV 63 + +/* SROM Rev 4: Reallocate the software part of the srom to accomodate + * MIMO features. It assumes up to two PCIE functions and 440 bytes + * of useable srom i.e. the useable storage in chips with OTP that + * implements hardware redundancy. + */ + +#define SROM4_WORDS 220 + +#define SROM4_SIGN 32 +#define SROM4_SIGNATURE 0x5372 + +#define SROM4_BREV 33 + +#define SROM4_BFL0 34 +#define SROM4_BFL1 35 +#define SROM4_BFL2 36 +#define SROM4_BFL3 37 +#define SROM5_BFL0 37 +#define SROM5_BFL1 38 +#define SROM5_BFL2 39 +#define SROM5_BFL3 40 + +#define SROM4_MACHI 38 +#define SROM4_MACMID 39 +#define SROM4_MACLO 40 +#define SROM5_MACHI 41 +#define SROM5_MACMID 42 +#define SROM5_MACLO 43 + +#define SROM4_CCODE 41 +#define SROM4_REGREV 42 +#define SROM5_CCODE 34 +#define SROM5_REGREV 35 + +#define SROM4_LEDBH10 43 +#define SROM4_LEDBH32 44 +#define SROM5_LEDBH10 59 +#define SROM5_LEDBH32 60 + +#define SROM4_LEDDC 45 +#define SROM5_LEDDC 45 + +#define SROM4_AA 46 +#define SROM4_AA2G_MASK 0x00ff +#define SROM4_AA2G_SHIFT 0 +#define SROM4_AA5G_MASK 0xff00 +#define SROM4_AA5G_SHIFT 8 + +#define SROM4_AG10 47 +#define SROM4_AG32 48 + +#define SROM4_TXPID2G 49 +#define SROM4_TXPID5G 51 +#define SROM4_TXPID5GL 53 +#define SROM4_TXPID5GH 55 + +#define SROM4_TXRXC 61 +#define SROM4_TXCHAIN_MASK 0x000f +#define SROM4_TXCHAIN_SHIFT 0 +#define SROM4_RXCHAIN_MASK 0x00f0 +#define SROM4_RXCHAIN_SHIFT 4 +#define SROM4_SWITCH_MASK 0xff00 +#define SROM4_SWITCH_SHIFT 8 + + +/* Per-path fields */ +#define MAX_PATH_SROM 4 +#define SROM4_PATH0 64 +#define SROM4_PATH1 87 +#define SROM4_PATH2 110 +#define SROM4_PATH3 133 + +#define SROM4_2G_ITT_MAXP 0 +#define SROM4_2G_PA 1 +#define SROM4_5G_ITT_MAXP 5 +#define SROM4_5GLH_MAXP 6 +#define SROM4_5G_PA 7 +#define SROM4_5GL_PA 11 +#define SROM4_5GH_PA 15 + +/* Fields in the ITT_MAXP and 5GLH_MAXP words */ +#define B2G_MAXP_MASK 0xff +#define B2G_ITT_SHIFT 8 +#define B5G_MAXP_MASK 0xff +#define B5G_ITT_SHIFT 8 +#define B5GH_MAXP_MASK 0xff +#define B5GL_MAXP_SHIFT 8 + +/* All the miriad power offsets */ +#define SROM4_2G_CCKPO 156 +#define SROM4_2G_OFDMPO 157 +#define SROM4_5G_OFDMPO 159 +#define SROM4_5GL_OFDMPO 161 +#define SROM4_5GH_OFDMPO 163 +#define SROM4_2G_MCSPO 165 +#define SROM4_5G_MCSPO 173 +#define SROM4_5GL_MCSPO 181 +#define SROM4_5GH_MCSPO 189 +#define SROM4_CDDPO 197 +#define SROM4_STBCPO 198 +#define SROM4_BW40PO 199 +#define SROM4_BWDUPPO 200 + +#define SROM4_CRCREV 219 + + +/* SROM Rev 8: Make space for a 48word hardware header for PCIe rev >= 6. + * This is acombined srom for both MIMO and SISO boards, usable in + * the .130 4Kilobit OTP with hardware redundancy. + */ + +#define SROM8_SIGN 64 + +#define SROM8_BREV 65 + +#define SROM8_BFL0 66 +#define SROM8_BFL1 67 +#define SROM8_BFL2 68 +#define SROM8_BFL3 69 + +#define SROM8_MACHI 70 +#define SROM8_MACMID 71 +#define SROM8_MACLO 72 + +#define SROM8_CCODE 73 +#define SROM8_REGREV 74 + +#define SROM8_LEDBH10 75 +#define SROM8_LEDBH32 76 + +#define SROM8_LEDDC 77 + +#define SROM8_AA 78 + +#define SROM8_AG10 79 +#define SROM8_AG32 80 + +#define SROM8_TXRXC 81 + +#define SROM8_BXARSSI2G 82 +#define SROM8_BXARSSI5G 83 +#define SROM8_TRI52G 84 +#define SROM8_TRI5GHL 85 +#define SROM8_RXPO52G 86 + +#define SROM8_FEM2G 87 +#define SROM8_FEM5G 88 +#define SROM8_FEM_ANTSWLUT_MASK 0xf800 +#define SROM8_FEM_ANTSWLUT_SHIFT 11 +#define SROM8_FEM_TR_ISO_MASK 0x0700 +#define SROM8_FEM_TR_ISO_SHIFT 8 +#define SROM8_FEM_PDET_RANGE_MASK 0x00f8 +#define SROM8_FEM_PDET_RANGE_SHIFT 3 +#define SROM8_FEM_EXTPA_GAIN_MASK 0x0006 +#define SROM8_FEM_EXTPA_GAIN_SHIFT 1 +#define SROM8_FEM_TSSIPOS_MASK 0x0001 +#define SROM8_FEM_TSSIPOS_SHIFT 0 + +#define SROM8_THERMAL 89 + +/* Temp sense related entries */ +#define SROM8_MPWR_RAWTS 90 +#define SROM8_TS_SLP_OPT_CORRX 91 +/* FOC: freiquency offset correction, HWIQ: H/W IOCAL enable, IQSWP: IQ CAL swap disable */ +#define SROM8_FOC_HWIQ_IQSWP 92 + +#define SROM8_EXTLNAGAIN 93 + +/* Temperature delta for PHY calibration */ +#define SROM8_PHYCAL_TEMPDELTA 94 + +/* Measured power 1 & 2, 0-13 bits at offset 95, MSB 2 bits are unused for now. */ +#define SROM8_MPWR_1_AND_2 95 + + +/* Per-path offsets & fields */ +#define SROM8_PATH0 96 +#define SROM8_PATH1 112 +#define SROM8_PATH2 128 +#define SROM8_PATH3 144 + +#define SROM8_2G_ITT_MAXP 0 +#define SROM8_2G_PA 1 +#define SROM8_5G_ITT_MAXP 4 +#define SROM8_5GLH_MAXP 5 +#define SROM8_5G_PA 6 +#define SROM8_5GL_PA 9 +#define SROM8_5GH_PA 12 + +/* All the miriad power offsets */ +#define SROM8_2G_CCKPO 160 + +#define SROM8_2G_OFDMPO 161 +#define SROM8_5G_OFDMPO 163 +#define SROM8_5GL_OFDMPO 165 +#define SROM8_5GH_OFDMPO 167 + +#define SROM8_2G_MCSPO 169 +#define SROM8_5G_MCSPO 177 +#define SROM8_5GL_MCSPO 185 +#define SROM8_5GH_MCSPO 193 + +#define SROM8_CDDPO 201 +#define SROM8_STBCPO 202 +#define SROM8_BW40PO 203 +#define SROM8_BWDUPPO 204 + +/* SISO PA parameters are in the path0 spaces */ +#define SROM8_SISO 96 + +/* Legacy names for SISO PA paramters */ +#define SROM8_W0_ITTMAXP (SROM8_SISO + SROM8_2G_ITT_MAXP) +#define SROM8_W0_PAB0 (SROM8_SISO + SROM8_2G_PA) +#define SROM8_W0_PAB1 (SROM8_SISO + SROM8_2G_PA + 1) +#define SROM8_W0_PAB2 (SROM8_SISO + SROM8_2G_PA + 2) +#define SROM8_W1_ITTMAXP (SROM8_SISO + SROM8_5G_ITT_MAXP) +#define SROM8_W1_MAXP_LCHC (SROM8_SISO + SROM8_5GLH_MAXP) +#define SROM8_W1_PAB0 (SROM8_SISO + SROM8_5G_PA) +#define SROM8_W1_PAB1 (SROM8_SISO + SROM8_5G_PA + 1) +#define SROM8_W1_PAB2 (SROM8_SISO + SROM8_5G_PA + 2) +#define SROM8_W1_PAB0_LC (SROM8_SISO + SROM8_5GL_PA) +#define SROM8_W1_PAB1_LC (SROM8_SISO + SROM8_5GL_PA + 1) +#define SROM8_W1_PAB2_LC (SROM8_SISO + SROM8_5GL_PA + 2) +#define SROM8_W1_PAB0_HC (SROM8_SISO + SROM8_5GH_PA) +#define SROM8_W1_PAB1_HC (SROM8_SISO + SROM8_5GH_PA + 1) +#define SROM8_W1_PAB2_HC (SROM8_SISO + SROM8_5GH_PA + 2) + +#define SROM8_CRCREV 219 + +/* SROM REV 9 */ +#define SROM9_2GPO_CCKBW20 160 +#define SROM9_2GPO_CCKBW20UL 161 +#define SROM9_2GPO_LOFDMBW20 162 +#define SROM9_2GPO_LOFDMBW20UL 164 + +#define SROM9_5GLPO_LOFDMBW20 166 +#define SROM9_5GLPO_LOFDMBW20UL 168 +#define SROM9_5GMPO_LOFDMBW20 170 +#define SROM9_5GMPO_LOFDMBW20UL 172 +#define SROM9_5GHPO_LOFDMBW20 174 +#define SROM9_5GHPO_LOFDMBW20UL 176 + +#define SROM9_2GPO_MCSBW20 178 +#define SROM9_2GPO_MCSBW20UL 180 +#define SROM9_2GPO_MCSBW40 182 + +#define SROM9_5GLPO_MCSBW20 184 +#define SROM9_5GLPO_MCSBW20UL 186 +#define SROM9_5GLPO_MCSBW40 188 +#define SROM9_5GMPO_MCSBW20 190 +#define SROM9_5GMPO_MCSBW20UL 192 +#define SROM9_5GMPO_MCSBW40 194 +#define SROM9_5GHPO_MCSBW20 196 +#define SROM9_5GHPO_MCSBW20UL 198 +#define SROM9_5GHPO_MCSBW40 200 + +#define SROM9_PO_MCS32 202 +#define SROM9_PO_LOFDM40DUP 203 +#define SROM8_RXGAINERR_2G 205 +#define SROM8_RXGAINERR_5GL 206 +#define SROM8_RXGAINERR_5GM 207 +#define SROM8_RXGAINERR_5GH 208 +#define SROM8_RXGAINERR_5GU 209 +#define SROM8_SUBBAND_PPR 210 +#define SROM8_PCIEINGRESS_WAR 211 +#define SROM9_SAR 212 + +#define SROM8_NOISELVL_2G 213 +#define SROM8_NOISELVL_5GL 214 +#define SROM8_NOISELVL_5GM 215 +#define SROM8_NOISELVL_5GH 216 +#define SROM8_NOISELVL_5GU 217 + +#define SROM9_REV_CRC 219 + +#define SROM10_CCKPWROFFSET 218 +#define SROM10_SIGN 219 +#define SROM10_SWCTRLMAP_2G 220 +#define SROM10_CRCREV 229 + +#define SROM10_WORDS 230 +#define SROM10_SIGNATURE SROM4_SIGNATURE + + +/* SROM REV 11 */ +#define SROM11_BREV 65 + +#define SROM11_BFL0 66 +#define SROM11_BFL1 67 +#define SROM11_BFL2 68 +#define SROM11_BFL3 69 +#define SROM11_BFL4 70 +#define SROM11_BFL5 71 + +#define SROM11_MACHI 72 +#define SROM11_MACMID 73 +#define SROM11_MACLO 74 + +#define SROM11_CCODE 75 +#define SROM11_REGREV 76 + +#define SROM11_LEDBH10 77 +#define SROM11_LEDBH32 78 + +#define SROM11_LEDDC 79 + +#define SROM11_AA 80 + +#define SROM11_AGBG10 81 +#define SROM11_AGBG2A0 82 +#define SROM11_AGA21 83 + +#define SROM11_TXRXC 84 + +#define SROM11_FEM_CFG1 85 +#define SROM11_FEM_CFG2 86 + +/* Masks and offsets for FEM_CFG */ +#define SROM11_FEMCTRL_MASK 0xf800 +#define SROM11_FEMCTRL_SHIFT 11 +#define SROM11_PAPDCAP_MASK 0x0400 +#define SROM11_PAPDCAP_SHIFT 10 +#define SROM11_TWORANGETSSI_MASK 0x0200 +#define SROM11_TWORANGETSSI_SHIFT 9 +#define SROM11_PDGAIN_MASK 0x01f0 +#define SROM11_PDGAIN_SHIFT 4 +#define SROM11_EPAGAIN_MASK 0x000e +#define SROM11_EPAGAIN_SHIFT 1 +#define SROM11_TSSIPOSSLOPE_MASK 0x0001 +#define SROM11_TSSIPOSSLOPE_SHIFT 0 +#define SROM11_GAINCTRLSPH_MASK 0xf800 +#define SROM11_GAINCTRLSPH_SHIFT 11 + +#define SROM11_THERMAL 87 +#define SROM11_MPWR_RAWTS 88 +#define SROM11_TS_SLP_OPT_CORRX 89 +#define SROM11_XTAL_FREQ 90 +#define SROM11_5GB0_4080_W0_A1 91 +#define SROM11_PHYCAL_TEMPDELTA 92 +#define SROM11_MPWR_1_AND_2 93 +#define SROM11_5GB0_4080_W1_A1 94 +#define SROM11_TSSIFLOOR_2G 95 +#define SROM11_TSSIFLOOR_5GL 96 +#define SROM11_TSSIFLOOR_5GM 97 +#define SROM11_TSSIFLOOR_5GH 98 +#define SROM11_TSSIFLOOR_5GU 99 + +/* Masks and offsets for Terrmal parameters */ +#define SROM11_TEMPS_PERIOD_MASK 0xf0 +#define SROM11_TEMPS_PERIOD_SHIFT 4 +#define SROM11_TEMPS_HYSTERESIS_MASK 0x0f +#define SROM11_TEMPS_HYSTERESIS_SHIFT 0 +#define SROM11_TEMPCORRX_MASK 0xfc +#define SROM11_TEMPCORRX_SHIFT 2 +#define SROM11_TEMPSENSE_OPTION_MASK 0x3 +#define SROM11_TEMPSENSE_OPTION_SHIFT 0 + +#define SROM11_PDOFF_2G_40M_A0_MASK 0x000f +#define SROM11_PDOFF_2G_40M_A0_SHIFT 0 +#define SROM11_PDOFF_2G_40M_A1_MASK 0x00f0 +#define SROM11_PDOFF_2G_40M_A1_SHIFT 4 +#define SROM11_PDOFF_2G_40M_A2_MASK 0x0f00 +#define SROM11_PDOFF_2G_40M_A2_SHIFT 8 +#define SROM11_PDOFF_2G_40M_VALID_MASK 0x8000 +#define SROM11_PDOFF_2G_40M_VALID_SHIFT 15 + +#define SROM11_PDOFF_2G_40M 100 +#define SROM11_PDOFF_40M_A0 101 +#define SROM11_PDOFF_40M_A1 102 +#define SROM11_PDOFF_40M_A2 103 +#define SROM11_5GB0_4080_W2_A1 103 +#define SROM11_PDOFF_80M_A0 104 +#define SROM11_PDOFF_80M_A1 105 +#define SROM11_PDOFF_80M_A2 106 +#define SROM11_5GB1_4080_W0_A1 106 + +#define SROM11_SUBBAND5GVER 107 + +/* Per-path fields and offset */ +#define MAX_PATH_SROM_11 3 +#define SROM11_PATH0 108 +#define SROM11_PATH1 128 +#define SROM11_PATH2 148 + +#define SROM11_2G_MAXP 0 +#define SROM11_5GB1_4080_PA 0 +#define SROM11_2G_PA 1 +#define SROM11_5GB2_4080_PA 2 +#define SROM11_RXGAINS1 4 +#define SROM11_RXGAINS 5 +#define SROM11_5GB3_4080_PA 5 +#define SROM11_5GB1B0_MAXP 6 +#define SROM11_5GB3B2_MAXP 7 +#define SROM11_5GB0_PA 8 +#define SROM11_5GB1_PA 11 +#define SROM11_5GB2_PA 14 +#define SROM11_5GB3_PA 17 + +/* Masks and offsets for rxgains */ +#define SROM11_RXGAINS5GTRELNABYPA_MASK 0x8000 +#define SROM11_RXGAINS5GTRELNABYPA_SHIFT 15 +#define SROM11_RXGAINS5GTRISOA_MASK 0x7800 +#define SROM11_RXGAINS5GTRISOA_SHIFT 11 +#define SROM11_RXGAINS5GELNAGAINA_MASK 0x0700 +#define SROM11_RXGAINS5GELNAGAINA_SHIFT 8 +#define SROM11_RXGAINS2GTRELNABYPA_MASK 0x0080 +#define SROM11_RXGAINS2GTRELNABYPA_SHIFT 7 +#define SROM11_RXGAINS2GTRISOA_MASK 0x0078 +#define SROM11_RXGAINS2GTRISOA_SHIFT 3 +#define SROM11_RXGAINS2GELNAGAINA_MASK 0x0007 +#define SROM11_RXGAINS2GELNAGAINA_SHIFT 0 +#define SROM11_RXGAINS5GHTRELNABYPA_MASK 0x8000 +#define SROM11_RXGAINS5GHTRELNABYPA_SHIFT 15 +#define SROM11_RXGAINS5GHTRISOA_MASK 0x7800 +#define SROM11_RXGAINS5GHTRISOA_SHIFT 11 +#define SROM11_RXGAINS5GHELNAGAINA_MASK 0x0700 +#define SROM11_RXGAINS5GHELNAGAINA_SHIFT 8 +#define SROM11_RXGAINS5GMTRELNABYPA_MASK 0x0080 +#define SROM11_RXGAINS5GMTRELNABYPA_SHIFT 7 +#define SROM11_RXGAINS5GMTRISOA_MASK 0x0078 +#define SROM11_RXGAINS5GMTRISOA_SHIFT 3 +#define SROM11_RXGAINS5GMELNAGAINA_MASK 0x0007 +#define SROM11_RXGAINS5GMELNAGAINA_SHIFT 0 + +/* Power per rate */ +#define SROM11_CCKBW202GPO 168 +#define SROM11_CCKBW20UL2GPO 169 +#define SROM11_MCSBW202GPO 170 +#define SROM11_MCSBW202GPO_1 171 +#define SROM11_MCSBW402GPO 172 +#define SROM11_MCSBW402GPO_1 173 +#define SROM11_DOT11AGOFDMHRBW202GPO 174 +#define SROM11_OFDMLRBW202GPO 175 + +#define SROM11_MCSBW205GLPO 176 +#define SROM11_MCSBW205GLPO_1 177 +#define SROM11_MCSBW405GLPO 178 +#define SROM11_MCSBW405GLPO_1 179 +#define SROM11_MCSBW805GLPO 180 +#define SROM11_MCSBW805GLPO_1 181 +#define SROM11_RPCAL_2G 182 +#define SROM11_RPCAL_5GL 183 +#define SROM11_MCSBW205GMPO 184 +#define SROM11_MCSBW205GMPO_1 185 +#define SROM11_MCSBW405GMPO 186 +#define SROM11_MCSBW405GMPO_1 187 +#define SROM11_MCSBW805GMPO 188 +#define SROM11_MCSBW805GMPO_1 189 +#define SROM11_RPCAL_5GM 190 +#define SROM11_RPCAL_5GH 191 +#define SROM11_MCSBW205GHPO 192 +#define SROM11_MCSBW205GHPO_1 193 +#define SROM11_MCSBW405GHPO 194 +#define SROM11_MCSBW405GHPO_1 195 +#define SROM11_MCSBW805GHPO 196 +#define SROM11_MCSBW805GHPO_1 197 +#define SROM11_RPCAL_5GU 198 +#define SROM11_MCSLR5GLPO 200 +#define SROM11_MCSLR5GMPO 201 +#define SROM11_MCSLR5GHPO 202 + +#define SROM11_SB20IN40HRPO 203 +#define SROM11_SB20IN80AND160HR5GLPO 204 +#define SROM11_SB40AND80HR5GLPO 205 +#define SROM11_SB20IN80AND160HR5GMPO 206 +#define SROM11_SB40AND80HR5GMPO 207 +#define SROM11_SB20IN80AND160HR5GHPO 208 +#define SROM11_SB40AND80HR5GHPO 209 +#define SROM11_SB20IN40LRPO 210 +#define SROM11_SB20IN80AND160LR5GLPO 211 +#define SROM11_SB40AND80LR5GLPO 212 +#define SROM11_TXIDXCAP2G 212 +#define SROM11_SB20IN80AND160LR5GMPO 213 +#define SROM11_SB40AND80LR5GMPO 214 +#define SROM11_TXIDXCAP5G 214 +#define SROM11_SB20IN80AND160LR5GHPO 215 +#define SROM11_SB40AND80LR5GHPO 216 + +#define SROM11_DOT11AGDUPHRPO 217 +#define SROM11_DOT11AGDUPLRPO 218 + +/* MISC */ +#define SROM11_PCIEINGRESS_WAR 220 +#define SROM11_SAR 221 + +#define SROM11_NOISELVL_2G 222 +#define SROM11_NOISELVL_5GL 223 +#define SROM11_NOISELVL_5GM 224 +#define SROM11_NOISELVL_5GH 225 +#define SROM11_NOISELVL_5GU 226 + +#define SROM11_RXGAINERR_2G 227 +#define SROM11_RXGAINERR_5GL 228 +#define SROM11_RXGAINERR_5GM 229 +#define SROM11_RXGAINERR_5GH 230 +#define SROM11_RXGAINERR_5GU 231 + +#define SROM11_SIGN 64 +#define SROM11_CRCREV 233 + +#define SROM11_WORDS 234 +#define SROM11_SIGNATURE 0x0634 + +typedef struct { + uint8 tssipos; /* TSSI positive slope, 1: positive, 0: negative */ + uint8 extpagain; /* Ext PA gain-type: full-gain: 0, pa-lite: 1, no_pa: 2 */ + uint8 pdetrange; /* support 32 combinations of different Pdet dynamic ranges */ + uint8 triso; /* TR switch isolation */ + uint8 antswctrllut; /* antswctrl lookup table configuration: 32 possible choices */ +} srom_fem_t; + +#endif /* _bcmsrom_fmt_h_ */ diff --git a/external/cache/sources/wl/include/bcmsrom_tbl.h b/external/cache/sources/wl/include/bcmsrom_tbl.h new file mode 100644 index 0000000..4c88cef --- /dev/null +++ b/external/cache/sources/wl/include/bcmsrom_tbl.h @@ -0,0 +1,1033 @@ +/* + * Table that encodes the srom formats for PCI/PCIe NICs. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmsrom_tbl.h 409843 2013-06-27 02:01:25Z richarch $ + */ + +#ifndef _bcmsrom_tbl_h_ +#define _bcmsrom_tbl_h_ + +#include "sbpcmcia.h" +#include "wlioctl.h" + +typedef struct { + const char *name; + uint32 revmask; + uint32 flags; + uint16 off; + uint16 mask; +} sromvar_t; + +#define SRFL_MORE 1 /* value continues as described by the next entry */ +#define SRFL_NOFFS 2 /* value bits can't be all one's */ +#define SRFL_PRHEX 4 /* value is in hexdecimal format */ +#define SRFL_PRSIGN 8 /* value is in signed decimal format */ +#define SRFL_CCODE 0x10 /* value is in country code format */ +#define SRFL_ETHADDR 0x20 /* value is an Ethernet address */ +#define SRFL_LEDDC 0x40 /* value is an LED duty cycle */ +#define SRFL_NOVAR 0x80 /* do not generate a nvram param, entry is for mfgc */ +#define SRFL_ARRAY 0x100 /* value is in an array. All elements EXCEPT FOR THE LAST + * ONE in the array should have this flag set. + */ + +#if defined(DSLCPE) && defined(DSLCPE_WOMBO) +#define SRFL_PCI 0x10000000 /* value is an PCI specific */ +#define SRFL_PCIE 0x20000000 /* value is an PCIE specific */ + +#define SROM_DEVID_PCI 4 +#define SROM_DEVID_PCIE 48 +#endif /* defined(DSLCPE) && defined(DSLCPE_WOMBO) */ + +/* Assumptions: + * - Ethernet address spans across 3 consective words + * + * Table rules: + * - Add multiple entries next to each other if a value spans across multiple words + * (even multiple fields in the same word) with each entry except the last having + * it's SRFL_MORE bit set. + * - Ethernet address entry does not follow above rule and must not have SRFL_MORE + * bit set. Its SRFL_ETHADDR bit implies it takes multiple words. + * - The last entry's name field must be NULL to indicate the end of the table. Other + * entries must have non-NULL name. + */ + +static const sromvar_t pci_sromvars[] = { +#if defined(DSLCPE) && defined(DSLCPE_WOMBO) + {"devid", 0xfffffffe, SRFL_PRHEX|SRFL_PCI, SROM_DEVID_PCI, 0xffff}, + {"devid", 0xffffff00, SRFL_PRHEX|SRFL_PCIE, SROM_DEVID_PCIE, 0xffff}, +#elif defined(CABLECPE) + {"devid", 0xffffff00, SRFL_PRHEX, PCI_F0DEVID, 0xffff}, +#else + {"devid", 0xffffff00, SRFL_PRHEX|SRFL_NOVAR, PCI_F0DEVID, 0xffff}, +#endif /* defined(DSLCPE) && defined(DSLCPE_WOMBO) */ + {"boardrev", 0x0000000e, SRFL_PRHEX, SROM_AABREV, SROM_BR_MASK}, + {"boardrev", 0x000000f0, SRFL_PRHEX, SROM4_BREV, 0xffff}, + {"boardrev", 0xffffff00, SRFL_PRHEX, SROM8_BREV, 0xffff}, + {"boardflags", 0x00000002, SRFL_PRHEX, SROM_BFL, 0xffff}, + {"boardflags", 0x00000004, SRFL_PRHEX|SRFL_MORE, SROM_BFL, 0xffff}, + {"", 0, 0, SROM_BFL2, 0xffff}, + {"boardflags", 0x00000008, SRFL_PRHEX|SRFL_MORE, SROM_BFL, 0xffff}, + {"", 0, 0, SROM3_BFL2, 0xffff}, + {"boardflags", 0x00000010, SRFL_PRHEX|SRFL_MORE, SROM4_BFL0, 0xffff}, + {"", 0, 0, SROM4_BFL1, 0xffff}, + {"boardflags", 0x000000e0, SRFL_PRHEX|SRFL_MORE, SROM5_BFL0, 0xffff}, + {"", 0, 0, SROM5_BFL1, 0xffff}, + {"boardflags", 0xffffff00, SRFL_PRHEX|SRFL_MORE, SROM8_BFL0, 0xffff}, + {"", 0, 0, SROM8_BFL1, 0xffff}, + {"boardflags2", 0x00000010, SRFL_PRHEX|SRFL_MORE, SROM4_BFL2, 0xffff}, + {"", 0, 0, SROM4_BFL3, 0xffff}, + {"boardflags2", 0x000000e0, SRFL_PRHEX|SRFL_MORE, SROM5_BFL2, 0xffff}, + {"", 0, 0, SROM5_BFL3, 0xffff}, + {"boardflags2", 0xffffff00, SRFL_PRHEX|SRFL_MORE, SROM8_BFL2, 0xffff}, + {"", 0, 0, SROM8_BFL3, 0xffff}, + {"boardtype", 0xfffffffc, SRFL_PRHEX, SROM_SSID, 0xffff}, + {"subvid", 0xfffffffc, SRFL_PRHEX, SROM_SVID, 0xffff}, + {"boardnum", 0x00000006, 0, SROM_MACLO_IL0, 0xffff}, + {"boardnum", 0x00000008, 0, SROM3_MACLO, 0xffff}, + {"boardnum", 0x00000010, 0, SROM4_MACLO, 0xffff}, + {"boardnum", 0x000000e0, 0, SROM5_MACLO, 0xffff}, + {"boardnum", 0x00000700, 0, SROM8_MACLO, 0xffff}, + {"cc", 0x00000002, 0, SROM_AABREV, SROM_CC_MASK}, + {"regrev", 0x00000008, 0, SROM_OPO, 0xff00}, + {"regrev", 0x00000010, 0, SROM4_REGREV, 0x00ff}, + {"regrev", 0x000000e0, 0, SROM5_REGREV, 0x00ff}, + {"regrev", 0x00000700, 0, SROM8_REGREV, 0x00ff}, + {"ledbh0", 0x0000000e, SRFL_NOFFS, SROM_LEDBH10, 0x00ff}, + {"ledbh1", 0x0000000e, SRFL_NOFFS, SROM_LEDBH10, 0xff00}, + {"ledbh2", 0x0000000e, SRFL_NOFFS, SROM_LEDBH32, 0x00ff}, + {"ledbh3", 0x0000000e, SRFL_NOFFS, SROM_LEDBH32, 0xff00}, + {"ledbh0", 0x00000010, SRFL_NOFFS, SROM4_LEDBH10, 0x00ff}, + {"ledbh1", 0x00000010, SRFL_NOFFS, SROM4_LEDBH10, 0xff00}, + {"ledbh2", 0x00000010, SRFL_NOFFS, SROM4_LEDBH32, 0x00ff}, + {"ledbh3", 0x00000010, SRFL_NOFFS, SROM4_LEDBH32, 0xff00}, + {"ledbh0", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH10, 0x00ff}, + {"ledbh1", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH10, 0xff00}, + {"ledbh2", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH32, 0x00ff}, + {"ledbh3", 0x000000e0, SRFL_NOFFS, SROM5_LEDBH32, 0xff00}, + {"ledbh0", 0x00000700, SRFL_NOFFS, SROM8_LEDBH10, 0x00ff}, + {"ledbh1", 0x00000700, SRFL_NOFFS, SROM8_LEDBH10, 0xff00}, + {"ledbh2", 0x00000700, SRFL_NOFFS, SROM8_LEDBH32, 0x00ff}, + {"ledbh3", 0x00000700, SRFL_NOFFS, SROM8_LEDBH32, 0xff00}, + {"pa0b0", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB0, 0xffff}, + {"pa0b1", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB1, 0xffff}, + {"pa0b2", 0x0000000e, SRFL_PRHEX, SROM_WL0PAB2, 0xffff}, + {"pa0itssit", 0x0000000e, 0, SROM_ITT, 0x00ff}, + {"pa0maxpwr", 0x0000000e, 0, SROM_WL10MAXP, 0x00ff}, + {"pa0b0", 0x00000700, SRFL_PRHEX, SROM8_W0_PAB0, 0xffff}, + {"pa0b1", 0x00000700, SRFL_PRHEX, SROM8_W0_PAB1, 0xffff}, + {"pa0b2", 0x00000700, SRFL_PRHEX, SROM8_W0_PAB2, 0xffff}, + {"pa0itssit", 0x00000700, 0, SROM8_W0_ITTMAXP, 0xff00}, + {"pa0maxpwr", 0x00000700, 0, SROM8_W0_ITTMAXP, 0x00ff}, + {"opo", 0x0000000c, 0, SROM_OPO, 0x00ff}, + {"opo", 0x00000700, 0, SROM8_2G_OFDMPO, 0x00ff}, + {"aa2g", 0x0000000e, 0, SROM_AABREV, SROM_AA0_MASK}, + {"aa2g", 0x000000f0, 0, SROM4_AA, 0x00ff}, + {"aa2g", 0x00000700, 0, SROM8_AA, 0x00ff}, + {"aa5g", 0x0000000e, 0, SROM_AABREV, SROM_AA1_MASK}, + {"aa5g", 0x000000f0, 0, SROM4_AA, 0xff00}, + {"aa5g", 0x00000700, 0, SROM8_AA, 0xff00}, + {"ag0", 0x0000000e, 0, SROM_AG10, 0x00ff}, + {"ag1", 0x0000000e, 0, SROM_AG10, 0xff00}, + {"ag0", 0x000000f0, 0, SROM4_AG10, 0x00ff}, + {"ag1", 0x000000f0, 0, SROM4_AG10, 0xff00}, + {"ag2", 0x000000f0, 0, SROM4_AG32, 0x00ff}, + {"ag3", 0x000000f0, 0, SROM4_AG32, 0xff00}, + {"ag0", 0x00000700, 0, SROM8_AG10, 0x00ff}, + {"ag1", 0x00000700, 0, SROM8_AG10, 0xff00}, + {"ag2", 0x00000700, 0, SROM8_AG32, 0x00ff}, + {"ag3", 0x00000700, 0, SROM8_AG32, 0xff00}, + {"pa1b0", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB0, 0xffff}, + {"pa1b1", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB1, 0xffff}, + {"pa1b2", 0x0000000e, SRFL_PRHEX, SROM_WL1PAB2, 0xffff}, + {"pa1lob0", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB0, 0xffff}, + {"pa1lob1", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB1, 0xffff}, + {"pa1lob2", 0x0000000c, SRFL_PRHEX, SROM_WL1LPAB2, 0xffff}, + {"pa1hib0", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB0, 0xffff}, + {"pa1hib1", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB1, 0xffff}, + {"pa1hib2", 0x0000000c, SRFL_PRHEX, SROM_WL1HPAB2, 0xffff}, + {"pa1itssit", 0x0000000e, 0, SROM_ITT, 0xff00}, + {"pa1maxpwr", 0x0000000e, 0, SROM_WL10MAXP, 0xff00}, + {"pa1lomaxpwr", 0x0000000c, 0, SROM_WL1LHMAXP, 0xff00}, + {"pa1himaxpwr", 0x0000000c, 0, SROM_WL1LHMAXP, 0x00ff}, + {"pa1b0", 0x00000700, SRFL_PRHEX, SROM8_W1_PAB0, 0xffff}, + {"pa1b1", 0x00000700, SRFL_PRHEX, SROM8_W1_PAB1, 0xffff}, + {"pa1b2", 0x00000700, SRFL_PRHEX, SROM8_W1_PAB2, 0xffff}, + {"pa1lob0", 0x00000700, SRFL_PRHEX, SROM8_W1_PAB0_LC, 0xffff}, + {"pa1lob1", 0x00000700, SRFL_PRHEX, SROM8_W1_PAB1_LC, 0xffff}, + {"pa1lob2", 0x00000700, SRFL_PRHEX, SROM8_W1_PAB2_LC, 0xffff}, + {"pa1hib0", 0x00000700, SRFL_PRHEX, SROM8_W1_PAB0_HC, 0xffff}, + {"pa1hib1", 0x00000700, SRFL_PRHEX, SROM8_W1_PAB1_HC, 0xffff}, + {"pa1hib2", 0x00000700, SRFL_PRHEX, SROM8_W1_PAB2_HC, 0xffff}, + {"pa1itssit", 0x00000700, 0, SROM8_W1_ITTMAXP, 0xff00}, + {"pa1maxpwr", 0x00000700, 0, SROM8_W1_ITTMAXP, 0x00ff}, + {"pa1lomaxpwr", 0x00000700, 0, SROM8_W1_MAXP_LCHC, 0xff00}, + {"pa1himaxpwr", 0x00000700, 0, SROM8_W1_MAXP_LCHC, 0x00ff}, + {"bxa2g", 0x00000008, 0, SROM_BXARSSI2G, 0x1800}, + {"rssisav2g", 0x00000008, 0, SROM_BXARSSI2G, 0x0700}, + {"rssismc2g", 0x00000008, 0, SROM_BXARSSI2G, 0x00f0}, + {"rssismf2g", 0x00000008, 0, SROM_BXARSSI2G, 0x000f}, + {"bxa2g", 0x00000700, 0, SROM8_BXARSSI2G, 0x1800}, + {"rssisav2g", 0x00000700, 0, SROM8_BXARSSI2G, 0x0700}, + {"rssismc2g", 0x00000700, 0, SROM8_BXARSSI2G, 0x00f0}, + {"rssismf2g", 0x00000700, 0, SROM8_BXARSSI2G, 0x000f}, + {"bxa5g", 0x00000008, 0, SROM_BXARSSI5G, 0x1800}, + {"rssisav5g", 0x00000008, 0, SROM_BXARSSI5G, 0x0700}, + {"rssismc5g", 0x00000008, 0, SROM_BXARSSI5G, 0x00f0}, + {"rssismf5g", 0x00000008, 0, SROM_BXARSSI5G, 0x000f}, + {"bxa5g", 0x00000700, 0, SROM8_BXARSSI5G, 0x1800}, + {"rssisav5g", 0x00000700, 0, SROM8_BXARSSI5G, 0x0700}, + {"rssismc5g", 0x00000700, 0, SROM8_BXARSSI5G, 0x00f0}, + {"rssismf5g", 0x00000700, 0, SROM8_BXARSSI5G, 0x000f}, + {"tri2g", 0x00000008, 0, SROM_TRI52G, 0x00ff}, + {"tri5g", 0x00000008, 0, SROM_TRI52G, 0xff00}, + {"tri5gl", 0x00000008, 0, SROM_TRI5GHL, 0x00ff}, + {"tri5gh", 0x00000008, 0, SROM_TRI5GHL, 0xff00}, + {"tri2g", 0x00000700, 0, SROM8_TRI52G, 0x00ff}, + {"tri5g", 0x00000700, 0, SROM8_TRI52G, 0xff00}, + {"tri5gl", 0x00000700, 0, SROM8_TRI5GHL, 0x00ff}, + {"tri5gh", 0x00000700, 0, SROM8_TRI5GHL, 0xff00}, + {"rxpo2g", 0x00000008, SRFL_PRSIGN, SROM_RXPO52G, 0x00ff}, + {"rxpo5g", 0x00000008, SRFL_PRSIGN, SROM_RXPO52G, 0xff00}, + {"rxpo2g", 0x00000700, SRFL_PRSIGN, SROM8_RXPO52G, 0x00ff}, + {"rxpo5g", 0x00000700, SRFL_PRSIGN, SROM8_RXPO52G, 0xff00}, + {"txchain", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_TXCHAIN_MASK}, + {"rxchain", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_RXCHAIN_MASK}, + {"antswitch", 0x000000f0, SRFL_NOFFS, SROM4_TXRXC, SROM4_SWITCH_MASK}, + {"txchain", 0x00000700, SRFL_NOFFS, SROM8_TXRXC, SROM4_TXCHAIN_MASK}, + {"rxchain", 0x00000700, SRFL_NOFFS, SROM8_TXRXC, SROM4_RXCHAIN_MASK}, + {"antswitch", 0x00000700, SRFL_NOFFS, SROM8_TXRXC, SROM4_SWITCH_MASK}, + {"tssipos2g", 0x00000700, 0, SROM8_FEM2G, SROM8_FEM_TSSIPOS_MASK}, + {"extpagain2g", 0x00000700, 0, SROM8_FEM2G, SROM8_FEM_EXTPA_GAIN_MASK}, + {"pdetrange2g", 0x00000700, 0, SROM8_FEM2G, SROM8_FEM_PDET_RANGE_MASK}, + {"triso2g", 0x00000700, 0, SROM8_FEM2G, SROM8_FEM_TR_ISO_MASK}, + {"antswctl2g", 0x00000700, 0, SROM8_FEM2G, SROM8_FEM_ANTSWLUT_MASK}, + {"tssipos5g", 0x00000700, 0, SROM8_FEM5G, SROM8_FEM_TSSIPOS_MASK}, + {"extpagain5g", 0x00000700, 0, SROM8_FEM5G, SROM8_FEM_EXTPA_GAIN_MASK}, + {"pdetrange5g", 0x00000700, 0, SROM8_FEM5G, SROM8_FEM_PDET_RANGE_MASK}, + {"triso5g", 0x00000700, 0, SROM8_FEM5G, SROM8_FEM_TR_ISO_MASK}, + {"antswctl5g", 0x00000700, 0, SROM8_FEM5G, SROM8_FEM_ANTSWLUT_MASK}, + {"txpid2ga0", 0x000000f0, 0, SROM4_TXPID2G, 0x00ff}, + {"txpid2ga1", 0x000000f0, 0, SROM4_TXPID2G, 0xff00}, + {"txpid2ga2", 0x000000f0, 0, SROM4_TXPID2G + 1, 0x00ff}, + {"txpid2ga3", 0x000000f0, 0, SROM4_TXPID2G + 1, 0xff00}, + {"txpid5ga0", 0x000000f0, 0, SROM4_TXPID5G, 0x00ff}, + {"txpid5ga1", 0x000000f0, 0, SROM4_TXPID5G, 0xff00}, + {"txpid5ga2", 0x000000f0, 0, SROM4_TXPID5G + 1, 0x00ff}, + {"txpid5ga3", 0x000000f0, 0, SROM4_TXPID5G + 1, 0xff00}, + {"txpid5gla0", 0x000000f0, 0, SROM4_TXPID5GL, 0x00ff}, + {"txpid5gla1", 0x000000f0, 0, SROM4_TXPID5GL, 0xff00}, + {"txpid5gla2", 0x000000f0, 0, SROM4_TXPID5GL + 1, 0x00ff}, + {"txpid5gla3", 0x000000f0, 0, SROM4_TXPID5GL + 1, 0xff00}, + {"txpid5gha0", 0x000000f0, 0, SROM4_TXPID5GH, 0x00ff}, + {"txpid5gha1", 0x000000f0, 0, SROM4_TXPID5GH, 0xff00}, + {"txpid5gha2", 0x000000f0, 0, SROM4_TXPID5GH + 1, 0x00ff}, + {"txpid5gha3", 0x000000f0, 0, SROM4_TXPID5GH + 1, 0xff00}, + + {"ccode", 0x0000000f, SRFL_CCODE, SROM_CCODE, 0xffff}, + {"ccode", 0x00000010, SRFL_CCODE, SROM4_CCODE, 0xffff}, + {"ccode", 0x000000e0, SRFL_CCODE, SROM5_CCODE, 0xffff}, + {"ccode", 0x00000700, SRFL_CCODE, SROM8_CCODE, 0xffff}, + {"macaddr", 0x00000700, SRFL_ETHADDR, SROM8_MACHI, 0xffff}, + {"macaddr", 0x000000e0, SRFL_ETHADDR, SROM5_MACHI, 0xffff}, + {"macaddr", 0x00000010, SRFL_ETHADDR, SROM4_MACHI, 0xffff}, + {"macaddr", 0x00000008, SRFL_ETHADDR, SROM3_MACHI, 0xffff}, + {"il0macaddr", 0x00000007, SRFL_ETHADDR, SROM_MACHI_IL0, 0xffff}, + {"et1macaddr", 0x00000007, SRFL_ETHADDR, SROM_MACHI_ET1, 0xffff}, + {"leddc", 0x00000700, SRFL_NOFFS|SRFL_LEDDC, SROM8_LEDDC, 0xffff}, + {"leddc", 0x000000e0, SRFL_NOFFS|SRFL_LEDDC, SROM5_LEDDC, 0xffff}, + {"leddc", 0x00000010, SRFL_NOFFS|SRFL_LEDDC, SROM4_LEDDC, 0xffff}, + {"leddc", 0x00000008, SRFL_NOFFS|SRFL_LEDDC, SROM3_LEDDC, 0xffff}, + + {"tempthresh", 0x00000700, 0, SROM8_THERMAL, 0xff00}, + {"tempoffset", 0x00000700, 0, SROM8_THERMAL, 0x00ff}, + {"rawtempsense", 0x00000700, SRFL_PRHEX, SROM8_MPWR_RAWTS, 0x01ff}, + {"measpower", 0x00000700, SRFL_PRHEX, SROM8_MPWR_RAWTS, 0xfe00}, + {"tempsense_slope", 0x00000700, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, 0x00ff}, + {"tempcorrx", 0x00000700, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, 0xfc00}, + {"tempsense_option", 0x00000700, SRFL_PRHEX, SROM8_TS_SLP_OPT_CORRX, 0x0300}, + {"freqoffset_corr", 0x00000700, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 0x000f}, + {"iqcal_swp_dis", 0x00000700, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 0x0010}, + {"hw_iqcal_en", 0x00000700, SRFL_PRHEX, SROM8_FOC_HWIQ_IQSWP, 0x0020}, + {"elna2g", 0x00000700, 0, SROM8_EXTLNAGAIN, 0x00ff}, + {"elna5g", 0x00000700, 0, SROM8_EXTLNAGAIN, 0xff00}, + {"phycal_tempdelta", 0x00000700, 0, SROM8_PHYCAL_TEMPDELTA, 0x00ff}, + {"temps_period", 0x00000700, 0, SROM8_PHYCAL_TEMPDELTA, 0x0f00}, + {"temps_hysteresis", 0x00000700, 0, SROM8_PHYCAL_TEMPDELTA, 0xf000}, + {"measpower1", 0x00000700, SRFL_PRHEX, SROM8_MPWR_1_AND_2, 0x007f}, + {"measpower2", 0x00000700, SRFL_PRHEX, SROM8_MPWR_1_AND_2, 0x3f80}, + + {"cck2gpo", 0x000000f0, 0, SROM4_2G_CCKPO, 0xffff}, + {"cck2gpo", 0x00000100, 0, SROM8_2G_CCKPO, 0xffff}, + {"ofdm2gpo", 0x000000f0, SRFL_MORE, SROM4_2G_OFDMPO, 0xffff}, + {"", 0, 0, SROM4_2G_OFDMPO + 1, 0xffff}, + {"ofdm5gpo", 0x000000f0, SRFL_MORE, SROM4_5G_OFDMPO, 0xffff}, + {"", 0, 0, SROM4_5G_OFDMPO + 1, 0xffff}, + {"ofdm5glpo", 0x000000f0, SRFL_MORE, SROM4_5GL_OFDMPO, 0xffff}, + {"", 0, 0, SROM4_5GL_OFDMPO + 1, 0xffff}, + {"ofdm5ghpo", 0x000000f0, SRFL_MORE, SROM4_5GH_OFDMPO, 0xffff}, + {"", 0, 0, SROM4_5GH_OFDMPO + 1, 0xffff}, + {"ofdm2gpo", 0x00000100, SRFL_MORE, SROM8_2G_OFDMPO, 0xffff}, + {"", 0, 0, SROM8_2G_OFDMPO + 1, 0xffff}, + {"ofdm5gpo", 0x00000100, SRFL_MORE, SROM8_5G_OFDMPO, 0xffff}, + {"", 0, 0, SROM8_5G_OFDMPO + 1, 0xffff}, + {"ofdm5glpo", 0x00000100, SRFL_MORE, SROM8_5GL_OFDMPO, 0xffff}, + {"", 0, 0, SROM8_5GL_OFDMPO + 1, 0xffff}, + {"ofdm5ghpo", 0x00000100, SRFL_MORE, SROM8_5GH_OFDMPO, 0xffff}, + {"", 0, 0, SROM8_5GH_OFDMPO + 1, 0xffff}, + {"mcs2gpo0", 0x000000f0, 0, SROM4_2G_MCSPO, 0xffff}, + {"mcs2gpo1", 0x000000f0, 0, SROM4_2G_MCSPO + 1, 0xffff}, + {"mcs2gpo2", 0x000000f0, 0, SROM4_2G_MCSPO + 2, 0xffff}, + {"mcs2gpo3", 0x000000f0, 0, SROM4_2G_MCSPO + 3, 0xffff}, + {"mcs2gpo4", 0x000000f0, 0, SROM4_2G_MCSPO + 4, 0xffff}, + {"mcs2gpo5", 0x000000f0, 0, SROM4_2G_MCSPO + 5, 0xffff}, + {"mcs2gpo6", 0x000000f0, 0, SROM4_2G_MCSPO + 6, 0xffff}, + {"mcs2gpo7", 0x000000f0, 0, SROM4_2G_MCSPO + 7, 0xffff}, + {"mcs5gpo0", 0x000000f0, 0, SROM4_5G_MCSPO, 0xffff}, + {"mcs5gpo1", 0x000000f0, 0, SROM4_5G_MCSPO + 1, 0xffff}, + {"mcs5gpo2", 0x000000f0, 0, SROM4_5G_MCSPO + 2, 0xffff}, + {"mcs5gpo3", 0x000000f0, 0, SROM4_5G_MCSPO + 3, 0xffff}, + {"mcs5gpo4", 0x000000f0, 0, SROM4_5G_MCSPO + 4, 0xffff}, + {"mcs5gpo5", 0x000000f0, 0, SROM4_5G_MCSPO + 5, 0xffff}, + {"mcs5gpo6", 0x000000f0, 0, SROM4_5G_MCSPO + 6, 0xffff}, + {"mcs5gpo7", 0x000000f0, 0, SROM4_5G_MCSPO + 7, 0xffff}, + {"mcs5glpo0", 0x000000f0, 0, SROM4_5GL_MCSPO, 0xffff}, + {"mcs5glpo1", 0x000000f0, 0, SROM4_5GL_MCSPO + 1, 0xffff}, + {"mcs5glpo2", 0x000000f0, 0, SROM4_5GL_MCSPO + 2, 0xffff}, + {"mcs5glpo3", 0x000000f0, 0, SROM4_5GL_MCSPO + 3, 0xffff}, + {"mcs5glpo4", 0x000000f0, 0, SROM4_5GL_MCSPO + 4, 0xffff}, + {"mcs5glpo5", 0x000000f0, 0, SROM4_5GL_MCSPO + 5, 0xffff}, + {"mcs5glpo6", 0x000000f0, 0, SROM4_5GL_MCSPO + 6, 0xffff}, + {"mcs5glpo7", 0x000000f0, 0, SROM4_5GL_MCSPO + 7, 0xffff}, + {"mcs5ghpo0", 0x000000f0, 0, SROM4_5GH_MCSPO, 0xffff}, + {"mcs5ghpo1", 0x000000f0, 0, SROM4_5GH_MCSPO + 1, 0xffff}, + {"mcs5ghpo2", 0x000000f0, 0, SROM4_5GH_MCSPO + 2, 0xffff}, + {"mcs5ghpo3", 0x000000f0, 0, SROM4_5GH_MCSPO + 3, 0xffff}, + {"mcs5ghpo4", 0x000000f0, 0, SROM4_5GH_MCSPO + 4, 0xffff}, + {"mcs5ghpo5", 0x000000f0, 0, SROM4_5GH_MCSPO + 5, 0xffff}, + {"mcs5ghpo6", 0x000000f0, 0, SROM4_5GH_MCSPO + 6, 0xffff}, + {"mcs5ghpo7", 0x000000f0, 0, SROM4_5GH_MCSPO + 7, 0xffff}, + {"mcs2gpo0", 0x00000100, 0, SROM8_2G_MCSPO, 0xffff}, + {"mcs2gpo1", 0x00000100, 0, SROM8_2G_MCSPO + 1, 0xffff}, + {"mcs2gpo2", 0x00000100, 0, SROM8_2G_MCSPO + 2, 0xffff}, + {"mcs2gpo3", 0x00000100, 0, SROM8_2G_MCSPO + 3, 0xffff}, + {"mcs2gpo4", 0x00000100, 0, SROM8_2G_MCSPO + 4, 0xffff}, + {"mcs2gpo5", 0x00000100, 0, SROM8_2G_MCSPO + 5, 0xffff}, + {"mcs2gpo6", 0x00000100, 0, SROM8_2G_MCSPO + 6, 0xffff}, + {"mcs2gpo7", 0x00000100, 0, SROM8_2G_MCSPO + 7, 0xffff}, + {"mcs5gpo0", 0x00000100, 0, SROM8_5G_MCSPO, 0xffff}, + {"mcs5gpo1", 0x00000100, 0, SROM8_5G_MCSPO + 1, 0xffff}, + {"mcs5gpo2", 0x00000100, 0, SROM8_5G_MCSPO + 2, 0xffff}, + {"mcs5gpo3", 0x00000100, 0, SROM8_5G_MCSPO + 3, 0xffff}, + {"mcs5gpo4", 0x00000100, 0, SROM8_5G_MCSPO + 4, 0xffff}, + {"mcs5gpo5", 0x00000100, 0, SROM8_5G_MCSPO + 5, 0xffff}, + {"mcs5gpo6", 0x00000100, 0, SROM8_5G_MCSPO + 6, 0xffff}, + {"mcs5gpo7", 0x00000100, 0, SROM8_5G_MCSPO + 7, 0xffff}, + {"mcs5glpo0", 0x00000100, 0, SROM8_5GL_MCSPO, 0xffff}, + {"mcs5glpo1", 0x00000100, 0, SROM8_5GL_MCSPO + 1, 0xffff}, + {"mcs5glpo2", 0x00000100, 0, SROM8_5GL_MCSPO + 2, 0xffff}, + {"mcs5glpo3", 0x00000100, 0, SROM8_5GL_MCSPO + 3, 0xffff}, + {"mcs5glpo4", 0x00000100, 0, SROM8_5GL_MCSPO + 4, 0xffff}, + {"mcs5glpo5", 0x00000100, 0, SROM8_5GL_MCSPO + 5, 0xffff}, + {"mcs5glpo6", 0x00000100, 0, SROM8_5GL_MCSPO + 6, 0xffff}, + {"mcs5glpo7", 0x00000100, 0, SROM8_5GL_MCSPO + 7, 0xffff}, + {"mcs5ghpo0", 0x00000100, 0, SROM8_5GH_MCSPO, 0xffff}, + {"mcs5ghpo1", 0x00000100, 0, SROM8_5GH_MCSPO + 1, 0xffff}, + {"mcs5ghpo2", 0x00000100, 0, SROM8_5GH_MCSPO + 2, 0xffff}, + {"mcs5ghpo3", 0x00000100, 0, SROM8_5GH_MCSPO + 3, 0xffff}, + {"mcs5ghpo4", 0x00000100, 0, SROM8_5GH_MCSPO + 4, 0xffff}, + {"mcs5ghpo5", 0x00000100, 0, SROM8_5GH_MCSPO + 5, 0xffff}, + {"mcs5ghpo6", 0x00000100, 0, SROM8_5GH_MCSPO + 6, 0xffff}, + {"mcs5ghpo7", 0x00000100, 0, SROM8_5GH_MCSPO + 7, 0xffff}, + {"cddpo", 0x000000f0, 0, SROM4_CDDPO, 0xffff}, + {"stbcpo", 0x000000f0, 0, SROM4_STBCPO, 0xffff}, + {"bw40po", 0x000000f0, 0, SROM4_BW40PO, 0xffff}, + {"bwduppo", 0x000000f0, 0, SROM4_BWDUPPO, 0xffff}, + {"cddpo", 0x00000100, 0, SROM8_CDDPO, 0xffff}, + {"stbcpo", 0x00000100, 0, SROM8_STBCPO, 0xffff}, + {"bw40po", 0x00000100, 0, SROM8_BW40PO, 0xffff}, + {"bwduppo", 0x00000100, 0, SROM8_BWDUPPO, 0xffff}, + + /* power per rate from sromrev 9 */ + {"cckbw202gpo", 0x00000600, 0, SROM9_2GPO_CCKBW20, 0xffff}, + {"cckbw20ul2gpo", 0x00000600, 0, SROM9_2GPO_CCKBW20UL, 0xffff}, + {"legofdmbw202gpo", 0x00000600, SRFL_MORE, SROM9_2GPO_LOFDMBW20, 0xffff}, + {"", 0, 0, SROM9_2GPO_LOFDMBW20 + 1, 0xffff}, + {"legofdmbw20ul2gpo", 0x00000600, SRFL_MORE, SROM9_2GPO_LOFDMBW20UL, 0xffff}, + {"", 0, 0, SROM9_2GPO_LOFDMBW20UL + 1, 0xffff}, + {"legofdmbw205glpo", 0x00000600, SRFL_MORE, SROM9_5GLPO_LOFDMBW20, 0xffff}, + {"", 0, 0, SROM9_5GLPO_LOFDMBW20 + 1, 0xffff}, + {"legofdmbw20ul5glpo", 0x00000600, SRFL_MORE, SROM9_5GLPO_LOFDMBW20UL, 0xffff}, + {"", 0, 0, SROM9_5GLPO_LOFDMBW20UL + 1, 0xffff}, + {"legofdmbw205gmpo", 0x00000600, SRFL_MORE, SROM9_5GMPO_LOFDMBW20, 0xffff}, + {"", 0, 0, SROM9_5GMPO_LOFDMBW20 + 1, 0xffff}, + {"legofdmbw20ul5gmpo", 0x00000600, SRFL_MORE, SROM9_5GMPO_LOFDMBW20UL, 0xffff}, + {"", 0, 0, SROM9_5GMPO_LOFDMBW20UL + 1, 0xffff}, + {"legofdmbw205ghpo", 0x00000600, SRFL_MORE, SROM9_5GHPO_LOFDMBW20, 0xffff}, + {"", 0, 0, SROM9_5GHPO_LOFDMBW20 + 1, 0xffff}, + {"legofdmbw20ul5ghpo", 0x00000600, SRFL_MORE, SROM9_5GHPO_LOFDMBW20UL, 0xffff}, + {"", 0, 0, SROM9_5GHPO_LOFDMBW20UL + 1, 0xffff}, + {"mcsbw202gpo", 0x00000600, SRFL_MORE, SROM9_2GPO_MCSBW20, 0xffff}, + {"", 0, 0, SROM9_2GPO_MCSBW20 + 1, 0xffff}, + {"mcsbw20ul2gpo", 0x00000600, SRFL_MORE, SROM9_2GPO_MCSBW20UL, 0xffff}, + {"", 0, 0, SROM9_2GPO_MCSBW20UL + 1, 0xffff}, + {"mcsbw402gpo", 0x00000600, SRFL_MORE, SROM9_2GPO_MCSBW40, 0xffff}, + {"", 0, 0, SROM9_2GPO_MCSBW40 + 1, 0xffff}, + {"mcsbw205glpo", 0x00000600, SRFL_MORE, SROM9_5GLPO_MCSBW20, 0xffff}, + {"", 0, 0, SROM9_5GLPO_MCSBW20 + 1, 0xffff}, + {"mcsbw20ul5glpo", 0x00000600, SRFL_MORE, SROM9_5GLPO_MCSBW20UL, 0xffff}, + {"", 0, 0, SROM9_5GLPO_MCSBW20UL + 1, 0xffff}, + {"mcsbw405glpo", 0x00000600, SRFL_MORE, SROM9_5GLPO_MCSBW40, 0xffff}, + {"", 0, 0, SROM9_5GLPO_MCSBW40 + 1, 0xffff}, + {"mcsbw205gmpo", 0x00000600, SRFL_MORE, SROM9_5GMPO_MCSBW20, 0xffff}, + {"", 0, 0, SROM9_5GMPO_MCSBW20 + 1, 0xffff}, + {"mcsbw20ul5gmpo", 0x00000600, SRFL_MORE, SROM9_5GMPO_MCSBW20UL, 0xffff}, + {"", 0, 0, SROM9_5GMPO_MCSBW20UL + 1, 0xffff}, + {"mcsbw405gmpo", 0x00000600, SRFL_MORE, SROM9_5GMPO_MCSBW40, 0xffff}, + {"", 0, 0, SROM9_5GMPO_MCSBW40 + 1, 0xffff}, + {"mcsbw205ghpo", 0x00000600, SRFL_MORE, SROM9_5GHPO_MCSBW20, 0xffff}, + {"", 0, 0, SROM9_5GHPO_MCSBW20 + 1, 0xffff}, + {"mcsbw20ul5ghpo", 0x00000600, SRFL_MORE, SROM9_5GHPO_MCSBW20UL, 0xffff}, + {"", 0, 0, SROM9_5GHPO_MCSBW20UL + 1, 0xffff}, + {"mcsbw405ghpo", 0x00000600, SRFL_MORE, SROM9_5GHPO_MCSBW40, 0xffff}, + {"", 0, 0, SROM9_5GHPO_MCSBW40 + 1, 0xffff}, + {"mcs32po", 0x00000600, 0, SROM9_PO_MCS32, 0xffff}, + {"legofdm40duppo", 0x00000600, 0, SROM9_PO_LOFDM40DUP, 0xffff}, + {"pcieingress_war", 0x00000700, 0, SROM8_PCIEINGRESS_WAR, 0xf}, + {"rxgainerr2ga0", 0x00000700, 0, SROM8_RXGAINERR_2G, 0x003f}, + {"rxgainerr2ga1", 0x00000700, 0, SROM8_RXGAINERR_2G, 0x07c0}, + {"rxgainerr2ga2", 0x00000700, 0, SROM8_RXGAINERR_2G, 0xf800}, + {"rxgainerr5gla0", 0x00000700, 0, SROM8_RXGAINERR_5GL, 0x003f}, + {"rxgainerr5gla1", 0x00000700, 0, SROM8_RXGAINERR_5GL, 0x07c0}, + {"rxgainerr5gla2", 0x00000700, 0, SROM8_RXGAINERR_5GL, 0xf800}, + {"rxgainerr5gma0", 0x00000700, 0, SROM8_RXGAINERR_5GM, 0x003f}, + {"rxgainerr5gma1", 0x00000700, 0, SROM8_RXGAINERR_5GM, 0x07c0}, + {"rxgainerr5gma2", 0x00000700, 0, SROM8_RXGAINERR_5GM, 0xf800}, + {"rxgainerr5gha0", 0x00000700, 0, SROM8_RXGAINERR_5GH, 0x003f}, + {"rxgainerr5gha1", 0x00000700, 0, SROM8_RXGAINERR_5GH, 0x07c0}, + {"rxgainerr5gha2", 0x00000700, 0, SROM8_RXGAINERR_5GH, 0xf800}, + {"rxgainerr5gua0", 0x00000700, 0, SROM8_RXGAINERR_5GU, 0x003f}, + {"rxgainerr5gua1", 0x00000700, 0, SROM8_RXGAINERR_5GU, 0x07c0}, + {"rxgainerr5gua2", 0x00000700, 0, SROM8_RXGAINERR_5GU, 0xf800}, + {"sar2g", 0x00000600, 0, SROM9_SAR, 0x00ff}, + {"sar5g", 0x00000600, 0, SROM9_SAR, 0xff00}, + {"noiselvl2ga0", 0x00000700, 0, SROM8_NOISELVL_2G, 0x001f}, + {"noiselvl2ga1", 0x00000700, 0, SROM8_NOISELVL_2G, 0x03e0}, + {"noiselvl2ga2", 0x00000700, 0, SROM8_NOISELVL_2G, 0x7c00}, + {"noiselvl5gla0", 0x00000700, 0, SROM8_NOISELVL_5GL, 0x001f}, + {"noiselvl5gla1", 0x00000700, 0, SROM8_NOISELVL_5GL, 0x03e0}, + {"noiselvl5gla2", 0x00000700, 0, SROM8_NOISELVL_5GL, 0x7c00}, + {"noiselvl5gma0", 0x00000700, 0, SROM8_NOISELVL_5GM, 0x001f}, + {"noiselvl5gma1", 0x00000700, 0, SROM8_NOISELVL_5GM, 0x03e0}, + {"noiselvl5gma2", 0x00000700, 0, SROM8_NOISELVL_5GM, 0x7c00}, + {"noiselvl5gha0", 0x00000700, 0, SROM8_NOISELVL_5GH, 0x001f}, + {"noiselvl5gha1", 0x00000700, 0, SROM8_NOISELVL_5GH, 0x03e0}, + {"noiselvl5gha2", 0x00000700, 0, SROM8_NOISELVL_5GH, 0x7c00}, + {"noiselvl5gua0", 0x00000700, 0, SROM8_NOISELVL_5GU, 0x001f}, + {"noiselvl5gua1", 0x00000700, 0, SROM8_NOISELVL_5GU, 0x03e0}, + {"noiselvl5gua2", 0x00000700, 0, SROM8_NOISELVL_5GU, 0x7c00}, + {"subband5gver", 0x00000700, 0, SROM8_SUBBAND_PPR, 0x7}, + + {"cckPwrOffset", 0x00000400, 0, SROM10_CCKPWROFFSET, 0xffff}, + /* swctrlmap_2g array, note that the last element doesn't have SRFL_ARRAY flag set */ + {"swctrlmap_2g", 0x00000400, SRFL_MORE|SRFL_PRHEX|SRFL_ARRAY, SROM10_SWCTRLMAP_2G, 0xffff}, + {"", 0x00000400, SRFL_ARRAY, SROM10_SWCTRLMAP_2G + 1, 0xffff}, + {"", 0x00000400, SRFL_MORE|SRFL_PRHEX|SRFL_ARRAY, SROM10_SWCTRLMAP_2G + 2, 0xffff}, + {"", 0x00000400, SRFL_ARRAY, SROM10_SWCTRLMAP_2G + 3, 0xffff}, + {"", 0x00000400, SRFL_MORE|SRFL_PRHEX|SRFL_ARRAY, SROM10_SWCTRLMAP_2G + 4, 0xffff}, + {"", 0x00000400, SRFL_ARRAY, SROM10_SWCTRLMAP_2G + 5, 0xffff}, + {"", 0x00000400, SRFL_MORE|SRFL_PRHEX|SRFL_ARRAY, SROM10_SWCTRLMAP_2G + 6, 0xffff}, + {"", 0x00000400, SRFL_ARRAY, SROM10_SWCTRLMAP_2G + 7, 0xffff}, + {"", 0x00000400, SRFL_PRHEX, SROM10_SWCTRLMAP_2G + 8, 0xffff}, + + /* sromrev 11 */ + {"boardflags3", 0xfffff800, SRFL_PRHEX|SRFL_MORE, SROM11_BFL4, 0xffff}, + {"", 0, 0, SROM11_BFL5, 0xffff}, + {"boardnum", 0xfffff800, 0, SROM11_MACLO, 0xffff}, + {"macaddr", 0xfffff800, SRFL_ETHADDR, SROM11_MACHI, 0xffff}, + {"ccode", 0xfffff800, SRFL_CCODE, SROM11_CCODE, 0xffff}, + {"regrev", 0xfffff800, 0, SROM11_REGREV, 0x00ff}, + {"ledbh0", 0xfffff800, SRFL_NOFFS, SROM11_LEDBH10, 0x00ff}, + {"ledbh1", 0xfffff800, SRFL_NOFFS, SROM11_LEDBH10, 0xff00}, + {"ledbh2", 0xfffff800, SRFL_NOFFS, SROM11_LEDBH32, 0x00ff}, + {"ledbh3", 0xfffff800, SRFL_NOFFS, SROM11_LEDBH32, 0xff00}, + {"leddc", 0xfffff800, SRFL_NOFFS|SRFL_LEDDC, SROM11_LEDDC, 0xffff}, + {"aa2g", 0xfffff800, 0, SROM11_AA, 0x00ff}, + {"aa5g", 0xfffff800, 0, SROM11_AA, 0xff00}, + {"agbg0", 0xfffff800, 0, SROM11_AGBG10, 0xff00}, + {"agbg1", 0xfffff800, 0, SROM11_AGBG10, 0x00ff}, + {"agbg2", 0xfffff800, 0, SROM11_AGBG2A0, 0xff00}, + {"aga0", 0xfffff800, 0, SROM11_AGBG2A0, 0x00ff}, + {"aga1", 0xfffff800, 0, SROM11_AGA21, 0xff00}, + {"aga2", 0xfffff800, 0, SROM11_AGA21, 0x00ff}, + {"txchain", 0xfffff800, SRFL_NOFFS, SROM11_TXRXC, SROM4_TXCHAIN_MASK}, + {"rxchain", 0xfffff800, SRFL_NOFFS, SROM11_TXRXC, SROM4_RXCHAIN_MASK}, + {"antswitch", 0xfffff800, SRFL_NOFFS, SROM11_TXRXC, SROM4_SWITCH_MASK}, + + {"tssiposslope2g", 0xfffff800, 0, SROM11_FEM_CFG1, 0x0001}, + {"epagain2g", 0xfffff800, 0, SROM11_FEM_CFG1, 0x000e}, + {"pdgain2g", 0xfffff800, 0, SROM11_FEM_CFG1, 0x01f0}, + {"tworangetssi2g", 0xfffff800, 0, SROM11_FEM_CFG1, 0x0200}, + {"papdcap2g", 0xfffff800, 0, SROM11_FEM_CFG1, 0x0400}, + {"femctrl", 0xfffff800, 0, SROM11_FEM_CFG1, 0xf800}, + + {"tssiposslope5g", 0xfffff800, 0, SROM11_FEM_CFG2, 0x0001}, + {"epagain5g", 0xfffff800, 0, SROM11_FEM_CFG2, 0x000e}, + {"pdgain5g", 0xfffff800, 0, SROM11_FEM_CFG2, 0x01f0}, + {"tworangetssi5g", 0xfffff800, 0, SROM11_FEM_CFG2, 0x0200}, + {"papdcap5g", 0xfffff800, 0, SROM11_FEM_CFG2, 0x0400}, + {"gainctrlsph", 0xfffff800, 0, SROM11_FEM_CFG2, 0xf800}, + + {"tempthresh", 0xfffff800, 0, SROM11_THERMAL, 0xff00}, + {"tempoffset", 0xfffff800, 0, SROM11_THERMAL, 0x00ff}, + {"rawtempsense", 0xfffff800, SRFL_PRHEX, SROM11_MPWR_RAWTS, 0x01ff}, + {"measpower", 0xfffff800, SRFL_PRHEX, SROM11_MPWR_RAWTS, 0xfe00}, + {"tempsense_slope", 0xfffff800, SRFL_PRHEX, SROM11_TS_SLP_OPT_CORRX, 0x00ff}, + {"tempcorrx", 0xfffff800, SRFL_PRHEX, SROM11_TS_SLP_OPT_CORRX, 0xfc00}, + {"tempsense_option", 0xfffff800, SRFL_PRHEX, SROM11_TS_SLP_OPT_CORRX, 0x0300}, + {"xtalfreq", 0xfffff800, 0, SROM11_XTAL_FREQ, 0xffff}, + /* Special PA Params for 4350 5G Band, 40/80 MHz BW Ant #1 */ + {"pa5gbw4080a1", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB0_4080_W0_A1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB0_4080_W1_A1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB0_4080_W2_A1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB1_4080_W0_A1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB1_4080_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB1_4080_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB2_4080_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB2_4080_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB2_4080_PA + 2, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB3_4080_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB3_4080_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX, SROM11_PATH2 + SROM11_5GB3_4080_PA + 2, 0xffff}, + {"phycal_tempdelta", 0xfffff800, 0, SROM11_PHYCAL_TEMPDELTA, 0x00ff}, + {"temps_period", 0xfffff800, 0, SROM11_PHYCAL_TEMPDELTA, 0x0f00}, + {"temps_hysteresis", 0xfffff800, 0, SROM11_PHYCAL_TEMPDELTA, 0xf000}, + {"measpower1", 0xfffff800, SRFL_PRHEX, SROM11_MPWR_1_AND_2, 0x007f}, + {"measpower2", 0xfffff800, SRFL_PRHEX, SROM11_MPWR_1_AND_2, 0x3f80}, + {"tssifloor2g", 0xfffff800, SRFL_PRHEX, SROM11_TSSIFLOOR_2G, 0x03ff}, + {"tssifloor5g", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_TSSIFLOOR_5GL, 0x03ff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_TSSIFLOOR_5GM, 0x03ff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_TSSIFLOOR_5GH, 0x03ff}, + {"", 0xfffff800, SRFL_PRHEX, SROM11_TSSIFLOOR_5GU, 0x03ff}, + {"pdoffset2g40ma0", 0xfffff800, 0, SROM11_PDOFF_2G_40M, 0x000f}, + {"pdoffset2g40ma1", 0xfffff800, 0, SROM11_PDOFF_2G_40M, 0x00f0}, + {"pdoffset2g40ma2", 0xfffff800, 0, SROM11_PDOFF_2G_40M, 0x0f00}, + {"pdoffset2g40mvalid", 0xfffff800, 0, SROM11_PDOFF_2G_40M, 0x8000}, + {"pdoffset40ma0", 0xfffff800, 0, SROM11_PDOFF_40M_A0, 0xffff}, + {"pdoffset40ma1", 0xfffff800, 0, SROM11_PDOFF_40M_A1, 0xffff}, + {"pdoffset40ma2", 0xfffff800, 0, SROM11_PDOFF_40M_A2, 0xffff}, + {"pdoffset80ma0", 0xfffff800, 0, SROM11_PDOFF_80M_A0, 0xffff}, + {"pdoffset80ma1", 0xfffff800, 0, SROM11_PDOFF_80M_A1, 0xffff}, + {"pdoffset80ma2", 0xfffff800, 0, SROM11_PDOFF_80M_A2, 0xffff}, + + {"subband5gver", 0xfffff800, SRFL_PRHEX, SROM11_SUBBAND5GVER, 0xffff}, + {"paparambwver", 0xfffff800, 0, SROM11_MCSLR5GLPO, 0xf000}, + /* Special PA Params for 4350 5G Band, 40/80 MHz BW Ant #0 */ + {"pa5gbw4080a0", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 +SROM11_5GB0_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB0_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB0_PA + 2, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB1_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB1_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB1_PA + 2, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB2_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB2_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB2_PA + 2, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB3_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB3_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX, SROM11_PATH2 + SROM11_5GB3_PA + 2, 0xffff}, + /* Special PA Params for 4335 5G Band, 40 MHz BW */ + {"pa5gbw40a0", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH1 + SROM11_5GB0_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH1 + SROM11_5GB0_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH1 + SROM11_5GB0_PA + 2, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH1 + SROM11_5GB1_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH1 + SROM11_5GB1_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH1 + SROM11_5GB1_PA + 2, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH1 + SROM11_5GB2_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH1 + SROM11_5GB2_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH1 + SROM11_5GB2_PA + 2, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH1 + SROM11_5GB3_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH1 + SROM11_5GB3_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX, SROM11_PATH1 + SROM11_5GB3_PA + 2, 0xffff}, + /* Special PA Params for 4335 5G Band, 80 MHz BW */ + {"pa5gbw80a0", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB0_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB0_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB0_PA + 2, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB1_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB1_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB1_PA + 2, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB2_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB2_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB2_PA + 2, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB3_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH2 + SROM11_5GB3_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX, SROM11_PATH2 + SROM11_5GB3_PA + 2, 0xffff}, + /* Special PA Params for 4335 2G Band, CCK */ + {"pa2gccka0", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH1 + SROM11_2G_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_PATH1 + SROM11_2G_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX, SROM11_PATH1 + SROM11_2G_PA + 2, 0xffff}, + + /* power per rate */ + {"cckbw202gpo", 0xfffff800, 0, SROM11_CCKBW202GPO, 0xffff}, + {"cckbw20ul2gpo", 0xfffff800, 0, SROM11_CCKBW20UL2GPO, 0xffff}, + {"mcsbw202gpo", 0xfffff800, SRFL_MORE, SROM11_MCSBW202GPO, 0xffff}, + {"", 0xfffff800, 0, SROM11_MCSBW202GPO_1, 0xffff}, + {"mcsbw402gpo", 0xfffff800, SRFL_MORE, SROM11_MCSBW402GPO, 0xffff}, + {"", 0xfffff800, 0, SROM11_MCSBW402GPO_1, 0xffff}, + {"dot11agofdmhrbw202gpo", 0xfffff800, 0, SROM11_DOT11AGOFDMHRBW202GPO, 0xffff}, + {"ofdmlrbw202gpo", 0xfffff800, 0, SROM11_OFDMLRBW202GPO, 0xffff}, + {"mcsbw205glpo", 0xfffff800, SRFL_MORE, SROM11_MCSBW205GLPO, 0xffff}, + {"", 0xfffff800, 0, SROM11_MCSBW205GLPO_1, 0xffff}, + {"mcsbw405glpo", 0xfffff800, SRFL_MORE, SROM11_MCSBW405GLPO, 0xffff}, + {"", 0xfffff800, 0, SROM11_MCSBW405GLPO_1, 0xffff}, + {"mcsbw805glpo", 0xfffff800, SRFL_MORE, SROM11_MCSBW805GLPO, 0xffff}, + {"", 0xfffff800, 0, SROM11_MCSBW805GLPO_1, 0xffff}, + {"mcsbw205gmpo", 0xfffff800, SRFL_MORE, SROM11_MCSBW205GMPO, 0xffff}, + {"", 0xfffff800, 0, SROM11_MCSBW205GMPO_1, 0xffff}, + {"mcsbw405gmpo", 0xfffff800, SRFL_MORE, SROM11_MCSBW405GMPO, 0xffff}, + {"", 0xfffff800, 0, SROM11_MCSBW405GMPO_1, 0xffff}, + {"mcsbw805gmpo", 0xfffff800, SRFL_MORE, SROM11_MCSBW805GMPO, 0xffff}, + {"", 0xfffff800, 0, SROM11_MCSBW805GMPO_1, 0xffff}, + {"mcsbw205ghpo", 0xfffff800, SRFL_MORE, SROM11_MCSBW205GHPO, 0xffff}, + {"", 0xfffff800, 0, SROM11_MCSBW205GHPO_1, 0xffff}, + {"mcsbw405ghpo", 0xfffff800, SRFL_MORE, SROM11_MCSBW405GHPO, 0xffff}, + {"", 0xfffff800, 0, SROM11_MCSBW405GHPO_1, 0xffff}, + {"mcsbw805ghpo", 0xfffff800, SRFL_MORE, SROM11_MCSBW805GHPO, 0xffff}, + {"", 0xfffff800, 0, SROM11_MCSBW805GHPO_1, 0xffff}, + {"mcslr5glpo", 0xfffff800, 0, SROM11_MCSLR5GLPO, 0x0fff}, + {"mcslr5gmpo", 0xfffff800, 0, SROM11_MCSLR5GMPO, 0xffff}, + {"mcslr5ghpo", 0xfffff800, 0, SROM11_MCSLR5GHPO, 0xffff}, + {"sb20in40hrpo", 0xfffff800, 0, SROM11_SB20IN40HRPO, 0xffff}, + {"sb20in80and160hr5glpo", 0xfffff800, 0, SROM11_SB20IN80AND160HR5GLPO, 0xffff}, + {"sb40and80hr5glpo", 0xfffff800, 0, SROM11_SB40AND80HR5GLPO, 0xffff}, + {"sb20in80and160hr5gmpo", 0xfffff800, 0, SROM11_SB20IN80AND160HR5GMPO, 0xffff}, + {"sb40and80hr5gmpo", 0xfffff800, 0, SROM11_SB40AND80HR5GMPO, 0xffff}, + {"sb20in80and160hr5ghpo", 0xfffff800, 0, SROM11_SB20IN80AND160HR5GHPO, 0xffff}, + {"sb40and80hr5ghpo", 0xfffff800, 0, SROM11_SB40AND80HR5GHPO, 0xffff}, + {"sb20in40lrpo", 0xfffff800, 0, SROM11_SB20IN40LRPO, 0xffff}, + {"sb20in80and160lr5glpo", 0xfffff800, 0, SROM11_SB20IN80AND160LR5GLPO, 0xffff}, + {"sb40and80lr5glpo", 0xfffff800, 0, SROM11_SB40AND80LR5GLPO, 0xffff}, + {"sb20in80and160lr5gmpo", 0xfffff800, 0, SROM11_SB20IN80AND160LR5GMPO, 0xffff}, + {"sb40and80lr5gmpo", 0xfffff800, 0, SROM11_SB40AND80LR5GMPO, 0xffff}, + {"sb20in80and160lr5ghpo", 0xfffff800, 0, SROM11_SB20IN80AND160LR5GHPO, 0xffff}, + {"sb40and80lr5ghpo", 0xfffff800, 0, SROM11_SB40AND80LR5GHPO, 0xffff}, + {"dot11agduphrpo", 0xfffff800, 0, SROM11_DOT11AGDUPHRPO, 0xffff}, + {"dot11agduplrpo", 0xfffff800, 0, SROM11_DOT11AGDUPLRPO, 0xffff}, + + /* Misc */ + {"sar2g", 0xfffff800, 0, SROM11_SAR, 0x00ff}, + {"sar5g", 0xfffff800, 0, SROM11_SAR, 0xff00}, + + {"noiselvl2ga0", 0xfffff800, 0, SROM11_NOISELVL_2G, 0x001f}, + {"noiselvl2ga1", 0xfffff800, 0, SROM11_NOISELVL_2G, 0x03e0}, + {"noiselvl2ga2", 0xfffff800, 0, SROM11_NOISELVL_2G, 0x7c00}, + {"noiselvl5ga0", 0xfffff800, SRFL_ARRAY, SROM11_NOISELVL_5GL, 0x001f}, + {"", 0xfffff800, SRFL_ARRAY, SROM11_NOISELVL_5GM, 0x001f}, + {"", 0xfffff800, SRFL_ARRAY, SROM11_NOISELVL_5GH, 0x001f}, + {"", 0xfffff800, 0, SROM11_NOISELVL_5GU, 0x001f}, + {"noiselvl5ga1", 0xfffff800, SRFL_ARRAY, SROM11_NOISELVL_5GL, 0x03e0}, + {"", 0xfffff800, SRFL_ARRAY, SROM11_NOISELVL_5GM, 0x03e0}, + {"", 0xfffff800, SRFL_ARRAY, SROM11_NOISELVL_5GH, 0x03e0}, + {"", 0xfffff800, 0, SROM11_NOISELVL_5GU, 0x03e0}, + {"noiselvl5ga2", 0xfffff800, SRFL_ARRAY, SROM11_NOISELVL_5GL, 0x7c00}, + {"", 0xfffff800, SRFL_ARRAY, SROM11_NOISELVL_5GM, 0x7c00}, + {"", 0xfffff800, SRFL_ARRAY, SROM11_NOISELVL_5GH, 0x7c00}, + {"", 0xfffff800, 0, SROM11_NOISELVL_5GU, 0x7c00}, + + {"rxgainerr2ga0", 0xfffff800, 0, SROM11_RXGAINERR_2G, 0x003f}, + {"rxgainerr2ga1", 0xfffff800, 0, SROM11_RXGAINERR_2G, 0x07c0}, + {"rxgainerr2ga2", 0xfffff800, 0, SROM11_RXGAINERR_2G, 0xf800}, + {"rxgainerr5ga0", 0xfffff800, SRFL_ARRAY, SROM11_RXGAINERR_5GL, 0x003f}, + {"", 0xfffff800, SRFL_ARRAY, SROM11_RXGAINERR_5GM, 0x003f}, + {"", 0xfffff800, SRFL_ARRAY, SROM11_RXGAINERR_5GH, 0x003f}, + {"", 0xfffff800, 0, SROM11_RXGAINERR_5GU, 0x003f}, + {"rxgainerr5ga1", 0xfffff800, SRFL_ARRAY, SROM11_RXGAINERR_5GL, 0x07c0}, + {"", 0xfffff800, SRFL_ARRAY, SROM11_RXGAINERR_5GM, 0x07c0}, + {"", 0xfffff800, SRFL_ARRAY, SROM11_RXGAINERR_5GH, 0x07c0}, + {"", 0xfffff800, 0, SROM11_RXGAINERR_5GU, 0x07c0}, + {"rxgainerr5ga2", 0xfffff800, SRFL_ARRAY, SROM11_RXGAINERR_5GL, 0xf800}, + {"", 0xfffff800, SRFL_ARRAY, SROM11_RXGAINERR_5GM, 0xf800}, + {"", 0xfffff800, SRFL_ARRAY, SROM11_RXGAINERR_5GH, 0xf800}, + {"", 0xfffff800, 0, SROM11_RXGAINERR_5GU, 0xf800}, + {"rpcal2g", 0xfffff800, 0, SROM11_RPCAL_2G, 0xffff}, + {"rpcal5gb0", 0xfffff800, 0, SROM11_RPCAL_5GL, 0xffff}, + {"rpcal5gb1", 0xfffff800, 0, SROM11_RPCAL_5GM, 0xffff}, + {"rpcal5gb2", 0xfffff800, 0, SROM11_RPCAL_5GH, 0xffff}, + {"rpcal5gb3", 0xfffff800, 0, SROM11_RPCAL_5GU, 0xffff}, + {"txidxcap2g", 0xfffff800, 0, SROM11_TXIDXCAP2G, 0x0ff0}, + {"txidxcap5g", 0xfffff800, 0, SROM11_TXIDXCAP5G, 0x0ff0}, + + {NULL, 0, 0, 0, 0} +}; + +static const sromvar_t perpath_pci_sromvars[] = { + {"maxp2ga", 0x000000f0, 0, SROM4_2G_ITT_MAXP, 0x00ff}, + {"itt2ga", 0x000000f0, 0, SROM4_2G_ITT_MAXP, 0xff00}, + {"itt5ga", 0x000000f0, 0, SROM4_5G_ITT_MAXP, 0xff00}, + {"pa2gw0a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA, 0xffff}, + {"pa2gw1a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 1, 0xffff}, + {"pa2gw2a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 2, 0xffff}, + {"pa2gw3a", 0x000000f0, SRFL_PRHEX, SROM4_2G_PA + 3, 0xffff}, + {"maxp5ga", 0x000000f0, 0, SROM4_5G_ITT_MAXP, 0x00ff}, + {"maxp5gha", 0x000000f0, 0, SROM4_5GLH_MAXP, 0x00ff}, + {"maxp5gla", 0x000000f0, 0, SROM4_5GLH_MAXP, 0xff00}, + {"pa5gw0a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA, 0xffff}, + {"pa5gw1a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 1, 0xffff}, + {"pa5gw2a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 2, 0xffff}, + {"pa5gw3a", 0x000000f0, SRFL_PRHEX, SROM4_5G_PA + 3, 0xffff}, + {"pa5glw0a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA, 0xffff}, + {"pa5glw1a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 1, 0xffff}, + {"pa5glw2a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 2, 0xffff}, + {"pa5glw3a", 0x000000f0, SRFL_PRHEX, SROM4_5GL_PA + 3, 0xffff}, + {"pa5ghw0a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA, 0xffff}, + {"pa5ghw1a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 1, 0xffff}, + {"pa5ghw2a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 2, 0xffff}, + {"pa5ghw3a", 0x000000f0, SRFL_PRHEX, SROM4_5GH_PA + 3, 0xffff}, + {"maxp2ga", 0x00000700, 0, SROM8_2G_ITT_MAXP, 0x00ff}, + {"itt2ga", 0x00000700, 0, SROM8_2G_ITT_MAXP, 0xff00}, + {"itt5ga", 0x00000700, 0, SROM8_5G_ITT_MAXP, 0xff00}, + {"pa2gw0a", 0x00000700, SRFL_PRHEX, SROM8_2G_PA, 0xffff}, + {"pa2gw1a", 0x00000700, SRFL_PRHEX, SROM8_2G_PA + 1, 0xffff}, + {"pa2gw2a", 0x00000700, SRFL_PRHEX, SROM8_2G_PA + 2, 0xffff}, + {"maxp5ga", 0x00000700, 0, SROM8_5G_ITT_MAXP, 0x00ff}, + {"maxp5gha", 0x00000700, 0, SROM8_5GLH_MAXP, 0x00ff}, + {"maxp5gla", 0x00000700, 0, SROM8_5GLH_MAXP, 0xff00}, + {"pa5gw0a", 0x00000700, SRFL_PRHEX, SROM8_5G_PA, 0xffff}, + {"pa5gw1a", 0x00000700, SRFL_PRHEX, SROM8_5G_PA + 1, 0xffff}, + {"pa5gw2a", 0x00000700, SRFL_PRHEX, SROM8_5G_PA + 2, 0xffff}, + {"pa5glw0a", 0x00000700, SRFL_PRHEX, SROM8_5GL_PA, 0xffff}, + {"pa5glw1a", 0x00000700, SRFL_PRHEX, SROM8_5GL_PA + 1, 0xffff}, + {"pa5glw2a", 0x00000700, SRFL_PRHEX, SROM8_5GL_PA + 2, 0xffff}, + {"pa5ghw0a", 0x00000700, SRFL_PRHEX, SROM8_5GH_PA, 0xffff}, + {"pa5ghw1a", 0x00000700, SRFL_PRHEX, SROM8_5GH_PA + 1, 0xffff}, + {"pa5ghw2a", 0x00000700, SRFL_PRHEX, SROM8_5GH_PA + 2, 0xffff}, + + /* sromrev 11 */ + {"maxp2ga", 0xfffff800, 0, SROM11_2G_MAXP, 0x00ff}, + {"pa2ga", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_2G_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_2G_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX, SROM11_2G_PA + 2, 0xffff}, + {"rxgains5gmelnagaina", 0xfffff800, 0, SROM11_RXGAINS1, 0x0007}, + {"rxgains5gmtrisoa", 0xfffff800, 0, SROM11_RXGAINS1, 0x0078}, + {"rxgains5gmtrelnabypa", 0xfffff800, 0, SROM11_RXGAINS1, 0x0080}, + {"rxgains5ghelnagaina", 0xfffff800, 0, SROM11_RXGAINS1, 0x0700}, + {"rxgains5ghtrisoa", 0xfffff800, 0, SROM11_RXGAINS1, 0x7800}, + {"rxgains5ghtrelnabypa", 0xfffff800, 0, SROM11_RXGAINS1, 0x8000}, + {"rxgains2gelnagaina", 0xfffff800, 0, SROM11_RXGAINS, 0x0007}, + {"rxgains2gtrisoa", 0xfffff800, 0, SROM11_RXGAINS, 0x0078}, + {"rxgains2gtrelnabypa", 0xfffff800, 0, SROM11_RXGAINS, 0x0080}, + {"rxgains5gelnagaina", 0xfffff800, 0, SROM11_RXGAINS, 0x0700}, + {"rxgains5gtrisoa", 0xfffff800, 0, SROM11_RXGAINS, 0x7800}, + {"rxgains5gtrelnabypa", 0xfffff800, 0, SROM11_RXGAINS, 0x8000}, + {"maxp5ga", 0xfffff800, SRFL_ARRAY, SROM11_5GB1B0_MAXP, 0x00ff}, + {"", 0xfffff800, SRFL_ARRAY, SROM11_5GB1B0_MAXP, 0xff00}, + {"", 0xfffff800, SRFL_ARRAY, SROM11_5GB3B2_MAXP, 0x00ff}, + {"", 0xfffff800, 0, SROM11_5GB3B2_MAXP, 0xff00}, + {"pa5ga", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB0_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB0_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB0_PA + 2, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB1_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB1_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB1_PA + 2, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB2_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB2_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB2_PA + 2, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB3_PA, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX | SRFL_ARRAY, SROM11_5GB3_PA + 1, 0xffff}, + {"", 0xfffff800, SRFL_PRHEX, SROM11_5GB3_PA + 2, 0xffff}, + {NULL, 0, 0, 0, 0} +}; + +#if !(defined(PHY_TYPE_HT) && defined(PHY_TYPE_N) && defined(PHY_TYPE_LP)) +#define PHY_TYPE_HT 7 /* HT-Phy value */ +#define PHY_TYPE_N 4 /* N-Phy value */ +#define PHY_TYPE_LP 5 /* LP-Phy value */ +#endif /* !(defined(PHY_TYPE_HT) && defined(PHY_TYPE_N) && defined(PHY_TYPE_LP)) */ +#if !defined(PHY_TYPE_AC) +#define PHY_TYPE_AC 11 /* AC-Phy value */ +#endif /* !defined(PHY_TYPE_AC) */ +#if !defined(PHY_TYPE_NULL) +#define PHY_TYPE_NULL 0xf /* Invalid Phy value */ +#endif /* !defined(PHY_TYPE_NULL) */ + +typedef struct { + uint16 phy_type; + uint16 bandrange; + uint16 chain; + const char *vars; +} pavars_t; + +static const pavars_t pavars[] = { + /* HTPHY */ + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_2G, 0, "pa2gw0a0 pa2gw1a0 pa2gw2a0"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_2G, 1, "pa2gw0a1 pa2gw1a1 pa2gw2a1"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_2G, 2, "pa2gw0a2 pa2gw1a2 pa2gw2a2"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GL, 0, "pa5glw0a0 pa5glw1a0 pa5glw2a0"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GL, 1, "pa5glw0a1 pa5glw1a1 pa5glw2a1"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GL, 2, "pa5glw0a2 pa5glw1a2 pa5glw2a2"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GM, 0, "pa5gw0a0 pa5gw1a0 pa5gw2a0"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GM, 1, "pa5gw0a1 pa5gw1a1 pa5gw2a1"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GM, 2, "pa5gw0a2 pa5gw1a2 pa5gw2a2"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GH, 0, "pa5ghw0a0 pa5ghw1a0 pa5ghw2a0"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GH, 1, "pa5ghw0a1 pa5ghw1a1 pa5ghw2a1"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GH, 2, "pa5ghw0a2 pa5ghw1a2 pa5ghw2a2"}, + /* HTPHY PPR_SUBBAND */ + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GLL_5BAND, 0, "pa5gllw0a0 pa5gllw1a0 pa5gllw2a0"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GLL_5BAND, 1, "pa5gllw0a1 pa5gllw1a1 pa5gllw2a1"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GLL_5BAND, 2, "pa5gllw0a2 pa5gllw1a2 pa5gllw2a2"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GLH_5BAND, 0, "pa5glhw0a0 pa5glhw1a0 pa5glhw2a0"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GLH_5BAND, 1, "pa5glhw0a1 pa5glhw1a1 pa5glhw2a1"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GLH_5BAND, 2, "pa5glhw0a2 pa5glhw1a2 pa5glhw2a2"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GML_5BAND, 0, "pa5gmlw0a0 pa5gmlw1a0 pa5gmlw2a0"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GML_5BAND, 1, "pa5gmlw0a1 pa5gmlw1a1 pa5gmlw2a1"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GML_5BAND, 2, "pa5gmlw0a2 pa5gmlw1a2 pa5gmlw2a2"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GMH_5BAND, 0, "pa5gmhw0a0 pa5gmhw1a0 pa5gmhw2a0"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GMH_5BAND, 1, "pa5gmhw0a1 pa5gmhw1a1 pa5gmhw2a1"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GMH_5BAND, 2, "pa5gmhw0a2 pa5gmhw1a2 pa5gmhw2a2"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GH_5BAND, 0, "pa5ghw0a0 pa5ghw1a0 pa5ghw2a0"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GH_5BAND, 1, "pa5ghw0a1 pa5ghw1a1 pa5ghw2a1"}, + {PHY_TYPE_HT, WL_CHAN_FREQ_RANGE_5GH_5BAND, 2, "pa5ghw0a2 pa5ghw1a2 pa5ghw2a2"}, + /* NPHY */ + {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G, 0, "pa2gw0a0 pa2gw1a0 pa2gw2a0"}, + {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G, 1, "pa2gw0a1 pa2gw1a1 pa2gw2a1"}, + {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL, 0, "pa5glw0a0 pa5glw1a0 pa5glw2a0"}, + {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL, 1, "pa5glw0a1 pa5glw1a1 pa5glw2a1"}, + {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM, 0, "pa5gw0a0 pa5gw1a0 pa5gw2a0"}, + {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM, 1, "pa5gw0a1 pa5gw1a1 pa5gw2a1"}, + {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH, 0, "pa5ghw0a0 pa5ghw1a0 pa5ghw2a0"}, + {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH, 1, "pa5ghw0a1 pa5ghw1a1 pa5ghw2a1"}, + /* LPPHY */ + {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_2G, 0, "pa0b0 pa0b1 pa0b2"}, + {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GL, 0, "pa1lob0 pa1lob1 pa1lob2"}, + {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GM, 0, "pa1b0 pa1b1 pa1b2"}, + {PHY_TYPE_LP, WL_CHAN_FREQ_RANGE_5GH, 0, "pa1hib0 pa1hib1 pa1hib2"}, + /* ACPHY */ + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_2G, 0, "pa2ga0"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_2G, 1, "pa2ga1"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_2G, 2, "pa2ga2"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_5G_4BAND, 0, "pa5ga0"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_5G_4BAND, 1, "pa5ga1"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_5G_4BAND, 2, "pa5ga2"}, + {PHY_TYPE_NULL, 0, 0, ""} +}; + +/* pavars table when paparambwver is 1 */ +static const pavars_t pavars_bwver_1[] = { + /* ACPHY */ + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_2G, 0, "pa2ga0"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_2G, 1, "pa2gccka0"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_2G, 1, "pa2ga2"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_5G_4BAND, 0, "pa5ga0"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_5G_4BAND, 1, "pa5gbw40a0"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_5G_4BAND, 2, "pa5gbw80a0"}, + {PHY_TYPE_NULL, 0, 0, ""} +}; + +/* pavars table when paparambwver is 2 */ +static const pavars_t pavars_bwver_2[] = { + /* ACPHY */ + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_2G, 0, "pa2ga0"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_2G, 1, "pa2ga1"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_5G_4BAND, 0, "pa5ga0"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_5G_4BAND, 1, "pa5ga1"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_5G_4BAND, 2, "pa5gbw4080a0"}, + {PHY_TYPE_AC, WL_CHAN_FREQ_RANGE_5G_4BAND, 3, "pa5gbw4080a1"}, + {PHY_TYPE_NULL, 0, 0, ""} +}; + +typedef struct { + uint16 phy_type; + uint16 bandrange; + const char *vars; +} povars_t; + +static const povars_t povars[] = { + /* NPHY */ + {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_2G, "mcs2gpo0 mcs2gpo1 mcs2gpo2 mcs2gpo3 " + "mcs2gpo4 mcs2gpo5 mcs2gpo6 mcs2gpo7"}, + {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GL, "mcs5glpo0 mcs5glpo1 mcs5glpo2 mcs5glpo3 " + "mcs5glpo4 mcs5glpo5 mcs5glpo6 mcs5glpo7"}, + {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GM, "mcs5gpo0 mcs5gpo1 mcs5gpo2 mcs5gpo3 " + "mcs5gpo4 mcs5gpo5 mcs5gpo6 mcs5gpo7"}, + {PHY_TYPE_N, WL_CHAN_FREQ_RANGE_5GH, "mcs5ghpo0 mcs5ghpo1 mcs5ghpo2 mcs5ghpo3 " + "mcs5ghpo4 mcs5ghpo5 mcs5ghpo6 mcs5ghpo7"}, + {PHY_TYPE_NULL, 0, ""} +}; + +typedef struct { + uint8 tag; /* Broadcom subtag name */ + uint32 revmask; /* Supported cis_sromrev */ + uint8 len; /* Length field of the tuple, note that it includes the + * subtag name (1 byte): 1 + tuple content length + */ + const char *params; /* Each param is in this form: length(1 byte ascii) + var name + * XXX Note that the order here has to match the parsing + * order in parsecis() in src/shared/bcmsrom.c + */ +} cis_tuple_t; + +#define OTP_RAW (0xff - 1) /* Reserved tuple number for wrvar Raw input */ +/* XXX quick hacks for supporting standard CIS tuples. */ +#define OTP_VERS_1 (0xff - 2) /* CISTPL_VERS_1 */ +#define OTP_MANFID (0xff - 3) /* CISTPL_MANFID */ +#define OTP_RAW1 (0xff - 4) /* Like RAW, but comes first */ + +static const cis_tuple_t cis_hnbuvars[] = { + {OTP_RAW1, 0xffffffff, 0, ""}, /* special case */ + {OTP_VERS_1, 0xffffffff, 0, "smanf sproductname"}, /* special case (non BRCM tuple) */ + {OTP_MANFID, 0xffffffff, 4, "2manfid 2prodid"}, /* special case (non BRCM tuple) */ + /* Unified OTP: tupple to embed USB manfid inside SDIO CIS */ + {HNBU_UMANFID, 0xffffffff, 8, "8usbmanfid"}, + {HNBU_SROMREV, 0xffffffff, 2, "1sromrev"}, + /* NOTE: subdevid is also written to boardtype. + * Need to write HNBU_BOARDTYPE to change it if it is different. + */ + {HNBU_CHIPID, 0xffffffff, 11, "2vendid 2devid 2chiprev 2subvendid 2subdevid"}, + {HNBU_BOARDREV, 0xffffffff, 3, "2boardrev"}, + {HNBU_PAPARMS, 0xffffffff, 10, "2pa0b0 2pa0b1 2pa0b2 1pa0itssit 1pa0maxpwr 1opo"}, +#if 0 + {HNBU_OEM, 0xffffffff, 0, ""}, /* not yet */ + {HNBU_CC, 0xffffffff, 0, ""}, /* not yet */ +#endif + {HNBU_AA, 0xffffffff, 3, "1aa2g 1aa5g"}, + {HNBU_AA, 0xffffffff, 3, "1aa0 1aa1"}, /* backward compatibility */ + {HNBU_AG, 0xffffffff, 5, "1ag0 1ag1 1ag2 1ag3"}, + {HNBU_BOARDFLAGS, 0xffffffff, 13, "4boardflags 4boardflags2 4boardflags3"}, + {HNBU_LEDS, 0xffffffff, 13, "1ledbh0 1ledbh1 1ledbh2 1ledbh3 1ledbh4 1ledbh5 " + "1ledbh6 1ledbh7 1ledbh8 1ledbh9 1ledbh10 1ledbh11"}, + {HNBU_CCODE, 0xffffffff, 4, "2ccode 1cctl"}, + {HNBU_CCKPO, 0xffffffff, 3, "2cckpo"}, + {HNBU_OFDMPO, 0xffffffff, 5, "4ofdmpo"}, + {HNBU_PAPARMS5G, 0xffffffff, 23, "2pa1b0 2pa1b1 2pa1b2 2pa1lob0 2pa1lob1 2pa1lob2 " + "2pa1hib0 2pa1hib1 2pa1hib2 1pa1itssit " + "1pa1maxpwr 1pa1lomaxpwr 1pa1himaxpwr"}, +#if 0 + {HNBU_GPIOTIMER, 0xffffffff, 1, ""}, /* not yet */ + {HNBU_ANT5G, 0xffffffff, 0, ""}, /* not yet */ +#endif + {HNBU_RDLID, 0xffffffff, 3, "2rdlid"}, + {HNBU_RSSISMBXA2G, 0xffffffff, 3, "0rssismf2g 0rssismc2g " + "0rssisav2g 0bxa2g"}, /* special case */ + {HNBU_RSSISMBXA5G, 0xffffffff, 3, "0rssismf5g 0rssismc5g " + "0rssisav5g 0bxa5g"}, /* special case */ + {HNBU_XTALFREQ, 0xffffffff, 5, "4xtalfreq"}, + {HNBU_TRI2G, 0xffffffff, 2, "1tri2g"}, + {HNBU_TRI5G, 0xffffffff, 4, "1tri5gl 1tri5g 1tri5gh"}, + {HNBU_RXPO2G, 0xffffffff, 2, "1rxpo2g"}, + {HNBU_RXPO5G, 0xffffffff, 2, "1rxpo5g"}, + {HNBU_BOARDNUM, 0xffffffff, 3, "2boardnum"}, + {HNBU_MACADDR, 0xffffffff, 7, "6macaddr"}, /* special case */ + {HNBU_RDLSN, 0xffffffff, 3, "2rdlsn"}, + {HNBU_BOARDTYPE, 0xffffffff, 3, "2boardtype"}, + {HNBU_LEDDC, 0xffffffff, 3, "2leddc"}, + {HNBU_RDLRNDIS, 0xffffffff, 2, "1rdlndis"}, + {HNBU_CHAINSWITCH, 0xffffffff, 5, "1txchain 1rxchain 2antswitch"}, + {HNBU_REGREV, 0xffffffff, 2, "1regrev"}, + {HNBU_FEM, 0x000007fe, 5, "0antswctl2g 0triso2g 0pdetrange2g 0extpagain2g " + "0tssipos2g 0antswctl5g 0triso5g 0pdetrange5g 0extpagain5g 0tssipos5g"}, /* special case */ + {HNBU_PAPARMS_C0, 0x000007fe, 31, "1maxp2ga0 1itt2ga0 2pa2gw0a0 2pa2gw1a0 " + "2pa2gw2a0 1maxp5ga0 1itt5ga0 1maxp5gha0 1maxp5gla0 2pa5gw0a0 2pa5gw1a0 2pa5gw2a0 " + "2pa5glw0a0 2pa5glw1a0 2pa5glw2a0 2pa5ghw0a0 2pa5ghw1a0 2pa5ghw2a0"}, + {HNBU_PAPARMS_C1, 0x000007fe, 31, "1maxp2ga1 1itt2ga1 2pa2gw0a1 2pa2gw1a1 " + "2pa2gw2a1 1maxp5ga1 1itt5ga1 1maxp5gha1 1maxp5gla1 2pa5gw0a1 2pa5gw1a1 2pa5gw2a1 " + "2pa5glw0a1 2pa5glw1a1 2pa5glw2a1 2pa5ghw0a1 2pa5ghw1a1 2pa5ghw2a1"}, +#if 0 + {HNBU_PAPARMS_C2, ,0x000007fe, 0, ""}, /* not yet */ + {HNBU_PAPARMS_C3, ,0x000007fe, 0, ""}, /* not yet */ +#endif + {HNBU_PO_CCKOFDM, 0xffffffff, 19, "2cck2gpo 4ofdm2gpo 4ofdm5gpo 4ofdm5glpo " + "4ofdm5ghpo"}, + {HNBU_PO_MCS2G, 0xffffffff, 17, "2mcs2gpo0 2mcs2gpo1 2mcs2gpo2 2mcs2gpo3 " + "2mcs2gpo4 2mcs2gpo5 2mcs2gpo6 2mcs2gpo7"}, + {HNBU_PO_MCS5GM, 0xffffffff, 17, "2mcs5gpo0 2mcs5gpo1 2mcs5gpo2 2mcs5gpo3 " + "2mcs5gpo4 2mcs5gpo5 2mcs5gpo6 2mcs5gpo7"}, + {HNBU_PO_MCS5GLH, 0xffffffff, 33, "2mcs5glpo0 2mcs5glpo1 2mcs5glpo2 2mcs5glpo3 " + "2mcs5glpo4 2mcs5glpo5 2mcs5glpo6 2mcs5glpo7 " + "2mcs5ghpo0 2mcs5ghpo1 2mcs5ghpo2 2mcs5ghpo3 " + "2mcs5ghpo4 2mcs5ghpo5 2mcs5ghpo6 2mcs5ghpo7"}, + {HNBU_CCKFILTTYPE, 0xffffffff, 2, "1cckdigfilttype"}, + {HNBU_PO_CDD, 0xffffffff, 3, "2cddpo"}, + {HNBU_PO_STBC, 0xffffffff, 3, "2stbcpo"}, + {HNBU_PO_40M, 0xffffffff, 3, "2bw40po"}, + {HNBU_PO_40MDUP, 0xffffffff, 3, "2bwduppo"}, + {HNBU_RDLRWU, 0xffffffff, 2, "1rdlrwu"}, + {HNBU_WPS, 0xffffffff, 3, "1wpsgpio 1wpsled"}, + {HNBU_USBFS, 0xffffffff, 2, "1usbfs"}, + {HNBU_ELNA2G, 0xffffffff, 2, "1elna2g"}, + {HNBU_ELNA5G, 0xffffffff, 2, "1elna5g"}, +#if 0 + {HNBU_SROM3SWRGN, 0xffffffff, 0, ""}, /* not yet */ +#endif + {HNBU_CUSTOM1, 0xffffffff, 5, "4customvar1"}, +#if 0 + {HNBU_CUSTOM2, 0xffffffff, 5, "4customvar2"}, /* not yet */ +#endif + {OTP_RAW, 0xffffffff, 0, ""}, /* special case */ + {HNBU_OFDMPO5G, 0xffffffff, 13, "4ofdm5gpo 4ofdm5glpo 4ofdm5ghpo"}, + {HNBU_USBEPNUM, 0xffffffff, 3, "2usbepnum"}, + {HNBU_CCKBW202GPO, 0xffffffff, 5, "2cckbw202gpo 2cckbw20ul2gpo"}, + {HNBU_LEGOFDMBW202GPO, 0xffffffff, 9, "4legofdmbw202gpo 4legofdmbw20ul2gpo"}, + {HNBU_LEGOFDMBW205GPO, 0xffffffff, 25, "4legofdmbw205glpo 4legofdmbw20ul5glpo " + "4legofdmbw205gmpo 4legofdmbw20ul5gmpo 4legofdmbw205ghpo 4legofdmbw20ul5ghpo"}, + {HNBU_MCS2GPO, 0xffffffff, 13, "4mcsbw202gpo 4mcsbw20ul2gpo 4mcsbw402gpo"}, + {HNBU_MCS5GLPO, 0xffffffff, 13, "4mcsbw205glpo 4mcsbw20ul5glpo 4mcsbw405glpo"}, + {HNBU_MCS5GMPO, 0xffffffff, 13, "4mcsbw205gmpo 4mcsbw20ul5gmpo 4mcsbw405gmpo"}, + {HNBU_MCS5GHPO, 0xffffffff, 13, "4mcsbw205ghpo 4mcsbw20ul5ghpo 4mcsbw405ghpo"}, + {HNBU_MCS32PO, 0xffffffff, 3, "2mcs32po"}, + {HNBU_LEG40DUPPO, 0xffffffff, 3, "2legofdm40duppo"}, + {HNBU_TEMPTHRESH, 0xffffffff, 7, "1tempthresh 0temps_period 0temps_hysteresis " + "1tempoffset 1tempsense_slope 0tempcorrx 0tempsense_option " + "1phycal_tempdelta"}, /* special case */ + {HNBU_MUXENAB, 0xffffffff, 2, "1muxenab"}, + {HNBU_FEM_CFG, 0xfffff800, 5, "0femctrl 0papdcap2g 0tworangetssi2g 0pdgain2g " + "0epagain2g 0tssiposslope2g 0gainctrlsph 0papdcap5g 0tworangetssi5g 0pdgain5g 0epagain5g " + "0tssiposslope5g"}, /* special case */ + {HNBU_ACPA_C0, 0xfffff800, 39, "2subband5gver 2maxp2ga0 2*3pa2ga0 " + "1*4maxp5ga0 2*12pa5ga0"}, + {HNBU_ACPA_C1, 0xfffff800, 37, "2maxp2ga1 2*3pa2ga1 1*4maxp5ga1 2*12pa5ga1"}, + {HNBU_ACPA_C2, 0xfffff800, 37, "2maxp2ga2 2*3pa2ga2 1*4maxp5ga2 2*12pa5ga2"}, + {HNBU_MEAS_PWR, 0xfffff800, 5, "1measpower 1measpower1 1measpower2 2rawtempsense"}, + {HNBU_PDOFF, 0xfffff800, 13, "2pdoffset40ma0 2pdoffset40ma1 2pdoffset40ma2 " + "2pdoffset80ma0 2pdoffset80ma1 2pdoffset80ma2"}, + {HNBU_ACPPR_2GPO, 0xfffff800, 5, "2dot11agofdmhrbw202gpo 2ofdmlrbw202gpo"}, + {HNBU_ACPPR_5GPO, 0xfffff800, 31, "4mcsbw805glpo 4mcsbw1605glpo 4mcsbw805gmpo " + "4mcsbw1605gmpo 4mcsbw805ghpo 4mcsbw1605ghpo 2mcslr5glpo 2mcslr5gmpo 2mcslr5ghpo"}, + {HNBU_ACPPR_SBPO, 0xfffff800, 33, "2sb20in40hrpo 2sb20in80and160hr5glpo " + "2sb40and80hr5glpo 2sb20in80and160hr5gmpo 2sb40and80hr5gmpo 2sb20in80and160hr5ghpo " + "2sb40and80hr5ghpo 2sb20in40lrpo 2sb20in80and160lr5glpo 2sb40and80lr5glpo " + "2sb20in80and160lr5gmpo 2sb40and80lr5gmpo 2sb20in80and160lr5ghpo 2sb40and80lr5ghpo " + "2dot11agduphrpo 2dot11agduplrpo"}, + {HNBU_NOISELVL, 0xfffff800, 16, "1noiselvl2ga0 1noiselvl2ga1 1noiselvl2ga2 " + "1*4noiselvl5ga0 1*4noiselvl5ga1 1*4noiselvl5ga2"}, + {HNBU_RXGAIN_ERR, 0xfffff800, 16, "1rxgainerr2ga0 1rxgainerr2ga1 1rxgainerr2ga2 " + "1*4rxgainerr5ga0 1*4rxgainerr5ga1 1*4rxgainerr5ga2"}, + {HNBU_AGBGA, 0xfffff800, 7, "1agbg0 1agbg1 1agbg2 1aga0 1aga1 1aga2"}, + {HNBU_UUID, 0xffffffff, 17, "16uuid"}, + {HNBU_ACRXGAINS_C0, 0xfffff800, 5, "0rxgains5gtrelnabypa0 0rxgains5gtrisoa0 " + "0rxgains5gelnagaina0 0rxgains2gtrelnabypa0 0rxgains2gtrisoa0 0rxgains2gelnagaina0 " + "0rxgains5ghtrelnabypa0 0rxgains5ghtrisoa0 0rxgains5ghelnagaina0 0rxgains5gmtrelnabypa0 " + "0rxgains5gmtrisoa0 0rxgains5gmelnagaina0"}, /* special case */ + {HNBU_ACRXGAINS_C1, 0xfffff800, 5, "0rxgains5gtrelnabypa1 0rxgains5gtrisoa1 " + "0rxgains5gelnagaina1 0rxgains2gtrelnabypa1 0rxgains2gtrisoa1 0rxgains2gelnagaina1 " + "0rxgains5ghtrelnabypa1 0rxgains5ghtrisoa1 0rxgains5ghelnagaina1 0rxgains5gmtrelnabypa1 " + "0rxgains5gmtrisoa1 0rxgains5gmelnagaina1"}, /* special case */ + {HNBU_ACRXGAINS_C2, 0xfffff800, 5, "0rxgains5gtrelnabypa2 0rxgains5gtrisoa2 " + "0rxgains5gelnagaina2 0rxgains2gtrelnabypa2 0rxgains2gtrisoa2 0rxgains2gelnagaina2 " + "0rxgains5ghtrelnabypa2 0rxgains5ghtrisoa2 0rxgains5ghelnagaina2 0rxgains5gmtrelnabypa2 " + "0rxgains5gmtrisoa2 0rxgains5gmelnagaina2"}, /* special case */ + {HNBU_TXDUTY, 0xfffff800, 9, "2tx_duty_cycle_ofdm_40_5g " + "2tx_duty_cycle_thresh_40_5g 2tx_duty_cycle_ofdm_80_5g 2tx_duty_cycle_thresh_80_5g"}, + {HNBU_PDOFF_2G, 0xfffff800, 3, "0pdoffset2g40ma0 0pdoffset2g40ma1 " + "0pdoffset2g40ma2 0pdoffset2g40mvalid"}, + {HNBU_ACPA_CCK, 0xfffff800, 7, "2*3pa2gccka0"}, + {HNBU_ACPA_40, 0xfffff800, 25, "2*12pa5gbw40a0"}, + {HNBU_ACPA_80, 0xfffff800, 25, "2*12pa5gbw80a0"}, + {HNBU_ACPA_4080, 0xfffff800, 49, "2*12pa5gbw4080a0 2*12pa5gbw4080a1"}, + {HNBU_ACPAPARAM, 0xfffff800, 85, "2*3pa2ga0 2*12pa5ga0 2*3pa2ga1 2*12pa5ga1 " + "2*12pa5ga2"}, + {HNBU_SUBBAND5GVER, 0xfffff800, 3, "2subband5gver"}, + {HNBU_PAPARAMBWVER, 0xfffff800, 2, "1paparambwver"}, + {0xFF, 0xffffffff, 0, ""} +}; + +#endif /* _bcmsrom_tbl_h_ */ diff --git a/external/cache/sources/wl/include/bcmusb.h b/external/cache/sources/wl/include/bcmusb.h new file mode 100644 index 0000000..ece2727 --- /dev/null +++ b/external/cache/sources/wl/include/bcmusb.h @@ -0,0 +1,80 @@ +/* + * Broadcom USB/HSIC framing + * Software-specific framing definitions shared between host and device + * + * $Copyright Open 2012 Broadcom Corporation$ + * + * $Id: bcmusb.h 281591 2012-09-02 18:43:02Z sgsiener $ + */ + +#ifndef _bcmusb_h_ +#define _bcmusb_h_ + +/* + * Software-defined USB frame header + */ + +#ifdef USB_FRAME_HEADER +#define USBF_HEADER_LEN 16 +#else +#define USBF_HEADER_LEN 0 +#endif + +#ifdef USBF_CKSUM_OVER_FRAME +#define USBF_DEF_CKSUM_LEN 0 +#else +#define USBF_DEF_CKSUM_LEN USBF_HEADER_LEN +#endif + +/* Current protocol version */ +#define USBF_PROT_VERSION 1 + +/* ----- first 32-bit word ----- */ + +/* 4-bit version field */ +#define USBF_VER_MASK 0x0000000f + +/* 8-bit flags field */ +#define USBF_FLAGS_MASK 0x00000ff0 +#define USBF_FLAGS_SHIFT 4 + +/* flags field definitions */ +#define USBF_FLAGS_TIMESTAMPED 0x01 /* frame header includes timestamp */ +#define USBF_FLAGS_FRAME_EVENT 0x02 /* set when frame contains an Event indication */ +#define USBF_FLAGS_FRAME_CKSUM 0x04 /* set when cksum is over entire frame */ + +/* 3-bit channel identifier field */ +#define USBF_CHAN_MASK 0x00007000 +#define USBF_CHAN_SHIFT 12 + +#define USBF_CHAN_CONTROL 0 +#define USBF_CHAN_INTERRUPT 1 +#define USBF_CHAN_DATAEVENT 2 + +/* used by host & device to disambiguate frames with this header from ones without */ +#define USBF_TAG 0x00008000 /* bit won't appear in bdc/ioctl header */ + +/* 16-bit checksum */ +#define USBF_CHECKSUM_MASK 0xffff0000 /* checksum mask */ +#define USBF_CHECKSUM_SHIFT 16 + +/* ----- second 32-bit word ----- */ + +/* 16-bit length */ +#define USBF_LENGTH_MASK 0x0000ffff /* length mask */ + +/* 16-bit sequence number */ +#define USBF_SEQNUM_MASK 0xffff0000 /* sequence number mask */ +#define USBF_SEQSUM_SHIFT 16 + +/* ----- third 32-bit word ----- */ + +/* 32-bit timestamp */ +#define USBF_TIMESTAMP_MASK 0xffffffff /* timestamp value mask */ + +/* ----- fourth 32-bit word ----- */ + +/* reserve 32 bits for future use */ +#define USBF_RESERVED_MASK 0xffffffff /* reserved for future use mask */ + +#endif /* _bcmusb_h_ */ diff --git a/external/cache/sources/wl/include/bcmutils.h b/external/cache/sources/wl/include/bcmutils.h new file mode 100644 index 0000000..3213d5e --- /dev/null +++ b/external/cache/sources/wl/include/bcmutils.h @@ -0,0 +1,971 @@ +/* + * Misc useful os-independent macros and functions. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmutils.h 409286 2013-06-24 22:03:30Z stafford $ + */ + +#ifndef _bcmutils_h_ +#define _bcmutils_h_ + +#if defined(UNDER_CE) +#include +#else +#define bcm_strcpy_s(dst, noOfElements, src) strcpy((dst), (src)) +#define bcm_strncpy_s(dst, noOfElements, src, count) strncpy((dst), (src), (count)) +#define bcm_strcat_s(dst, noOfElements, src) strcat((dst), (src)) +#endif + +#ifdef __cplusplus +extern "C" { +#endif + +#ifdef PKTQ_LOG +#include +#endif + +/* ctype replacement */ +#define _BCM_U 0x01 /* upper */ +#define _BCM_L 0x02 /* lower */ +#define _BCM_D 0x04 /* digit */ +#define _BCM_C 0x08 /* cntrl */ +#define _BCM_P 0x10 /* punct */ +#define _BCM_S 0x20 /* white space (space/lf/tab) */ +#define _BCM_X 0x40 /* hex digit */ +#define _BCM_SP 0x80 /* hard space (0x20) */ + +#if defined(BCMROMBUILD) +extern const unsigned char BCMROMDATA(bcm_ctype)[]; +#else +extern const unsigned char bcm_ctype[]; +#endif +#define bcm_ismask(x) (bcm_ctype[(int)(unsigned char)(x)]) + +#define bcm_isalnum(c) ((bcm_ismask(c)&(_BCM_U|_BCM_L|_BCM_D)) != 0) +#define bcm_isalpha(c) ((bcm_ismask(c)&(_BCM_U|_BCM_L)) != 0) +#define bcm_iscntrl(c) ((bcm_ismask(c)&(_BCM_C)) != 0) +#define bcm_isdigit(c) ((bcm_ismask(c)&(_BCM_D)) != 0) +#define bcm_isgraph(c) ((bcm_ismask(c)&(_BCM_P|_BCM_U|_BCM_L|_BCM_D)) != 0) +#define bcm_islower(c) ((bcm_ismask(c)&(_BCM_L)) != 0) +#define bcm_isprint(c) ((bcm_ismask(c)&(_BCM_P|_BCM_U|_BCM_L|_BCM_D|_BCM_SP)) != 0) +#define bcm_ispunct(c) ((bcm_ismask(c)&(_BCM_P)) != 0) +#define bcm_isspace(c) ((bcm_ismask(c)&(_BCM_S)) != 0) +#define bcm_isupper(c) ((bcm_ismask(c)&(_BCM_U)) != 0) +#define bcm_isxdigit(c) ((bcm_ismask(c)&(_BCM_D|_BCM_X)) != 0) +#define bcm_tolower(c) (bcm_isupper((c)) ? ((c) + 'a' - 'A') : (c)) +#define bcm_toupper(c) (bcm_islower((c)) ? ((c) + 'A' - 'a') : (c)) + +/* Buffer structure for collecting string-formatted data +* using bcm_bprintf() API. +* Use bcm_binit() to initialize before use +*/ + +struct bcmstrbuf { + char *buf; /* pointer to current position in origbuf */ + unsigned int size; /* current (residual) size in bytes */ + char *origbuf; /* unmodified pointer to orignal buffer */ + unsigned int origsize; /* unmodified orignal buffer size in bytes */ +}; + +/* ** driver-only section ** */ +#ifdef BCMDRIVER +#ifdef EFI +/* forward declare structyre type */ +struct spktq; +#endif +#include + +#define GPIO_PIN_NOTDEFINED 0x20 /* Pin not defined */ + +/* + * Spin at most 'us' microseconds while 'exp' is true. + * Caller should explicitly test 'exp' when this completes + * and take appropriate error action if 'exp' is still true. + */ +#ifdef MACOSX +#define SPINWAIT_POLL_PERIOD 20 +#else +#define SPINWAIT_POLL_PERIOD 10 +#endif + +#define SPINWAIT(exp, us) { \ + uint countdown = (us) + (SPINWAIT_POLL_PERIOD - 1); \ + while ((exp) && (countdown >= SPINWAIT_POLL_PERIOD)) {\ + OSL_DELAY(SPINWAIT_POLL_PERIOD); \ + countdown -= SPINWAIT_POLL_PERIOD; \ + } \ +} + +/* osl multi-precedence packet queue */ +#define PKTQ_LEN_MAX 0xFFFF /* Max uint16 65535 packets */ +#ifndef PKTQ_LEN_DEFAULT +#define PKTQ_LEN_DEFAULT 128 /* Max 128 packets */ +#endif +#ifndef PKTQ_MAX_PREC +#define PKTQ_MAX_PREC 16 /* Maximum precedence levels */ +#endif + +typedef struct pktq_prec { + void *head; /* first packet to dequeue */ + void *tail; /* last packet to dequeue */ + uint16 len; /* number of queued packets */ + uint16 max; /* maximum number of queued packets */ +} pktq_prec_t; + +#ifdef PKTQ_LOG +typedef struct { + uint32 requested; /* packets requested to be stored */ + uint32 stored; /* packets stored */ + uint32 saved; /* packets saved, + because a lowest priority queue has given away one packet + */ + uint32 selfsaved; /* packets saved, + because an older packet from the same queue has been dropped + */ + uint32 full_dropped; /* packets dropped, + because pktq is full with higher precedence packets + */ + uint32 dropped; /* packets dropped because pktq per that precedence is full */ + uint32 sacrificed; /* packets dropped, + in order to save one from a queue of a highest priority + */ + uint32 busy; /* packets droped because of hardware/transmission error */ + uint32 retry; /* packets re-sent because they were not received */ + uint32 ps_retry; /* packets retried again prior to moving power save mode */ + uint32 suppress; /* packets which were suppressed and not transmitted */ + uint32 retry_drop; /* packets finally dropped after retry limit */ + uint32 max_avail; /* the high-water mark of the queue capacity for packets - + goes to zero as queue fills + */ + uint32 max_used; /* the high-water mark of the queue utilisation for packets - + increases with use ('inverse' of max_avail) + */ + uint32 queue_capacity; /* the maximum capacity of the queue */ + uint32 rtsfail; /* count of rts attempts that failed to receive cts */ + uint32 acked; /* count of packets sent (acked) successfully */ + uint32 txrate_succ; /* running total of phy rate of packets sent successfully */ + uint32 txrate_main; /* running totoal of primary phy rate of all packets */ + uint32 throughput; /* actual data transferred successfully */ + uint32 _logtime; /* timestamp of last counter clear */ +} pktq_counters_t; + +typedef struct { + uint32 _prec_log; + pktq_counters_t* _prec_cnt[PKTQ_MAX_PREC]; /* Counters per queue */ +} pktq_log_t; +#endif /* PKTQ_LOG */ + + +#define PKTQ_COMMON \ + uint16 num_prec; /* number of precedences in use */ \ + uint16 hi_prec; /* rapid dequeue hint (>= highest non-empty prec) */ \ + uint16 max; /* total max packets */ \ + uint16 len; /* total number of packets */ + +/* multi-priority pkt queue */ +struct pktq { + PKTQ_COMMON + /* q array must be last since # of elements can be either PKTQ_MAX_PREC or 1 */ + struct pktq_prec q[PKTQ_MAX_PREC]; +#ifdef PKTQ_LOG + pktq_log_t* pktqlog; +#endif +}; + +/* simple, non-priority pkt queue */ +struct spktq { + PKTQ_COMMON + /* q array must be last since # of elements can be either PKTQ_MAX_PREC or 1 */ + struct pktq_prec q[1]; +}; + +#define PKTQ_PREC_ITER(pq, prec) for (prec = (pq)->num_prec - 1; prec >= 0; prec--) + +/* fn(pkt, arg). return true if pkt belongs to if */ +typedef bool (*ifpkt_cb_t)(void*, int); + +#ifdef BCMPKTPOOL +#define POOL_ENAB(pool) ((pool) && (pool)->inited) +#if defined(BCM4329C0) +#define SHARED_POOL (pktpool_shared_ptr) +#else +#define SHARED_POOL (pktpool_shared) +#endif /* BCM4329C0 */ +#else /* BCMPKTPOOL */ +#define POOL_ENAB(bus) 0 +#define SHARED_POOL ((struct pktpool *)NULL) +#endif /* BCMPKTPOOL */ + +#ifndef PKTPOOL_LEN_MAX +#define PKTPOOL_LEN_MAX 40 +#endif /* PKTPOOL_LEN_MAX */ +#define PKTPOOL_CB_MAX 3 + +struct pktpool; +typedef void (*pktpool_cb_t)(struct pktpool *pool, void *arg); +typedef struct { + pktpool_cb_t cb; + void *arg; +} pktpool_cbinfo_t; + +#ifdef BCMDBG_POOL +/* pkt pool debug states */ +#define POOL_IDLE 0 +#define POOL_RXFILL 1 +#define POOL_RXDH 2 +#define POOL_RXD11 3 +#define POOL_TXDH 4 +#define POOL_TXD11 5 +#define POOL_AMPDU 6 +#define POOL_TXENQ 7 + +typedef struct { + void *p; + uint32 cycles; + uint32 dur; +} pktpool_dbg_t; + +typedef struct { + uint8 txdh; /* tx to host */ + uint8 txd11; /* tx to d11 */ + uint8 enq; /* waiting in q */ + uint8 rxdh; /* rx from host */ + uint8 rxd11; /* rx from d11 */ + uint8 rxfill; /* dma_rxfill */ + uint8 idle; /* avail in pool */ +} pktpool_stats_t; +#endif /* BCMDBG_POOL */ + +typedef struct pktpool { + bool inited; + uint16 r; + uint16 w; + uint16 len; + uint16 maxlen; + uint16 plen; + bool istx; + bool empty; + uint8 cbtoggle; + uint8 cbcnt; + uint8 ecbcnt; + bool emptycb_disable; + pktpool_cbinfo_t *availcb_excl; + pktpool_cbinfo_t cbs[PKTPOOL_CB_MAX]; + pktpool_cbinfo_t ecbs[PKTPOOL_CB_MAX]; + void *q[PKTPOOL_LEN_MAX + 1]; + +#ifdef BCMDBG_POOL + uint8 dbg_cbcnt; + pktpool_cbinfo_t dbg_cbs[PKTPOOL_CB_MAX]; + uint16 dbg_qlen; + pktpool_dbg_t dbg_q[PKTPOOL_LEN_MAX + 1]; +#endif +} pktpool_t; + +#if defined(BCM4329C0) +extern pktpool_t *pktpool_shared_ptr; +#else +extern pktpool_t *pktpool_shared; +#endif /* BCM4329C0 */ + +extern int pktpool_init(osl_t *osh, pktpool_t *pktp, int *pktplen, int plen, bool istx); +extern int pktpool_deinit(osl_t *osh, pktpool_t *pktp); +extern int pktpool_fill(osl_t *osh, pktpool_t *pktp, bool minimal); +extern void* pktpool_get(pktpool_t *pktp); +extern void pktpool_free(pktpool_t *pktp, void *p); +extern int pktpool_add(pktpool_t *pktp, void *p); +extern uint16 pktpool_avail(pktpool_t *pktp); +extern int pktpool_avail_notify_normal(osl_t *osh, pktpool_t *pktp); +extern int pktpool_avail_notify_exclusive(osl_t *osh, pktpool_t *pktp, pktpool_cb_t cb); +extern int pktpool_avail_register(pktpool_t *pktp, pktpool_cb_t cb, void *arg); +extern int pktpool_empty_register(pktpool_t *pktp, pktpool_cb_t cb, void *arg); +extern int pktpool_setmaxlen(pktpool_t *pktp, uint16 maxlen); +extern int pktpool_setmaxlen_strict(osl_t *osh, pktpool_t *pktp, uint16 maxlen); +extern void pktpool_emptycb_disable(pktpool_t *pktp, bool disable); +extern bool pktpool_emptycb_disabled(pktpool_t *pktp); + +#define POOLPTR(pp) ((pktpool_t *)(pp)) +#define pktpool_len(pp) (POOLPTR(pp)->len - 1) +#define pktpool_plen(pp) (POOLPTR(pp)->plen) +#define pktpool_maxlen(pp) (POOLPTR(pp)->maxlen) + +#ifdef BCMDBG_POOL +extern int pktpool_dbg_register(pktpool_t *pktp, pktpool_cb_t cb, void *arg); +extern int pktpool_start_trigger(pktpool_t *pktp, void *p); +extern int pktpool_dbg_dump(pktpool_t *pktp); +extern int pktpool_dbg_notify(pktpool_t *pktp); +extern int pktpool_stats_dump(pktpool_t *pktp, pktpool_stats_t *stats); +#endif /* BCMDBG_POOL */ + +/* forward definition of ether_addr structure used by some function prototypes */ + +struct ether_addr; + +extern int ether_isbcast(const void *ea); +extern int ether_isnulladdr(const void *ea); + +/* operations on a specific precedence in packet queue */ + +#define pktq_psetmax(pq, prec, _max) ((pq)->q[prec].max = (_max)) +#define pktq_pmax(pq, prec) ((pq)->q[prec].max) +#define pktq_plen(pq, prec) ((pq)->q[prec].len) +#define pktq_pavail(pq, prec) ((pq)->q[prec].max - (pq)->q[prec].len) +#define pktq_pfull(pq, prec) ((pq)->q[prec].len >= (pq)->q[prec].max) +#define pktq_pempty(pq, prec) ((pq)->q[prec].len == 0) + +#define pktq_ppeek(pq, prec) ((pq)->q[prec].head) +#define pktq_ppeek_tail(pq, prec) ((pq)->q[prec].tail) + +extern void *pktq_penq(struct pktq *pq, int prec, void *p); +extern void *pktq_penq_head(struct pktq *pq, int prec, void *p); +extern void *pktq_pdeq(struct pktq *pq, int prec); +extern void *pktq_pdeq_prev(struct pktq *pq, int prec, void *prev_p); +extern void *pktq_pdeq_tail(struct pktq *pq, int prec); +/* Empty the queue at particular precedence level */ +extern void pktq_pflush(osl_t *osh, struct pktq *pq, int prec, bool dir, + ifpkt_cb_t fn, int arg); +/* Remove a specified packet from its queue */ +extern bool pktq_pdel(struct pktq *pq, void *p, int prec); + +/* operations on a set of precedences in packet queue */ + +extern int pktq_mlen(struct pktq *pq, uint prec_bmp); +extern void *pktq_mdeq(struct pktq *pq, uint prec_bmp, int *prec_out); +extern void *pktq_mpeek(struct pktq *pq, uint prec_bmp, int *prec_out); + +/* operations on packet queue as a whole */ + +#define pktq_len(pq) ((int)(pq)->len) +#define pktq_max(pq) ((int)(pq)->max) +#define pktq_avail(pq) ((int)((pq)->max - (pq)->len)) +#define pktq_full(pq) ((pq)->len >= (pq)->max) +#define pktq_empty(pq) ((pq)->len == 0) + +/* operations for single precedence queues */ +#define pktenq(pq, p) pktq_penq(((struct pktq *)(void *)pq), 0, (p)) +#define pktenq_head(pq, p) pktq_penq_head(((struct pktq *)(void *)pq), 0, (p)) +#define pktdeq(pq) pktq_pdeq(((struct pktq *)(void *)pq), 0) +#define pktdeq_tail(pq) pktq_pdeq_tail(((struct pktq *)(void *)pq), 0) +#define pktqinit(pq, len) pktq_init(((struct pktq *)(void *)pq), 1, len) + +extern void pktq_init(struct pktq *pq, int num_prec, int max_len); +extern void pktq_set_max_plen(struct pktq *pq, int prec, int max_len); + +/* prec_out may be NULL if caller is not interested in return value */ +extern void *pktq_deq(struct pktq *pq, int *prec_out); +extern void *pktq_deq_tail(struct pktq *pq, int *prec_out); +extern void *pktq_peek(struct pktq *pq, int *prec_out); +extern void *pktq_peek_tail(struct pktq *pq, int *prec_out); +extern void pktq_flush(osl_t *osh, struct pktq *pq, bool dir, ifpkt_cb_t fn, int arg); + +/* externs */ +/* packet */ +extern uint pktcopy(osl_t *osh, void *p, uint offset, int len, uchar *buf); +extern uint pktfrombuf(osl_t *osh, void *p, uint offset, int len, uchar *buf); +extern uint pkttotlen(osl_t *osh, void *p); +extern void *pktlast(osl_t *osh, void *p); +extern uint pktsegcnt(osl_t *osh, void *p); +extern uint pktsegcnt_war(osl_t *osh, void *p); +extern uint8 *pktdataoffset(osl_t *osh, void *p, uint offset); +extern void *pktoffset(osl_t *osh, void *p, uint offset); + +/* Get priority from a packet and pass it back in scb (or equiv) */ +#define PKTPRIO_VDSCP 0x100 /* DSCP prio found after VLAN tag */ +#define PKTPRIO_VLAN 0x200 /* VLAN prio found */ +#define PKTPRIO_UPD 0x400 /* DSCP used to update VLAN prio */ +#define PKTPRIO_DSCP 0x800 /* DSCP prio found */ + +extern uint pktsetprio(void *pkt, bool update_vtag); + +/* string */ +extern int BCMROMFN(bcm_atoi)(const char *s); +extern ulong BCMROMFN(bcm_strtoul)(const char *cp, char **endp, uint base); +extern char *BCMROMFN(bcmstrstr)(const char *haystack, const char *needle); +extern char *BCMROMFN(bcmstrcat)(char *dest, const char *src); +extern char *BCMROMFN(bcmstrncat)(char *dest, const char *src, uint size); +extern ulong wchar2ascii(char *abuf, ushort *wbuf, ushort wbuflen, ulong abuflen); +char* bcmstrtok(char **string, const char *delimiters, char *tokdelim); +int bcmstricmp(const char *s1, const char *s2); +int bcmstrnicmp(const char* s1, const char* s2, int cnt); + + +/* ethernet address */ +extern char *bcm_ether_ntoa(const struct ether_addr *ea, char *buf); +extern int BCMROMFN(bcm_ether_atoe)(const char *p, struct ether_addr *ea); + +/* ip address */ +struct ipv4_addr; +extern char *bcm_ip_ntoa(struct ipv4_addr *ia, char *buf); +extern char *bcm_ipv6_ntoa(void *ipv6, char *buf); + +/* delay */ +extern void bcm_mdelay(uint ms); +/* variable access */ +#if defined (DONGLEBUILD) && !defined(WLTEST) && !defined (BCMINTERNAL) && !defined(BCMDBG_DUMP) +#ifdef BCMDBG +#define NVRAM_RECLAIM_CHECK(name) \ + if (attach_part_reclaimed == TRUE) { \ + printf("%s: NVRAM already reclaimed, %s\n", __FUNCTION__, (name)); \ + *(char*) 0 = 0; /* TRAP */ \ + return NULL; \ + } +#else /* BCMDBG */ +#define NVRAM_RECLAIM_CHECK(name) \ + if (attach_part_reclaimed == TRUE) { \ + *(char*) 0 = 0; /* TRAP */ \ + return NULL; \ + } +#endif /* BCMDBG */ +#else /* DONGLEBUILD && !WLTEST && !BCMINTERNAL && !BCMDBG_DUMP */ +#define NVRAM_RECLAIM_CHECK(name) +#endif /* DONGLEBUILD && !WLTEST && !BCMINTERNAL && !BCMDBG_DUMP */ + +extern char *getvar(char *vars, const char *name); +extern int getintvar(char *vars, const char *name); +extern int getintvararray(char *vars, const char *name, int index); +extern int getintvararraysize(char *vars, const char *name); +extern uint getgpiopin(char *vars, char *pin_name, uint def_pin); +#ifdef BCMDBG +extern void prpkt(const char *msg, osl_t *osh, void *p0); +#endif /* BCMDBG */ +#ifdef BCMPERFSTATS +extern void bcm_perf_enable(void); +extern void bcmstats(char *fmt); +extern void bcmlog(char *fmt, uint a1, uint a2); +extern void bcmdumplog(char *buf, int size); +extern int bcmdumplogent(char *buf, uint idx); +#else +#define bcm_perf_enable() +#define bcmstats(fmt) +#define bcmlog(fmt, a1, a2) +#define bcmdumplog(buf, size) *buf = '\0' +#define bcmdumplogent(buf, idx) -1 +#endif /* BCMPERFSTATS */ + +#define TSF_TICKS_PER_MS 1024 +#if defined(BCMTSTAMPEDLOGS) +/* Store a TSF timestamp and a log line in the log buffer */ +extern void bcmtslog(uint32 tstamp, char *fmt, uint a1, uint a2); +/* Print out the log buffer with timestamps */ +extern void bcmprinttslogs(void); +/* Print out a microsecond timestamp as "sec.ms.us " */ +extern void bcmprinttstamp(uint32 us); +/* Dump to buffer a microsecond timestamp as "sec.ms.us " */ +extern void bcmdumptslog(char *buf, int size); +#else +#define bcmtslog(tstamp, fmt, a1, a2) +#define bcmprinttslogs() +#define bcmprinttstamp(us) +#define bcmdumptslog(buf, size) +#endif /* BCMTSTAMPEDLOGS */ + +extern char *bcm_nvram_vars(uint *length); +extern int bcm_nvram_cache(void *sih); + +/* Support for sharing code across in-driver iovar implementations. + * The intent is that a driver use this structure to map iovar names + * to its (private) iovar identifiers, and the lookup function to + * find the entry. Macros are provided to map ids and get/set actions + * into a single number space for a switch statement. + */ + +/* iovar structure */ +typedef struct bcm_iovar { + const char *name; /* name for lookup and display */ + uint16 varid; /* id for switch */ + uint16 flags; /* driver-specific flag bits */ + uint16 type; /* base type of argument */ + uint16 minlen; /* min length for buffer vars */ +} bcm_iovar_t; + +/* varid definitions are per-driver, may use these get/set bits */ + +/* IOVar action bits for id mapping */ +#define IOV_GET 0 /* Get an iovar */ +#define IOV_SET 1 /* Set an iovar */ + +/* Varid to actionid mapping */ +#define IOV_GVAL(id) ((id) * 2) +#define IOV_SVAL(id) ((id) * 2 + IOV_SET) +#define IOV_ISSET(actionid) ((actionid & IOV_SET) == IOV_SET) +#define IOV_ID(actionid) (actionid >> 1) + +/* flags are per-driver based on driver attributes */ + +extern const bcm_iovar_t *bcm_iovar_lookup(const bcm_iovar_t *table, const char *name); +extern int bcm_iovar_lencheck(const bcm_iovar_t *table, void *arg, int len, bool set); +#if defined(WLTINYDUMP) || defined(BCMDBG) || defined(WLMSG_INFORM) || \ + defined(WLMSG_ASSOC) || defined(WLMSG_PRPKT) || defined(WLMSG_WSEC) +extern int bcm_format_ssid(char* buf, const uchar ssid[], uint ssid_len); +#endif /* WLTINYDUMP || BCMDBG || WLMSG_INFORM || WLMSG_ASSOC || WLMSG_PRPKT */ +#endif /* BCMDRIVER */ + +/* Base type definitions */ +#define IOVT_VOID 0 /* no value (implictly set only) */ +#define IOVT_BOOL 1 /* any value ok (zero/nonzero) */ +#define IOVT_INT8 2 /* integer values are range-checked */ +#define IOVT_UINT8 3 /* unsigned int 8 bits */ +#define IOVT_INT16 4 /* int 16 bits */ +#define IOVT_UINT16 5 /* unsigned int 16 bits */ +#define IOVT_INT32 6 /* int 32 bits */ +#define IOVT_UINT32 7 /* unsigned int 32 bits */ +#define IOVT_BUFFER 8 /* buffer is size-checked as per minlen */ +#define BCM_IOVT_VALID(type) (((unsigned int)(type)) <= IOVT_BUFFER) + +/* Initializer for IOV type strings */ +#define BCM_IOV_TYPE_INIT { \ + "void", \ + "bool", \ + "int8", \ + "uint8", \ + "int16", \ + "uint16", \ + "int32", \ + "uint32", \ + "buffer", \ + "" } + +#define BCM_IOVT_IS_INT(type) (\ + (type == IOVT_BOOL) || \ + (type == IOVT_INT8) || \ + (type == IOVT_UINT8) || \ + (type == IOVT_INT16) || \ + (type == IOVT_UINT16) || \ + (type == IOVT_INT32) || \ + (type == IOVT_UINT32)) + +/* ** driver/apps-shared section ** */ + +#define BCME_STRLEN 64 /* Max string length for BCM errors */ +#define VALID_BCMERROR(e) ((e <= 0) && (e >= BCME_LAST)) + + +/* + * error codes could be added but the defined ones shouldn't be changed/deleted + * these error codes are exposed to the user code + * when ever a new error code is added to this list + * please update errorstring table with the related error string and + * update osl files with os specific errorcode map +*/ + +#define BCME_OK 0 /* Success */ +#define BCME_ERROR -1 /* Error generic */ +#define BCME_BADARG -2 /* Bad Argument */ +#define BCME_BADOPTION -3 /* Bad option */ +#define BCME_NOTUP -4 /* Not up */ +#define BCME_NOTDOWN -5 /* Not down */ +#define BCME_NOTAP -6 /* Not AP */ +#define BCME_NOTSTA -7 /* Not STA */ +#define BCME_BADKEYIDX -8 /* BAD Key Index */ +#define BCME_RADIOOFF -9 /* Radio Off */ +#define BCME_NOTBANDLOCKED -10 /* Not band locked */ +#define BCME_NOCLK -11 /* No Clock */ +#define BCME_BADRATESET -12 /* BAD Rate valueset */ +#define BCME_BADBAND -13 /* BAD Band */ +#define BCME_BUFTOOSHORT -14 /* Buffer too short */ +#define BCME_BUFTOOLONG -15 /* Buffer too long */ +#define BCME_BUSY -16 /* Busy */ +#define BCME_NOTASSOCIATED -17 /* Not Associated */ +#define BCME_BADSSIDLEN -18 /* Bad SSID len */ +#define BCME_OUTOFRANGECHAN -19 /* Out of Range Channel */ +#define BCME_BADCHAN -20 /* Bad Channel */ +#define BCME_BADADDR -21 /* Bad Address */ +#define BCME_NORESOURCE -22 /* Not Enough Resources */ +#define BCME_UNSUPPORTED -23 /* Unsupported */ +#define BCME_BADLEN -24 /* Bad length */ +#define BCME_NOTREADY -25 /* Not Ready */ +#define BCME_EPERM -26 /* Not Permitted */ +#define BCME_NOMEM -27 /* No Memory */ +#define BCME_ASSOCIATED -28 /* Associated */ +#define BCME_RANGE -29 /* Not In Range */ +#define BCME_NOTFOUND -30 /* Not Found */ +#define BCME_WME_NOT_ENABLED -31 /* WME Not Enabled */ +#define BCME_TSPEC_NOTFOUND -32 /* TSPEC Not Found */ +#define BCME_ACM_NOTSUPPORTED -33 /* ACM Not Supported */ +#define BCME_NOT_WME_ASSOCIATION -34 /* Not WME Association */ +#define BCME_SDIO_ERROR -35 /* SDIO Bus Error */ +#define BCME_DONGLE_DOWN -36 /* Dongle Not Accessible */ +#define BCME_VERSION -37 /* Incorrect version */ +#define BCME_TXFAIL -38 /* TX failure */ +#define BCME_RXFAIL -39 /* RX failure */ +#define BCME_NODEVICE -40 /* Device not present */ +#define BCME_NMODE_DISABLED -41 /* NMODE disabled */ +#define BCME_NONRESIDENT -42 /* access to nonresident overlay */ +#define BCME_SCANREJECT -43 /* reject scan request */ +/* Leave gap between -44 and -46 to synchronize with trunk. */ +#define BCME_DISABLED -47 /* Disabled in this build */ +#define BCME_LAST BCME_DISABLED + +/* These are collection of BCME Error strings */ +#define BCMERRSTRINGTABLE { \ + "OK", \ + "Undefined error", \ + "Bad Argument", \ + "Bad Option", \ + "Not up", \ + "Not down", \ + "Not AP", \ + "Not STA", \ + "Bad Key Index", \ + "Radio Off", \ + "Not band locked", \ + "No clock", \ + "Bad Rate valueset", \ + "Bad Band", \ + "Buffer too short", \ + "Buffer too long", \ + "Busy", \ + "Not Associated", \ + "Bad SSID len", \ + "Out of Range Channel", \ + "Bad Channel", \ + "Bad Address", \ + "Not Enough Resources", \ + "Unsupported", \ + "Bad length", \ + "Not Ready", \ + "Not Permitted", \ + "No Memory", \ + "Associated", \ + "Not In Range", \ + "Not Found", \ + "WME Not Enabled", \ + "TSPEC Not Found", \ + "ACM Not Supported", \ + "Not WME Association", \ + "SDIO Bus Error", \ + "Dongle Not Accessible", \ + "Incorrect version", \ + "TX Failure", \ + "RX Failure", \ + "Device Not Present", \ + "NMODE Disabled", \ + "Nonresident overlay access", \ + "Scan Rejected", \ + "unused", \ + "unused", \ + "unused", \ + "Disabled", \ +} + +#ifndef ABS +#define ABS(a) (((a) < 0) ? -(a) : (a)) +#endif /* ABS */ + +#ifndef MIN +#define MIN(a, b) (((a) < (b)) ? (a) : (b)) +#endif /* MIN */ + +#ifndef MAX +#define MAX(a, b) (((a) > (b)) ? (a) : (b)) +#endif /* MAX */ + +/* limit to [min, max] */ +#ifndef LIMIT_TO_RANGE +#define LIMIT_TO_RANGE(x, min, max) \ + ((x) < (min) ? (min) : ((x) > (max) ? (max) : (x))) +#endif /* LIMIT_TO_RANGE */ + +/* limit to max */ +#ifndef LIMIT_TO_MAX +#define LIMIT_TO_MAX(x, max) \ + (((x) > (max) ? (max) : (x))) +#endif /* LIMIT_TO_MAX */ + +/* limit to min */ +#ifndef LIMIT_TO_MIN +#define LIMIT_TO_MIN(x, min) \ + (((x) < (min) ? (min) : (x))) +#endif /* LIMIT_TO_MIN */ + +#define CEIL(x, y) (((x) + ((y) - 1)) / (y)) +#define ROUNDUP(x, y) ((((x) + ((y) - 1)) / (y)) * (y)) +#define ISALIGNED(a, x) (((uintptr)(a) & ((x) - 1)) == 0) +#define ALIGN_ADDR(addr, boundary) (void *)(((uintptr)(addr) + (boundary) - 1) \ + & ~((boundary) - 1)) +#define ALIGN_SIZE(size, boundary) (((size) + (boundary) - 1) \ + & ~((boundary) - 1)) +#define ISPOWEROF2(x) ((((x) - 1) & (x)) == 0) +#define VALID_MASK(mask) !((mask) & ((mask) + 1)) + +#ifndef OFFSETOF +#ifdef __ARMCC_VERSION +/* + * The ARM RVCT compiler complains when using OFFSETOF where a constant + * expression is expected, such as an initializer for a static object. + * offsetof from the runtime library doesn't have that problem. + */ +#include +#define OFFSETOF(type, member) offsetof(type, member) +#elif __GNUC__ >= 4 +/* New versions of GCC are also complaining if the usual macro is used */ +#define OFFSETOF(type, member) __builtin_offsetof(type, member) +#else +#define OFFSETOF(type, member) ((uint)(uintptr)&((type *)0)->member) +#endif /* __ARMCC_VERSION */ +#endif /* OFFSETOF */ + +#ifndef ARRAYSIZE +#define ARRAYSIZE(a) (sizeof(a) / sizeof(a[0])) +#endif + +/* Reference a function; used to prevent a static function from being optimized out */ +extern void *_bcmutils_dummy_fn; +#define REFERENCE_FUNCTION(f) (_bcmutils_dummy_fn = (void *)(f)) + +#if defined(__NetBSD__) +/* use internal + * setbit/clrbit since it has a cast and netbsd Xbit funcs dont + * and the wl driver doesnt cast. this results in us offsetting + * incorrectly and corrupting memory. + */ +#ifdef setbit +#undef setbit +#undef clrbit +#undef isset +#undef isclr +#undef NBBY +#endif +#endif /* __NetBSD__ */ + +/* bit map related macros */ +#ifndef setbit +#ifndef NBBY /* the BSD family defines NBBY */ +#define NBBY 8 /* 8 bits per byte */ +#endif /* #ifndef NBBY */ +#define setbit(a, i) (((uint8 *)a)[(i) / NBBY] |= 1 << ((i) % NBBY)) +#define clrbit(a, i) (((uint8 *)a)[(i) / NBBY] &= ~(1 << ((i) % NBBY))) +#define isset(a, i) (((const uint8 *)a)[(i) / NBBY] & (1 << ((i) % NBBY))) +#define isclr(a, i) ((((const uint8 *)a)[(i) / NBBY] & (1 << ((i) % NBBY))) == 0) +#endif /* setbit */ + +#define isbitset(a, i) (((a) & (1 << (i))) != 0) + +#define NBITS(type) (sizeof(type) * 8) +#define NBITVAL(nbits) (1 << (nbits)) +#define MAXBITVAL(nbits) ((1 << (nbits)) - 1) +#define NBITMASK(nbits) MAXBITVAL(nbits) +#define MAXNBVAL(nbyte) MAXBITVAL((nbyte) * 8) + +/* basic mux operation - can be optimized on several architectures */ +#define MUX(pred, true, false) ((pred) ? (true) : (false)) + +/* modulo inc/dec - assumes x E [0, bound - 1] */ +#define MODDEC(x, bound) MUX((x) == 0, (bound) - 1, (x) - 1) +#define MODINC(x, bound) MUX((x) == (bound) - 1, 0, (x) + 1) + +/* modulo inc/dec, bound = 2^k */ +#define MODDEC_POW2(x, bound) (((x) - 1) & ((bound) - 1)) +#define MODINC_POW2(x, bound) (((x) + 1) & ((bound) - 1)) + +/* modulo add/sub - assumes x, y E [0, bound - 1] */ +#define MODADD(x, y, bound) \ + MUX((x) + (y) >= (bound), (x) + (y) - (bound), (x) + (y)) +#define MODSUB(x, y, bound) \ + MUX(((int)(x)) - ((int)(y)) < 0, (x) - (y) + (bound), (x) - (y)) + +/* module add/sub, bound = 2^k */ +#define MODADD_POW2(x, y, bound) (((x) + (y)) & ((bound) - 1)) +#define MODSUB_POW2(x, y, bound) (((x) - (y)) & ((bound) - 1)) + +/* crc defines */ +#define CRC8_INIT_VALUE 0xff /* Initial CRC8 checksum value */ +#define CRC8_GOOD_VALUE 0x9f /* Good final CRC8 checksum value */ +#define CRC16_INIT_VALUE 0xffff /* Initial CRC16 checksum value */ +#define CRC16_GOOD_VALUE 0xf0b8 /* Good final CRC16 checksum value */ +#define CRC32_INIT_VALUE 0xffffffff /* Initial CRC32 checksum value */ +#define CRC32_GOOD_VALUE 0xdebb20e3 /* Good final CRC32 checksum value */ + +/* use for direct output of MAC address in printf etc */ +#define MACF "%02x:%02x:%02x:%02x:%02x:%02x" +#define ETHERP_TO_MACF(ea) ((struct ether_addr *) (ea))->octet[0], \ + ((struct ether_addr *) (ea))->octet[1], \ + ((struct ether_addr *) (ea))->octet[2], \ + ((struct ether_addr *) (ea))->octet[3], \ + ((struct ether_addr *) (ea))->octet[4], \ + ((struct ether_addr *) (ea))->octet[5] + +#define ETHER_TO_MACF(ea) (ea).octet[0], \ + (ea).octet[1], \ + (ea).octet[2], \ + (ea).octet[3], \ + (ea).octet[4], \ + (ea).octet[5] + +/* bcm_format_flags() bit description structure */ +typedef struct bcm_bit_desc { + uint32 bit; + const char* name; +} bcm_bit_desc_t; + +/* bcm_format_field */ +typedef struct bcm_bit_desc_ex { + uint32 mask; + const bcm_bit_desc_t *bitfield; +} bcm_bit_desc_ex_t; + + +/* tag_ID/length/value_buffer tuple */ +typedef struct bcm_tlv { + uint8 id; + uint8 len; + uint8 data[1]; +} bcm_tlv_t; + +/* Check that bcm_tlv_t fits into the given buflen */ +#define bcm_valid_tlv(elt, buflen) ((buflen) >= 2 && (int)(buflen) >= (int)(2 + (elt)->len)) + +/* buffer length for ethernet address from bcm_ether_ntoa() */ +#define ETHER_ADDR_STR_LEN 18 /* 18-bytes of Ethernet address buffer length */ + +/* crypto utility function */ +/* 128-bit xor: *dst = *src1 xor *src2. dst1, src1 and src2 may have any alignment */ +static INLINE void +xor_128bit_block(const uint8 *src1, const uint8 *src2, uint8 *dst) +{ + if ( +#ifdef __i386__ + 1 || +#endif + (((uintptr)src1 | (uintptr)src2 | (uintptr)dst) & 3) == 0) { + /* ARM CM3 rel time: 1229 (727 if alignment check could be omitted) */ + /* x86 supports unaligned. This version runs 6x-9x faster on x86. */ + ((uint32 *)dst)[0] = ((const uint32 *)src1)[0] ^ ((const uint32 *)src2)[0]; + ((uint32 *)dst)[1] = ((const uint32 *)src1)[1] ^ ((const uint32 *)src2)[1]; + ((uint32 *)dst)[2] = ((const uint32 *)src1)[2] ^ ((const uint32 *)src2)[2]; + ((uint32 *)dst)[3] = ((const uint32 *)src1)[3] ^ ((const uint32 *)src2)[3]; + } else { + /* ARM CM3 rel time: 4668 (4191 if alignment check could be omitted) */ + int k; + for (k = 0; k < 16; k++) + dst[k] = src1[k] ^ src2[k]; + } +} + +/* externs */ +/* crc */ +extern uint8 BCMROMFN(hndcrc8)(uint8 *p, uint nbytes, uint8 crc); +extern uint16 BCMROMFN(hndcrc16)(uint8 *p, uint nbytes, uint16 crc); +extern uint32 BCMROMFN(hndcrc32)(uint8 *p, uint nbytes, uint32 crc); + +/* format/print */ +#if defined(BCMDBG) || defined(DHD_DEBUG) || defined(BCMDBG_ERR) || defined(WLMSG_PRHDRS) || \ + defined(WLMSG_PRPKT) || defined(WLMSG_ASSOC) || defined(BCMDBG_DUMP) +/* print out the value a field has: fields may have 1-32 bits and may hold any value */ +extern int bcm_format_field(const bcm_bit_desc_ex_t *bd, uint32 field, char* buf, int len); +/* print out which bits in flags are set */ +extern int bcm_format_flags(const bcm_bit_desc_t *bd, uint32 flags, char* buf, int len); +#endif + +#if defined(BCMDBG) || defined(DHD_DEBUG) || defined(BCMDBG_ERR) || defined(WLMSG_PRHDRS) || \ + defined(WLMSG_PRPKT) || defined(WLMSG_ASSOC) || defined(BCMDBG_DUMP) || \ + defined(WLMEDIA_PEAKRATE) +extern int bcm_format_hex(char *str, const void *bytes, int len); +#endif + +#ifdef BCMDBG +extern void deadbeef(void *p, uint len); +#endif +extern const char *bcm_crypto_algo_name(uint algo); +extern char *bcm_chipname(uint chipid, char *buf, uint len); +extern char *bcm_brev_str(uint32 brev, char *buf); +extern void printbig(char *buf); +extern void prhex(const char *msg, uchar *buf, uint len); + +/* IE parsing */ +extern bcm_tlv_t *BCMROMFN(bcm_next_tlv)(bcm_tlv_t *elt, int *buflen); +extern bcm_tlv_t *BCMROMFN(bcm_parse_tlvs)(void *buf, int buflen, uint key); +extern bcm_tlv_t *BCMROMFN(bcm_parse_ordered_tlvs)(void *buf, int buflen, uint key); + +/* bcmerror */ +extern const char *bcmerrorstr(int bcmerror); +extern bcm_tlv_t *BCMROMFN(bcm_parse_tlvs)(void *buf, int buflen, uint key); + +/* multi-bool data type: set of bools, mbool is true if any is set */ +typedef uint32 mbool; +#define mboolset(mb, bit) ((mb) |= (bit)) /* set one bool */ +#define mboolclr(mb, bit) ((mb) &= ~(bit)) /* clear one bool */ +#define mboolisset(mb, bit) (((mb) & (bit)) != 0) /* TRUE if one bool is set */ +#define mboolmaskset(mb, mask, val) ((mb) = (((mb) & ~(mask)) | (val))) + +/* generic datastruct to help dump routines */ +struct fielddesc { + const char *nameandfmt; + uint32 offset; + uint32 len; +}; + +extern void bcm_binit(struct bcmstrbuf *b, char *buf, uint size); +extern void bcm_bprhex(struct bcmstrbuf *b, const char *msg, bool newline, uint8 *buf, int len); + +extern void bcm_inc_bytes(uchar *num, int num_bytes, uint8 amount); +extern int bcm_cmp_bytes(const uchar *arg1, const uchar *arg2, uint8 nbytes); +extern void bcm_print_bytes(const char *name, const uchar *cdata, int len); + +typedef uint32 (*bcmutl_rdreg_rtn)(void *arg0, uint arg1, uint32 offset); +extern uint bcmdumpfields(bcmutl_rdreg_rtn func_ptr, void *arg0, uint arg1, struct fielddesc *str, + char *buf, uint32 bufsize); +extern uint BCMROMFN(bcm_bitcount)(uint8 *bitmap, uint bytelength); + +extern int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...); + +/* power conversion */ +extern uint16 BCMROMFN(bcm_qdbm_to_mw)(uint8 qdbm); +extern uint8 BCMROMFN(bcm_mw_to_qdbm)(uint16 mw); +extern uint bcm_mkiovar(char *name, char *data, uint datalen, char *buf, uint len); + +#ifdef BCMDBG_PKT /* pkt logging for debugging */ +#define PKTLIST_SIZE 3000 + +#ifdef BCMDBG_PTRACE +#define PKTTRACE_MAX_BYTES 12 +#define PKTTRACE_MAX_BITS (PKTTRACE_MAX_BYTES * NBBY) + +enum pkttrace_info { + PKTLIST_PRECQ, /* Pkt in Prec Q */ + PKTLIST_FAIL_PRECQ, /* Pkt failed to Q in PRECQ */ + PKTLIST_DMAQ, /* Pkt in DMA Q */ + PKTLIST_MI_TFS_RCVD, /* Received TX status */ + PKTLIST_TXDONE, /* Pkt TX done */ + PKTLIST_TXFAIL, /* Pkt TX failed */ + PKTLIST_PKTFREE, /* pkt is freed */ + PKTLIST_PRECREQ, /* Pkt requeued in precq */ + PKTLIST_TXFIFO /* To trace in wlc_fifo */ +}; +#endif /* BCMDBG_PTRACE */ + +typedef struct pkt_dbginfo { + int line; + char *file; + void *pkt; +#ifdef BCMDBG_PTRACE + char pkt_trace[PKTTRACE_MAX_BYTES]; +#endif /* BCMDBG_PTRACE */ +} pkt_dbginfo_t; + +typedef struct { + pkt_dbginfo_t list[PKTLIST_SIZE]; /* List of pointers to packets */ + uint16 count; /* Total count of the packets */ +} pktlist_info_t; + + +extern void pktlist_add(pktlist_info_t *pktlist, void *p, int len, char *file); +extern void pktlist_remove(pktlist_info_t *pktlist, void *p); +extern char* pktlist_dump(pktlist_info_t *pktlist, char *buf); +#ifdef BCMDBG_PTRACE +extern void pktlist_trace(pktlist_info_t *pktlist, void *pkt, uint16 bit); +#endif /* BCMDBG_PTRACE */ +#endif /* BCMDBG_PKT */ +unsigned int process_nvram_vars(char *varbuf, unsigned int len); + +/* calculate a * b + c */ +extern void bcm_uint64_multiple_add(uint32* r_high, uint32* r_low, uint32 a, uint32 b, uint32 c); +/* calculate a / b */ +extern void bcm_uint64_divide(uint32* r, uint32 a_high, uint32 a_low, uint32 b); +/* calculate a >> b */ +void bcm_uint64_right_shift(uint32* r, uint32 a_high, uint32 a_low, uint32 b); +#ifdef __cplusplus + } +#endif +#endif /* _bcmutils_h_ */ diff --git a/external/cache/sources/wl/include/bcmwifi.h b/external/cache/sources/wl/include/bcmwifi.h new file mode 100644 index 0000000..8db72ea --- /dev/null +++ b/external/cache/sources/wl/include/bcmwifi.h @@ -0,0 +1,146 @@ +/* + * Misc utility routines for WL and Apps + * This header file housing the define and function prototype use by + * both the wl driver, tools & Apps. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmwifi.h 374015 2012-12-11 08:55:11Z maheshd $ + */ + +#ifndef _bcmwifi_h_ +#define _bcmwifi_h_ + + + +typedef uint16 chanspec_t; + + +#define CH_UPPER_SB 0x01 +#define CH_LOWER_SB 0x02 +#define CH_EWA_VALID 0x04 +#define CH_20MHZ_APART 4 +#define CH_10MHZ_APART 2 +#define CH_5MHZ_APART 1 +#define CH_MAX_2G_CHANNEL 14 +#define WLC_MAX_2G_CHANNEL CH_MAX_2G_CHANNEL +#define MAXCHANNEL 224 +#define CHSPEC_CTLOVLP(sp1, sp2, sep) \ + (ABS(wf_chspec_ctlchan(sp1) - wf_chspec_ctlchan(sp2)) < (sep)) + +#define WL_CHANSPEC_CHAN_MASK 0x00ff +#define WL_CHANSPEC_CHAN_SHIFT 0 + +#define WL_CHANSPEC_CTL_SB_MASK 0x0300 +#define WL_CHANSPEC_CTL_SB_SHIFT 8 +#define WL_CHANSPEC_CTL_SB_LOWER 0x0100 +#define WL_CHANSPEC_CTL_SB_UPPER 0x0200 +#define WL_CHANSPEC_CTL_SB_NONE 0x0300 + +#define WL_CHANSPEC_BW_MASK 0x0C00 +#define WL_CHANSPEC_BW_SHIFT 10 +#define WL_CHANSPEC_BW_10 0x0400 +#define WL_CHANSPEC_BW_20 0x0800 +#define WL_CHANSPEC_BW_40 0x0C00 + +#define WL_CHANSPEC_BAND_MASK 0xf000 +#define WL_CHANSPEC_BAND_SHIFT 12 +#define WL_CHANSPEC_BAND_5G 0x1000 +#define WL_CHANSPEC_BAND_2G 0x2000 +#define INVCHANSPEC 255 + + +#define WF_CHAN_FACTOR_2_4_G 4814 +#define WF_CHAN_FACTOR_5_G 10000 +#define WF_CHAN_FACTOR_4_G 8000 + + +#define LOWER_20_SB(channel) (((channel) > CH_10MHZ_APART) ? ((channel) - CH_10MHZ_APART) : 0) +#define UPPER_20_SB(channel) (((channel) < (MAXCHANNEL - CH_10MHZ_APART)) ? \ + ((channel) + CH_10MHZ_APART) : 0) +#define CHSPEC_WLCBANDUNIT(chspec) (CHSPEC_IS5G(chspec) ? BAND_5G_INDEX : BAND_2G_INDEX) +#define CH20MHZ_CHSPEC(channel) (chanspec_t)((chanspec_t)(channel) | WL_CHANSPEC_BW_20 | \ + WL_CHANSPEC_CTL_SB_NONE | (((channel) <= CH_MAX_2G_CHANNEL) ? \ + WL_CHANSPEC_BAND_2G : WL_CHANSPEC_BAND_5G)) +#define NEXT_20MHZ_CHAN(channel) (((channel) < (MAXCHANNEL - CH_20MHZ_APART)) ? \ + ((channel) + CH_20MHZ_APART) : 0) +#define CH40MHZ_CHSPEC(channel, ctlsb) (chanspec_t) \ + ((channel) | (ctlsb) | WL_CHANSPEC_BW_40 | \ + ((channel) <= CH_MAX_2G_CHANNEL ? WL_CHANSPEC_BAND_2G : \ + WL_CHANSPEC_BAND_5G)) +#define CHSPEC_CHANNEL(chspec) ((uint8)((chspec) & WL_CHANSPEC_CHAN_MASK)) +#define CHSPEC_BAND(chspec) ((chspec) & WL_CHANSPEC_BAND_MASK) + + +#define CHSPEC_CTL_SB(chspec) ((chspec) & WL_CHANSPEC_CTL_SB_MASK) +#define CHSPEC_BW(chspec) ((chspec) & WL_CHANSPEC_BW_MASK) + +#ifdef WL11N_20MHZONLY + +#define CHSPEC_IS10(chspec) 0 +#define CHSPEC_IS20(chspec) 1 +#ifndef CHSPEC_IS40 +#define CHSPEC_IS40(chspec) 0 +#endif + +#else + +#define CHSPEC_IS10(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_10) +#define CHSPEC_IS20(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_20) +#ifndef CHSPEC_IS40 +#define CHSPEC_IS40(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_40) +#endif + +#endif + +#define CHSPEC_IS5G(chspec) (((chspec) & WL_CHANSPEC_BAND_MASK) == WL_CHANSPEC_BAND_5G) +#define CHSPEC_IS2G(chspec) (((chspec) & WL_CHANSPEC_BAND_MASK) == WL_CHANSPEC_BAND_2G) +#define CHSPEC_SB_NONE(chspec) (((chspec) & WL_CHANSPEC_CTL_SB_MASK) == WL_CHANSPEC_CTL_SB_NONE) +#define CHSPEC_SB_UPPER(chspec) (((chspec) & WL_CHANSPEC_CTL_SB_MASK) == WL_CHANSPEC_CTL_SB_UPPER) +#define CHSPEC_SB_LOWER(chspec) (((chspec) & WL_CHANSPEC_CTL_SB_MASK) == WL_CHANSPEC_CTL_SB_LOWER) +#define CHSPEC_CTL_CHAN(chspec) ((CHSPEC_SB_LOWER(chspec)) ? \ + (LOWER_20_SB(((chspec) & WL_CHANSPEC_CHAN_MASK))) : \ + (UPPER_20_SB(((chspec) & WL_CHANSPEC_CHAN_MASK)))) +#define CHSPEC2WLC_BAND(chspec) (CHSPEC_IS5G(chspec) ? WLC_BAND_5G : WLC_BAND_2G) + +#define CHANSPEC_STR_LEN 8 + + +#define WLC_MAXRATE 108 +#define WLC_RATE_1M 2 +#define WLC_RATE_2M 4 +#define WLC_RATE_5M5 11 +#define WLC_RATE_11M 22 +#define WLC_RATE_6M 12 +#define WLC_RATE_9M 18 +#define WLC_RATE_12M 24 +#define WLC_RATE_18M 36 +#define WLC_RATE_24M 48 +#define WLC_RATE_36M 72 +#define WLC_RATE_48M 96 +#define WLC_RATE_54M 108 + +#define WLC_2G_25MHZ_OFFSET 5 + + +extern char * wf_chspec_ntoa(chanspec_t chspec, char *buf); + + +extern chanspec_t wf_chspec_aton(char *a); + + +extern bool wf_chspec_malformed(chanspec_t chanspec); + + +extern uint8 wf_chspec_ctlchan(chanspec_t chspec); + + +extern chanspec_t wf_chspec_ctlchspec(chanspec_t chspec); + + +extern int wf_mhz2channel(uint freq, uint start_factor); + + +extern int wf_channel2mhz(uint channel, uint start_factor); + +#endif diff --git a/external/cache/sources/wl/include/bcmwifi_channels.h b/external/cache/sources/wl/include/bcmwifi_channels.h new file mode 100644 index 0000000..fdb84b1 --- /dev/null +++ b/external/cache/sources/wl/include/bcmwifi_channels.h @@ -0,0 +1,473 @@ +/* + * Misc utility routines for WL and Apps + * This header file housing the define and function prototype use by + * both the wl driver, tools & Apps. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmwifi_channels.h 309193 2012-01-19 00:03:57Z stafford $ + */ + +#ifndef _bcmwifi_channels_h_ +#define _bcmwifi_channels_h_ + + +/* A chanspec holds the channel number, band, bandwidth and control sideband */ +typedef uint16 chanspec_t; + +/* channel defines */ +#define CH_UPPER_SB 0x01 +#define CH_LOWER_SB 0x02 +#define CH_EWA_VALID 0x04 +#define CH_80MHZ_APART 16 +#define CH_40MHZ_APART 8 +#define CH_20MHZ_APART 4 +#define CH_10MHZ_APART 2 +#define CH_5MHZ_APART 1 /* 2G band channels are 5 Mhz apart */ +#define CH_MAX_2G_CHANNEL 14 /* Max channel in 2G band */ +#define MAXCHANNEL 224 /* max # supported channels. The max channel no is 216, + * this is that + 1 rounded up to a multiple of NBBY (8). + * DO NOT MAKE it > 255: channels are uint8's all over + */ +#define CHSPEC_CTLOVLP(sp1, sp2, sep) (ABS(wf_chspec_ctlchan(sp1) - wf_chspec_ctlchan(sp2)) < \ + (sep)) + + +#ifndef D11AC_IOTYPES + +#define WL_CHANSPEC_CHAN_MASK 0x00ff +#define WL_CHANSPEC_CHAN_SHIFT 0 + +#define WL_CHANSPEC_CTL_SB_MASK 0x0300 +#define WL_CHANSPEC_CTL_SB_SHIFT 8 +#define WL_CHANSPEC_CTL_SB_LOWER 0x0100 +#define WL_CHANSPEC_CTL_SB_UPPER 0x0200 +#define WL_CHANSPEC_CTL_SB_NONE 0x0300 + +#define WL_CHANSPEC_BW_MASK 0x0C00 +#define WL_CHANSPEC_BW_SHIFT 10 +#define WL_CHANSPEC_BW_10 0x0400 +#define WL_CHANSPEC_BW_20 0x0800 +#define WL_CHANSPEC_BW_40 0x0C00 + +#define WL_CHANSPEC_BAND_MASK 0xf000 +#define WL_CHANSPEC_BAND_SHIFT 12 +#ifdef WL_CHANSPEC_BAND_5G +#undef WL_CHANSPEC_BAND_5G +#endif +#ifdef WL_CHANSPEC_BAND_2G +#undef WL_CHANSPEC_BAND_2G +#endif +#define WL_CHANSPEC_BAND_5G 0x1000 +#define WL_CHANSPEC_BAND_2G 0x2000 +#define INVCHANSPEC 255 + +/* channel defines */ +#define LOWER_20_SB(channel) (((channel) > CH_10MHZ_APART) ? ((channel) - CH_10MHZ_APART) : 0) +#define UPPER_20_SB(channel) (((channel) < (MAXCHANNEL - CH_10MHZ_APART)) ? \ + ((channel) + CH_10MHZ_APART) : 0) + +#define LL_20_SB(channel) (((channel) > 3 * CH_10MHZ_APART) ? ((channel) - 3 * CH_10MHZ_APART) : 0) +#define UU_20_SB(channel) (((channel) < (MAXCHANNEL - 3 * CH_10MHZ_APART)) ? \ + ((channel) + 3 * CH_10MHZ_APART) : 0) +#define LU_20_SB(channel) LOWER_20_SB(channel) +#define UL_20_SB(channel) UPPER_20_SB(channel) + +#define CHSPEC_WLCBANDUNIT(chspec) (CHSPEC_IS5G(chspec) ? BAND_5G_INDEX : BAND_2G_INDEX) +#define CH20MHZ_CHSPEC(channel) (chanspec_t)((chanspec_t)(channel) | WL_CHANSPEC_BW_20 | \ + WL_CHANSPEC_CTL_SB_NONE | (((channel) <= CH_MAX_2G_CHANNEL) ? \ + WL_CHANSPEC_BAND_2G : WL_CHANSPEC_BAND_5G)) +#define NEXT_20MHZ_CHAN(channel) (((channel) < (MAXCHANNEL - CH_20MHZ_APART)) ? \ + ((channel) + CH_20MHZ_APART) : 0) +#define CH40MHZ_CHSPEC(channel, ctlsb) (chanspec_t) \ + ((channel) | (ctlsb) | WL_CHANSPEC_BW_40 | \ + ((channel) <= CH_MAX_2G_CHANNEL ? WL_CHANSPEC_BAND_2G : \ + WL_CHANSPEC_BAND_5G)) +#define CHSPEC_CHANNEL(chspec) ((uint8)((chspec) & WL_CHANSPEC_CHAN_MASK)) +#define CHSPEC_BAND(chspec) ((chspec) & WL_CHANSPEC_BAND_MASK) + +/* chanspec stores radio channel & flags to indicate control channel location, i.e. upper/lower */ +#define CHSPEC_CTL_SB(chspec) ((chspec) & WL_CHANSPEC_CTL_SB_MASK) +#define CHSPEC_BW(chspec) ((chspec) & WL_CHANSPEC_BW_MASK) + +#ifdef WL11N_20MHZONLY + +#define CHSPEC_IS10(chspec) 0 +#define CHSPEC_IS20(chspec) 1 +#ifndef CHSPEC_IS40 +#define CHSPEC_IS40(chspec) 0 +#endif + +#else /* !WL11N_20MHZONLY */ + +#define CHSPEC_IS10(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_10) +#define CHSPEC_IS20(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_20) +#ifndef CHSPEC_IS40 +#define CHSPEC_IS40(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_40) +#endif + +#endif /* !WL11N_20MHZONLY */ + +#define CHSPEC_IS5G(chspec) (((chspec) & WL_CHANSPEC_BAND_MASK) == WL_CHANSPEC_BAND_5G) +#define CHSPEC_IS2G(chspec) (((chspec) & WL_CHANSPEC_BAND_MASK) == WL_CHANSPEC_BAND_2G) +#define CHSPEC_SB_NONE(chspec) (((chspec) & WL_CHANSPEC_CTL_SB_MASK) == WL_CHANSPEC_CTL_SB_NONE) +#define CHSPEC_SB_UPPER(chspec) (((chspec) & WL_CHANSPEC_CTL_SB_MASK) == WL_CHANSPEC_CTL_SB_UPPER) +#define CHSPEC_SB_LOWER(chspec) (((chspec) & WL_CHANSPEC_CTL_SB_MASK) == WL_CHANSPEC_CTL_SB_LOWER) +#define CHSPEC_CTL_CHAN(chspec) ((CHSPEC_SB_LOWER(chspec)) ? \ + (LOWER_20_SB(((chspec) & WL_CHANSPEC_CHAN_MASK))) : \ + (UPPER_20_SB(((chspec) & WL_CHANSPEC_CHAN_MASK)))) +#define CHSPEC2WLC_BAND(chspec) (CHSPEC_IS5G(chspec) ? WLC_BAND_5G : WLC_BAND_2G) + +#define CHANSPEC_STR_LEN 8 + +#else /* D11AC_IOTYPES */ + +#define WL_CHANSPEC_CHAN_MASK 0x00ff +#define WL_CHANSPEC_CHAN_SHIFT 0 +#define WL_CHANSPEC_CHAN1_MASK 0x000f +#define WL_CHANSPEC_CHAN1_SHIFT 0 +#define WL_CHANSPEC_CHAN2_MASK 0x00f0 +#define WL_CHANSPEC_CHAN2_SHIFT 4 + +#define WL_CHANSPEC_CTL_SB_MASK 0x0700 +#define WL_CHANSPEC_CTL_SB_SHIFT 8 +#define WL_CHANSPEC_CTL_SB_LLL 0x0000 +#define WL_CHANSPEC_CTL_SB_LLU 0x0100 +#define WL_CHANSPEC_CTL_SB_LUL 0x0200 +#define WL_CHANSPEC_CTL_SB_LUU 0x0300 +#define WL_CHANSPEC_CTL_SB_ULL 0x0400 +#define WL_CHANSPEC_CTL_SB_ULU 0x0500 +#define WL_CHANSPEC_CTL_SB_UUL 0x0600 +#define WL_CHANSPEC_CTL_SB_UUU 0x0700 +#define WL_CHANSPEC_CTL_SB_LL WL_CHANSPEC_CTL_SB_LLL +#define WL_CHANSPEC_CTL_SB_LU WL_CHANSPEC_CTL_SB_LLU +#define WL_CHANSPEC_CTL_SB_UL WL_CHANSPEC_CTL_SB_LUL +#define WL_CHANSPEC_CTL_SB_UU WL_CHANSPEC_CTL_SB_LUU +#define WL_CHANSPEC_CTL_SB_L WL_CHANSPEC_CTL_SB_LLL +#define WL_CHANSPEC_CTL_SB_U WL_CHANSPEC_CTL_SB_LLU +#define WL_CHANSPEC_CTL_SB_LOWER WL_CHANSPEC_CTL_SB_LLL +#define WL_CHANSPEC_CTL_SB_UPPER WL_CHANSPEC_CTL_SB_LLU + +#define WL_CHANSPEC_BW_MASK 0x3800 +#define WL_CHANSPEC_BW_SHIFT 11 +#define WL_CHANSPEC_BW_5 0x0000 +#define WL_CHANSPEC_BW_10 0x0800 +#define WL_CHANSPEC_BW_20 0x1000 +#define WL_CHANSPEC_BW_40 0x1800 +#define WL_CHANSPEC_BW_80 0x2000 +#define WL_CHANSPEC_BW_160 0x2800 +#define WL_CHANSPEC_BW_8080 0x3000 + +#define WL_CHANSPEC_BAND_MASK 0xc000 +#define WL_CHANSPEC_BAND_SHIFT 14 +#define WL_CHANSPEC_BAND_2G 0x0000 +#define WL_CHANSPEC_BAND_3G 0x4000 +#define WL_CHANSPEC_BAND_4G 0x8000 +#define WL_CHANSPEC_BAND_5G 0xc000 +#define INVCHANSPEC 255 + +/* channel defines */ +#define LOWER_20_SB(channel) (((channel) > CH_10MHZ_APART) ? \ + ((channel) - CH_10MHZ_APART) : 0) +#define UPPER_20_SB(channel) (((channel) < (MAXCHANNEL - CH_10MHZ_APART)) ? \ + ((channel) + CH_10MHZ_APART) : 0) + +#define LL_20_SB(channel) (((channel) > 3 * CH_10MHZ_APART) ? ((channel) - 3 * CH_10MHZ_APART) : 0) +#define UU_20_SB(channel) (((channel) < (MAXCHANNEL - 3 * CH_10MHZ_APART)) ? \ + ((channel) + 3 * CH_10MHZ_APART) : 0) +#define LU_20_SB(channel) LOWER_20_SB(channel) +#define UL_20_SB(channel) UPPER_20_SB(channel) + +#define LOWER_40_SB(channel) ((channel) - CH_20MHZ_APART) +#define UPPER_40_SB(channel) ((channel) + CH_20MHZ_APART) +#define CHSPEC_WLCBANDUNIT(chspec) (CHSPEC_IS5G(chspec) ? BAND_5G_INDEX : BAND_2G_INDEX) +#define CH20MHZ_CHSPEC(channel) (chanspec_t)((chanspec_t)(channel) | WL_CHANSPEC_BW_20 | \ + (((channel) <= CH_MAX_2G_CHANNEL) ? \ + WL_CHANSPEC_BAND_2G : WL_CHANSPEC_BAND_5G)) +#define NEXT_20MHZ_CHAN(channel) (((channel) < (MAXCHANNEL - CH_20MHZ_APART)) ? \ + ((channel) + CH_20MHZ_APART) : 0) +#define CH40MHZ_CHSPEC(channel, ctlsb) (chanspec_t) \ + ((channel) | (ctlsb) | WL_CHANSPEC_BW_40 | \ + ((channel) <= CH_MAX_2G_CHANNEL ? WL_CHANSPEC_BAND_2G : \ + WL_CHANSPEC_BAND_5G)) +#define CH80MHZ_CHSPEC(channel, ctlsb) (chanspec_t) \ + ((channel) | (ctlsb) | \ + WL_CHANSPEC_BW_80 | WL_CHANSPEC_BAND_5G) +#define CH160MHZ_CHSPEC(channel, ctlsb) (chanspec_t) \ + ((channel) | (ctlsb) | \ + WL_CHANSPEC_BW_160 | WL_CHANSPEC_BAND_5G) + +/* simple MACROs to get different fields of chanspec */ +#define CHSPEC_CHANNEL(chspec) ((uint8)((chspec) & WL_CHANSPEC_CHAN_MASK)) +#define CHSPEC_CHAN1(chspec) ((chspec) & WL_CHANSPEC_CHAN1_MASK) +#define CHSPEC_CHAN2(chspec) ((chspec) & WL_CHANSPEC_CHAN2_MASK) +#define CHSPEC_BAND(chspec) ((chspec) & WL_CHANSPEC_BAND_MASK) +#define CHSPEC_CTL_SB(chspec) ((chspec) & WL_CHANSPEC_CTL_SB_MASK) +#define CHSPEC_BW(chspec) ((chspec) & WL_CHANSPEC_BW_MASK) + +#ifdef WL11N_20MHZONLY + +#define CHSPEC_IS10(chspec) 0 +#define CHSPEC_IS20(chspec) 1 +#ifndef CHSPEC_IS40 +#define CHSPEC_IS40(chspec) 0 +#endif +#ifndef CHSPEC_IS80 +#define CHSPEC_IS80(chspec) 0 +#endif +#ifndef CHSPEC_IS160 +#define CHSPEC_IS160(chspec) 0 +#endif +#ifndef CHSPEC_IS8080 +#define CHSPEC_IS8080(chspec) 0 +#endif + +#else /* !WL11N_20MHZONLY */ + +#define CHSPEC_IS10(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_10) +#define CHSPEC_IS20(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_20) +#ifndef CHSPEC_IS40 +#define CHSPEC_IS40(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_40) +#endif +#ifndef CHSPEC_IS80 +#define CHSPEC_IS80(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_80) +#endif +#ifndef CHSPEC_IS160 +#define CHSPEC_IS160(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_160) +#endif +#ifndef CHSPEC_IS8080 +#define CHSPEC_IS8080(chspec) (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_8080) +#endif + +#endif /* !WL11N_20MHZONLY */ + +#define CHSPEC_IS5G(chspec) (((chspec) & WL_CHANSPEC_BAND_MASK) == WL_CHANSPEC_BAND_5G) +#define CHSPEC_IS2G(chspec) (((chspec) & WL_CHANSPEC_BAND_MASK) == WL_CHANSPEC_BAND_2G) +#define CHSPEC_SB_UPPER(chspec) \ + ((((chspec) & WL_CHANSPEC_CTL_SB_MASK) == WL_CHANSPEC_CTL_SB_UPPER) && \ + (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_40)) +#define CHSPEC_SB_LOWER(chspec) \ + ((((chspec) & WL_CHANSPEC_CTL_SB_MASK) == WL_CHANSPEC_CTL_SB_LOWER) && \ + (((chspec) & WL_CHANSPEC_BW_MASK) == WL_CHANSPEC_BW_40)) +#define CHSPEC2WLC_BAND(chspec) (CHSPEC_IS5G(chspec) ? WLC_BAND_5G : WLC_BAND_2G) + +/** + * Number of chars needed for wf_chspec_ntoa() destination character buffer. + */ +#define CHANSPEC_STR_LEN 20 + + +/* Legacy Chanspec defines + * These are the defines for the previous format of the chanspec_t + */ +#define WL_LCHANSPEC_CHAN_MASK 0x00ff +#define WL_LCHANSPEC_CHAN_SHIFT 0 + +#define WL_LCHANSPEC_CTL_SB_MASK 0x0300 +#define WL_LCHANSPEC_CTL_SB_SHIFT 8 +#define WL_LCHANSPEC_CTL_SB_LOWER 0x0100 +#define WL_LCHANSPEC_CTL_SB_UPPER 0x0200 +#define WL_LCHANSPEC_CTL_SB_NONE 0x0300 + +#define WL_LCHANSPEC_BW_MASK 0x0C00 +#define WL_LCHANSPEC_BW_SHIFT 10 +#define WL_LCHANSPEC_BW_10 0x0400 +#define WL_LCHANSPEC_BW_20 0x0800 +#define WL_LCHANSPEC_BW_40 0x0C00 + +#define WL_LCHANSPEC_BAND_MASK 0xf000 +#define WL_LCHANSPEC_BAND_SHIFT 12 +#define WL_LCHANSPEC_BAND_5G 0x1000 +#define WL_LCHANSPEC_BAND_2G 0x2000 + +#define LCHSPEC_CHANNEL(chspec) ((uint8)((chspec) & WL_LCHANSPEC_CHAN_MASK)) +#define LCHSPEC_BAND(chspec) ((chspec) & WL_LCHANSPEC_BAND_MASK) +#define LCHSPEC_CTL_SB(chspec) ((chspec) & WL_LCHANSPEC_CTL_SB_MASK) +#define LCHSPEC_BW(chspec) ((chspec) & WL_LCHANSPEC_BW_MASK) +#define LCHSPEC_IS10(chspec) (((chspec) & WL_LCHANSPEC_BW_MASK) == WL_LCHANSPEC_BW_10) +#define LCHSPEC_IS20(chspec) (((chspec) & WL_LCHANSPEC_BW_MASK) == WL_LCHANSPEC_BW_20) +#define LCHSPEC_IS40(chspec) (((chspec) & WL_LCHANSPEC_BW_MASK) == WL_LCHANSPEC_BW_40) +#define LCHSPEC_IS5G(chspec) (((chspec) & WL_LCHANSPEC_BAND_MASK) == WL_LCHANSPEC_BAND_5G) +#define LCHSPEC_IS2G(chspec) (((chspec) & WL_LCHANSPEC_BAND_MASK) == WL_LCHANSPEC_BAND_2G) + +#define LCHSPEC_CREATE(chan, band, bw, sb) ((uint16)((chan) | (sb) | (bw) | (band))) + +#endif /* D11AC_IOTYPES */ + +/* + * WF_CHAN_FACTOR_* constants are used to calculate channel frequency + * given a channel number. + * chan_freq = chan_factor * 500Mhz + chan_number * 5 + */ + +/** + * Channel Factor for the starting frequence of 2.4 GHz channels. + * The value corresponds to 2407 MHz. + */ +#define WF_CHAN_FACTOR_2_4_G 4814 /* 2.4 GHz band, 2407 MHz */ + +/** + * Channel Factor for the starting frequence of 5 GHz channels. + * The value corresponds to 5000 MHz. + */ +#define WF_CHAN_FACTOR_5_G 10000 /* 5 GHz band, 5000 MHz */ + +/** + * Channel Factor for the starting frequence of 4.9 GHz channels. + * The value corresponds to 4000 MHz. + */ +#define WF_CHAN_FACTOR_4_G 8000 /* 4.9 GHz band for Japan */ + +#define WLC_2G_25MHZ_OFFSET 5 /* 2.4GHz band channel offset */ + +/** + * Convert chanspec to ascii string + * + * @param chspec chanspec format + * @param buf ascii string of chanspec + * + * @return pointer to buf with room for at least CHANSPEC_STR_LEN bytes + * + * @see CHANSPEC_STR_LEN + */ +extern char * wf_chspec_ntoa(chanspec_t chspec, char *buf); + +/** + * Convert ascii string to chanspec + * + * @param a pointer to input string + * + * @return >= 0 if successful or 0 otherwise + */ +extern chanspec_t wf_chspec_aton(const char *a); + +/** + * Verify the chanspec fields are valid. + * + * Verify the chanspec is using a legal set field values, i.e. that the chanspec + * specified a band, bw, ctl_sb and channel and that the combination could be + * legal given some set of circumstances. + * + * @param chanspec input chanspec to verify + * + * @return TRUE if the chanspec is malformed, FALSE if it looks good. + */ +extern bool wf_chspec_malformed(chanspec_t chanspec); + +/** + * Verify the chanspec specifies a valid channel according to 802.11. + * + * @param chanspec input chanspec to verify + * + * @return TRUE if the chanspec is a valid 802.11 channel + */ +extern bool wf_chspec_valid(chanspec_t chanspec); + +/** + * Return the primary (control) channel. + * + * This function returns the channel number of the primary 20MHz channel. For + * 20MHz channels this is just the channel number. For 40MHz or wider channels + * it is the primary 20MHz channel specified by the chanspec. + * + * @param chspec input chanspec + * + * @return Returns the channel number of the primary 20MHz channel + */ +extern uint8 wf_chspec_ctlchan(chanspec_t chspec); + +/** + * Return the primary (control) chanspec. + * + * This function returns the chanspec of the primary 20MHz channel. For 20MHz + * channels this is just the chanspec. For 40MHz or wider channels it is the + * chanspec of the primary 20MHZ channel specified by the chanspec. + * + * @param chspec input chanspec + * + * @return Returns the chanspec of the primary 20MHz channel + */ +extern chanspec_t wf_chspec_ctlchspec(chanspec_t chspec); + +/** + * Return a channel number corresponding to a frequency. + * + * This function returns the chanspec for the primary 40MHz of an 80MHz channel. + * The control sideband specifies the same 20MHz channel that the 80MHz channel is using + * as the primary 20MHz channel. + */ +extern chanspec_t wf_chspec_primary40_chspec(chanspec_t chspec); + +/* + * Return the channel number for a given frequency and base frequency. + * The returned channel number is relative to the given base frequency. + * If the given base frequency is zero, a base frequency of 5 GHz is assumed for + * frequencies from 5 - 6 GHz, and 2.407 GHz is assumed for 2.4 - 2.5 GHz. + * + * Frequency is specified in MHz. + * The base frequency is specified as (start_factor * 500 kHz). + * Constants WF_CHAN_FACTOR_2_4_G, WF_CHAN_FACTOR_5_G are defined for + * 2.4 GHz and 5 GHz bands. + * + * The returned channel will be in the range [1, 14] in the 2.4 GHz band + * and [0, 200] otherwise. + * -1 is returned if the start_factor is WF_CHAN_FACTOR_2_4_G and the + * frequency is not a 2.4 GHz channel, or if the frequency is not and even + * multiple of 5 MHz from the base frequency to the base plus 1 GHz. + * + * Reference 802.11 REVma, section 17.3.8.3, and 802.11B section 18.4.6.2 + * + * @param freq frequency in MHz + * @param start_factor base frequency in 500 kHz units, e.g. 10000 for 5 GHz + * + * @return Returns a channel number + * + * @see WF_CHAN_FACTOR_2_4_G + * @see WF_CHAN_FACTOR_5_G + */ +extern int wf_mhz2channel(uint freq, uint start_factor); + +/** + * Return the center frequency in MHz of the given channel and base frequency. + * + * Return the center frequency in MHz of the given channel and base frequency. + * The channel number is interpreted relative to the given base frequency. + * + * The valid channel range is [1, 14] in the 2.4 GHz band and [0, 200] otherwise. + * The base frequency is specified as (start_factor * 500 kHz). + * Constants WF_CHAN_FACTOR_2_4_G, WF_CHAN_FACTOR_5_G are defined for + * 2.4 GHz and 5 GHz bands. + * The channel range of [1, 14] is only checked for a start_factor of + * WF_CHAN_FACTOR_2_4_G (4814). + * Odd start_factors produce channels on .5 MHz boundaries, in which case + * the answer is rounded down to an integral MHz. + * -1 is returned for an out of range channel. + * + * Reference 802.11 REVma, section 17.3.8.3, and 802.11B section 18.4.6.2 + * + * @param channel input channel number + * @param start_factor base frequency in 500 kHz units, e.g. 10000 for 5 GHz + * + * @return Returns a frequency in MHz + * + * @see WF_CHAN_FACTOR_2_4_G + * @see WF_CHAN_FACTOR_5_G + */ +extern int wf_channel2mhz(uint channel, uint start_factor); + +/** + * Convert ctl chan and bw to chanspec + * + * @param ctl_ch channel + * @param bw bandwidth + * + * @return > 0 if successful or 0 otherwise + * + */ +extern uint16 wf_channel2chspec(uint ctl_ch, uint bw); + +extern uint wf_channel2freq(uint channel); +extern uint wf_freq2channel(uint freq); + + +#endif /* _bcmwifi_channels_h_ */ diff --git a/external/cache/sources/wl/include/bcmwifi_rates.h b/external/cache/sources/wl/include/bcmwifi_rates.h new file mode 100644 index 0000000..0dc39a8 --- /dev/null +++ b/external/cache/sources/wl/include/bcmwifi_rates.h @@ -0,0 +1,436 @@ +/* + * Indices for 802.11 a/b/g/n/ac 1-3 chain symmetric transmit rates + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmwifi_rates.h 5187 2012-06-29 06:17:50Z fsherstyuk $ + */ + +#ifndef _bcmwifi_rates_h_ +#define _bcmwifi_rates_h_ + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + + +#define WL_RATESET_SZ_DSSS 4 +#define WL_RATESET_SZ_OFDM 8 +#define WL_RATESET_SZ_HT_MCS 8 +#define WL_RATESET_SZ_VHT_MCS 10 + +#define WL_TX_CHAINS_MAX 3 + +#define WL_RATE_DISABLED (-128) /* Power value corresponding to unsupported rate */ + +/* Transmit channel bandwidths */ +typedef enum wl_tx_bw { + WL_TX_BW_20, + WL_TX_BW_40, + WL_TX_BW_80, + WL_TX_BW_20IN40, + WL_TX_BW_20IN80, + WL_TX_BW_40IN80, + WL_TX_BW_ALL +} wl_tx_bw_t; + + +/* + * Transmit modes. + * Not all modes are listed here, only those required for disambiguation. e.g. SPEXP is not listed + */ +typedef enum wl_tx_mode { + WL_TX_MODE_NONE, + WL_TX_MODE_STBC, + WL_TX_MODE_CDD, + WL_TX_MODE_TXBF, + WL_NUM_TX_MODES +} wl_tx_mode_t; + + +/* Number of transmit chains */ +typedef enum wl_tx_chains { + WL_TX_CHAINS_1 = 1, + WL_TX_CHAINS_2, + WL_TX_CHAINS_3 +} wl_tx_chains_t; + + +/* Number of transmit streams */ +typedef enum wl_tx_nss { + WL_TX_NSS_1 = 1, + WL_TX_NSS_2, + WL_TX_NSS_3 +} wl_tx_nss_t; + + +typedef enum clm_rates { + /************ + * 1 chain * + ************ + */ + + /* 1 Stream */ + WL_RATE_1X1_DSSS_1 = 0, + WL_RATE_1X1_DSSS_2 = 1, + WL_RATE_1X1_DSSS_5_5 = 2, + WL_RATE_1X1_DSSS_11 = 3, + + WL_RATE_1X1_OFDM_6 = 4, + WL_RATE_1X1_OFDM_9 = 5, + WL_RATE_1X1_OFDM_12 = 6, + WL_RATE_1X1_OFDM_18 = 7, + WL_RATE_1X1_OFDM_24 = 8, + WL_RATE_1X1_OFDM_36 = 9, + WL_RATE_1X1_OFDM_48 = 10, + WL_RATE_1X1_OFDM_54 = 11, + + WL_RATE_1X1_MCS0 = 12, + WL_RATE_1X1_MCS1 = 13, + WL_RATE_1X1_MCS2 = 14, + WL_RATE_1X1_MCS3 = 15, + WL_RATE_1X1_MCS4 = 16, + WL_RATE_1X1_MCS5 = 17, + WL_RATE_1X1_MCS6 = 18, + WL_RATE_1X1_MCS7 = 19, + + WL_RATE_1X1_VHT0SS1 = 12, + WL_RATE_1X1_VHT1SS1 = 13, + WL_RATE_1X1_VHT2SS1 = 14, + WL_RATE_1X1_VHT3SS1 = 15, + WL_RATE_1X1_VHT4SS1 = 16, + WL_RATE_1X1_VHT5SS1 = 17, + WL_RATE_1X1_VHT6SS1 = 18, + WL_RATE_1X1_VHT7SS1 = 19, + WL_RATE_1X1_VHT8SS1 = 20, + WL_RATE_1X1_VHT9SS1 = 21, + + + /************ + * 2 chains * + ************ + */ + + /* 1 Stream expanded + 1 */ + WL_RATE_1X2_DSSS_1 = 22, + WL_RATE_1X2_DSSS_2 = 23, + WL_RATE_1X2_DSSS_5_5 = 24, + WL_RATE_1X2_DSSS_11 = 25, + + WL_RATE_1X2_CDD_OFDM_6 = 26, + WL_RATE_1X2_CDD_OFDM_9 = 27, + WL_RATE_1X2_CDD_OFDM_12 = 28, + WL_RATE_1X2_CDD_OFDM_18 = 29, + WL_RATE_1X2_CDD_OFDM_24 = 30, + WL_RATE_1X2_CDD_OFDM_36 = 31, + WL_RATE_1X2_CDD_OFDM_48 = 32, + WL_RATE_1X2_CDD_OFDM_54 = 33, + + WL_RATE_1X2_CDD_MCS0 = 34, + WL_RATE_1X2_CDD_MCS1 = 35, + WL_RATE_1X2_CDD_MCS2 = 36, + WL_RATE_1X2_CDD_MCS3 = 37, + WL_RATE_1X2_CDD_MCS4 = 38, + WL_RATE_1X2_CDD_MCS5 = 39, + WL_RATE_1X2_CDD_MCS6 = 40, + WL_RATE_1X2_CDD_MCS7 = 41, + + WL_RATE_1X2_VHT0SS1 = 34, + WL_RATE_1X2_VHT1SS1 = 35, + WL_RATE_1X2_VHT2SS1 = 36, + WL_RATE_1X2_VHT3SS1 = 37, + WL_RATE_1X2_VHT4SS1 = 38, + WL_RATE_1X2_VHT5SS1 = 39, + WL_RATE_1X2_VHT6SS1 = 40, + WL_RATE_1X2_VHT7SS1 = 41, + WL_RATE_1X2_VHT8SS1 = 42, + WL_RATE_1X2_VHT9SS1 = 43, + + /* 2 Streams */ + WL_RATE_2X2_STBC_MCS0 = 44, + WL_RATE_2X2_STBC_MCS1 = 45, + WL_RATE_2X2_STBC_MCS2 = 46, + WL_RATE_2X2_STBC_MCS3 = 47, + WL_RATE_2X2_STBC_MCS4 = 48, + WL_RATE_2X2_STBC_MCS5 = 49, + WL_RATE_2X2_STBC_MCS6 = 50, + WL_RATE_2X2_STBC_MCS7 = 51, + + WL_RATE_2X2_STBC_VHT0SS1 = 44, + WL_RATE_2X2_STBC_VHT1SS1 = 45, + WL_RATE_2X2_STBC_VHT2SS1 = 46, + WL_RATE_2X2_STBC_VHT3SS1 = 47, + WL_RATE_2X2_STBC_VHT4SS1 = 48, + WL_RATE_2X2_STBC_VHT5SS1 = 49, + WL_RATE_2X2_STBC_VHT6SS1 = 50, + WL_RATE_2X2_STBC_VHT7SS1 = 51, + WL_RATE_2X2_STBC_VHT8SS1 = 52, + WL_RATE_2X2_STBC_VHT9SS1 = 53, + + WL_RATE_2X2_SDM_MCS8 = 54, + WL_RATE_2X2_SDM_MCS9 = 55, + WL_RATE_2X2_SDM_MCS10 = 56, + WL_RATE_2X2_SDM_MCS11 = 57, + WL_RATE_2X2_SDM_MCS12 = 58, + WL_RATE_2X2_SDM_MCS13 = 59, + WL_RATE_2X2_SDM_MCS14 = 60, + WL_RATE_2X2_SDM_MCS15 = 61, + + WL_RATE_2X2_VHT0SS2 = 54, + WL_RATE_2X2_VHT1SS2 = 55, + WL_RATE_2X2_VHT2SS2 = 56, + WL_RATE_2X2_VHT3SS2 = 57, + WL_RATE_2X2_VHT4SS2 = 58, + WL_RATE_2X2_VHT5SS2 = 59, + WL_RATE_2X2_VHT6SS2 = 60, + WL_RATE_2X2_VHT7SS2 = 61, + WL_RATE_2X2_VHT8SS2 = 62, + WL_RATE_2X2_VHT9SS2 = 63, + + /************ + * 3 chains * + ************ + */ + + /* 1 Stream expanded + 2 */ + WL_RATE_1X3_DSSS_1 = 64, + WL_RATE_1X3_DSSS_2 = 65, + WL_RATE_1X3_DSSS_5_5 = 66, + WL_RATE_1X3_DSSS_11 = 67, + + WL_RATE_1X3_CDD_OFDM_6 = 68, + WL_RATE_1X3_CDD_OFDM_9 = 69, + WL_RATE_1X3_CDD_OFDM_12 = 70, + WL_RATE_1X3_CDD_OFDM_18 = 71, + WL_RATE_1X3_CDD_OFDM_24 = 72, + WL_RATE_1X3_CDD_OFDM_36 = 73, + WL_RATE_1X3_CDD_OFDM_48 = 74, + WL_RATE_1X3_CDD_OFDM_54 = 75, + + WL_RATE_1X3_CDD_MCS0 = 76, + WL_RATE_1X3_CDD_MCS1 = 77, + WL_RATE_1X3_CDD_MCS2 = 78, + WL_RATE_1X3_CDD_MCS3 = 79, + WL_RATE_1X3_CDD_MCS4 = 80, + WL_RATE_1X3_CDD_MCS5 = 81, + WL_RATE_1X3_CDD_MCS6 = 82, + WL_RATE_1X3_CDD_MCS7 = 83, + + WL_RATE_1X3_VHT0SS1 = 76, + WL_RATE_1X3_VHT1SS1 = 77, + WL_RATE_1X3_VHT2SS1 = 78, + WL_RATE_1X3_VHT3SS1 = 79, + WL_RATE_1X3_VHT4SS1 = 80, + WL_RATE_1X3_VHT5SS1 = 81, + WL_RATE_1X3_VHT6SS1 = 82, + WL_RATE_1X3_VHT7SS1 = 83, + WL_RATE_1X3_VHT8SS1 = 84, + WL_RATE_1X3_VHT9SS1 = 85, + + /* 2 Streams expanded + 1 */ + WL_RATE_2X3_STBC_MCS0 = 86, + WL_RATE_2X3_STBC_MCS1 = 87, + WL_RATE_2X3_STBC_MCS2 = 88, + WL_RATE_2X3_STBC_MCS3 = 89, + WL_RATE_2X3_STBC_MCS4 = 90, + WL_RATE_2X3_STBC_MCS5 = 91, + WL_RATE_2X3_STBC_MCS6 = 92, + WL_RATE_2X3_STBC_MCS7 = 93, + + WL_RATE_2X3_STBC_VHT0SS1 = 86, + WL_RATE_2X3_STBC_VHT1SS1 = 87, + WL_RATE_2X3_STBC_VHT2SS1 = 88, + WL_RATE_2X3_STBC_VHT3SS1 = 89, + WL_RATE_2X3_STBC_VHT4SS1 = 90, + WL_RATE_2X3_STBC_VHT5SS1 = 91, + WL_RATE_2X3_STBC_VHT6SS1 = 92, + WL_RATE_2X3_STBC_VHT7SS1 = 93, + WL_RATE_2X3_STBC_VHT8SS1 = 94, + WL_RATE_2X3_STBC_VHT9SS1 = 95, + + WL_RATE_2X3_SDM_MCS8 = 96, + WL_RATE_2X3_SDM_MCS9 = 97, + WL_RATE_2X3_SDM_MCS10 = 98, + WL_RATE_2X3_SDM_MCS11 = 99, + WL_RATE_2X3_SDM_MCS12 = 100, + WL_RATE_2X3_SDM_MCS13 = 101, + WL_RATE_2X3_SDM_MCS14 = 102, + WL_RATE_2X3_SDM_MCS15 = 103, + + WL_RATE_2X3_VHT0SS2 = 96, + WL_RATE_2X3_VHT1SS2 = 97, + WL_RATE_2X3_VHT2SS2 = 98, + WL_RATE_2X3_VHT3SS2 = 99, + WL_RATE_2X3_VHT4SS2 = 100, + WL_RATE_2X3_VHT5SS2 = 101, + WL_RATE_2X3_VHT6SS2 = 102, + WL_RATE_2X3_VHT7SS2 = 103, + WL_RATE_2X3_VHT8SS2 = 104, + WL_RATE_2X3_VHT9SS2 = 105, + + /* 3 Streams */ + WL_RATE_3X3_SDM_MCS16 = 106, + WL_RATE_3X3_SDM_MCS17 = 107, + WL_RATE_3X3_SDM_MCS18 = 108, + WL_RATE_3X3_SDM_MCS19 = 109, + WL_RATE_3X3_SDM_MCS20 = 110, + WL_RATE_3X3_SDM_MCS21 = 111, + WL_RATE_3X3_SDM_MCS22 = 112, + WL_RATE_3X3_SDM_MCS23 = 113, + + WL_RATE_3X3_VHT0SS3 = 106, + WL_RATE_3X3_VHT1SS3 = 107, + WL_RATE_3X3_VHT2SS3 = 108, + WL_RATE_3X3_VHT3SS3 = 109, + WL_RATE_3X3_VHT4SS3 = 110, + WL_RATE_3X3_VHT5SS3 = 111, + WL_RATE_3X3_VHT6SS3 = 112, + WL_RATE_3X3_VHT7SS3 = 113, + WL_RATE_3X3_VHT8SS3 = 114, + WL_RATE_3X3_VHT9SS3 = 115, + + + /**************************** + * TX Beamforming, 2 chains * + **************************** + */ + + /* 1 Stream expanded + 1 */ + + WL_RATE_1X2_TXBF_OFDM_6 = 116, + WL_RATE_1X2_TXBF_OFDM_9 = 117, + WL_RATE_1X2_TXBF_OFDM_12 = 118, + WL_RATE_1X2_TXBF_OFDM_18 = 119, + WL_RATE_1X2_TXBF_OFDM_24 = 120, + WL_RATE_1X2_TXBF_OFDM_36 = 121, + WL_RATE_1X2_TXBF_OFDM_48 = 122, + WL_RATE_1X2_TXBF_OFDM_54 = 123, + + WL_RATE_1X2_TXBF_MCS0 = 124, + WL_RATE_1X2_TXBF_MCS1 = 125, + WL_RATE_1X2_TXBF_MCS2 = 126, + WL_RATE_1X2_TXBF_MCS3 = 127, + WL_RATE_1X2_TXBF_MCS4 = 128, + WL_RATE_1X2_TXBF_MCS5 = 129, + WL_RATE_1X2_TXBF_MCS6 = 130, + WL_RATE_1X2_TXBF_MCS7 = 131, + + WL_RATE_1X2_TXBF_VHT0SS1 = 124, + WL_RATE_1X2_TXBF_VHT1SS1 = 125, + WL_RATE_1X2_TXBF_VHT2SS1 = 126, + WL_RATE_1X2_TXBF_VHT3SS1 = 127, + WL_RATE_1X2_TXBF_VHT4SS1 = 128, + WL_RATE_1X2_TXBF_VHT5SS1 = 129, + WL_RATE_1X2_TXBF_VHT6SS1 = 130, + WL_RATE_1X2_TXBF_VHT7SS1 = 131, + WL_RATE_1X2_TXBF_VHT8SS1 = 132, + WL_RATE_1X2_TXBF_VHT9SS1 = 133, + + /* 2 Streams */ + + WL_RATE_2X2_TXBF_SDM_MCS8 = 134, + WL_RATE_2X2_TXBF_SDM_MCS9 = 135, + WL_RATE_2X2_TXBF_SDM_MCS10 = 136, + WL_RATE_2X2_TXBF_SDM_MCS11 = 137, + WL_RATE_2X2_TXBF_SDM_MCS12 = 138, + WL_RATE_2X2_TXBF_SDM_MCS13 = 139, + WL_RATE_2X2_TXBF_SDM_MCS14 = 140, + WL_RATE_2X2_TXBF_SDM_MCS15 = 141, + + WL_RATE_2X2_TXBF_VHT0SS2 = 134, + WL_RATE_2X2_TXBF_VHT1SS2 = 135, + WL_RATE_2X2_TXBF_VHT2SS2 = 136, + WL_RATE_2X2_TXBF_VHT3SS2 = 137, + WL_RATE_2X2_TXBF_VHT4SS2 = 138, + WL_RATE_2X2_TXBF_VHT5SS2 = 139, + WL_RATE_2X2_TXBF_VHT6SS2 = 140, + WL_RATE_2X2_TXBF_VHT7SS2 = 141, + + + /**************************** + * TX Beamforming, 3 chains * + **************************** + */ + + /* 1 Stream expanded + 2 */ + + WL_RATE_1X3_TXBF_OFDM_6 = 142, + WL_RATE_1X3_TXBF_OFDM_9 = 143, + WL_RATE_1X3_TXBF_OFDM_12 = 144, + WL_RATE_1X3_TXBF_OFDM_18 = 145, + WL_RATE_1X3_TXBF_OFDM_24 = 146, + WL_RATE_1X3_TXBF_OFDM_36 = 147, + WL_RATE_1X3_TXBF_OFDM_48 = 148, + WL_RATE_1X3_TXBF_OFDM_54 = 149, + + WL_RATE_1X3_TXBF_MCS0 = 150, + WL_RATE_1X3_TXBF_MCS1 = 151, + WL_RATE_1X3_TXBF_MCS2 = 152, + WL_RATE_1X3_TXBF_MCS3 = 153, + WL_RATE_1X3_TXBF_MCS4 = 154, + WL_RATE_1X3_TXBF_MCS5 = 155, + WL_RATE_1X3_TXBF_MCS6 = 156, + WL_RATE_1X3_TXBF_MCS7 = 157, + + WL_RATE_1X3_TXBF_VHT0SS1 = 150, + WL_RATE_1X3_TXBF_VHT1SS1 = 151, + WL_RATE_1X3_TXBF_VHT2SS1 = 152, + WL_RATE_1X3_TXBF_VHT3SS1 = 153, + WL_RATE_1X3_TXBF_VHT4SS1 = 154, + WL_RATE_1X3_TXBF_VHT5SS1 = 155, + WL_RATE_1X3_TXBF_VHT6SS1 = 156, + WL_RATE_1X3_TXBF_VHT7SS1 = 157, + WL_RATE_1X3_TXBF_VHT8SS1 = 158, + WL_RATE_1X3_TXBF_VHT9SS1 = 159, + + /* 2 Streams expanded + 1 */ + + WL_RATE_2X3_TXBF_SDM_MCS8 = 160, + WL_RATE_2X3_TXBF_SDM_MCS9 = 161, + WL_RATE_2X3_TXBF_SDM_MCS10 = 162, + WL_RATE_2X3_TXBF_SDM_MCS11 = 163, + WL_RATE_2X3_TXBF_SDM_MCS12 = 164, + WL_RATE_2X3_TXBF_SDM_MCS13 = 165, + WL_RATE_2X3_TXBF_SDM_MCS14 = 166, + WL_RATE_2X3_TXBF_SDM_MCS15 = 167, + + WL_RATE_2X3_TXBF_VHT0SS2 = 160, + WL_RATE_2X3_TXBF_VHT1SS2 = 161, + WL_RATE_2X3_TXBF_VHT2SS2 = 162, + WL_RATE_2X3_TXBF_VHT3SS2 = 163, + WL_RATE_2X3_TXBF_VHT4SS2 = 164, + WL_RATE_2X3_TXBF_VHT5SS2 = 165, + WL_RATE_2X3_TXBF_VHT6SS2 = 166, + WL_RATE_2X3_TXBF_VHT7SS2 = 167, + WL_RATE_2X3_TXBF_VHT8SS2 = 168, + WL_RATE_2X3_TXBF_VHT9SS2 = 169, + + /* 3 Streams */ + + WL_RATE_3X3_TXBF_SDM_MCS16 = 170, + WL_RATE_3X3_TXBF_SDM_MCS17 = 171, + WL_RATE_3X3_TXBF_SDM_MCS18 = 172, + WL_RATE_3X3_TXBF_SDM_MCS19 = 173, + WL_RATE_3X3_TXBF_SDM_MCS20 = 174, + WL_RATE_3X3_TXBF_SDM_MCS21 = 175, + WL_RATE_3X3_TXBF_SDM_MCS22 = 176, + WL_RATE_3X3_TXBF_SDM_MCS23 = 177, + + WL_RATE_3X3_TXBF_VHT0SS3 = 170, + WL_RATE_3X3_TXBF_VHT1SS3 = 171, + WL_RATE_3X3_TXBF_VHT2SS3 = 172, + WL_RATE_3X3_TXBF_VHT3SS3 = 173, + WL_RATE_3X3_TXBF_VHT4SS3 = 174, + WL_RATE_3X3_TXBF_VHT5SS3 = 175, + WL_RATE_3X3_TXBF_VHT6SS3 = 176, + WL_RATE_3X3_TXBF_VHT7SS3 = 177 +} clm_rates_t; + +/* Number of rate codes */ +#define WL_NUMRATES 178 + +#ifdef __cplusplus +} +#endif /* __cplusplus */ + +#endif /* _bcmwifi_rates_h_ */ diff --git a/external/cache/sources/wl/include/dbus.h b/external/cache/sources/wl/include/dbus.h new file mode 100644 index 0000000..7d3ce54 --- /dev/null +++ b/external/cache/sources/wl/include/dbus.h @@ -0,0 +1,523 @@ +/* + * Dongle BUS interface Abstraction layer + * target serial buses like USB, SDIO, SPI, etc. + * + * $Copyright Open 2008 Broadcom Corporation$ + * + * $Id: dbus.h 394558 2013-04-03 00:11:01Z $ + */ + +#ifndef __DBUS_H__ +#define __DBUS_H__ + +#include "typedefs.h" + +#define DBUSTRACE(args) +#define DBUSERR(args) +#define DBUSINFO(args) +#define DBUSTRACE(args) +#define DBUSDBGLOCK(args) + +#define BCM_OTP_SIZE_43236 84 /* number of 16 bit values */ +#define BCM_OTP_SW_RGN_43236 24 /* start offset of SW config region */ +#define BCM_OTP_ADDR_43236 0x18000800 /* address of otp base */ + +#define ERR_CBMASK_TXFAIL 0x00000001 +#define ERR_CBMASK_RXFAIL 0x00000002 +#define ERR_CBMASK_ALL 0xFFFFFFFF + +#define DBUS_CBCTL_WRITE 0 +#define DBUS_CBCTL_READ 1 + +#define DBUS_TX_RETRY_LIMIT 3 /* retries for failed txirb */ +#define DBUS_TX_TIMEOUT_INTERVAL 250 /* timeout for txirb complete, in ms */ + +#define DBUS_BUFFER_SIZE_TX 32000 +#define DBUS_BUFFER_SIZE_RX 24000 + +#define DBUS_BUFFER_SIZE_TX_NOAGG 2048 +#define DBUS_BUFFER_SIZE_RX_NOAGG 2048 + +enum { + DBUS_OK = 0, + DBUS_ERR = -200, + DBUS_ERR_TIMEOUT, + DBUS_ERR_DISCONNECT, + DBUS_ERR_NODEVICE, + DBUS_ERR_UNSUPPORTED, + DBUS_ERR_PENDING, + DBUS_ERR_NOMEM, + DBUS_ERR_TXFAIL, + DBUS_ERR_TXTIMEOUT, + DBUS_ERR_TXDROP, + DBUS_ERR_RXFAIL, + DBUS_ERR_RXDROP, + DBUS_ERR_TXCTLFAIL, + DBUS_ERR_RXCTLFAIL, + DBUS_ERR_REG_PARAM, + DBUS_STATUS_CANCELLED, + DBUS_ERR_NVRAM, + DBUS_JUMBO_NOMATCH, + DBUS_JUMBO_BAD_FORMAT, + DBUS_NVRAM_NONTXT +}; + +/* DBUS types */ +enum { + DBUS_USB, + DBUS_SDIO, + DBUS_SPI, + DBUS_UNKNOWN +}; + +enum dbus_state { + DBUS_STATE_DL_PENDING, + DBUS_STATE_DL_DONE, + DBUS_STATE_UP, + DBUS_STATE_DOWN, + DBUS_STATE_PNP_FWDL, + DBUS_STATE_DISCONNECT, + DBUS_STATE_SLEEP +}; + +enum dbus_pnp_state { + DBUS_PNP_DISCONNECT, + DBUS_PNP_SLEEP, + DBUS_PNP_RESUME +}; + +enum dbus_file { + DBUS_FIRMWARE, + DBUS_NVFILE +}; + +typedef enum _DEVICE_SPEED { + INVALID_SPEED = -1, + LOW_SPEED = 1, /* USB 1.1: 1.5 Mbps */ + FULL_SPEED, /* USB 1.1: 12 Mbps */ + HIGH_SPEED, /* USB 2.0: 480 Mbps */ + SUPER_SPEED, /* USB 3.0: 4.8 Gbps */ +} DEVICE_SPEED; + +typedef struct { + int bustype; + int vid; + int pid; + int devid; + int chiprev; /* chip revsion number */ + int mtu; + int nchan; /* Data Channels */ + int has_2nd_bulk_in_ep; +} dbus_attrib_t; + +/* FIX: Account for errors related to DBUS; + * Let upper layer account for packets/bytes + */ +typedef struct { + uint32 rx_errors; + uint32 tx_errors; + uint32 rx_dropped; + uint32 tx_dropped; +} dbus_stats_t; + +/* + * Configurable BUS parameters + */ +typedef struct { + bool rxctl_deferrespok; +} dbus_config_t; + +/* + * External Download Info + */ +typedef struct dbus_extdl { + uint8 *fw; + int fwlen; + uint8 *vars; + int varslen; +} dbus_extdl_t; + +struct dbus_callbacks; +struct exec_parms; + +typedef void *(*probe_cb_t)(void *arg, const char *desc, uint32 bustype, uint32 hdrlen); +typedef void (*disconnect_cb_t)(void *arg); +typedef void *(*exec_cb_t)(struct exec_parms *args); + +/* Client callbacks registered during dbus_attach() */ +typedef struct dbus_callbacks { + void (*send_complete)(void *cbarg, void *info, int status); + void (*recv_buf)(void *cbarg, uint8 *buf, int len); + void (*recv_pkt)(void *cbarg, void *pkt); + void (*txflowcontrol)(void *cbarg, bool onoff); + void (*errhandler)(void *cbarg, int err); + void (*ctl_complete)(void *cbarg, int type, int status); + void (*state_change)(void *cbarg, int state); + void *(*pktget)(void *cbarg, uint len, bool send); + void (*pktfree)(void *cbarg, void *p, bool send); +} dbus_callbacks_t; + +struct dbus_pub; +struct bcmstrbuf; +struct dbus_irb; +struct dbus_irb_rx; +struct dbus_irb_tx; +struct dbus_intf_callbacks; + +typedef struct { + void* (*attach)(struct dbus_pub *pub, void *cbarg, struct dbus_intf_callbacks *cbs); + void (*detach)(struct dbus_pub *pub, void *bus); + + int (*up)(void *bus); + int (*down)(void *bus); + int (*send_irb)(void *bus, struct dbus_irb_tx *txirb); + int (*recv_irb)(void *bus, struct dbus_irb_rx *rxirb); + int (*cancel_irb)(void *bus, struct dbus_irb_tx *txirb); + int (*send_ctl)(void *bus, uint8 *buf, int len); + int (*recv_ctl)(void *bus, uint8 *buf, int len); + int (*get_stats)(void *bus, dbus_stats_t *stats); + int (*get_attrib)(void *bus, dbus_attrib_t *attrib); + + int (*pnp)(void *bus, int evnt); + int (*remove)(void *bus); + int (*resume)(void *bus); + int (*suspend)(void *bus); + int (*stop)(void *bus); + int (*reset)(void *bus); + + /* Access to bus buffers directly */ + void *(*pktget)(void *bus, int len); + void (*pktfree)(void *bus, void *pkt); + + int (*iovar_op)(void *bus, const char *name, void *params, int plen, void *arg, int len, + bool set); + void (*dump)(void *bus, struct bcmstrbuf *strbuf); + int (*set_config)(void *bus, dbus_config_t *config); + int (*get_config)(void *bus, dbus_config_t *config); + + bool (*device_exists)(void *bus); + bool (*dlneeded)(void *bus); + int (*dlstart)(void *bus, uint8 *fw, int len); + int (*dlrun)(void *bus); + bool (*recv_needed)(void *bus); + + void *(*exec_rxlock)(void *bus, exec_cb_t func, struct exec_parms *args); + void *(*exec_txlock)(void *bus, exec_cb_t func, struct exec_parms *args); + + int (*tx_timer_init)(void *bus); + int (*tx_timer_start)(void *bus, uint timeout); + int (*tx_timer_stop)(void *bus); + + int (*sched_dpc)(void *bus); + int (*lock)(void *bus); + int (*unlock)(void *bus); + int (*sched_probe_cb)(void *bus); + + int (*shutdown)(void *bus); + + int (*recv_stop)(void *bus); + int (*recv_resume)(void *bus); + + int (*recv_irb_from_ep)(void *bus, struct dbus_irb_rx *rxirb, uint ep_idx); + + int (*readreg)(void *bus, uint32 regaddr, int datalen, uint32 *value); + + /* Add from the bottom */ +} dbus_intf_t; + +typedef struct dbus_pub { + struct osl_info *osh; + dbus_stats_t stats; + dbus_attrib_t attrib; + enum dbus_state busstate; + DEVICE_SPEED device_speed; + int ntxq, nrxq, rxsize; + void *bus; + struct shared_info *sh; + void *dev_info; +} dbus_pub_t; + +#define BUS_INFO(bus, type) (((type *) bus)->pub->bus) + +#define ALIGNED_LOCAL_VARIABLE(var, align) \ + uint8 buffer[SDALIGN+64]; \ + uint8 *var = (uint8 *)(((uintptr)&buffer[0]) & ~(align-1)) + align; + +/* IO Request Block (IRB) */ +typedef struct dbus_irb { + struct dbus_irb *next; /* it's casted from dbus_irb_tx or dbus_irb_rx struct */ +} dbus_irb_t; + +/* General info for all BUS */ +typedef struct dbus_irbq { + dbus_irb_t *head; + dbus_irb_t *tail; + int cnt; +} dbus_irbq_t; + +typedef struct dbus_irb_rx { + struct dbus_irb irb; /* Must be first */ + uint8 *buf; + int buf_len; + int actual_len; + void *pkt; + void *info; + void *arg; +} dbus_irb_rx_t; + +typedef struct dbus_irb_tx { + struct dbus_irb irb; /* Must be first */ + uint8 *buf; + int len; + void *pkt; + int retry_count; + void *info; + void *arg; + void *send_buf; /* linear bufffer for LINUX when aggreagtion is enabled */ +} dbus_irb_tx_t; + + +/* DBUS interface callbacks are different from user callbacks + * so, internally, different info can be passed to upper layer + */ +typedef struct dbus_intf_callbacks { + void (*send_irb_timeout)(void *cbarg, dbus_irb_tx_t *txirb); + void (*send_irb_complete)(void *cbarg, dbus_irb_tx_t *txirb, int status); + void (*recv_irb_complete)(void *cbarg, dbus_irb_rx_t *rxirb, int status); + void (*errhandler)(void *cbarg, int err); + void (*ctl_complete)(void *cbarg, int type, int status); + void (*state_change)(void *cbarg, int state); + bool (*isr)(void *cbarg, bool *wantdpc); + bool (*dpc)(void *cbarg, bool bounded); + void (*watchdog)(void *cbarg); + void *(*pktget)(void *cbarg, uint len, bool send); + void (*pktfree)(void *cbarg, void *p, bool send); + struct dbus_irb* (*getirb)(void *cbarg, bool send); + void (*rxerr_indicate)(void *cbarg, bool on); +} dbus_intf_callbacks_t; + + +#if defined(EHCI_FASTPATH_TX) || defined(EHCI_FASTPATH_RX) + + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)) +/* Backward compatibility */ +typedef unsigned int gfp_t; + +#define dma_pool pci_pool +#define dma_pool_create(name, dev, size, align, alloc) \ + pci_pool_create(name, dev, size, align, alloc, GFP_DMA | GFP_ATOMIC) +#define dma_pool_destroy(pool) pci_pool_destroy(pool) +#define dma_pool_alloc(pool, flags, handle) pci_pool_alloc(pool, flags, handle) +#define dma_pool_free(pool, vaddr, addr) pci_pool_free(pool, vaddr, addr) +#define dma_map_single(dev, addr, size, dir) pci_map_single(dev, addr, size, dir) +#define dma_unmap_single(dev, hnd, size, dir) pci_unmap_single(dev, hnd, size, dir) +#define DMA_FROM_DEVICE PCI_DMA_FROMDEVICE +#define DMA_TO_DEVICE PCI_DMA_TODEVICE +#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)) */ + +/* Availability of these functions varies (when present, they have two arguments) */ +#ifndef hc32_to_cpu +#define hc32_to_cpu(x) le32_to_cpu(x) +#define cpu_to_hc32(x) cpu_to_le32(x) +typedef unsigned int __hc32; +#else +#error Two-argument functions needed +#endif + +/* Private USB opcode base */ +#define EHCI_FASTPATH 0x31 +#define EHCI_SET_EP_BYPASS EHCI_FASTPATH +#define EHCI_SET_BYPASS_CB (EHCI_FASTPATH + 1) +#define EHCI_SET_BYPASS_DEV (EHCI_FASTPATH + 2) +#define EHCI_DUMP_STATE (EHCI_FASTPATH + 3) +#define EHCI_SET_BYPASS_POOL (EHCI_FASTPATH + 4) +#define EHCI_CLR_EP_BYPASS (EHCI_FASTPATH + 5) + +/* + * EHCI QTD structure (hardware and extension) + * NOTE that is does not need to (and does not) match its kernel counterpart + */ +#define EHCI_QTD_NBUFFERS 5 +#define EHCI_QTD_ALIGN 32 +#define EHCI_BULK_PACKET_SIZE 512 +#define EHCI_QTD_XACTERR_MAX 32 + +struct ehci_qtd { + /* Hardware map */ + volatile uint32_t qtd_next; + volatile uint32_t qtd_altnext; + volatile uint32_t qtd_status; +#define EHCI_QTD_GET_BYTES(x) (((x)>>16) & 0x7fff) +#define EHCI_QTD_IOC 0x00008000 +#define EHCI_QTD_GET_CERR(x) (((x)>>10) & 0x3) +#define EHCI_QTD_SET_CERR(x) ((x) << 10) +#define EHCI_QTD_GET_PID(x) (((x)>>8) & 0x3) +#define EHCI_QTD_SET_PID(x) ((x) << 8) +#define EHCI_QTD_ACTIVE 0x80 +#define EHCI_QTD_HALTED 0x40 +#define EHCI_QTD_BUFERR 0x20 +#define EHCI_QTD_BABBLE 0x10 +#define EHCI_QTD_XACTERR 0x08 +#define EHCI_QTD_MISSEDMICRO 0x04 + volatile uint32_t qtd_buffer[EHCI_QTD_NBUFFERS]; + volatile uint32_t qtd_buffer_hi[EHCI_QTD_NBUFFERS]; + + /* Implementation extension */ + dma_addr_t qtd_self; /* own hardware address */ + struct ehci_qtd *obj_next; /* software link to the next QTD */ + void *rpc; /* pointer to the rpc buffer */ + size_t length; /* length of the data in the buffer */ + void *buff; /* pointer to the reassembly buffer */ + int xacterrs; /* retry counter for qtd xact error */ +} __attribute__ ((aligned(EHCI_QTD_ALIGN))); + +#define EHCI_NULL __constant_cpu_to_le32(1) /* HW null pointer shall be odd */ + +#define SHORT_READ_Q(token) (EHCI_QTD_GET_BYTES(token) != 0 && EHCI_QTD_GET_PID(token) == 1) + +/* Queue Head */ +/* NOTE This structure is slightly different from the one in the kernel; but needs to stay + * compatible + */ +struct ehci_qh { + /* Hardware map */ + volatile uint32_t qh_link; + volatile uint32_t qh_endp; + volatile uint32_t qh_endphub; + volatile uint32_t qh_curqtd; + + /* QTD overlay */ + volatile uint32_t ow_next; + volatile uint32_t ow_altnext; + volatile uint32_t ow_status; + volatile uint32_t ow_buffer [EHCI_QTD_NBUFFERS]; + volatile uint32_t ow_buffer_hi [EHCI_QTD_NBUFFERS]; + + /* Extension (should match the kernel layout) */ + dma_addr_t unused0; + void *unused1; + struct list_head unused2; + struct ehci_qtd *dummy; + struct ehci_qh *unused3; + + struct ehci_hcd *unused4; +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)) + struct kref unused5; + unsigned unused6; + + uint8_t unused7; + + /* periodic schedule info */ + uint8_t unused8; + uint8_t unused9; + uint8_t unused10; + uint16_t unused11; + uint16_t unused12; + uint16_t unused13; + struct usb_device *unused14; +#else + unsigned unused5; + u8 unused6; + + /* periodic schedule info */ + u8 unused7; + u8 unused8; + u8 unused9; + unsigned short unused10; + unsigned short unused11; +#define NO_FRAME ((unsigned short)~0) +#ifdef EHCI_QUIRK_FIX + struct usb_device *unused12; +#endif /* EHCI_QUIRK_FIX */ +#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)) */ + struct ehci_qtd *first_qtd; + /* Link to the first QTD; this is an optimized equivalent of the qtd_list field */ + /* NOTE that ehci_qh in ehci.h shall reserve this word */ +} __attribute__ ((aligned(EHCI_QTD_ALIGN))); + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)) +/* The corresponding structure in the kernel is used to get the QH */ +struct hcd_dev { /* usb_device.hcpriv points to this */ + struct list_head unused0; + struct list_head unused1; + + /* array of QH pointers */ + void *ep[32]; +}; +#endif /* (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)) */ +#endif /* EHCI_FASTPATH_TX || EHCI_FASTPATH_RX */ + +/* + * Public Bus Function Interface + */ +extern int dbus_register(int vid, int pid, probe_cb_t prcb, disconnect_cb_t discb, void *prarg, + void *param1, void *param2); +extern int dbus_deregister(void); +extern dbus_pub_t *dbus_attach(struct osl_info *osh, int rxsize, int nrxq, int ntxq, + void *cbarg, dbus_callbacks_t *cbs, dbus_extdl_t *extdl, struct shared_info *sh); +extern void dbus_detach(dbus_pub_t *pub); +extern int dbus_up(dbus_pub_t *pub); +extern int dbus_down(dbus_pub_t *pub); +extern int dbus_stop(dbus_pub_t *pub); +extern int dbus_shutdown(dbus_pub_t *pub); +extern void dbus_flowctrl_rx(dbus_pub_t *pub, bool on); +extern int dbus_send_buf(dbus_pub_t *pub, uint8 *buf, int len, void *info); +extern int dbus_send_pkt(dbus_pub_t *pub, void *pkt, void *info); +extern int dbus_send_ctl(dbus_pub_t *pub, uint8 *buf, int len); +extern int dbus_recv_ctl(dbus_pub_t *pub, uint8 *buf, int len); +extern int dbus_recv_bulk(dbus_pub_t *pub, uint32 ep_idx); +extern int dbus_get_stats(dbus_pub_t *pub, dbus_stats_t *stats); +extern int dbus_get_attrib(dbus_pub_t *pub, dbus_attrib_t *attrib); +extern int dbus_get_device_speed(dbus_pub_t *pub); +extern int dbus_set_config(dbus_pub_t *pub, dbus_config_t *config); +extern int dbus_get_config(dbus_pub_t *pub, dbus_config_t *config); +extern void * dbus_get_devinfo(dbus_pub_t *pub); +extern void *dbus_pktget(dbus_pub_t *pub, int len); +extern void dbus_pktfree(dbus_pub_t *pub, void* pkt); +extern int dbus_set_errmask(dbus_pub_t *pub, uint32 mask); +extern int dbus_pnp_sleep(dbus_pub_t *pub); +extern int dbus_pnp_resume(dbus_pub_t *pub, int *fw_reload); +extern int dbus_pnp_disconnect(dbus_pub_t *pub); +extern int dbus_iovar_op(dbus_pub_t *pub, const char *name, + void *params, int plen, void *arg, int len, bool set); +extern void *dhd_dbus_txq(const dbus_pub_t *pub); +extern uint dhd_dbus_hdrlen(const dbus_pub_t *pub); +extern void dbus_flowctrl_tx(void *dbi, bool on); +#if defined(BCM_REQUEST_FW) +extern void *dbus_get_fw_nvfile(int devid, uint8 **fw, int *fwlen, int type, + uint16 boardtype, uint16 boardrev); +extern void dbus_release_fw_nvfile(void *firmware); +#endif /* #if defined(BCM_REQUEST_FW) */ + +/* + * Bus specific Interface + * Implemented by dbus_usb.c/dbus_sdio.c + */ +extern int dbus_bus_register(int vid, int pid, probe_cb_t prcb, disconnect_cb_t discb, void *prarg, + dbus_intf_t **intf, void *param1, void *param2); +extern int dbus_bus_deregister(void); +extern void dbus_bus_fw_get(void *bus, uint8 **fw, int *fwlen, int *decomp); + +/* + * Bus-specific and OS-specific Interface + * Implemented by dbus_usb_[linux/ndis].c/dbus_sdio_[linux/ndis].c + */ +extern int dbus_bus_osl_register(int vid, int pid, probe_cb_t prcb, disconnect_cb_t discb, + void *prarg, dbus_intf_t **intf, void *param1, void *param2); +extern int dbus_bus_osl_deregister(void); +extern int dbus_bus_osl_hw_register(int vid, int pid, probe_cb_t prcb, disconnect_cb_t discb, + void *prarg, dbus_intf_t **intf); +extern int dbus_bus_osl_hw_deregister(void); +extern uint usbdev_bulkin_eps(void); + +#if defined(EHCI_FASTPATH_TX) || defined(EHCI_FASTPATH_RX) +extern int optimize_qtd_fill_with_rpc(const dbus_pub_t *pub, int epn, struct ehci_qtd *qtd, + void *rpc, int token, int len); +extern int optimize_submit_async(struct ehci_qtd *qtd, int epn); +extern struct ehci_qtd *optimize_ehci_qtd_alloc(gfp_t flags); +extern void optimize_ehci_qtd_free(struct ehci_qtd *qtd); +extern void optimize_submit_rx_request(const dbus_pub_t *pub, int epn, struct ehci_qtd *qtd_in, + void *buf); +#endif /* EHCI_FASTPATH_TX || EHCI_FASTPATH_RX */ +#endif /* __DBUS_H__ */ diff --git a/external/cache/sources/wl/include/dhdioctl.h b/external/cache/sources/wl/include/dhdioctl.h new file mode 100644 index 0000000..14055b1 --- /dev/null +++ b/external/cache/sources/wl/include/dhdioctl.h @@ -0,0 +1,115 @@ +/* + * Definitions for ioctls to access DHD iovars. + * Based on wlioctl.h (for Broadcom 802.11abg driver). + * (Moves towards generic ioctls for BCM drivers/iovars.) + * + * Definitions subject to change without notice. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: dhdioctl.h 327775 2012-04-16 18:54:32Z $ + */ + +#ifndef _dhdioctl_h_ +#define _dhdioctl_h_ + +#include + + +/* require default structure packing */ +#define BWL_DEFAULT_PACKING +#include + + +/* Linux network driver ioctl encoding */ +typedef struct dhd_ioctl { + uint cmd; /* common ioctl definition */ + void *buf; /* pointer to user buffer */ + uint len; /* length of user buffer */ + bool set; /* get or set request (optional) */ + uint used; /* bytes read or written (optional) */ + uint needed; /* bytes needed (optional) */ + uint driver; /* to identify target driver */ +} dhd_ioctl_t; + +/* Underlying BUS definition */ +enum { + BUS_TYPE_USB = 0, /* for USB dongles */ + BUS_TYPE_SDIO /* for SDIO dongles */ +}; + +/* per-driver magic numbers */ +#define DHD_IOCTL_MAGIC 0x00444944 + +/* bump this number if you change the ioctl interface */ +#define DHD_IOCTL_VERSION 1 + +#define DHD_IOCTL_MAXLEN 8192 /* max length ioctl buffer required */ +#define DHD_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */ + +/* common ioctl definitions */ +#define DHD_GET_MAGIC 0 +#define DHD_GET_VERSION 1 +#define DHD_GET_VAR 2 +#define DHD_SET_VAR 3 + +/* message levels */ +#define DHD_ERROR_VAL 0x0001 +#define DHD_TRACE_VAL 0x0002 +#define DHD_INFO_VAL 0x0004 +#define DHD_DATA_VAL 0x0008 +#define DHD_CTL_VAL 0x0010 +#define DHD_TIMER_VAL 0x0020 +#define DHD_HDRS_VAL 0x0040 +#define DHD_BYTES_VAL 0x0080 +#define DHD_INTR_VAL 0x0100 +#define DHD_LOG_VAL 0x0200 +#define DHD_GLOM_VAL 0x0400 +#define DHD_EVENT_VAL 0x0800 +#define DHD_BTA_VAL 0x1000 +#if 0 && (NDISVER >= 0x0630) && 1 +#define DHD_SCAN_VAL 0x2000 +#else +#define DHD_ISCAN_VAL 0x2000 +#endif +#define DHD_ARPOE_VAL 0x4000 + +#ifdef SDTEST +/* For pktgen iovar */ +typedef struct dhd_pktgen { + uint version; /* To allow structure change tracking */ + uint freq; /* Max ticks between tx/rx attempts */ + uint count; /* Test packets to send/rcv each attempt */ + uint print; /* Print counts every attempts */ + uint total; /* Total packets (or bursts) */ + uint minlen; /* Minimum length of packets to send */ + uint maxlen; /* Maximum length of packets to send */ + uint numsent; /* Count of test packets sent */ + uint numrcvd; /* Count of test packets received */ + uint numfail; /* Count of test send failures */ + uint mode; /* Test mode (type of test packets) */ + uint stop; /* Stop after this many tx failures */ +} dhd_pktgen_t; + +/* Version in case structure changes */ +#define DHD_PKTGEN_VERSION 2 + +/* Type of test packets to use */ +#define DHD_PKTGEN_ECHO 1 /* Send echo requests */ +#define DHD_PKTGEN_SEND 2 /* Send discard packets */ +#define DHD_PKTGEN_RXBURST 3 /* Request dongle send N packets */ +#define DHD_PKTGEN_RECV 4 /* Continuous rx from continuous tx dongle */ +#endif /* SDTEST */ + +/* Enter idle immediately (no timeout) */ +#define DHD_IDLE_IMMEDIATE (-1) + +/* Values for idleclock iovar: other values are the sd_divisor to use when idle */ +#define DHD_IDLE_ACTIVE 0 /* Do not request any SD clock change when idle */ +#define DHD_IDLE_STOP (-1) /* Request SD clock be stopped (and use SD1 mode) */ + + +/* require default structure packing */ +#include + +#endif /* _dhdioctl_h_ */ diff --git a/external/cache/sources/wl/include/epivers.h b/external/cache/sources/wl/include/epivers.h new file mode 100644 index 0000000..73933b3 --- /dev/null +++ b/external/cache/sources/wl/include/epivers.h @@ -0,0 +1,38 @@ +/* + * $Copyright Open Broadcom Corporation$ + * + * $Id: epivers.h.in,v 13.33 2010-09-08 22:08:53 csm Exp $ + * +*/ + +#ifndef _epivers_h_ +#define _epivers_h_ + +#define EPI_MAJOR_VERSION 6 + +#define EPI_MINOR_VERSION 37 + +#define EPI_RC_NUMBER 32 + +#define EPI_INCREMENTAL_NUMBER 0 + +#define EPI_BUILD_NUMBER 1 + +#define EPI_VERSION 6, 37, 32, 0 + +#define EPI_VERSION_NUM 0x06252000 + +#define EPI_VERSION_DEV 6.37.32 + +/* Driver Version String, ASCII, 32 chars max */ +#ifdef BCMINTERNAL +#define EPI_VERSION_STR "6.37.32 (TOB) (r410874 BCMINT)" +#else +#ifdef WLTEST +#define EPI_VERSION_STR "6.37.32 (TOB) (r410874 WLTEST)" +#else +#define EPI_VERSION_STR "6.37.32 (TOB) (r410874)" +#endif +#endif /* BCMINTERNAL */ + +#endif /* _epivers_h_ */ diff --git a/external/cache/sources/wl/include/epivers.h.in b/external/cache/sources/wl/include/epivers.h.in new file mode 100644 index 0000000..f1136c8 --- /dev/null +++ b/external/cache/sources/wl/include/epivers.h.in @@ -0,0 +1,30 @@ +/* + * $Copyright Open Broadcom Corporation$ + * + * $Id: epivers.h.in,v 13.33 2010-09-08 22:08:53 $ + * +*/ + +#ifndef _epivers_h_ +#define _epivers_h_ + +#define EPI_MAJOR_VERSION @EPI_MAJOR_VERSION@ + +#define EPI_MINOR_VERSION @EPI_MINOR_VERSION@ + +#define EPI_RC_NUMBER @EPI_RC_NUMBER@ + +#define EPI_INCREMENTAL_NUMBER @EPI_INCREMENTAL_NUMBER@ + +#define EPI_BUILD_NUMBER @EPI_BUILD_NUMBER@ + +#define EPI_VERSION @EPI_VERSION@ + +#define EPI_VERSION_NUM @EPI_VERSION_NUM@ + +#define EPI_VERSION_DEV @EPI_VERSION_DEV@ + + +#define EPI_VERSION_STR "@EPI_VERSION_STR@@EPI_VERSION_TYPE@ (@VC_VERSION_NUM@)" + +#endif diff --git a/external/cache/sources/wl/include/epivers.sh b/external/cache/sources/wl/include/epivers.sh new file mode 100644 index 0000000..afbe351 --- /dev/null +++ b/external/cache/sources/wl/include/epivers.sh @@ -0,0 +1,333 @@ +#! /bin/bash +# +# Create the epivers.h file from epivers.h.in +# +# Epivers.h version support svn/sparse/gclient workspaces +# +# $Id: epivers.sh 389101 2013-03-05 17:23:14Z $ +# +# Version generation works off of svn property HeadURL, if +# not set it keys its versions from current svn workspace or +# via .gclient_info deps contents +# +# GetCompVer.py return value and action needed +# i. trunk => use current date as version string +# ii. local => use SVNURL expanded by HeadURL keyword +# iii. => use it as as is +# (some components can override and say give me native ver) +# iv. empty => +# a) If TAG is specified use it +# a) If no TAG is specified use date +# +# Contact: Prakash Dhavali +# Contact: hnd-software-scm-list +# + +# If the version header file already exists, increment its build number. +# Otherwise, create a new file. +if [ -f epivers.h ]; then + + # If REUSE_VERSION is set, epivers iteration is not incremented + # This can be used precommit and continuous integration projects + if [ -n "$REUSE_VERSION" ]; then + echo "Previous epivers.h exists. Skipping version increment" + exit 0 + fi + + build=$(grep EPI_BUILD_NUMBER epivers.h | sed -e "s,.*BUILD_NUMBER[ ]*,,") + build=$(expr ${build} + 1) + echo build=${build} + sed -e "s,.*_BUILD_NUMBER.*,#define EPI_BUILD_NUMBER ${build}," \ + < epivers.h > epivers.h.new + cp -p epivers.h epivers.h.prev + mv epivers.h.new epivers.h + exit 0 + +else # epivers.h doesn't exist + + SVNCMD=${SVNCMD:-"svn --non-interactive"} + SRCBASE=${SRCBASE:-..} + NULL=/dev/null + [ -z "$VERBOSE" ] || NULL=/dev/stderr + + # Check for the in file, if not there we're in the wrong directory + if [ ! -f epivers.h.in ]; then + echo "ERROR: No epivers.h.in found" + exit 1 + fi + + # Following SVNURL should be expanded on checkout + SVNURL='$HeadURL: http://svn.sj.broadcom.com/svn/wlansvn/proj/tags/AARDVARK/AARDVARK_REL_6_30_254/src/include/epivers.sh $' + + # .gclient_info is created by gclient checkout/sync steps + # and contains "DEPS=' ..." entry + GCLIENT_INFO=${GCLIENT_INFO:-${SRCBASE}/../.gclient_info} + + # In gclient, derive SVNURL from gclient_info file + if [ -s "${GCLIENT_INFO}" ]; then + source ${GCLIENT_INFO} + if [ -z "$DEPS" ]; then + echo "ERROR: DEPS entry missing in $GCLIENT_INFO" + exit 1 + else + for dep in $DEPS; do + SVNURL=${SVNURL:-$dep} + # Set SVNURL to first DEPS with /tags/ (if any) + if [[ $dep == */tags/* ]]; then + SVNURL=$dep + echo "INFO: Found gclient DEPS: $SVNURL" + break + fi + done + fi + elif [ -f "${GCLIENT_INFO}" ]; then + echo "ERROR: $GCLIENT_INFO exists, but it is empty" + exit 1 + fi + + # If SVNURL isn't expanded, extract it from svn info + if echo "$SVNURL" | egrep -vq 'HeadURL.*epivers.sh.*|http://.*/DEPS'; then + [ -n "$VERBOSE" ] && \ + echo "DBG: SVN URL ($SVNURL) wasn't expanded. Getting it from svn info" + SVNURL=$($SVNCMD info epivers.sh 2> $NULL | egrep "^URL:") + fi + + if echo "${TAG}" | grep -q "_BRANCH_\|_TWIG_"; then + branchtag=$TAG + else + branchtag="" + fi + + # If this is a tagged build, use the tag to supply the numbers + # Tag should be in the form + # _REL__ + # or + # _REL___RC + # or + # _REL___RC_ + + MERGERLOG=${SRCBASE}/../merger_sources.log + GETCOMPVER=getcompver.py + GETCOMPVER_NET=/projects/hnd_software/gallery/src/tools/build/$GETCOMPVER + GETCOMPVER_NET_WIN=Z:${GETCOMPVER_NET} + + # + # If there is a local copy GETCOMPVER use it ahead of network copy + # + if [ -s "$GETCOMPVER" ]; then + GETCOMPVER_PATH="$GETCOMPVER" + elif [ -s "${SRCBASE}/../src/tools/build/$GETCOMPVER" ]; then + GETCOMPVER_PATH="${SRCBASE}/../src/tools/build/$GETCOMPVER" + elif [ -s "$GETCOMPVER_NET" ]; then + GETCOMPVER_PATH="$GETCOMPVER_NET" + elif [ -s "$GETCOMPVER_NET_WIN" ]; then + GETCOMPVER_PATH="$GETCOMPVER_NET_WIN" + fi + + # + # If $GETCOMPVER isn't found, fetch it from SVN + # (this should be very rare) + # + if [ ! -s "$GETCOMPVER_PATH" ]; then + [ -n "$VERBOSE" ] && \ + echo "DBG: Fetching $GETCOMPVER from trunk" + + $SVNCMD export -q \ + ^/proj/trunk/src/tools/build/${GETCOMPVER} \ + ${GETCOMPVER} 2> $NULL + + GETCOMPVER_PATH=$GETCOMPVER + fi + + # Now get tag for src/include from automerger log + [ -n "$VERBOSE" ] && \ + echo "DBG: python $GETCOMPVER_PATH $MERGERLOG src/include" + + COMPTAG=$(python $GETCOMPVER_PATH $MERGERLOG src/include 2> $NULL | sed -e 's/[[:space:]]*//g') + + echo "DBG: Component Tag String Derived = $COMPTAG" + + # Process COMPTAG values + # Rule: + # If trunk is returned, use date as component tag + # If LOCAL_COMPONENT is returned, use SVN URL to get native tag + # If component is returned or empty, assign it to SVNTAG + # GetCompVer.py return value and action needed + # i. trunk => use current date as version string + # ii. local => use SVNURL expanded by HeadURL keyword + # iii. => use it as as is + # iv. empty => + # a) If TAG is specified use it + # a) If no TAG is specified use SVNURL from HeadURL + + SVNURL_VER=false + + if [ "$COMPTAG" == "" ]; then + SVNURL_VER=true + elif [ "$COMPTAG" == "LOCAL_COMPONENT" ]; then + SVNURL_VER=true + elif [ "$COMPTAG" == "trunk" ]; then + SVNTAG=$(date '+TRUNKCOMP_REL_%Y_%m_%d') + else + SVNTAG=$COMPTAG + fi + + # Given SVNURL path conventions or naming conventions, derive SVNTAG + # TO-DO: SVNTAG derivation logic can move to a central common API + # TO-DO: ${SRCBASE}/tools/build/svnurl2tag.sh + if [ "$SVNURL_VER" == "true" ]; then + case "${SVNURL}" in + *_BRANCH_*) + SVNTAG=$(echo $SVNURL | tr '/' '\n' | awk '/_BRANCH_/{printf "%s",$1}') + ;; + *_TWIG_*) + SVNTAG=$(echo $SVNURL | tr '/' '\n' | awk '/_TWIG_/{printf "%s",$1}') + ;; + *_REL_*) + SVNTAG=$(echo $SVNURL | tr '/' '\n' | awk '/_REL_/{printf "%s",$1}') + ;; + */branches/*) + SVNTAG=${SVNURL#*/branches/} + SVNTAG=${SVNTAG%%/*} + ;; + */proj/tags/*|*/deps/tags/*) + SVNTAG=${SVNURL#*/tags/*/} + SVNTAG=${SVNTAG%%/*} + ;; + */trunk/*) + SVNTAG=$(date '+TRUNKURL_REL_%Y_%m_%d') + ;; + *) + SVNTAG=$(date '+OTHER_REL_%Y_%m_%d') + ;; + esac + echo "DBG: Native Tag String Derived from URL: $SVNTAG" + else + echo "DBG: Native Tag String Derived: $SVNTAG" + fi + + TAG=${SVNTAG} + + # Normalize the branch name portion to "D11" in case it has underscores in it + branch_name=$(expr match "$TAG" '\(.*\)_\(BRANCH\|TWIG\|REL\)_.*') + TAG=$(echo $TAG | sed -e "s%^$branch_name%D11%") + + # Split the tag into an array on underbar or whitespace boundaries. + IFS="_ " tag=(${TAG}) + unset IFS + + tagged=1 + if [ ${#tag[*]} -eq 0 ]; then + tag=($(date '+TOT REL %Y %m %d 0 %y')); + # reconstruct a TAG from the date + TAG=${tag[0]}_${tag[1]}_${tag[2]}_${tag[3]}_${tag[4]}_${tag[5]} + tagged=0 + fi + + # Allow environment variable to override values. + # Missing values default to 0 + # + maj=${EPI_MAJOR_VERSION:-${tag[2]:-0}} + min=${EPI_MINOR_VERSION:-${tag[3]:-0}} + rcnum=${EPI_RC_NUMBER:-${tag[4]:-0}} + + # If increment field is 0, set it to date suffix if on TOB + if [ -n "$branchtag" ]; then + [ "${tag[5]:-0}" -eq 0 ] && echo "Using date suffix for incr" + today=${EPI_DATE_STR:-$(date '+%Y%m%d')} + incremental=${EPI_INCREMENTAL_NUMBER:-${tag[5]:-${today:-0}}} + else + incremental=${EPI_INCREMENTAL_NUMBER:-${tag[5]:-0}} + fi + origincr=${EPI_INCREMENTAL_NUMBER:-${tag[5]:-0}} + build=${EPI_BUILD_NUMBER:-0} + + # Strip 'RC' from front of rcnum if present + rcnum=${rcnum/#RC/} + + # strip leading zero off the number (otherwise they look like octal) + maj=${maj/#0/} + min=${min/#0/} + rcnum=${rcnum/#0/} + incremental=${incremental/#0/} + origincr=${origincr/#0/} + build=${build/#0/} + + # some numbers may now be null. replace with with zero. + maj=${maj:-0} + min=${min:-0} + + rcnum=${rcnum:-0} + incremental=${incremental:-0} + origincr=${origincr:-0} + build=${build:-0} + + if [ -n "$EPI_VERSION_NUM" ]; then + vernum=$EPI_VERSION_NUM + elif [ ${tagged} -eq 1 ]; then + # vernum is 32chars max + vernum=$(printf "0x%02x%02x%02x%02x" ${maj} ${min} ${rcnum} ${origincr}) + else + vernum=$(printf "0x00%02x%02x%02x" ${tag[7]} ${min} ${rcnum}) + fi + + # make sure the size of vernum is under 32 bits. + # Otherwise, truncate. The string will keep full information. + vernum=${vernum:0:10} + + # build the string directly from the tag, irrespective of its length + # remove the name , the tag type, then replace all _ by . + tag_ver_str=${TAG/${tag[0]}_} + tag_ver_str=${tag_ver_str/${tag[1]}_} + tag_ver_str=${tag_ver_str//_/.} + + # record tag type + tagtype= + + if [ "${tag[1]}" = "BRANCH" -o "${tag[1]}" = "TWIG" ]; then + tagtype=" (TOB)" + echo "tag type: $tagtype" + fi + + echo "Effective version string: $tag_ver_str" + + if [ "$(uname -s)" == "Darwin" ]; then + # Mac does not like 2-digit numbers so convert the number to single + # digit. 5.100 becomes 5.1 + if [ $min -gt 99 ]; then + minmac=$(expr $min / 100) + else + minmac=$min + fi + epi_ver_dev="${maj}.${minmac}.0" + else + epi_ver_dev="${maj}.${min}.${rcnum}" + fi + + # Finally get version control revision number of (if any) + vc_version_num=$($SVNCMD info ${SRCBASE} 2> $NULL | awk -F': ' '/^Last Changed Rev: /{printf "%s", $2}') + + # OK, go do it + echo "maj=${maj}, min=${min}, rc=${rcnum}, inc=${incremental}, build=${build}" + + sed \ + -e "s;@EPI_MAJOR_VERSION@;${maj};" \ + -e "s;@EPI_MINOR_VERSION@;${min};" \ + -e "s;@EPI_RC_NUMBER@;${rcnum};" \ + -e "s;@EPI_INCREMENTAL_NUMBER@;${incremental};" \ + -e "s;@EPI_BUILD_NUMBER@;${build};" \ + -e "s;@EPI_VERSION@;${maj}, ${min}, ${rcnum}, ${incremental};" \ + -e "s;@EPI_VERSION_STR@;${tag_ver_str};" \ + -e "s;@EPI_VERSION_TYPE@;${tagtype};" \ + -e "s;@VERSION_TYPE@;${tagtype};" \ + -e "s;@EPI_VERSION_NUM@;${vernum};" \ + -e "s;@EPI_VERSION_DEV@;${epi_ver_dev};" \ + -e "s;@VC_VERSION_NUM@;r${vc_version_num};" \ + < epivers.h.in > epivers.h + + # In shared workspaces across different platforms, ensure that + # windows generated file is made platform neutral without CRLF + if uname -s | egrep -i -q "cygwin"; then + dos2unix epivers.h > $NULL 2>&1 + fi +fi # epivers.h diff --git a/external/cache/sources/wl/include/event_log.h b/external/cache/sources/wl/include/event_log.h new file mode 100644 index 0000000..ab861dc --- /dev/null +++ b/external/cache/sources/wl/include/event_log.h @@ -0,0 +1,229 @@ +/* + * EVENT_LOG system definitions + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: event_log.h 241182 2011-02-17 21:50:03Z $ + */ + +#ifndef _EVENT_LOG_H_ +#define _EVENT_LOG_H_ + + +/* Set a maximum number of sets here. It is not dynamic for + * efficiency of the EVENT_LOG calls. + */ +#define NUM_EVENT_LOG_SETS 4 + +/* Define new event log tags here */ +#define EVENT_LOG_TAG_NULL 0 /* Special null tag */ +#define EVENT_LOG_TAG_TS 1 /* Special timestamp tag */ +#define EVENT_LOG_TAG_BUS_OOB 2 +#define EVENT_LOG_TAG_BUS_STATE 3 +#define EVENT_LOG_TAG_BUS_PROTO 4 +#define EVENT_LOG_TAG_BUS_CTL 5 +#define EVENT_LOG_TAG_BUS_EVENT 6 +#define EVENT_LOG_TAG_BUS_PKT 7 +#define EVENT_LOG_TAG_BUS_FRAME 8 +#define EVENT_LOG_TAG_BUS_DESC 9 +#define EVENT_LOG_TAG_BUS_SETUP 10 +#define EVENT_LOG_TAG_BUS_MISC 11 +#define EVENT_LOG_TAG_MAX 11 + +/* Flags for tag control */ +#define EVENT_LOG_TAG_FLAG_NONE 0 +#define EVENT_LOG_TAG_FLAG_LOG 0x80 +#define EVENT_LOG_TAG_FLAG_PRINT 0x40 +#define EVENT_LOG_TAG_FLAG_MASK 0x3f + +/* We make sure that the block size will fit in a single packet + * (allowing for a bit of overhead on each packet + */ +#define EVENT_LOG_MAX_BLOCK_SIZE 1400 + +/* + * There are multiple levels of objects define here: + * event_log_set - a set of buffers + * event log groups - every event log call is part of just one. All + * event log calls in a group are handled the + * same way. Each event log group is associated + * with an event log set or is off. + */ + +#ifndef __ASSEMBLER__ + +/* On the external system where the dumper is we need to make sure + * that these types are the same size as they are on the ARM the + * produced them + */ +#ifdef EVENT_LOG_DUMPER +#define _EL_BLOCK_PTR uint32 +#define _EL_TYPE_PTR uint32 +#define _EL_SET_PTR uint32 +#define _EL_TOP_PTR uint32 +#else +#define _EL_BLOCK_PTR struct event_log_block * +#define _EL_TYPE_PTR uint32 * +#define _EL_SET_PTR struct event_log_set ** +#define _EL_TOP_PTR struct event_log_top * +#endif /* EVENT_LOG_DUMPER */ + +/* Each event log entry has a type. The type is the LAST word of the + * event log. The printing code walks the event entries in reverse + * order to find the first entry. + */ +typedef union event_log_hdr { + struct { + uint8 tag; /* Event_log entry tag */ + uint8 count; /* Count of 4-byte entries */ + uint16 fmt_num; /* Format number */ + }; + uint32 t; /* Type cheat */ +} event_log_hdr_t; + +/* Event log sets (a logical circurlar buffer) consist of one or more + * event_log_blocks. The blocks themselves form a logical circular + * list. The log entries are placed in each event_log_block until it + * is full. Logging continues with the next event_log_block in the + * event_set until the last event_log_block is reached and then + * logging starts over with the first event_log_block in the + * event_set. + */ +typedef struct event_log_block { + _EL_BLOCK_PTR next_block; + _EL_BLOCK_PTR prev_block; + _EL_TYPE_PTR end_ptr; + + /* Start of packet sent for log tracing */ + uint16 pktlen; /* Size of rest of block */ + uint16 count; /* Logtrace counter */ + uint32 timestamp; /* Timestamp at start of use */ + uint32 event_logs; +} event_log_block_t; + +/* There can be multiple event_sets with each logging a set of + * associated events (i.e, "fast" and "slow" events). + */ +typedef struct event_log_set { + _EL_BLOCK_PTR first_block; /* Pointer to first event_log block */ + _EL_BLOCK_PTR last_block; /* Pointer to last event_log block */ + _EL_BLOCK_PTR logtrace_block; /* next block traced */ + _EL_BLOCK_PTR cur_block; /* Pointer to current event_log block */ + _EL_TYPE_PTR cur_ptr; /* Current event_log pointer */ + uint32 blockcount; /* Number of blocks */ + uint16 logtrace_count; /* Last count for logtrace */ + uint16 blockfill_count; /* Fill count for logtrace */ + uint32 timestamp; /* Last timestamp event */ + uint32 cyclecount; /* Cycles at last timestamp event */ +} event_log_set_t; + +/* Top data structure for access to everything else */ +typedef struct event_log_top { + uint32 magic; +#define EVENT_LOG_TOP_MAGIC 0x474C8669 /* 'EVLG' */ + uint32 version; +#define EVENT_LOG_VERSION 1 + uint32 num_sets; + uint32 logstrs_size; /* Size of lognums + logstrs area */ + uint32 timestamp; /* Last timestamp event */ + uint32 cyclecount; /* Cycles at last timestamp event */ + _EL_SET_PTR sets; /* Ptr to array of set ptrs */ +} event_log_top_t; + +#ifndef EVENT_LOG_DUMPER + +#ifndef EVENT_LOG_COMPILE + +/* Null define if no tracing */ +#define EVENT_LOG(format, ...) + +#else /* EVENT_LOG_COMPILE */ + +/* The first few are special because they can be done more efficiently + * this way and they are the common case. Once there are too many + * parameters the code size starts to be an issue and a loop is better + */ +#define _EVENT_LOG0(tag, fmt_num) \ + event_log0(tag, fmt_num) +#define _EVENT_LOG1(tag, fmt_num, t1) \ + event_log1(tag, fmt_num, t1) +#define _EVENT_LOG2(tag, fmt_num, t1, t2) \ + event_log2(tag, fmt_num, t1, t2) +#define _EVENT_LOG3(tag, fmt_num, t1, t2, t3) \ + event_log3(tag, fmt_num, t1, t2, t3) +#define _EVENT_LOG4(tag, fmt_num, t1, t2, t3, t4) \ + event_log4(tag, fmt_num, t1, t2, t3, t4) + +/* The rest call the generic routine that takes a count */ +#define _EVENT_LOG5(tag, fmt_num, ...) event_logn(5, tag, fmt_num, __VA_ARGS__) +#define _EVENT_LOG6(tag, fmt_num, ...) event_logn(6, tag, fmt_num, __VA_ARGS__) +#define _EVENT_LOG7(tag, fmt_num, ...) event_logn(7, tag, fmt_num, __VA_ARGS__) +#define _EVENT_LOG8(tag, fmt_num, ...) event_logn(8, tag, fmt_num, __VA_ARGS__) +#define _EVENT_LOG9(tag, fmt_num, ...) event_logn(9, tag, fmt_num, __VA_ARGS__) +#define _EVENT_LOGa(tag, fmt_num, ...) event_logn(10, tag, fmt_num, __VA_ARGS__) +#define _EVENT_LOGb(tag, fmt_num, ...) event_logn(11, tag, fmt_num, __VA_ARGS__) +#define _EVENT_LOGc(tag, fmt_num, ...) event_logn(12, tag, fmt_num, __VA_ARGS__) +#define _EVENT_LOGd(tag, fmt_num, ...) event_logn(13, tag, fmt_num, __VA_ARGS__) +#define _EVENT_LOGe(tag, fmt_num, ...) event_logn(14, tag, fmt_num, __VA_ARGS__) +#define _EVENT_LOGf(tag, fmt_num, ...) event_logn(15, tag, fmt_num, __VA_ARGS__) + +/* Hack to make the proper routine call when variadic macros get + * passed. Note the max of 15 arguments. More than that can't be + * handled by the event_log entries anyways so best to catch it at compile + * time + */ + +#define _EVENT_LOG_VA_NUM_ARGS(F, _1, _2, _3, _4, _5, _6, _7, _8, _9, \ + _A, _B, _C, _D, _E, _F, N, ...) F ## N + +#define _EVENT_LOG(tag, fmt, ...) \ + static char logstr[] __attribute__ ((section(".logstrs"))) = fmt; \ + static uint32 fmtnum __attribute__ ((section(".lognums"))) = (uint32) &logstr; \ + _EVENT_LOG_VA_NUM_ARGS(_EVENT_LOG, ##__VA_ARGS__, \ + F, E, D, C, B, A, 9, 8, \ + 7, 6, 5, 4, 3, 2, 1, 0) \ + (tag, (int) &fmtnum , ## __VA_ARGS__); \ + + +#define EVENT_LOG_FAST(tag, fmt, ...) \ + if (event_log_tag_sets != NULL) { \ + uint8 tag_flag = *(event_log_tag_sets + tag); \ + if (tag_flag != 0) { \ + _EVENT_LOG(tag, fmt , ## __VA_ARGS__); \ + } \ + } + +#define EVENT_LOG_COMPACT(tag, fmt, ...) \ + if (1) { \ + _EVENT_LOG(tag, fmt , ## __VA_ARGS__); \ + } + +#define EVENT_LOG(tag, fmt, ...) EVENT_LOG_COMPACT(tag, fmt , ## __VA_ARGS__) + +extern uint8 *event_log_tag_sets; + +extern int event_log_init(si_t *sih); +extern int event_log_set_init(si_t *sih, int set_num, int size); +extern int event_log_set_expand(si_t *sih, int set_num, int size); +extern int event_log_set_shrink(si_t *sih, int set_num, int size); +extern int event_log_tag_start(int tag, int set_num, int flags); +extern int event_log_tag_stop(int tag); +extern int event_log_get(int set_num, int buflen, void *buf); +extern uint8 * event_log_next_logtrace(int set_num); + +extern void event_log0(int tag, int fmtNum); +extern void event_log1(int tag, int fmtNum, uint32 t1); +extern void event_log2(int tag, int fmtNum, uint32 t1, uint32 t2); +extern void event_log3(int tag, int fmtNum, uint32 t1, uint32 t2, uint32 t3); +extern void event_log4(int tag, int fmtNum, uint32 t1, uint32 t2, uint32 t3, uint32 t4); +extern void event_logn(int num_args, int tag, int fmtNum, ...); + +extern void event_log_time_sync(void); + +#endif /* EVENT_LOG_DUMPER */ + +#endif /* EVENT_LOG_COMPILE */ + +#endif /* __ASSEMBLER__ */ + +#endif /* _EVENT_LOG_H */ diff --git a/external/cache/sources/wl/include/hnddma.h b/external/cache/sources/wl/include/hnddma.h new file mode 100644 index 0000000..94ce338 --- /dev/null +++ b/external/cache/sources/wl/include/hnddma.h @@ -0,0 +1,284 @@ +/* + * Generic Broadcom Home Networking Division (HND) DMA engine SW interface + * This supports the following chips: BCM42xx, 44xx, 47xx . + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: hnddma.h 365056 2012-10-26 12:00:34Z maheshd $ + */ + +#ifndef _hnddma_h_ +#define _hnddma_h_ + +#ifndef _hnddma_pub_ +#define _hnddma_pub_ +typedef const struct hnddma_pub hnddma_t; +#endif /* _hnddma_pub_ */ + +/* range param for dma_getnexttxp() and dma_txreclaim */ +typedef enum txd_range { + HNDDMA_RANGE_ALL = 1, + HNDDMA_RANGE_TRANSMITTED, + HNDDMA_RANGE_TRANSFERED +} txd_range_t; + +/* dma function type */ +typedef void (*di_detach_t)(hnddma_t *dmah); +typedef bool (*di_txreset_t)(hnddma_t *dmah); +typedef bool (*di_rxreset_t)(hnddma_t *dmah); +typedef bool (*di_rxidle_t)(hnddma_t *dmah); +typedef void (*di_txinit_t)(hnddma_t *dmah); +typedef bool (*di_txenabled_t)(hnddma_t *dmah); +typedef void (*di_rxinit_t)(hnddma_t *dmah); +typedef void (*di_txsuspend_t)(hnddma_t *dmah); +typedef void (*di_txresume_t)(hnddma_t *dmah); +typedef bool (*di_txsuspended_t)(hnddma_t *dmah); +typedef bool (*di_txsuspendedidle_t)(hnddma_t *dmah); +#ifdef WL_MULTIQUEUE +typedef void (*di_txflush_t)(hnddma_t *dmah); +typedef void (*di_txflush_clear_t)(hnddma_t *dmah); +#endif /* WL_MULTIQUEUE */ +typedef int (*di_txfast_t)(hnddma_t *dmah, void *p, bool commit); +typedef int (*di_txunframed_t)(hnddma_t *dmah, void *p, uint len, bool commit); +typedef void* (*di_getpos_t)(hnddma_t *di, bool direction); +typedef void (*di_fifoloopbackenable_t)(hnddma_t *dmah); +typedef bool (*di_txstopped_t)(hnddma_t *dmah); +typedef bool (*di_rxstopped_t)(hnddma_t *dmah); +typedef bool (*di_rxenable_t)(hnddma_t *dmah); +typedef bool (*di_rxenabled_t)(hnddma_t *dmah); +typedef void* (*di_rx_t)(hnddma_t *dmah); +typedef bool (*di_rxfill_t)(hnddma_t *dmah); +typedef void (*di_txreclaim_t)(hnddma_t *dmah, txd_range_t range); +typedef void (*di_rxreclaim_t)(hnddma_t *dmah); +typedef uintptr (*di_getvar_t)(hnddma_t *dmah, const char *name); +typedef void* (*di_getnexttxp_t)(hnddma_t *dmah, txd_range_t range); +typedef void* (*di_getnextrxp_t)(hnddma_t *dmah, bool forceall); +typedef void* (*di_peeknexttxp_t)(hnddma_t *dmah); +typedef void* (*di_peekntxp_t)(hnddma_t *dmah, int *len, void *txps[], txd_range_t range); +typedef void* (*di_peeknextrxp_t)(hnddma_t *dmah); +typedef void (*di_rxparam_get_t)(hnddma_t *dmah, uint16 *rxoffset, uint16 *rxbufsize); +typedef void (*di_txblock_t)(hnddma_t *dmah); +typedef void (*di_txunblock_t)(hnddma_t *dmah); +typedef uint (*di_txactive_t)(hnddma_t *dmah); +typedef void (*di_txrotate_t)(hnddma_t *dmah); +typedef void (*di_counterreset_t)(hnddma_t *dmah); +typedef uint (*di_ctrlflags_t)(hnddma_t *dmah, uint mask, uint flags); +typedef char* (*di_dump_t)(hnddma_t *dmah, struct bcmstrbuf *b, bool dumpring); +typedef char* (*di_dumptx_t)(hnddma_t *dmah, struct bcmstrbuf *b, bool dumpring); +typedef char* (*di_dumprx_t)(hnddma_t *dmah, struct bcmstrbuf *b, bool dumpring); +typedef uint (*di_rxactive_t)(hnddma_t *dmah); +typedef uint (*di_txpending_t)(hnddma_t *dmah); +typedef uint (*di_txcommitted_t)(hnddma_t *dmah); +typedef int (*di_pktpool_set_t)(hnddma_t *dmah, pktpool_t *pool); +typedef bool (*di_rxtxerror_t)(hnddma_t *dmah, bool istx); +typedef void (*di_burstlen_set_t)(hnddma_t *dmah, uint8 rxburstlen, uint8 txburstlen); +typedef uint (*di_avoidancecnt_t)(hnddma_t *dmah); +typedef uint (*dma_active_rxbuf_t) (hnddma_t *dmah); + +/* dma opsvec */ +typedef struct di_fcn_s { + di_detach_t detach; + di_txinit_t txinit; + di_txreset_t txreset; + di_txenabled_t txenabled; + di_txsuspend_t txsuspend; + di_txresume_t txresume; + di_txsuspended_t txsuspended; + di_txsuspendedidle_t txsuspendedidle; +#ifdef WL_MULTIQUEUE + di_txflush_t txflush; + di_txflush_clear_t txflush_clear; +#endif /* WL_MULTIQUEUE */ + di_txfast_t txfast; + di_txunframed_t txunframed; + di_getpos_t getpos; + di_txstopped_t txstopped; + di_txreclaim_t txreclaim; + di_getnexttxp_t getnexttxp; + di_peeknexttxp_t peeknexttxp; + di_peekntxp_t peekntxp; + di_txblock_t txblock; + di_txunblock_t txunblock; + di_txactive_t txactive; + di_txrotate_t txrotate; + + di_rxinit_t rxinit; + di_rxreset_t rxreset; + di_rxidle_t rxidle; + di_rxstopped_t rxstopped; + di_rxenable_t rxenable; + di_rxenabled_t rxenabled; + di_rx_t rx; + di_rxfill_t rxfill; + di_rxreclaim_t rxreclaim; + di_getnextrxp_t getnextrxp; + di_peeknextrxp_t peeknextrxp; + di_rxparam_get_t rxparam_get; + + di_fifoloopbackenable_t fifoloopbackenable; + di_getvar_t d_getvar; + di_counterreset_t counterreset; + di_ctrlflags_t ctrlflags; + di_dump_t dump; + di_dumptx_t dumptx; + di_dumprx_t dumprx; + di_rxactive_t rxactive; + di_txpending_t txpending; + di_txcommitted_t txcommitted; + di_pktpool_set_t pktpool_set; + di_rxtxerror_t rxtxerror; + di_burstlen_set_t burstlen_set; + di_avoidancecnt_t avoidancecnt; +#ifdef WL_RXBUFF_EARLY_RC + dma_active_rxbuf_t dma_activerxbuf; +#endif + uint endnum; +} di_fcn_t; + +/* + * Exported data structure (read-only) + */ +/* export structure */ +struct hnddma_pub { + const di_fcn_t *di_fn; /* DMA function pointers */ + uint txavail; /* # free tx descriptors */ + uint dmactrlflags; /* dma control flags */ + + /* rx error counters */ + uint rxgiants; /* rx giant frames */ + uint rxnobuf; /* rx out of dma descriptors */ + /* tx error counters */ + uint txnobuf; /* tx out of dma descriptors */ + uint txnodesc; /* tx out of dma descriptors running count */ +}; + + +extern hnddma_t * dma_attach(osl_t *osh, const char *name, si_t *sih, + volatile void *dmaregstx, volatile void *dmaregsrx, + uint ntxd, uint nrxd, uint rxbufsize, int rxextheadroom, uint nrxpost, + uint rxoffset, uint *msg_level); +#ifdef BCMDMA32 + +#define dma_detach(di) ((di)->di_fn->detach(di)) +#define dma_txreset(di) ((di)->di_fn->txreset(di)) +#define dma_rxreset(di) ((di)->di_fn->rxreset(di)) +#define dma_rxidle(di) ((di)->di_fn->rxidle(di)) +#define dma_txinit(di) ((di)->di_fn->txinit(di)) +#define dma_txenabled(di) ((di)->di_fn->txenabled(di)) +#define dma_rxinit(di) ((di)->di_fn->rxinit(di)) +#define dma_txsuspend(di) ((di)->di_fn->txsuspend(di)) +#define dma_txresume(di) ((di)->di_fn->txresume(di)) +#define dma_txsuspended(di) ((di)->di_fn->txsuspended(di)) +#define dma_txsuspendedidle(di) ((di)->di_fn->txsuspendedidle(di)) +#ifdef WL_MULTIQUEUE +#define dma_txflush(di) ((di)->di_fn->txflush(di)) +#define dma_txflush_clear(di) ((di)->di_fn->txflush_clear(di)) +#endif /* WL_MULTIQUEUE */ +#define dma_txfast(di, p, commit) ((di)->di_fn->txfast(di, p, commit)) +#define dma_fifoloopbackenable(di) ((di)->di_fn->fifoloopbackenable(di)) +#define dma_txstopped(di) ((di)->di_fn->txstopped(di)) +#define dma_rxstopped(di) ((di)->di_fn->rxstopped(di)) +#define dma_rxenable(di) ((di)->di_fn->rxenable(di)) +#define dma_rxenabled(di) ((di)->di_fn->rxenabled(di)) +#define dma_rx(di) ((di)->di_fn->rx(di)) +#define dma_rxfill(di) ((di)->di_fn->rxfill(di)) +#define dma_txreclaim(di, range) ((di)->di_fn->txreclaim(di, range)) +#define dma_rxreclaim(di) ((di)->di_fn->rxreclaim(di)) +#define dma_getvar(di, name) ((di)->di_fn->d_getvar(di, name)) +#define dma_getnexttxp(di, range) ((di)->di_fn->getnexttxp(di, range)) +#define dma_getnextrxp(di, forceall) ((di)->di_fn->getnextrxp(di, forceall)) +#define dma_peeknexttxp(di) ((di)->di_fn->peeknexttxp(di)) +#define dma_peekntxp(di, l, t, r) ((di)->di_fn->peekntxp(di, l, t, r)) +#define dma_peeknextrxp(di) ((di)->di_fn->peeknextrxp(di)) +#define dma_rxparam_get(di, off, bufs) ((di)->di_fn->rxparam_get(di, off, bufs)) + +#define dma_txblock(di) ((di)->di_fn->txblock(di)) +#define dma_txunblock(di) ((di)->di_fn->txunblock(di)) +#define dma_txactive(di) ((di)->di_fn->txactive(di)) +#define dma_rxactive(di) ((di)->di_fn->rxactive(di)) +#define dma_txrotate(di) ((di)->di_fn->txrotate(di)) +#define dma_counterreset(di) ((di)->di_fn->counterreset(di)) +#define dma_ctrlflags(di, mask, flags) ((di)->di_fn->ctrlflags((di), (mask), (flags))) +#define dma_txpending(di) ((di)->di_fn->txpending(di)) +#define dma_txcommitted(di) ((di)->di_fn->txcommitted(di)) +#define dma_pktpool_set(di, pool) ((di)->di_fn->pktpool_set((di), (pool))) +#if defined(BCMDBG) || defined(BCMDBG_DUMP) +#define dma_dump(di, buf, dumpring) ((di)->di_fn->dump(di, buf, dumpring)) +#define dma_dumptx(di, buf, dumpring) ((di)->di_fn->dumptx(di, buf, dumpring)) +#define dma_dumprx(di, buf, dumpring) ((di)->di_fn->dumprx(di, buf, dumpring)) +#endif /* defined(BCMDBG) || defined(BCMDBG_DUMP) */ +#define dma_rxtxerror(di, istx) ((di)->di_fn->rxtxerror(di, istx)) +#define dma_burstlen_set(di, rxlen, txlen) ((di)->di_fn->burstlen_set(di, rxlen, txlen)) +#define dma_avoidance_cnt(di) ((di)->di_fn->avoidancecnt(di)) + +#else /* BCMDMA32 */ +extern const di_fcn_t dma64proc; + +#define dma_detach(di) (dma64proc.detach(di)) +#define dma_txreset(di) (dma64proc.txreset(di)) +#define dma_rxreset(di) (dma64proc.rxreset(di)) +#define dma_rxidle(di) (dma64proc.rxidle(di)) +#define dma_txinit(di) (dma64proc.txinit(di)) +#define dma_txenabled(di) (dma64proc.txenabled(di)) +#define dma_rxinit(di) (dma64proc.rxinit(di)) +#define dma_txsuspend(di) (dma64proc.txsuspend(di)) +#define dma_txresume(di) (dma64proc.txresume(di)) +#define dma_txsuspended(di) (dma64proc.txsuspended(di)) +#define dma_txsuspendedidle(di) (dma64proc.txsuspendedidle(di)) +#ifdef WL_MULTIQUEUE +#define dma_txflush(di) (dma64proc.txflush(di)) +#define dma_txflush_clear(di) (dma64proc.txflush_clear(di)) +#endif /* WL_MULTIQUEUE */ +#define dma_txfast(di, p, commit) (dma64proc.txfast(di, p, commit)) +#define dma_txunframed(di, p, l, commit)(dma64proc.txunframed(di, p, l, commit)) +#define dma_getpos(di, dir) (dma64proc.getpos(di, dir)) +#define dma_fifoloopbackenable(di) (dma64proc.fifoloopbackenable(di)) +#define dma_txstopped(di) (dma64proc.txstopped(di)) +#define dma_rxstopped(di) (dma64proc.rxstopped(di)) +#define dma_rxenable(di) (dma64proc.rxenable(di)) +#define dma_rxenabled(di) (dma64proc.rxenabled(di)) +#define dma_rx(di) (dma64proc.rx(di)) +#define dma_rxfill(di) (dma64proc.rxfill(di)) +#define dma_txreclaim(di, range) (dma64proc.txreclaim(di, range)) +#define dma_rxreclaim(di) (dma64proc.rxreclaim(di)) +#define dma_getvar(di, name) (dma64proc.d_getvar(di, name)) +#define dma_getnexttxp(di, range) (dma64proc.getnexttxp(di, range)) +#define dma_getnextrxp(di, forceall) (dma64proc.getnextrxp(di, forceall)) +#define dma_peeknexttxp(di) (dma64proc.peeknexttxp(di)) +#define dma_peekntxp(di, l, t, r) (dma64proc.peekntxp(di, l, t, r)) +#define dma_peeknextrxp(di) (dma64proc.peeknextrxp(di)) +#define dma_rxparam_get(di, off, bufs) (dma64proc.rxparam_get(di, off, bufs)) + +#define dma_txblock(di) (dma64proc.txblock(di)) +#define dma_txunblock(di) (dma64proc.txunblock(di)) +#define dma_txactive(di) (dma64proc.txactive(di)) +#define dma_rxactive(di) (dma64proc.rxactive(di)) +#define dma_txrotate(di) (dma64proc.txrotate(di)) +#define dma_counterreset(di) (dma64proc.counterreset(di)) +#define dma_ctrlflags(di, mask, flags) (dma64proc.ctrlflags((di), (mask), (flags))) +#define dma_txpending(di) (dma64proc.txpending(di)) +#define dma_txcommitted(di) (dma64proc.txcommitted(di)) +#define dma_pktpool_set(di, pool) (dma64proc.pktpool_set((di), (pool))) +#if defined(BCMDBG) || defined(BCMDBG_DUMP) +#define dma_dump(di, buf, dumpring) (dma64proc.dump(di, buf, dumpring)) +#define dma_dumptx(di, buf, dumpring) (dma64proc.dumptx(di, buf, dumpring)) +#define dma_dumprx(di, buf, dumpring) (dma64proc.dumprx(di, buf, dumpring)) +#endif +#define dma_rxtxerror(di, istx) (dma64proc.rxtxerror(di, istx)) +#define dma_burstlen_set(di, rxlen, txlen) (dma64proc.burstlen_set(di, rxlen, txlen)) +#define dma_avoidance_cnt(di) (dma64proc.avoidancecnt(di)) +#define dma_activerxbuf(di) (dma64proc.dma_activerxbuf(di)) + +#endif /* BCMDMA32 */ + +/* return addresswidth allowed + * This needs to be done after SB attach but before dma attach. + * SB attach provides ability to probe backplane and dma core capabilities + * This info is needed by DMA_ALLOC_CONSISTENT in dma attach + */ +extern uint dma_addrwidth(si_t *sih, void *dmaregs); + +/* pio helpers */ +extern void dma_txpioloopback(osl_t *osh, dma32regs_t *); + +#endif /* _hnddma_h_ */ diff --git a/external/cache/sources/wl/include/hndpmu.h b/external/cache/sources/wl/include/hndpmu.h new file mode 100644 index 0000000..e774942 --- /dev/null +++ b/external/cache/sources/wl/include/hndpmu.h @@ -0,0 +1,18 @@ +/* + * HND SiliconBackplane PMU support. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: hndpmu.h 393084 2013-03-26 07:34:45Z $ + */ + +#ifndef _hndpmu_h_ +#define _hndpmu_h_ + + +extern void si_pmu_otp_power(si_t *sih, osl_t *osh, bool on); +extern void si_sdiod_drive_strength_init(si_t *sih, osl_t *osh, uint32 drivestrength); + +extern void si_pmu_minresmask_htavail_set(si_t *sih, osl_t *osh, bool set_clear); + +#endif /* _hndpmu_h_ */ diff --git a/external/cache/sources/wl/include/hndrte_armtrap.h b/external/cache/sources/wl/include/hndrte_armtrap.h new file mode 100644 index 0000000..83adf38 --- /dev/null +++ b/external/cache/sources/wl/include/hndrte_armtrap.h @@ -0,0 +1,70 @@ +/* + * HNDRTE arm trap handling. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: hndrte_armtrap.h 261365 2011-05-24 20:42:23Z $ + */ + +#ifndef _hndrte_armtrap_h +#define _hndrte_armtrap_h + + +/* ARM trap handling */ + +/* Trap types defined by ARM (see arminc.h) */ + +/* Trap locations in lo memory */ +#define TRAP_STRIDE 4 +#define FIRST_TRAP TR_RST +#define LAST_TRAP (TR_FIQ * TRAP_STRIDE) + +#if defined(__ARM_ARCH_4T__) +#define MAX_TRAP_TYPE (TR_FIQ + 1) +#elif defined(__ARM_ARCH_7M__) +#define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS) +#endif /* __ARM_ARCH_7M__ */ + +/* The trap structure is defined here as offsets for assembly */ +#define TR_TYPE 0x00 +#define TR_EPC 0x04 +#define TR_CPSR 0x08 +#define TR_SPSR 0x0c +#define TR_REGS 0x10 +#define TR_REG(n) (TR_REGS + (n) * 4) +#define TR_SP TR_REG(13) +#define TR_LR TR_REG(14) +#define TR_PC TR_REG(15) + +#define TRAP_T_SIZE 80 + +#ifndef _LANGUAGE_ASSEMBLY + +#include + +typedef struct _trap_struct { + uint32 type; + uint32 epc; + uint32 cpsr; + uint32 spsr; + uint32 r0; /* a1 */ + uint32 r1; /* a2 */ + uint32 r2; /* a3 */ + uint32 r3; /* a4 */ + uint32 r4; /* v1 */ + uint32 r5; /* v2 */ + uint32 r6; /* v3 */ + uint32 r7; /* v4 */ + uint32 r8; /* v5 */ + uint32 r9; /* sb/v6 */ + uint32 r10; /* sl/v7 */ + uint32 r11; /* fp/v8 */ + uint32 r12; /* ip */ + uint32 r13; /* sp */ + uint32 r14; /* lr */ + uint32 pc; /* r15 */ +} trap_t; + +#endif /* !_LANGUAGE_ASSEMBLY */ + +#endif /* _hndrte_armtrap_h */ diff --git a/external/cache/sources/wl/include/hndrte_cons.h b/external/cache/sources/wl/include/hndrte_cons.h new file mode 100644 index 0000000..2069684 --- /dev/null +++ b/external/cache/sources/wl/include/hndrte_cons.h @@ -0,0 +1,60 @@ +/* + * Console support for hndrte. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: hndrte_cons.h 383575 2013-02-07 03:10:23Z $ + */ +#ifndef _HNDRTE_CONS_H +#define _HNDRTE_CONS_H + +#include + +#if defined(RWL_DONGLE) || defined(UART_REFLECTOR) +/* For Dongle uart tranport max cmd len is 256 bytes + header length (16 bytes) + * In case of ASD commands we are not sure about how much is the command size + * To be on the safe side, input buf len CBUF_LEN is increased to max (512) bytes. + */ +#define RWL_MAX_DATA_LEN (512 + 8) /* allow some extra bytes for '/n' termination */ +#define CBUF_LEN (RWL_MAX_DATA_LEN + 64) /* allow 64 bytes for header ("rwl...") */ +#else +#define CBUF_LEN (128) +#endif /* RWL_DONGLE || UART_REFLECTOR */ + +#define LOG_BUF_LEN 1024 + +typedef struct { + uint32 buf; /* Can't be pointer on (64-bit) hosts */ + uint buf_size; + uint idx; + char *_buf_compat; /* redundant pointer for backward compat. */ +} hndrte_log_t; + +typedef struct { + /* Virtual UART + * When there is no UART (e.g. Quickturn), the host should write a complete + * input line directly into cbuf and then write the length into vcons_in. + * This may also be used when there is a real UART (at risk of conflicting with + * the real UART). vcons_out is currently unused. + */ + volatile uint vcons_in; + volatile uint vcons_out; + + /* Output (logging) buffer + * Console output is written to a ring buffer log_buf at index log_idx. + * The host may read the output when it sees log_idx advance. + * Output will be lost if the output wraps around faster than the host polls. + */ + hndrte_log_t log; + + /* Console input line buffer + * Characters are read one at a time into cbuf until is received, then + * the buffer is processed as a command line. Also used for virtual UART. + */ + uint cbuf_idx; + char cbuf[CBUF_LEN]; +} hndrte_cons_t; + +hndrte_cons_t *hndrte_get_active_cons_state(void); + +#endif /* _HNDRTE_CONS_H */ diff --git a/external/cache/sources/wl/include/hndrte_debug.h b/external/cache/sources/wl/include/hndrte_debug.h new file mode 100644 index 0000000..65d1246 --- /dev/null +++ b/external/cache/sources/wl/include/hndrte_debug.h @@ -0,0 +1,95 @@ +/* + * HND Run Time Environment debug info area + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: hndrte_debug.h 342211 2012-07-02 02:23:04Z $ + */ + +#ifndef _HNDRTE_DEBUG_H +#define _HNDRTE_DEBUG_H + +/* Magic number at a magic location to find HNDRTE_DEBUG pointers */ +#define HNDRTE_DEBUG_PTR_PTR_MAGIC 0x50504244 /* DBPP */ + +#ifndef _LANGUAGE_ASSEMBLY + +/* Includes only when building dongle code */ + + +#define NUM_EVENT_LOG_SETS 4 + +/* We use explicit sizes here since this gets included from different + * systems. The sizes must be the size of the creating system + * (currently 32 bit ARM) since this is gleaned from dump. + */ + +/* Define pointers for use on other systems */ +#define _HD_EVLOG_P uint32 +#define _HD_CONS_P uint32 +#define _HD_TRAP_P uint32 + +typedef struct hndrte_debug { + uint32 magic; +#define HNDRTE_DEBUG_MAGIC 0x47424544 /* 'DEBG' */ + + uint32 version; /* Debug struct version */ +#define HNDRTE_DEBUG_VERSION 1 + + uint32 fwid; /* 4 bytes of fw info */ + char epivers[32]; + + _HD_TRAP_P trap_ptr; /* trap_t data struct */ + _HD_CONS_P console; /* Console */ + + uint32 ram_base; + uint32 ram_size; + + uint32 rom_base; + uint32 rom_size; + + _HD_EVLOG_P event_log_top; + +} hndrte_debug_t; + +/* + * timeval_t and prstatus_t are copies of the Linux structures. + * Included here because we need the definitions for the target processor + * (32 bits) and not the definition on the host this is running on + * (which could be 64 bits). + */ + +typedef struct { /* Time value with microsecond resolution */ + uint32 tv_sec; /* Seconds */ + uint32 tv_usec; /* Microseconds */ +} timeval_t; + + +/* Linux/ARM 32 prstatus for notes section */ +typedef struct prstatus { + int32 si_signo; /* Signal number */ + int32 si_code; /* Extra code */ + int32 si_errno; /* Errno */ + uint16 pr_cursig; /* Current signal. */ + uint16 unused; + uint32 pr_sigpend; /* Set of pending signals. */ + uint32 pr_sighold; /* Set of held signals. */ + uint32 pr_pid; + uint32 pr_ppid; + uint32 pr_pgrp; + uint32 pr_sid; + timeval_t pr_utime; /* User time. */ + timeval_t pr_stime; /* System time. */ + timeval_t pr_cutime; /* Cumulative user time. */ + timeval_t pr_cstime; /* Cumulative system time. */ + uint32 uregs[18]; + int32 pr_fpvalid; /* True if math copro being used. */ +} prstatus_t; + +#ifdef __GNUC__ +extern hndrte_debug_t hndrte_debug_info __attribute__ ((weak)); +#endif /* __GNUC__ */ + +#endif /* !LANGUAGE_ASSEMBLY */ + +#endif /* _HNDRTE_DEBUG_H */ diff --git a/external/cache/sources/wl/include/hndsoc.h b/external/cache/sources/wl/include/hndsoc.h new file mode 100644 index 0000000..b3e31bd --- /dev/null +++ b/external/cache/sources/wl/include/hndsoc.h @@ -0,0 +1,259 @@ +/* + * Broadcom HND chip & on-chip-interconnect-related definitions. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: hndsoc.h 365038 2012-10-26 08:49:46Z $ + */ + +#ifndef _HNDSOC_H +#define _HNDSOC_H + +/* Include the soci specific files */ +#include +#include + +/* + * SOC Interconnect Address Map. + * All regions may not exist on all chips. + */ +#define SI_SDRAM_BASE 0x00000000 /* Physical SDRAM */ +#define SI_PCI_MEM 0x08000000 /* Host Mode sb2pcitranslation0 (64 MB) */ +#define SI_PCI_MEM_SZ (64 * 1024 * 1024) +#define SI_PCI_CFG 0x0c000000 /* Host Mode sb2pcitranslation1 (64 MB) */ +#define SI_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */ +#define SI_SDRAM_R2 0x80000000 /* Region 2 for sdram (512 MB) */ + +#define SI_ENUM_BASE 0x18000000 /* Enumeration space base */ + +#define SI_WRAP_BASE 0x18100000 /* Wrapper space base */ +#define SI_CORE_SIZE 0x1000 /* each core gets 4Kbytes for registers */ + +#define SI_MAXCORES 32 /* NorthStar has more cores */ + +#define SI_FASTRAM 0x19000000 /* On-chip RAM on chips that also have DDR */ +#define SI_FASTRAM_SWAPPED 0x19800000 + +#define SI_FLASH2 0x1c000000 /* Flash Region 2 (region 1 shadowed here) */ +#define SI_FLASH2_SZ 0x02000000 /* Size of Flash Region 2 */ +#define SI_ARMCM3_ROM 0x1e000000 /* ARM Cortex-M3 ROM */ +#define SI_FLASH1 0x1fc00000 /* MIPS Flash Region 1 */ +#define SI_FLASH1_SZ 0x00400000 /* MIPS Size of Flash Region 1 */ +#define SI_FLASH_WINDOW 0x01000000 /* Flash XIP Window */ + +#define SI_NS_NANDFLASH 0x1c000000 /* NorthStar NAND flash base */ +#define SI_NS_NORFLASH 0x1e000000 /* NorthStar NOR flash base */ +#define SI_NS_ROM 0xfffd0000 /* NorthStar ROM */ +#define SI_NS_FLASH_WINDOW 0x02000000 /* NorthStar Flash XIP Window */ + +#define SI_ARM7S_ROM 0x20000000 /* ARM7TDMI-S ROM */ +#define SI_ARMCR4_ROM 0x000f0000 /* ARM Cortex-R4 ROM */ +#define SI_ARMCM3_SRAM2 0x60000000 /* ARM Cortex-M3 SRAM Region 2 */ +#define SI_ARM7S_SRAM2 0x80000000 /* ARM7TDMI-S SRAM Region 2 */ +#define SI_ARM_FLASH1 0xffff0000 /* ARM Flash Region 1 */ +#define SI_ARM_FLASH1_SZ 0x00010000 /* ARM Size of Flash Region 1 */ + +#define SI_PCI_DMA 0x40000000 /* Client Mode sb2pcitranslation2 (1 GB) */ +#define SI_PCI_DMA2 0x80000000 /* Client Mode sb2pcitranslation2 (1 GB) */ +#define SI_PCI_DMA_SZ 0x40000000 /* Client Mode sb2pcitranslation2 size in bytes */ +#define SI_PCIE_DMA_L32 0x00000000 /* PCIE Client Mode sb2pcitranslation2 + * (2 ZettaBytes), low 32 bits + */ +#define SI_PCIE_DMA_H32 0x80000000 /* PCIE Client Mode sb2pcitranslation2 + * (2 ZettaBytes), high 32 bits + */ + +/* core codes */ +#define NODEV_CORE_ID 0x700 /* Invalid coreid */ +#define CC_CORE_ID 0x800 /* chipcommon core */ +#define ILINE20_CORE_ID 0x801 /* iline20 core */ +#define SRAM_CORE_ID 0x802 /* sram core */ +#define SDRAM_CORE_ID 0x803 /* sdram core */ +#define PCI_CORE_ID 0x804 /* pci core */ +#define MIPS_CORE_ID 0x805 /* mips core */ +#define ENET_CORE_ID 0x806 /* enet mac core */ +#define CODEC_CORE_ID 0x807 /* v90 codec core */ +#define USB_CORE_ID 0x808 /* usb 1.1 host/device core */ +#define ADSL_CORE_ID 0x809 /* ADSL core */ +#define ILINE100_CORE_ID 0x80a /* iline100 core */ +#define IPSEC_CORE_ID 0x80b /* ipsec core */ +#define UTOPIA_CORE_ID 0x80c /* utopia core */ +#define PCMCIA_CORE_ID 0x80d /* pcmcia core */ +#define SOCRAM_CORE_ID 0x80e /* internal memory core */ +#define MEMC_CORE_ID 0x80f /* memc sdram core */ +#define OFDM_CORE_ID 0x810 /* OFDM phy core */ +#define EXTIF_CORE_ID 0x811 /* external interface core */ +#define D11_CORE_ID 0x812 /* 802.11 MAC core */ +#define APHY_CORE_ID 0x813 /* 802.11a phy core */ +#define BPHY_CORE_ID 0x814 /* 802.11b phy core */ +#define GPHY_CORE_ID 0x815 /* 802.11g phy core */ +#define MIPS33_CORE_ID 0x816 /* mips3302 core */ +#define USB11H_CORE_ID 0x817 /* usb 1.1 host core */ +#define USB11D_CORE_ID 0x818 /* usb 1.1 device core */ +#define USB20H_CORE_ID 0x819 /* usb 2.0 host core */ +#define USB20D_CORE_ID 0x81a /* usb 2.0 device core */ +#define SDIOH_CORE_ID 0x81b /* sdio host core */ +#define ROBO_CORE_ID 0x81c /* roboswitch core */ +#define ATA100_CORE_ID 0x81d /* parallel ATA core */ +#define SATAXOR_CORE_ID 0x81e /* serial ATA & XOR DMA core */ +#define GIGETH_CORE_ID 0x81f /* gigabit ethernet core */ +#define PCIE_CORE_ID 0x820 /* pci express core */ +#define NPHY_CORE_ID 0x821 /* 802.11n 2x2 phy core */ +#define SRAMC_CORE_ID 0x822 /* SRAM controller core */ +#define MINIMAC_CORE_ID 0x823 /* MINI MAC/phy core */ +#define ARM11_CORE_ID 0x824 /* ARM 1176 core */ +#define ARM7S_CORE_ID 0x825 /* ARM7tdmi-s core */ +#define LPPHY_CORE_ID 0x826 /* 802.11a/b/g phy core */ +#define PMU_CORE_ID 0x827 /* PMU core */ +#define SSNPHY_CORE_ID 0x828 /* 802.11n single-stream phy core */ +#define SDIOD_CORE_ID 0x829 /* SDIO device core */ +#define ARMCM3_CORE_ID 0x82a /* ARM Cortex M3 core */ +#define HTPHY_CORE_ID 0x82b /* 802.11n 4x4 phy core */ +#define MIPS74K_CORE_ID 0x82c /* mips 74k core */ +#define GMAC_CORE_ID 0x82d /* Gigabit MAC core */ +#define DMEMC_CORE_ID 0x82e /* DDR1/2 memory controller core */ +#define PCIERC_CORE_ID 0x82f /* PCIE Root Complex core */ +#define OCP_CORE_ID 0x830 /* OCP2OCP bridge core */ +#define SC_CORE_ID 0x831 /* shared common core */ +#define AHB_CORE_ID 0x832 /* OCP2AHB bridge core */ +#define SPIH_CORE_ID 0x833 /* SPI host core */ +#define I2S_CORE_ID 0x834 /* I2S core */ +#define DMEMS_CORE_ID 0x835 /* SDR/DDR1 memory controller core */ +#define DEF_SHIM_COMP 0x837 /* SHIM component in ubus/6362 */ + +#define ACPHY_CORE_ID 0x83b /* Dot11 ACPHY */ +#define PCIE2_CORE_ID 0x83c /* pci express Gen2 core */ +#define USB30D_CORE_ID 0x83d /* usb 3.0 device core */ +#define ARMCR4_CORE_ID 0x83e /* ARM CR4 CPU */ +#define APB_BRIDGE_CORE_ID 0x135 /* APB bridge core ID */ +#define AXI_CORE_ID 0x301 /* AXI/GPV core ID */ +#define EROM_CORE_ID 0x366 /* EROM core ID */ +#define OOB_ROUTER_CORE_ID 0x367 /* OOB router core ID */ +#define DEF_AI_COMP 0xfff /* Default component, in ai chips it maps all + * unused address ranges + */ + +#define CC_4706_CORE_ID 0x500 /* chipcommon core */ +#define NS_PCIEG2_CORE_ID 0x501 /* PCIE Gen 2 core */ +#define NS_DMA_CORE_ID 0x502 /* DMA core */ +#define NS_SDIO3_CORE_ID 0x503 /* SDIO3 core */ +#define NS_USB20_CORE_ID 0x504 /* USB2.0 core */ +#define NS_USB30_CORE_ID 0x505 /* USB3.0 core */ +#define NS_A9JTAG_CORE_ID 0x506 /* ARM Cortex A9 JTAG core */ +#define NS_DDR23_CORE_ID 0x507 /* Denali DDR2/DDR3 memory controller */ +#define NS_ROM_CORE_ID 0x508 /* ROM core */ +#define NS_NAND_CORE_ID 0x509 /* NAND flash controller core */ +#define NS_QSPI_CORE_ID 0x50a /* SPI flash controller core */ +#define NS_CCB_CORE_ID 0x50b /* ChipcommonB core */ +#define SOCRAM_4706_CORE_ID 0x50e /* internal memory core */ +#define NS_SOCRAM_CORE_ID SOCRAM_4706_CORE_ID +#define ARMCA9_CORE_ID 0x510 /* ARM Cortex A9 core (ihost) */ +#define NS_IHOST_CORE_ID ARMCA9_CORE_ID /* ARM Cortex A9 core (ihost) */ +#define GMAC_COMMON_4706_CORE_ID 0x5dc /* Gigabit MAC core */ +#define GMAC_4706_CORE_ID 0x52d /* Gigabit MAC core */ +#define AMEMC_CORE_ID 0x52e /* DDR1/2 memory controller core */ +#define ALTA_CORE_ID 0x534 /* I2S core */ +#define DDR23_PHY_CORE_ID 0x5dd + +#define SI_PCI1_MEM 0x40000000 /* Host Mode sb2pcitranslation0 (64 MB) */ +#define SI_PCI1_CFG 0x44000000 /* Host Mode sb2pcitranslation1 (64 MB) */ +#define SI_PCIE1_DMA_H32 0xc0000000 /* PCIE Client Mode sb2pcitranslation2 + * (2 ZettaBytes), high 32 bits + */ +#define CC_4706B0_CORE_REV 0x8000001f /* chipcommon core */ +#define SOCRAM_4706B0_CORE_REV 0x80000005 /* internal memory core */ +#define GMAC_4706B0_CORE_REV 0x80000000 /* Gigabit MAC core */ + +/* There are TWO constants on all HND chips: SI_ENUM_BASE above, + * and chipcommon being the first core: + */ +#define SI_CC_IDX 0 + +/* SOC Interconnect types (aka chip types) */ +#define SOCI_SB 0 +#define SOCI_AI 1 +#define SOCI_UBUS 2 +#define SOCI_NAI 3 + +/* Common core control flags */ +#define SICF_BIST_EN 0x8000 +#define SICF_PME_EN 0x4000 +#define SICF_CORE_BITS 0x3ffc +#define SICF_FGC 0x0002 +#define SICF_CLOCK_EN 0x0001 + +/* Common core status flags */ +#define SISF_BIST_DONE 0x8000 +#define SISF_BIST_ERROR 0x4000 +#define SISF_GATED_CLK 0x2000 +#define SISF_DMA64 0x1000 +#define SISF_CORE_BITS 0x0fff + +/* Norstar core status flags */ +#define SISF_NS_BOOTDEV_MASK 0x0003 /* ROM core */ +#define SISF_NS_BOOTDEV_NOR 0x0000 /* ROM core */ +#define SISF_NS_BOOTDEV_NAND 0x0001 /* ROM core */ +#define SISF_NS_BOOTDEV_ROM 0x0002 /* ROM core */ +#define SISF_NS_BOOTDEV_OFFLOAD 0x0003 /* ROM core */ +#define SISF_NS_SKUVEC_MASK 0x000c /* ROM core */ + +/* A register that is common to all cores to + * communicate w/PMU regarding clock control. + */ +#define SI_CLK_CTL_ST 0x1e0 /* clock control and status */ + +/* clk_ctl_st register */ +#define CCS_FORCEALP 0x00000001 /* force ALP request */ +#define CCS_FORCEHT 0x00000002 /* force HT request */ +#define CCS_FORCEILP 0x00000004 /* force ILP request */ +#define CCS_ALPAREQ 0x00000008 /* ALP Avail Request */ +#define CCS_HTAREQ 0x00000010 /* HT Avail Request */ +#define CCS_FORCEHWREQOFF 0x00000020 /* Force HW Clock Request Off */ +#define CCS_HQCLKREQ 0x00000040 /* HQ Clock Required */ +#define CCS_USBCLKREQ 0x00000100 /* USB Clock Req */ +#define CCS_ERSRC_REQ_MASK 0x00000700 /* external resource requests */ +#define CCS_ERSRC_REQ_SHIFT 8 +#define CCS_ALPAVAIL 0x00010000 /* ALP is available */ +#define CCS_HTAVAIL 0x00020000 /* HT is available */ +#define CCS_BP_ON_APL 0x00040000 /* RO: Backplane is running on ALP clock */ +#define CCS_BP_ON_HT 0x00080000 /* RO: Backplane is running on HT clock */ +#define CCS_ERSRC_STS_MASK 0x07000000 /* external resource status */ +#define CCS_ERSRC_STS_SHIFT 24 + +#define CCS0_HTAVAIL 0x00010000 /* HT avail in chipc and pcmcia on 4328a0 */ +#define CCS0_ALPAVAIL 0x00020000 /* ALP avail in chipc and pcmcia on 4328a0 */ + +/* Not really related to SOC Interconnect, but a couple of software + * conventions for the use the flash space: + */ + +/* Minumum amount of flash we support */ +#define FLASH_MIN 0x00020000 /* Minimum flash size */ + +/* A boot/binary may have an embedded block that describes its size */ +#define BISZ_OFFSET 0x3e0 /* At this offset into the binary */ +#define BISZ_MAGIC 0x4249535a /* Marked with this value: 'BISZ' */ +#define BISZ_MAGIC_IDX 0 /* Word 0: magic */ +#define BISZ_TXTST_IDX 1 /* 1: text start */ +#define BISZ_TXTEND_IDX 2 /* 2: text end */ +#define BISZ_DATAST_IDX 3 /* 3: data start */ +#define BISZ_DATAEND_IDX 4 /* 4: data end */ +#define BISZ_BSSST_IDX 5 /* 5: bss start */ +#define BISZ_BSSEND_IDX 6 /* 6: bss end */ +#define BISZ_SIZE 7 /* descriptor size in 32-bit integers */ + +/* Boot/Kernel related defintion and functions */ +#define SOC_BOOTDEV_ROM 0x00000001 +#define SOC_BOOTDEV_PFLASH 0x00000002 +#define SOC_BOOTDEV_SFLASH 0x00000004 +#define SOC_BOOTDEV_NANDFLASH 0x00000008 + +#define SOC_KNLDEV_NORFLASH 0x00000002 +#define SOC_KNLDEV_NANDFLASH 0x00000004 + +#ifndef _LANGUAGE_ASSEMBLY +int soc_boot_dev(void *sih); +int soc_knl_dev(void *sih); +#endif /* _LANGUAGE_ASSEMBLY */ + +#endif /* _HNDSOC_H */ diff --git a/external/cache/sources/wl/include/linux_osl.h b/external/cache/sources/wl/include/linux_osl.h new file mode 100644 index 0000000..68f70a5 --- /dev/null +++ b/external/cache/sources/wl/include/linux_osl.h @@ -0,0 +1,550 @@ +/* + * Linux OS Independent Layer + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: linux_osl.h 383331 2013-02-06 10:27:24Z $ + */ + +#ifndef _linux_osl_h_ +#define _linux_osl_h_ + +#include + + +extern void * osl_os_open_image(char * filename); +extern int osl_os_get_image_block(char * buf, int len, void * image); +extern void osl_os_close_image(void * image); +extern int osl_os_image_size(void *image); + + +#ifdef BCMDRIVER + + +extern osl_t *osl_attach(void *pdev, uint bustype, bool pkttag); +extern void osl_detach(osl_t *osh); + + +extern uint32 g_assert_type; + + +#if defined(BCMASSERT_LOG) + #define ASSERT(exp) \ + do { if (!(exp)) osl_assert(#exp, __FILE__, __LINE__); } while (0) +extern void osl_assert(const char *exp, const char *file, int line); +#else + #ifdef __GNUC__ + #define GCC_VERSION \ + (__GNUC__ * 10000 + __GNUC_MINOR__ * 100 + __GNUC_PATCHLEVEL__) + #if GCC_VERSION > 30100 + #define ASSERT(exp) do {} while (0) + #else + + #define ASSERT(exp) + #endif + #endif +#endif + + +#define OSL_DELAY(usec) osl_delay(usec) +extern void osl_delay(uint usec); + +#define OSL_PCMCIA_READ_ATTR(osh, offset, buf, size) \ + osl_pcmcia_read_attr((osh), (offset), (buf), (size)) +#define OSL_PCMCIA_WRITE_ATTR(osh, offset, buf, size) \ + osl_pcmcia_write_attr((osh), (offset), (buf), (size)) +extern void osl_pcmcia_read_attr(osl_t *osh, uint offset, void *buf, int size); +extern void osl_pcmcia_write_attr(osl_t *osh, uint offset, void *buf, int size); + + +#define OSL_PCI_READ_CONFIG(osh, offset, size) \ + osl_pci_read_config((osh), (offset), (size)) +#define OSL_PCI_WRITE_CONFIG(osh, offset, size, val) \ + osl_pci_write_config((osh), (offset), (size), (val)) +extern uint32 osl_pci_read_config(osl_t *osh, uint offset, uint size); +extern void osl_pci_write_config(osl_t *osh, uint offset, uint size, uint val); + + +#define OSL_PCI_BUS(osh) osl_pci_bus(osh) +#define OSL_PCI_SLOT(osh) osl_pci_slot(osh) +extern uint osl_pci_bus(osl_t *osh); +extern uint osl_pci_slot(osl_t *osh); +extern struct pci_dev *osl_pci_device(osl_t *osh); + + +typedef struct { + bool pkttag; + bool mmbus; + pktfree_cb_fn_t tx_fn; + void *tx_ctx; + void *unused[3]; +} osl_pubinfo_t; + +#define PKTFREESETCB(osh, _tx_fn, _tx_ctx) \ + do { \ + ((osl_pubinfo_t*)osh)->tx_fn = _tx_fn; \ + ((osl_pubinfo_t*)osh)->tx_ctx = _tx_ctx; \ + } while (0) + + + +#define BUS_SWAP32(v) (v) + + #define MALLOC(osh, size) osl_malloc((osh), (size)) + #define MFREE(osh, addr, size) osl_mfree((osh), (addr), (size)) + #define MALLOCED(osh) osl_malloced((osh)) + extern void *osl_malloc(osl_t *osh, uint size); + extern void osl_mfree(osl_t *osh, void *addr, uint size); + extern uint osl_malloced(osl_t *osh); + +#define NATIVE_MALLOC(osh, size) kmalloc(size, GFP_ATOMIC) +#define NATIVE_MFREE(osh, addr, size) kfree(addr) + +#define MALLOC_FAILED(osh) osl_malloc_failed((osh)) +extern uint osl_malloc_failed(osl_t *osh); + + +#define DMA_CONSISTENT_ALIGN osl_dma_consistent_align() +#define DMA_ALLOC_CONSISTENT(osh, size, align, tot, pap, dmah) \ + osl_dma_alloc_consistent((osh), (size), (align), (tot), (pap)) +#define DMA_FREE_CONSISTENT(osh, va, size, pa, dmah) \ + osl_dma_free_consistent((osh), (void*)(va), (size), (pa)) + +#define DMA_ALLOC_CONSISTENT_FORCE32(osh, size, align, tot, pap, dmah) \ + osl_dma_alloc_consistent((osh), (size), (align), (tot), (pap)) +#define DMA_FREE_CONSISTENT_FORCE32(osh, va, size, pa, dmah) \ + osl_dma_free_consistent((osh), (void*)(va), (size), (pa)) + +extern uint osl_dma_consistent_align(void); +extern void *osl_dma_alloc_consistent(osl_t *osh, uint size, uint16 align, uint *tot, ulong *pap); +extern void osl_dma_free_consistent(osl_t *osh, void *va, uint size, ulong pa); + + +#define DMA_TX 1 +#define DMA_RX 2 + + +#define DMA_UNMAP(osh, pa, size, direction, p, dmah) \ + osl_dma_unmap((osh), (pa), (size), (direction)) +extern uint osl_dma_map(osl_t *osh, void *va, uint size, int direction, void *p, + hnddma_seg_map_t *txp_dmah); +extern void osl_dma_unmap(osl_t *osh, uint pa, uint size, int direction); + + +#define OSL_DMADDRWIDTH(osh, addrwidth) do {} while (0) + + + #include + #define OSL_WRITE_REG(osh, r, v) (bcmsdh_reg_write(NULL, (uintptr)(r), sizeof(*(r)), (v))) + #define OSL_READ_REG(osh, r) (bcmsdh_reg_read(NULL, (uintptr)(r), sizeof(*(r)))) + + #define SELECT_BUS_WRITE(osh, mmap_op, bus_op) if (((osl_pubinfo_t*)(osh))->mmbus) \ + mmap_op else bus_op + #define SELECT_BUS_READ(osh, mmap_op, bus_op) (((osl_pubinfo_t*)(osh))->mmbus) ? \ + mmap_op : bus_op + +#define OSL_ERROR(bcmerror) osl_error(bcmerror) +extern int osl_error(int bcmerror); + + +#define PKTBUFSZ 2048 + + +#include +#include +#include + +#define OSL_SYSUPTIME() ((uint32)jiffies * (1000 / HZ)) +#define printf(fmt, args...) printk(fmt , ## args) +#include +#include + +#define bcopy(src, dst, len) memcpy((dst), (src), (len)) +#define bcmp(b1, b2, len) memcmp((b1), (b2), (len)) +#define bzero(b, len) memset((b), '\0', (len)) + + + +#define R_REG(osh, r) (\ + SELECT_BUS_READ(osh, \ + ({ \ + __typeof(*(r)) __osl_v; \ + BCM_REFERENCE(osh); \ + switch (sizeof(*(r))) { \ + case sizeof(uint8): __osl_v = \ + readb((volatile uint8*)(r)); break; \ + case sizeof(uint16): __osl_v = \ + readw((volatile uint16*)(r)); break; \ + case sizeof(uint32): __osl_v = \ + readl((volatile uint32*)(r)); break; \ + } \ + __osl_v; \ + }), \ + OSL_READ_REG(osh, r)) \ +) + +#define W_REG(osh, r, v) do { \ + BCM_REFERENCE(osh); \ + SELECT_BUS_WRITE(osh, \ + switch (sizeof(*(r))) { \ + case sizeof(uint8): writeb((uint8)(v), (volatile uint8*)(r)); break; \ + case sizeof(uint16): writew((uint16)(v), (volatile uint16*)(r)); break; \ + case sizeof(uint32): writel((uint32)(v), (volatile uint32*)(r)); break; \ + }, \ + (OSL_WRITE_REG(osh, r, v))); \ + } while (0) + +#define AND_REG(osh, r, v) W_REG(osh, (r), R_REG(osh, r) & (v)) +#define OR_REG(osh, r, v) W_REG(osh, (r), R_REG(osh, r) | (v)) + + +#define bcopy(src, dst, len) memcpy((dst), (src), (len)) +#define bcmp(b1, b2, len) memcmp((b1), (b2), (len)) +#define bzero(b, len) memset((b), '\0', (len)) + + +#define OSL_UNCACHED(va) ((void *)va) +#define OSL_CACHED(va) ((void *)va) + + +#define OSL_CACHE_FLUSH(va, len) + +#define OSL_PREF_RANGE_LD(va, sz) +#define OSL_PREF_RANGE_ST(va, sz) + + +#if defined(__i386__) +#define OSL_GETCYCLES(x) rdtscl((x)) +#else +#define OSL_GETCYCLES(x) ((x) = 0) +#endif + + +#define BUSPROBE(val, addr) ({ (val) = R_REG(NULL, (addr)); 0; }) + + +#if !defined(CONFIG_MMC_MSM7X00A) +#define REG_MAP(pa, size) ioremap_nocache((unsigned long)(pa), (unsigned long)(size)) +#else +#define REG_MAP(pa, size) (void *)(0) +#endif +#define REG_UNMAP(va) iounmap((va)) + + +#define R_SM(r) *(r) +#define W_SM(r, v) (*(r) = (v)) +#define BZERO_SM(r, len) memset((r), '\0', (len)) + + +#include + + +#ifdef BCMDBG_CTRACE +#define PKTGET(osh, len, send) osl_pktget((osh), (len), __LINE__, __FILE__) +#define PKTDUP(osh, skb) osl_pktdup((osh), (skb), __LINE__, __FILE__) +#else +#define PKTGET(osh, len, send) osl_pktget((osh), (len)) +#define PKTDUP(osh, skb) osl_pktdup((osh), (skb)) +#endif +#define PKTLIST_DUMP(osh, buf) +#define PKTDBG_TRACE(osh, pkt, bit) +#define PKTFREE(osh, skb, send) osl_pktfree((osh), (skb), (send)) +#ifdef DHD_USE_STATIC_BUF +#define PKTGET_STATIC(osh, len, send) osl_pktget_static((osh), (len)) +#define PKTFREE_STATIC(osh, skb, send) osl_pktfree_static((osh), (skb), (send)) +#endif +#define PKTDATA(osh, skb) (((struct sk_buff*)(skb))->data) +#define PKTLEN(osh, skb) (((struct sk_buff*)(skb))->len) +#define PKTHEADROOM(osh, skb) (PKTDATA(osh, skb)-(((struct sk_buff*)(skb))->head)) +#define PKTTAILROOM(osh, skb) skb_tailroom((struct sk_buff*)(skb)) +#define PKTNEXT(osh, skb) (((struct sk_buff*)(skb))->next) +#define PKTSETNEXT(osh, skb, x) (((struct sk_buff*)(skb))->next = (struct sk_buff*)(x)) +#define PKTSETLEN(osh, skb, len) __skb_trim((struct sk_buff*)(skb), (len)) +#define PKTPUSH(osh, skb, bytes) skb_push((struct sk_buff*)(skb), (bytes)) +#define PKTPULL(osh, skb, bytes) skb_pull((struct sk_buff*)(skb), (bytes)) +#define PKTTAG(skb) ((void*)(((struct sk_buff*)(skb))->cb)) +#define PKTSETPOOL(osh, skb, x, y) do {} while (0) +#define PKTPOOL(osh, skb) FALSE +#define PKTSHRINK(osh, m) (m) + +#ifdef BCMDBG_CTRACE +#define DEL_CTRACE(zosh, zskb) { \ + unsigned long zflags; \ + spin_lock_irqsave(&(zosh)->ctrace_lock, zflags); \ + list_del(&(zskb)->ctrace_list); \ + (zosh)->ctrace_num--; \ + (zskb)->ctrace_start = 0; \ + (zskb)->ctrace_count = 0; \ + spin_unlock_irqrestore(&(zosh)->ctrace_lock, zflags); \ +} + +#define UPDATE_CTRACE(zskb, zfile, zline) { \ + struct sk_buff *_zskb = (struct sk_buff *)(zskb); \ + if (_zskb->ctrace_count < CTRACE_NUM) { \ + _zskb->func[_zskb->ctrace_count] = zfile; \ + _zskb->line[_zskb->ctrace_count] = zline; \ + _zskb->ctrace_count++; \ + } \ + else { \ + _zskb->func[_zskb->ctrace_start] = zfile; \ + _zskb->line[_zskb->ctrace_start] = zline; \ + _zskb->ctrace_start++; \ + if (_zskb->ctrace_start >= CTRACE_NUM) \ + _zskb->ctrace_start = 0; \ + } \ +} + +#define ADD_CTRACE(zosh, zskb, zfile, zline) { \ + unsigned long zflags; \ + spin_lock_irqsave(&(zosh)->ctrace_lock, zflags); \ + list_add(&(zskb)->ctrace_list, &(zosh)->ctrace_list); \ + (zosh)->ctrace_num++; \ + UPDATE_CTRACE(zskb, zfile, zline); \ + spin_unlock_irqrestore(&(zosh)->ctrace_lock, zflags); \ +} + +#define PKTCALLER(zskb) UPDATE_CTRACE((struct sk_buff *)zskb, (char *)__FUNCTION__, __LINE__) +#endif + +#ifdef CTFPOOL +#define CTFPOOL_REFILL_THRESH 3 +typedef struct ctfpool { + void *head; + spinlock_t lock; + uint max_obj; + uint curr_obj; + uint obj_size; + uint refills; + uint fast_allocs; + uint fast_frees; + uint slow_allocs; +} ctfpool_t; +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 22) + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36) +#define FASTBUF (1 << 0) +#define CTFBUF (1 << 1) +#define PKTSETFAST(osh, skb) ((((struct sk_buff*)(skb))->pktc_flags) |= FASTBUF) +#define PKTCLRFAST(osh, skb) ((((struct sk_buff*)(skb))->pktc_flags) &= (~FASTBUF)) +#define PKTSETCTF(osh, skb) ((((struct sk_buff*)(skb))->pktc_flags) |= CTFBUF) +#define PKTCLRCTF(osh, skb) ((((struct sk_buff*)(skb))->pktc_flags) &= (~CTFBUF)) +#define PKTISFAST(osh, skb) ((((struct sk_buff*)(skb))->pktc_flags) & FASTBUF) +#define PKTISCTF(osh, skb) ((((struct sk_buff*)(skb))->pktc_flags) & CTFBUF) +#define PKTFAST(osh, skb) (((struct sk_buff*)(skb))->pktc_flags) +#else +#define FASTBUF (1 << 16) +#define CTFBUF (1 << 17) +#define PKTSETFAST(osh, skb) ((((struct sk_buff*)(skb))->mac_len) |= FASTBUF) +#define PKTCLRFAST(osh, skb) ((((struct sk_buff*)(skb))->mac_len) &= (~FASTBUF)) +#define PKTSETCTF(osh, skb) ((((struct sk_buff*)(skb))->mac_len) |= CTFBUF) +#define PKTCLRCTF(osh, skb) ((((struct sk_buff*)(skb))->mac_len) &= (~CTFBUF)) +#define PKTISFAST(osh, skb) ((((struct sk_buff*)(skb))->mac_len) & FASTBUF) +#define PKTISCTF(osh, skb) ((((struct sk_buff*)(skb))->mac_len) & CTFBUF) +#define PKTFAST(osh, skb) (((struct sk_buff*)(skb))->mac_len) +#endif +#else +#define FASTBUF (1 << 0) +#define CTFBUF (1 << 1) +#define PKTSETFAST(osh, skb) ((((struct sk_buff*)(skb))->__unused) |= FASTBUF) +#define PKTCLRFAST(osh, skb) ((((struct sk_buff*)(skb))->__unused) &= (~FASTBUF)) +#define PKTSETCTF(osh, skb) ((((struct sk_buff*)(skb))->__unused) |= CTFBUF) +#define PKTCLRCTF(osh, skb) ((((struct sk_buff*)(skb))->__unused) &= (~CTFBUF)) +#define PKTISFAST(osh, skb) ((((struct sk_buff*)(skb))->__unused) & FASTBUF) +#define PKTISCTF(osh, skb) ((((struct sk_buff*)(skb))->__unused) & CTFBUF) +#define PKTFAST(osh, skb) (((struct sk_buff*)(skb))->__unused) +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36) +#define CTFPOOLPTR(osh, skb) (((struct sk_buff*)(skb))->ctfpool) +#define CTFPOOLHEAD(osh, skb) (((ctfpool_t *)((struct sk_buff*)(skb))->ctfpool)->head) +#else +#define CTFPOOLPTR(osh, skb) (((struct sk_buff*)(skb))->sk) +#define CTFPOOLHEAD(osh, skb) (((ctfpool_t *)((struct sk_buff*)(skb))->sk)->head) +#endif + +extern void *osl_ctfpool_add(osl_t *osh); +extern void osl_ctfpool_replenish(osl_t *osh, uint thresh); +extern int32 osl_ctfpool_init(osl_t *osh, uint numobj, uint size); +extern void osl_ctfpool_cleanup(osl_t *osh); +extern void osl_ctfpool_stats(osl_t *osh, void *b); +#endif + + +#ifdef HNDCTF +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 22) + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 36) +#define SKIPCT (1 << 2) +#define CHAINED (1 << 3) +#define PKTSETSKIPCT(osh, skb) (((struct sk_buff*)(skb))->pktc_flags |= SKIPCT) +#define PKTCLRSKIPCT(osh, skb) (((struct sk_buff*)(skb))->pktc_flags &= (~SKIPCT)) +#define PKTSKIPCT(osh, skb) (((struct sk_buff*)(skb))->pktc_flags & SKIPCT) +#define PKTSETCHAINED(osh, skb) (((struct sk_buff*)(skb))->pktc_flags |= CHAINED) +#define PKTCLRCHAINED(osh, skb) (((struct sk_buff*)(skb))->pktc_flags &= (~CHAINED)) +#define PKTISCHAINED(skb) (((struct sk_buff*)(skb))->pktc_flags & CHAINED) +#else +#define SKIPCT (1 << 18) +#define CHAINED (1 << 19) +#define PKTSETSKIPCT(osh, skb) (((struct sk_buff*)(skb))->mac_len |= SKIPCT) +#define PKTCLRSKIPCT(osh, skb) (((struct sk_buff*)(skb))->mac_len &= (~SKIPCT)) +#define PKTSKIPCT(osh, skb) (((struct sk_buff*)(skb))->mac_len & SKIPCT) +#define PKTSETCHAINED(osh, skb) (((struct sk_buff*)(skb))->mac_len |= CHAINED) +#define PKTCLRCHAINED(osh, skb) (((struct sk_buff*)(skb))->mac_len &= (~CHAINED)) +#define PKTISCHAINED(skb) (((struct sk_buff*)(skb))->mac_len & CHAINED) +#endif +#else +#define SKIPCT (1 << 2) +#define CHAINED (1 << 3) +#define PKTSETSKIPCT(osh, skb) (((struct sk_buff*)(skb))->__unused |= SKIPCT) +#define PKTCLRSKIPCT(osh, skb) (((struct sk_buff*)(skb))->__unused &= (~SKIPCT)) +#define PKTSKIPCT(osh, skb) (((struct sk_buff*)(skb))->__unused & SKIPCT) +#define PKTSETCHAINED(osh, skb) (((struct sk_buff*)(skb))->__unused |= CHAINED) +#define PKTCLRCHAINED(osh, skb) (((struct sk_buff*)(skb))->__unused &= (~CHAINED)) +#define PKTISCHAINED(skb) (((struct sk_buff*)(skb))->__unused & CHAINED) +#endif +typedef struct ctf_mark { + uint32 value; +} ctf_mark_t; +#define CTF_MARK(m) (m.value) +#else +#define PKTSETSKIPCT(osh, skb) +#define PKTCLRSKIPCT(osh, skb) +#define PKTSKIPCT(osh, skb) +#define CTF_MARK(m) 0 +#endif + +extern void osl_pktfree(osl_t *osh, void *skb, bool send); +extern void *osl_pktget_static(osl_t *osh, uint len); +extern void osl_pktfree_static(osl_t *osh, void *skb, bool send); + +#ifdef BCMDBG_CTRACE +#define PKT_CTRACE_DUMP(osh, b) osl_ctrace_dump((osh), (b)) +extern void *osl_pktget(osl_t *osh, uint len, int line, char *file); +extern void *osl_pkt_frmnative(osl_t *osh, void *skb, int line, char *file); +extern int osl_pkt_is_frmnative(osl_t *osh, struct sk_buff *pkt); +extern void *osl_pktdup(osl_t *osh, void *skb, int line, char *file); +struct bcmstrbuf; +extern void osl_ctrace_dump(osl_t *osh, struct bcmstrbuf *b); +#else +extern void *osl_pkt_frmnative(osl_t *osh, void *skb); +extern void *osl_pktget(osl_t *osh, uint len); +extern void *osl_pktdup(osl_t *osh, void *skb); +#endif +extern struct sk_buff *osl_pkt_tonative(osl_t *osh, void *pkt); +#ifdef BCMDBG_CTRACE +#define PKTFRMNATIVE(osh, skb) osl_pkt_frmnative(((osl_t *)osh), \ + (struct sk_buff*)(skb), __LINE__, __FILE__) +#define PKTISFRMNATIVE(osh, skb) osl_pkt_is_frmnative((osl_t *)(osh), (struct sk_buff *)(skb)) +#else +#define PKTFRMNATIVE(osh, skb) osl_pkt_frmnative(((osl_t *)osh), (struct sk_buff*)(skb)) +#endif +#define PKTTONATIVE(osh, pkt) osl_pkt_tonative((osl_t *)(osh), (pkt)) + +#define PKTLINK(skb) (((struct sk_buff*)(skb))->prev) +#define PKTSETLINK(skb, x) (((struct sk_buff*)(skb))->prev = (struct sk_buff*)(x)) +#define PKTPRIO(skb) (((struct sk_buff*)(skb))->priority) +#define PKTSETPRIO(skb, x) (((struct sk_buff*)(skb))->priority = (x)) +#define PKTSUMNEEDED(skb) (((struct sk_buff*)(skb))->ip_summed == CHECKSUM_HW) +#define PKTSETSUMGOOD(skb, x) (((struct sk_buff*)(skb))->ip_summed = \ + ((x) ? CHECKSUM_UNNECESSARY : CHECKSUM_NONE)) + +#define PKTSHARED(skb) (((struct sk_buff*)(skb))->cloned) + +#ifdef CONFIG_NF_CONNTRACK_MARK +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)) +#define PKTMARK(p) (((struct sk_buff *)(p))->mark) +#define PKTSETMARK(p, m) ((struct sk_buff *)(p))->mark = (m) +#else +#define PKTMARK(p) (((struct sk_buff *)(p))->nfmark) +#define PKTSETMARK(p, m) ((struct sk_buff *)(p))->nfmark = (m) +#endif +#else +#define PKTMARK(p) 0 +#define PKTSETMARK(p, m) +#endif + +#define PKTALLOCED(osh) osl_pktalloced(osh) +extern uint osl_pktalloced(osl_t *osh); + +#define DMA_MAP(osh, va, size, direction, p, dmah) \ + osl_dma_map((osh), (va), (size), (direction), (p), (dmah)) + +#ifdef PKTC + +struct chain_node { + struct sk_buff *link; + unsigned int flags:3, pkts:9, bytes:20; +}; + +#define CHAIN_NODE(skb) ((struct chain_node*)(((struct sk_buff*)skb)->pktc_cb)) + +#define PKTCSETATTR(s, f, p, b) ({CHAIN_NODE(s)->flags = (f); CHAIN_NODE(s)->pkts = (p); \ + CHAIN_NODE(s)->bytes = (b);}) +#define PKTCCLRATTR(s) ({CHAIN_NODE(s)->flags = CHAIN_NODE(s)->pkts = \ + CHAIN_NODE(s)->bytes = 0;}) +#define PKTCGETATTR(s) (CHAIN_NODE(s)->flags << 29 | CHAIN_NODE(s)->pkts << 20 | \ + CHAIN_NODE(s)->bytes) +#define PKTCCNT(skb) (CHAIN_NODE(skb)->pkts) +#define PKTCLEN(skb) (CHAIN_NODE(skb)->bytes) +#define PKTCGETFLAGS(skb) (CHAIN_NODE(skb)->flags) +#define PKTCSETFLAGS(skb, f) (CHAIN_NODE(skb)->flags = (f)) +#define PKTCCLRFLAGS(skb) (CHAIN_NODE(skb)->flags = 0) +#define PKTCFLAGS(skb) (CHAIN_NODE(skb)->flags) +#define PKTCSETCNT(skb, c) (CHAIN_NODE(skb)->pkts = (c)) +#define PKTCINCRCNT(skb) (CHAIN_NODE(skb)->pkts++) +#define PKTCADDCNT(skb, c) (CHAIN_NODE(skb)->pkts += (c)) +#define PKTCSETLEN(skb, l) (CHAIN_NODE(skb)->bytes = (l)) +#define PKTCADDLEN(skb, l) (CHAIN_NODE(skb)->bytes += (l)) +#define PKTCSETFLAG(skb, fb) (CHAIN_NODE(skb)->flags |= (fb)) +#define PKTCCLRFLAG(skb, fb) (CHAIN_NODE(skb)->flags &= ~(fb)) +#define PKTCLINK(skb) (CHAIN_NODE(skb)->link) +#define PKTSETCLINK(skb, x) (CHAIN_NODE(skb)->link = (struct sk_buff*)(x)) +#define FOREACH_CHAINED_PKT(skb, nskb) \ + for (; (skb) != NULL; (skb) = (nskb)) \ + if ((nskb) = (PKTISCHAINED(skb) ? PKTCLINK(skb) : NULL), \ + PKTSETCLINK((skb), NULL), 1) +#define PKTCFREE(osh, skb, send) \ +do { \ + void *nskb; \ + ASSERT((skb) != NULL); \ + FOREACH_CHAINED_PKT((skb), nskb) { \ + PKTCLRCHAINED((osh), (skb)); \ + PKTCCLRFLAGS((skb)); \ + PKTFREE((osh), (skb), (send)); \ + } \ +} while (0) +#define PKTCENQTAIL(h, t, p) \ +do { \ + if ((t) == NULL) { \ + (h) = (t) = (p); \ + } else { \ + PKTSETCLINK((t), (p)); \ + (t) = (p); \ + } \ +} while (0) +#endif + +#else + + + + #define ASSERT(exp) do {} while (0) + + +#define MALLOC(o, l) malloc(l) +#define MFREE(o, p, l) free(p) +#include + + +#include + + +#include + + +extern void bcopy(const void *src, void *dst, size_t len); +extern int bcmp(const void *b1, const void *b2, size_t len); +extern void bzero(void *b, size_t len); +#endif + +#endif diff --git a/external/cache/sources/wl/include/linuxver.h b/external/cache/sources/wl/include/linuxver.h new file mode 100644 index 0000000..2fb0d98 --- /dev/null +++ b/external/cache/sources/wl/include/linuxver.h @@ -0,0 +1,620 @@ +/* + * Linux-specific abstractions to gain some independence from linux kernel versions. + * Pave over some 2.2 versus 2.4 versus 2.6 kernel differences. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: linuxver.h 372519 2012-12-04 01:21:16Z $ + */ + +#ifndef _linuxver_h_ +#define _linuxver_h_ + +#include +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)) +#include +#else +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 33)) +#include +#else +#include +#endif +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(3, 1, 0)) +#include +#endif + +#include + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 0)) + +#ifdef __UNDEF_NO_VERSION__ +#undef __NO_VERSION__ +#else +#define __NO_VERSION__ +#endif +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 5, 0) +#define module_param(_name_, _type_, _perm_) MODULE_PARM(_name_, "i") +#define module_param_string(_name_, _string_, _size_, _perm_) \ + MODULE_PARM(_string_, "c" __MODULE_STRING(_size_)) +#endif + + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 9)) +#include +#else +#include +#endif + +#include +#include +#include +#include +#include +#include +#include +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)) +#include +#else +#include +#endif +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 28)) +#undef IP_TOS +#endif +#include + +#if (LINUX_VERSION_CODE > KERNEL_VERSION(2, 5, 41)) +#include +#else +#include +#ifndef work_struct +#define work_struct tq_struct +#endif +#ifndef INIT_WORK +#define INIT_WORK(_work, _func, _data) INIT_TQUEUE((_work), (_func), (_data)) +#endif +#ifndef schedule_work +#define schedule_work(_work) schedule_task((_work)) +#endif +#ifndef flush_scheduled_work +#define flush_scheduled_work() flush_scheduled_tasks() +#endif +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)) +#define DAEMONIZE(a) daemonize(a); \ + allow_signal(SIGKILL); \ + allow_signal(SIGTERM); +#else +#define RAISE_RX_SOFTIRQ() \ + cpu_raise_softirq(smp_processor_id(), NET_RX_SOFTIRQ) +#define DAEMONIZE(a) daemonize(); \ + do { if (a) \ + strncpy(current->comm, a, MIN(sizeof(current->comm), (strlen(a)))); \ + } while (0); +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19) +#define MY_INIT_WORK(_work, _func) INIT_WORK(_work, _func) +#else +#define MY_INIT_WORK(_work, _func) INIT_WORK(_work, _func, _work) +#if !(LINUX_VERSION_CODE == KERNEL_VERSION(2, 6, 18) && defined(RHEL_MAJOR) && \ + (RHEL_MAJOR == 5)) + +typedef void (*work_func_t)(void *work); +#endif +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)) + +#ifndef IRQ_NONE +typedef void irqreturn_t; +#define IRQ_NONE +#define IRQ_HANDLED +#define IRQ_RETVAL(x) +#endif +#else +typedef irqreturn_t(*FN_ISR) (int irq, void *dev_id, struct pt_regs *ptregs); +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 18) +#define IRQF_SHARED SA_SHIRQ +#endif + +#if LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 17) +#ifdef CONFIG_NET_RADIO +#define CONFIG_WIRELESS_EXT +#endif +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 5, 67) +#define MOD_INC_USE_COUNT +#define MOD_DEC_USE_COUNT +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 32) +#include +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29) +#include +#endif +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 29) +#include +#else +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 14) +#include +#endif +#endif + + +#ifdef CUSTOMER_HW4 +#include +#endif + +#ifndef __exit +#define __exit +#endif +#ifndef __devexit +#define __devexit +#endif +#ifndef __devinit +#define __devinit __init +#endif +#ifndef __devinitdata +#define __devinitdata +#endif +#ifndef __devexit_p +#define __devexit_p(x) x +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 0)) + +#define pci_get_drvdata(dev) (dev)->sysdata +#define pci_set_drvdata(dev, value) (dev)->sysdata = (value) + + + +struct pci_device_id { + unsigned int vendor, device; + unsigned int subvendor, subdevice; + unsigned int class, class_mask; + unsigned long driver_data; +}; + +struct pci_driver { + struct list_head node; + char *name; + const struct pci_device_id *id_table; + int (*probe)(struct pci_dev *dev, + const struct pci_device_id *id); + void (*remove)(struct pci_dev *dev); + void (*suspend)(struct pci_dev *dev); + void (*resume)(struct pci_dev *dev); +}; + +#define MODULE_DEVICE_TABLE(type, name) +#define PCI_ANY_ID (~0) + + +#define pci_module_init pci_register_driver +extern int pci_register_driver(struct pci_driver *drv); +extern void pci_unregister_driver(struct pci_driver *drv); + +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 18)) +#define pci_module_init pci_register_driver +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 2, 18)) +#ifdef MODULE +#define module_init(x) int init_module(void) { return x(); } +#define module_exit(x) void cleanup_module(void) { x(); } +#else +#define module_init(x) __initcall(x); +#define module_exit(x) __exitcall(x); +#endif +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31) +#define WL_USE_NETDEV_OPS +#else +#undef WL_USE_NETDEV_OPS +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31)) && defined(CONFIG_RFKILL) +#define WL_CONFIG_RFKILL +#else +#undef WL_CONFIG_RFKILL +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 48)) +#define list_for_each(pos, head) \ + for (pos = (head)->next; pos != (head); pos = pos->next) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 13)) +#define pci_resource_start(dev, bar) ((dev)->base_address[(bar)]) +#elif (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 44)) +#define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 23)) +#define pci_enable_device(dev) do { } while (0) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 14)) +#define net_device device +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 42)) + + + +#ifndef PCI_DMA_TODEVICE +#define PCI_DMA_TODEVICE 1 +#define PCI_DMA_FROMDEVICE 2 +#endif + +typedef u32 dma_addr_t; + + +static inline int get_order(unsigned long size) +{ + int order; + + size = (size-1) >> (PAGE_SHIFT-1); + order = -1; + do { + size >>= 1; + order++; + } while (size); + return order; +} + +static inline void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size, + dma_addr_t *dma_handle) +{ + void *ret; + int gfp = GFP_ATOMIC | GFP_DMA; + + ret = (void *)__get_free_pages(gfp, get_order(size)); + + if (ret != NULL) { + memset(ret, 0, size); + *dma_handle = virt_to_bus(ret); + } + return ret; +} +static inline void pci_free_consistent(struct pci_dev *hwdev, size_t size, + void *vaddr, dma_addr_t dma_handle) +{ + free_pages((unsigned long)vaddr, get_order(size)); +} +#define pci_map_single(cookie, address, size, dir) virt_to_bus(address) +#define pci_unmap_single(cookie, address, size, dir) + +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 3, 43)) + +#define dev_kfree_skb_any(a) dev_kfree_skb(a) +#define netif_down(dev) do { (dev)->start = 0; } while (0) + + +#ifndef _COMPAT_NETDEVICE_H + + + +#define dev_kfree_skb_irq(a) dev_kfree_skb(a) +#define netif_wake_queue(dev) \ + do { clear_bit(0, &(dev)->tbusy); mark_bh(NET_BH); } while (0) +#define netif_stop_queue(dev) set_bit(0, &(dev)->tbusy) + +static inline void netif_start_queue(struct net_device *dev) +{ + dev->tbusy = 0; + dev->interrupt = 0; + dev->start = 1; +} + +#define netif_queue_stopped(dev) (dev)->tbusy +#define netif_running(dev) (dev)->start + +#endif + +#define netif_device_attach(dev) netif_start_queue(dev) +#define netif_device_detach(dev) netif_stop_queue(dev) + + +#define tasklet_struct tq_struct +static inline void tasklet_schedule(struct tasklet_struct *tasklet) +{ + queue_task(tasklet, &tq_immediate); + mark_bh(IMMEDIATE_BH); +} + +static inline void tasklet_init(struct tasklet_struct *tasklet, + void (*func)(unsigned long), + unsigned long data) +{ + tasklet->next = NULL; + tasklet->sync = 0; + tasklet->routine = (void (*)(void *))func; + tasklet->data = (void *)data; +} +#define tasklet_kill(tasklet) { do {} while (0); } + + +#define del_timer_sync(timer) del_timer(timer) + +#else + +#define netif_down(dev) + +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 3)) + + +#define PREPARE_TQUEUE(_tq, _routine, _data) \ + do { \ + (_tq)->routine = _routine; \ + (_tq)->data = _data; \ + } while (0) + + +#define INIT_TQUEUE(_tq, _routine, _data) \ + do { \ + INIT_LIST_HEAD(&(_tq)->list); \ + (_tq)->sync = 0; \ + PREPARE_TQUEUE((_tq), (_routine), (_data)); \ + } while (0) + +#endif + + +#if LINUX_VERSION_CODE > KERNEL_VERSION(2, 6, 9) +#define PCI_SAVE_STATE(a, b) pci_save_state(a) +#define PCI_RESTORE_STATE(a, b) pci_restore_state(a) +#else +#define PCI_SAVE_STATE(a, b) pci_save_state(a, b) +#define PCI_RESTORE_STATE(a, b) pci_restore_state(a, b) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 6)) +static inline int +pci_save_state(struct pci_dev *dev, u32 *buffer) +{ + int i; + if (buffer) { + for (i = 0; i < 16; i++) + pci_read_config_dword(dev, i * 4, &buffer[i]); + } + return 0; +} + +static inline int +pci_restore_state(struct pci_dev *dev, u32 *buffer) +{ + int i; + + if (buffer) { + for (i = 0; i < 16; i++) + pci_write_config_dword(dev, i * 4, buffer[i]); + } + + else { + for (i = 0; i < 6; i ++) + pci_write_config_dword(dev, + PCI_BASE_ADDRESS_0 + (i * 4), + pci_resource_start(dev, i)); + pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); + } + return 0; +} +#endif + + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 4, 19)) +#define read_c0_count() read_32bit_cp0_register(CP0_COUNT) +#endif + + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) +#ifndef SET_MODULE_OWNER +#define SET_MODULE_OWNER(dev) do {} while (0) +#define OLD_MOD_INC_USE_COUNT MOD_INC_USE_COUNT +#define OLD_MOD_DEC_USE_COUNT MOD_DEC_USE_COUNT +#else +#define OLD_MOD_INC_USE_COUNT do {} while (0) +#define OLD_MOD_DEC_USE_COUNT do {} while (0) +#endif +#else +#ifndef SET_MODULE_OWNER +#define SET_MODULE_OWNER(dev) do {} while (0) +#endif +#ifndef MOD_INC_USE_COUNT +#define MOD_INC_USE_COUNT do {} while (0) +#endif +#ifndef MOD_DEC_USE_COUNT +#define MOD_DEC_USE_COUNT do {} while (0) +#endif +#define OLD_MOD_INC_USE_COUNT MOD_INC_USE_COUNT +#define OLD_MOD_DEC_USE_COUNT MOD_DEC_USE_COUNT +#endif + +#ifndef SET_NETDEV_DEV +#define SET_NETDEV_DEV(net, pdev) do {} while (0) +#endif + +#ifndef HAVE_FREE_NETDEV +#define free_netdev(dev) kfree(dev) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)) + +#define af_packet_priv data +#endif + + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 11) +#define DRV_SUSPEND_STATE_TYPE pm_message_t +#else +#define DRV_SUSPEND_STATE_TYPE uint32 +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19) +#define CHECKSUM_HW CHECKSUM_PARTIAL +#endif + +typedef struct { + void *parent; + struct task_struct *p_task; + long thr_pid; + int prio; + struct semaphore sema; + int terminated; + struct completion completed; +} tsk_ctl_t; + + + + +#ifdef DHD_DEBUG +#define DBG_THR(x) printk x +#else +#define DBG_THR(x) +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)) +#define SMP_RD_BARRIER_DEPENDS(x) smp_read_barrier_depends(x) +#else +#define SMP_RD_BARRIER_DEPENDS(x) smp_rmb(x) +#endif + + +#define PROC_START(thread_func, owner, tsk_ctl, flags) \ +{ \ + sema_init(&((tsk_ctl)->sema), 0); \ + init_completion(&((tsk_ctl)->completed)); \ + (tsk_ctl)->parent = owner; \ + (tsk_ctl)->terminated = FALSE; \ + (tsk_ctl)->thr_pid = kernel_thread(thread_func, tsk_ctl, flags); \ + if ((tsk_ctl)->thr_pid > 0) \ + wait_for_completion(&((tsk_ctl)->completed)); \ + DBG_THR(("%s thr:%lx started\n", __FUNCTION__, (tsk_ctl)->thr_pid)); \ +} + +#ifdef USE_KTHREAD_API +#define PROC_START2(thread_func, owner, tsk_ctl, flags, name) \ +{ \ + sema_init(&((tsk_ctl)->sema), 0); \ + init_completion(&((tsk_ctl)->completed)); \ + (tsk_ctl)->parent = owner; \ + (tsk_ctl)->terminated = FALSE; \ + (tsk_ctl)->p_task = kthread_run(thread_func, tsk_ctl, (char*)name); \ + (tsk_ctl)->thr_pid = (tsk_ctl)->p_task->pid; \ + DBG_THR(("%s thr:%lx created\n", __FUNCTION__, (tsk_ctl)->thr_pid)); \ +} +#endif + +#define PROC_STOP(tsk_ctl) \ +{ \ + (tsk_ctl)->terminated = TRUE; \ + smp_wmb(); \ + up(&((tsk_ctl)->sema)); \ + wait_for_completion(&((tsk_ctl)->completed)); \ + DBG_THR(("%s thr:%lx terminated OK\n", __FUNCTION__, (tsk_ctl)->thr_pid)); \ + (tsk_ctl)->thr_pid = -1; \ +} + + + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 31)) +#define KILL_PROC(nr, sig) \ +{ \ +struct task_struct *tsk; \ +struct pid *pid; \ +pid = find_get_pid((pid_t)nr); \ +tsk = pid_task(pid, PIDTYPE_PID); \ +if (tsk) send_sig(sig, tsk, 1); \ +} +#else +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 27)) && (LINUX_VERSION_CODE <= \ + KERNEL_VERSION(2, 6, 30)) +#define KILL_PROC(pid, sig) \ +{ \ + struct task_struct *tsk; \ + tsk = find_task_by_vpid(pid); \ + if (tsk) send_sig(sig, tsk, 1); \ +} +#else +#define KILL_PROC(pid, sig) \ +{ \ + kill_proc(pid, sig, 1); \ +} +#endif +#endif + +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 0)) +#include +#include +#else +#include + +#define __wait_event_interruptible_timeout(wq, condition, ret) \ +do { \ + wait_queue_t __wait; \ + init_waitqueue_entry(&__wait, current); \ + \ + add_wait_queue(&wq, &__wait); \ + for (;;) { \ + set_current_state(TASK_INTERRUPTIBLE); \ + if (condition) \ + break; \ + if (!signal_pending(current)) { \ + ret = schedule_timeout(ret); \ + if (!ret) \ + break; \ + continue; \ + } \ + ret = -ERESTARTSYS; \ + break; \ + } \ + current->state = TASK_RUNNING; \ + remove_wait_queue(&wq, &__wait); \ +} while (0) + +#define wait_event_interruptible_timeout(wq, condition, timeout) \ +({ \ + long __ret = timeout; \ + if (!(condition)) \ + __wait_event_interruptible_timeout(wq, condition, __ret); \ + __ret; \ +}) + +#endif + + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 24)) +#define DEV_PRIV(dev) (dev->priv) +#else +#define DEV_PRIV(dev) netdev_priv(dev) +#endif + +#if LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 20) +#define WL_ISR(i, d, p) wl_isr((i), (d)) +#else +#define WL_ISR(i, d, p) wl_isr((i), (d), (p)) +#endif + +#if (LINUX_VERSION_CODE < KERNEL_VERSION(2, 6, 0)) +#define netdev_priv(dev) dev->priv +#endif + +#endif diff --git a/external/cache/sources/wl/include/logtrace.h b/external/cache/sources/wl/include/logtrace.h new file mode 100644 index 0000000..c0f5bbd --- /dev/null +++ b/external/cache/sources/wl/include/logtrace.h @@ -0,0 +1,21 @@ +/* + * Trace log blocks sent over HBUS + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: logtrace.h 333856 2012-05-17 23:43:07Z $ + */ + +#ifndef _LOGTRACE_H +#define _LOGTRACE_H + +#include + +extern void logtrace_start(void); +extern void logtrace_stop(void); +extern int logtrace_sent(void); +extern void logtrace_trigger(void); +extern void logtrace_init(void *hdl1, void *hdl2, msgtrace_func_send_t func_send); +extern bool logtrace_event_enabled(void); + +#endif /* _LOGTRACE_H */ diff --git a/external/cache/sources/wl/include/miniopt.h b/external/cache/sources/wl/include/miniopt.h new file mode 100644 index 0000000..fa18d6c --- /dev/null +++ b/external/cache/sources/wl/include/miniopt.h @@ -0,0 +1,59 @@ +/* + * Command line options parser. + * + * $Copyright Open Broadcom Corporation$ + * $Id: miniopt.h 241182 2011-02-17 21:50:03Z gmo $ + */ + + +#ifndef MINI_OPT_H +#define MINI_OPT_H + +#ifdef __cplusplus +extern "C" { +#endif + +/* ---- Include Files ---------------------------------------------------- */ +/* ---- Constants and Types ---------------------------------------------- */ + +#define MINIOPT_MAXKEY 128 /* Max options */ +typedef struct miniopt { + + /* These are persistent after miniopt_init() */ + const char* name; /* name for prompt in error strings */ + const char* flags; /* option chars that take no args */ + bool longflags; /* long options may be flags */ + bool opt_end; /* at end of options (passed a "--") */ + + /* These are per-call to miniopt() */ + + int consumed; /* number of argv entries cosumed in + * the most recent call to miniopt() + */ + bool positional; + bool good_int; /* 'val' member is the result of a sucessful + * strtol conversion of the option value + */ + char opt; + char key[MINIOPT_MAXKEY]; + char* valstr; /* positional param, or value for the option, + * or null if the option had + * no accompanying value + */ + uint uval; /* strtol translation of valstr */ + int val; /* strtol translation of valstr */ +} miniopt_t; + +void miniopt_init(miniopt_t *t, const char* name, const char* flags, bool longflags); +int miniopt(miniopt_t *t, char **argv); + + +/* ---- Variable Externs ------------------------------------------------- */ +/* ---- Function Prototypes ---------------------------------------------- */ + + +#ifdef __cplusplus + } +#endif + +#endif /* MINI_OPT_H */ diff --git a/external/cache/sources/wl/include/msgtrace.h b/external/cache/sources/wl/include/msgtrace.h new file mode 100644 index 0000000..25e2701 --- /dev/null +++ b/external/cache/sources/wl/include/msgtrace.h @@ -0,0 +1,59 @@ +/* + * Trace messages sent over HBUS + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: msgtrace.h 370068 2012-11-20 21:40:05Z $ + */ + +#ifndef _MSGTRACE_H +#define _MSGTRACE_H + +#ifndef _TYPEDEFS_H_ +#include +#endif + + +/* This marks the start of a packed structure section. */ +#include + +#define MSGTRACE_VERSION 1 + +/* Message trace header */ +typedef BWL_PRE_PACKED_STRUCT struct msgtrace_hdr { + uint8 version; + uint8 trace_type; +#define MSGTRACE_HDR_TYPE_MSG 0 +#define MSGTRACE_HDR_TYPE_LOG 1 + uint16 len; /* Len of the trace */ + uint32 seqnum; /* Sequence number of message. Useful if the messsage has been lost + * because of DMA error or a bus reset (ex: SDIO Func2) + */ + /* Msgtrace type only */ + uint32 discarded_bytes; /* Number of discarded bytes because of trace overflow */ + uint32 discarded_printf; /* Number of discarded printf because of trace overflow */ +} BWL_POST_PACKED_STRUCT msgtrace_hdr_t; + +#define MSGTRACE_HDRLEN sizeof(msgtrace_hdr_t) + +/* The hbus driver generates traces when sending a trace message. This causes endless traces. + * This flag must be set to TRUE in any hbus traces. The flag is reset in the function msgtrace_put. + * This prevents endless traces but generates hasardous lost of traces only in bus device code. + * It is recommendat to set this flag in macro SD_TRACE but not in SD_ERROR for avoiding missing + * hbus error traces. hbus error trace should not generates endless traces. + */ +extern bool msgtrace_hbus_trace; + +typedef void (*msgtrace_func_send_t)(void *hdl1, void *hdl2, uint8 *hdr, + uint16 hdrlen, uint8 *buf, uint16 buflen); +extern void msgtrace_start(void); +extern void msgtrace_stop(void); +extern int msgtrace_sent(void); +extern void msgtrace_put(char *buf, int count); +extern void msgtrace_init(void *hdl1, void *hdl2, msgtrace_func_send_t func_send); +extern bool msgtrace_event_enabled(void); + +/* This marks the end of a packed structure section. */ +#include + +#endif /* _MSGTRACE_H */ diff --git a/external/cache/sources/wl/include/osl.h b/external/cache/sources/wl/include/osl.h new file mode 100644 index 0000000..ae71bd4 --- /dev/null +++ b/external/cache/sources/wl/include/osl.h @@ -0,0 +1,83 @@ +/* + * OS Abstraction Layer + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: osl.h 382794 2013-02-04 17:34:08Z $ + */ + +#ifndef _osl_h_ +#define _osl_h_ + + +typedef struct osl_info osl_t; +typedef struct osl_dmainfo osldma_t; + +#define OSL_PKTTAG_SZ 32 + + +typedef void (*pktfree_cb_fn_t)(void *ctx, void *pkt, unsigned int status); + + +typedef unsigned int (*osl_rreg_fn_t)(void *ctx, volatile void *reg, unsigned int size); +typedef void (*osl_wreg_fn_t)(void *ctx, volatile void *reg, unsigned int val, unsigned int size); + + +#include + +#ifndef PKTDBG_TRACE +#define PKTDBG_TRACE(osh, pkt, bit) +#endif + +#define PKTCTFMAP(osh, p) + + + +#define SET_REG(osh, r, mask, val) W_REG((osh), (r), ((R_REG((osh), r) & ~(mask)) | (val))) + +#ifndef AND_REG +#define AND_REG(osh, r, v) W_REG(osh, (r), R_REG(osh, r) & (v)) +#endif + +#ifndef OR_REG +#define OR_REG(osh, r, v) W_REG(osh, (r), R_REG(osh, r) | (v)) +#endif + +#if !defined(OSL_SYSUPTIME) +#define OSL_SYSUPTIME() (0) +#define OSL_SYSUPTIME_SUPPORT FALSE +#else +#define OSL_SYSUPTIME_SUPPORT TRUE +#endif + +#if !defined(PKTC) && !defined(PKTC_DONGLE) +#define PKTCGETATTR(s) (0) +#define PKTCSETATTR(skb, f, p, b) +#define PKTCCLRATTR(skb) +#define PKTCCNT(skb) (1) +#define PKTCLEN(skb) PKTLEN(NULL, skb) +#define PKTCGETFLAGS(skb) (0) +#define PKTCSETFLAGS(skb, f) +#define PKTCCLRFLAGS(skb) +#define PKTCFLAGS(skb) (0) +#define PKTCSETCNT(skb, c) +#define PKTCINCRCNT(skb) +#define PKTCADDCNT(skb, c) +#define PKTCSETLEN(skb, l) +#define PKTCADDLEN(skb, l) +#define PKTCSETFLAG(skb, fb) +#define PKTCCLRFLAG(skb, fb) +#define PKTCLINK(skb) NULL +#define PKTSETCLINK(skb, x) +#define FOREACH_CHAINED_PKT(skb, nskb) \ + for ((nskb) = NULL; (skb) != NULL; (skb) = (nskb)) +#define PKTCFREE PKTFREE +#endif + +#ifndef HNDCTF +#define PKTSETCHAINED(osh, skb) +#define PKTCLRCHAINED(osh, skb) +#define PKTISCHAINED(skb) (FALSE) +#endif + +#endif diff --git a/external/cache/sources/wl/include/packed_section_end.h b/external/cache/sources/wl/include/packed_section_end.h new file mode 100644 index 0000000..c9622e1 --- /dev/null +++ b/external/cache/sources/wl/include/packed_section_end.h @@ -0,0 +1,61 @@ +/* + * Declare directives for structure packing. No padding will be provided + * between the members of packed structures, and therefore, there is no + * guarantee that structure members will be aligned. + * + * Declaring packed structures is compiler specific. In order to handle all + * cases, packed structures should be delared as: + * + * #include + * + * typedef BWL_PRE_PACKED_STRUCT struct foobar_t { + * some_struct_members; + * } BWL_POST_PACKED_STRUCT foobar_t; + * + * #include + * + * + * $Copyright Open Broadcom Corporation$ + * $Id: packed_section_end.h 397846 2013-04-21 22:11:16Z ishen $ + */ + + +/* Error check - BWL_PACKED_SECTION is defined in packed_section_start.h + * and undefined in packed_section_end.h. If it is NOT defined at this + * point, then there is a missing include of packed_section_start.h. + */ +#ifdef BWL_PACKED_SECTION + #undef BWL_PACKED_SECTION +#else + #error "BWL_PACKED_SECTION is NOT defined!" +#endif + + +#if defined(_MSC_VER) + /* Disable compiler warning about pragma pack changing alignment. */ + #pragma warning(disable:4103) + + /* The Microsoft compiler uses pragmas for structure packing. Other + * compilers use structure attribute modifiers. Refer to + * BWL_PRE_PACKED_STRUCT and BWL_POST_PACKED_STRUCT defined in + * typedefs.h + */ + #if defined(BWL_DEFAULT_PACKING) + /* require default structure packing */ + #pragma pack(pop) + #undef BWL_DEFAULT_PACKING + #else /* BWL_PACKED_SECTION */ + #pragma pack() + #endif /* BWL_PACKED_SECTION */ +#endif /* _MSC_VER */ + +#if defined(__GNUC__) && defined(EFI) +#pragma pack(pop) +#endif + +/* Compiler-specific directives for structure packing are declared in + * packed_section_start.h. This marks the end of the structure packing section, + * so, undef them here. + */ +#undef BWL_PRE_PACKED_STRUCT +#undef BWL_POST_PACKED_STRUCT diff --git a/external/cache/sources/wl/include/packed_section_start.h b/external/cache/sources/wl/include/packed_section_start.h new file mode 100644 index 0000000..d185f87 --- /dev/null +++ b/external/cache/sources/wl/include/packed_section_start.h @@ -0,0 +1,67 @@ +/* + * Declare directives for structure packing. No padding will be provided + * between the members of packed structures, and therefore, there is no + * guarantee that structure members will be aligned. + * + * Declaring packed structures is compiler specific. In order to handle all + * cases, packed structures should be delared as: + * + * #include + * + * typedef BWL_PRE_PACKED_STRUCT struct foobar_t { + * some_struct_members; + * } BWL_POST_PACKED_STRUCT foobar_t; + * + * #include + * + * + * $Copyright Open Broadcom Corporation$ + * $Id: packed_section_start.h 397846 2013-04-21 22:11:16Z ishen $ + */ + + +/* Error check - BWL_PACKED_SECTION is defined in packed_section_start.h + * and undefined in packed_section_end.h. If it is already defined at this + * point, then there is a missing include of packed_section_end.h. + */ +#ifdef BWL_PACKED_SECTION + #error "BWL_PACKED_SECTION is already defined!" +#else + #define BWL_PACKED_SECTION +#endif + + +#if defined(_MSC_VER) + /* Disable compiler warning about pragma pack changing alignment. */ + #pragma warning(disable:4103) + + /* The Microsoft compiler uses pragmas for structure packing. Other + * compilers use structure attribute modifiers. Refer to + * BWL_PRE_PACKED_STRUCT and BWL_POST_PACKED_STRUCT defined below. + */ + #if defined(BWL_DEFAULT_PACKING) + /* Default structure packing */ + #pragma pack(push, 8) + #else /* BWL_PACKED_SECTION */ + #pragma pack(1) + #endif /* BWL_PACKED_SECTION */ +#endif /* _MSC_VER */ + +#if defined(__GNUC__) && defined(EFI) +#pragma pack(push) +#pragma pack(1) +#endif + +/* Declare compiler-specific directives for structure packing. */ +#if defined(_MSC_VER) + #define BWL_PRE_PACKED_STRUCT + #define BWL_POST_PACKED_STRUCT +#elif defined(__GNUC__) || defined(__lint) + #define BWL_PRE_PACKED_STRUCT + #define BWL_POST_PACKED_STRUCT __attribute__ ((packed)) +#elif defined(__CC_ARM) + #define BWL_PRE_PACKED_STRUCT __packed + #define BWL_POST_PACKED_STRUCT +#else + #error "Unknown compiler!" +#endif diff --git a/external/cache/sources/wl/include/pcicfg.h b/external/cache/sources/wl/include/pcicfg.h new file mode 100644 index 0000000..10f0a37 --- /dev/null +++ b/external/cache/sources/wl/include/pcicfg.h @@ -0,0 +1,529 @@ +/* + * pcicfg.h: PCI configuration constants and structures. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: pcicfg.h 316716 2012-02-23 04:39:13Z $ + */ + +#ifndef _h_pcicfg_ +#define _h_pcicfg_ + +#ifndef LINUX_POSTMOGRIFY_REMOVAL + +#ifndef PCI_MAX_BUS +#define PCI_MAX_BUS 0x100 +#endif +#ifndef PCI_MAX_DEVICES +#define PCI_MAX_DEVICES 0x20 +#endif +#ifndef PCI_MAX_FUNCTION +#define PCI_MAX_FUNCTION 0x8 +#endif + +#ifndef PCI_INVALID_VENDORID +#define PCI_INVALID_VENDORID 0xffff +#endif +#ifndef PCI_INVALID_DEVICEID +#define PCI_INVALID_DEVICEID 0xffff +#endif + + + + +#define PCICFG_BUS_SHIFT 16 +#define PCICFG_SLOT_SHIFT 11 +#define PCICFG_FUN_SHIFT 8 +#define PCICFG_OFF_SHIFT 0 + +#define PCICFG_BUS_MASK 0xff +#define PCICFG_SLOT_MASK 0x1f +#define PCICFG_FUN_MASK 7 +#define PCICFG_OFF_MASK 0xff + +#define PCI_CONFIG_ADDR(b, s, f, o) \ + ((((b) & PCICFG_BUS_MASK) << PCICFG_BUS_SHIFT) \ + | (((s) & PCICFG_SLOT_MASK) << PCICFG_SLOT_SHIFT) \ + | (((f) & PCICFG_FUN_MASK) << PCICFG_FUN_SHIFT) \ + | (((o) & PCICFG_OFF_MASK) << PCICFG_OFF_SHIFT)) + +#define PCI_CONFIG_BUS(a) (((a) >> PCICFG_BUS_SHIFT) & PCICFG_BUS_MASK) +#define PCI_CONFIG_SLOT(a) (((a) >> PCICFG_SLOT_SHIFT) & PCICFG_SLOT_MASK) +#define PCI_CONFIG_FUN(a) (((a) >> PCICFG_FUN_SHIFT) & PCICFG_FUN_MASK) +#define PCI_CONFIG_OFF(a) (((a) >> PCICFG_OFF_SHIFT) & PCICFG_OFF_MASK) + + + +#define PCIECFG_BUS_SHIFT 24 +#define PCIECFG_SLOT_SHIFT 19 +#define PCIECFG_FUN_SHIFT 16 +#define PCIECFG_OFF_SHIFT 0 + +#define PCIECFG_BUS_MASK 0xff +#define PCIECFG_SLOT_MASK 0x1f +#define PCIECFG_FUN_MASK 7 +#define PCIECFG_OFF_MASK 0xfff + +#define PCIE_CONFIG_ADDR(b, s, f, o) \ + ((((b) & PCIECFG_BUS_MASK) << PCIECFG_BUS_SHIFT) \ + | (((s) & PCIECFG_SLOT_MASK) << PCIECFG_SLOT_SHIFT) \ + | (((f) & PCIECFG_FUN_MASK) << PCIECFG_FUN_SHIFT) \ + | (((o) & PCIECFG_OFF_MASK) << PCIECFG_OFF_SHIFT)) + +#define PCIE_CONFIG_BUS(a) (((a) >> PCIECFG_BUS_SHIFT) & PCIECFG_BUS_MASK) +#define PCIE_CONFIG_SLOT(a) (((a) >> PCIECFG_SLOT_SHIFT) & PCIECFG_SLOT_MASK) +#define PCIE_CONFIG_FUN(a) (((a) >> PCIECFG_FUN_SHIFT) & PCIECFG_FUN_MASK) +#define PCIE_CONFIG_OFF(a) (((a) >> PCIECFG_OFF_SHIFT) & PCIECFG_OFF_MASK) + + + +#define PCI_BAR_MAX 6 + +#define PCI_ROM_BAR 8 + +#define PCR_RSVDA_MAX 2 + + + +#define PCIBAR_FLAGS 0xf +#define PCIBAR_IO 0x1 +#define PCIBAR_MEM1M 0x2 +#define PCIBAR_MEM64 0x4 +#define PCIBAR_PREFETCH 0x8 +#define PCIBAR_MEM32_MASK 0xFFFFFF80 + + + +#define PCI_CAPPTR_PRESENT 0x0010 + +typedef struct _pci_config_regs { + uint16 vendor; + uint16 device; + uint16 command; + uint16 status; + uint8 rev_id; + uint8 prog_if; + uint8 sub_class; + uint8 base_class; + uint8 cache_line_size; + uint8 latency_timer; + uint8 header_type; + uint8 bist; + uint32 base[PCI_BAR_MAX]; + uint32 cardbus_cis; + uint16 subsys_vendor; + uint16 subsys_id; + uint32 baserom; + uint32 rsvd_a[PCR_RSVDA_MAX]; + uint8 int_line; + uint8 int_pin; + uint8 min_gnt; + uint8 max_lat; + uint8 dev_dep[192]; +} pci_config_regs; + +#define SZPCR (sizeof (pci_config_regs)) +#define MINSZPCR 64 + +#endif + +#define PCI_CFG_VID 0 +#define PCI_CFG_DID 2 +#define PCI_CFG_CMD 4 +#define PCI_CFG_STAT 6 +#define PCI_CFG_REV 8 +#define PCI_CFG_PROGIF 9 +#define PCI_CFG_SUBCL 0xa +#define PCI_CFG_BASECL 0xb +#define PCI_CFG_CLSZ 0xc +#define PCI_CFG_LATTIM 0xd +#define PCI_CFG_HDR 0xe +#define PCI_CFG_BIST 0xf +#define PCI_CFG_BAR0 0x10 +#define PCI_CFG_BAR1 0x14 +#define PCI_CFG_BAR2 0x18 +#define PCI_CFG_BAR3 0x1c +#define PCI_CFG_BAR4 0x20 +#define PCI_CFG_BAR5 0x24 +#define PCI_CFG_CIS 0x28 +#define PCI_CFG_SVID 0x2c +#define PCI_CFG_SSID 0x2e +#define PCI_CFG_ROMBAR 0x30 +#define PCI_CFG_CAPPTR 0x34 +#define PCI_CFG_INT 0x3c +#define PCI_CFG_PIN 0x3d +#define PCI_CFG_MINGNT 0x3e +#define PCI_CFG_MAXLAT 0x3f +#define PCI_CFG_DEVCTRL 0xd8 +#ifndef LINUX_POSTMOGRIFY_REMOVAL + + + + + +typedef enum { + PCI_CLASS_OLD = 0, + PCI_CLASS_DASDI, + PCI_CLASS_NET, + PCI_CLASS_DISPLAY, + PCI_CLASS_MMEDIA, + PCI_CLASS_MEMORY, + PCI_CLASS_BRIDGE, + PCI_CLASS_COMM, + PCI_CLASS_BASE, + PCI_CLASS_INPUT, + PCI_CLASS_DOCK, + PCI_CLASS_CPU, + PCI_CLASS_SERIAL, + PCI_CLASS_INTELLIGENT = 0xe, + PCI_CLASS_SATELLITE, + PCI_CLASS_CRYPT, + PCI_CLASS_DSP, + PCI_CLASS_XOR = 0xfe +} pci_classes; + +typedef enum { + PCI_DASDI_SCSI, + PCI_DASDI_IDE, + PCI_DASDI_FLOPPY, + PCI_DASDI_IPI, + PCI_DASDI_RAID, + PCI_DASDI_OTHER = 0x80 +} pci_dasdi_subclasses; + +typedef enum { + PCI_NET_ETHER, + PCI_NET_TOKEN, + PCI_NET_FDDI, + PCI_NET_ATM, + PCI_NET_OTHER = 0x80 +} pci_net_subclasses; + +typedef enum { + PCI_DISPLAY_VGA, + PCI_DISPLAY_XGA, + PCI_DISPLAY_3D, + PCI_DISPLAY_OTHER = 0x80 +} pci_display_subclasses; + +typedef enum { + PCI_MMEDIA_VIDEO, + PCI_MMEDIA_AUDIO, + PCI_MMEDIA_PHONE, + PCI_MEDIA_OTHER = 0x80 +} pci_mmedia_subclasses; + +typedef enum { + PCI_MEMORY_RAM, + PCI_MEMORY_FLASH, + PCI_MEMORY_OTHER = 0x80 +} pci_memory_subclasses; + +typedef enum { + PCI_BRIDGE_HOST, + PCI_BRIDGE_ISA, + PCI_BRIDGE_EISA, + PCI_BRIDGE_MC, + PCI_BRIDGE_PCI, + PCI_BRIDGE_PCMCIA, + PCI_BRIDGE_NUBUS, + PCI_BRIDGE_CARDBUS, + PCI_BRIDGE_RACEWAY, + PCI_BRIDGE_OTHER = 0x80 +} pci_bridge_subclasses; + +typedef enum { + PCI_COMM_UART, + PCI_COMM_PARALLEL, + PCI_COMM_MULTIUART, + PCI_COMM_MODEM, + PCI_COMM_OTHER = 0x80 +} pci_comm_subclasses; + +typedef enum { + PCI_BASE_PIC, + PCI_BASE_DMA, + PCI_BASE_TIMER, + PCI_BASE_RTC, + PCI_BASE_PCI_HOTPLUG, + PCI_BASE_OTHER = 0x80 +} pci_base_subclasses; + +typedef enum { + PCI_INPUT_KBD, + PCI_INPUT_PEN, + PCI_INPUT_MOUSE, + PCI_INPUT_SCANNER, + PCI_INPUT_GAMEPORT, + PCI_INPUT_OTHER = 0x80 +} pci_input_subclasses; + +typedef enum { + PCI_DOCK_GENERIC, + PCI_DOCK_OTHER = 0x80 +} pci_dock_subclasses; + +typedef enum { + PCI_CPU_386, + PCI_CPU_486, + PCI_CPU_PENTIUM, + PCI_CPU_ALPHA = 0x10, + PCI_CPU_POWERPC = 0x20, + PCI_CPU_MIPS = 0x30, + PCI_CPU_COPROC = 0x40, + PCI_CPU_OTHER = 0x80 +} pci_cpu_subclasses; + +typedef enum { + PCI_SERIAL_IEEE1394, + PCI_SERIAL_ACCESS, + PCI_SERIAL_SSA, + PCI_SERIAL_USB, + PCI_SERIAL_FIBER, + PCI_SERIAL_SMBUS, + PCI_SERIAL_OTHER = 0x80 +} pci_serial_subclasses; + +typedef enum { + PCI_INTELLIGENT_I2O +} pci_intelligent_subclasses; + +typedef enum { + PCI_SATELLITE_TV, + PCI_SATELLITE_AUDIO, + PCI_SATELLITE_VOICE, + PCI_SATELLITE_DATA, + PCI_SATELLITE_OTHER = 0x80 +} pci_satellite_subclasses; + +typedef enum { + PCI_CRYPT_NETWORK, + PCI_CRYPT_ENTERTAINMENT, + PCI_CRYPT_OTHER = 0x80 +} pci_crypt_subclasses; + +typedef enum { + PCI_DSP_DPIO, + PCI_DSP_OTHER = 0x80 +} pci_dsp_subclasses; + +typedef enum { + PCI_XOR_QDMA, + PCI_XOR_OTHER = 0x80 +} pci_xor_subclasses; + + +#define PCI_HEADER_MULTI 0x80 +#define PCI_HEADER_MASK 0x7f +typedef enum { + PCI_HEADER_NORMAL, + PCI_HEADER_BRIDGE, + PCI_HEADER_CARDBUS +} pci_header_types; + + + + +#define PPB_RSVDA_MAX 2 +#define PPB_RSVDD_MAX 8 + +typedef struct _ppb_config_regs { + uint16 vendor; + uint16 device; + uint16 command; + uint16 status; + uint8 rev_id; + uint8 prog_if; + uint8 sub_class; + uint8 base_class; + uint8 cache_line_size; + uint8 latency_timer; + uint8 header_type; + uint8 bist; + uint32 rsvd_a[PPB_RSVDA_MAX]; + uint8 prim_bus; + uint8 sec_bus; + uint8 sub_bus; + uint8 sec_lat; + uint8 io_base; + uint8 io_lim; + uint16 sec_status; + uint16 mem_base; + uint16 mem_lim; + uint16 pf_mem_base; + uint16 pf_mem_lim; + uint32 pf_mem_base_hi; + uint32 pf_mem_lim_hi; + uint16 io_base_hi; + uint16 io_lim_hi; + uint16 subsys_vendor; + uint16 subsys_id; + uint32 rsvd_b; + uint8 rsvd_c; + uint8 int_pin; + uint16 bridge_ctrl; + uint8 chip_ctrl; + uint8 diag_ctrl; + uint16 arb_ctrl; + uint32 rsvd_d[PPB_RSVDD_MAX]; + uint8 dev_dep[192]; +} ppb_config_regs; + + + +#define PCI_CAP_POWERMGMTCAP_ID 0x01 +#define PCI_CAP_MSICAP_ID 0x05 +#define PCI_CAP_VENDSPEC_ID 0x09 +#define PCI_CAP_PCIECAP_ID 0x10 + + +typedef struct _pciconfig_cap_msi { + uint8 capID; + uint8 nextptr; + uint16 msgctrl; + uint32 msgaddr; +} pciconfig_cap_msi; + + +typedef struct _pciconfig_cap_pwrmgmt { + uint8 capID; + uint8 nextptr; + uint16 pme_cap; + uint16 pme_sts_ctrl; + uint8 pme_bridge_ext; + uint8 data; +} pciconfig_cap_pwrmgmt; + +#define PME_CAP_PM_STATES (0x1f << 27) +#define PME_CSR_OFFSET 0x4 +#define PME_CSR_PME_EN (1 << 8) +#define PME_CSR_PME_STAT (1 << 15) + + +typedef struct _pciconfig_cap_pcie { + uint8 capID; + uint8 nextptr; + uint16 pcie_cap; + uint32 dev_cap; + uint16 dev_ctrl; + uint16 dev_status; + uint32 link_cap; + uint16 link_ctrl; + uint16 link_status; + uint32 slot_cap; + uint16 slot_ctrl; + uint16 slot_status; + uint16 root_ctrl; + uint16 root_cap; + uint32 root_status; +} pciconfig_cap_pcie; + + +#define PCIE_EXTCFG_OFFSET 0x100 +#define PCIE_ADVERRREP_CAPID 0x0001 +#define PCIE_VC_CAPID 0x0002 +#define PCIE_DEVSNUM_CAPID 0x0003 +#define PCIE_PWRBUDGET_CAPID 0x0004 + + +#define PCIE_ADV_CORR_ERR_MASK 0x114 +#define CORR_ERR_RE (1 << 0) +#define CORR_ERR_BT (1 << 6) +#define CORR_ERR_BD (1 << 7) +#define CORR_ERR_RR (1 << 8) +#define CORR_ERR_RT (1 << 12) +#define ALL_CORR_ERRORS (CORR_ERR_RE | CORR_ERR_BT | CORR_ERR_BD | \ + CORR_ERR_RR | CORR_ERR_RT) + + +#define PCIE_RC_CORR_SERR_EN 0x0001 +#define PCIE_RC_NONFATAL_SERR_EN 0x0002 +#define PCIE_RC_FATAL_SERR_EN 0x0004 +#define PCIE_RC_PME_INT_EN 0x0008 +#define PCIE_RC_CRS_EN 0x0010 + + +#define PCIE_RC_CRS_VISIBILITY 0x0001 + + +typedef struct _pcie_enhanced_caphdr { + uint16 capID; + uint16 cap_ver : 4; + uint16 next_ptr : 12; +} pcie_enhanced_caphdr; + + + + + + +#define cap_list rsvd_a[0] +#define bar0_window dev_dep[0x80 - 0x40] +#define bar1_window dev_dep[0x84 - 0x40] +#define sprom_control dev_dep[0x88 - 0x40] +#endif +#define PCI_BAR0_WIN 0x80 +#define PCI_BAR1_WIN 0x84 +#define PCI_SPROM_CONTROL 0x88 +#define PCI_BAR1_CONTROL 0x8c +#define PCI_INT_STATUS 0x90 +#define PCI_INT_MASK 0x94 +#define PCI_TO_SB_MB 0x98 +#define PCI_BACKPLANE_ADDR 0xa0 +#define PCI_BACKPLANE_DATA 0xa4 +#define PCI_CLK_CTL_ST 0xa8 +#define PCI_BAR0_WIN2 0xac +#define PCI_GPIO_IN 0xb0 +#define PCI_GPIO_OUT 0xb4 +#define PCI_GPIO_OUTEN 0xb8 + +#define PCI_BAR0_SHADOW_OFFSET (2 * 1024) +#define PCI_BAR0_SPROM_OFFSET (4 * 1024) +#define PCI_BAR0_PCIREGS_OFFSET (6 * 1024) +#define PCI_BAR0_PCISBR_OFFSET (4 * 1024) + +#define PCIE2_BAR0_WIN2 0x70 +#define PCIE2_BAR0_CORE2_WIN 0x74 +#define PCIE2_BAR0_CORE2_WIN2 0x78 + +#define PCI_BAR0_WINSZ (16 * 1024) + +#define PCI_16KB0_PCIREGS_OFFSET (8 * 1024) +#define PCI_16KB0_CCREGS_OFFSET (12 * 1024) +#define PCI_16KBB0_WINSZ (16 * 1024) + +#ifndef LINUX_POSTMOGRIFY_REMOVAL + +#define PCI_16KB0_WIN2_OFFSET (4 * 1024) + + +#define PCI_SBIM_STATUS_SERR 0x4 + + +#define PCI_SBIM_SHIFT 8 +#define PCI_SBIM_MASK 0xff00 +#define PCI_SBIM_MASK_SERR 0x4 + +#ifndef LINUX_POSTMOGRIFY_REMOVAL + +#define SPROM_SZ_MSK 0x02 +#define SPROM_LOCKED 0x08 +#define SPROM_BLANK 0x04 +#define SPROM_WRITEEN 0x10 +#define SPROM_BOOTROM_WE 0x20 +#define SPROM_BACKPLANE_EN 0x40 +#define SPROM_OTPIN_USE 0x80 +#endif + + +#define PCI_CMD_IO 0x00000001 +#define PCI_CMD_MEMORY 0x00000002 +#define PCI_CMD_MASTER 0x00000004 +#define PCI_CMD_SPECIAL 0x00000008 +#define PCI_CMD_INVALIDATE 0x00000010 +#define PCI_CMD_VGA_PAL 0x00000040 +#define PCI_STAT_TA 0x08000000 +#endif + +#define PCI_CONFIG_SPACE_SIZE 256 +#endif diff --git a/external/cache/sources/wl/include/proto/802.11.h b/external/cache/sources/wl/include/proto/802.11.h new file mode 100644 index 0000000..8854a9f --- /dev/null +++ b/external/cache/sources/wl/include/proto/802.11.h @@ -0,0 +1,3803 @@ +/* + * $Copyright Open Broadcom Corporation$ + * + * Fundamental types and constants relating to 802.11 + * + * $Id: 802.11.h 401759 2013-05-13 16:08:08Z sudhirbs $ + */ + +#ifndef _802_11_H_ +#define _802_11_H_ + +#ifndef _TYPEDEFS_H_ +#include +#endif + +#ifndef _NET_ETHERNET_H_ +#include +#endif + +/* XXX Include WPA definitions here for compatibility */ +#include + +/* This marks the start of a packed structure section. */ +#include + + +#define DOT11_TU_TO_US 1024 /* 802.11 Time Unit is 1024 microseconds */ + +/* Generic 802.11 frame constants */ +#define DOT11_A3_HDR_LEN 24 /* d11 header length with A3 */ +#define DOT11_A4_HDR_LEN 30 /* d11 header length with A4 */ +#define DOT11_MAC_HDR_LEN DOT11_A3_HDR_LEN /* MAC header length */ +#define DOT11_FCS_LEN 4 /* d11 FCS length */ +#define DOT11_ICV_LEN 4 /* d11 ICV length */ +#define DOT11_ICV_AES_LEN 8 /* d11 ICV/AES length */ +#define DOT11_QOS_LEN 2 /* d11 QoS length */ +#define DOT11_HTC_LEN 4 /* d11 HT Control field length */ + +#define DOT11_KEY_INDEX_SHIFT 6 /* d11 key index shift */ +#define DOT11_IV_LEN 4 /* d11 IV length */ +#define DOT11_IV_TKIP_LEN 8 /* d11 IV TKIP length */ +#define DOT11_IV_AES_OCB_LEN 4 /* d11 IV/AES/OCB length */ +#define DOT11_IV_AES_CCM_LEN 8 /* d11 IV/AES/CCM length */ +#define DOT11_IV_MAX_LEN 8 /* maximum iv len for any encryption */ + +/* Includes MIC */ +#define DOT11_MAX_MPDU_BODY_LEN 2304 /* max MPDU body length */ +/* A4 header + QoS + CCMP + PDU + ICV + FCS = 2352 */ +#define DOT11_MAX_MPDU_LEN (DOT11_A4_HDR_LEN + \ + DOT11_QOS_LEN + \ + DOT11_IV_AES_CCM_LEN + \ + DOT11_MAX_MPDU_BODY_LEN + \ + DOT11_ICV_LEN + \ + DOT11_FCS_LEN) /* d11 max MPDU length */ + +#define DOT11_MAX_SSID_LEN 32 /* d11 max ssid length */ + +/* dot11RTSThreshold */ +#define DOT11_DEFAULT_RTS_LEN 2347 /* d11 default RTS length */ +#define DOT11_MAX_RTS_LEN 2347 /* d11 max RTS length */ + +/* dot11FragmentationThreshold */ +#define DOT11_MIN_FRAG_LEN 256 /* d11 min fragmentation length */ +#define DOT11_MAX_FRAG_LEN 2346 /* Max frag is also limited by aMPDUMaxLength + * of the attached PHY + */ +#define DOT11_DEFAULT_FRAG_LEN 2346 /* d11 default fragmentation length */ + +/* dot11BeaconPeriod */ +#define DOT11_MIN_BEACON_PERIOD 1 /* d11 min beacon period */ +#define DOT11_MAX_BEACON_PERIOD 0xFFFF /* d11 max beacon period */ + +/* dot11DTIMPeriod */ +#define DOT11_MIN_DTIM_PERIOD 1 /* d11 min DTIM period */ +#define DOT11_MAX_DTIM_PERIOD 0xFF /* d11 max DTIM period */ + +/* 802.2 LLC/SNAP header used by 802.11 per 802.1H */ +#define DOT11_LLC_SNAP_HDR_LEN 8 /* d11 LLC/SNAP header length */ +#define DOT11_OUI_LEN 3 /* d11 OUI length */ +BWL_PRE_PACKED_STRUCT struct dot11_llc_snap_header { + uint8 dsap; /* always 0xAA */ + uint8 ssap; /* always 0xAA */ + uint8 ctl; /* always 0x03 */ + uint8 oui[DOT11_OUI_LEN]; /* RFC1042: 0x00 0x00 0x00 + * Bridge-Tunnel: 0x00 0x00 0xF8 + */ + uint16 type; /* ethertype */ +} BWL_POST_PACKED_STRUCT; + +/* RFC1042 header used by 802.11 per 802.1H */ +#define RFC1042_HDR_LEN (ETHER_HDR_LEN + DOT11_LLC_SNAP_HDR_LEN) /* RCF1042 header length */ + +/* Generic 802.11 MAC header */ +/* + * N.B.: This struct reflects the full 4 address 802.11 MAC header. + * The fields are defined such that the shorter 1, 2, and 3 + * address headers just use the first k fields. + */ +BWL_PRE_PACKED_STRUCT struct dot11_header { + uint16 fc; /* frame control */ + uint16 durid; /* duration/ID */ + struct ether_addr a1; /* address 1 */ + struct ether_addr a2; /* address 2 */ + struct ether_addr a3; /* address 3 */ + uint16 seq; /* sequence control */ + struct ether_addr a4; /* address 4 */ +} BWL_POST_PACKED_STRUCT; + +/* Control frames */ + +BWL_PRE_PACKED_STRUCT struct dot11_rts_frame { + uint16 fc; /* frame control */ + uint16 durid; /* duration/ID */ + struct ether_addr ra; /* receiver address */ + struct ether_addr ta; /* transmitter address */ +} BWL_POST_PACKED_STRUCT; +#define DOT11_RTS_LEN 16 /* d11 RTS frame length */ + +BWL_PRE_PACKED_STRUCT struct dot11_cts_frame { + uint16 fc; /* frame control */ + uint16 durid; /* duration/ID */ + struct ether_addr ra; /* receiver address */ +} BWL_POST_PACKED_STRUCT; +#define DOT11_CTS_LEN 10 /* d11 CTS frame length */ + +BWL_PRE_PACKED_STRUCT struct dot11_ack_frame { + uint16 fc; /* frame control */ + uint16 durid; /* duration/ID */ + struct ether_addr ra; /* receiver address */ +} BWL_POST_PACKED_STRUCT; +#define DOT11_ACK_LEN 10 /* d11 ACK frame length */ + +BWL_PRE_PACKED_STRUCT struct dot11_ps_poll_frame { + uint16 fc; /* frame control */ + uint16 durid; /* AID */ + struct ether_addr bssid; /* receiver address, STA in AP */ + struct ether_addr ta; /* transmitter address */ +} BWL_POST_PACKED_STRUCT; +#define DOT11_PS_POLL_LEN 16 /* d11 PS poll frame length */ + +BWL_PRE_PACKED_STRUCT struct dot11_cf_end_frame { + uint16 fc; /* frame control */ + uint16 durid; /* duration/ID */ + struct ether_addr ra; /* receiver address */ + struct ether_addr bssid; /* transmitter address, STA in AP */ +} BWL_POST_PACKED_STRUCT; +#define DOT11_CS_END_LEN 16 /* d11 CF-END frame length */ + +/* RWL wifi protocol: The Vendor Specific Action frame is defined for vendor-specific signaling +* category+OUI+vendor specific content ( this can be variable) +*/ +BWL_PRE_PACKED_STRUCT struct dot11_action_wifi_vendor_specific { + uint8 category; + uint8 OUI[3]; + uint8 type; + uint8 subtype; + uint8 data[1040]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_action_wifi_vendor_specific dot11_action_wifi_vendor_specific_t; + +/* generic vender specific action frame with variable length */ +BWL_PRE_PACKED_STRUCT struct dot11_action_vs_frmhdr { + uint8 category; + uint8 OUI[3]; + uint8 type; + uint8 subtype; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_action_vs_frmhdr dot11_action_vs_frmhdr_t; +#define DOT11_ACTION_VS_HDR_LEN 6 + +#define BCM_ACTION_OUI_BYTE0 0x00 +#define BCM_ACTION_OUI_BYTE1 0x90 +#define BCM_ACTION_OUI_BYTE2 0x4c + +/* BA/BAR Control parameters */ +#define DOT11_BA_CTL_POLICY_NORMAL 0x0000 /* normal ack */ +#define DOT11_BA_CTL_POLICY_NOACK 0x0001 /* no ack */ +#define DOT11_BA_CTL_POLICY_MASK 0x0001 /* ack policy mask */ + +#define DOT11_BA_CTL_MTID 0x0002 /* multi tid BA */ +#define DOT11_BA_CTL_COMPRESSED 0x0004 /* compressed bitmap */ + +#define DOT11_BA_CTL_NUMMSDU_MASK 0x0FC0 /* num msdu in bitmap mask */ +#define DOT11_BA_CTL_NUMMSDU_SHIFT 6 /* num msdu in bitmap shift */ + +#define DOT11_BA_CTL_TID_MASK 0xF000 /* tid mask */ +#define DOT11_BA_CTL_TID_SHIFT 12 /* tid shift */ + +/* control frame header (BA/BAR) */ +BWL_PRE_PACKED_STRUCT struct dot11_ctl_header { + uint16 fc; /* frame control */ + uint16 durid; /* duration/ID */ + struct ether_addr ra; /* receiver address */ + struct ether_addr ta; /* transmitter address */ +} BWL_POST_PACKED_STRUCT; +#define DOT11_CTL_HDR_LEN 16 /* control frame hdr len */ + +/* BAR frame payload */ +BWL_PRE_PACKED_STRUCT struct dot11_bar { + uint16 bar_control; /* BAR Control */ + uint16 seqnum; /* Starting Sequence control */ +} BWL_POST_PACKED_STRUCT; +#define DOT11_BAR_LEN 4 /* BAR frame payload length */ + +#define DOT11_BA_BITMAP_LEN 128 /* bitmap length */ +#define DOT11_BA_CMP_BITMAP_LEN 8 /* compressed bitmap length */ +/* BA frame payload */ +BWL_PRE_PACKED_STRUCT struct dot11_ba { + uint16 ba_control; /* BA Control */ + uint16 seqnum; /* Starting Sequence control */ + uint8 bitmap[DOT11_BA_BITMAP_LEN]; /* Block Ack Bitmap */ +} BWL_POST_PACKED_STRUCT; +#define DOT11_BA_LEN 4 /* BA frame payload len (wo bitmap) */ + +/* Management frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_management_header { + uint16 fc; /* frame control */ + uint16 durid; /* duration/ID */ + struct ether_addr da; /* receiver address */ + struct ether_addr sa; /* transmitter address */ + struct ether_addr bssid; /* BSS ID */ + uint16 seq; /* sequence control */ +} BWL_POST_PACKED_STRUCT; +#define DOT11_MGMT_HDR_LEN 24 /* d11 management header length */ + +/* Management frame payloads */ + +BWL_PRE_PACKED_STRUCT struct dot11_bcn_prb { + uint32 timestamp[2]; + uint16 beacon_interval; + uint16 capability; +} BWL_POST_PACKED_STRUCT; +#define DOT11_BCN_PRB_LEN 12 /* 802.11 beacon/probe frame fixed length */ +#define DOT11_BCN_PRB_FIXED_LEN 12 /* 802.11 beacon/probe frame fixed length */ + +BWL_PRE_PACKED_STRUCT struct dot11_auth { + uint16 alg; /* algorithm */ + uint16 seq; /* sequence control */ + uint16 status; /* status code */ +} BWL_POST_PACKED_STRUCT; +#define DOT11_AUTH_FIXED_LEN 6 /* length of auth frame without challenge IE */ + +BWL_PRE_PACKED_STRUCT struct dot11_assoc_req { + uint16 capability; /* capability information */ + uint16 listen; /* listen interval */ +} BWL_POST_PACKED_STRUCT; +#define DOT11_ASSOC_REQ_FIXED_LEN 4 /* length of assoc frame without info elts */ + +BWL_PRE_PACKED_STRUCT struct dot11_reassoc_req { + uint16 capability; /* capability information */ + uint16 listen; /* listen interval */ + struct ether_addr ap; /* Current AP address */ +} BWL_POST_PACKED_STRUCT; +#define DOT11_REASSOC_REQ_FIXED_LEN 10 /* length of assoc frame without info elts */ + +BWL_PRE_PACKED_STRUCT struct dot11_assoc_resp { + uint16 capability; /* capability information */ + uint16 status; /* status code */ + uint16 aid; /* association ID */ +} BWL_POST_PACKED_STRUCT; +#define DOT11_ASSOC_RESP_FIXED_LEN 6 /* length of assoc resp frame without info elts */ + +BWL_PRE_PACKED_STRUCT struct dot11_action_measure { + uint8 category; + uint8 action; + uint8 token; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +#define DOT11_ACTION_MEASURE_LEN 3 /* d11 action measurement header length */ + +BWL_PRE_PACKED_STRUCT struct dot11_action_ht_ch_width { + uint8 category; + uint8 action; + uint8 ch_width; +} BWL_POST_PACKED_STRUCT; + +BWL_PRE_PACKED_STRUCT struct dot11_action_ht_mimops { + uint8 category; + uint8 action; + uint8 control; +} BWL_POST_PACKED_STRUCT; + +BWL_PRE_PACKED_STRUCT struct dot11_action_sa_query { + uint8 category; + uint8 action; + uint16 id; +} BWL_POST_PACKED_STRUCT; + +BWL_PRE_PACKED_STRUCT struct dot11_action_vht_oper_mode { + uint8 category; + uint8 action; + uint8 mode; +} BWL_POST_PACKED_STRUCT; + +#define SM_PWRSAVE_ENABLE 1 +#define SM_PWRSAVE_MODE 2 + +/* ************* 802.11h related definitions. ************* */ +BWL_PRE_PACKED_STRUCT struct dot11_power_cnst { + uint8 id; + uint8 len; + uint8 power; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_power_cnst dot11_power_cnst_t; + +BWL_PRE_PACKED_STRUCT struct dot11_power_cap { + uint8 min; + uint8 max; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_power_cap dot11_power_cap_t; + +BWL_PRE_PACKED_STRUCT struct dot11_tpc_rep { + uint8 id; + uint8 len; + uint8 tx_pwr; + uint8 margin; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tpc_rep dot11_tpc_rep_t; +#define DOT11_MNG_IE_TPC_REPORT_LEN 2 /* length of IE data, not including 2 byte header */ + +BWL_PRE_PACKED_STRUCT struct dot11_supp_channels { + uint8 id; + uint8 len; + uint8 first_channel; + uint8 num_channels; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_supp_channels dot11_supp_channels_t; + +/* Extension Channel Offset IE: 802.11n-D1.0 spec. added sideband + * offset for 40MHz operation. The possible 3 values are: + * 1 = above control channel + * 3 = below control channel + * 0 = no extension channel + */ +BWL_PRE_PACKED_STRUCT struct dot11_extch { + uint8 id; /* IE ID, 62, DOT11_MNG_EXT_CHANNEL_OFFSET */ + uint8 len; /* IE length */ + uint8 extch; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_extch dot11_extch_ie_t; + +BWL_PRE_PACKED_STRUCT struct dot11_brcm_extch { + uint8 id; /* IE ID, 221, DOT11_MNG_PROPR_ID */ + uint8 len; /* IE length */ + uint8 oui[3]; /* Proprietary OUI, BRCM_PROP_OUI */ + uint8 type; /* type inidicates what follows */ + uint8 extch; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_brcm_extch dot11_brcm_extch_ie_t; + +#define BRCM_EXTCH_IE_LEN 5 +#define BRCM_EXTCH_IE_TYPE 53 /* 802.11n ID not yet assigned */ +#define DOT11_EXTCH_IE_LEN 1 +#define DOT11_EXT_CH_MASK 0x03 /* extension channel mask */ +#define DOT11_EXT_CH_UPPER 0x01 /* ext. ch. on upper sb */ +#define DOT11_EXT_CH_LOWER 0x03 /* ext. ch. on lower sb */ +#define DOT11_EXT_CH_NONE 0x00 /* no extension ch. */ + +BWL_PRE_PACKED_STRUCT struct dot11_action_frmhdr { + uint8 category; + uint8 action; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +#define DOT11_ACTION_FRMHDR_LEN 2 + +/* CSA IE data structure */ +BWL_PRE_PACKED_STRUCT struct dot11_channel_switch { + uint8 id; /* id DOT11_MNG_CHANNEL_SWITCH_ID */ + uint8 len; /* length of IE */ + uint8 mode; /* mode 0 or 1 */ + uint8 channel; /* channel switch to */ + uint8 count; /* number of beacons before switching */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_channel_switch dot11_chan_switch_ie_t; + +#define DOT11_SWITCH_IE_LEN 3 /* length of IE data, not including 2 byte header */ +/* CSA mode - 802.11h-2003 $7.3.2.20 */ +#define DOT11_CSA_MODE_ADVISORY 0 /* no DOT11_CSA_MODE_NO_TX restriction imposed */ +#define DOT11_CSA_MODE_NO_TX 1 /* no transmission upon receiving CSA frame. */ + +BWL_PRE_PACKED_STRUCT struct dot11_action_switch_channel { + uint8 category; + uint8 action; + dot11_chan_switch_ie_t chan_switch_ie; /* for switch IE */ + dot11_brcm_extch_ie_t extch_ie; /* extension channel offset */ +} BWL_POST_PACKED_STRUCT; + +BWL_PRE_PACKED_STRUCT struct dot11_csa_body { + uint8 mode; /* mode 0 or 1 */ + uint8 reg; /* regulatory class */ + uint8 channel; /* channel switch to */ + uint8 count; /* number of beacons before switching */ +} BWL_POST_PACKED_STRUCT; + +/* 11n Extended Channel Switch IE data structure */ +BWL_PRE_PACKED_STRUCT struct dot11_ext_csa { + uint8 id; /* id DOT11_MNG_EXT_CHANNEL_SWITCH_ID */ + uint8 len; /* length of IE */ + struct dot11_csa_body b; /* body of the ie */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_ext_csa dot11_ext_csa_ie_t; +#define DOT11_EXT_CSA_IE_LEN 4 /* length of extended channel switch IE body */ + +BWL_PRE_PACKED_STRUCT struct dot11_action_ext_csa { + uint8 category; + uint8 action; + dot11_ext_csa_ie_t chan_switch_ie; /* for switch IE */ +} BWL_POST_PACKED_STRUCT; + +BWL_PRE_PACKED_STRUCT struct dot11y_action_ext_csa { + uint8 category; + uint8 action; + struct dot11_csa_body b; /* body of the ie */ +} BWL_POST_PACKED_STRUCT; + +/* Wide Bandwidth Channel Switch IE data structure */ +BWL_PRE_PACKED_STRUCT struct dot11_wide_bw_channel_switch { + uint8 id; /* id DOT11_MNG_WIDE_BW_CHANNEL_SWITCH_ID */ + uint8 len; /* length of IE */ + uint8 channel_width; /* new channel width */ + uint8 center_frequency_segment_0; /* center frequency segment 0 */ + uint8 center_frequency_segment_1; /* center frequency segment 1 */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_wide_bw_channel_switch dot11_wide_bw_chan_switch_ie_t; + +#define DOT11_WIDE_BW_SWITCH_IE_LEN 3 /* length of IE data, not including 2 byte header */ + +/* Channel Switch Wrapper IE data structure */ +BWL_PRE_PACKED_STRUCT struct dot11_channel_switch_wrapper { + uint8 id; /* id DOT11_MNG_WIDE_BW_CHANNEL_SWITCH_ID */ + uint8 len; /* length of IE */ + dot11_wide_bw_chan_switch_ie_t wb_chan_switch_ie; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_channel_switch_wrapper dot11_chan_switch_wrapper_ie_t; + +/* VHT Transmit Power Envelope IE data structure */ +BWL_PRE_PACKED_STRUCT struct dot11_vht_transmit_power_envelope { + uint8 id; /* id DOT11_MNG_WIDE_BW_CHANNEL_SWITCH_ID */ + uint8 len; /* length of IE */ + uint8 transmit_power_info; + uint8 local_max_transmit_power_20; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_vht_transmit_power_envelope dot11_vht_transmit_power_envelope_ie_t; + +/* vht transmit power envelope IE length depends on channel width */ +#define DOT11_VHT_TRANSMIT_PWR_ENVELOPE_IE_LEN_40MHZ 1 +#define DOT11_VHT_TRANSMIT_PWR_ENVELOPE_IE_LEN_80MHZ 2 +#define DOT11_VHT_TRANSMIT_PWR_ENVELOPE_IE_LEN_160MHZ 3 + +BWL_PRE_PACKED_STRUCT struct dot11_obss_coex { + uint8 id; + uint8 len; + uint8 info; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_obss_coex dot11_obss_coex_t; +#define DOT11_OBSS_COEXINFO_LEN 1 /* length of OBSS Coexistence INFO IE */ + +#define DOT11_OBSS_COEX_INFO_REQ 0x01 +#define DOT11_OBSS_COEX_40MHZ_INTOLERANT 0x02 +#define DOT11_OBSS_COEX_20MHZ_WIDTH_REQ 0x04 + +BWL_PRE_PACKED_STRUCT struct dot11_obss_chanlist { + uint8 id; + uint8 len; + uint8 regclass; + uint8 chanlist[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_obss_chanlist dot11_obss_chanlist_t; +#define DOT11_OBSS_CHANLIST_FIXED_LEN 1 /* fixed length of regclass */ + +BWL_PRE_PACKED_STRUCT struct dot11_extcap_ie { + uint8 id; + uint8 len; + uint8 cap[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_extcap_ie dot11_extcap_ie_t; + +#define DOT11_EXTCAP_LEN_MAX 8 + +#define DOT11_EXTCAP_LEN_COEX 1 +#define DOT11_EXTCAP_LEN_BT 3 +#define DOT11_EXTCAP_LEN_IW 4 +#define DOT11_EXTCAP_LEN_SI 6 + +#define DOT11_EXTCAP_LEN_TDLS 5 +#define DOT11_11AC_EXTCAP_LEN_TDLS 8 + +#define DOT11_EXTCAP_LEN_FMS 2 +#define DOT11_EXTCAP_LEN_PROXY_ARP 2 +#define DOT11_EXTCAP_LEN_TFS 3 +#define DOT11_EXTCAP_LEN_WNM_SLEEP 3 +#define DOT11_EXTCAP_LEN_TIMBC 3 +#define DOT11_EXTCAP_LEN_BSSTRANS 3 +#define DOT11_EXTCAP_LEN_DMS 4 +#define DOT11_EXTCAP_LEN_WNM_NOTIFICATION 6 +#define DOT11_EXTCAP_LEN_TDLS_WBW 8 +#define DOT11_EXTCAP_LEN_OPMODE_NOTIFICATION 8 + +BWL_PRE_PACKED_STRUCT struct dot11_extcap { + uint8 extcap[DOT11_EXTCAP_LEN_MAX]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_extcap dot11_extcap_t; + +/* TDLS Capabilities */ +#define DOT11_TDLS_CAP_TDLS 37 /* TDLS support */ +#define DOT11_TDLS_CAP_PU_BUFFER_STA 28 /* TDLS Peer U-APSD buffer STA support */ +#define DOT11_TDLS_CAP_PEER_PSM 20 /* TDLS Peer PSM support */ +#define DOT11_TDLS_CAP_CH_SW 30 /* TDLS Channel switch */ +#define DOT11_TDLS_CAP_PROH 38 /* TDLS prohibited */ +#define DOT11_TDLS_CAP_CH_SW_PROH 39 /* TDLS Channel switch prohibited */ +#define DOT11_TDLS_CAP_TDLS_WIDER_BW 61 /* TDLS Wider Band-Width */ + +#define TDLS_CAP_MAX_BIT 39 /* TDLS max bit defined in ext cap */ + +/* 802.11h/802.11k Measurement Request/Report IEs */ +/* Measurement Type field */ +#define DOT11_MEASURE_TYPE_BASIC 0 /* d11 measurement basic type */ +#define DOT11_MEASURE_TYPE_CCA 1 /* d11 measurement CCA type */ +#define DOT11_MEASURE_TYPE_RPI 2 /* d11 measurement RPI type */ +#define DOT11_MEASURE_TYPE_CHLOAD 3 /* d11 measurement Channel Load type */ +#define DOT11_MEASURE_TYPE_NOISE 4 /* d11 measurement Noise Histogram type */ +#define DOT11_MEASURE_TYPE_BEACON 5 /* d11 measurement Beacon type */ +#define DOT11_MEASURE_TYPE_FRAME 6 /* d11 measurement Frame type */ +#define DOT11_MEASURE_TYPE_STAT 7 /* d11 measurement STA Statistics type */ +#define DOT11_MEASURE_TYPE_LCI 8 /* d11 measurement LCI type */ +#define DOT11_MEASURE_TYPE_TXSTREAM 9 /* d11 measurement TX Stream type */ +#define DOT11_MEASURE_TYPE_PAUSE 255 /* d11 measurement pause type */ + +/* Measurement Request Modes */ +#define DOT11_MEASURE_MODE_PARALLEL (1<<0) /* d11 measurement parallel */ +#define DOT11_MEASURE_MODE_ENABLE (1<<1) /* d11 measurement enable */ +#define DOT11_MEASURE_MODE_REQUEST (1<<2) /* d11 measurement request */ +#define DOT11_MEASURE_MODE_REPORT (1<<3) /* d11 measurement report */ +#define DOT11_MEASURE_MODE_DUR (1<<4) /* d11 measurement dur mandatory */ +/* Measurement Report Modes */ +#define DOT11_MEASURE_MODE_LATE (1<<0) /* d11 measurement late */ +#define DOT11_MEASURE_MODE_INCAPABLE (1<<1) /* d11 measurement incapable */ +#define DOT11_MEASURE_MODE_REFUSED (1<<2) /* d11 measurement refuse */ +/* Basic Measurement Map bits */ +#define DOT11_MEASURE_BASIC_MAP_BSS ((uint8)(1<<0)) /* d11 measurement basic map BSS */ +#define DOT11_MEASURE_BASIC_MAP_OFDM ((uint8)(1<<1)) /* d11 measurement map OFDM */ +#define DOT11_MEASURE_BASIC_MAP_UKNOWN ((uint8)(1<<2)) /* d11 measurement map unknown */ +#define DOT11_MEASURE_BASIC_MAP_RADAR ((uint8)(1<<3)) /* d11 measurement map radar */ +#define DOT11_MEASURE_BASIC_MAP_UNMEAS ((uint8)(1<<4)) /* d11 measurement map unmeasuremnt */ + +BWL_PRE_PACKED_STRUCT struct dot11_meas_req { + uint8 id; + uint8 len; + uint8 token; + uint8 mode; + uint8 type; + uint8 channel; + uint8 start_time[8]; + uint16 duration; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_meas_req dot11_meas_req_t; +#define DOT11_MNG_IE_MREQ_LEN 14 /* d11 measurement request IE length */ +/* length of Measure Request IE data not including variable len */ +#define DOT11_MNG_IE_MREQ_FIXED_LEN 3 /* d11 measurement request IE fixed length */ + +BWL_PRE_PACKED_STRUCT struct dot11_meas_rep { + uint8 id; + uint8 len; + uint8 token; + uint8 mode; + uint8 type; + BWL_PRE_PACKED_STRUCT union + { + BWL_PRE_PACKED_STRUCT struct { + uint8 channel; + uint8 start_time[8]; + uint16 duration; + uint8 map; + } BWL_POST_PACKED_STRUCT basic; + uint8 data[1]; + } BWL_POST_PACKED_STRUCT rep; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_meas_rep dot11_meas_rep_t; + +/* length of Measure Report IE data not including variable len */ +#define DOT11_MNG_IE_MREP_FIXED_LEN 3 /* d11 measurement response IE fixed length */ + +BWL_PRE_PACKED_STRUCT struct dot11_meas_rep_basic { + uint8 channel; + uint8 start_time[8]; + uint16 duration; + uint8 map; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_meas_rep_basic dot11_meas_rep_basic_t; +#define DOT11_MEASURE_BASIC_REP_LEN 12 /* d11 measurement basic report length */ + +BWL_PRE_PACKED_STRUCT struct dot11_quiet { + uint8 id; + uint8 len; + uint8 count; /* TBTTs until beacon interval in quiet starts */ + uint8 period; /* Beacon intervals between periodic quiet periods ? */ + uint16 duration; /* Length of quiet period, in TU's */ + uint16 offset; /* TU's offset from TBTT in Count field */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_quiet dot11_quiet_t; + +BWL_PRE_PACKED_STRUCT struct chan_map_tuple { + uint8 channel; + uint8 map; +} BWL_POST_PACKED_STRUCT; +typedef struct chan_map_tuple chan_map_tuple_t; + +BWL_PRE_PACKED_STRUCT struct dot11_ibss_dfs { + uint8 id; + uint8 len; + uint8 eaddr[ETHER_ADDR_LEN]; + uint8 interval; + chan_map_tuple_t map[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_ibss_dfs dot11_ibss_dfs_t; + +/* WME Elements */ +#define WME_OUI "\x00\x50\xf2" /* WME OUI */ +#define WME_OUI_LEN 3 +#define WME_OUI_TYPE 2 /* WME type */ +#define WME_TYPE 2 /* WME type, deprecated */ +#define WME_SUBTYPE_IE 0 /* Information Element */ +#define WME_SUBTYPE_PARAM_IE 1 /* Parameter Element */ +#define WME_SUBTYPE_TSPEC 2 /* Traffic Specification */ +#define WME_VER 1 /* WME version */ + +/* WME Access Category Indices (ACIs) */ +#define AC_BE 0 /* Best Effort */ +#define AC_BK 1 /* Background */ +#define AC_VI 2 /* Video */ +#define AC_VO 3 /* Voice */ +#define AC_COUNT 4 /* number of ACs */ + +typedef uint8 ac_bitmap_t; /* AC bitmap of (1 << AC_xx) */ + +#define AC_BITMAP_NONE 0x0 /* No ACs */ +#define AC_BITMAP_ALL 0xf /* All ACs */ +#define AC_BITMAP_TST(ab, ac) (((ab) & (1 << (ac))) != 0) +#define AC_BITMAP_SET(ab, ac) (((ab) |= (1 << (ac)))) +#define AC_BITMAP_RESET(ab, ac) (((ab) &= ~(1 << (ac)))) + +/* WME Information Element (IE) */ +BWL_PRE_PACKED_STRUCT struct wme_ie { + uint8 oui[3]; + uint8 type; + uint8 subtype; + uint8 version; + uint8 qosinfo; +} BWL_POST_PACKED_STRUCT; +typedef struct wme_ie wme_ie_t; +#define WME_IE_LEN 7 /* WME IE length */ + +BWL_PRE_PACKED_STRUCT struct edcf_acparam { + uint8 ACI; + uint8 ECW; + uint16 TXOP; /* stored in network order (ls octet first) */ +} BWL_POST_PACKED_STRUCT; +typedef struct edcf_acparam edcf_acparam_t; + +/* WME Parameter Element (PE) */ +BWL_PRE_PACKED_STRUCT struct wme_param_ie { + uint8 oui[3]; + uint8 type; + uint8 subtype; + uint8 version; + uint8 qosinfo; + uint8 rsvd; + edcf_acparam_t acparam[AC_COUNT]; +} BWL_POST_PACKED_STRUCT; +typedef struct wme_param_ie wme_param_ie_t; +#define WME_PARAM_IE_LEN 24 /* WME Parameter IE length */ + +/* QoS Info field for IE as sent from AP */ +#define WME_QI_AP_APSD_MASK 0x80 /* U-APSD Supported mask */ +#define WME_QI_AP_APSD_SHIFT 7 /* U-APSD Supported shift */ +#define WME_QI_AP_COUNT_MASK 0x0f /* Parameter set count mask */ +#define WME_QI_AP_COUNT_SHIFT 0 /* Parameter set count shift */ + +/* QoS Info field for IE as sent from STA */ +#define WME_QI_STA_MAXSPLEN_MASK 0x60 /* Max Service Period Length mask */ +#define WME_QI_STA_MAXSPLEN_SHIFT 5 /* Max Service Period Length shift */ +#define WME_QI_STA_APSD_ALL_MASK 0xf /* APSD all AC bits mask */ +#define WME_QI_STA_APSD_ALL_SHIFT 0 /* APSD all AC bits shift */ +#define WME_QI_STA_APSD_BE_MASK 0x8 /* APSD AC_BE mask */ +#define WME_QI_STA_APSD_BE_SHIFT 3 /* APSD AC_BE shift */ +#define WME_QI_STA_APSD_BK_MASK 0x4 /* APSD AC_BK mask */ +#define WME_QI_STA_APSD_BK_SHIFT 2 /* APSD AC_BK shift */ +#define WME_QI_STA_APSD_VI_MASK 0x2 /* APSD AC_VI mask */ +#define WME_QI_STA_APSD_VI_SHIFT 1 /* APSD AC_VI shift */ +#define WME_QI_STA_APSD_VO_MASK 0x1 /* APSD AC_VO mask */ +#define WME_QI_STA_APSD_VO_SHIFT 0 /* APSD AC_VO shift */ + +/* ACI */ +#define EDCF_AIFSN_MIN 1 /* AIFSN minimum value */ +#define EDCF_AIFSN_MAX 15 /* AIFSN maximum value */ +#define EDCF_AIFSN_MASK 0x0f /* AIFSN mask */ +#define EDCF_ACM_MASK 0x10 /* ACM mask */ +#define EDCF_ACI_MASK 0x60 /* ACI mask */ +#define EDCF_ACI_SHIFT 5 /* ACI shift */ +#define EDCF_AIFSN_SHIFT 12 /* 4 MSB(0xFFF) in ifs_ctl for AC idx */ + +/* ECW */ +#define EDCF_ECW_MIN 0 /* cwmin/cwmax exponent minimum value */ +#define EDCF_ECW_MAX 15 /* cwmin/cwmax exponent maximum value */ +#define EDCF_ECW2CW(exp) ((1 << (exp)) - 1) +#define EDCF_ECWMIN_MASK 0x0f /* cwmin exponent form mask */ +#define EDCF_ECWMAX_MASK 0xf0 /* cwmax exponent form mask */ +#define EDCF_ECWMAX_SHIFT 4 /* cwmax exponent form shift */ + +/* TXOP */ +#define EDCF_TXOP_MIN 0 /* TXOP minimum value */ +#define EDCF_TXOP_MAX 65535 /* TXOP maximum value */ +#define EDCF_TXOP2USEC(txop) ((txop) << 5) + +/* Default BE ACI value for non-WME connection STA */ +#define NON_EDCF_AC_BE_ACI_STA 0x02 + +/* Default EDCF parameters that AP advertises for STA to use; WMM draft Table 12 */ +#define EDCF_AC_BE_ACI_STA 0x03 /* STA ACI value for best effort AC */ +#define EDCF_AC_BE_ECW_STA 0xA4 /* STA ECW value for best effort AC */ +#define EDCF_AC_BE_TXOP_STA 0x0000 /* STA TXOP value for best effort AC */ +#define EDCF_AC_BK_ACI_STA 0x27 /* STA ACI value for background AC */ +#define EDCF_AC_BK_ECW_STA 0xA4 /* STA ECW value for background AC */ +#define EDCF_AC_BK_TXOP_STA 0x0000 /* STA TXOP value for background AC */ +#define EDCF_AC_VI_ACI_STA 0x42 /* STA ACI value for video AC */ +#define EDCF_AC_VI_ECW_STA 0x43 /* STA ECW value for video AC */ +#define EDCF_AC_VI_TXOP_STA 0x005e /* STA TXOP value for video AC */ +#define EDCF_AC_VO_ACI_STA 0x62 /* STA ACI value for audio AC */ +#define EDCF_AC_VO_ECW_STA 0x32 /* STA ECW value for audio AC */ +#define EDCF_AC_VO_TXOP_STA 0x002f /* STA TXOP value for audio AC */ + +/* Default EDCF parameters that AP uses; WMM draft Table 14 */ +#define EDCF_AC_BE_ACI_AP 0x03 /* AP ACI value for best effort AC */ +#define EDCF_AC_BE_ECW_AP 0x64 /* AP ECW value for best effort AC */ +#define EDCF_AC_BE_TXOP_AP 0x0000 /* AP TXOP value for best effort AC */ +#define EDCF_AC_BK_ACI_AP 0x27 /* AP ACI value for background AC */ +#define EDCF_AC_BK_ECW_AP 0xA4 /* AP ECW value for background AC */ +#define EDCF_AC_BK_TXOP_AP 0x0000 /* AP TXOP value for background AC */ +#define EDCF_AC_VI_ACI_AP 0x41 /* AP ACI value for video AC */ +#define EDCF_AC_VI_ECW_AP 0x43 /* AP ECW value for video AC */ +#define EDCF_AC_VI_TXOP_AP 0x005e /* AP TXOP value for video AC */ +#define EDCF_AC_VO_ACI_AP 0x61 /* AP ACI value for audio AC */ +#define EDCF_AC_VO_ECW_AP 0x32 /* AP ECW value for audio AC */ +#define EDCF_AC_VO_TXOP_AP 0x002f /* AP TXOP value for audio AC */ + +/* EDCA Parameter IE */ +BWL_PRE_PACKED_STRUCT struct edca_param_ie { + uint8 qosinfo; + uint8 rsvd; + edcf_acparam_t acparam[AC_COUNT]; +} BWL_POST_PACKED_STRUCT; +typedef struct edca_param_ie edca_param_ie_t; +#define EDCA_PARAM_IE_LEN 18 /* EDCA Parameter IE length */ + +/* QoS Capability IE */ +BWL_PRE_PACKED_STRUCT struct qos_cap_ie { + uint8 qosinfo; +} BWL_POST_PACKED_STRUCT; +typedef struct qos_cap_ie qos_cap_ie_t; + +BWL_PRE_PACKED_STRUCT struct dot11_qbss_load_ie { + uint8 id; /* 11, DOT11_MNG_QBSS_LOAD_ID */ + uint8 length; + uint16 station_count; /* total number of STAs associated */ + uint8 channel_utilization; /* % of time, normalized to 255, QAP sensed medium busy */ + uint16 aac; /* available admission capacity */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_qbss_load_ie dot11_qbss_load_ie_t; +#define BSS_LOAD_IE_SIZE 7 /* BSS load IE size */ + +/* nom_msdu_size */ +#define FIXED_MSDU_SIZE 0x8000 /* MSDU size is fixed */ +#define MSDU_SIZE_MASK 0x7fff /* (Nominal or fixed) MSDU size */ + +/* surplus_bandwidth */ +/* Represented as 3 bits of integer, binary point, 13 bits fraction */ +#define INTEGER_SHIFT 13 /* integer shift */ +#define FRACTION_MASK 0x1FFF /* fraction mask */ + +/* Management Notification Frame */ +BWL_PRE_PACKED_STRUCT struct dot11_management_notification { + uint8 category; /* DOT11_ACTION_NOTIFICATION */ + uint8 action; + uint8 token; + uint8 status; + uint8 data[1]; /* Elements */ +} BWL_POST_PACKED_STRUCT; +#define DOT11_MGMT_NOTIFICATION_LEN 4 /* Fixed length */ + +/* Timeout Interval IE */ +BWL_PRE_PACKED_STRUCT struct ti_ie { + uint8 ti_type; + uint32 ti_val; +} BWL_POST_PACKED_STRUCT; +typedef struct ti_ie ti_ie_t; +#define TI_TYPE_REASSOC_DEADLINE 1 +#define TI_TYPE_KEY_LIFETIME 2 + +/* WME Action Codes */ +#define WME_ADDTS_REQUEST 0 /* WME ADDTS request */ +#define WME_ADDTS_RESPONSE 1 /* WME ADDTS response */ +#define WME_DELTS_REQUEST 2 /* WME DELTS request */ + +/* WME Setup Response Status Codes */ +#define WME_ADMISSION_ACCEPTED 0 /* WME admission accepted */ +#define WME_INVALID_PARAMETERS 1 /* WME invalide parameters */ +#define WME_ADMISSION_REFUSED 3 /* WME admission refused */ + +/* Macro to take a pointer to a beacon or probe response + * body and return the char* pointer to the SSID info element + */ +#define BCN_PRB_SSID(body) ((char*)(body) + DOT11_BCN_PRB_LEN) + +/* Authentication frame payload constants */ +#define DOT11_OPEN_SYSTEM 0 /* d11 open authentication */ +#define DOT11_SHARED_KEY 1 /* d11 shared authentication */ +#define DOT11_FAST_BSS 2 /* d11 fast bss authentication */ +#define DOT11_CHALLENGE_LEN 128 /* d11 challenge text length */ + +/* Frame control macros */ +#define FC_PVER_MASK 0x3 /* PVER mask */ +#define FC_PVER_SHIFT 0 /* PVER shift */ +#define FC_TYPE_MASK 0xC /* type mask */ +#define FC_TYPE_SHIFT 2 /* type shift */ +#define FC_SUBTYPE_MASK 0xF0 /* subtype mask */ +#define FC_SUBTYPE_SHIFT 4 /* subtype shift */ +#define FC_TODS 0x100 /* to DS */ +#define FC_TODS_SHIFT 8 /* to DS shift */ +#define FC_FROMDS 0x200 /* from DS */ +#define FC_FROMDS_SHIFT 9 /* from DS shift */ +#define FC_MOREFRAG 0x400 /* more frag. */ +#define FC_MOREFRAG_SHIFT 10 /* more frag. shift */ +#define FC_RETRY 0x800 /* retry */ +#define FC_RETRY_SHIFT 11 /* retry shift */ +#define FC_PM 0x1000 /* PM */ +#define FC_PM_SHIFT 12 /* PM shift */ +#define FC_MOREDATA 0x2000 /* more data */ +#define FC_MOREDATA_SHIFT 13 /* more data shift */ +#define FC_WEP 0x4000 /* WEP */ +#define FC_WEP_SHIFT 14 /* WEP shift */ +#define FC_ORDER 0x8000 /* order */ +#define FC_ORDER_SHIFT 15 /* order shift */ + +/* sequence control macros */ +#define SEQNUM_SHIFT 4 /* seq. number shift */ +#define SEQNUM_MAX 0x1000 /* max seqnum + 1 */ +#define FRAGNUM_MASK 0xF /* frag. number mask */ + +/* Frame Control type/subtype defs */ + +/* FC Types */ +#define FC_TYPE_MNG 0 /* management type */ +#define FC_TYPE_CTL 1 /* control type */ +#define FC_TYPE_DATA 2 /* data type */ + +/* Management Subtypes */ +#define FC_SUBTYPE_ASSOC_REQ 0 /* assoc. request */ +#define FC_SUBTYPE_ASSOC_RESP 1 /* assoc. response */ +#define FC_SUBTYPE_REASSOC_REQ 2 /* reassoc. request */ +#define FC_SUBTYPE_REASSOC_RESP 3 /* reassoc. response */ +#define FC_SUBTYPE_PROBE_REQ 4 /* probe request */ +#define FC_SUBTYPE_PROBE_RESP 5 /* probe response */ +#define FC_SUBTYPE_BEACON 8 /* beacon */ +#define FC_SUBTYPE_ATIM 9 /* ATIM */ +#define FC_SUBTYPE_DISASSOC 10 /* disassoc. */ +#define FC_SUBTYPE_AUTH 11 /* authentication */ +#define FC_SUBTYPE_DEAUTH 12 /* de-authentication */ +#define FC_SUBTYPE_ACTION 13 /* action */ +#define FC_SUBTYPE_ACTION_NOACK 14 /* action no-ack */ + +/* Control Subtypes */ +#define FC_SUBTYPE_CTL_WRAPPER 7 /* Control Wrapper */ +#define FC_SUBTYPE_BLOCKACK_REQ 8 /* Block Ack Req */ +#define FC_SUBTYPE_BLOCKACK 9 /* Block Ack */ +#define FC_SUBTYPE_PS_POLL 10 /* PS poll */ +#define FC_SUBTYPE_RTS 11 /* RTS */ +#define FC_SUBTYPE_CTS 12 /* CTS */ +#define FC_SUBTYPE_ACK 13 /* ACK */ +#define FC_SUBTYPE_CF_END 14 /* CF-END */ +#define FC_SUBTYPE_CF_END_ACK 15 /* CF-END ACK */ + +/* Data Subtypes */ +#define FC_SUBTYPE_DATA 0 /* Data */ +#define FC_SUBTYPE_DATA_CF_ACK 1 /* Data + CF-ACK */ +#define FC_SUBTYPE_DATA_CF_POLL 2 /* Data + CF-Poll */ +#define FC_SUBTYPE_DATA_CF_ACK_POLL 3 /* Data + CF-Ack + CF-Poll */ +#define FC_SUBTYPE_NULL 4 /* Null */ +#define FC_SUBTYPE_CF_ACK 5 /* CF-Ack */ +#define FC_SUBTYPE_CF_POLL 6 /* CF-Poll */ +#define FC_SUBTYPE_CF_ACK_POLL 7 /* CF-Ack + CF-Poll */ +#define FC_SUBTYPE_QOS_DATA 8 /* QoS Data */ +#define FC_SUBTYPE_QOS_DATA_CF_ACK 9 /* QoS Data + CF-Ack */ +#define FC_SUBTYPE_QOS_DATA_CF_POLL 10 /* QoS Data + CF-Poll */ +#define FC_SUBTYPE_QOS_DATA_CF_ACK_POLL 11 /* QoS Data + CF-Ack + CF-Poll */ +#define FC_SUBTYPE_QOS_NULL 12 /* QoS Null */ +#define FC_SUBTYPE_QOS_CF_POLL 14 /* QoS CF-Poll */ +#define FC_SUBTYPE_QOS_CF_ACK_POLL 15 /* QoS CF-Ack + CF-Poll */ + +/* Data Subtype Groups */ +#define FC_SUBTYPE_ANY_QOS(s) (((s) & 8) != 0) +#define FC_SUBTYPE_ANY_NULL(s) (((s) & 4) != 0) +#define FC_SUBTYPE_ANY_CF_POLL(s) (((s) & 2) != 0) +#define FC_SUBTYPE_ANY_CF_ACK(s) (((s) & 1) != 0) +#define FC_SUBTYPE_ANY_PSPOLL(s) (((s) & 10) != 0) + +/* Type/Subtype Combos */ +#define FC_KIND_MASK (FC_TYPE_MASK | FC_SUBTYPE_MASK) /* FC kind mask */ + +#define FC_KIND(t, s) (((t) << FC_TYPE_SHIFT) | ((s) << FC_SUBTYPE_SHIFT)) /* FC kind */ + +#define FC_SUBTYPE(fc) (((fc) & FC_SUBTYPE_MASK) >> FC_SUBTYPE_SHIFT) /* Subtype from FC */ +#define FC_TYPE(fc) (((fc) & FC_TYPE_MASK) >> FC_TYPE_SHIFT) /* Type from FC */ + +#define FC_ASSOC_REQ FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_ASSOC_REQ) /* assoc. request */ +#define FC_ASSOC_RESP FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_ASSOC_RESP) /* assoc. response */ +#define FC_REASSOC_REQ FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_REASSOC_REQ) /* reassoc. request */ +#define FC_REASSOC_RESP FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_REASSOC_RESP) /* reassoc. response */ +#define FC_PROBE_REQ FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_PROBE_REQ) /* probe request */ +#define FC_PROBE_RESP FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_PROBE_RESP) /* probe response */ +#define FC_BEACON FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_BEACON) /* beacon */ +#define FC_DISASSOC FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_DISASSOC) /* disassoc */ +#define FC_AUTH FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_AUTH) /* authentication */ +#define FC_DEAUTH FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_DEAUTH) /* deauthentication */ +#define FC_ACTION FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_ACTION) /* action */ +#define FC_ACTION_NOACK FC_KIND(FC_TYPE_MNG, FC_SUBTYPE_ACTION_NOACK) /* action no-ack */ + +#define FC_CTL_WRAPPER FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_CTL_WRAPPER) /* Control Wrapper */ +#define FC_BLOCKACK_REQ FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_BLOCKACK_REQ) /* Block Ack Req */ +#define FC_BLOCKACK FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_BLOCKACK) /* Block Ack */ +#define FC_PS_POLL FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_PS_POLL) /* PS poll */ +#define FC_RTS FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_RTS) /* RTS */ +#define FC_CTS FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_CTS) /* CTS */ +#define FC_ACK FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_ACK) /* ACK */ +#define FC_CF_END FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_CF_END) /* CF-END */ +#define FC_CF_END_ACK FC_KIND(FC_TYPE_CTL, FC_SUBTYPE_CF_END_ACK) /* CF-END ACK */ + +#define FC_DATA FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_DATA) /* data */ +#define FC_NULL_DATA FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_NULL) /* null data */ +#define FC_DATA_CF_ACK FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_DATA_CF_ACK) /* data CF ACK */ +#define FC_QOS_DATA FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_QOS_DATA) /* QoS data */ +#define FC_QOS_NULL FC_KIND(FC_TYPE_DATA, FC_SUBTYPE_QOS_NULL) /* QoS null */ + +/* QoS Control Field */ + +/* 802.1D Priority */ +#define QOS_PRIO_SHIFT 0 /* QoS priority shift */ +#define QOS_PRIO_MASK 0x0007 /* QoS priority mask */ +#define QOS_PRIO(qos) (((qos) & QOS_PRIO_MASK) >> QOS_PRIO_SHIFT) /* QoS priority */ + +/* Traffic Identifier */ +#define QOS_TID_SHIFT 0 /* QoS TID shift */ +#define QOS_TID_MASK 0x000f /* QoS TID mask */ +#define QOS_TID(qos) (((qos) & QOS_TID_MASK) >> QOS_TID_SHIFT) /* QoS TID */ + +/* End of Service Period (U-APSD) */ +#define QOS_EOSP_SHIFT 4 /* QoS End of Service Period shift */ +#define QOS_EOSP_MASK 0x0010 /* QoS End of Service Period mask */ +#define QOS_EOSP(qos) (((qos) & QOS_EOSP_MASK) >> QOS_EOSP_SHIFT) /* Qos EOSP */ + +/* Ack Policy */ +#define QOS_ACK_NORMAL_ACK 0 /* Normal Ack */ +#define QOS_ACK_NO_ACK 1 /* No Ack (eg mcast) */ +#define QOS_ACK_NO_EXP_ACK 2 /* No Explicit Ack */ +#define QOS_ACK_BLOCK_ACK 3 /* Block Ack */ +#define QOS_ACK_SHIFT 5 /* QoS ACK shift */ +#define QOS_ACK_MASK 0x0060 /* QoS ACK mask */ +#define QOS_ACK(qos) (((qos) & QOS_ACK_MASK) >> QOS_ACK_SHIFT) /* QoS ACK */ + +/* A-MSDU flag */ +#define QOS_AMSDU_SHIFT 7 /* AMSDU shift */ +#define QOS_AMSDU_MASK 0x0080 /* AMSDU mask */ + +/* Management Frames */ + +/* Management Frame Constants */ + +/* Fixed fields */ +#define DOT11_MNG_AUTH_ALGO_LEN 2 /* d11 management auth. algo. length */ +#define DOT11_MNG_AUTH_SEQ_LEN 2 /* d11 management auth. seq. length */ +#define DOT11_MNG_BEACON_INT_LEN 2 /* d11 management beacon interval length */ +#define DOT11_MNG_CAP_LEN 2 /* d11 management cap. length */ +#define DOT11_MNG_AP_ADDR_LEN 6 /* d11 management AP address length */ +#define DOT11_MNG_LISTEN_INT_LEN 2 /* d11 management listen interval length */ +#define DOT11_MNG_REASON_LEN 2 /* d11 management reason length */ +#define DOT11_MNG_AID_LEN 2 /* d11 management AID length */ +#define DOT11_MNG_STATUS_LEN 2 /* d11 management status length */ +#define DOT11_MNG_TIMESTAMP_LEN 8 /* d11 management timestamp length */ + +/* DUR/ID field in assoc resp is 0xc000 | AID */ +#define DOT11_AID_MASK 0x3fff /* d11 AID mask */ + +/* Reason Codes */ +#define DOT11_RC_RESERVED 0 /* d11 RC reserved */ +#define DOT11_RC_UNSPECIFIED 1 /* Unspecified reason */ +#define DOT11_RC_AUTH_INVAL 2 /* Previous authentication no longer valid */ +#define DOT11_RC_DEAUTH_LEAVING 3 /* Deauthenticated because sending station + * is leaving (or has left) IBSS or ESS + */ +#define DOT11_RC_INACTIVITY 4 /* Disassociated due to inactivity */ +#define DOT11_RC_BUSY 5 /* Disassociated because AP is unable to handle + * all currently associated stations + */ +#define DOT11_RC_INVAL_CLASS_2 6 /* Class 2 frame received from + * nonauthenticated station + */ +#define DOT11_RC_INVAL_CLASS_3 7 /* Class 3 frame received from + * nonassociated station + */ +#define DOT11_RC_DISASSOC_LEAVING 8 /* Disassociated because sending station is + * leaving (or has left) BSS + */ +#define DOT11_RC_NOT_AUTH 9 /* Station requesting (re)association is not + * authenticated with responding station + */ +#define DOT11_RC_BAD_PC 10 /* Unacceptable power capability element */ +#define DOT11_RC_BAD_CHANNELS 11 /* Unacceptable supported channels element */ +/* 12 is unused */ +/* XXX 13-23 are WPA/802.11i reason codes defined in proto/wpa.h */ + +/* 32-39 are QSTA specific reasons added in 11e */ +#define DOT11_RC_UNSPECIFIED_QOS 32 /* unspecified QoS-related reason */ +#define DOT11_RC_INSUFFCIENT_BW 33 /* QAP lacks sufficient bandwidth */ +#define DOT11_RC_EXCESSIVE_FRAMES 34 /* excessive number of frames need ack */ +#define DOT11_RC_TX_OUTSIDE_TXOP 35 /* transmitting outside the limits of txop */ +#define DOT11_RC_LEAVING_QBSS 36 /* QSTA is leaving the QBSS (or restting) */ +#define DOT11_RC_BAD_MECHANISM 37 /* does not want to use the mechanism */ +#define DOT11_RC_SETUP_NEEDED 38 /* mechanism needs a setup */ +#define DOT11_RC_TIMEOUT 39 /* timeout */ + +#define DOT11_RC_MAX 23 /* Reason codes > 23 are reserved */ + +#define DOT11_RC_TDLS_PEER_UNREACH 25 +#define DOT11_RC_TDLS_DOWN_UNSPECIFIED 26 + +/* Status Codes */ +#define DOT11_SC_SUCCESS 0 /* Successful */ +#define DOT11_SC_FAILURE 1 /* Unspecified failure */ +#define DOT11_SC_TDLS_WAKEUP_SCH_ALT 2 /* TDLS wakeup schedule rejected but alternative */ + /* schedule provided */ +#define DOT11_SC_TDLS_WAKEUP_SCH_REJ 3 /* TDLS wakeup schedule rejected */ +#define DOT11_SC_TDLS_SEC_DISABLED 5 /* TDLS Security disabled */ +#define DOT11_SC_LIFETIME_REJ 6 /* Unacceptable lifetime */ +#define DOT11_SC_NOT_SAME_BSS 7 /* Not in same BSS */ +#define DOT11_SC_CAP_MISMATCH 10 /* Cannot support all requested + * capabilities in the Capability + * Information field + */ +#define DOT11_SC_REASSOC_FAIL 11 /* Reassociation denied due to inability + * to confirm that association exists + */ +#define DOT11_SC_ASSOC_FAIL 12 /* Association denied due to reason + * outside the scope of this standard + */ +#define DOT11_SC_AUTH_MISMATCH 13 /* Responding station does not support + * the specified authentication + * algorithm + */ +#define DOT11_SC_AUTH_SEQ 14 /* Received an Authentication frame + * with authentication transaction + * sequence number out of expected + * sequence + */ +#define DOT11_SC_AUTH_CHALLENGE_FAIL 15 /* Authentication rejected because of + * challenge failure + */ +#define DOT11_SC_AUTH_TIMEOUT 16 /* Authentication rejected due to timeout + * waiting for next frame in sequence + */ +#define DOT11_SC_ASSOC_BUSY_FAIL 17 /* Association denied because AP is + * unable to handle additional + * associated stations + */ +#define DOT11_SC_ASSOC_RATE_MISMATCH 18 /* Association denied due to requesting + * station not supporting all of the + * data rates in the BSSBasicRateSet + * parameter + */ +#define DOT11_SC_ASSOC_SHORT_REQUIRED 19 /* Association denied due to requesting + * station not supporting the Short + * Preamble option + */ +#define DOT11_SC_ASSOC_PBCC_REQUIRED 20 /* Association denied due to requesting + * station not supporting the PBCC + * Modulation option + */ +#define DOT11_SC_ASSOC_AGILITY_REQUIRED 21 /* Association denied due to requesting + * station not supporting the Channel + * Agility option + */ +#define DOT11_SC_ASSOC_SPECTRUM_REQUIRED 22 /* Association denied because Spectrum + * Management capability is required. + */ +#define DOT11_SC_ASSOC_BAD_POWER_CAP 23 /* Association denied because the info + * in the Power Cap element is + * unacceptable. + */ +#define DOT11_SC_ASSOC_BAD_SUP_CHANNELS 24 /* Association denied because the info + * in the Supported Channel element is + * unacceptable + */ +#define DOT11_SC_ASSOC_SHORTSLOT_REQUIRED 25 /* Association denied due to requesting + * station not supporting the Short Slot + * Time option + */ +#define DOT11_SC_ASSOC_DSSSOFDM_REQUIRED 26 /* Association denied because requesting station + * does not support the DSSS-OFDM option + */ +#define DOT11_SC_ASSOC_HT_REQUIRED 27 /* Association denied because the requesting + * station does not support HT features + */ +#define DOT11_SC_ASSOC_R0KH_UNREACHABLE 28 /* Association denied due to AP + * being unable to reach the R0 Key Holder + */ +#define DOT11_SC_ASSOC_TRY_LATER 30 /* Association denied temporarily, try again later + */ +#define DOT11_SC_ASSOC_MFP_VIOLATION 31 /* Association denied due to Robust Management + * frame policy violation + */ + +#define DOT11_SC_DECLINED 37 /* request declined */ +#define DOT11_SC_INVALID_PARAMS 38 /* One or more params have invalid values */ +#define DOT11_SC_INVALID_PAIRWISE_CIPHER 42 /* invalid pairwise cipher */ +#define DOT11_SC_INVALID_AKMP 43 /* Association denied due to invalid AKMP */ +#define DOT11_SC_INVALID_RSNIE_CAP 45 /* invalid RSN IE capabilities */ +#define DOT11_SC_DLS_NOT_ALLOWED 48 /* DLS is not allowed in the BSS by policy */ +#define DOT11_SC_INVALID_PMKID 53 /* Association denied due to invalid PMKID */ +#define DOT11_SC_INVALID_MDID 54 /* Association denied due to invalid MDID */ +#define DOT11_SC_INVALID_FTIE 55 /* Association denied due to invalid FTIE */ + +#define DOT11_SC_ADV_PROTO_NOT_SUPPORTED 59 /* ad proto not supported */ +#define DOT11_SC_NO_OUTSTAND_REQ 60 /* no outstanding req */ +#define DOT11_SC_RSP_NOT_RX_FROM_SERVER 61 /* no response from server */ +#define DOT11_SC_TIMEOUT 62 /* timeout */ +#define DOT11_SC_QUERY_RSP_TOO_LARGE 63 /* query rsp too large */ +#define DOT11_SC_SERVER_UNREACHABLE 65 /* server unreachable */ + +#define DOT11_SC_UNEXP_MSG 70 /* Unexpected message */ +#define DOT11_SC_INVALID_SNONCE 71 /* Invalid SNonce */ +#define DOT11_SC_INVALID_RSNIE 72 /* Invalid contents of RSNIE */ +#define DOT11_SC_ASSOC_VHT_REQUIRED 104 /* Association denied because the requesting + * station does not support VHT features. + */ + +#define DOT11_SC_TRANSMIT_FAILURE 79 /* transmission failure */ + +/* Info Elts, length of INFORMATION portion of Info Elts */ +#define DOT11_MNG_DS_PARAM_LEN 1 /* d11 management DS parameter length */ +#define DOT11_MNG_IBSS_PARAM_LEN 2 /* d11 management IBSS parameter length */ + +/* TIM Info element has 3 bytes fixed info in INFORMATION field, + * followed by 1 to 251 bytes of Partial Virtual Bitmap + */ +#define DOT11_MNG_TIM_FIXED_LEN 3 /* d11 management TIM fixed length */ +#define DOT11_MNG_TIM_DTIM_COUNT 0 /* d11 management DTIM count */ +#define DOT11_MNG_TIM_DTIM_PERIOD 1 /* d11 management DTIM period */ +#define DOT11_MNG_TIM_BITMAP_CTL 2 /* d11 management TIM BITMAP control */ +#define DOT11_MNG_TIM_PVB 3 /* d11 management TIM PVB */ + +/* TLV defines */ +#define TLV_TAG_OFF 0 /* tag offset */ +#define TLV_LEN_OFF 1 /* length offset */ +#define TLV_HDR_LEN 2 /* header length */ +#define TLV_BODY_OFF 2 /* body offset */ +#define TLV_BODY_LEN_MAX 255 /* max body length */ + +/* Management Frame Information Element IDs */ +#define DOT11_MNG_SSID_ID 0 /* d11 management SSID id */ +#define DOT11_MNG_RATES_ID 1 /* d11 management rates id */ +#define DOT11_MNG_FH_PARMS_ID 2 /* d11 management FH parameter id */ +#define DOT11_MNG_DS_PARMS_ID 3 /* d11 management DS parameter id */ +#define DOT11_MNG_CF_PARMS_ID 4 /* d11 management CF parameter id */ +#define DOT11_MNG_TIM_ID 5 /* d11 management TIM id */ +#define DOT11_MNG_IBSS_PARMS_ID 6 /* d11 management IBSS parameter id */ +#define DOT11_MNG_COUNTRY_ID 7 /* d11 management country id */ +#define DOT11_MNG_HOPPING_PARMS_ID 8 /* d11 management hopping parameter id */ +#define DOT11_MNG_HOPPING_TABLE_ID 9 /* d11 management hopping table id */ +#define DOT11_MNG_REQUEST_ID 10 /* d11 management request id */ +#define DOT11_MNG_QBSS_LOAD_ID 11 /* d11 management QBSS Load id */ +#define DOT11_MNG_EDCA_PARAM_ID 12 /* 11E EDCA Parameter id */ +#define DOT11_MNG_TSPEC_ID 13 /* d11 management TSPEC id */ +#define DOT11_MNG_TCLAS_ID 14 /* d11 management TCLAS id */ +#define DOT11_MNG_CHALLENGE_ID 16 /* d11 management chanllenge id */ +#define DOT11_MNG_PWR_CONSTRAINT_ID 32 /* 11H PowerConstraint */ +#define DOT11_MNG_PWR_CAP_ID 33 /* 11H PowerCapability */ +#define DOT11_MNG_TPC_REQUEST_ID 34 /* 11H TPC Request */ +#define DOT11_MNG_TPC_REPORT_ID 35 /* 11H TPC Report */ +#define DOT11_MNG_SUPP_CHANNELS_ID 36 /* 11H Supported Channels */ +#define DOT11_MNG_CHANNEL_SWITCH_ID 37 /* 11H ChannelSwitch Announcement */ +#define DOT11_MNG_MEASURE_REQUEST_ID 38 /* 11H MeasurementRequest */ +#define DOT11_MNG_MEASURE_REPORT_ID 39 /* 11H MeasurementReport */ +#define DOT11_MNG_QUIET_ID 40 /* 11H Quiet */ +#define DOT11_MNG_IBSS_DFS_ID 41 /* 11H IBSS_DFS */ +#define DOT11_MNG_ERP_ID 42 /* d11 management ERP id */ +#define DOT11_MNG_TS_DELAY_ID 43 /* d11 management TS Delay id */ +#define DOT11_MNG_TCLAS_PROC_ID 44 /* d11 management TCLAS processing id */ +#define DOT11_MNG_HT_CAP 45 /* d11 mgmt HT cap id */ +#define DOT11_MNG_QOS_CAP_ID 46 /* 11E QoS Capability id */ +#define DOT11_MNG_NONERP_ID 47 /* d11 management NON-ERP id */ +#define DOT11_MNG_RSN_ID 48 /* d11 management RSN id */ +#define DOT11_MNG_EXT_RATES_ID 50 /* d11 management ext. rates id */ +#define DOT11_MNG_AP_CHREP_ID 51 /* 11k AP Channel report id */ +#define DOT11_MNG_NEIGHBOR_REP_ID 52 /* 11k & 11v Neighbor report id */ +#define DOT11_MNG_RCPI_ID 53 /* 11k RCPI */ +#define DOT11_MNG_MDIE_ID 54 /* 11r Mobility domain id */ +#define DOT11_MNG_FTIE_ID 55 /* 11r Fast Bss Transition id */ +#define DOT11_MNG_FT_TI_ID 56 /* 11r Timeout Interval id */ +#define DOT11_MNG_RDE_ID 57 /* 11r RIC Data Element id */ +#define DOT11_MNG_REGCLASS_ID 59 /* d11 management regulatory class id */ +#define DOT11_MNG_EXT_CSA_ID 60 /* d11 Extended CSA */ +#define DOT11_MNG_HT_ADD 61 /* d11 mgmt additional HT info */ +#define DOT11_MNG_EXT_CHANNEL_OFFSET 62 /* d11 mgmt ext channel offset */ +#define DOT11_MNG_BSS_AVR_ACCESS_DELAY_ID 63 /* 11k bss average access delay */ +#define DOT11_MNG_ANTENNA_ID 64 /* 11k antenna id */ +#define DOT11_MNG_RSNI_ID 65 /* 11k RSNI id */ +#define DOT11_MNG_MEASUREMENT_PILOT_TX_ID 66 /* 11k measurement pilot tx info id */ +#define DOT11_MNG_BSS_AVAL_ADMISSION_CAP_ID 67 /* 11k bss aval admission cap id */ +#define DOT11_MNG_BSS_AC_ACCESS_DELAY_ID 68 /* 11k bss AC access delay id */ +#define DOT11_MNG_WAPI_ID 68 /* d11 management WAPI id */ +#define DOT11_MNG_TIME_ADVERTISE_ID 69 /* 11p time advertisement */ +#define DOT11_MNG_RRM_CAP_ID 70 /* 11k radio measurement capability */ +#define DOT11_MNG_MULTIPLE_BSSID_ID 71 /* 11k multiple BSSID id */ +#define DOT11_MNG_HT_BSS_COEXINFO_ID 72 /* d11 mgmt OBSS Coexistence INFO */ +#define DOT11_MNG_HT_BSS_CHANNEL_REPORT_ID 73 /* d11 mgmt OBSS Intolerant Channel list */ +#define DOT11_MNG_HT_OBSS_ID 74 /* d11 mgmt OBSS HT info */ +#define DOT11_MNG_MMIE_ID 76 /* d11 mgmt MIC IE */ +#define DOT11_MNG_FMS_DESCR_ID 86 /* 11v FMS descriptor */ +#define DOT11_MNG_FMS_REQ_ID 87 /* 11v FMS request id */ +#define DOT11_MNG_FMS_RESP_ID 88 /* 11v FMS response id */ +#define DOT11_MNG_BSS_MAX_IDLE_PERIOD_ID 90 /* 11v bss max idle id */ +#define DOT11_MNG_TFS_REQUEST_ID 91 /* 11v tfs request id */ +#define DOT11_MNG_TFS_RESPONSE_ID 92 /* 11v tfs response id */ +#define DOT11_MNG_WNM_SLEEP_MODE_ID 93 /* 11v wnm-sleep mode id */ +#define DOT11_MNG_TIMBC_REQ_ID 94 /* 11v TIM broadcast request id */ +#define DOT11_MNG_TIMBC_RESP_ID 95 /* 11v TIM broadcast response id */ +#define DOT11_MNG_CHANNEL_USAGE 97 /* 11v channel usage */ +#define DOT11_MNG_TIME_ZONE_ID 98 /* 11v time zone */ +#define DOT11_MNG_DMS_REQUEST_ID 99 /* 11v dms request id */ +#define DOT11_MNG_DMS_RESPONSE_ID 100 /* 11v dms response id */ +#define DOT11_MNG_LINK_IDENTIFIER_ID 101 /* 11z TDLS Link Identifier IE */ +#define DOT11_MNG_WAKEUP_SCHEDULE_ID 102 /* 11z TDLS Wakeup Schedule IE */ +#define DOT11_MNG_CHANNEL_SWITCH_TIMING_ID 104 /* 11z TDLS Channel Switch Timing IE */ +#define DOT11_MNG_PTI_CONTROL_ID 105 /* 11z TDLS PTI Control IE */ +#define DOT11_MNG_PU_BUFFER_STATUS_ID 106 /* 11z TDLS PU Buffer Status IE */ +#define DOT11_MNG_INTERWORKING_ID 107 /* 11u interworking */ +#define DOT11_MNG_ADVERTISEMENT_ID 108 /* 11u advertisement protocol */ +#define DOT11_MNG_EXP_BW_REQ_ID 109 /* 11u expedited bandwith request */ +#define DOT11_MNG_QOS_MAP_ID 110 /* 11u QoS map set */ +#define DOT11_MNG_ROAM_CONSORT_ID 111 /* 11u roaming consortium */ +#define DOT11_MNG_EMERGCY_ALERT_ID 112 /* 11u emergency alert identifier */ +#define DOT11_MNG_EXT_CAP_ID 127 /* d11 mgmt ext capability */ +#define DOT11_MNG_VHT_CAP_ID 191 /* d11 mgmt VHT cap id */ +#define DOT11_MNG_VHT_OPERATION_ID 192 /* d11 mgmt VHT op id */ +#define DOT11_MNG_WIDE_BW_CHANNEL_SWITCH_ID 194 /* Wide BW Channel Switch IE */ +#define DOT11_MNG_VHT_TRANSMIT_POWER_ENVELOPE_ID 195 /* VHT transmit Power Envelope IE */ +#define DOT11_MNG_CHANNEL_SWITCH_WRAPPER_ID 196 /* Channel Switch Wrapper IE */ +#define DOT11_MNG_AID_ID 197 /* Association ID IE */ +#define DOT11_MNG_OPER_MODE_NOTIF_ID 199 /* d11 mgmt VHT oper mode notif */ + + +#define DOT11_MNG_WPA_ID 221 /* d11 management WPA id */ +#define DOT11_MNG_PROPR_ID 221 /* d11 management proprietary id */ +/* should start using this one instead of above two */ +#define DOT11_MNG_VS_ID 221 /* d11 management Vendor Specific IE */ + +/* Rate Defines */ + +/* Valid rates for the Supported Rates and Extended Supported Rates IEs. + * Encoding is the rate in 500kbps units, rouding up for fractional values. + * 802.11-2012, section 6.5.5.2, DATA_RATE parameter enumerates all the values. + * The rate values cover DSSS, HR/DSSS, ERP, and OFDM phy rates. + * The defines below do not cover the rates specific to 10MHz, {3, 4.5, 27}, + * and 5MHz, {1.5, 2.25, 3, 4.5, 13.5}, which are not supported by Broadcom devices. + */ + +#define DOT11_RATE_1M 2 /* 1 Mbps in 500kbps units */ +#define DOT11_RATE_2M 4 /* 2 Mbps in 500kbps units */ +#define DOT11_RATE_5M5 11 /* 5.5 Mbps in 500kbps units */ +#define DOT11_RATE_11M 22 /* 11 Mbps in 500kbps units */ +#define DOT11_RATE_6M 12 /* 6 Mbps in 500kbps units */ +#define DOT11_RATE_9M 18 /* 9 Mbps in 500kbps units */ +#define DOT11_RATE_12M 24 /* 12 Mbps in 500kbps units */ +#define DOT11_RATE_18M 36 /* 18 Mbps in 500kbps units */ +#define DOT11_RATE_24M 48 /* 24 Mbps in 500kbps units */ +#define DOT11_RATE_36M 72 /* 36 Mbps in 500kbps units */ +#define DOT11_RATE_48M 96 /* 48 Mbps in 500kbps units */ +#define DOT11_RATE_54M 108 /* 54 Mbps in 500kbps units */ +#define DOT11_RATE_MAX 108 /* highest rate (54 Mbps) in 500kbps units */ + +/* Supported Rates and Extended Supported Rates IEs + * The supported rates octets are defined a the MSB indicatin a Basic Rate + * and bits 0-6 as the rate value + */ +#define DOT11_RATE_BASIC 0x80 /* flag for a Basic Rate */ +#define DOT11_RATE_MASK 0x7F /* mask for numeric part of rate */ + +/* BSS Membership Selector parameters + * 802.11-2012 and 802.11ac_D4.0 sec 8.4.2.3 + * These selector values are advertised in Supported Rates and Extended Supported Rates IEs + * in the supported rates list with the Basic rate bit set. + * Constants below include the basic bit. + */ +#define DOT11_BSS_MEMBERSHIP_HT 0xFF /* Basic 0x80 + 127, HT Required to join */ +#define DOT11_BSS_MEMBERSHIP_VHT 0xFE /* Basic 0x80 + 126, VHT Required to join */ + +/* ERP info element bit values */ +#define DOT11_MNG_ERP_LEN 1 /* ERP is currently 1 byte long */ +#define DOT11_MNG_NONERP_PRESENT 0x01 /* NonERP (802.11b) STAs are present + *in the BSS + */ +#define DOT11_MNG_USE_PROTECTION 0x02 /* Use protection mechanisms for + *ERP-OFDM frames + */ +#define DOT11_MNG_BARKER_PREAMBLE 0x04 /* Short Preambles: 0 == allowed, + * 1 == not allowed + */ +/* TS Delay element offset & size */ +#define DOT11_MGN_TS_DELAY_LEN 4 /* length of TS DELAY IE */ +#define TS_DELAY_FIELD_SIZE 4 /* TS DELAY field size */ + +/* Capability Information Field */ +#define DOT11_CAP_ESS 0x0001 /* d11 cap. ESS */ +#define DOT11_CAP_IBSS 0x0002 /* d11 cap. IBSS */ +#define DOT11_CAP_POLLABLE 0x0004 /* d11 cap. pollable */ +#define DOT11_CAP_POLL_RQ 0x0008 /* d11 cap. poll request */ +#define DOT11_CAP_PRIVACY 0x0010 /* d11 cap. privacy */ +#define DOT11_CAP_SHORT 0x0020 /* d11 cap. short */ +#define DOT11_CAP_PBCC 0x0040 /* d11 cap. PBCC */ +#define DOT11_CAP_AGILITY 0x0080 /* d11 cap. agility */ +#define DOT11_CAP_SPECTRUM 0x0100 /* d11 cap. spectrum */ +#define DOT11_CAP_QOS 0x0200 /* d11 cap. qos */ +#define DOT11_CAP_SHORTSLOT 0x0400 /* d11 cap. shortslot */ +#define DOT11_CAP_APSD 0x0800 /* d11 cap. apsd */ +#define DOT11_CAP_RRM 0x1000 /* d11 cap. 11k radio measurement */ +#define DOT11_CAP_CCK_OFDM 0x2000 /* d11 cap. CCK/OFDM */ +#define DOT11_CAP_DELAY_BA 0x4000 /* d11 cap. delayed block ack */ +#define DOT11_CAP_IMMEDIATE_BA 0x8000 /* d11 cap. immediate block ack */ + +/* Extended capabilities IE bitfields */ +/* 20/40 BSS Coexistence Management support bit position */ +#define DOT11_EXT_CAP_OBSS_COEX_MGMT 0 +/* Extended Channel Switching support bit position */ +#define DOT11_EXT_CAP_EXT_CHAN_SWITCHING 2 +/* scheduled PSMP support bit position */ +#define DOT11_EXT_CAP_SPSMP 6 +/* Flexible Multicast Service */ +#define DOT11_EXT_CAP_FMS 11 +/* proxy ARP service support bit position */ +#define DOT11_EXT_CAP_PROXY_ARP 12 +/* Traffic Filter Service */ +#define DOT11_EXT_CAP_TFS 16 +/* WNM-Sleep Mode */ +#define DOT11_EXT_CAP_WNM_SLEEP 17 +/* TIM Broadcast service */ +#define DOT11_EXT_CAP_TIMBC 18 +/* BSS Transition Management support bit position */ +#define DOT11_EXT_CAP_BSSTRANS_MGMT 19 +/* Direct Multicast Service */ +#define DOT11_EXT_CAP_DMS 26 +/* Interworking support bit position */ +#define DOT11_EXT_CAP_IW 31 +/* service Interval granularity bit position and mask */ +#define DOT11_EXT_CAP_SI 41 +#define DOT11_EXT_CAP_SI_MASK 0x0E +/* WNM notification */ +#define DOT11_EXT_CAP_WNM_NOTIF 46 +/* Operating mode notification - VHT (11ac D3.0 - 8.4.2.29) */ +#define DOT11_EXT_CAP_OPER_MODE_NOTIF 62 + +/* VHT Operating mode bit fields - (11ac D3.0 - 8.4.1.50) */ +#define DOT11_OPER_MODE_CHANNEL_WIDTH_SHIFT 0 +#define DOT11_OPER_MODE_CHANNEL_WIDTH_MASK 0x3 +#define DOT11_OPER_MODE_RXNSS_SHIFT 4 +#define DOT11_OPER_MODE_RXNSS_MASK 0x70 +#define DOT11_OPER_MODE_RXNSS_TYPE_SHIFT 7 +#define DOT11_OPER_MODE_RXNSS_TYPE_MASK 0x80 + +#define DOT11_OPER_MODE(type, nss, chanw) (\ + ((type) << DOT11_OPER_MODE_RXNSS_TYPE_SHIFT &\ + DOT11_OPER_MODE_RXNSS_TYPE_MASK) |\ + (((nss) - 1) << DOT11_OPER_MODE_RXNSS_SHIFT & DOT11_OPER_MODE_RXNSS_MASK) |\ + ((chanw) << DOT11_OPER_MODE_CHANNEL_WIDTH_SHIFT &\ + DOT11_OPER_MODE_CHANNEL_WIDTH_MASK)) + +#define DOT11_OPER_MODE_CHANNEL_WIDTH(mode) \ + (((mode) & DOT11_OPER_MODE_CHANNEL_WIDTH_MASK)\ + >> DOT11_OPER_MODE_CHANNEL_WIDTH_SHIFT) +#define DOT11_OPER_MODE_RXNSS(mode) \ + ((((mode) & DOT11_OPER_MODE_RXNSS_MASK) \ + >> DOT11_OPER_MODE_RXNSS_SHIFT) + 1) +#define DOT11_OPER_MODE_RXNSS_TYPE(mode) \ + (((mode) & DOT11_OPER_MODE_RXNSS_TYPE_MASK)\ + >> DOT11_OPER_MODE_RXNSS_TYPE_SHIFT) + +#define DOT11_OPER_MODE_20MHZ 0 +#define DOT11_OPER_MODE_40MHZ 1 +#define DOT11_OPER_MODE_80MHZ 2 +#define DOT11_OPER_MODE_160MHZ 3 +#define DOT11_OPER_MODE_8080MHZ 3 + +#define DOT11_OPER_MODE_CHANNEL_WIDTH_20MHZ(mode) (\ + ((mode) & DOT11_OPER_MODE_CHANNEL_WIDTH_MASK) == DOT11_OPER_MODE_20MHZ) +#define DOT11_OPER_MODE_CHANNEL_WIDTH_40MHZ(mode) (\ + ((mode) & DOT11_OPER_MODE_CHANNEL_WIDTH_MASK) == DOT11_OPER_MODE_40MHZ) +#define DOT11_OPER_MODE_CHANNEL_WIDTH_80MHZ(mode) (\ + ((mode) & DOT11_OPER_MODE_CHANNEL_WIDTH_MASK) == DOT11_OPER_MODE_80MHZ) +#define DOT11_OPER_MODE_CHANNEL_WIDTH_160MHZ(mode) (\ + ((mode) & DOT11_OPER_MODE_CHANNEL_WIDTH_MASK) == DOT11_OPER_MODE_160MHZ) +#define DOT11_OPER_MODE_CHANNEL_WIDTH_8080MHZ(mode) (\ + ((mode) & DOT11_OPER_MODE_CHANNEL_WIDTH_MASK) == DOT11_OPER_MODE_8080MHZ) + +/* Operating mode information element 802.11ac D3.0 - 8.4.2.168 */ +BWL_PRE_PACKED_STRUCT struct dot11_oper_mode_notif_ie { + uint8 mode; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_oper_mode_notif_ie dot11_oper_mode_notif_ie_t; + +#define DOT11_OPER_MODE_NOTIF_IE_LEN 1 + +/* Extended Capability Information Field */ +#define DOT11_OBSS_COEX_MNG_SUPPORT 0x01 /* 20/40 BSS Coexistence Management support */ + +/* + * Action Frame Constants + */ +#define DOT11_ACTION_HDR_LEN 2 /* action frame category + action field */ +#define DOT11_ACTION_CAT_OFF 0 /* category offset */ +#define DOT11_ACTION_ACT_OFF 1 /* action offset */ + +/* Action Category field (sec 8.4.1.11) */ +#define DOT11_ACTION_CAT_ERR_MASK 0x80 /* category error mask */ +#define DOT11_ACTION_CAT_MASK 0x7F /* category mask */ +#define DOT11_ACTION_CAT_SPECT_MNG 0 /* category spectrum management */ +#define DOT11_ACTION_CAT_QOS 1 /* category QoS */ +#define DOT11_ACTION_CAT_DLS 2 /* category DLS */ +#define DOT11_ACTION_CAT_BLOCKACK 3 /* category block ack */ +#define DOT11_ACTION_CAT_PUBLIC 4 /* category public */ +#define DOT11_ACTION_CAT_RRM 5 /* category radio measurements */ +#define DOT11_ACTION_CAT_FBT 6 /* category fast bss transition */ +#define DOT11_ACTION_CAT_HT 7 /* category for HT */ +#define DOT11_ACTION_CAT_SA_QUERY 8 /* security association query */ +#define DOT11_ACTION_CAT_PDPA 9 /* protected dual of public action */ +#define DOT11_ACTION_CAT_WNM 10 /* category for WNM */ +#define DOT11_ACTION_CAT_UWNM 11 /* category for Unprotected WNM */ +#define DOT11_ACTION_NOTIFICATION 17 +#define DOT11_ACTION_CAT_VHT 21 /* VHT action */ +#define DOT11_ACTION_CAT_VSP 126 /* protected vendor specific */ +#define DOT11_ACTION_CAT_VS 127 /* category Vendor Specific */ + +/* Spectrum Management Action IDs (sec 7.4.1) */ +#define DOT11_SM_ACTION_M_REQ 0 /* d11 action measurement request */ +#define DOT11_SM_ACTION_M_REP 1 /* d11 action measurement response */ +#define DOT11_SM_ACTION_TPC_REQ 2 /* d11 action TPC request */ +#define DOT11_SM_ACTION_TPC_REP 3 /* d11 action TPC response */ +#define DOT11_SM_ACTION_CHANNEL_SWITCH 4 /* d11 action channel switch */ +#define DOT11_SM_ACTION_EXT_CSA 5 /* d11 extened CSA for 11n */ + +/* HT action ids */ +#define DOT11_ACTION_ID_HT_CH_WIDTH 0 /* notify channel width action id */ +#define DOT11_ACTION_ID_HT_MIMO_PS 1 /* mimo ps action id */ + +/* Public action ids */ +#define DOT11_PUB_ACTION_BSS_COEX_MNG 0 /* 20/40 Coexistence Management action id */ +#define DOT11_PUB_ACTION_CHANNEL_SWITCH 4 /* d11 action channel switch */ +#define DOT11_PUB_ACTION_GAS_CB_REQ 12 /* GAS Comeback Request */ + +/* Block Ack action types */ +#define DOT11_BA_ACTION_ADDBA_REQ 0 /* ADDBA Req action frame type */ +#define DOT11_BA_ACTION_ADDBA_RESP 1 /* ADDBA Resp action frame type */ +#define DOT11_BA_ACTION_DELBA 2 /* DELBA action frame type */ + +/* ADDBA action parameters */ +#define DOT11_ADDBA_PARAM_AMSDU_SUP 0x0001 /* AMSDU supported under BA */ +#define DOT11_ADDBA_PARAM_POLICY_MASK 0x0002 /* policy mask(ack vs delayed) */ +#define DOT11_ADDBA_PARAM_POLICY_SHIFT 1 /* policy shift */ +#define DOT11_ADDBA_PARAM_TID_MASK 0x003c /* tid mask */ +#define DOT11_ADDBA_PARAM_TID_SHIFT 2 /* tid shift */ +#define DOT11_ADDBA_PARAM_BSIZE_MASK 0xffc0 /* buffer size mask */ +#define DOT11_ADDBA_PARAM_BSIZE_SHIFT 6 /* buffer size shift */ + +#define DOT11_ADDBA_POLICY_DELAYED 0 /* delayed BA policy */ +#define DOT11_ADDBA_POLICY_IMMEDIATE 1 /* immediate BA policy */ + +/* Fast Transition action types */ +#define DOT11_FT_ACTION_FT_RESERVED 0 +#define DOT11_FT_ACTION_FT_REQ 1 /* FBT request - for over-the-DS FBT */ +#define DOT11_FT_ACTION_FT_RES 2 /* FBT response - for over-the-DS FBT */ +#define DOT11_FT_ACTION_FT_CON 3 /* FBT confirm - for OTDS with RRP */ +#define DOT11_FT_ACTION_FT_ACK 4 /* FBT ack */ + +/* DLS action types */ +#define DOT11_DLS_ACTION_REQ 0 /* DLS Request */ +#define DOT11_DLS_ACTION_RESP 1 /* DLS Response */ +#define DOT11_DLS_ACTION_TD 2 /* DLS Teardown */ + +/* Wireless Network Management (WNM) action types */ +#define DOT11_WNM_ACTION_EVENT_REQ 0 +#define DOT11_WNM_ACTION_EVENT_REP 1 +#define DOT11_WNM_ACTION_DIAG_REQ 2 +#define DOT11_WNM_ACTION_DIAG_REP 3 +#define DOT11_WNM_ACTION_LOC_CFG_REQ 4 +#define DOT11_WNM_ACTION_LOC_RFG_RESP 5 +#define DOT11_WNM_ACTION_BSSTRANS_QUERY 6 +#define DOT11_WNM_ACTION_BSSTRANS_REQ 7 +#define DOT11_WNM_ACTION_BSSTRANS_RESP 8 +#define DOT11_WNM_ACTION_FMS_REQ 9 +#define DOT11_WNM_ACTION_FMS_RESP 10 +#define DOT11_WNM_ACTION_COL_INTRFRNCE_REQ 11 +#define DOT11_WNM_ACTION_COL_INTRFRNCE_REP 12 +#define DOT11_WNM_ACTION_TFS_REQ 13 +#define DOT11_WNM_ACTION_TFS_RESP 14 +#define DOT11_WNM_ACTION_TFS_NOTIFY_REQ 15 +#define DOT11_WNM_ACTION_WNM_SLEEP_REQ 16 +#define DOT11_WNM_ACTION_WNM_SLEEP_RESP 17 +#define DOT11_WNM_ACTION_TIMBC_REQ 18 +#define DOT11_WNM_ACTION_TIMBC_RESP 19 +#define DOT11_WNM_ACTION_QOS_TRFC_CAP_UPD 20 +#define DOT11_WNM_ACTION_CHAN_USAGE_REQ 21 +#define DOT11_WNM_ACTION_CHAN_USAGE_RESP 22 +#define DOT11_WNM_ACTION_DMS_REQ 23 +#define DOT11_WNM_ACTION_DMS_RESP 24 +#define DOT11_WNM_ACTION_TMNG_MEASUR_REQ 25 +#define DOT11_WNM_ACTION_NOTFCTN_REQ 26 +#define DOT11_WNM_ACTION_NOTFCTN_RESP 27 +#define DOT11_WNM_ACTION_TFS_NOTIFY_RESP 28 + +/* Unprotected Wireless Network Management (WNM) action types */ +#define DOT11_UWNM_ACTION_TIM 0 +#define DOT11_UWNM_ACTION_TIMING_MEASUREMENT 1 + +#define DOT11_MNG_COUNTRY_ID_LEN 3 + +/* VHT category action types - 802.11ac D3.0 - 8.5.23.1 */ +#define DOT11_VHT_ACTION_CBF 0 /* Compressed Beamforming */ +#define DOT11_VHT_ACTION_GID_MGMT 1 /* Group ID Management */ +#define DOT11_VHT_ACTION_OPER_MODE_NOTIF 2 /* Operating mode notif'n */ + +/* DLS Request frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_dls_req { + uint8 category; /* category of action frame (2) */ + uint8 action; /* DLS action: req (0) */ + struct ether_addr da; /* destination address */ + struct ether_addr sa; /* source address */ + uint16 cap; /* capability */ + uint16 timeout; /* timeout value */ + uint8 data[1]; /* IE:support rate, extend support rate, HT cap */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_dls_req dot11_dls_req_t; +#define DOT11_DLS_REQ_LEN 18 /* Fixed length */ + +/* DLS response frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_dls_resp { + uint8 category; /* category of action frame (2) */ + uint8 action; /* DLS action: req (0) */ + uint16 status; /* status code field */ + struct ether_addr da; /* destination address */ + struct ether_addr sa; /* source address */ + uint8 data[1]; /* optional: capability, rate ... */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_dls_resp dot11_dls_resp_t; +#define DOT11_DLS_RESP_LEN 16 /* Fixed length */ + + +/* ************* 802.11v related definitions. ************* */ + +/* BSS Management Transition Query frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_bsstrans_query { + uint8 category; /* category of action frame (10) */ + uint8 action; /* WNM action: trans_query (6) */ + uint8 token; /* dialog token */ + uint8 reason; /* transition query reason */ + uint8 data[1]; /* Elements */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_bsstrans_query dot11_bsstrans_query_t; +#define DOT11_BSSTRANS_QUERY_LEN 4 /* Fixed length */ + +/* BSS Management Transition Request frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_bsstrans_req { + uint8 category; /* category of action frame (10) */ + uint8 action; /* WNM action: trans_req (7) */ + uint8 token; /* dialog token */ + uint8 reqmode; /* transition request mode */ + uint16 disassoc_tmr; /* disassociation timer */ + uint8 validity_intrvl; /* validity interval */ + uint8 data[1]; /* optional: BSS term duration, ... */ + /* ...session info URL, candidate list */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_bsstrans_req dot11_bsstrans_req_t; +#define DOT11_BSSTRANS_REQ_LEN 7 /* Fixed length */ + +/* BSS Mgmt Transition Request Mode Field - 802.11v */ +#define DOT11_BSSTRANS_REQMODE_PREF_LIST_INCL 0x01 +#define DOT11_BSSTRANS_REQMODE_ABRIDGED 0x02 +#define DOT11_BSSTRANS_REQMODE_DISASSOC_IMMINENT 0x04 +#define DOT11_BSSTRANS_REQMODE_BSS_TERM_INCL 0x08 +#define DOT11_BSSTRANS_REQMODE_ESS_DISASSOC_IMNT 0x10 + +/* BSS Management transition response frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_bsstrans_resp { + uint8 category; /* category of action frame (10) */ + uint8 action; /* WNM action: trans_resp (8) */ + uint8 token; /* dialog token */ + uint8 status; /* transition status */ + uint8 term_delay; /* validity interval */ + uint8 data[1]; /* optional: BSSID target, candidate list */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_bsstrans_resp dot11_bsstrans_resp_t; +#define DOT11_BSSTRANS_RESP_LEN 5 /* Fixed length */ + +/* BSS Mgmt Transition Response Status Field */ +#define DOT11_BSSTRANS_RESP_STATUS_ACCEPT 0 +#define DOT11_BSSTRANS_RESP_STATUS_REJECT 1 +#define DOT11_BSSTRANS_RESP_STATUS_REJ_INSUFF_BCN 2 +#define DOT11_BSSTRANS_RESP_STATUS_REJ_INSUFF_CAP 3 +#define DOT11_BSSTRANS_RESP_STATUS_REJ_TERM_UNDESIRED 4 +#define DOT11_BSSTRANS_RESP_STATUS_REJ_TERM_DELAY_REQ 5 +#define DOT11_BSSTRANS_RESP_STATUS_REJ_BSS_LIST_PROVIDED 6 +#define DOT11_BSSTRANS_RESP_STATUS_REJ_NO_SUITABLE_BSS 7 +#define DOT11_BSSTRANS_RESP_STATUS_REJ_LEAVING_ESS 8 + + +/* BSS Max Idle Period element */ +BWL_PRE_PACKED_STRUCT struct dot11_bss_max_idle_period_ie { + uint8 id; /* 90, DOT11_MNG_BSS_MAX_IDLE_PERIOD_ID */ + uint8 len; + uint16 max_idle_period; /* in unit of 1000 TUs */ + uint8 idle_opt; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_bss_max_idle_period_ie dot11_bss_max_idle_period_ie_t; +#define DOT11_BSS_MAX_IDLE_PERIOD_IE_LEN 3 /* bss max idle period IE size */ +#define DOT11_BSS_MAX_IDLE_PERIOD_OPT_PROTECTED 1 /* BSS max idle option */ + +/* TIM Broadcast request element */ +BWL_PRE_PACKED_STRUCT struct dot11_timbc_req_ie { + uint8 id; /* 94, DOT11_MNG_TIMBC_REQ_ID */ + uint8 len; + uint8 interval; /* in unit of beacon interval */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_timbc_req_ie dot11_timbc_req_ie_t; +#define DOT11_TIMBC_REQ_IE_LEN 1 /* Fixed length */ + +/* TIM Broadcast request frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_timbc_req { + uint8 category; /* category of action frame (10) */ + uint8 action; /* WNM action: DOT11_WNM_ACTION_TIMBC_REQ(18) */ + uint8 token; /* dialog token */ + uint8 data[1]; /* TIM broadcast request element */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_timbc_req dot11_timbc_req_t; +#define DOT11_TIMBC_REQ_LEN 3 /* Fixed length */ + +/* TIM Broadcast response element */ +BWL_PRE_PACKED_STRUCT struct dot11_timbc_resp_ie { + uint8 id; /* 95, DOT11_MNG_TIM_BROADCAST_RESP_ID */ + uint8 len; + uint8 status; /* status of add request */ + uint8 interval; /* in unit of beacon interval */ + int32 offset; /* in unit of ms */ + uint16 high_rate; /* in unit of 0.5 Mb/s */ + uint16 low_rate; /* in unit of 0.5 Mb/s */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_timbc_resp_ie dot11_timbc_resp_ie_t; +#define DOT11_TIMBC_DENY_RESP_IE_LEN 1 /* Deny. Fixed length */ +#define DOT11_TIMBC_ACCEPT_RESP_IE_LEN 10 /* Accept. Fixed length */ + +#define DOT11_TIMBC_STATUS_ACCEPT 0 +#define DOT11_TIMBC_STATUS_ACCEPT_TSTAMP 1 +#define DOT11_TIMBC_STATUS_DENY 2 +#define DOT11_TIMBC_STATUS_OVERRIDDEN 3 +#define DOT11_TIMBC_STATUS_RESERVED 4 + +/* TIM Broadcast request frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_timbc_resp { + uint8 category; /* category of action frame (10) */ + uint8 action; /* action: DOT11_WNM_ACTION_TIMBC_RESP(19) */ + uint8 token; /* dialog token */ + uint8 data[1]; /* TIM broadcast response element */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_timbc_resp dot11_timbc_resp_t; +#define DOT11_TIMBC_RESP_LEN 3 /* Fixed length */ + +/* TIM element */ +BWL_PRE_PACKED_STRUCT struct dot11_tim_ie { + uint8 id; /* 5, DOT11_MNG_TIM_ID */ + uint8 len; /* 4 - 255 */ + uint8 dtim_count; /* DTIM decrementing counter */ + uint8 dtim_period; /* DTIM period */ + uint8 bitmap_control; /* AID 0 + bitmap offset */ + uint8 pvb[1]; /* Partial Virtual Bitmap, variable length */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tim_ie dot11_tim_ie_t; +#define DOT11_TIM_IE_FIXED_LEN 3 /* Fixed length, without id and len */ +#define DOT11_TIM_IE_FIXED_TOTAL_LEN 5 /* Fixed length, with id and len */ + +/* TIM Broadcast frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_timbc { + uint8 category; /* category of action frame (11) */ + uint8 action; /* action: TIM (0) */ + uint8 check_beacon; /* need to check-beacon */ + uint8 tsf[8]; /* Time Synchronization Function */ + dot11_tim_ie_t tim_ie; /* TIM element */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_timbc dot11_timbc_t; +#define DOT11_TIMBC_HDR_LEN (sizeof(dot11_timbc_t) - sizeof(dot11_tim_ie_t)) +#define DOT11_TIMBC_FIXED_LEN (sizeof(dot11_timbc_t) - 1) /* Fixed length */ +#define DOT11_TIMBC_LEN 11 /* Fixed length */ + +/* TCLAS frame classifier type */ +BWL_PRE_PACKED_STRUCT struct dot11_tclas_fc_hdr { + uint8 type; + uint8 mask; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tclas_fc_hdr dot11_tclas_fc_hdr_t; +#define DOT11_TCLAS_FC_HDR_LEN 2 /* Fixed length */ + +#define DOT11_TCLAS_MASK_0 0x1 +#define DOT11_TCLAS_MASK_1 0x2 +#define DOT11_TCLAS_MASK_2 0x4 +#define DOT11_TCLAS_MASK_3 0x8 +#define DOT11_TCLAS_MASK_4 0x10 +#define DOT11_TCLAS_MASK_5 0x20 +#define DOT11_TCLAS_MASK_6 0x40 +#define DOT11_TCLAS_MASK_7 0x80 + +#define DOT11_TCLAS_FC_0_ETH 0 +#define DOT11_TCLAS_FC_1_IP 1 +#define DOT11_TCLAS_FC_2_8021Q 2 +#define DOT11_TCLAS_FC_3_OFFSET 3 +#define DOT11_TCLAS_FC_4_IP_HIGHER 4 +#define DOT11_TCLAS_FC_5_8021D 5 + +/* TCLAS frame classifier type 0 parameters for Ethernet */ +BWL_PRE_PACKED_STRUCT struct dot11_tclas_fc_0_eth { + uint8 type; + uint8 mask; + uint8 sa[ETHER_ADDR_LEN]; + uint8 da[ETHER_ADDR_LEN]; + uint16 eth_type; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tclas_fc_0_eth dot11_tclas_fc_0_eth_t; +#define DOT11_TCLAS_FC_0_ETH_LEN 16 + +/* TCLAS frame classifier type 1 parameters for IPV4 */ +BWL_PRE_PACKED_STRUCT struct dot11_tclas_fc_1_ipv4 { + uint8 type; + uint8 mask; + uint8 version; + uint32 src_ip; + uint32 dst_ip; + uint16 src_port; + uint16 dst_port; + uint8 dscp; + uint8 protocol; + uint8 reserved; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tclas_fc_1_ipv4 dot11_tclas_fc_1_ipv4_t; +#define DOT11_TCLAS_FC_1_IPV4_LEN 18 + +/* TCLAS frame classifier type 2 parameters for 802.1Q */ +BWL_PRE_PACKED_STRUCT struct dot11_tclas_fc_2_8021q { + uint8 type; + uint8 mask; + uint16 tci; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tclas_fc_2_8021q dot11_tclas_fc_2_8021q_t; +#define DOT11_TCLAS_FC_2_8021Q_LEN 4 + +/* TCLAS frame classifier type 3 parameters for filter offset */ +BWL_PRE_PACKED_STRUCT struct dot11_tclas_fc_3_filter { + uint8 type; + uint8 mask; + uint16 offset; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tclas_fc_3_filter dot11_tclas_fc_3_filter_t; +#define DOT11_TCLAS_FC_3_FILTER_LEN 4 + +/* TCLAS frame classifier type 4 parameters for IPV4 is the same as TCLAS type 1 */ +typedef struct dot11_tclas_fc_1_ipv4 dot11_tclas_fc_4_ipv4_t; +#define DOT11_TCLAS_FC_4_IPV4_LEN DOT11_TCLAS_FC_1_IPV4_LEN + +/* TCLAS frame classifier type 4 parameters for IPV6 */ +BWL_PRE_PACKED_STRUCT struct dot11_tclas_fc_4_ipv6 { + uint8 type; + uint8 mask; + uint8 version; + uint8 saddr[16]; + uint8 daddr[16]; + uint16 src_port; + uint16 dst_port; + uint8 dscp; + uint8 nexthdr; + uint8 flow_lbl[3]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tclas_fc_4_ipv6 dot11_tclas_fc_4_ipv6_t; +#define DOT11_TCLAS_FC_4_IPV6_LEN 44 + +/* TCLAS frame classifier type 5 parameters for 802.1D */ +BWL_PRE_PACKED_STRUCT struct dot11_tclas_fc_5_8021d { + uint8 type; + uint8 mask; + uint8 pcp; + uint8 cfi; + uint16 vid; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tclas_fc_5_8021d dot11_tclas_fc_5_8021d_t; +#define DOT11_TCLAS_FC_5_8021D_LEN 6 + +/* TCLAS frame classifier type parameters */ +BWL_PRE_PACKED_STRUCT union dot11_tclas_fc { + uint8 data[1]; + dot11_tclas_fc_hdr_t hdr; + dot11_tclas_fc_0_eth_t t0_eth; + dot11_tclas_fc_1_ipv4_t t1_ipv4; + dot11_tclas_fc_2_8021q_t t2_8021q; + dot11_tclas_fc_3_filter_t t3_filter; + dot11_tclas_fc_4_ipv4_t t4_ipv4; + dot11_tclas_fc_4_ipv6_t t4_ipv6; + dot11_tclas_fc_5_8021d_t t5_8021d; +} BWL_POST_PACKED_STRUCT; +typedef union dot11_tclas_fc dot11_tclas_fc_t; + +#define DOT11_TCLAS_FC_MIN_LEN 4 /* Classifier Type 2 has the min size */ +#define DOT11_TCLAS_FC_MAX_LEN 254 + +/* TCLAS element */ +BWL_PRE_PACKED_STRUCT struct dot11_tclas_ie { + uint8 id; /* 14, DOT11_MNG_TCLAS_ID */ + uint8 len; + uint8 user_priority; + dot11_tclas_fc_t fc; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tclas_ie dot11_tclas_ie_t; +#define DOT11_TCLAS_IE_LEN 3 /* Fixed length, include id and len */ + +/* TCLAS processing element */ +BWL_PRE_PACKED_STRUCT struct dot11_tclas_proc_ie { + uint8 id; /* 44, DOT11_MNG_TCLAS_PROC_ID */ + uint8 len; + uint8 process; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tclas_proc_ie dot11_tclas_proc_ie_t; +#define DOT11_TCLAS_PROC_IE_LEN 3 /* Fixed length, include id and len */ + +#define DOT11_TCLAS_PROC_MATCHALL 0 /* All high level element need to match */ +#define DOT11_TCLAS_PROC_MATCHONE 1 /* One high level element need to match */ +#define DOT11_TCLAS_PROC_NONMATCH 2 /* Non match to any high level element */ + + +/* TSPEC element defined in 802.11 std section 8.4.2.32 - Not supported */ +#define DOT11_TSPEC_IE_LEN 57 /* Fixed length */ + +/* TFS request element */ +BWL_PRE_PACKED_STRUCT struct dot11_tfs_req_ie { + uint8 id; /* 91, DOT11_MNG_TFS_REQUEST_ID */ + uint8 len; + uint8 tfs_id; + uint8 actcode; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tfs_req_ie dot11_tfs_req_ie_t; +#define DOT11_TFS_REQ_IE_LEN 2 /* Fixed length, without id and len */ + +/* TFS request action codes (bitfield) */ +#define DOT11_TFS_ACTCODE_DELETE 1 +#define DOT11_TFS_ACTCODE_NOTIFY 2 + +/* TFS request subelement IDs */ +#define DOT11_TFS_REQ_TFS_SE_ID 1 +#define DOT11_TFS_REQ_VENDOR_SE_ID 221 + +/* TFS subelement */ +BWL_PRE_PACKED_STRUCT struct dot11_tfs_se { + uint8 sub_id; + uint8 len; + uint8 data[1]; /* TCLAS element(s) + optional TCLAS proc */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tfs_se dot11_tfs_se_t; + + +/* TFS response element */ +BWL_PRE_PACKED_STRUCT struct dot11_tfs_resp_ie { + uint8 id; /* 92, DOT11_MNG_TFS_RESPONSE_ID */ + uint8 len; + uint8 tfs_id; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tfs_resp_ie dot11_tfs_resp_ie_t; +#define DOT11_TFS_RESP_IE_LEN 1 /* Fixed length, without id and len */ + +/* TFS response subelement IDs (same subelments, but different IDs than in TFS request */ +#define DOT11_TFS_RESP_TFS_STATUS_SE_ID 1 +#define DOT11_TFS_RESP_TFS_SE_ID 2 +#define DOT11_TFS_RESP_VENDOR_SE_ID 221 + +/* TFS status subelement */ +BWL_PRE_PACKED_STRUCT struct dot11_tfs_status_se { + uint8 sub_id; /* 92, DOT11_MNG_TFS_RESPONSE_ID */ + uint8 len; + uint8 resp_st; + uint8 data[1]; /* Potential dot11_tfs_se_t included */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tfs_status_se dot11_tfs_status_se_t; +#define DOT11_TFS_STATUS_SE_LEN 1 /* Fixed length, without id and len */ + +/* Following Definition should be merged to FMS_TFS macro below */ +/* TFS Response status code. Identical to FMS Element status, without N/A */ +#define DOT11_TFS_STATUS_ACCEPT 0 +#define DOT11_TFS_STATUS_DENY_FORMAT 1 +#define DOT11_TFS_STATUS_DENY_RESOURCE 2 +#define DOT11_TFS_STATUS_DENY_POLICY 4 +#define DOT11_TFS_STATUS_DENY_UNSPECIFIED 5 +#define DOT11_TFS_STATUS_ALTPREF_POLICY 7 +#define DOT11_TFS_STATUS_ALTPREF_TCLAS_UNSUPP 14 + +/* FMS Element Status and TFS Response Status Definition */ +#define DOT11_FMS_TFS_STATUS_ACCEPT 0 +#define DOT11_FMS_TFS_STATUS_DENY_FORMAT 1 +#define DOT11_FMS_TFS_STATUS_DENY_RESOURCE 2 +#define DOT11_FMS_TFS_STATUS_DENY_MULTIPLE_DI 3 +#define DOT11_FMS_TFS_STATUS_DENY_POLICY 4 +#define DOT11_FMS_TFS_STATUS_DENY_UNSPECIFIED 5 +#define DOT11_FMS_TFS_STATUS_ALT_DIFF_DI 6 +#define DOT11_FMS_TFS_STATUS_ALT_POLICY 7 +#define DOT11_FMS_TFS_STATUS_ALT_CHANGE_DI 8 +#define DOT11_FMS_TFS_STATUS_ALT_MCRATE 9 +#define DOT11_FMS_TFS_STATUS_TERM_POLICY 10 +#define DOT11_FMS_TFS_STATUS_TERM_RESOURCE 11 +#define DOT11_FMS_TFS_STATUS_TERM_HIGHER_PRIO 12 +#define DOT11_FMS_TFS_STATUS_ALT_CHANGE_MDI 13 +#define DOT11_FMS_TFS_STATUS_ALT_TCLAS_UNSUPP 14 + +/* TFS Management Request frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_tfs_req { + uint8 category; /* category of action frame (10) */ + uint8 action; /* WNM action: TFS request (13) */ + uint8 token; /* dialog token */ + uint8 data[1]; /* Elements */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tfs_req dot11_tfs_req_t; +#define DOT11_TFS_REQ_LEN 3 /* Fixed length */ + +/* TFS Management Response frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_tfs_resp { + uint8 category; /* category of action frame (10) */ + uint8 action; /* WNM action: TFS request (14) */ + uint8 token; /* dialog token */ + uint8 data[1]; /* Elements */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tfs_resp dot11_tfs_resp_t; +#define DOT11_TFS_RESP_LEN 3 /* Fixed length */ + +/* TFS Management Notify frame request header */ +BWL_PRE_PACKED_STRUCT struct dot11_tfs_notify_req { + uint8 category; /* category of action frame (10) */ + uint8 action; /* WNM action: TFS notify request (15) */ + uint8 tfs_id_cnt; /* TFS IDs count */ + uint8 tfs_id[1]; /* Array of TFS IDs */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tfs_notify_req dot11_tfs_notify_req_t; +#define DOT11_TFS_NOTIFY_REQ_LEN 3 /* Fixed length */ + +/* TFS Management Notify frame response header */ +BWL_PRE_PACKED_STRUCT struct dot11_tfs_notify_resp { + uint8 category; /* category of action frame (10) */ + uint8 action; /* WNM action: TFS notify response (28) */ + uint8 tfs_id_cnt; /* TFS IDs count */ + uint8 tfs_id[1]; /* Array of TFS IDs */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tfs_notify_resp dot11_tfs_notify_resp_t; +#define DOT11_TFS_NOTIFY_RESP_LEN 3 /* Fixed length */ + + +/* WNM-Sleep Management Request frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_wnm_sleep_req { + uint8 category; /* category of action frame (10) */ + uint8 action; /* WNM action: wnm-sleep request (16) */ + uint8 token; /* dialog token */ + uint8 data[1]; /* Elements */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_wnm_sleep_req dot11_wnm_sleep_req_t; +#define DOT11_WNM_SLEEP_REQ_LEN 3 /* Fixed length */ + +/* WNM-Sleep Management Response frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_wnm_sleep_resp { + uint8 category; /* category of action frame (10) */ + uint8 action; /* WNM action: wnm-sleep request (17) */ + uint8 token; /* dialog token */ + uint16 key_len; /* key data length */ + uint8 data[1]; /* Elements */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_wnm_sleep_resp dot11_wnm_sleep_resp_t; +#define DOT11_WNM_SLEEP_RESP_LEN 5 /* Fixed length */ + +#define DOT11_WNM_SLEEP_SUBELEM_ID_GTK 0 +#define DOT11_WNM_SLEEP_SUBELEM_ID_IGTK 1 + +BWL_PRE_PACKED_STRUCT struct dot11_wnm_sleep_subelem_gtk { + uint8 sub_id; + uint8 len; + uint16 key_info; + uint8 key_length; + uint8 rsc[8]; + uint8 key[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_wnm_sleep_subelem_gtk dot11_wnm_sleep_subelem_gtk_t; +#define DOT11_WNM_SLEEP_SUBELEM_GTK_FIXED_LEN 11 /* without sub_id, len, and key */ +#define DOT11_WNM_SLEEP_SUBELEM_GTK_MAX_LEN 43 /* without sub_id and len */ + +BWL_PRE_PACKED_STRUCT struct dot11_wnm_sleep_subelem_igtk { + uint8 sub_id; + uint8 len; + uint16 key_id; + uint8 pn[6]; + uint8 key[16]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_wnm_sleep_subelem_igtk dot11_wnm_sleep_subelem_igtk_t; +#define DOT11_WNM_SLEEP_SUBELEM_IGTK_LEN 24 /* Fixed length */ + +BWL_PRE_PACKED_STRUCT struct dot11_wnm_sleep_ie { + uint8 id; /* 93, DOT11_MNG_WNM_SLEEP_MODE_ID */ + uint8 len; + uint8 act_type; + uint8 resp_status; + uint16 interval; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_wnm_sleep_ie dot11_wnm_sleep_ie_t; +#define DOT11_WNM_SLEEP_IE_LEN 4 /* Fixed length */ + +#define DOT11_WNM_SLEEP_ACT_TYPE_ENTER 0 +#define DOT11_WNM_SLEEP_ACT_TYPE_EXIT 1 + +#define DOT11_WNM_SLEEP_RESP_ACCEPT 0 +#define DOT11_WNM_SLEEP_RESP_UPDATE 1 +#define DOT11_WNM_SLEEP_RESP_DENY 2 +#define DOT11_WNM_SLEEP_RESP_DENY_TEMP 3 +#define DOT11_WNM_SLEEP_RESP_DENY_KEY 4 +#define DOT11_WNM_SLEEP_RESP_DENY_INUSE 5 +#define DOT11_WNM_SLEEP_RESP_LAST 6 + +/* DMS Management Request frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_dms_req { + uint8 category; /* category of action frame (10) */ + uint8 action; /* WNM action: dms request (23) */ + uint8 token; /* dialog token */ + uint8 data[1]; /* Elements */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_dms_req dot11_dms_req_t; +#define DOT11_DMS_REQ_LEN 3 /* Fixed length */ + +/* DMS Management Response frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_dms_resp { + uint8 category; /* category of action frame (10) */ + uint8 action; /* WNM action: dms request (24) */ + uint8 token; /* dialog token */ + uint8 data[1]; /* Elements */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_dms_resp dot11_dms_resp_t; +#define DOT11_DMS_RESP_LEN 3 /* Fixed length */ + +/* DMS request element */ +BWL_PRE_PACKED_STRUCT struct dot11_dms_req_ie { + uint8 id; /* 99, DOT11_MNG_DMS_REQUEST_ID */ + uint8 len; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_dms_req_ie dot11_dms_req_ie_t; +#define DOT11_DMS_REQ_IE_LEN 2 /* Fixed length */ + +/* DMS response element */ +BWL_PRE_PACKED_STRUCT struct dot11_dms_resp_ie { + uint8 id; /* 100, DOT11_MNG_DMS_RESPONSE_ID */ + uint8 len; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_dms_resp_ie dot11_dms_resp_ie_t; +#define DOT11_DMS_RESP_IE_LEN 2 /* Fixed length */ + +/* DMS request descriptor */ +BWL_PRE_PACKED_STRUCT struct dot11_dms_req_desc { + uint8 dms_id; + uint8 len; + uint8 type; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_dms_req_desc dot11_dms_req_desc_t; +#define DOT11_DMS_REQ_DESC_LEN 3 /* Fixed length */ + +#define DOT11_DMS_REQ_TYPE_ADD 0 +#define DOT11_DMS_REQ_TYPE_REMOVE 1 +#define DOT11_DMS_REQ_TYPE_CHANGE 2 + +/* DMS response status */ +BWL_PRE_PACKED_STRUCT struct dot11_dms_resp_st { + uint8 dms_id; + uint8 len; + uint8 type; + uint16 lsc; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_dms_resp_st dot11_dms_resp_st_t; +#define DOT11_DMS_RESP_STATUS_LEN 5 /* Fixed length */ + +#define DOT11_DMS_RESP_TYPE_ACCEPT 0 +#define DOT11_DMS_RESP_TYPE_DENY 1 +#define DOT11_DMS_RESP_TYPE_TERM 2 + +#define DOT11_DMS_RESP_LSC_UNSUPPORTED 0xFFFF + +/* FMS Management Request frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_fms_req { + uint8 category; /* category of action frame (10) */ + uint8 action; /* WNM action: fms request (9) */ + uint8 token; /* dialog token */ + uint8 data[1]; /* Elements */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_fms_req dot11_fms_req_t; +#define DOT11_FMS_REQ_LEN 3 /* Fixed length */ + +/* FMS Management Response frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_fms_resp { + uint8 category; /* category of action frame (10) */ + uint8 action; /* WNM action: fms request (10) */ + uint8 token; /* dialog token */ + uint8 data[1]; /* Elements */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_fms_resp dot11_fms_resp_t; +#define DOT11_FMS_RESP_LEN 3 /* Fixed length */ + +/* FMS Descriptor element */ +BWL_PRE_PACKED_STRUCT struct dot11_fms_desc { + uint8 id; + uint8 len; + uint8 num_fms_cnt; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_fms_desc dot11_fms_desc_t; +#define DOT11_FMS_DESC_LEN 1 /* Fixed length */ + +#define DOT11_FMS_CNTR_MAX 0x8 +#define DOT11_FMS_CNTR_ID_MASK 0x7 +#define DOT11_FMS_CNTR_ID_SHIFT 0x0 +#define DOT11_FMS_CNTR_COUNT_MASK 0xf1 +#define DOT11_FMS_CNTR_SHIFT 0x3 + +/* FMS request element */ +BWL_PRE_PACKED_STRUCT struct dot11_fms_req_ie { + uint8 id; + uint8 len; + uint8 fms_token; /* token used to identify fms stream set */ + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_fms_req_ie dot11_fms_req_ie_t; +#define DOT11_FMS_REQ_IE_FIX_LEN 1 /* Fixed length */ + +BWL_PRE_PACKED_STRUCT struct dot11_rate_id_field { + uint8 mask; + uint8 mcs_idx; + uint16 rate; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rate_id_field dot11_rate_id_field_t; +#define DOT11_RATE_ID_FIELD_MCS_SEL_MASK 0x7 +#define DOT11_RATE_ID_FIELD_MCS_SEL_OFFSET 0 +#define DOT11_RATE_ID_FIELD_RATETYPE_MASK 0x18 +#define DOT11_RATE_ID_FIELD_RATETYPE_OFFSET 3 +#define DOT11_RATE_ID_FIELD_LEN sizeof(dot11_rate_id_field_t) + +/* FMS request subelements */ +BWL_PRE_PACKED_STRUCT struct dot11_fms_se { + uint8 sub_id; + uint8 len; + uint8 interval; + uint8 max_interval; + dot11_rate_id_field_t rate; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_fms_se dot11_fms_se_t; +#define DOT11_FMS_REQ_SE_LEN 6 /* Fixed length */ + +#define DOT11_FMS_REQ_SE_ID_FMS 1 /* FMS subelement */ +#define DOT11_FMS_REQ_SE_ID_VS 221 /* Vendor Specific subelement */ + +/* FMS response element */ +BWL_PRE_PACKED_STRUCT struct dot11_fms_resp_ie { + uint8 id; + uint8 len; + uint8 fms_token; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_fms_resp_ie dot11_fms_resp_ie_t; +#define DOT11_FMS_RESP_IE_FIX_LEN 1 /* Fixed length */ + +/* FMS status subelements */ +#define DOT11_FMS_STATUS_SE_ID_FMS 1 /* FMS Status */ +#define DOT11_FMS_STATUS_SE_ID_TCLAS 2 /* TCLAS Status */ +#define DOT11_FMS_STATUS_SE_ID_VS 221 /* Vendor Specific subelement */ + +/* FMS status subelement */ +BWL_PRE_PACKED_STRUCT struct dot11_fms_status_se { + uint8 sub_id; + uint8 len; + uint8 status; + uint8 interval; + uint8 max_interval; + uint8 fmsid; + uint8 counter; + dot11_rate_id_field_t rate; + uint8 mcast_addr[ETHER_ADDR_LEN]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_fms_status_se dot11_fms_status_se_t; +#define DOT11_FMS_STATUS_SE_LEN 15 /* Fixed length */ + +/* TCLAS status subelement */ +BWL_PRE_PACKED_STRUCT struct dot11_tclas_status_se { + uint8 sub_id; + uint8 len; + uint8 fmsid; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_tclas_status_se dot11_tclas_status_se_t; +#define DOT11_TCLAS_STATUS_SE_LEN 1 /* Fixed length */ + +BWL_PRE_PACKED_STRUCT struct dot11_addba_req { + uint8 category; /* category of action frame (3) */ + uint8 action; /* action: addba req */ + uint8 token; /* identifier */ + uint16 addba_param_set; /* parameter set */ + uint16 timeout; /* timeout in seconds */ + uint16 start_seqnum; /* starting sequence number */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_addba_req dot11_addba_req_t; +#define DOT11_ADDBA_REQ_LEN 9 /* length of addba req frame */ + +BWL_PRE_PACKED_STRUCT struct dot11_addba_resp { + uint8 category; /* category of action frame (3) */ + uint8 action; /* action: addba resp */ + uint8 token; /* identifier */ + uint16 status; /* status of add request */ + uint16 addba_param_set; /* negotiated parameter set */ + uint16 timeout; /* negotiated timeout in seconds */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_addba_resp dot11_addba_resp_t; +#define DOT11_ADDBA_RESP_LEN 9 /* length of addba resp frame */ + +/* DELBA action parameters */ +#define DOT11_DELBA_PARAM_INIT_MASK 0x0800 /* initiator mask */ +#define DOT11_DELBA_PARAM_INIT_SHIFT 11 /* initiator shift */ +#define DOT11_DELBA_PARAM_TID_MASK 0xf000 /* tid mask */ +#define DOT11_DELBA_PARAM_TID_SHIFT 12 /* tid shift */ + +BWL_PRE_PACKED_STRUCT struct dot11_delba { + uint8 category; /* category of action frame (3) */ + uint8 action; /* action: addba req */ + uint16 delba_param_set; /* paarmeter set */ + uint16 reason; /* reason for dellba */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_delba dot11_delba_t; +#define DOT11_DELBA_LEN 6 /* length of delba frame */ + +/* SA Query action field value */ +#define SA_QUERY_REQUEST 0 +#define SA_QUERY_RESPONSE 1 + +/* ************* 802.11r related definitions. ************* */ + +/* Over-the-DS Fast Transition Request frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_ft_req { + uint8 category; /* category of action frame (6) */ + uint8 action; /* action: ft req */ + uint8 sta_addr[ETHER_ADDR_LEN]; + uint8 tgt_ap_addr[ETHER_ADDR_LEN]; + uint8 data[1]; /* Elements */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_ft_req dot11_ft_req_t; +#define DOT11_FT_REQ_FIXED_LEN 14 + +/* Over-the-DS Fast Transition Response frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_ft_res { + uint8 category; /* category of action frame (6) */ + uint8 action; /* action: ft resp */ + uint8 sta_addr[ETHER_ADDR_LEN]; + uint8 tgt_ap_addr[ETHER_ADDR_LEN]; + uint16 status; /* status code */ + uint8 data[1]; /* Elements */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_ft_res dot11_ft_res_t; +#define DOT11_FT_RES_FIXED_LEN 16 + +/* RDE RIC Data Element. */ +BWL_PRE_PACKED_STRUCT struct dot11_rde_ie { + uint8 id; /* 11r, DOT11_MNG_RDE_ID */ + uint8 length; + uint8 rde_id; /* RDE identifier. */ + uint8 rd_count; /* Resource Descriptor Count. */ + uint16 status; /* Status Code. */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rde_ie dot11_rde_ie_t; + +/* 11r - Size of the RDE (RIC Data Element) IE, including TLV header. */ +#define DOT11_MNG_RDE_IE_LEN sizeof(dot11_rde_ie_t) + + +/* ************* 802.11k related definitions. ************* */ + +/* Radio measurements enabled capability ie */ +#define DOT11_RRM_CAP_LEN 5 /* length of rrm cap bitmap */ +#define RCPI_IE_LEN 1 +#define RSNI_IE_LEN 1 +BWL_PRE_PACKED_STRUCT struct dot11_rrm_cap_ie { + uint8 cap[DOT11_RRM_CAP_LEN]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rrm_cap_ie dot11_rrm_cap_ie_t; + +/* Bitmap definitions for cap ie */ +#define DOT11_RRM_CAP_LINK 0 +#define DOT11_RRM_CAP_NEIGHBOR_REPORT 1 +#define DOT11_RRM_CAP_PARALLEL 2 +#define DOT11_RRM_CAP_REPEATED 3 +#define DOT11_RRM_CAP_BCN_PASSIVE 4 +#define DOT11_RRM_CAP_BCN_ACTIVE 5 +#define DOT11_RRM_CAP_BCN_TABLE 6 +#define DOT11_RRM_CAP_BCN_REP_COND 7 +#define DOT11_RRM_CAP_FM 8 +#define DOT11_RRM_CAP_CLM 9 +#define DOT11_RRM_CAP_NHM 10 +#define DOT11_RRM_CAP_SM 11 +#define DOT11_RRM_CAP_LCIM 12 +#define DOT11_RRM_CAP_LCIA 13 +#define DOT11_RRM_CAP_TSCM 14 +#define DOT11_RRM_CAP_TTSCM 15 +#define DOT11_RRM_CAP_AP_CHANREP 16 +#define DOT11_RRM_CAP_RMMIB 17 +/* bit18-bit26, not used for RRM_IOVAR */ +#define DOT11_RRM_CAP_MPTI 27 +#define DOT11_RRM_CAP_NBRTSFO 28 +#define DOT11_RRM_CAP_RCPI 29 +#define DOT11_RRM_CAP_RSNI 30 +#define DOT11_RRM_CAP_BSSAAD 31 +#define DOT11_RRM_CAP_BSSAAC 32 +#define DOT11_RRM_CAP_AI 33 + +/* Operating Class (formerly "Regulatory Class") definitions */ +#define DOT11_OP_CLASS_NONE 255 + +BWL_PRE_PACKED_STRUCT struct do11_ap_chrep { + uint8 id; + uint8 len; + uint8 reg; + uint8 chanlist[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct do11_ap_chrep dot11_ap_chrep_t; + +/* Radio Measurements action ids */ +#define DOT11_RM_ACTION_RM_REQ 0 /* Radio measurement request */ +#define DOT11_RM_ACTION_RM_REP 1 /* Radio measurement report */ +#define DOT11_RM_ACTION_LM_REQ 2 /* Link measurement request */ +#define DOT11_RM_ACTION_LM_REP 3 /* Link measurement report */ +#define DOT11_RM_ACTION_NR_REQ 4 /* Neighbor report request */ +#define DOT11_RM_ACTION_NR_REP 5 /* Neighbor report response */ + +/* Generic radio measurement action frame header */ +BWL_PRE_PACKED_STRUCT struct dot11_rm_action { + uint8 category; /* category of action frame (5) */ + uint8 action; /* radio measurement action */ + uint8 token; /* dialog token */ + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rm_action dot11_rm_action_t; +#define DOT11_RM_ACTION_LEN 3 + +BWL_PRE_PACKED_STRUCT struct dot11_rmreq { + uint8 category; /* category of action frame (5) */ + uint8 action; /* radio measurement action */ + uint8 token; /* dialog token */ + uint16 reps; /* no. of repetitions */ + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmreq dot11_rmreq_t; +#define DOT11_RMREQ_LEN 5 + +BWL_PRE_PACKED_STRUCT struct dot11_rm_ie { + uint8 id; + uint8 len; + uint8 token; + uint8 mode; + uint8 type; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rm_ie dot11_rm_ie_t; +#define DOT11_RM_IE_LEN 5 + +/* Definitions for "mode" bits in rm req */ +#define DOT11_RMREQ_MODE_PARALLEL 1 +#define DOT11_RMREQ_MODE_ENABLE 2 +#define DOT11_RMREQ_MODE_REQUEST 4 +#define DOT11_RMREQ_MODE_REPORT 8 +#define DOT11_RMREQ_MODE_DURMAND 0x10 /* Duration Mandatory */ + +/* Definitions for "mode" bits in rm rep */ +#define DOT11_RMREP_MODE_LATE 1 +#define DOT11_RMREP_MODE_INCAPABLE 2 +#define DOT11_RMREP_MODE_REFUSED 4 + +BWL_PRE_PACKED_STRUCT struct dot11_rmreq_bcn { + uint8 id; /* XXX use dot11_rm_ie_t ? */ + uint8 len; + uint8 token; + uint8 mode; + uint8 type; + uint8 reg; + uint8 channel; + uint16 interval; + uint16 duration; + uint8 bcn_mode; + struct ether_addr bssid; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmreq_bcn dot11_rmreq_bcn_t; +#define DOT11_RMREQ_BCN_LEN 18 + +BWL_PRE_PACKED_STRUCT struct dot11_rmrep_bcn { + uint8 reg; + uint8 channel; + uint32 starttime[2]; + uint16 duration; + uint8 frame_info; + uint8 rcpi; + uint8 rsni; + struct ether_addr bssid; + uint8 antenna_id; + uint32 parent_tsf; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmrep_bcn dot11_rmrep_bcn_t; +#define DOT11_RMREP_BCN_LEN 26 + +/* Beacon request measurement mode */ +#define DOT11_RMREQ_BCN_PASSIVE 0 +#define DOT11_RMREQ_BCN_ACTIVE 1 +#define DOT11_RMREQ_BCN_TABLE 2 + +/* Sub-element IDs for Beacon Request */ +#define DOT11_RMREQ_BCN_SSID_ID 0 +#define DOT11_RMREQ_BCN_REPINFO_ID 1 +#define DOT11_RMREQ_BCN_REPDET_ID 2 +#define DOT11_RMREQ_BCN_REQUEST_ID 10 +#define DOT11_RMREQ_BCN_APCHREP_ID DOT11_MNG_AP_CHREP_ID + +/* Reporting Detail element definition */ +#define DOT11_RMREQ_BCN_REPDET_FIXED 0 /* Fixed length fields only */ +#define DOT11_RMREQ_BCN_REPDET_REQUEST 1 /* + requested information elems */ +#define DOT11_RMREQ_BCN_REPDET_ALL 2 /* All fields */ + +/* Sub-element IDs for Beacon Report */ +#define DOT11_RMREP_BCN_FRM_BODY 1 + +/* Sub-element IDs for Frame Report */ +#define DOT11_RMREP_FRAME_COUNT_REPORT 1 + +/* Channel load request */ +BWL_PRE_PACKED_STRUCT struct dot11_rmreq_chanload { + uint8 id; /* XXX use dot11_rm_ie_t ? */ + uint8 len; + uint8 token; + uint8 mode; + uint8 type; + uint8 reg; + uint8 channel; + uint16 interval; + uint16 duration; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmreq_chanload dot11_rmreq_chanload_t; +#define DOT11_RMREQ_CHANLOAD_LEN 11 + +/* Channel load report */ +BWL_PRE_PACKED_STRUCT struct dot11_rmrep_chanload { + uint8 reg; + uint8 channel; + uint32 starttime[2]; + uint16 duration; + uint8 channel_load; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmrep_chanload dot11_rmrep_chanload_t; +#define DOT11_RMREP_CHANLOAD_LEN 13 + +/* Noise histogram request */ +BWL_PRE_PACKED_STRUCT struct dot11_rmreq_noise { + uint8 id; /* XXX use dot11_rm_ie_t ? */ + uint8 len; + uint8 token; + uint8 mode; + uint8 type; + uint8 reg; + uint8 channel; + uint16 interval; + uint16 duration; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmreq_noise dot11_rmreq_noise_t; +#define DOT11_RMREQ_NOISE_LEN 11 + +/* Noise histogram report */ +BWL_PRE_PACKED_STRUCT struct dot11_rmrep_noise { + uint8 reg; + uint8 channel; + uint32 starttime[2]; + uint16 duration; + uint8 antid; + uint8 anpi; + uint8 ipi0_dens; + uint8 ipi1_dens; + uint8 ipi2_dens; + uint8 ipi3_dens; + uint8 ipi4_dens; + uint8 ipi5_dens; + uint8 ipi6_dens; + uint8 ipi7_dens; + uint8 ipi8_dens; + uint8 ipi9_dens; + uint8 ipi10_dens; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmrep_noise dot11_rmrep_noise_t; +#define DOT11_RMREP_NOISE_LEN 25 + +/* Frame request */ +BWL_PRE_PACKED_STRUCT struct dot11_rmreq_frame { + uint8 id; /* XXX use dot11_rm_ie_t ? */ + uint8 len; + uint8 token; + uint8 mode; + uint8 type; + uint8 reg; + uint8 channel; + uint16 interval; + uint16 duration; + uint8 req_type; + struct ether_addr ta; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmreq_frame dot11_rmreq_frame_t; +#define DOT11_RMREQ_FRAME_LEN 18 + +/* Frame report */ +BWL_PRE_PACKED_STRUCT struct dot11_rmrep_frame { + uint8 reg; + uint8 channel; + uint32 starttime[2]; + uint16 duration; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmrep_frame dot11_rmrep_frame_t; +#define DOT11_RMREP_FRAME_LEN 12 + +/* Frame report entry */ +BWL_PRE_PACKED_STRUCT struct dot11_rmrep_frmentry { + struct ether_addr ta; + struct ether_addr bssid; + uint8 phy_type; + uint8 avg_rcpi; + uint8 last_rsni; + uint8 last_rcpi; + uint8 ant_id; + uint16 frame_cnt; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmrep_frmentry dot11_rmrep_frmentry_t; +#define DOT11_RMREP_FRMENTRY_LEN 19 + +/* STA statistics request */ +BWL_PRE_PACKED_STRUCT struct dot11_rmreq_stat { + uint8 id; /* XXX use dot11_rm_ie_t ? */ + uint8 len; + uint8 token; + uint8 mode; + uint8 type; + struct ether_addr peer; + uint16 interval; + uint16 duration; + uint8 group_id; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmreq_stat dot11_rmreq_stat_t; +#define DOT11_RMREQ_STAT_LEN 16 + +/* STA statistics report */ +BWL_PRE_PACKED_STRUCT struct dot11_rmrep_stat { + uint16 duration; + uint8 group_id; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmrep_stat dot11_rmrep_stat_t; + +/* Transmit stream/category measurement request */ +BWL_PRE_PACKED_STRUCT struct dot11_rmreq_tx_stream { + uint8 id; /* XXX use dot11_rm_ie_t ? */ + uint8 len; + uint8 token; + uint8 mode; + uint8 type; + uint16 interval; + uint16 duration; + struct ether_addr peer; + uint8 traffic_id; + uint8 bin0_range; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmreq_tx_stream dot11_rmreq_tx_stream_t; + +/* Transmit stream/category measurement report */ +BWL_PRE_PACKED_STRUCT struct dot11_rmrep_tx_stream { + uint32 starttime[2]; + uint16 duration; + struct ether_addr peer; + uint8 traffic_id; + uint8 reason; + uint32 txmsdu_cnt; + uint32 msdu_discarded_cnt; + uint32 msdufailed_cnt; + uint32 msduretry_cnt; + uint32 cfpolls_lost_cnt; + uint32 avrqueue_delay; + uint32 avrtx_delay; + uint8 bin0_range; + uint32 bin0; + uint32 bin1; + uint32 bin2; + uint32 bin3; + uint32 bin4; + uint32 bin5; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmrep_tx_stream dot11_rmrep_tx_stream_t; + +/* Measurement pause request */ +BWL_PRE_PACKED_STRUCT struct dot11_rmreq_pause_time { + uint8 id; /* XXX use dot11_rm_ie_t ? */ + uint8 len; + uint8 token; + uint8 mode; + uint8 type; + uint16 pause_time; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_rmreq_pause_time dot11_rmreq_pause_time_t; + + +/* Neighbor Report subelements ID (11k & 11v) */ +#define DOT11_NGBR_TSF_INFO_SE_ID 1 +#define DOT11_NGBR_CCS_SE_ID 2 +#define DOT11_NGBR_BSSTRANS_PREF_SE_ID 3 +#define DOT11_NGBR_BSS_TERM_DUR_SE_ID 4 +#define DOT11_NGBR_BEARING_SE_ID 5 + +/* Neighbor Report, BSS Transition Candidate Preference subelement */ +BWL_PRE_PACKED_STRUCT struct dot11_ngbr_bsstrans_pref_se { + uint8 sub_id; + uint8 len; + uint8 preference; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_ngbr_bsstrans_pref_se dot11_ngbr_bsstrans_pref_se_t; +#define DOT11_NGBR_BSSTRANS_PREF_SE_LEN 1 + +/* Neighbor Report, BSS Termination Duration subelement */ +BWL_PRE_PACKED_STRUCT struct dot11_ngbr_bss_term_dur_se { + uint8 sub_id; + uint8 len; + uint8 tsf[8]; + uint16 duration; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_ngbr_bss_term_dur_se dot11_ngbr_bss_term_dur_se_t; +#define DOT11_NGBR_BSS_TERM_DUR_SE_LEN 10 + +/* Neighbor Report BSSID Information Field */ +#define DOT11_NGBR_BI_REACHABILTY_UNKN 0x0002 +#define DOT11_NGBR_BI_REACHABILTY 0x0003 +#define DOT11_NGBR_BI_SEC 0x0004 +#define DOT11_NGBR_BI_KEY_SCOPE 0x0008 +#define DOT11_NGBR_BI_CAP 0x03f0 +#define DOT11_NGBR_BI_CAP_SPEC_MGMT 0x0010 +#define DOT11_NGBR_BI_CAP_QOS 0x0020 +#define DOT11_NGBR_BI_CAP_APSD 0x0040 +#define DOT11_NGBR_BI_CAP_RDIO_MSMT 0x0080 +#define DOT11_NGBR_BI_CAP_DEL_BA 0x0100 +#define DOT11_NGBR_BI_CAP_IMM_BA 0x0200 +#define DOT11_NGBR_BI_MOBILITY 0x0400 +#define DOT11_NGBR_BI_HT 0x0800 + +/* Neighbor Report element (11k & 11v) */ +BWL_PRE_PACKED_STRUCT struct dot11_neighbor_rep_ie { + uint8 id; + uint8 len; + struct ether_addr bssid; + uint32 bssid_info; + uint8 reg; /* Operating class */ + uint8 channel; + uint8 phytype; + uint8 data[1]; /* Variable size subelements */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_neighbor_rep_ie dot11_neighbor_rep_ie_t; +#define DOT11_NEIGHBOR_REP_IE_FIXED_LEN 13 + + +/* MLME Enumerations */ +#define DOT11_BSSTYPE_INFRASTRUCTURE 0 /* d11 infrastructure */ +#define DOT11_BSSTYPE_INDEPENDENT 1 /* d11 independent */ +#define DOT11_BSSTYPE_ANY 2 /* d11 any BSS type */ +#define DOT11_SCANTYPE_ACTIVE 0 /* d11 scan active */ +#define DOT11_SCANTYPE_PASSIVE 1 /* d11 scan passive */ + +/* Link Measurement */ +BWL_PRE_PACKED_STRUCT struct dot11_lmreq { + uint8 category; /* category of action frame (5) */ + uint8 action; /* radio measurement action */ + uint8 token; /* dialog token */ + uint8 txpwr; /* Transmit Power Used */ + uint8 maxtxpwr; /* Max Transmit Power */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_lmreq dot11_lmreq_t; +#define DOT11_LMREQ_LEN 5 + +BWL_PRE_PACKED_STRUCT struct dot11_lmrep { + uint8 category; /* category of action frame (5) */ + uint8 action; /* radio measurement action */ + uint8 token; /* dialog token */ + dot11_tpc_rep_t tpc; /* TPC element */ + uint8 rxant; /* Receive Antenna ID */ + uint8 txant; /* Transmit Antenna ID */ + uint8 rcpi; /* RCPI */ + uint8 rsni; /* RSNI */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_lmrep dot11_lmrep_t; +#define DOT11_LMREP_LEN 11 + +/* 802.11 BRCM "Compromise" Pre N constants */ +#define PREN_PREAMBLE 24 /* green field preamble time */ +#define PREN_MM_EXT 12 /* extra mixed mode preamble time */ +#define PREN_PREAMBLE_EXT 4 /* extra preamble (multiply by unique_streams-1) */ + +/* 802.11N PHY constants */ +#define RIFS_11N_TIME 2 /* NPHY RIFS time */ + +/* 802.11 HT PLCP format 802.11n-2009, sec 20.3.9.4.3 + * HT-SIG is composed of two 24 bit parts, HT-SIG1 and HT-SIG2 + */ +/* HT-SIG1 */ +#define HT_SIG1_MCS_MASK 0x00007F +#define HT_SIG1_CBW 0x000080 +#define HT_SIG1_HT_LENGTH 0xFFFF00 + +/* HT-SIG2 */ +#define HT_SIG2_SMOOTHING 0x000001 +#define HT_SIG2_NOT_SOUNDING 0x000002 +#define HT_SIG2_RESERVED 0x000004 +#define HT_SIG2_AGGREGATION 0x000008 +#define HT_SIG2_STBC_MASK 0x000030 +#define HT_SIG2_STBC_SHIFT 4 +#define HT_SIG2_FEC_CODING 0x000040 +#define HT_SIG2_SHORT_GI 0x000080 +#define HT_SIG2_ESS_MASK 0x000300 +#define HT_SIG2_ESS_SHIFT 8 +#define HT_SIG2_CRC 0x03FC00 +#define HT_SIG2_TAIL 0x1C0000 + +/* HT Timing-related parameters (802.11-2012, sec 20.3.6) */ +#define HT_T_LEG_PREAMBLE 16 +#define HT_T_L_SIG 4 +#define HT_T_SIG 8 +#define HT_T_LTF1 4 +#define HT_T_GF_LTF1 8 +#define HT_T_LTFs 4 +#define HT_T_STF 4 +#define HT_T_GF_STF 8 +#define HT_T_SYML 4 + +#define HT_N_SERVICE 16 /* bits in SERVICE field */ +#define HT_N_TAIL 6 /* tail bits per BCC encoder */ + +/* 802.11 A PHY constants */ +#define APHY_SLOT_TIME 9 /* APHY slot time */ +#define APHY_SIFS_TIME 16 /* APHY SIFS time */ +#define APHY_DIFS_TIME (APHY_SIFS_TIME + (2 * APHY_SLOT_TIME)) /* APHY DIFS time */ +#define APHY_PREAMBLE_TIME 16 /* APHY preamble time */ +#define APHY_SIGNAL_TIME 4 /* APHY signal time */ +#define APHY_SYMBOL_TIME 4 /* APHY symbol time */ +#define APHY_SERVICE_NBITS 16 /* APHY service nbits */ +#define APHY_TAIL_NBITS 6 /* APHY tail nbits */ +#define APHY_CWMIN 15 /* APHY cwmin */ + +/* 802.11 B PHY constants */ +#define BPHY_SLOT_TIME 20 /* BPHY slot time */ +#define BPHY_SIFS_TIME 10 /* BPHY SIFS time */ +#define BPHY_DIFS_TIME 50 /* BPHY DIFS time */ +#define BPHY_PLCP_TIME 192 /* BPHY PLCP time */ +#define BPHY_PLCP_SHORT_TIME 96 /* BPHY PLCP short time */ +#define BPHY_CWMIN 31 /* BPHY cwmin */ + +/* 802.11 G constants */ +#define DOT11_OFDM_SIGNAL_EXTENSION 6 /* d11 OFDM signal extension */ + +#define PHY_CWMAX 1023 /* PHY cwmax */ + +#define DOT11_MAXNUMFRAGS 16 /* max # fragments per MSDU */ + +/* 802.11 VHT constants */ + +typedef int vht_group_id_t; + +/* for VHT-A1 */ +/* SIG-A1 reserved bits */ +#define VHT_SIGA1_CONST_MASK 0x800004 + +#define VHT_SIGA1_BW_MASK 0x000003 +#define VHT_SIGA1_20MHZ_VAL 0x000000 +#define VHT_SIGA1_40MHZ_VAL 0x000001 +#define VHT_SIGA1_80MHZ_VAL 0x000002 +#define VHT_SIGA1_160MHZ_VAL 0x000003 + +#define VHT_SIGA1_STBC 0x000008 + +#define VHT_SIGA1_GID_MASK 0x0003f0 +#define VHT_SIGA1_GID_SHIFT 4 +#define VHT_SIGA1_GID_TO_AP 0x00 +#define VHT_SIGA1_GID_NOT_TO_AP 0x3f +#define VHT_SIGA1_GID_MAX_GID 0x3f + +#define VHT_SIGA1_NSTS_SHIFT_MASK_USER0 0x001C00 +#define VHT_SIGA1_NSTS_SHIFT 10 + +#define VHT_SIGA1_PARTIAL_AID_MASK 0x3fe000 +#define VHT_SIGA1_PARTIAL_AID_SHIFT 13 + +#define VHT_SIGA1_TXOP_PS_NOT_ALLOWED 0x400000 + +/* for VHT-A2 */ +#define VHT_SIGA2_GI_NONE 0x000000 +#define VHT_SIGA2_GI_SHORT 0x000001 +#define VHT_SIGA2_GI_W_MOD10 0x000002 +#define VHT_SIGA2_CODING_LDPC 0x000004 +#define VHT_SIGA2_LDPC_EXTRA_OFDM_SYM 0x000008 +#define VHT_SIGA2_BEAMFORM_ENABLE 0x000100 +#define VHT_SIGA2_MCS_SHIFT 4 + +#define VHT_SIGA2_B9_RESERVED 0x000200 +#define VHT_SIGA2_TAIL_MASK 0xfc0000 +#define VHT_SIGA2_TAIL_VALUE 0x000000 + +/* VHT Timing-related parameters (802.11ac D4.0, sec 22.3.6) */ +#define VHT_T_LEG_PREAMBLE 16 +#define VHT_T_L_SIG 4 +#define VHT_T_SIG_A 8 +#define VHT_T_LTF 4 +#define VHT_T_STF 4 +#define VHT_T_SIG_B 4 +#define VHT_T_SYML 4 + +#define VHT_N_SERVICE 16 /* bits in SERVICE field */ +#define VHT_N_TAIL 6 /* tail bits per BCC encoder */ + + +/* dot11Counters Table - 802.11 spec., Annex D */ +typedef struct d11cnt { + uint32 txfrag; /* dot11TransmittedFragmentCount */ + uint32 txmulti; /* dot11MulticastTransmittedFrameCount */ + uint32 txfail; /* dot11FailedCount */ + uint32 txretry; /* dot11RetryCount */ + uint32 txretrie; /* dot11MultipleRetryCount */ + uint32 rxdup; /* dot11FrameduplicateCount */ + uint32 txrts; /* dot11RTSSuccessCount */ + uint32 txnocts; /* dot11RTSFailureCount */ + uint32 txnoack; /* dot11ACKFailureCount */ + uint32 rxfrag; /* dot11ReceivedFragmentCount */ + uint32 rxmulti; /* dot11MulticastReceivedFrameCount */ + uint32 rxcrc; /* dot11FCSErrorCount */ + uint32 txfrmsnt; /* dot11TransmittedFrameCount */ + uint32 rxundec; /* dot11WEPUndecryptableCount */ +} d11cnt_t; + +/* OUI for BRCM proprietary IE */ +#define BRCM_PROP_OUI "\x00\x90\x4C" /* Broadcom proprietary OUI */ + +/* Broadcom Proprietary OUI type list. Please update below twiki page when adding a new type. + * Twiki http://hwnbu-twiki.sj.broadcom.com/bin/view/Mwgroup/WlBrcmPropIE + */ +/* The following BRCM_PROP_OUI types are currently in use (defined in + * relevant subsections). Each of them will be in a separate proprietary(221) IE + * #define RWL_WIFI_DEFAULT 0 + * #define SES_VNDR_IE_TYPE 1 (defined in src/ses/shared/ses.h) + * #define DPT_IE_TYPE 2 + * #define VHT_FEATURES_IE_TYPE 4 + * #define RWL_WIFI_FIND_MY_PEER 9 + * #define RWL_WIFI_FOUND_PEER 10 + * #define PROXD_AF_TYPE 11 + * #define HT_CAP_IE_TYPE 51 + * #define HT_ADD_IE_TYPE 52 + * #define BRCM_EXTCH_IE_TYPE 53 + * #define MEMBER_OF_BRCM_PROP_IE_TYPE 54 + * #define BRCM_RELMACST_IE_TYPE 55 + * #define BRCM_EVT_WL_BSS_INFO 64 + * #define RWL_ACTION_WIFI_FRAG_TYPE 85 + */ + +/* Action frame type for RWL */ +#define RWL_WIFI_DEFAULT 0 +#define RWL_WIFI_FIND_MY_PEER 9 /* Used while finding server */ +#define RWL_WIFI_FOUND_PEER 10 /* Server response to the client */ +#define RWL_ACTION_WIFI_FRAG_TYPE 85 /* Fragment indicator for receiver */ + +#define PROXD_AF_TYPE 11 /* Wifi proximity action frame type */ + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +/* + * This BRCM_PROP_OUI types is intended for use in events to embed additional + * data, and would not be expected to appear on the air -- but having an IE + * format allows IE frame data with extra data in events in that allows for + * more flexible parsing. + */ +#define BRCM_EVT_WL_BSS_INFO 64 + +/* Following is the generic structure for brcm_prop_ie (uses BRCM_PROP_OUI). + * DPT uses this format with type set to DPT_IE_TYPE + */ +BWL_PRE_PACKED_STRUCT struct brcm_prop_ie_s { + uint8 id; /* IE ID, 221, DOT11_MNG_PROPR_ID */ + uint8 len; /* IE length */ + uint8 oui[3]; /* Proprietary OUI, BRCM_PROP_OUI */ + uint8 type; /* type of this IE */ + uint16 cap; /* DPT capabilities */ +} BWL_POST_PACKED_STRUCT; +typedef struct brcm_prop_ie_s brcm_prop_ie_t; + +#define BRCM_PROP_IE_LEN 6 /* len of fixed part of brcm_prop ie */ + +#define DPT_IE_TYPE 2 +#define BRCM_SYSCAP_IE_TYPE 3 +#define WET_TUNNEL_IE_TYPE 3 +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +/* brcm syscap_ie cap */ +#define BRCM_SYSCAP_WET_TUNNEL 0x0100 /* Device with WET_TUNNEL support */ + +/* BRCM OUI: Used in the proprietary(221) IE in all broadcom devices */ +#define BRCM_OUI "\x00\x10\x18" /* Broadcom OUI */ + +/* BRCM info element */ +BWL_PRE_PACKED_STRUCT struct brcm_ie { + uint8 id; /* IE ID, 221, DOT11_MNG_PROPR_ID */ + uint8 len; /* IE length */ + uint8 oui[3]; /* Proprietary OUI, BRCM_OUI */ + uint8 ver; /* type/ver of this IE */ + uint8 assoc; /* # of assoc STAs */ + uint8 flags; /* misc flags */ + uint8 flags1; /* misc flags */ + uint16 amsdu_mtu_pref; /* preferred A-MSDU MTU */ +} BWL_POST_PACKED_STRUCT; +typedef struct brcm_ie brcm_ie_t; +#define BRCM_IE_LEN 11 /* BRCM IE length */ +#define BRCM_IE_VER 2 /* BRCM IE version */ +#define BRCM_IE_LEGACY_AES_VER 1 /* BRCM IE legacy AES version */ + +/* brcm_ie flags */ +#define BRF_LZWDS 0x4 /* lazy wds enabled */ +#define BRF_BLOCKACK 0x8 /* BlockACK capable */ + +/* brcm_ie flags1 */ +#define BRF1_AMSDU 0x1 /* A-MSDU capable */ +#define BRF1_WMEPS 0x4 /* AP is capable of handling WME + PS w/o APSD */ +#define BRF1_PSOFIX 0x8 /* AP has fixed PS mode out-of-order packets */ +#define BRF1_RX_LARGE_AGG 0x10 /* device can rx large aggregates */ +#define BRF1_RFAWARE_DCS 0x20 /* RFAWARE dynamic channel selection (DCS) */ +#define BRF1_SOFTAP 0x40 /* Configure as Broadcom SOFTAP */ +#define BRF1_DWDS 0x80 /* DWDS capable */ + +/* Vendor IE structure */ +BWL_PRE_PACKED_STRUCT struct vndr_ie { + uchar id; + uchar len; + uchar oui [3]; + uchar data [1]; /* Variable size data */ +} BWL_POST_PACKED_STRUCT; +typedef struct vndr_ie vndr_ie_t; + +#define VNDR_IE_HDR_LEN 2 /* id + len field */ +#define VNDR_IE_MIN_LEN 3 /* size of the oui field */ +#define VNDR_IE_FIXED_LEN (VNDR_IE_HDR_LEN + VNDR_IE_MIN_LEN) + +#define VNDR_IE_MAX_LEN 255 /* vendor IE max length, without ID and len */ + +/* BRCM PROP DEVICE PRIMARY MAC ADDRESS IE */ +BWL_PRE_PACKED_STRUCT struct member_of_brcm_prop_ie { + uchar id; + uchar len; + uchar oui[3]; + uint8 type; /* type inidicates what follows */ + struct ether_addr ea; /* Device Primary MAC Adrress */ +} BWL_POST_PACKED_STRUCT; +typedef struct member_of_brcm_prop_ie member_of_brcm_prop_ie_t; + +#define MEMBER_OF_BRCM_PROP_IE_LEN 10 /* IE max length */ +#define MEMBER_OF_BRCM_PROP_IE_TYPE 54 /* XXX: used in prop IE 221 only */ + +/* BRCM Reliable Multicast IE */ +BWL_PRE_PACKED_STRUCT struct relmcast_brcm_prop_ie { + uchar id; + uchar len; + uchar oui[3]; + uint8 type; /* type inidicates what follows */ + struct ether_addr ea; /* The ack sender's MAC Adrress */ + struct ether_addr mcast_ea; /* The multicast MAC address */ + uint8 updtmo; /* time interval(second) for client to send null packet to report its rssi */ +} BWL_POST_PACKED_STRUCT; +typedef struct relmcast_brcm_prop_ie relmcast_brcm_prop_ie_t; + +#define RELMCAST_BRCM_PROP_IE_LEN (sizeof(relmcast_brcm_prop_ie_t)-2) /* IE length */ +#define RELMCAST_BRCM_PROP_IE_TYPE 55 /* XXX: used in prop IE 221 only */ + +/* ************* HT definitions. ************* */ +#define MCSSET_LEN 16 /* 16-bits per 8-bit set to give 128-bits bitmap of MCS Index */ +#define MAX_MCS_NUM (128) /* max mcs number = 128 */ + +BWL_PRE_PACKED_STRUCT struct ht_cap_ie { + uint16 cap; + uint8 params; + uint8 supp_mcs[MCSSET_LEN]; + uint16 ext_htcap; + uint32 txbf_cap; + uint8 as_cap; +} BWL_POST_PACKED_STRUCT; +typedef struct ht_cap_ie ht_cap_ie_t; + +BWL_PRE_PACKED_STRUCT struct dot11_ht_cap_ie { + uint8 id; + uint8 len; + ht_cap_ie_t ht_cap; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_ht_cap_ie dot11_ht_cap_ie_t; + +/* CAP IE: HT 1.0 spec. simply stole a 802.11 IE, we use our prop. IE until this is resolved */ +/* the capability IE is primarily used to convey this nodes abilities */ +BWL_PRE_PACKED_STRUCT struct ht_prop_cap_ie { + uint8 id; /* IE ID, 221, DOT11_MNG_PROPR_ID */ + uint8 len; /* IE length */ + uint8 oui[3]; /* Proprietary OUI, BRCM_PROP_OUI */ + uint8 type; /* type inidicates what follows */ + ht_cap_ie_t cap_ie; +} BWL_POST_PACKED_STRUCT; +typedef struct ht_prop_cap_ie ht_prop_cap_ie_t; + +#define HT_PROP_IE_OVERHEAD 4 /* overhead bytes for prop oui ie */ +#define HT_CAP_IE_LEN 26 /* HT capability len (based on .11n d2.0) */ +#define HT_CAP_IE_TYPE 51 /* XXX: used in prop IE 221 only */ + +#define HT_CAP_LDPC_CODING 0x0001 /* Support for rx of LDPC coded pkts */ +#define HT_CAP_40MHZ 0x0002 /* FALSE:20Mhz, TRUE:20/40MHZ supported */ +#define HT_CAP_MIMO_PS_MASK 0x000C /* Mimo PS mask */ +#define HT_CAP_MIMO_PS_SHIFT 0x0002 /* Mimo PS shift */ +#define HT_CAP_MIMO_PS_OFF 0x0003 /* Mimo PS, no restriction */ +#define HT_CAP_MIMO_PS_RTS 0x0001 /* Mimo PS, send RTS/CTS around MIMO frames */ +#define HT_CAP_MIMO_PS_ON 0x0000 /* Mimo PS, MIMO disallowed */ +#define HT_CAP_GF 0x0010 /* Greenfield preamble support */ +#define HT_CAP_SHORT_GI_20 0x0020 /* 20MHZ short guard interval support */ +#define HT_CAP_SHORT_GI_40 0x0040 /* 40Mhz short guard interval support */ +#define HT_CAP_TX_STBC 0x0080 /* Tx STBC support */ +#define HT_CAP_RX_STBC_MASK 0x0300 /* Rx STBC mask */ +#define HT_CAP_RX_STBC_SHIFT 8 /* Rx STBC shift */ +#define HT_CAP_DELAYED_BA 0x0400 /* delayed BA support */ +#define HT_CAP_MAX_AMSDU 0x0800 /* Max AMSDU size in bytes , 0=3839, 1=7935 */ + +#define HT_CAP_DSSS_CCK 0x1000 /* DSSS/CCK supported by the BSS */ +#define HT_CAP_PSMP 0x2000 /* Power Save Multi Poll support */ +#define HT_CAP_40MHZ_INTOLERANT 0x4000 /* 40MHz Intolerant */ +#define HT_CAP_LSIG_TXOP 0x8000 /* L-SIG TXOP protection support */ + +#define HT_CAP_RX_STBC_NO 0x0 /* no rx STBC support */ +#define HT_CAP_RX_STBC_ONE_STREAM 0x1 /* rx STBC support of 1 spatial stream */ +#define HT_CAP_RX_STBC_TWO_STREAM 0x2 /* rx STBC support of 1-2 spatial streams */ +#define HT_CAP_RX_STBC_THREE_STREAM 0x3 /* rx STBC support of 1-3 spatial streams */ + + +#define HT_CAP_TXBF_CAP_IMPLICIT_TXBF_RX 0x1 +#define HT_CAP_TXBF_CAP_NDP_TX 0x8 +#define HT_CAP_TXBF_CAP_NDP_RX 0x10 +#define HT_CAP_TXBF_CAP_EXPLICIT_CSI 0x100 +#define HT_CAP_TXBF_CAP_EXPLICIT_NC_STEERING 0x200 +#define HT_CAP_TXBF_CAP_EXPLICIT_C_STEERING 0x400 +#define HT_CAP_TXBF_CAP_EXPLICIT_CSI_FB_MASK 0x1800 +#define HT_CAP_TXBF_CAP_EXPLICIT_CSI_FB_SHIFT 11 +#define HT_CAP_TXBF_CAP_EXPLICIT_NC_FB_MASK 0x6000 +#define HT_CAP_TXBF_CAP_EXPLICIT_NC_FB_SHIFT 13 +#define HT_CAP_TXBF_CAP_EXPLICIT_C_FB_MASK 0x18000 +#define HT_CAP_TXBF_CAP_EXPLICIT_C_FB_SHIFT 15 +#define HT_CAP_TXBF_CAP_CSI_BFR_ANT_SHIFT 19 +#define HT_CAP_TXBF_CAP_NC_BFR_ANT_SHIFT 21 +#define HT_CAP_TXBF_CAP_C_BFR_ANT_SHIFT 23 +#define HT_CAP_TXBF_CAP_C_BFR_ANT_MASK 0x1800000 + +#define HT_CAP_TXBF_CAP_CHAN_ESTIM_SHIFT 27 +#define HT_CAP_TXBF_CAP_CHAN_ESTIM_MASK 0x18000000 + +#define HT_CAP_TXBF_FB_TYPE_NONE 0 +#define HT_CAP_TXBF_FB_TYPE_DELAYED 1 +#define HT_CAP_TXBF_FB_TYPE_IMMEDIATE 2 +#define HT_CAP_TXBF_FB_TYPE_BOTH 3 + +#define HT_CAP_TX_BF_CAP_EXPLICIT_CSI_FB_MASK 0x400 +#define HT_CAP_TX_BF_CAP_EXPLICIT_CSI_FB_SHIFT 10 +#define HT_CAP_TX_BF_CAP_EXPLICIT_COMPRESSED_FB_MASK 0x18000 +#define HT_CAP_TX_BF_CAP_EXPLICIT_COMPRESSED_FB_SHIFT 15 + +#define VHT_MAX_MPDU 11454 /* max mpdu size for now (bytes) */ +#define VHT_MPDU_MSDU_DELTA 56 /* Difference in spec - vht mpdu, amsdu len */ +/* Max AMSDU len - per spec */ +#define VHT_MAX_AMSDU (VHT_MAX_MPDU - VHT_MPDU_MSDU_DELTA) + +#define HT_MAX_AMSDU 7935 /* max amsdu size (bytes) per the HT spec */ +#define HT_MIN_AMSDU 3835 /* min amsdu size (bytes) per the HT spec */ + +#define HT_PARAMS_RX_FACTOR_MASK 0x03 /* ampdu rcv factor mask */ +#define HT_PARAMS_DENSITY_MASK 0x1C /* ampdu density mask */ +#define HT_PARAMS_DENSITY_SHIFT 2 /* ampdu density shift */ + +/* HT/AMPDU specific define */ +#define AMPDU_MAX_MPDU_DENSITY 7 /* max mpdu density; in 1/4 usec units */ +#define AMPDU_DENSITY_NONE 0 /* No density requirement */ +#define AMPDU_DENSITY_1over4_US 1 /* 1/4 us density */ +#define AMPDU_DENSITY_1over2_US 2 /* 1/2 us density */ +#define AMPDU_DENSITY_1_US 3 /* 1 us density */ +#define AMPDU_DENSITY_2_US 4 /* 2 us density */ +#define AMPDU_DENSITY_4_US 5 /* 4 us density */ +#define AMPDU_DENSITY_8_US 6 /* 8 us density */ +#define AMPDU_DENSITY_16_US 7 /* 16 us density */ +#define AMPDU_RX_FACTOR_8K 0 /* max rcv ampdu len (8kb) */ +#define AMPDU_RX_FACTOR_16K 1 /* max rcv ampdu len (16kb) */ +#define AMPDU_RX_FACTOR_32K 2 /* max rcv ampdu len (32kb) */ +#define AMPDU_RX_FACTOR_64K 3 /* max rcv ampdu len (64kb) */ +#define AMPDU_RX_FACTOR_BASE 8*1024 /* ampdu factor base for rx len */ + +#define AMPDU_DELIMITER_LEN 4 /* length of ampdu delimiter */ +#define AMPDU_DELIMITER_LEN_MAX 63 /* max length of ampdu delimiter(enforced in HW) */ + +#define HT_CAP_EXT_PCO 0x0001 +#define HT_CAP_EXT_PCO_TTIME_MASK 0x0006 +#define HT_CAP_EXT_PCO_TTIME_SHIFT 1 +#define HT_CAP_EXT_MCS_FEEDBACK_MASK 0x0300 +#define HT_CAP_EXT_MCS_FEEDBACK_SHIFT 8 +#define HT_CAP_EXT_HTC 0x0400 +#define HT_CAP_EXT_RD_RESP 0x0800 + +BWL_PRE_PACKED_STRUCT struct ht_add_ie { + uint8 ctl_ch; /* control channel number */ + uint8 byte1; /* ext ch,rec. ch. width, RIFS support */ + uint16 opmode; /* operation mode */ + uint16 misc_bits; /* misc bits */ + uint8 basic_mcs[MCSSET_LEN]; /* required MCS set */ +} BWL_POST_PACKED_STRUCT; +typedef struct ht_add_ie ht_add_ie_t; + +/* ADD IE: HT 1.0 spec. simply stole a 802.11 IE, we use our prop. IE until this is resolved */ +/* the additional IE is primarily used to convey the current BSS configuration */ +BWL_PRE_PACKED_STRUCT struct ht_prop_add_ie { + uint8 id; /* IE ID, 221, DOT11_MNG_PROPR_ID */ + uint8 len; /* IE length */ + uint8 oui[3]; /* Proprietary OUI, BRCM_PROP_OUI */ + uint8 type; /* indicates what follows */ + ht_add_ie_t add_ie; +} BWL_POST_PACKED_STRUCT; +typedef struct ht_prop_add_ie ht_prop_add_ie_t; + +#define HT_ADD_IE_LEN 22 /* XXX: HT capability len (based on .11n d1.0) */ +#define HT_ADD_IE_TYPE 52 /* XXX: faked out as current spec is illegal */ + +/* byte1 defn's */ +#define HT_BW_ANY 0x04 /* set, STA can use 20 or 40MHz */ +#define HT_RIFS_PERMITTED 0x08 /* RIFS allowed */ + +/* opmode defn's */ +#define HT_OPMODE_MASK 0x0003 /* protection mode mask */ +#define HT_OPMODE_SHIFT 0 /* protection mode shift */ +#define HT_OPMODE_PURE 0x0000 /* protection mode PURE */ +#define HT_OPMODE_OPTIONAL 0x0001 /* protection mode optional */ +#define HT_OPMODE_HT20IN40 0x0002 /* protection mode 20MHz HT in 40MHz BSS */ +#define HT_OPMODE_MIXED 0x0003 /* protection mode Mixed Mode */ +#define HT_OPMODE_NONGF 0x0004 /* protection mode non-GF */ +#define DOT11N_TXBURST 0x0008 /* Tx burst limit */ +#define DOT11N_OBSS_NONHT 0x0010 /* OBSS Non-HT STA present */ + +/* misc_bites defn's */ +#define HT_BASIC_STBC_MCS 0x007f /* basic STBC MCS */ +#define HT_DUAL_STBC_PROT 0x0080 /* Dual STBC Protection */ +#define HT_SECOND_BCN 0x0100 /* Secondary beacon support */ +#define HT_LSIG_TXOP 0x0200 /* L-SIG TXOP Protection full support */ +#define HT_PCO_ACTIVE 0x0400 /* PCO active */ +#define HT_PCO_PHASE 0x0800 /* PCO phase */ +#define HT_DUALCTS_PROTECTION 0x0080 /* DUAL CTS protection needed */ + +/* Tx Burst Limits */ +#define DOT11N_2G_TXBURST_LIMIT 6160 /* 2G band Tx burst limit per 802.11n Draft 1.10 (usec) */ +#define DOT11N_5G_TXBURST_LIMIT 3080 /* 5G band Tx burst limit per 802.11n Draft 1.10 (usec) */ + +/* Macros for opmode */ +#define GET_HT_OPMODE(add_ie) ((ltoh16_ua(&add_ie->opmode) & HT_OPMODE_MASK) \ + >> HT_OPMODE_SHIFT) +#define HT_MIXEDMODE_PRESENT(add_ie) ((ltoh16_ua(&add_ie->opmode) & HT_OPMODE_MASK) \ + == HT_OPMODE_MIXED) /* mixed mode present */ +#define HT_HT20_PRESENT(add_ie) ((ltoh16_ua(&add_ie->opmode) & HT_OPMODE_MASK) \ + == HT_OPMODE_HT20IN40) /* 20MHz HT present */ +#define HT_OPTIONAL_PRESENT(add_ie) ((ltoh16_ua(&add_ie->opmode) & HT_OPMODE_MASK) \ + == HT_OPMODE_OPTIONAL) /* Optional protection present */ +#define HT_USE_PROTECTION(add_ie) (HT_HT20_PRESENT((add_ie)) || \ + HT_MIXEDMODE_PRESENT((add_ie))) /* use protection */ +#define HT_NONGF_PRESENT(add_ie) ((ltoh16_ua(&add_ie->opmode) & HT_OPMODE_NONGF) \ + == HT_OPMODE_NONGF) /* non-GF present */ +#define DOT11N_TXBURST_PRESENT(add_ie) ((ltoh16_ua(&add_ie->opmode) & DOT11N_TXBURST) \ + == DOT11N_TXBURST) /* Tx Burst present */ +#define DOT11N_OBSS_NONHT_PRESENT(add_ie) ((ltoh16_ua(&add_ie->opmode) & DOT11N_OBSS_NONHT) \ + == DOT11N_OBSS_NONHT) /* OBSS Non-HT present */ + +BWL_PRE_PACKED_STRUCT struct obss_params { + uint16 passive_dwell; + uint16 active_dwell; + uint16 bss_widthscan_interval; + uint16 passive_total; + uint16 active_total; + uint16 chanwidth_transition_dly; + uint16 activity_threshold; +} BWL_POST_PACKED_STRUCT; +typedef struct obss_params obss_params_t; + +BWL_PRE_PACKED_STRUCT struct dot11_obss_ie { + uint8 id; + uint8 len; + obss_params_t obss_params; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_obss_ie dot11_obss_ie_t; +#define DOT11_OBSS_SCAN_IE_LEN sizeof(obss_params_t) /* HT OBSS len (based on 802.11n d3.0) */ + +/* HT control field */ +#define HT_CTRL_LA_TRQ 0x00000002 /* sounding request */ +#define HT_CTRL_LA_MAI 0x0000003C /* MCS request or antenna selection indication */ +#define HT_CTRL_LA_MAI_SHIFT 2 +#define HT_CTRL_LA_MAI_MRQ 0x00000004 /* MCS request */ +#define HT_CTRL_LA_MAI_MSI 0x00000038 /* MCS request sequence identifier */ +#define HT_CTRL_LA_MFSI 0x000001C0 /* MFB sequence identifier */ +#define HT_CTRL_LA_MFSI_SHIFT 6 +#define HT_CTRL_LA_MFB_ASELC 0x0000FE00 /* MCS feedback, antenna selection command/data */ +#define HT_CTRL_LA_MFB_ASELC_SH 9 +#define HT_CTRL_LA_ASELC_CMD 0x00000C00 /* ASEL command */ +#define HT_CTRL_LA_ASELC_DATA 0x0000F000 /* ASEL data */ +#define HT_CTRL_CAL_POS 0x00030000 /* Calibration position */ +#define HT_CTRL_CAL_SEQ 0x000C0000 /* Calibration sequence */ +#define HT_CTRL_CSI_STEERING 0x00C00000 /* CSI/Steering */ +#define HT_CTRL_CSI_STEER_SHIFT 22 +#define HT_CTRL_CSI_STEER_NFB 0 /* no fedback required */ +#define HT_CTRL_CSI_STEER_CSI 1 /* CSI, H matrix */ +#define HT_CTRL_CSI_STEER_NCOM 2 /* non-compressed beamforming */ +#define HT_CTRL_CSI_STEER_COM 3 /* compressed beamforming */ +#define HT_CTRL_NDP_ANNOUNCE 0x01000000 /* NDP announcement */ +#define HT_CTRL_AC_CONSTRAINT 0x40000000 /* AC Constraint */ +#define HT_CTRL_RDG_MOREPPDU 0x80000000 /* RDG/More PPDU */ + +#define HT_OPMODE_OPTIONAL 0x0001 /* protection mode optional */ +#define HT_OPMODE_HT20IN40 0x0002 /* protection mode 20MHz HT in 40MHz BSS */ +#define HT_OPMODE_MIXED 0x0003 /* protection mode Mixed Mode */ +#define HT_OPMODE_NONGF 0x0004 /* protection mode non-GF */ +#define DOT11N_TXBURST 0x0008 /* Tx burst limit */ +#define DOT11N_OBSS_NONHT 0x0010 /* OBSS Non-HT STA present */ + +/* ************* VHT definitions. ************* */ + +/* + * VHT Capabilites IE (sec 8.4.2.160) + */ + +BWL_PRE_PACKED_STRUCT struct vht_cap_ie { + uint32 vht_cap_info; + /* supported MCS set - 64 bit field */ + uint16 rx_mcs_map; + uint16 rx_max_rate; + uint16 tx_mcs_map; + uint16 tx_max_rate; +} BWL_POST_PACKED_STRUCT; +typedef struct vht_cap_ie vht_cap_ie_t; + +/* 4B cap_info + 8B supp_mcs */ +#define VHT_CAP_IE_LEN 12 + +/* VHT Capabilities Info field - 32bit - in VHT Cap IE */ +#define VHT_CAP_INFO_MAX_MPDU_LEN_MASK 0x00000003 +#define VHT_CAP_INFO_SUPP_CHAN_WIDTH_MASK 0x0000000c +#define VHT_CAP_INFO_LDPC 0x00000010 +#define VHT_CAP_INFO_SGI_80MHZ 0x00000020 +#define VHT_CAP_INFO_SGI_160MHZ 0x00000040 +#define VHT_CAP_INFO_TX_STBC 0x00000080 +#define VHT_CAP_INFO_RX_STBC_MASK 0x00000700 +#define VHT_CAP_INFO_RX_STBC_SHIFT 8 +#define VHT_CAP_INFO_SU_BEAMFMR 0x00000800 +#define VHT_CAP_INFO_SU_BEAMFMEE 0x00001000 +#define VHT_CAP_INFO_NUM_BMFMR_ANT_MASK 0x0000e000 +#define VHT_CAP_INFO_NUM_BMFMR_ANT_SHIFT 13 +#define VHT_CAP_INFO_NUM_SOUNDING_DIM_MASK 0x00070000 +#define VHT_CAP_INFO_NUM_SOUNDING_DIM_SHIFT 16 +#define VHT_CAP_INFO_MU_BEAMFMR 0x00080000 +#define VHT_CAP_INFO_MU_BEAMFMEE 0x00100000 +#define VHT_CAP_INFO_TXOPPS 0x00200000 +#define VHT_CAP_INFO_HTCVHT 0x00400000 +#define VHT_CAP_INFO_AMPDU_MAXLEN_EXP_MASK 0x03800000 +#define VHT_CAP_INFO_AMPDU_MAXLEN_EXP_SHIFT 23 +#define VHT_CAP_INFO_LINK_ADAPT_CAP_MASK 0x0c000000 +#define VHT_CAP_INFO_LINK_ADAPT_CAP_SHIFT 26 + +/* VHT Supported MCS Set - 64-bit - in VHT Cap IE */ +#define VHT_CAP_SUPP_MCS_RX_HIGHEST_RATE_MASK 0x1fff +#define VHT_CAP_SUPP_MCS_RX_HIGHEST_RATE_SHIFT 0 + +#define VHT_CAP_SUPP_MCS_TX_HIGHEST_RATE_MASK 0x1fff +#define VHT_CAP_SUPP_MCS_TX_HIGHEST_RATE_SHIFT 0 + +#define VHT_CAP_MCS_MAP_0_7 0 +#define VHT_CAP_MCS_MAP_0_8 1 +#define VHT_CAP_MCS_MAP_0_9 2 +#define VHT_CAP_MCS_MAP_NONE 3 +#define VHT_CAP_MCS_MAP_S 2 /* num bits for 1-stream */ +#define VHT_CAP_MCS_MAP_M 0x3 /* mask for 1-stream */ +/* assumes VHT_CAP_MCS_MAP_NONE is 3 and 2 bits are used for encoding */ +#define VHT_CAP_MCS_MAP_NONE_ALL 0xffff +/* mcsmap with MCS0-9 for Nss = 3 */ +#define VHT_CAP_MCS_MAP_0_9_NSS3 \ + ((VHT_CAP_MCS_MAP_0_9 << VHT_MCS_MAP_GET_SS_IDX(1)) | \ + (VHT_CAP_MCS_MAP_0_9 << VHT_MCS_MAP_GET_SS_IDX(2)) | \ + (VHT_CAP_MCS_MAP_0_9 << VHT_MCS_MAP_GET_SS_IDX(3))) + +#define VHT_CAP_MCS_MAP_NSS_MAX 8 + +/* get mcsmap with given mcs for given nss streams */ +#define VHT_CAP_MCS_MAP_CREATE(mcsmap, nss, mcs) \ + do { \ + int i; \ + for (i = 1; i <= nss; i++) { \ + VHT_MCS_MAP_SET_MCS_PER_SS(i, mcs, mcsmap); \ + } \ + } while (0) + +/* Map the mcs code to mcs bit map */ +#define VHT_MCS_CODE_TO_MCS_MAP(mcs_code) \ + ((mcs_code == VHT_CAP_MCS_MAP_0_7) ? 0xff : \ + (mcs_code == VHT_CAP_MCS_MAP_0_8) ? 0x1ff : \ + (mcs_code == VHT_CAP_MCS_MAP_0_9) ? 0x3ff : 0) + +/* Map the mcs bit map to mcs code */ +#define VHT_MCS_MAP_TO_MCS_CODE(mcs_map) \ + ((mcs_map == 0xff) ? VHT_CAP_MCS_MAP_0_7 : \ + (mcs_map == 0x1ff) ? VHT_CAP_MCS_MAP_0_8 : \ + (mcs_map == 0x3ff) ? VHT_CAP_MCS_MAP_0_9 : VHT_CAP_MCS_MAP_NONE) + +/* VHT Capabilities Supported Channel Width */ +typedef enum vht_cap_chan_width { + VHT_CAP_CHAN_WIDTH_SUPPORT_MANDATORY = 0x00, + VHT_CAP_CHAN_WIDTH_SUPPORT_160 = 0x04, + VHT_CAP_CHAN_WIDTH_SUPPORT_160_8080 = 0x08 +} vht_cap_chan_width_t; + +/* VHT Capabilities Supported max MPDU LEN (sec 8.4.2.160.2) */ +typedef enum vht_cap_max_mpdu_len { + VHT_CAP_MPDU_MAX_4K = 0x00, + VHT_CAP_MPDU_MAX_8K = 0x01, + VHT_CAP_MPDU_MAX_11K = 0x02 +} vht_cap_max_mpdu_len_t; + +/* Maximum MPDU Length byte counts for the VHT Capabilities advertised limits */ +#define VHT_MPDU_LIMIT_4K 3895 +#define VHT_MPDU_LIMIT_8K 7991 +#define VHT_MPDU_LIMIT_11K 11454 + + +/* + * VHT Operation IE (sec 8.4.2.161) + */ + +BWL_PRE_PACKED_STRUCT struct vht_op_ie { + uint8 chan_width; + uint8 chan1; + uint8 chan2; + uint16 supp_mcs; /* same def as above in vht cap */ +} BWL_POST_PACKED_STRUCT; +typedef struct vht_op_ie vht_op_ie_t; + +/* 3B VHT Op info + 2B Basic MCS */ +#define VHT_OP_IE_LEN 5 + +typedef enum vht_op_chan_width { + VHT_OP_CHAN_WIDTH_20_40 = 0, + VHT_OP_CHAN_WIDTH_80 = 1, + VHT_OP_CHAN_WIDTH_160 = 2, + VHT_OP_CHAN_WIDTH_80_80 = 3 +} vht_op_chan_width_t; + +/* AID length */ +#define AID_IE_LEN 2 +/* + * BRCM vht features IE header + * The header if the fixed part of the IE + * On the 5GHz band this is the entire IE, + * on 2.4GHz the VHT IEs as defined in the 802.11ac + * specification follows + * + * + * VHT features rates bitmap. + * Bit0: 5G MCS 0-9 BW 160MHz + * Bit1: 5G MCS 0-9 support BW 80MHz + * Bit2: 5G MCS 0-9 support BW 20MHz + * Bit3: 2.4G MCS 0-9 support BW 20MHz + * Bits:4-7 Reserved for future use + * + */ +#define VHT_FEATURES_IE_TYPE 0x4 +BWL_PRE_PACKED_STRUCT struct vht_features_ie_hdr { + uint8 oui[3]; /* Proprietary OUI, BRCM_PROP_OUI */ + uint8 type; /* type of this IE = 4 */ + uint8 rate_mask; /* VHT rate mask */ +} BWL_POST_PACKED_STRUCT; +typedef struct vht_features_ie_hdr vht_features_ie_hdr_t; + +/* Def for rx & tx basic mcs maps - ea ss num has 2 bits of info */ +#define VHT_MCS_MAP_GET_SS_IDX(nss) (((nss)-1) * VHT_CAP_MCS_MAP_S) +#define VHT_MCS_MAP_GET_MCS_PER_SS(nss, mcsMap) \ + (((mcsMap) >> VHT_MCS_MAP_GET_SS_IDX(nss)) & VHT_CAP_MCS_MAP_M) +#define VHT_MCS_MAP_SET_MCS_PER_SS(nss, numMcs, mcsMap) \ + do { \ + (mcsMap) &= (~(VHT_CAP_MCS_MAP_M << VHT_MCS_MAP_GET_SS_IDX(nss))); \ + (mcsMap) |= (((numMcs) & VHT_CAP_MCS_MAP_M) << VHT_MCS_MAP_GET_SS_IDX(nss)); \ + } while (0) +#define VHT_MCS_SS_SUPPORTED(nss, mcsMap) \ + (VHT_MCS_MAP_GET_MCS_PER_SS((nss), (mcsMap)) != VHT_CAP_MCS_MAP_NONE) + + +/* ************* WPA definitions. ************* */ +#define WPA_OUI "\x00\x50\xF2" /* WPA OUI */ +#define WPA_OUI_LEN 3 /* WPA OUI length */ +#define WPA_OUI_TYPE 1 +#define WPA_VERSION 1 /* WPA version */ +#define WPA2_OUI "\x00\x0F\xAC" /* WPA2 OUI */ +#define WPA2_OUI_LEN 3 /* WPA2 OUI length */ +#define WPA2_VERSION 1 /* WPA2 version */ +#define WPA2_VERSION_LEN 2 /* WAP2 version length */ + +/* ************* WPS definitions. ************* */ +#define WPS_OUI "\x00\x50\xF2" /* WPS OUI */ +#define WPS_OUI_LEN 3 /* WPS OUI length */ +#define WPS_OUI_TYPE 4 + +/* ************* WFA definitions. ************* */ +#if defined(MACOSX) +#define MAC_OUI "\x00\x17\xF2" /* MACOSX OUI */ +#define MAC_OUI_TYPE_P2P 5 +#endif /* MACOSX */ + +#if defined(MACOSX) && !defined(WLP2P_NEW_WFA_OUI) +#define WFA_OUI WPS_OUI /* WFA OUI */ +#else +#ifdef P2P_IE_OVRD +#define WFA_OUI MAC_OUI +#else +#define WFA_OUI "\x50\x6F\x9A" /* WFA OUI */ +#endif /* P2P_IE_OVRD */ +#endif /* MACOSX && !WLP2P_NEW_WFA_OUI */ +#define WFA_OUI_LEN 3 /* WFA OUI length */ +#ifdef P2P_IE_OVRD +#define WFA_OUI_TYPE_P2P MAC_OUI_TYPE_P2P +#else +#define WFA_OUI_TYPE_TPC 8 +#define WFA_OUI_TYPE_P2P 9 +#endif + +#define WFA_OUI_TYPE_TPC 8 +#ifdef WLTDLS +#define WFA_OUI_TYPE_TPQ 4 /* WFD Tunneled Probe ReQuest */ +#define WFA_OUI_TYPE_TPS 5 /* WFD Tunneled Probe ReSponse */ +#define WFA_OUI_TYPE_WFD 10 +#endif /* WTDLS */ +#define WFA_OUI_TYPE_HS20 0x10 + +/* RSN authenticated key managment suite */ +#define RSN_AKM_NONE 0 /* None (IBSS) */ +#define RSN_AKM_UNSPECIFIED 1 /* Over 802.1x */ +#define RSN_AKM_PSK 2 /* Pre-shared Key */ +#define RSN_AKM_FBT_1X 3 /* Fast Bss transition using 802.1X */ +#define RSN_AKM_FBT_PSK 4 /* Fast Bss transition using Pre-shared Key */ +#define RSN_AKM_MFP_1X 5 /* SHA256 key derivation, using 802.1X */ +#define RSN_AKM_MFP_PSK 6 /* SHA256 key derivation, using Pre-shared Key */ +#define RSN_AKM_TPK 7 /* TPK(TDLS Peer Key) handshake */ + +/* Key related defines */ +#define DOT11_MAX_DEFAULT_KEYS 4 /* number of default keys */ +#define DOT11_MAX_KEY_SIZE 32 /* max size of any key */ +#define DOT11_MAX_IV_SIZE 16 /* max size of any IV */ +#define DOT11_EXT_IV_FLAG (1<<5) /* flag to indicate IV is > 4 bytes */ +#define DOT11_WPA_KEY_RSC_LEN 8 /* WPA RSC key len */ + +#define WEP1_KEY_SIZE 5 /* max size of any WEP key */ +#define WEP1_KEY_HEX_SIZE 10 /* size of WEP key in hex. */ +#define WEP128_KEY_SIZE 13 /* max size of any WEP key */ +#define WEP128_KEY_HEX_SIZE 26 /* size of WEP key in hex. */ +#define TKIP_MIC_SIZE 8 /* size of TKIP MIC */ +#define TKIP_EOM_SIZE 7 /* max size of TKIP EOM */ +#define TKIP_EOM_FLAG 0x5a /* TKIP EOM flag byte */ +#define TKIP_KEY_SIZE 32 /* size of any TKIP key */ +#define TKIP_MIC_AUTH_TX 16 /* offset to Authenticator MIC TX key */ +#define TKIP_MIC_AUTH_RX 24 /* offset to Authenticator MIC RX key */ +#define TKIP_MIC_SUP_RX TKIP_MIC_AUTH_TX /* offset to Supplicant MIC RX key */ +#define TKIP_MIC_SUP_TX TKIP_MIC_AUTH_RX /* offset to Supplicant MIC TX key */ +#define AES_KEY_SIZE 16 /* size of AES key */ +#define AES_MIC_SIZE 8 /* size of AES MIC */ +#define BIP_KEY_SIZE 16 /* size of BIP key */ +#define BIP_MIC_SIZE 8 /* sizeof BIP MIC */ + +/* WCN */ +#define WCN_OUI "\x00\x50\xf2" /* WCN OUI */ +#define WCN_TYPE 4 /* WCN type */ + +#ifdef BCMWAPI_WPI +#define SMS4_KEY_LEN 16 +#define SMS4_WPI_CBC_MAC_LEN 16 +#endif + +/* 802.11r protocol definitions */ + +/* Mobility Domain IE */ +BWL_PRE_PACKED_STRUCT struct dot11_mdid_ie { + uint8 id; + uint8 len; + uint16 mdid; /* Mobility Domain Id */ + uint8 cap; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_mdid_ie dot11_mdid_ie_t; + +#define FBT_MDID_CAP_OVERDS 0x01 /* Fast Bss transition over the DS support */ +#define FBT_MDID_CAP_RRP 0x02 /* Resource request protocol support */ + +/* Fast Bss Transition IE */ +BWL_PRE_PACKED_STRUCT struct dot11_ft_ie { + uint8 id; + uint8 len; + uint16 mic_control; /* Mic Control */ + uint8 mic[16]; + uint8 anonce[32]; + uint8 snonce[32]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_ft_ie dot11_ft_ie_t; + +#define TIE_TYPE_RESERVED 0 +#define TIE_TYPE_REASSOC_DEADLINE 1 +#define TIE_TYPE_KEY_LIEFTIME 2 +#define TIE_TYPE_ASSOC_COMEBACK 3 +BWL_PRE_PACKED_STRUCT struct dot11_timeout_ie { + uint8 id; + uint8 len; + uint8 type; /* timeout interval type */ + uint32 value; /* timeout interval value */ +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_timeout_ie dot11_timeout_ie_t; + +/* GTK ie */ +BWL_PRE_PACKED_STRUCT struct dot11_gtk_ie { + uint8 id; + uint8 len; + uint16 key_info; + uint8 key_len; + uint8 rsc[8]; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT; +typedef struct dot11_gtk_ie dot11_gtk_ie_t; + +/* Management MIC ie */ +BWL_PRE_PACKED_STRUCT struct mmic_ie { + uint8 id; /* IE ID: 0xDD */ + uint8 len; /* IE length */ + uint16 key_id; /* key id */ + uint8 ipn[6]; /* ipn */ + uint8 mic[BIP_MIC_SIZE]; /* mic */ +} BWL_POST_PACKED_STRUCT; +typedef struct mmic_ie mmic_ie_t; + +#define BSSID_INVALID "\x00\x00\x00\x00\x00\x00" +#define BSSID_BROADCAST "\xFF\xFF\xFF\xFF\xFF\xFF" + +#ifdef BCMWAPI_WAI +#define WAPI_IE_MIN_LEN 20 /* WAPI IE min length */ +#define WAPI_VERSION 1 /* WAPI version */ +#define WAPI_VERSION_LEN 2 /* WAPI version length */ +#define WAPI_OUI "\x00\x14\x72" /* WAPI OUI */ +#define WAPI_OUI_LEN DOT11_OUI_LEN /* WAPI OUI length */ +#endif /* BCMWAPI_WAI */ + +/* ************* WMM Parameter definitions. ************* */ +#define WMM_OUI "\x00\x50\xF2" /* WNN OUI */ +#define WMM_OUI_LEN 3 /* WMM OUI length */ +#define WMM_OUI_TYPE 2 /* WMM OUT type */ +#define WMM_VERSION 1 +#define WMM_VERSION_LEN 1 + +/* WMM OUI subtype */ +#define WMM_OUI_SUBTYPE_PARAMETER 1 +#define WMM_PARAMETER_IE_LEN 24 + +/* Link Identifier Element */ +BWL_PRE_PACKED_STRUCT struct link_id_ie { + uint8 id; + uint8 len; + struct ether_addr bssid; + struct ether_addr tdls_init_mac; + struct ether_addr tdls_resp_mac; +} BWL_POST_PACKED_STRUCT; +typedef struct link_id_ie link_id_ie_t; +#define TDLS_LINK_ID_IE_LEN 18 + +/* Link Wakeup Schedule Element */ +BWL_PRE_PACKED_STRUCT struct wakeup_sch_ie { + uint8 id; + uint8 len; + uint32 offset; /* in ms between TSF0 and start of 1st Awake Window */ + uint32 interval; /* in ms bwtween the start of 2 Awake Windows */ + uint32 awake_win_slots; /* in backof slots, duration of Awake Window */ + uint32 max_wake_win; /* in ms, max duration of Awake Window */ + uint16 idle_cnt; /* number of consecutive Awake Windows */ +} BWL_POST_PACKED_STRUCT; +typedef struct wakeup_sch_ie wakeup_sch_ie_t; +#define TDLS_WAKEUP_SCH_IE_LEN 18 + +/* Channel Switch Timing Element */ +BWL_PRE_PACKED_STRUCT struct channel_switch_timing_ie { + uint8 id; + uint8 len; + uint16 switch_time; /* in ms, time to switch channels */ + uint16 switch_timeout; /* in ms */ +} BWL_POST_PACKED_STRUCT; +typedef struct channel_switch_timing_ie channel_switch_timing_ie_t; +#define TDLS_CHANNEL_SWITCH_TIMING_IE_LEN 4 + +/* PTI Control Element */ +BWL_PRE_PACKED_STRUCT struct pti_control_ie { + uint8 id; + uint8 len; + uint8 tid; + uint16 seq_control; +} BWL_POST_PACKED_STRUCT; +typedef struct pti_control_ie pti_control_ie_t; +#define TDLS_PTI_CONTROL_IE_LEN 3 + +/* PU Buffer Status Element */ +BWL_PRE_PACKED_STRUCT struct pu_buffer_status_ie { + uint8 id; + uint8 len; + uint8 status; +} BWL_POST_PACKED_STRUCT; +typedef struct pu_buffer_status_ie pu_buffer_status_ie_t; +#define TDLS_PU_BUFFER_STATUS_IE_LEN 1 +#define TDLS_PU_BUFFER_STATUS_AC_BK 1 +#define TDLS_PU_BUFFER_STATUS_AC_BE 2 +#define TDLS_PU_BUFFER_STATUS_AC_VI 4 +#define TDLS_PU_BUFFER_STATUS_AC_VO 8 + +/* 802.11u GAS action frames */ +#define GAS_REQUEST_ACTION_FRAME 10 +#define GAS_RESPONSE_ACTION_FRAME 11 +#define GAS_COMEBACK_REQUEST_ACTION_FRAME 12 +#define GAS_COMEBACK_RESPONSE_ACTION_FRAME 13 + +/* 802.11u interworking access network options */ +#define IW_ANT_MASK 0x0f +#define IW_INTERNET_MASK 0x10 +#define IW_ASRA_MASK 0x20 +#define IW_ESR_MASK 0x40 +#define IW_UESA_MASK 0x80 + +/* 802.11u interworking access network type */ +#define IW_ANT_PRIVATE_NETWORK 0 +#define IW_ANT_PRIVATE_NETWORK_WITH_GUEST 1 +#define IW_ANT_CHARGEABLE_PUBLIC_NETWORK 2 +#define IW_ANT_FREE_PUBLIC_NETWORK 3 +#define IW_ANT_PERSONAL_DEVICE_NETWORK 4 +#define IW_ANT_EMERGENCY_SERVICES_NETWORK 5 +#define IW_ANT_TEST_NETWORK 14 +#define IW_ANT_WILDCARD_NETWORK 15 + +/* 802.11u advertisement protocol */ +#define ADVP_ANQP_PROTOCOL_ID 0 + +/* 802.11u advertisement protocol masks */ +#define ADVP_QRL_MASK 0x7f +#define ADVP_PAME_BI_MASK 0x80 + +/* 802.11u advertisement protocol values */ +#define ADVP_QRL_REQUEST 0x00 +#define ADVP_QRL_RESPONSE 0x7f +#define ADVP_PAME_BI_DEPENDENT 0x00 +#define ADVP_PAME_BI_INDEPENDENT ADVP_PAME_BI_MASK + +/* 802.11u ANQP information ID */ +#define ANQP_ID_QUERY_LIST 256 +#define ANQP_ID_CAPABILITY_LIST 257 +#define ANQP_ID_VENUE_NAME_INFO 258 +#define ANQP_ID_EMERGENCY_CALL_NUMBER_INFO 259 +#define ANQP_ID_NETWORK_AUTHENTICATION_TYPE_INFO 260 +#define ANQP_ID_ROAMING_CONSORTIUM_LIST 261 +#define ANQP_ID_IP_ADDRESS_TYPE_AVAILABILITY_INFO 262 +#define ANQP_ID_NAI_REALM_LIST 263 +#define ANQP_ID_G3PP_CELLULAR_NETWORK_INFO 264 +#define ANQP_ID_AP_GEOSPATIAL_LOCATION 265 +#define ANQP_ID_AP_CIVIC_LOCATION 266 +#define ANQP_ID_AP_LOCATION_PUBLIC_ID_URI 267 +#define ANQP_ID_DOMAIN_NAME_LIST 268 +#define ANQP_ID_EMERGENCY_ALERT_ID_URI 269 +#define ANQP_ID_EMERGENCY_NAI 271 +#define ANQP_ID_VENDOR_SPECIFIC_LIST 56797 + +/* 802.11u ANQP OUI */ +#define ANQP_OUI_SUBTYPE 9 + +/* 802.11u venue name */ +#define VENUE_LANGUAGE_CODE_SIZE 3 +#define VENUE_NAME_SIZE 255 + +/* 802.11u venue groups */ +#define VENUE_UNSPECIFIED 0 +#define VENUE_ASSEMBLY 1 +#define VENUE_BUSINESS 2 +#define VENUE_EDUCATIONAL 3 +#define VENUE_FACTORY 4 +#define VENUE_INSTITUTIONAL 5 +#define VENUE_MERCANTILE 6 +#define VENUE_RESIDENTIAL 7 +#define VENUE_STORAGE 8 +#define VENUE_UTILITY 9 +#define VENUE_VEHICULAR 10 +#define VENUE_OUTDOOR 11 + +/* 802.11u network authentication type indicator */ +#define NATI_ACCEPTANCE_OF_TERMS_CONDITIONS 0 +#define NATI_ONLINE_ENROLLMENT_SUPPORTED 1 +#define NATI_HTTP_HTTPS_REDIRECTION 2 +#define NATI_DNS_REDIRECTION 3 + +/* 802.11u IP address type availability - IPv6 */ +#define IPA_IPV6_SHIFT 0 +#define IPA_IPV6_MASK (0x03 << IPA_IPV6_SHIFT) +#define IPA_IPV6_NOT_AVAILABLE 0x00 +#define IPA_IPV6_AVAILABLE 0x01 +#define IPA_IPV6_UNKNOWN_AVAILABILITY 0x02 + +/* 802.11u IP address type availability - IPv4 */ +#define IPA_IPV4_SHIFT 2 +#define IPA_IPV4_MASK (0x3f << IPA_IPV4_SHIFT) +#define IPA_IPV4_NOT_AVAILABLE 0x00 +#define IPA_IPV4_PUBLIC 0x01 +#define IPA_IPV4_PORT_RESTRICT 0x02 +#define IPA_IPV4_SINGLE_NAT 0x03 +#define IPA_IPV4_DOUBLE_NAT 0x04 +#define IPA_IPV4_PORT_RESTRICT_SINGLE_NAT 0x05 +#define IPA_IPV4_PORT_RESTRICT_DOUBLE_NAT 0x06 +#define IPA_IPV4_UNKNOWN_AVAILABILITY 0x07 + +/* 802.11u NAI realm encoding */ +#define REALM_ENCODING_RFC4282 0 +#define REALM_ENCODING_UTF8 1 + +/* 802.11u IANA EAP method type numbers */ +#define REALM_EAP_TLS 13 +#define REALM_EAP_SIM 18 +#define REALM_EAP_TTLS 21 +#define REALM_EAP_AKA 23 +#define REALM_EAP_PSK 47 +#define REALM_EAP_AKAP 50 + +/* 802.11u authentication ID */ +#define REALM_EXPANDED_EAP 1 +#define REALM_NON_EAP_INNER_AUTHENTICATION 2 +#define REALM_INNER_AUTHENTICATION_EAP 3 +#define REALM_EXPANDED_INNER_EAP 4 +#define REALM_CREDENTIAL 5 +#define REALM_TUNNELED_EAP_CREDENTIAL 6 +#define REALM_VENDOR_SPECIFIC_EAP 221 + +/* 802.11u non-EAP inner authentication type */ +#define REALM_PAP 1 +#define REALM_CHAP 2 +#define REALM_MSCHAP 3 +#define REALM_MSCHAPV2 4 + +/* 802.11u credential type */ +#define REALM_SIM 1 +#define REALM_USIM 2 +#define REALM_NFC 3 +#define REALM_HARDWARE_TOKEN 4 +#define REALM_SOFTOKEN 5 +#define REALM_CERTIFICATE 6 +#define REALM_USERNAME_PASSWORD 7 +#define REALM_SERVER_SIDE 8 + +/* 802.11u 3GPP PLMN */ +#define G3PP_GUD_VERSION 0 +#define G3PP_PLMN_LIST_IE 0 + +/* hotspot2.0 indication element (vendor specific) */ +BWL_PRE_PACKED_STRUCT struct hs20_ie { + uint8 oui[3]; + uint8 type; + uint8 config; +} BWL_POST_PACKED_STRUCT; +typedef struct hs20_ie hs20_ie_t; +#define HS20_IE_LEN 5 /* HS20 IE length */ + +/* This marks the end of a packed structure section. */ +#include + +#endif /* _802_11_H_ */ diff --git a/external/cache/sources/wl/include/proto/802.11_bta.h b/external/cache/sources/wl/include/proto/802.11_bta.h new file mode 100644 index 0000000..30986a1 --- /dev/null +++ b/external/cache/sources/wl/include/proto/802.11_bta.h @@ -0,0 +1,27 @@ +/* + * BT-AMP (BlueTooth Alternate Mac and Phy) 802.11 PAL (Protocol Adaptation Layer) + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: 802.11_bta.h 294267 2011-11-04 23:41:52Z $ +*/ + +#ifndef _802_11_BTA_H_ +#define _802_11_BTA_H_ + +#define BT_SIG_SNAP_MPROT "\xAA\xAA\x03\x00\x19\x58" + +/* BT-AMP 802.11 PAL Protocols */ +#define BTA_PROT_L2CAP 1 +#define BTA_PROT_ACTIVITY_REPORT 2 +#define BTA_PROT_SECURITY 3 +#define BTA_PROT_LINK_SUPERVISION_REQUEST 4 +#define BTA_PROT_LINK_SUPERVISION_REPLY 5 + +/* BT-AMP 802.11 PAL AMP_ASSOC Type IDs */ +#define BTA_TYPE_ID_MAC_ADDRESS 1 +#define BTA_TYPE_ID_PREFERRED_CHANNELS 2 +#define BTA_TYPE_ID_CONNECTED_CHANNELS 3 +#define BTA_TYPE_ID_CAPABILITIES 4 +#define BTA_TYPE_ID_VERSION 5 +#endif /* _802_11_bta_h_ */ diff --git a/external/cache/sources/wl/include/proto/802.11e.h b/external/cache/sources/wl/include/proto/802.11e.h new file mode 100644 index 0000000..bdbb6cf --- /dev/null +++ b/external/cache/sources/wl/include/proto/802.11e.h @@ -0,0 +1,123 @@ +/* + * 802.11e protocol header file + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: 802.11e.h 365823 2012-10-31 04:24:30Z jerryko $ + */ + +#ifndef _802_11e_H_ +#define _802_11e_H_ + +#ifndef _TYPEDEFS_H_ +#include +#endif + +/* This marks the start of a packed structure section. */ +#include + +#ifdef BCMDBG +extern const char * const aci_names[]; +#endif /* BCMDBG */ + +/* WME Traffic Specification (TSPEC) element */ +#define WME_TSPEC_HDR_LEN 2 /* WME TSPEC header length */ +#define WME_TSPEC_BODY_OFF 2 /* WME TSPEC body offset */ + +#define WME_CATEGORY_CODE_OFFSET 0 /* WME Category code offset */ +#define WME_ACTION_CODE_OFFSET 1 /* WME Action code offset */ +#define WME_TOKEN_CODE_OFFSET 2 /* WME Token code offset */ +#define WME_STATUS_CODE_OFFSET 3 /* WME Status code offset */ + +BWL_PRE_PACKED_STRUCT struct tsinfo { + uint8 octets[3]; +} BWL_POST_PACKED_STRUCT; + +typedef struct tsinfo tsinfo_t; + +/* 802.11e TSPEC IE */ +typedef BWL_PRE_PACKED_STRUCT struct tspec { + uint8 oui[DOT11_OUI_LEN]; /* WME_OUI */ + uint8 type; /* WME_TYPE */ + uint8 subtype; /* WME_SUBTYPE_TSPEC */ + uint8 version; /* WME_VERSION */ + tsinfo_t tsinfo; /* TS Info bit field */ + uint16 nom_msdu_size; /* (Nominal or fixed) MSDU Size (bytes) */ + uint16 max_msdu_size; /* Maximum MSDU Size (bytes) */ + uint32 min_srv_interval; /* Minimum Service Interval (us) */ + uint32 max_srv_interval; /* Maximum Service Interval (us) */ + uint32 inactivity_interval; /* Inactivity Interval (us) */ + uint32 suspension_interval; /* Suspension Interval (us) */ + uint32 srv_start_time; /* Service Start Time (us) */ + uint32 min_data_rate; /* Minimum Data Rate (bps) */ + uint32 mean_data_rate; /* Mean Data Rate (bps) */ + uint32 peak_data_rate; /* Peak Data Rate (bps) */ + uint32 max_burst_size; /* Maximum Burst Size (bytes) */ + uint32 delay_bound; /* Delay Bound (us) */ + uint32 min_phy_rate; /* Minimum PHY Rate (bps) */ + uint16 surplus_bw; /* Surplus Bandwidth Allowance (range 1.0-8.0) */ + uint16 medium_time; /* Medium Time (32 us/s periods) */ +} BWL_POST_PACKED_STRUCT tspec_t; + +#define WME_TSPEC_LEN (sizeof(tspec_t)) /* not including 2-bytes of header */ + +/* ts_info */ +/* 802.1D priority is duplicated - bits 13-11 AND bits 3-1 */ +#define TS_INFO_TID_SHIFT 1 /* TS info. TID shift */ +#define TS_INFO_TID_MASK (0xf << TS_INFO_TID_SHIFT) /* TS info. TID mask */ +#define TS_INFO_CONTENTION_SHIFT 7 /* TS info. contention shift */ +#define TS_INFO_CONTENTION_MASK (0x1 << TS_INFO_CONTENTION_SHIFT) /* TS info. contention mask */ +#define TS_INFO_DIRECTION_SHIFT 5 /* TS info. direction shift */ +#define TS_INFO_DIRECTION_MASK (0x3 << TS_INFO_DIRECTION_SHIFT) /* TS info. direction mask */ +#define TS_INFO_PSB_SHIFT 2 /* TS info. PSB bit Shift */ +#define TS_INFO_PSB_MASK (1 << TS_INFO_PSB_SHIFT) /* TS info. PSB mask */ +#define TS_INFO_UPLINK (0 << TS_INFO_DIRECTION_SHIFT) /* TS info. uplink */ +#define TS_INFO_DOWNLINK (1 << TS_INFO_DIRECTION_SHIFT) /* TS info. downlink */ +#define TS_INFO_BIDIRECTIONAL (3 << TS_INFO_DIRECTION_SHIFT) /* TS info. bidirectional */ +#define TS_INFO_USER_PRIO_SHIFT 3 /* TS info. user priority shift */ +/* TS info. user priority mask */ +#define TS_INFO_USER_PRIO_MASK (0x7 << TS_INFO_USER_PRIO_SHIFT) + +/* Macro to get/set bit(s) field in TSINFO */ +#define WLC_CAC_GET_TID(pt) ((((pt).octets[0]) & TS_INFO_TID_MASK) >> TS_INFO_TID_SHIFT) +#define WLC_CAC_GET_DIR(pt) ((((pt).octets[0]) & \ + TS_INFO_DIRECTION_MASK) >> TS_INFO_DIRECTION_SHIFT) +#define WLC_CAC_GET_PSB(pt) ((((pt).octets[1]) & TS_INFO_PSB_MASK) >> TS_INFO_PSB_SHIFT) +#define WLC_CAC_GET_USER_PRIO(pt) ((((pt).octets[1]) & \ + TS_INFO_USER_PRIO_MASK) >> TS_INFO_USER_PRIO_SHIFT) + +#define WLC_CAC_SET_TID(pt, id) ((((pt).octets[0]) & (~TS_INFO_TID_MASK)) | \ + ((id) << TS_INFO_TID_SHIFT)) +#define WLC_CAC_SET_USER_PRIO(pt, prio) ((((pt).octets[0]) & (~TS_INFO_USER_PRIO_MASK)) | \ + ((prio) << TS_INFO_USER_PRIO_SHIFT)) + +/* 802.11e QBSS Load IE */ +#define QBSS_LOAD_IE_LEN 5 /* QBSS Load IE length */ +#define QBSS_LOAD_AAC_OFF 3 /* AAC offset in IE */ + +#define CAC_ADDTS_RESP_TIMEOUT 1000 /* default ADDTS response timeout in ms */ + /* DEFVAL dot11ADDTSResponseTimeout = 1s */ + +/* 802.11e ADDTS status code */ +#define DOT11E_STATUS_ADMISSION_ACCEPTED 0 /* TSPEC Admission accepted status */ +#define DOT11E_STATUS_ADDTS_INVALID_PARAM 1 /* TSPEC invalid parameter status */ +#define DOT11E_STATUS_ADDTS_REFUSED_NSBW 3 /* ADDTS refused (non-sufficient BW) */ +#define DOT11E_STATUS_ADDTS_REFUSED_AWHILE 47 /* ADDTS refused but could retry later */ +#ifdef BCMCCX +#define CCX_STATUS_ASSOC_DENIED_UNKNOWN 0xc8 /* unspecified QoS related failure */ +#define CCX_STATUS_ASSOC_DENIED_AP_POLICY 0xc9 /* TSPEC refused due to AP policy */ +#define CCX_STATUS_ASSOC_DENIED_NO_BW 0xca /* Assoc denied due to AP insufficient BW */ +#define CCX_STATUS_ASSOC_DENIED_BAD_PARAM 0xcb /* one or more TSPEC with invalid parameter */ +#endif /* BCMCCX */ + +/* 802.11e DELTS status code */ +#define DOT11E_STATUS_QSTA_LEAVE_QBSS 36 /* STA leave QBSS */ +#define DOT11E_STATUS_END_TS 37 /* END TS */ +#define DOT11E_STATUS_UNKNOWN_TS 38 /* UNKNOWN TS */ +#define DOT11E_STATUS_QSTA_REQ_TIMEOUT 39 /* STA ADDTS request timeout */ + + +/* This marks the end of a packed structure section. */ +#include + +#endif /* _802_11e_CAC_H_ */ diff --git a/external/cache/sources/wl/include/proto/802.1d.h b/external/cache/sources/wl/include/proto/802.1d.h new file mode 100644 index 0000000..d05ee92 --- /dev/null +++ b/external/cache/sources/wl/include/proto/802.1d.h @@ -0,0 +1,32 @@ +/* + * $Copyright Open Broadcom Corporation$ + * + * Fundamental types and constants relating to 802.1D + * + * $Id: 802.1d.h 241182 2011-02-17 21:50:03Z gmo $ + */ + +#ifndef _802_1_D_ +#define _802_1_D_ + +/* 802.1D priority defines */ +#define PRIO_8021D_NONE 2 /* None = - */ +#define PRIO_8021D_BK 1 /* BK - Background */ +#define PRIO_8021D_BE 0 /* BE - Best-effort */ +#define PRIO_8021D_EE 3 /* EE - Excellent-effort */ +#define PRIO_8021D_CL 4 /* CL - Controlled Load */ +#define PRIO_8021D_VI 5 /* Vi - Video */ +#define PRIO_8021D_VO 6 /* Vo - Voice */ +#define PRIO_8021D_NC 7 /* NC - Network Control */ +#define MAXPRIO 7 /* 0-7 */ +#define NUMPRIO (MAXPRIO + 1) + +#define ALLPRIO -1 /* All prioirty */ + +/* Converts prio to precedence since the numerical value of + * PRIO_8021D_BE and PRIO_8021D_NONE are swapped. + */ +#define PRIO2PREC(prio) \ + (((prio) == PRIO_8021D_NONE || (prio) == PRIO_8021D_BE) ? ((prio^2)) : (prio)) + +#endif /* _802_1_D__ */ diff --git a/external/cache/sources/wl/include/proto/bcmeth.h b/external/cache/sources/wl/include/proto/bcmeth.h new file mode 100644 index 0000000..1618b0b --- /dev/null +++ b/external/cache/sources/wl/include/proto/bcmeth.h @@ -0,0 +1,94 @@ +/* + * Broadcom Ethernettype protocol definitions + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bcmeth.h 294352 2011-11-06 19:23:00Z hharte $ + */ + +/* + * Broadcom Ethernet protocol defines + */ + +#ifndef _BCMETH_H_ +#define _BCMETH_H_ + +#ifndef _TYPEDEFS_H_ +#include +#endif + +/* This marks the start of a packed structure section. */ +#include + +/* ETHER_TYPE_BRCM is defined in ethernet.h */ + +/* + * Following the 2byte BRCM ether_type is a 16bit BRCM subtype field + * in one of two formats: (only subtypes 32768-65535 are in use now) + * + * subtypes 0-32767: + * 8 bit subtype (0-127) + * 8 bit length in bytes (0-255) + * + * subtypes 32768-65535: + * 16 bit big-endian subtype + * 16 bit big-endian length in bytes (0-65535) + * + * length is the number of additional bytes beyond the 4 or 6 byte header + * + * Reserved values: + * 0 reserved + * 5-15 reserved for iLine protocol assignments + * 17-126 reserved, assignable + * 127 reserved + * 32768 reserved + * 32769-65534 reserved, assignable + * 65535 reserved + */ + +/* + * While adding the subtypes and their specific processing code make sure + * bcmeth_bcm_hdr_t is the first data structure in the user specific data structure definition + */ + +#define BCMILCP_SUBTYPE_RATE 1 +#define BCMILCP_SUBTYPE_LINK 2 +#define BCMILCP_SUBTYPE_CSA 3 +#define BCMILCP_SUBTYPE_LARQ 4 +#define BCMILCP_SUBTYPE_VENDOR 5 +#define BCMILCP_SUBTYPE_FLH 17 + +#define BCMILCP_SUBTYPE_VENDOR_LONG 32769 +#define BCMILCP_SUBTYPE_CERT 32770 +#define BCMILCP_SUBTYPE_SES 32771 + + +#define BCMILCP_BCM_SUBTYPE_RESERVED 0 +#define BCMILCP_BCM_SUBTYPE_EVENT 1 +#define BCMILCP_BCM_SUBTYPE_SES 2 +/* + * The EAPOL type is not used anymore. Instead EAPOL messages are now embedded + * within BCMILCP_BCM_SUBTYPE_EVENT type messages + */ +/* #define BCMILCP_BCM_SUBTYPE_EAPOL 3 */ +#define BCMILCP_BCM_SUBTYPE_DPT 4 + +#define BCMILCP_BCM_SUBTYPEHDR_MINLENGTH 8 +#define BCMILCP_BCM_SUBTYPEHDR_VERSION 0 + +/* These fields are stored in network order */ +typedef BWL_PRE_PACKED_STRUCT struct bcmeth_hdr +{ + uint16 subtype; /* Vendor specific..32769 */ + uint16 length; + uint8 version; /* Version is 0 */ + uint8 oui[3]; /* Broadcom OUI */ + /* user specific Data */ + uint16 usr_subtype; +} BWL_POST_PACKED_STRUCT bcmeth_hdr_t; + + +/* This marks the end of a packed structure section. */ +#include + +#endif /* _BCMETH_H_ */ diff --git a/external/cache/sources/wl/include/proto/bcmevent.h b/external/cache/sources/wl/include/proto/bcmevent.h new file mode 100644 index 0000000..250e2fe --- /dev/null +++ b/external/cache/sources/wl/include/proto/bcmevent.h @@ -0,0 +1,485 @@ +/* + * Broadcom Event protocol definitions + * + * $Copyright Open Broadcom Corporation$ + * + * Dependencies: proto/bcmeth.h + * + * $Id: bcmevent.h 410874 2013-07-03 18:07:25Z ryeh $ + * + */ + +/* + * Broadcom Ethernet Events protocol defines + * + */ + +#ifndef _BCMEVENT_H_ +#define _BCMEVENT_H_ + +#ifndef _TYPEDEFS_H_ +#include +#endif +/* #include -- TODO: req., excluded to overwhelming coupling (break up ethernet.h) */ +#include + +/* This marks the start of a packed structure section. */ +#include + +#define BCM_EVENT_MSG_VERSION 2 /* wl_event_msg_t struct version */ +#define BCM_MSG_IFNAME_MAX 16 /* max length of interface name */ + +/* flags */ +#define WLC_EVENT_MSG_LINK 0x01 /* link is up */ +#define WLC_EVENT_MSG_FLUSHTXQ 0x02 /* flush tx queue on MIC error */ +#define WLC_EVENT_MSG_GROUP 0x04 /* group MIC error */ +#define WLC_EVENT_MSG_UNKBSS 0x08 /* unknown source bsscfg */ +#define WLC_EVENT_MSG_UNKIF 0x10 /* unknown source OS i/f */ + +/* these fields are stored in network order */ + +/* version 1 */ +typedef BWL_PRE_PACKED_STRUCT struct +{ + uint16 version; + uint16 flags; /* see flags below */ + uint32 event_type; /* Message (see below) */ + uint32 status; /* Status code (see below) */ + uint32 reason; /* Reason code (if applicable) */ + uint32 auth_type; /* WLC_E_AUTH */ + uint32 datalen; /* data buf */ + struct ether_addr addr; /* Station address (if applicable) */ + char ifname[BCM_MSG_IFNAME_MAX]; /* name of the packet incoming interface */ +} BWL_POST_PACKED_STRUCT wl_event_msg_v1_t; + +/* the current version */ +typedef BWL_PRE_PACKED_STRUCT struct +{ + uint16 version; + uint16 flags; /* see flags below */ + uint32 event_type; /* Message (see below) */ + uint32 status; /* Status code (see below) */ + uint32 reason; /* Reason code (if applicable) */ + uint32 auth_type; /* WLC_E_AUTH */ + uint32 datalen; /* data buf */ + struct ether_addr addr; /* Station address (if applicable) */ + char ifname[BCM_MSG_IFNAME_MAX]; /* name of the packet incoming interface */ + uint8 ifidx; /* destination OS i/f index */ + uint8 bsscfgidx; /* source bsscfg index */ +} BWL_POST_PACKED_STRUCT wl_event_msg_t; + +/* used by driver msgs */ +typedef BWL_PRE_PACKED_STRUCT struct bcm_event { + struct ether_header eth; + bcmeth_hdr_t bcm_hdr; + wl_event_msg_t event; + /* data portion follows */ +} BWL_POST_PACKED_STRUCT bcm_event_t; + +#define BCM_MSG_LEN (sizeof(bcm_event_t) - sizeof(bcmeth_hdr_t) - sizeof(struct ether_header)) + +/* Event messages */ +#define WLC_E_SET_SSID 0 /* indicates status of set SSID */ +#define WLC_E_JOIN 1 /* differentiates join IBSS from found (WLC_E_START) IBSS */ +#define WLC_E_START 2 /* STA founded an IBSS or AP started a BSS */ +#define WLC_E_AUTH 3 /* 802.11 AUTH request */ +#define WLC_E_AUTH_IND 4 /* 802.11 AUTH indication */ +#define WLC_E_DEAUTH 5 /* 802.11 DEAUTH request */ +#define WLC_E_DEAUTH_IND 6 /* 802.11 DEAUTH indication */ +#define WLC_E_ASSOC 7 /* 802.11 ASSOC request */ +#define WLC_E_ASSOC_IND 8 /* 802.11 ASSOC indication */ +#define WLC_E_REASSOC 9 /* 802.11 REASSOC request */ +#define WLC_E_REASSOC_IND 10 /* 802.11 REASSOC indication */ +#define WLC_E_DISASSOC 11 /* 802.11 DISASSOC request */ +#define WLC_E_DISASSOC_IND 12 /* 802.11 DISASSOC indication */ +#define WLC_E_QUIET_START 13 /* 802.11h Quiet period started */ +#define WLC_E_QUIET_END 14 /* 802.11h Quiet period ended */ +#define WLC_E_BEACON_RX 15 /* BEACONS received/lost indication */ +#define WLC_E_LINK 16 /* generic link indication */ +#define WLC_E_MIC_ERROR 17 /* TKIP MIC error occurred */ +#define WLC_E_NDIS_LINK 18 /* NDIS style link indication */ +#define WLC_E_ROAM 19 /* roam attempt occurred: indicate status & reason */ +#define WLC_E_TXFAIL 20 /* change in dot11FailedCount (txfail) */ +#define WLC_E_PMKID_CACHE 21 /* WPA2 pmkid cache indication */ +#define WLC_E_RETROGRADE_TSF 22 /* current AP's TSF value went backward */ +#define WLC_E_PRUNE 23 /* AP was pruned from join list for reason */ +#define WLC_E_AUTOAUTH 24 /* report AutoAuth table entry match for join attempt */ +#define WLC_E_EAPOL_MSG 25 /* Event encapsulating an EAPOL message */ +#define WLC_E_SCAN_COMPLETE 26 /* Scan results are ready or scan was aborted */ +#define WLC_E_ADDTS_IND 27 /* indicate to host addts fail/success */ +#define WLC_E_DELTS_IND 28 /* indicate to host delts fail/success */ +#define WLC_E_BCNSENT_IND 29 /* indicate to host of beacon transmit */ +#define WLC_E_BCNRX_MSG 30 /* Send the received beacon up to the host */ +#define WLC_E_BCNLOST_MSG 31 /* indicate to host loss of beacon */ +#define WLC_E_ROAM_PREP 32 /* before attempting to roam */ +#define WLC_E_PFN_NET_FOUND 33 /* PFN network found event */ +#define WLC_E_PFN_NET_LOST 34 /* PFN network lost event */ +#define WLC_E_RESET_COMPLETE 35 +#define WLC_E_JOIN_START 36 +#define WLC_E_ROAM_START 37 +#define WLC_E_ASSOC_START 38 +#define WLC_E_IBSS_ASSOC 39 +#define WLC_E_RADIO 40 +#define WLC_E_PSM_WATCHDOG 41 /* PSM microcode watchdog fired */ +#if defined(BCMCCX) && defined(CCX_SDK) +#define WLC_E_CCX_ASSOC_START 42 /* CCX association start */ +#define WLC_E_CCX_ASSOC_ABORT 43 /* CCX association abort */ +#endif /* BCMCCX && CCX_SDK */ +#define WLC_E_PROBREQ_MSG 44 /* probe request received */ +#define WLC_E_SCAN_CONFIRM_IND 45 +#define WLC_E_PSK_SUP 46 /* WPA Handshake fail */ +#define WLC_E_COUNTRY_CODE_CHANGED 47 +#define WLC_E_EXCEEDED_MEDIUM_TIME 48 /* WMMAC excedded medium time */ +#define WLC_E_ICV_ERROR 49 /* WEP ICV error occurred */ +#define WLC_E_UNICAST_DECODE_ERROR 50 /* Unsupported unicast encrypted frame */ +#define WLC_E_MULTICAST_DECODE_ERROR 51 /* Unsupported multicast encrypted frame */ +#define WLC_E_TRACE 52 +#ifdef WLBTAMP +#define WLC_E_BTA_HCI_EVENT 53 /* BT-AMP HCI event */ +#endif +#define WLC_E_IF 54 /* I/F change (for dongle host notification) */ +#define WLC_E_P2P_DISC_LISTEN_COMPLETE 55 /* listen state expires */ +#define WLC_E_RSSI 56 /* indicate RSSI change based on configured levels */ +#define WLC_E_PFN_SCAN_COMPLETE 57 /* PFN completed scan of network list */ +#define WLC_E_EXTLOG_MSG 58 +#define WLC_E_ACTION_FRAME 59 /* Action frame Rx */ +#define WLC_E_ACTION_FRAME_COMPLETE 60 /* Action frame Tx complete */ +#define WLC_E_PRE_ASSOC_IND 61 /* assoc request received */ +#define WLC_E_PRE_REASSOC_IND 62 /* re-assoc request received */ +#define WLC_E_CHANNEL_ADOPTED 63 /* channel adopted (xxx: obsoleted) */ +#define WLC_E_AP_STARTED 64 /* AP started */ +#define WLC_E_DFS_AP_STOP 65 /* AP stopped due to DFS */ +#define WLC_E_DFS_AP_RESUME 66 /* AP resumed due to DFS */ +#define WLC_E_WAI_STA_EVENT 67 /* WAI stations event */ +#define WLC_E_WAI_MSG 68 /* event encapsulating an WAI message */ +#define WLC_E_ESCAN_RESULT 69 /* escan result event */ +#define WLC_E_ACTION_FRAME_OFF_CHAN_COMPLETE 70 /* action frame off channel complete */ +#define WLC_E_PROBRESP_MSG 71 /* probe response received */ +#define WLC_E_P2P_PROBREQ_MSG 72 /* P2P Probe request received */ +#define WLC_E_DCS_REQUEST 73 +/* XXX: will enable this after proptxstatus code is merged back to ToT */ +#define WLC_E_FIFO_CREDIT_MAP 74 /* credits for D11 FIFOs. [AC0,AC1,AC2,AC3,BC_MC,ATIM] */ +#define WLC_E_ACTION_FRAME_RX 75 /* Received action frame event WITH + * wl_event_rx_frame_data_t header + */ +#define WLC_E_WAKE_EVENT 76 /* Wake Event timer fired, used for wake WLAN test mode */ +#define WLC_E_RM_COMPLETE 77 /* Radio measurement complete */ +#define WLC_E_HTSFSYNC 78 /* Synchronize TSF with the host */ +#define WLC_E_OVERLAY_REQ 79 /* request an overlay IOCTL/iovar from the host */ +#define WLC_E_CSA_COMPLETE_IND 80 /* 802.11 CHANNEL SWITCH ACTION completed */ +#define WLC_E_EXCESS_PM_WAKE_EVENT 81 /* excess PM Wake Event to inform host */ +#define WLC_E_PFN_SCAN_NONE 82 /* no PFN networks around */ +#define WLC_E_PFN_SCAN_ALLGONE 83 /* last found PFN network gets lost */ +#define WLC_E_GTK_PLUMBED 84 +#define WLC_E_ASSOC_IND_NDIS 85 /* 802.11 ASSOC indication for NDIS only */ +#define WLC_E_REASSOC_IND_NDIS 86 /* 802.11 REASSOC indication for NDIS only */ +#define WLC_E_ASSOC_REQ_IE 87 +#define WLC_E_ASSOC_RESP_IE 88 +#define WLC_E_ASSOC_RECREATED 89 /* association recreated on resume */ +#define WLC_E_ACTION_FRAME_RX_NDIS 90 /* rx action frame event for NDIS only */ +#define WLC_E_AUTH_REQ 91 /* authentication request received */ +#define WLC_E_TDLS_PEER_EVENT 92 /* discovered peer, connected/disconnected peer */ +#define WLC_E_SPEEDY_RECREATE_FAIL 93 /* fast assoc recreation failed */ +#define WLC_E_NATIVE 94 /* port-specific event and payload (e.g. NDIS) */ +#define WLC_E_PKTDELAY_IND 95 /* event for tx pkt delay suddently jump */ +#define WLC_E_AWDL_AW 96 /* AWDL AW period starts */ +#define WLC_E_AWDL_ROLE 97 /* AWDL Master/Slave/NE master role event */ +#define WLC_E_AWDL_EVENT 98 /* Generic AWDL event */ +#ifdef WLNIC +#define WLC_E_NIC_AF_TXS 99 /* NIC AF txstatus */ +#define WLC_E_NIC_NIC_REPORT 100 /* NIC period report */ +#endif +#define WLC_E_BEACON_FRAME_RX 101 +#define WLC_E_SERVICE_FOUND 102 /* desired service found */ +#define WLC_E_GAS_FRAGMENT_RX 103 /* GAS fragment received */ +#define WLC_E_GAS_COMPLETE 104 /* GAS sessions all complete */ +#define WLC_E_P2PO_ADD_DEVICE 105 /* New device found by p2p offload */ +#define WLC_E_P2PO_DEL_DEVICE 106 /* device has been removed by p2p offload */ +#define WLC_E_WNM_STA_SLEEP 107 /* WNM event to notify STA enter sleep mode */ +#define WLC_E_TXFAIL_THRESH 108 /* Indication of MAC tx failures (exhaustion of + * 802.11 retries) exceeding threshold(s) + */ +#define WLC_E_PROXD 109 /* Proximity Detection event */ +#define WLC_E_IBSS_COALESCE 110 /* IBSS Coalescing */ +#define WLC_E_AWDL_AW_EXT_END 111 /* AWDL extended period ends */ +#define WLC_E_AWDL_AW_EXT_START 112 /* SWDL AW extension start */ +#define WLC_E_AWDL_AW_START 113 /* AWDL start Event to inform host */ +#define WLC_E_AWDL_RADIO_OFF 114 /* Radio Off */ +#define WLC_E_AWDL_PEER_STATE 115 /* AWDL peer state open/close */ +#define WLC_E_AWDL_SYNC_STATE_CHANGED 116 /* AWDL sync role changed */ +#define WLC_E_AWDL_CHIP_RESET 117 /* infroms the interface of a chip rest */ +#define WLC_E_AWDL_INTERLEAVED_SCAN_START 118 +#define WLC_E_AWDL_INTERLEAVED_SCAN_STOP 119 +#define WLC_E_AWDL_PEER_CACHE_CONTROL 120 +#define WLC_E_CSA_START_IND 121 +#define WLC_E_CSA_DONE_IND 122 +#define WLC_E_CSA_FAILURE_IND 123 +#define WLC_E_CCA_CHAN_QUAL 124 /* CCA based channel quality report */ +#define WLC_E_BSSID 125 /* to report change in BSSID while roaming */ +#define WLC_E_TX_STAT_ERROR 126 /* tx error indication */ +#define WLC_E_BCMC_CREDIT_SUPPORT 127 /* credit check for BCMC supported */ +#define WLC_E_PSTA_PRIMARY_INTF_IND 128 /* psta primary interface indication */ +#define WLC_E_CCX_S69_RESP_RX 129 /* CCX S69 response received */ +#define WLC_E_LAST 130 /* highest val + 1 for range checking */ + +/* xxx: + * Please do not insert/delete events in the middle causing renumbering. + * It is a problem for host-device compatibility, especially with ROMmed chips. + */ + +/* Table of event name strings for UIs and debugging dumps */ +typedef struct { + uint event; + const char *name; +} bcmevent_name_t; + +extern const bcmevent_name_t bcmevent_names[]; +extern const int bcmevent_names_size; + +/* XXX Translate between internal and exported status codes */ +/* Event status codes */ +#define WLC_E_STATUS_SUCCESS 0 /* operation was successful */ +#define WLC_E_STATUS_FAIL 1 /* operation failed */ +#define WLC_E_STATUS_TIMEOUT 2 /* operation timed out */ +#define WLC_E_STATUS_NO_NETWORKS 3 /* failed due to no matching network found */ +#define WLC_E_STATUS_ABORT 4 /* operation was aborted */ +#define WLC_E_STATUS_NO_ACK 5 /* protocol failure: packet not ack'd */ +#define WLC_E_STATUS_UNSOLICITED 6 /* AUTH or ASSOC packet was unsolicited */ +#define WLC_E_STATUS_ATTEMPT 7 /* attempt to assoc to an auto auth configuration */ +#define WLC_E_STATUS_PARTIAL 8 /* scan results are incomplete */ +#define WLC_E_STATUS_NEWSCAN 9 /* scan aborted by another scan */ +#define WLC_E_STATUS_NEWASSOC 10 /* scan aborted due to assoc in progress */ +#define WLC_E_STATUS_11HQUIET 11 /* 802.11h quiet period started */ +#define WLC_E_STATUS_SUPPRESS 12 /* user disabled scanning (WLC_SET_SCANSUPPRESS) */ +#define WLC_E_STATUS_NOCHANS 13 /* no allowable channels to scan */ +#ifdef BCMCCX +#define WLC_E_STATUS_CCXFASTRM 14 /* scan aborted due to CCX fast roam */ +#endif /* BCMCCX */ +#define WLC_E_STATUS_CS_ABORT 15 /* abort channel select */ +#define WLC_E_STATUS_ERROR 16 /* request failed due to error */ + +/* roam reason codes */ +#define WLC_E_REASON_INITIAL_ASSOC 0 /* initial assoc */ +#define WLC_E_REASON_LOW_RSSI 1 /* roamed due to low RSSI */ +#define WLC_E_REASON_DEAUTH 2 /* roamed due to DEAUTH indication */ +#define WLC_E_REASON_DISASSOC 3 /* roamed due to DISASSOC indication */ +#define WLC_E_REASON_BCNS_LOST 4 /* roamed due to lost beacons */ + +/* Roam codes used primarily by CCX */ +#define WLC_E_REASON_FAST_ROAM_FAILED 5 /* roamed due to fast roam failure */ +#define WLC_E_REASON_DIRECTED_ROAM 6 /* roamed due to request by AP */ +#define WLC_E_REASON_TSPEC_REJECTED 7 /* roamed due to TSPEC rejection */ +#define WLC_E_REASON_BETTER_AP 8 /* roamed due to finding better AP */ +#define WLC_E_REASON_MINTXRATE 9 /* roamed because at mintxrate for too long */ +#define WLC_E_REASON_TXFAIL 10 /* We can hear AP, but AP can't hear us */ + +#define WLC_E_REASON_REQUESTED_ROAM 11 /* roamed due to BSS Mgmt Transition request by AP */ + + +/* prune reason codes */ +#define WLC_E_PRUNE_ENCR_MISMATCH 1 /* encryption mismatch */ +#define WLC_E_PRUNE_BCAST_BSSID 2 /* AP uses a broadcast BSSID */ +#define WLC_E_PRUNE_MAC_DENY 3 /* STA's MAC addr is in AP's MAC deny list */ +#define WLC_E_PRUNE_MAC_NA 4 /* STA's MAC addr is not in AP's MAC allow list */ +#define WLC_E_PRUNE_REG_PASSV 5 /* AP not allowed due to regulatory restriction */ +#define WLC_E_PRUNE_SPCT_MGMT 6 /* AP does not support STA locale spectrum mgmt */ +#define WLC_E_PRUNE_RADAR 7 /* AP is on a radar channel of STA locale */ +#define WLC_E_RSN_MISMATCH 8 /* STA does not support AP's RSN */ +#define WLC_E_PRUNE_NO_COMMON_RATES 9 /* No rates in common with AP */ +#define WLC_E_PRUNE_BASIC_RATES 10 /* STA does not support all basic rates of BSS */ +#ifdef BCMCCX +#define WLC_E_PRUNE_CCXFAST_PREVAP 11 /* CCX FAST ROAM: prune previous AP */ +#endif /* def BCMCCX */ +#define WLC_E_PRUNE_CIPHER_NA 12 /* BSS's cipher not supported */ +#define WLC_E_PRUNE_KNOWN_STA 13 /* AP is already known to us as a STA */ +#ifdef BCMCCX +#define WLC_E_PRUNE_CCXFAST_DROAM 14 /* CCX FAST ROAM: prune unqualified AP */ +#endif /* def BCMCCX */ +#define WLC_E_PRUNE_WDS_PEER 15 /* AP is already known to us as a WDS peer */ +#define WLC_E_PRUNE_QBSS_LOAD 16 /* QBSS LOAD - AAC is too low */ +#define WLC_E_PRUNE_HOME_AP 17 /* prune home AP */ +#ifdef BCMCCX +#define WLC_E_PRUNE_AP_BLOCKED 18 /* prune blocked AP */ +#define WLC_E_PRUNE_NO_DIAG_SUPPORT 19 /* prune due to diagnostic mode not supported */ +#endif /* BCMCCX */ + +/* WPA failure reason codes carried in the WLC_E_PSK_SUP event */ +#define WLC_E_SUP_OTHER 0 /* Other reason */ +#define WLC_E_SUP_DECRYPT_KEY_DATA 1 /* Decryption of key data failed */ +#define WLC_E_SUP_BAD_UCAST_WEP128 2 /* Illegal use of ucast WEP128 */ +#define WLC_E_SUP_BAD_UCAST_WEP40 3 /* Illegal use of ucast WEP40 */ +#define WLC_E_SUP_UNSUP_KEY_LEN 4 /* Unsupported key length */ +#define WLC_E_SUP_PW_KEY_CIPHER 5 /* Unicast cipher mismatch in pairwise key */ +#define WLC_E_SUP_MSG3_TOO_MANY_IE 6 /* WPA IE contains > 1 RSN IE in key msg 3 */ +#define WLC_E_SUP_MSG3_IE_MISMATCH 7 /* WPA IE mismatch in key message 3 */ +#define WLC_E_SUP_NO_INSTALL_FLAG 8 /* INSTALL flag unset in 4-way msg */ +#define WLC_E_SUP_MSG3_NO_GTK 9 /* encapsulated GTK missing from msg 3 */ +#define WLC_E_SUP_GRP_KEY_CIPHER 10 /* Multicast cipher mismatch in group key */ +#define WLC_E_SUP_GRP_MSG1_NO_GTK 11 /* encapsulated GTK missing from group msg 1 */ +#define WLC_E_SUP_GTK_DECRYPT_FAIL 12 /* GTK decrypt failure */ +#define WLC_E_SUP_SEND_FAIL 13 /* message send failure */ +#define WLC_E_SUP_DEAUTH 14 /* received FC_DEAUTH */ +#define WLC_E_SUP_WPA_PSK_TMO 15 /* WPA PSK 4-way handshake timeout */ + +/* Event data for events that include frames received over the air */ +/* WLC_E_PROBRESP_MSG + * WLC_E_P2P_PROBREQ_MSG + * WLC_E_ACTION_FRAME_RX + */ +#ifdef WLAWDL +#define WLC_E_AWDL_SCAN_START 1 /* Scan start indication to host */ +#define WLC_E_AWDL_SCAN_DONE 0 /* Scan Done indication to host */ + +#define WLC_E_AWDL_RX_ACT_FRAME 1 +#define WLC_E_AWDL_RX_PRB_RESP 2 + +#endif +typedef BWL_PRE_PACKED_STRUCT struct wl_event_rx_frame_data { + uint16 version; + uint16 channel; /* Matches chanspec_t format from bcmwifi_channels.h */ + int32 rssi; + uint32 mactime; + uint32 rate; +} BWL_POST_PACKED_STRUCT wl_event_rx_frame_data_t; + +#define BCM_RX_FRAME_DATA_VERSION 1 + +/* WLC_E_IF event data */ +typedef struct wl_event_data_if { + uint8 ifidx; /* RTE virtual device index (for dongle) */ + uint8 opcode; /* see I/F opcode */ + uint8 reserved; /* bit mask (WLC_E_IF_FLAGS_XXX ) */ + uint8 bssidx; /* bsscfg index */ + uint8 role; /* see I/F role */ +} wl_event_data_if_t; + +/* opcode in WLC_E_IF event */ +#define WLC_E_IF_ADD 1 /* bsscfg add */ +#define WLC_E_IF_DEL 2 /* bsscfg delete */ +#define WLC_E_IF_CHANGE 3 /* bsscfg role change */ + +/* I/F role code in WLC_E_IF event */ +#define WLC_E_IF_ROLE_STA 0 /* Infra STA */ +#define WLC_E_IF_ROLE_AP 1 /* Access Point */ +#define WLC_E_IF_ROLE_WDS 2 /* WDS link */ +#define WLC_E_IF_ROLE_P2P_GO 3 /* P2P Group Owner */ +#define WLC_E_IF_ROLE_P2P_CLIENT 4 /* P2P Client */ +#ifdef WLBTAMP +#define WLC_E_IF_ROLE_BTA_CREATOR 5 /* BT-AMP Creator */ +#define WLC_E_IF_ROLE_BTA_ACCEPTOR 6 /* BT-AMP Acceptor */ +#endif + +/* WLC_E_RSSI event data */ +typedef struct wl_event_data_rssi { + int32 rssi; + int32 snr; + int32 noise; +} wl_event_data_rssi_t; + +/* WLC_E_IF flag */ +#define WLC_E_IF_FLAGS_BSSCFG_NOIF 0x1 /* no host I/F creation needed */ + +/* Reason codes for LINK */ +#define WLC_E_LINK_BCN_LOSS 1 /* Link down because of beacon loss */ +#define WLC_E_LINK_DISASSOC 2 /* Link down because of disassoc */ +#define WLC_E_LINK_ASSOC_REC 3 /* Link down because assoc recreate failed */ +#define WLC_E_LINK_BSSCFG_DIS 4 /* Link down due to bsscfg down */ + +/* reason codes for WLC_E_OVERLAY_REQ event */ +#define WLC_E_OVL_DOWNLOAD 0 /* overlay download request */ +#define WLC_E_OVL_UPDATE_IND 1 /* device indication of host overlay update */ + +/* reason codes for WLC_E_TDLS_PEER_EVENT event */ +#define WLC_E_TDLS_PEER_DISCOVERED 0 /* peer is ready to establish TDLS */ +#define WLC_E_TDLS_PEER_CONNECTED 1 +#define WLC_E_TDLS_PEER_DISCONNECTED 2 + +#ifdef WLAWDL +/* WLC_E_AWDL_EVENT subtypes */ +#define WLC_E_AWDL_SCAN_STATUS 0 +#define WLC_E_AWDL_RX_ACT_FRAME 1 +#define WLC_E_AWDL_RX_PRB_RESP 2 +#define WLC_E_AWDL_PHYCAL_STATUS 3 +#define WLC_E_AWDL_WOWL_NULLPKT 4 +#define WLC_E_AWDL_OOB_AF_STATUS 5 + +/* WLC_E_AWDL_SCAN_STATUS status values */ +#define WLC_E_AWDL_SCAN_START 1 /* Scan start indication to host */ +#define WLC_E_AWDL_SCAN_DONE 0 /* Scan Done indication to host */ +#define WLC_E_AWDL_PHYCAL_START 1 /* Phy calibration start indication to host */ +#define WLC_E_AWDL_PHYCAL_DONE 0 /* Phy calibration done indication to host */ +#endif + +/* GAS event data */ +typedef BWL_PRE_PACKED_STRUCT struct wl_event_gas { + uint16 channel; /* channel of GAS protocol */ + uint8 dialog_token; /* GAS dialog token */ + uint8 fragment_id; /* fragment id */ + uint16 status_code; /* status code on GAS completion */ + uint16 data_len; /* length of data to follow */ + uint8 data[1]; /* variable length specified by data_len */ +} BWL_POST_PACKED_STRUCT wl_event_gas_t; + +/* service discovery TLV */ +typedef BWL_PRE_PACKED_STRUCT struct wl_sd_tlv { + uint16 length; /* length of response_data */ + uint8 protocol; /* service protocol type */ + uint8 transaction_id; /* service transaction id */ + uint8 status_code; /* status code */ + uint8 data[1]; /* response data */ +} BWL_POST_PACKED_STRUCT wl_sd_tlv_t; + +/* service discovery event data */ +typedef BWL_PRE_PACKED_STRUCT struct wl_event_sd { + uint16 channel; /* channel */ + uint8 count; /* number of tlvs */ + wl_sd_tlv_t tlv[1]; /* service discovery TLV */ +} BWL_POST_PACKED_STRUCT wl_event_sd_t; + +/* Reason codes for WLC_E_PROXD */ +#define WLC_E_PROXD_FOUND 1 /* Found a proximity device */ +#define WLC_E_PROXD_GONE 2 /* Lost a proximity device */ + +/* WLC_E_AWDL_AW event data */ +typedef BWL_PRE_PACKED_STRUCT struct awdl_aws_event_data { + uint32 fw_time; /* firmware PMU time */ + struct ether_addr current_master; /* Current master Mac addr */ + uint16 aw_counter; /* AW seq# */ + uint8 aw_ext_count; /* AW extension count */ + uint8 aw_role; /* AW role */ + uint8 flags; /* AW event flag */ + uint16 aw_chan; + uint8 infra_rssi; /* rssi on the infra channel */ + uint32 infra_rxbcn_count; /* number of beacons received */ +} BWL_POST_PACKED_STRUCT awdl_aws_event_data_t; + +/* For awdl_aws_event_data_t.flags */ +#define AWDL_AW_LAST_EXT 0x01 + +/* WLC_E_AWDL_OOB_AF_STATUS event data */ +typedef BWL_PRE_PACKED_STRUCT struct awdl_oob_af_status_data { + uint32 tx_time_diff; + uint16 pkt_tag; + uint8 tx_chan; +} BWL_POST_PACKED_STRUCT awdl_oob_af_status_data_t; + +/* Video Traffic Interference Monitor Event */ +#define INTFER_EVENT_VERSION 1 +#define INTFER_STREAM_TYPE_NONTCP 1 +#define INTFER_STREAM_TYPE_TCP 2 +#define WLINTFER_STATS_NSMPLS 4 +typedef struct wl_intfer_event { + uint16 version; /* version */ + uint16 status; /* status */ + uint8 txfail_histo[WLINTFER_STATS_NSMPLS]; /* txfail histo */ +} wl_intfer_event_t; + +/* WLC_E_PSTA_PRIMARY_INTF_IND event data */ +typedef struct wl_psta_primary_intf_event { + struct ether_addr prim_ea; /* primary intf ether addr */ +} wl_psta_primary_intf_event_t; + +/* This marks the end of a packed structure section. */ +#include + +#endif /* _BCMEVENT_H_ */ diff --git a/external/cache/sources/wl/include/proto/bcmip.h b/external/cache/sources/wl/include/proto/bcmip.h new file mode 100644 index 0000000..cdd5004 --- /dev/null +++ b/external/cache/sources/wl/include/proto/bcmip.h @@ -0,0 +1,207 @@ +/* + * $Copyright Open Broadcom Corporation$ + * + * Fundamental constants relating to IP Protocol + * + * $Id: bcmip.h 407107 2013-06-11 19:39:14Z esawma $ + */ + +#ifndef _bcmip_h_ +#define _bcmip_h_ + +#ifndef _TYPEDEFS_H_ +#include +#endif + +/* This marks the start of a packed structure section. */ +#include + + +/* IPV4 and IPV6 common */ +#define IP_VER_OFFSET 0x0 /* offset to version field */ +#define IP_VER_MASK 0xf0 /* version mask */ +#define IP_VER_SHIFT 4 /* version shift */ +#define IP_VER_4 4 /* version number for IPV4 */ +#define IP_VER_6 6 /* version number for IPV6 */ + +#define IP_VER(ip_body) \ + ((((uint8 *)(ip_body))[IP_VER_OFFSET] & IP_VER_MASK) >> IP_VER_SHIFT) + +#define IP_PROT_ICMP 0x1 /* ICMP protocol */ +#define IP_PROT_IGMP 0x2 /* IGMP protocol */ +#define IP_PROT_TCP 0x6 /* TCP protocol */ +#define IP_PROT_UDP 0x11 /* UDP protocol type */ +#define IP_PROT_ICMP6 0x3a /* ICMPv6 protocol type */ + +/* IPV4 field offsets */ +#define IPV4_VER_HL_OFFSET 0 /* version and ihl byte offset */ +#define IPV4_TOS_OFFSET 1 /* type of service offset */ +#define IPV4_PKTLEN_OFFSET 2 /* packet length offset */ +#define IPV4_PKTFLAG_OFFSET 6 /* more-frag,dont-frag flag offset */ +#define IPV4_PROT_OFFSET 9 /* protocol type offset */ +#define IPV4_CHKSUM_OFFSET 10 /* IP header checksum offset */ +#define IPV4_SRC_IP_OFFSET 12 /* src IP addr offset */ +#define IPV4_DEST_IP_OFFSET 16 /* dest IP addr offset */ +#define IPV4_OPTIONS_OFFSET 20 /* IP options offset */ +#define IPV4_MIN_HEADER_LEN 20 /* Minimum size for an IP header (no options) */ + +/* IPV4 field decodes */ +#define IPV4_VER_MASK 0xf0 /* IPV4 version mask */ +#define IPV4_VER_SHIFT 4 /* IPV4 version shift */ + +#define IPV4_HLEN_MASK 0x0f /* IPV4 header length mask */ +#define IPV4_HLEN(ipv4_body) (4 * (((uint8 *)(ipv4_body))[IPV4_VER_HL_OFFSET] & IPV4_HLEN_MASK)) + +#define IPV4_ADDR_LEN 4 /* IPV4 address length */ + +#define IPV4_ADDR_NULL(a) ((((uint8 *)(a))[0] | ((uint8 *)(a))[1] | \ + ((uint8 *)(a))[2] | ((uint8 *)(a))[3]) == 0) + +#define IPV4_ADDR_BCAST(a) ((((uint8 *)(a))[0] & ((uint8 *)(a))[1] & \ + ((uint8 *)(a))[2] & ((uint8 *)(a))[3]) == 0xff) + +#define IPV4_TOS_DSCP_MASK 0xfc /* DiffServ codepoint mask */ +#define IPV4_TOS_DSCP_SHIFT 2 /* DiffServ codepoint shift */ + +#define IPV4_TOS(ipv4_body) (((uint8 *)(ipv4_body))[IPV4_TOS_OFFSET]) + +#define IPV4_TOS_PREC_MASK 0xe0 /* Historical precedence mask */ +#define IPV4_TOS_PREC_SHIFT 5 /* Historical precedence shift */ + +#define IPV4_TOS_LOWDELAY 0x10 /* Lowest delay requested */ +#define IPV4_TOS_THROUGHPUT 0x8 /* Best throughput requested */ +#define IPV4_TOS_RELIABILITY 0x4 /* Most reliable delivery requested */ + +#define IPV4_PROT(ipv4_body) (((uint8 *)(ipv4_body))[IPV4_PROT_OFFSET]) + +#define IPV4_FRAG_RESV 0x8000 /* Reserved */ +#define IPV4_FRAG_DONT 0x4000 /* Don't fragment */ +#define IPV4_FRAG_MORE 0x2000 /* More fragments */ +#define IPV4_FRAG_OFFSET_MASK 0x1fff /* Fragment offset */ + +#define IPV4_ADDR_STR_LEN 16 /* Max IP address length in string format */ + +/* IPV4 packet formats */ +BWL_PRE_PACKED_STRUCT struct ipv4_addr { + uint8 addr[IPV4_ADDR_LEN]; +} BWL_POST_PACKED_STRUCT; + +BWL_PRE_PACKED_STRUCT struct ipv4_hdr { + uint8 version_ihl; /* Version and Internet Header Length */ + uint8 tos; /* Type Of Service */ + uint16 tot_len; /* Number of bytes in packet (max 65535) */ + uint16 id; + uint16 frag; /* 3 flag bits and fragment offset */ + uint8 ttl; /* Time To Live */ + uint8 prot; /* Protocol */ + uint16 hdr_chksum; /* IP header checksum */ + uint8 src_ip[IPV4_ADDR_LEN]; /* Source IP Address */ + uint8 dst_ip[IPV4_ADDR_LEN]; /* Destination IP Address */ +} BWL_POST_PACKED_STRUCT; + +/* IPV6 field offsets */ +#define IPV6_PAYLOAD_LEN_OFFSET 4 /* payload length offset */ +#define IPV6_NEXT_HDR_OFFSET 6 /* next header/protocol offset */ +#define IPV6_HOP_LIMIT_OFFSET 7 /* hop limit offset */ +#define IPV6_SRC_IP_OFFSET 8 /* src IP addr offset */ +#define IPV6_DEST_IP_OFFSET 24 /* dst IP addr offset */ + +/* IPV6 field decodes */ +#define IPV6_TRAFFIC_CLASS(ipv6_body) \ + (((((uint8 *)(ipv6_body))[0] & 0x0f) << 4) | \ + ((((uint8 *)(ipv6_body))[1] & 0xf0) >> 4)) + +#define IPV6_FLOW_LABEL(ipv6_body) \ + (((((uint8 *)(ipv6_body))[1] & 0x0f) << 16) | \ + (((uint8 *)(ipv6_body))[2] << 8) | \ + (((uint8 *)(ipv6_body))[3])) + +#define IPV6_PAYLOAD_LEN(ipv6_body) \ + ((((uint8 *)(ipv6_body))[IPV6_PAYLOAD_LEN_OFFSET + 0] << 8) | \ + ((uint8 *)(ipv6_body))[IPV6_PAYLOAD_LEN_OFFSET + 1]) + +#define IPV6_NEXT_HDR(ipv6_body) \ + (((uint8 *)(ipv6_body))[IPV6_NEXT_HDR_OFFSET]) + +#define IPV6_PROT(ipv6_body) IPV6_NEXT_HDR(ipv6_body) + +#define IPV6_ADDR_LEN 16 /* IPV6 address length */ + +/* IPV4 TOS or IPV6 Traffic Classifier or 0 */ +#define IP_TOS46(ip_body) \ + (IP_VER(ip_body) == IP_VER_4 ? IPV4_TOS(ip_body) : \ + IP_VER(ip_body) == IP_VER_6 ? IPV6_TRAFFIC_CLASS(ip_body) : 0) + +#define IP_DSCP46(ip_body) (IP_TOS46(ip_body) >> IPV4_TOS_DSCP_SHIFT); + +/* IPV6 extension headers (options) */ +#define IPV6_EXTHDR_HOP 0 +#define IPV6_EXTHDR_ROUTING 43 +#define IPV6_EXTHDR_FRAGMENT 44 +#define IPV6_EXTHDR_AUTH 51 +#define IPV6_EXTHDR_NONE 59 +#define IPV6_EXTHDR_DEST 60 + +#define IPV6_EXTHDR(prot) (((prot) == IPV6_EXTHDR_HOP) || \ + ((prot) == IPV6_EXTHDR_ROUTING) || \ + ((prot) == IPV6_EXTHDR_FRAGMENT) || \ + ((prot) == IPV6_EXTHDR_AUTH) || \ + ((prot) == IPV6_EXTHDR_NONE) || \ + ((prot) == IPV6_EXTHDR_DEST)) + +#define IPV6_MIN_HLEN 40 + +#define IPV6_EXTHDR_LEN(eh) ((((struct ipv6_exthdr *)(eh))->hdrlen + 1) << 3) + +BWL_PRE_PACKED_STRUCT struct ipv6_exthdr { + uint8 nexthdr; + uint8 hdrlen; +} BWL_POST_PACKED_STRUCT; + +BWL_PRE_PACKED_STRUCT struct ipv6_exthdr_frag { + uint8 nexthdr; + uint8 rsvd; + uint16 frag_off; + uint32 ident; +} BWL_POST_PACKED_STRUCT; + +static INLINE int32 +ipv6_exthdr_len(uint8 *h, uint8 *proto) +{ + uint16 len = 0, hlen; + struct ipv6_exthdr *eh = (struct ipv6_exthdr *)h; + + while (IPV6_EXTHDR(eh->nexthdr)) { + if (eh->nexthdr == IPV6_EXTHDR_NONE) + return -1; + else if (eh->nexthdr == IPV6_EXTHDR_FRAGMENT) + hlen = 8; + else if (eh->nexthdr == IPV6_EXTHDR_AUTH) + hlen = (eh->hdrlen + 2) << 2; + else + hlen = IPV6_EXTHDR_LEN(eh); + + len += hlen; + eh = (struct ipv6_exthdr *)(h + len); + } + + *proto = eh->nexthdr; + return len; +} + +#define IPV4_ISMULTI(a) (((a) & 0xf0000000) == 0xe0000000) + +#define IPV4_MCAST_TO_ETHER_MCAST(ipv4, ether) \ +{ \ + ether[0] = 0x01; \ + ether[1] = 0x00; \ + ether[2] = 0x5E; \ + ether[3] = (ipv4 & 0x7f0000) >> 16; \ + ether[4] = (ipv4 & 0xff00) >> 8; \ + ether[5] = (ipv4 & 0xff); \ +} + +/* This marks the end of a packed structure section. */ +#include + +#endif /* _bcmip_h_ */ diff --git a/external/cache/sources/wl/include/proto/bcmipv6.h b/external/cache/sources/wl/include/proto/bcmipv6.h new file mode 100644 index 0000000..58bca9b --- /dev/null +++ b/external/cache/sources/wl/include/proto/bcmipv6.h @@ -0,0 +1,145 @@ +/* + * $Copyright Open Broadcom Corporation$ + * + * Fundamental constants relating to Neighbor Discovery Protocol + * + * $Id: bcmipv6.h 399481 2013-04-30 09:24:20Z cylee $ + */ + +#ifndef _bcmipv6_h_ +#define _bcmipv6_h_ + +#ifndef _TYPEDEFS_H_ +#include +#endif + +/* This marks the start of a packed structure section. */ +#include + +/* Extension headers */ +#define IPV6_EXT_HOP 0 +#define IPV6_EXT_ROUTE 43 +#define IPV6_EXT_FRAG 44 +#define IPV6_EXT_DEST 60 +#define IPV6_EXT_ESEC 50 +#define IPV6_EXT_AUTH 51 + +/* Minimum size (extension header "word" length) */ +#define IPV6_EXT_WORD 8 + +/* Offsets for most extension headers */ +#define IPV6_EXT_NEXTHDR 0 +#define IPV6_EXT_HDRLEN 1 + +/* Constants specific to fragmentation header */ +#define IPV6_FRAG_MORE_MASK 0x0001 +#define IPV6_FRAG_MORE_SHIFT 0 +#define IPV6_FRAG_OFFS_MASK 0xfff8 +#define IPV6_FRAG_OFFS_SHIFT 3 + +/* For icmpv6 */ +#define ICMPV6_HEADER_TYPE 0x3A +#define ICMPV6_PKT_TYPE_NS 135 +#define ICMPV6_PKT_TYPE_NA 136 + +#define ICMPV6_ND_OPT_TYPE_TARGET_MAC 2 +#define ICMPV6_ND_OPT_TYPE_SRC_MAC 1 + +#define ICMPV6_ND_OPT_LEN_LINKADDR 1 + +#define ICMPV6_ND_OPT_LEN_LINKADDR 1 + +#define IPV6_VERSION 6 +#define IPV6_HOP_LIMIT 255 + +#define IPV6_ADDR_NULL(a) ((a[0] | a[1] | a[2] | a[3] | a[4] | \ + a[5] | a[6] | a[7] | a[8] | a[9] | \ + a[10] | a[11] | a[12] | a[13] | \ + a[14] | a[15]) == 0) + +#define IPV6_ADDR_LOCAL(a) (((a[0] == 0xfe) && (a[1] & 0x80))? TRUE: FALSE) + +/* IPV6 address */ +BWL_PRE_PACKED_STRUCT struct ipv6_addr { + uint8 addr[16]; +} BWL_POST_PACKED_STRUCT; + +/* XXX use masks, htonl instead of bit fileds */ +#ifndef IL_BIGENDIAN + +/* ICMPV6 Header */ +BWL_PRE_PACKED_STRUCT struct icmp6_hdr { + uint8 icmp6_type; + uint8 icmp6_code; + uint16 icmp6_cksum; + BWL_PRE_PACKED_STRUCT union { + uint32 reserved; + BWL_PRE_PACKED_STRUCT struct nd_advt { + uint32 reserved1:5, + override:1, + solicited:1, + router:1, + reserved2:24; + } BWL_POST_PACKED_STRUCT nd_advt; + } BWL_POST_PACKED_STRUCT opt; +} BWL_POST_PACKED_STRUCT; + +/* Ipv6 Header Format */ +BWL_PRE_PACKED_STRUCT struct ipv6_hdr { + uint8 priority:4, + version:4; + uint8 flow_lbl[3]; + uint16 payload_len; + uint8 nexthdr; + uint8 hop_limit; + struct ipv6_addr saddr; + struct ipv6_addr daddr; +} BWL_POST_PACKED_STRUCT; + +/* Neighbor Advertisement/Solicitation Packet Structure */ +BWL_PRE_PACKED_STRUCT struct nd_msg { + struct icmp6_hdr icmph; + struct ipv6_addr target; +} BWL_POST_PACKED_STRUCT; + + +/* Neighibor Solicitation/Advertisement Optional Structure */ +BWL_PRE_PACKED_STRUCT struct nd_msg_opt { + uint8 type; + uint8 len; + uint8 mac_addr[ETHER_ADDR_LEN]; +} BWL_POST_PACKED_STRUCT; + +/* Ipv6 Fragmentation Header */ +BWL_PRE_PACKED_STRUCT struct ipv6_frag { + uint8 nexthdr; + uint8 reserved; + uint16 frag_offset; + uint32 ident; +} BWL_POST_PACKED_STRUCT; + +#endif /* IL_BIGENDIAN */ + +/* This marks the end of a packed structure section. */ +#include + +static const struct ipv6_addr all_node_ipv6_maddr = { + { 0xff, 0x2, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 0, + 0, 0, 0, 1 + }}; + +#define IPV6_ISMULTI(a) (a[0] == 0xff) + +#define IPV6_MCAST_TO_ETHER_MCAST(ipv6, ether) \ +{ \ + ether[0] = 0x33; \ + ether[1] = 0x33; \ + ether[2] = ipv6[12]; \ + ether[3] = ipv6[13]; \ + ether[4] = ipv6[14]; \ + ether[5] = ipv6[15]; \ +} + +#endif /* !defined(_bcmipv6_h_) */ diff --git a/external/cache/sources/wl/include/proto/bt_amp_hci.h b/external/cache/sources/wl/include/proto/bt_amp_hci.h new file mode 100644 index 0000000..4eef058 --- /dev/null +++ b/external/cache/sources/wl/include/proto/bt_amp_hci.h @@ -0,0 +1,423 @@ +/* + * BT-AMP (BlueTooth Alternate Mac and Phy) HCI (Host/Controller Interface) + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: bt_amp_hci.h 294267 2011-11-04 23:41:52Z $ +*/ + +#ifndef _bt_amp_hci_h +#define _bt_amp_hci_h + +/* This marks the start of a packed structure section. */ +#include + + +/* AMP HCI CMD packet format */ +typedef BWL_PRE_PACKED_STRUCT struct amp_hci_cmd { + uint16 opcode; + uint8 plen; + uint8 parms[1]; +} BWL_POST_PACKED_STRUCT amp_hci_cmd_t; + +#define HCI_CMD_PREAMBLE_SIZE OFFSETOF(amp_hci_cmd_t, parms) +#define HCI_CMD_DATA_SIZE 255 + +/* AMP HCI CMD opcode layout */ +#define HCI_CMD_OPCODE(ogf, ocf) ((((ogf) & 0x3F) << 10) | ((ocf) & 0x03FF)) +#define HCI_CMD_OGF(opcode) ((uint8)(((opcode) >> 10) & 0x3F)) +#define HCI_CMD_OCF(opcode) ((opcode) & 0x03FF) + +/* AMP HCI command opcodes */ +#define HCI_Read_Failed_Contact_Counter HCI_CMD_OPCODE(0x05, 0x0001) +#define HCI_Reset_Failed_Contact_Counter HCI_CMD_OPCODE(0x05, 0x0002) +#define HCI_Read_Link_Quality HCI_CMD_OPCODE(0x05, 0x0003) +#define HCI_Read_Local_AMP_Info HCI_CMD_OPCODE(0x05, 0x0009) +#define HCI_Read_Local_AMP_ASSOC HCI_CMD_OPCODE(0x05, 0x000A) +#define HCI_Write_Remote_AMP_ASSOC HCI_CMD_OPCODE(0x05, 0x000B) +#define HCI_Create_Physical_Link HCI_CMD_OPCODE(0x01, 0x0035) +#define HCI_Accept_Physical_Link_Request HCI_CMD_OPCODE(0x01, 0x0036) +#define HCI_Disconnect_Physical_Link HCI_CMD_OPCODE(0x01, 0x0037) +#define HCI_Create_Logical_Link HCI_CMD_OPCODE(0x01, 0x0038) +#define HCI_Accept_Logical_Link HCI_CMD_OPCODE(0x01, 0x0039) +#define HCI_Disconnect_Logical_Link HCI_CMD_OPCODE(0x01, 0x003A) +#define HCI_Logical_Link_Cancel HCI_CMD_OPCODE(0x01, 0x003B) +#define HCI_Flow_Spec_Modify HCI_CMD_OPCODE(0x01, 0x003C) +#define HCI_Write_Flow_Control_Mode HCI_CMD_OPCODE(0x01, 0x0067) +#define HCI_Read_Best_Effort_Flush_Timeout HCI_CMD_OPCODE(0x01, 0x0069) +#define HCI_Write_Best_Effort_Flush_Timeout HCI_CMD_OPCODE(0x01, 0x006A) +#define HCI_Short_Range_Mode HCI_CMD_OPCODE(0x01, 0x006B) +#define HCI_Reset HCI_CMD_OPCODE(0x03, 0x0003) +#define HCI_Read_Connection_Accept_Timeout HCI_CMD_OPCODE(0x03, 0x0015) +#define HCI_Write_Connection_Accept_Timeout HCI_CMD_OPCODE(0x03, 0x0016) +#define HCI_Read_Link_Supervision_Timeout HCI_CMD_OPCODE(0x03, 0x0036) +#define HCI_Write_Link_Supervision_Timeout HCI_CMD_OPCODE(0x03, 0x0037) +#define HCI_Enhanced_Flush HCI_CMD_OPCODE(0x03, 0x005F) +#define HCI_Read_Logical_Link_Accept_Timeout HCI_CMD_OPCODE(0x03, 0x0061) +#define HCI_Write_Logical_Link_Accept_Timeout HCI_CMD_OPCODE(0x03, 0x0062) +#define HCI_Set_Event_Mask_Page_2 HCI_CMD_OPCODE(0x03, 0x0063) +#define HCI_Read_Location_Data_Command HCI_CMD_OPCODE(0x03, 0x0064) +#define HCI_Write_Location_Data_Command HCI_CMD_OPCODE(0x03, 0x0065) +#define HCI_Read_Local_Version_Info HCI_CMD_OPCODE(0x04, 0x0001) +#define HCI_Read_Local_Supported_Commands HCI_CMD_OPCODE(0x04, 0x0002) +#define HCI_Read_Buffer_Size HCI_CMD_OPCODE(0x04, 0x0005) +#define HCI_Read_Data_Block_Size HCI_CMD_OPCODE(0x04, 0x000A) + +/* AMP HCI command parameters */ +typedef BWL_PRE_PACKED_STRUCT struct read_local_cmd_parms { + uint8 plh; + uint8 offset[2]; /* length so far */ + uint8 max_remote[2]; +} BWL_POST_PACKED_STRUCT read_local_cmd_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct write_remote_cmd_parms { + uint8 plh; + uint8 offset[2]; + uint8 len[2]; + uint8 frag[1]; +} BWL_POST_PACKED_STRUCT write_remote_cmd_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct phy_link_cmd_parms { + uint8 plh; + uint8 key_length; + uint8 key_type; + uint8 key[1]; +} BWL_POST_PACKED_STRUCT phy_link_cmd_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct dis_phy_link_cmd_parms { + uint8 plh; + uint8 reason; +} BWL_POST_PACKED_STRUCT dis_phy_link_cmd_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct log_link_cmd_parms { + uint8 plh; + uint8 txflow[16]; + uint8 rxflow[16]; +} BWL_POST_PACKED_STRUCT log_link_cmd_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct ext_flow_spec { + uint8 id; + uint8 service_type; + uint8 max_sdu[2]; + uint8 sdu_ia_time[4]; + uint8 access_latency[4]; + uint8 flush_timeout[4]; +} BWL_POST_PACKED_STRUCT ext_flow_spec_t; + +typedef BWL_PRE_PACKED_STRUCT struct log_link_cancel_cmd_parms { + uint8 plh; + uint8 tx_fs_ID; +} BWL_POST_PACKED_STRUCT log_link_cancel_cmd_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct flow_spec_mod_cmd_parms { + uint8 llh[2]; + uint8 txflow[16]; + uint8 rxflow[16]; +} BWL_POST_PACKED_STRUCT flow_spec_mod_cmd_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct plh_pad { + uint8 plh; + uint8 pad; +} BWL_POST_PACKED_STRUCT plh_pad_t; + +typedef BWL_PRE_PACKED_STRUCT union hci_handle { + uint16 bredr; + plh_pad_t amp; +} BWL_POST_PACKED_STRUCT hci_handle_t; + +typedef BWL_PRE_PACKED_STRUCT struct ls_to_cmd_parms { + hci_handle_t handle; + uint8 timeout[2]; +} BWL_POST_PACKED_STRUCT ls_to_cmd_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct befto_cmd_parms { + uint8 llh[2]; + uint8 befto[4]; +} BWL_POST_PACKED_STRUCT befto_cmd_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct srm_cmd_parms { + uint8 plh; + uint8 srm; +} BWL_POST_PACKED_STRUCT srm_cmd_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct ld_cmd_parms { + uint8 ld_aware; + uint8 ld[2]; + uint8 ld_opts; + uint8 l_opts; +} BWL_POST_PACKED_STRUCT ld_cmd_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct eflush_cmd_parms { + uint8 llh[2]; + uint8 packet_type; +} BWL_POST_PACKED_STRUCT eflush_cmd_parms_t; + +/* Generic AMP extended flow spec service types */ +#define EFS_SVCTYPE_NO_TRAFFIC 0 +#define EFS_SVCTYPE_BEST_EFFORT 1 +#define EFS_SVCTYPE_GUARANTEED 2 + +/* AMP HCI event packet format */ +typedef BWL_PRE_PACKED_STRUCT struct amp_hci_event { + uint8 ecode; + uint8 plen; + uint8 parms[1]; +} BWL_POST_PACKED_STRUCT amp_hci_event_t; + +#define HCI_EVT_PREAMBLE_SIZE OFFSETOF(amp_hci_event_t, parms) + +/* AMP HCI event codes */ +#define HCI_Command_Complete 0x0E +#define HCI_Command_Status 0x0F +#define HCI_Flush_Occurred 0x11 +#define HCI_Enhanced_Flush_Complete 0x39 +#define HCI_Physical_Link_Complete 0x40 +#define HCI_Channel_Select 0x41 +#define HCI_Disconnect_Physical_Link_Complete 0x42 +#define HCI_Logical_Link_Complete 0x45 +#define HCI_Disconnect_Logical_Link_Complete 0x46 +#define HCI_Flow_Spec_Modify_Complete 0x47 +#define HCI_Number_of_Completed_Data_Blocks 0x48 +#define HCI_Short_Range_Mode_Change_Complete 0x4C +#define HCI_Status_Change_Event 0x4D +#define HCI_Vendor_Specific 0xFF + +/* AMP HCI event mask bit positions */ +#define HCI_Physical_Link_Complete_Event_Mask 0x0001 +#define HCI_Channel_Select_Event_Mask 0x0002 +#define HCI_Disconnect_Physical_Link_Complete_Event_Mask 0x0004 +#define HCI_Logical_Link_Complete_Event_Mask 0x0020 +#define HCI_Disconnect_Logical_Link_Complete_Event_Mask 0x0040 +#define HCI_Flow_Spec_Modify_Complete_Event_Mask 0x0080 +#define HCI_Number_of_Completed_Data_Blocks_Event_Mask 0x0100 +#define HCI_Short_Range_Mode_Change_Complete_Event_Mask 0x1000 +#define HCI_Status_Change_Event_Mask 0x2000 +#define HCI_All_Event_Mask 0x31e7 +/* AMP HCI event parameters */ +typedef BWL_PRE_PACKED_STRUCT struct cmd_status_parms { + uint8 status; + uint8 cmdpkts; + uint16 opcode; +} BWL_POST_PACKED_STRUCT cmd_status_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct cmd_complete_parms { + uint8 cmdpkts; + uint16 opcode; + uint8 parms[1]; +} BWL_POST_PACKED_STRUCT cmd_complete_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct flush_occurred_evt_parms { + uint16 handle; +} BWL_POST_PACKED_STRUCT flush_occurred_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct write_remote_evt_parms { + uint8 status; + uint8 plh; +} BWL_POST_PACKED_STRUCT write_remote_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct read_local_evt_parms { + uint8 status; + uint8 plh; + uint16 len; + uint8 frag[1]; +} BWL_POST_PACKED_STRUCT read_local_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct read_local_info_evt_parms { + uint8 status; + uint8 AMP_status; + uint32 bandwidth; + uint32 gbandwidth; + uint32 latency; + uint32 PDU_size; + uint8 ctrl_type; + uint16 PAL_cap; + uint16 AMP_ASSOC_len; + uint32 max_flush_timeout; + uint32 be_flush_timeout; +} BWL_POST_PACKED_STRUCT read_local_info_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct log_link_evt_parms { + uint8 status; + uint16 llh; + uint8 plh; + uint8 tx_fs_ID; +} BWL_POST_PACKED_STRUCT log_link_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct disc_log_link_evt_parms { + uint8 status; + uint16 llh; + uint8 reason; +} BWL_POST_PACKED_STRUCT disc_log_link_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct log_link_cancel_evt_parms { + uint8 status; + uint8 plh; + uint8 tx_fs_ID; +} BWL_POST_PACKED_STRUCT log_link_cancel_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct flow_spec_mod_evt_parms { + uint8 status; + uint16 llh; +} BWL_POST_PACKED_STRUCT flow_spec_mod_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct phy_link_evt_parms { + uint8 status; + uint8 plh; +} BWL_POST_PACKED_STRUCT phy_link_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct dis_phy_link_evt_parms { + uint8 status; + uint8 plh; + uint8 reason; +} BWL_POST_PACKED_STRUCT dis_phy_link_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct read_ls_to_evt_parms { + uint8 status; + hci_handle_t handle; + uint16 timeout; +} BWL_POST_PACKED_STRUCT read_ls_to_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct read_lla_ca_to_evt_parms { + uint8 status; + uint16 timeout; +} BWL_POST_PACKED_STRUCT read_lla_ca_to_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct read_data_block_size_evt_parms { + uint8 status; + uint16 ACL_pkt_len; + uint16 data_block_len; + uint16 data_block_num; +} BWL_POST_PACKED_STRUCT read_data_block_size_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct data_blocks { + uint16 handle; + uint16 pkts; + uint16 blocks; +} BWL_POST_PACKED_STRUCT data_blocks_t; + +typedef BWL_PRE_PACKED_STRUCT struct num_completed_data_blocks_evt_parms { + uint16 num_blocks; + uint8 num_handles; + data_blocks_t completed[1]; +} BWL_POST_PACKED_STRUCT num_completed_data_blocks_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct befto_evt_parms { + uint8 status; + uint32 befto; +} BWL_POST_PACKED_STRUCT befto_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct srm_evt_parms { + uint8 status; + uint8 plh; + uint8 srm; +} BWL_POST_PACKED_STRUCT srm_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct contact_counter_evt_parms { + uint8 status; + uint8 llh[2]; + uint16 counter; +} BWL_POST_PACKED_STRUCT contact_counter_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct contact_counter_reset_evt_parms { + uint8 status; + uint8 llh[2]; +} BWL_POST_PACKED_STRUCT contact_counter_reset_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct read_linkq_evt_parms { + uint8 status; + hci_handle_t handle; + uint8 link_quality; +} BWL_POST_PACKED_STRUCT read_linkq_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct ld_evt_parms { + uint8 status; + uint8 ld_aware; + uint8 ld[2]; + uint8 ld_opts; + uint8 l_opts; +} BWL_POST_PACKED_STRUCT ld_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct eflush_complete_evt_parms { + uint16 handle; +} BWL_POST_PACKED_STRUCT eflush_complete_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct vendor_specific_evt_parms { + uint8 len; + uint8 parms[1]; +} BWL_POST_PACKED_STRUCT vendor_specific_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct local_version_info_evt_parms { + uint8 status; + uint8 hci_version; + uint16 hci_revision; + uint8 pal_version; + uint16 mfg_name; + uint16 pal_subversion; +} BWL_POST_PACKED_STRUCT local_version_info_evt_parms_t; + +#define MAX_SUPPORTED_CMD_BYTE 64 +typedef BWL_PRE_PACKED_STRUCT struct local_supported_cmd_evt_parms { + uint8 status; + uint8 cmd[MAX_SUPPORTED_CMD_BYTE]; +} BWL_POST_PACKED_STRUCT local_supported_cmd_evt_parms_t; + +typedef BWL_PRE_PACKED_STRUCT struct status_change_evt_parms { + uint8 status; + uint8 amp_status; +} BWL_POST_PACKED_STRUCT status_change_evt_parms_t; + +/* AMP HCI error codes */ +#define HCI_SUCCESS 0x00 +#define HCI_ERR_ILLEGAL_COMMAND 0x01 +#define HCI_ERR_NO_CONNECTION 0x02 +#define HCI_ERR_MEMORY_FULL 0x07 +#define HCI_ERR_CONNECTION_TIMEOUT 0x08 +#define HCI_ERR_MAX_NUM_OF_CONNECTIONS 0x09 +#define HCI_ERR_CONNECTION_EXISTS 0x0B +#define HCI_ERR_CONNECTION_DISALLOWED 0x0C +#define HCI_ERR_CONNECTION_ACCEPT_TIMEOUT 0x10 +#define HCI_ERR_UNSUPPORTED_VALUE 0x11 +#define HCI_ERR_ILLEGAL_PARAMETER_FMT 0x12 +#define HCI_ERR_CONN_TERM_BY_LOCAL_HOST 0x16 +#define HCI_ERR_UNSPECIFIED 0x1F +#define HCI_ERR_UNIT_KEY_USED 0x26 +#define HCI_ERR_QOS_REJECTED 0x2D +#define HCI_ERR_PARAM_OUT_OF_RANGE 0x30 +#define HCI_ERR_NO_SUITABLE_CHANNEL 0x39 +#define HCI_ERR_CHANNEL_MOVE 0xFF + +/* AMP HCI ACL Data packet format */ +typedef BWL_PRE_PACKED_STRUCT struct amp_hci_ACL_data { + uint16 handle; /* 12-bit connection handle + 2-bit PB and 2-bit BC flags */ + uint16 dlen; /* data total length */ + uint8 data[1]; +} BWL_POST_PACKED_STRUCT amp_hci_ACL_data_t; + +#define HCI_ACL_DATA_PREAMBLE_SIZE OFFSETOF(amp_hci_ACL_data_t, data) + +#define HCI_ACL_DATA_BC_FLAGS (0x0 << 14) +#define HCI_ACL_DATA_PB_FLAGS (0x3 << 12) + +#define HCI_ACL_DATA_HANDLE(handle) ((handle) & 0x0fff) +#define HCI_ACL_DATA_FLAGS(handle) ((handle) >> 12) + +/* AMP Activity Report packet formats */ +typedef BWL_PRE_PACKED_STRUCT struct amp_hci_activity_report { + uint8 ScheduleKnown; + uint8 NumReports; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT amp_hci_activity_report_t; + +typedef BWL_PRE_PACKED_STRUCT struct amp_hci_activity_report_triple { + uint32 StartTime; + uint32 Duration; + uint32 Periodicity; +} BWL_POST_PACKED_STRUCT amp_hci_activity_report_triple_t; + +#define HCI_AR_SCHEDULE_KNOWN 0x01 + + +/* This marks the end of a packed structure section. */ +#include + +#endif /* _bt_amp_hci_h_ */ diff --git a/external/cache/sources/wl/include/proto/eapol.h b/external/cache/sources/wl/include/proto/eapol.h new file mode 100644 index 0000000..8936d16 --- /dev/null +++ b/external/cache/sources/wl/include/proto/eapol.h @@ -0,0 +1,193 @@ +/* + * 802.1x EAPOL definitions + * + * See + * IEEE Std 802.1X-2001 + * IEEE 802.1X RADIUS Usage Guidelines + * + * Copyright (C) 2002 Broadcom Corporation + * + * $Id: eapol.h 241182 2011-02-17 21:50:03Z $ + */ + +#ifndef _eapol_h_ +#define _eapol_h_ + +#ifndef _TYPEDEFS_H_ +#include +#endif + +/* This marks the start of a packed structure section. */ +#include + +#include + +/* EAPOL for 802.3/Ethernet */ +typedef BWL_PRE_PACKED_STRUCT struct { + struct ether_header eth; /* 802.3/Ethernet header */ + unsigned char version; /* EAPOL protocol version */ + unsigned char type; /* EAPOL type */ + unsigned short length; /* Length of body */ + unsigned char body[1]; /* Body (optional) */ +} BWL_POST_PACKED_STRUCT eapol_header_t; + +#define EAPOL_HEADER_LEN 18 + +typedef struct { + unsigned char version; /* EAPOL protocol version */ + unsigned char type; /* EAPOL type */ + unsigned short length; /* Length of body */ +} eapol_hdr_t; + +#define EAPOL_HDR_LEN 4 + +/* EAPOL version */ +#define WPA2_EAPOL_VERSION 2 +#define WPA_EAPOL_VERSION 1 +#define LEAP_EAPOL_VERSION 1 +#define SES_EAPOL_VERSION 1 + +/* EAPOL types */ +#define EAP_PACKET 0 +#define EAPOL_START 1 +#define EAPOL_LOGOFF 2 +#define EAPOL_KEY 3 +#define EAPOL_ASF 4 + +/* EAPOL-Key types */ +#define EAPOL_RC4_KEY 1 +#define EAPOL_WPA2_KEY 2 /* 802.11i/WPA2 */ +#define EAPOL_WPA_KEY 254 /* WPA */ + +/* RC4 EAPOL-Key header field sizes */ +#define EAPOL_KEY_REPLAY_LEN 8 +#define EAPOL_KEY_IV_LEN 16 +#define EAPOL_KEY_SIG_LEN 16 + +/* RC4 EAPOL-Key */ +typedef BWL_PRE_PACKED_STRUCT struct { + unsigned char type; /* Key Descriptor Type */ + unsigned short length; /* Key Length (unaligned) */ + unsigned char replay[EAPOL_KEY_REPLAY_LEN]; /* Replay Counter */ + unsigned char iv[EAPOL_KEY_IV_LEN]; /* Key IV */ + unsigned char index; /* Key Flags & Index */ + unsigned char signature[EAPOL_KEY_SIG_LEN]; /* Key Signature */ + unsigned char key[1]; /* Key (optional) */ +} BWL_POST_PACKED_STRUCT eapol_key_header_t; + +#define EAPOL_KEY_HEADER_LEN 44 + +/* RC4 EAPOL-Key flags */ +#define EAPOL_KEY_FLAGS_MASK 0x80 +#define EAPOL_KEY_BROADCAST 0 +#define EAPOL_KEY_UNICAST 0x80 + +/* RC4 EAPOL-Key index */ +#define EAPOL_KEY_INDEX_MASK 0x7f + +/* WPA/802.11i/WPA2 EAPOL-Key header field sizes */ +#define EAPOL_WPA_KEY_REPLAY_LEN 8 +#define EAPOL_WPA_KEY_NONCE_LEN 32 +#define EAPOL_WPA_KEY_IV_LEN 16 +#define EAPOL_WPA_KEY_RSC_LEN 8 +#define EAPOL_WPA_KEY_ID_LEN 8 +#define EAPOL_WPA_KEY_MIC_LEN 16 +#define EAPOL_WPA_KEY_DATA_LEN (EAPOL_WPA_MAX_KEY_SIZE + AKW_BLOCK_LEN) +#define EAPOL_WPA_MAX_KEY_SIZE 32 + +/* WPA EAPOL-Key */ +typedef BWL_PRE_PACKED_STRUCT struct { + unsigned char type; /* Key Descriptor Type */ + unsigned short key_info; /* Key Information (unaligned) */ + unsigned short key_len; /* Key Length (unaligned) */ + unsigned char replay[EAPOL_WPA_KEY_REPLAY_LEN]; /* Replay Counter */ + unsigned char nonce[EAPOL_WPA_KEY_NONCE_LEN]; /* Nonce */ + unsigned char iv[EAPOL_WPA_KEY_IV_LEN]; /* Key IV */ + unsigned char rsc[EAPOL_WPA_KEY_RSC_LEN]; /* Key RSC */ + unsigned char id[EAPOL_WPA_KEY_ID_LEN]; /* WPA:Key ID, 802.11i/WPA2: Reserved */ + unsigned char mic[EAPOL_WPA_KEY_MIC_LEN]; /* Key MIC */ + unsigned short data_len; /* Key Data Length */ + unsigned char data[EAPOL_WPA_KEY_DATA_LEN]; /* Key data */ +} BWL_POST_PACKED_STRUCT eapol_wpa_key_header_t; + +#define EAPOL_WPA_KEY_LEN 95 + +/* WPA/802.11i/WPA2 KEY KEY_INFO bits */ +#define WPA_KEY_DESC_V1 0x01 +#define WPA_KEY_DESC_V2 0x02 +#define WPA_KEY_DESC_V3 0x03 +#define WPA_KEY_PAIRWISE 0x08 +#define WPA_KEY_INSTALL 0x40 +#define WPA_KEY_ACK 0x80 +#define WPA_KEY_MIC 0x100 +#define WPA_KEY_SECURE 0x200 +#define WPA_KEY_ERROR 0x400 +#define WPA_KEY_REQ 0x800 + +#define WPA_KEY_DESC_V2_OR_V3 WPA_KEY_DESC_V2 + +/* WPA-only KEY KEY_INFO bits */ +#define WPA_KEY_INDEX_0 0x00 +#define WPA_KEY_INDEX_1 0x10 +#define WPA_KEY_INDEX_2 0x20 +#define WPA_KEY_INDEX_3 0x30 +#define WPA_KEY_INDEX_MASK 0x30 +#define WPA_KEY_INDEX_SHIFT 0x04 + +/* 802.11i/WPA2-only KEY KEY_INFO bits */ +#define WPA_KEY_ENCRYPTED_DATA 0x1000 + +/* Key Data encapsulation */ +typedef BWL_PRE_PACKED_STRUCT struct { + uint8 type; + uint8 length; + uint8 oui[3]; + uint8 subtype; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT eapol_wpa2_encap_data_t; + +#define EAPOL_WPA2_ENCAP_DATA_HDR_LEN 6 + +#define WPA2_KEY_DATA_SUBTYPE_GTK 1 +#define WPA2_KEY_DATA_SUBTYPE_STAKEY 2 +#define WPA2_KEY_DATA_SUBTYPE_MAC 3 +#define WPA2_KEY_DATA_SUBTYPE_PMKID 4 +#define WPA2_KEY_DATA_SUBTYPE_IGTK 9 + +/* GTK encapsulation */ +typedef BWL_PRE_PACKED_STRUCT struct { + uint8 flags; + uint8 reserved; + uint8 gtk[EAPOL_WPA_MAX_KEY_SIZE]; +} BWL_POST_PACKED_STRUCT eapol_wpa2_key_gtk_encap_t; + +#define EAPOL_WPA2_KEY_GTK_ENCAP_HDR_LEN 2 + +#define WPA2_GTK_INDEX_MASK 0x03 +#define WPA2_GTK_INDEX_SHIFT 0x00 + +#define WPA2_GTK_TRANSMIT 0x04 + +/* IGTK encapsulation */ +typedef BWL_PRE_PACKED_STRUCT struct { + uint16 key_id; + uint8 ipn[6]; + uint8 key[EAPOL_WPA_MAX_KEY_SIZE]; +} BWL_POST_PACKED_STRUCT eapol_wpa2_key_igtk_encap_t; + +#define EAPOL_WPA2_KEY_IGTK_ENCAP_HDR_LEN 8 + +/* STAKey encapsulation */ +typedef BWL_PRE_PACKED_STRUCT struct { + uint8 reserved[2]; + uint8 mac[ETHER_ADDR_LEN]; + uint8 stakey[EAPOL_WPA_MAX_KEY_SIZE]; +} BWL_POST_PACKED_STRUCT eapol_wpa2_key_stakey_encap_t; + +#define WPA2_KEY_DATA_PAD 0xdd + + +/* This marks the end of a packed structure section. */ +#include + +#endif /* _eapol_h_ */ diff --git a/external/cache/sources/wl/include/proto/ethernet.h b/external/cache/sources/wl/include/proto/ethernet.h new file mode 100644 index 0000000..87dd842 --- /dev/null +++ b/external/cache/sources/wl/include/proto/ethernet.h @@ -0,0 +1,228 @@ +/* + * From FreeBSD 2.2.7: Fundamental constants relating to ethernet. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: ethernet.h 401759 2013-05-13 16:08:08Z sudhirbs $ + */ + +#ifndef _NET_ETHERNET_H_ /* use native BSD ethernet.h when available */ +#define _NET_ETHERNET_H_ + +#ifndef _TYPEDEFS_H_ +#include "typedefs.h" +#endif + +/* This marks the start of a packed structure section. */ +#include + + +/* + * The number of bytes in an ethernet (MAC) address. + */ +#define ETHER_ADDR_LEN 6 + +/* + * The number of bytes in the type field. + */ +#define ETHER_TYPE_LEN 2 + +/* + * The number of bytes in the trailing CRC field. + */ +#define ETHER_CRC_LEN 4 + +/* + * The length of the combined header. + */ +#define ETHER_HDR_LEN (ETHER_ADDR_LEN * 2 + ETHER_TYPE_LEN) + +/* + * The minimum packet length. + */ +#define ETHER_MIN_LEN 64 + +/* + * The minimum packet user data length. + */ +#define ETHER_MIN_DATA 46 + +/* + * The maximum packet length. + */ +#define ETHER_MAX_LEN 1518 + +/* + * The maximum packet user data length. + */ +#define ETHER_MAX_DATA 1500 + +/* ether types */ +#define ETHER_TYPE_MIN 0x0600 /* Anything less than MIN is a length */ +#define ETHER_TYPE_IP 0x0800 /* IP */ +#define ETHER_TYPE_ARP 0x0806 /* ARP */ +#define ETHER_TYPE_8021Q 0x8100 /* 802.1Q */ +#define ETHER_TYPE_IPV6 0x86dd /* IPv6 */ +#define ETHER_TYPE_BRCM 0x886c /* Broadcom Corp. */ +#define ETHER_TYPE_802_1X 0x888e /* 802.1x */ +#ifdef PLC +#define ETHER_TYPE_88E1 0x88e1 /* GIGLE */ +#define ETHER_TYPE_8912 0x8912 /* GIGLE */ +#define ETHER_TYPE_GIGLED 0xffff /* GIGLE */ +#endif /* PLC */ +#define ETHER_TYPE_802_1X_PREAUTH 0x88c7 /* 802.1x preauthentication */ +#define ETHER_TYPE_WAI 0x88b4 /* WAI */ +#define ETHER_TYPE_89_0D 0x890d /* 89-0d frame for TDLS */ + +#define ETHER_TYPE_PPP_SES 0x8864 /* PPPoE Session */ + +#define ETHER_TYPE_IAPP_L2_UPDATE 0x6 /* IAPP L2 update frame */ + +/* Broadcom subtype follows ethertype; First 2 bytes are reserved; Next 2 are subtype; */ +#define ETHER_BRCM_SUBTYPE_LEN 4 /* Broadcom 4 byte subtype */ + +/* ether header */ +#define ETHER_DEST_OFFSET (0 * ETHER_ADDR_LEN) /* dest address offset */ +#define ETHER_SRC_OFFSET (1 * ETHER_ADDR_LEN) /* src address offset */ +#define ETHER_TYPE_OFFSET (2 * ETHER_ADDR_LEN) /* ether type offset */ + +/* + * A macro to validate a length with + */ +#define ETHER_IS_VALID_LEN(foo) \ + ((foo) >= ETHER_MIN_LEN && (foo) <= ETHER_MAX_LEN) + +#define ETHER_FILL_MCAST_ADDR_FROM_IP(ea, mgrp_ip) { \ + ((uint8 *)ea)[0] = 0x01; \ + ((uint8 *)ea)[1] = 0x00; \ + ((uint8 *)ea)[2] = 0x5e; \ + ((uint8 *)ea)[3] = ((mgrp_ip) >> 16) & 0x7f; \ + ((uint8 *)ea)[4] = ((mgrp_ip) >> 8) & 0xff; \ + ((uint8 *)ea)[5] = ((mgrp_ip) >> 0) & 0xff; \ +} + +#ifndef __INCif_etherh /* Quick and ugly hack for VxWorks */ +/* + * Structure of a 10Mb/s Ethernet header. + */ +BWL_PRE_PACKED_STRUCT struct ether_header { + uint8 ether_dhost[ETHER_ADDR_LEN]; + uint8 ether_shost[ETHER_ADDR_LEN]; + uint16 ether_type; +} BWL_POST_PACKED_STRUCT; + +/* + * Structure of a 48-bit Ethernet address. + */ +BWL_PRE_PACKED_STRUCT struct ether_addr { + uint8 octet[ETHER_ADDR_LEN]; +} BWL_POST_PACKED_STRUCT; +#elif defined(VX_BSD4_3) && VX_BSD4_3 +/* + * Structure of a 48-bit Ethernet address. + */ +BWL_PRE_PACKED_STRUCT struct ether_addr { + uint8 octet[ETHER_ADDR_LEN]; +} BWL_POST_PACKED_STRUCT; +#endif /* !__INCif_etherh Quick and ugly hack for VxWorks */ + +/* + * Takes a pointer, set, test, clear, toggle locally admininistered + * address bit in the 48-bit Ethernet address. + */ +#define ETHER_SET_LOCALADDR(ea) (((uint8 *)(ea))[0] = (((uint8 *)(ea))[0] | 2)) +#define ETHER_IS_LOCALADDR(ea) (((uint8 *)(ea))[0] & 2) +#define ETHER_CLR_LOCALADDR(ea) (((uint8 *)(ea))[0] = (((uint8 *)(ea))[0] & 0xfd)) +#define ETHER_TOGGLE_LOCALADDR(ea) (((uint8 *)(ea))[0] = (((uint8 *)(ea))[0] ^ 2)) + +/* Takes a pointer, marks unicast address bit in the MAC address */ +#define ETHER_SET_UNICAST(ea) (((uint8 *)(ea))[0] = (((uint8 *)(ea))[0] & ~1)) + +/* + * Takes a pointer, returns true if a 48-bit multicast address + * (including broadcast, since it is all ones) + */ +#define ETHER_ISMULTI(ea) (((const uint8 *)(ea))[0] & 1) + + +/* compare two ethernet addresses - assumes the pointers can be referenced as shorts */ +#define eacmp(a, b) ((((const uint16 *)(a))[0] ^ ((const uint16 *)(b))[0]) | \ + (((const uint16 *)(a))[1] ^ ((const uint16 *)(b))[1]) | \ + (((const uint16 *)(a))[2] ^ ((const uint16 *)(b))[2])) + +#define ether_cmp(a, b) eacmp(a, b) + +/* copy an ethernet address - assumes the pointers can be referenced as shorts */ +#define eacopy(s, d) \ +do { \ + ((uint16 *)(d))[0] = ((const uint16 *)(s))[0]; \ + ((uint16 *)(d))[1] = ((const uint16 *)(s))[1]; \ + ((uint16 *)(d))[2] = ((const uint16 *)(s))[2]; \ +} while (0) + +#define ether_copy(s, d) eacopy(s, d) + +/* Copy an ethernet address in reverse order */ +#define ether_rcopy(s, d) \ +do { \ + ((uint16 *)(d))[2] = ((uint16 *)(s))[2]; \ + ((uint16 *)(d))[1] = ((uint16 *)(s))[1]; \ + ((uint16 *)(d))[0] = ((uint16 *)(s))[0]; \ +} while (0) + + +#ifdef _HNDRTE_ + +/* Dongles use bcmutils functions instead of macros. + * Possibly slower but saves over 800 bytes off THUMB dongle image. + */ + +extern const struct ether_addr ether_bcast; +extern const struct ether_addr ether_null; +extern const struct ether_addr ether_ipv6_mcast; + +extern int ether_isbcast(const void *ea); +extern int ether_isnulladdr(const void *ea); + +#define ETHER_ISBCAST(ea) ether_isbcast(ea) +#define ETHER_ISNULLADDR(ea) ether_isnulladdr(ea) + +#else /* !_HNDRTE_ */ + +static const struct ether_addr ether_bcast = {{255, 255, 255, 255, 255, 255}}; +static const struct ether_addr ether_null = {{0, 0, 0, 0, 0, 0}}; +static const struct ether_addr ether_ipv6_mcast = {{0x33, 0x33, 0x00, 0x00, 0x00, 0x01}}; + +#define ETHER_ISBCAST(ea) ((((const uint8 *)(ea))[0] & \ + ((const uint8 *)(ea))[1] & \ + ((const uint8 *)(ea))[2] & \ + ((const uint8 *)(ea))[3] & \ + ((const uint8 *)(ea))[4] & \ + ((const uint8 *)(ea))[5]) == 0xff) +#define ETHER_ISNULLADDR(ea) ((((const uint8 *)(ea))[0] | \ + ((const uint8 *)(ea))[1] | \ + ((const uint8 *)(ea))[2] | \ + ((const uint8 *)(ea))[3] | \ + ((const uint8 *)(ea))[4] | \ + ((const uint8 *)(ea))[5]) == 0) + +#endif /* !_HNDRTE_ */ + +#define ETHER_ISNULLDEST(da) ((((const uint16 *)(da))[0] | \ + ((const uint16 *)(da))[1] | \ + ((const uint16 *)(da))[2]) == 0) +#define ETHER_ISNULLSRC(sa) ETHER_ISNULLDEST(sa) + +#define ETHER_MOVE_HDR(d, s) \ +do { \ + struct ether_header t; \ + t = *(struct ether_header *)(s); \ + *(struct ether_header *)(d) = t; \ +} while (0) + +#define ETHER_ISUCAST(ea) ((((uint8 *)(ea))[0] & 0x01) == 0) + +/* This marks the end of a packed structure section. */ +#include + +#endif /* _NET_ETHERNET_H_ */ diff --git a/external/cache/sources/wl/include/proto/p2p.h b/external/cache/sources/wl/include/proto/p2p.h new file mode 100644 index 0000000..c2ead9c --- /dev/null +++ b/external/cache/sources/wl/include/proto/p2p.h @@ -0,0 +1,496 @@ +/* + * $Copyright Open Broadcom Corporation$ + * + * Fundamental types and constants relating to WFA P2P (aka WiFi Direct) + * + * $Id: p2p.h 338828 2012-06-14 17:24:45Z harveysm $ + */ + +#ifndef _P2P_H_ +#define _P2P_H_ + +#ifndef _TYPEDEFS_H_ +#include +#endif +#include +#include + +/* This marks the start of a packed structure section. */ +#include + + +/* WiFi P2P OUI values */ +#define P2P_OUI WFA_OUI /* WiFi P2P OUI */ +#define P2P_VER WFA_OUI_TYPE_P2P /* P2P version: 9=WiFi P2P v1.0 */ + +#define P2P_IE_ID 0xdd /* P2P IE element ID */ + +/* WiFi P2P IE */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_ie { + uint8 id; /* IE ID: 0xDD */ + uint8 len; /* IE length */ + uint8 OUI[3]; /* WiFi P2P specific OUI: P2P_OUI */ + uint8 oui_type; /* Identifies P2P version: P2P_VER */ + uint8 subelts[1]; /* variable length subelements */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_ie wifi_p2p_ie_t; + +#define P2P_IE_FIXED_LEN 6 + +#define P2P_ATTR_ID_OFF 0 +#define P2P_ATTR_LEN_OFF 1 +#define P2P_ATTR_DATA_OFF 3 + +#define P2P_ATTR_HDR_LEN 3 /* ID + 2-byte length field spec 1.02 */ + +/* P2P IE Subelement IDs from WiFi P2P Technical Spec 1.00 */ +#define P2P_SEID_STATUS 0 /* Status */ +#define P2P_SEID_MINOR_RC 1 /* Minor Reason Code */ +#define P2P_SEID_P2P_INFO 2 /* P2P Capability (capabilities info) */ +#define P2P_SEID_DEV_ID 3 /* P2P Device ID */ +#define P2P_SEID_INTENT 4 /* Group Owner Intent */ +#define P2P_SEID_CFG_TIMEOUT 5 /* Configuration Timeout */ +#define P2P_SEID_CHANNEL 6 /* Listen channel */ +#define P2P_SEID_GRP_BSSID 7 /* P2P Group BSSID */ +#define P2P_SEID_XT_TIMING 8 /* Extended Listen Timing */ +#define P2P_SEID_INTINTADDR 9 /* Intended P2P Interface Address */ +#define P2P_SEID_P2P_MGBTY 10 /* P2P Manageability */ +#define P2P_SEID_CHAN_LIST 11 /* Channel List */ +#define P2P_SEID_ABSENCE 12 /* Notice of Absence */ +#define P2P_SEID_DEV_INFO 13 /* Device Info */ +#define P2P_SEID_GROUP_INFO 14 /* Group Info */ +#define P2P_SEID_GROUP_ID 15 /* Group ID */ +#define P2P_SEID_P2P_IF 16 /* P2P Interface */ +#define P2P_SEID_OP_CHANNEL 17 /* Operating channel */ +#define P2P_SEID_INVITE_FLAGS 18 /* Invitation flags */ +#define P2P_SEID_VNDR 221 /* Vendor-specific subelement */ + +#define P2P_SE_VS_ID_SERVICES 0x1b /* BRCM proprietary subel: L2 Services */ + + +/* WiFi P2P IE subelement: P2P Capability (capabilities info) */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_info_se_s { + uint8 eltId; /* SE ID: P2P_SEID_P2P_INFO */ + uint8 len[2]; /* SE length not including eltId, len fields */ + uint8 dev; /* Device Capability Bitmap */ + uint8 group; /* Group Capability Bitmap */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_info_se_s wifi_p2p_info_se_t; + +/* P2P Capability subelement's Device Capability Bitmap bit values */ +#define P2P_CAPSE_DEV_SERVICE_DIS 0x1 /* Service Discovery */ +#define P2P_CAPSE_DEV_CLIENT_DIS 0x2 /* Client Discoverability */ +#define P2P_CAPSE_DEV_CONCURRENT 0x4 /* Concurrent Operation */ +#define P2P_CAPSE_DEV_INFRA_MAN 0x8 /* P2P Infrastructure Managed */ +#define P2P_CAPSE_DEV_LIMIT 0x10 /* P2P Device Limit */ +#define P2P_CAPSE_INVITE_PROC 0x20 /* P2P Invitation Procedure */ + +/* P2P Capability subelement's Group Capability Bitmap bit values */ +#define P2P_CAPSE_GRP_OWNER 0x1 /* P2P Group Owner */ +#define P2P_CAPSE_PERSIST_GRP 0x2 /* Persistent P2P Group */ +#define P2P_CAPSE_GRP_LIMIT 0x4 /* P2P Group Limit */ +#define P2P_CAPSE_GRP_INTRA_BSS 0x8 /* Intra-BSS Distribution */ +#define P2P_CAPSE_GRP_X_CONNECT 0x10 /* Cross Connection */ +#define P2P_CAPSE_GRP_PERSISTENT 0x20 /* Persistent Reconnect */ +#define P2P_CAPSE_GRP_FORMATION 0x40 /* Group Formation */ + + +/* WiFi P2P IE subelement: Group Owner Intent */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_intent_se_s { + uint8 eltId; /* SE ID: P2P_SEID_INTENT */ + uint8 len[2]; /* SE length not including eltId, len fields */ + uint8 intent; /* Intent Value 0...15 (0=legacy 15=master only) */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_intent_se_s wifi_p2p_intent_se_t; + +/* WiFi P2P IE subelement: Configuration Timeout */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_cfg_tmo_se_s { + uint8 eltId; /* SE ID: P2P_SEID_CFG_TIMEOUT */ + uint8 len[2]; /* SE length not including eltId, len fields */ + uint8 go_tmo; /* GO config timeout in units of 10 ms */ + uint8 client_tmo; /* Client config timeout in units of 10 ms */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_cfg_tmo_se_s wifi_p2p_cfg_tmo_se_t; + + +/* WiFi P2P IE subelement: Status */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_status_se_s { + uint8 eltId; /* SE ID: P2P_SEID_STATUS */ + uint8 len[2]; /* SE length not including eltId, len fields */ + uint8 status; /* Status Code: P2P_STATSE_* */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_status_se_s wifi_p2p_status_se_t; + +/* Status subelement Status Code definitions */ +#define P2P_STATSE_SUCCESS 0 + /* Success */ +#define P2P_STATSE_FAIL_INFO_CURR_UNAVAIL 1 + /* Failed, information currently unavailable */ +#define P2P_STATSE_PASSED_UP P2P_STATSE_FAIL_INFO_CURR_UNAVAIL + /* Old name for above in P2P spec 1.08 and older */ +#define P2P_STATSE_FAIL_INCOMPAT_PARAMS 2 + /* Failed, incompatible parameters */ +#define P2P_STATSE_FAIL_LIMIT_REACHED 3 + /* Failed, limit reached */ +#define P2P_STATSE_FAIL_INVALID_PARAMS 4 + /* Failed, invalid parameters */ +#define P2P_STATSE_FAIL_UNABLE_TO_ACCOM 5 + /* Failed, unable to accomodate request */ +#define P2P_STATSE_FAIL_PROTO_ERROR 6 + /* Failed, previous protocol error or disruptive behaviour */ +#define P2P_STATSE_FAIL_NO_COMMON_CHAN 7 + /* Failed, no common channels */ +#define P2P_STATSE_FAIL_UNKNOWN_GROUP 8 + /* Failed, unknown P2P Group */ +#define P2P_STATSE_FAIL_INTENT 9 + /* Failed, both peers indicated Intent 15 in GO Negotiation */ +#define P2P_STATSE_FAIL_INCOMPAT_PROVIS 10 + /* Failed, incompatible provisioning method */ +#define P2P_STATSE_FAIL_USER_REJECT 11 + /* Failed, rejected by user */ + +/* WiFi P2P IE attribute: Extended Listen Timing */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_ext_se_s { + uint8 eltId; /* ID: P2P_SEID_EXT_TIMING */ + uint8 len[2]; /* length not including eltId, len fields */ + uint8 avail[2]; /* availibility period */ + uint8 interval[2]; /* availibility interval */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_ext_se_s wifi_p2p_ext_se_t; + +#define P2P_EXT_MIN 10 /* minimum 10ms */ + +/* WiFi P2P IE subelement: Intended P2P Interface Address */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_intintad_se_s { + uint8 eltId; /* SE ID: P2P_SEID_INTINTADDR */ + uint8 len[2]; /* SE length not including eltId, len fields */ + uint8 mac[6]; /* intended P2P interface MAC address */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_intintad_se_s wifi_p2p_intintad_se_t; + +/* WiFi P2P IE subelement: Channel */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_channel_se_s { + uint8 eltId; /* SE ID: P2P_SEID_STATUS */ + uint8 len[2]; /* SE length not including eltId, len fields */ + uint8 band; /* Regulatory Class (band) */ + uint8 channel; /* Channel */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_channel_se_s wifi_p2p_channel_se_t; + + +/* Channel Entry structure within the Channel List SE */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_chanlist_entry_s { + uint8 band; /* Regulatory Class (band) */ + uint8 num_channels; /* # of channels in the channel list */ + uint8 channels[WL_NUMCHANNELS]; /* Channel List */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_chanlist_entry_s wifi_p2p_chanlist_entry_t; +#define WIFI_P2P_CHANLIST_SE_MAX_ENTRIES 2 + +/* WiFi P2P IE subelement: Channel List */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_chanlist_se_s { + uint8 eltId; /* SE ID: P2P_SEID_STATUS */ + uint8 len[2]; /* SE length not including eltId, len fields */ + uint8 country[3]; /* Country String */ + uint8 num_entries; /* # of channel entries */ + wifi_p2p_chanlist_entry_t entries[WIFI_P2P_CHANLIST_SE_MAX_ENTRIES]; + /* Channel Entry List */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_chanlist_se_s wifi_p2p_chanlist_se_t; + +/* WiFi P2P IE's Device Info subelement */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_devinfo_se_s { + uint8 eltId; /* SE ID: P2P_SEID_DEVINFO */ + uint8 len[2]; /* SE length not including eltId, len fields */ + uint8 mac[6]; /* P2P Device MAC address */ + uint16 wps_cfg_meths; /* Config Methods: reg_prototlv.h WPS_CONFMET_* */ + uint8 pri_devtype[8]; /* Primary Device Type */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_devinfo_se_s wifi_p2p_devinfo_se_t; + +#define P2P_DEV_TYPE_LEN 8 + +/* WiFi P2P IE's Group Info subelement Client Info Descriptor */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_cid_fixed_s { + uint8 len; + uint8 devaddr[ETHER_ADDR_LEN]; /* P2P Device Address */ + uint8 ifaddr[ETHER_ADDR_LEN]; /* P2P Interface Address */ + uint8 devcap; /* Device Capability */ + uint8 cfg_meths[2]; /* Config Methods: reg_prototlv.h WPS_CONFMET_* */ + uint8 pridt[P2P_DEV_TYPE_LEN]; /* Primary Device Type */ + uint8 secdts; /* Number of Secondary Device Types */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_cid_fixed_s wifi_p2p_cid_fixed_t; + +/* WiFi P2P IE's Device ID subelement */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_devid_se_s { + uint8 eltId; + uint8 len[2]; + struct ether_addr addr; /* P2P Device MAC address */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_devid_se_s wifi_p2p_devid_se_t; + +/* WiFi P2P IE subelement: P2P Manageability */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_mgbt_se_s { + uint8 eltId; /* SE ID: P2P_SEID_P2P_MGBTY */ + uint8 len[2]; /* SE length not including eltId, len fields */ + uint8 mg_bitmap; /* manageability bitmap */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_mgbt_se_s wifi_p2p_mgbt_se_t; +/* mg_bitmap field bit values */ +#define P2P_MGBTSE_P2PDEVMGMT_FLAG 0x1 /* AP supports Managed P2P Device */ + +/* WiFi P2P IE subelement: Group Info */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_grpinfo_se_s { + uint8 eltId; /* SE ID: P2P_SEID_GROUP_INFO */ + uint8 len[2]; /* SE length not including eltId, len fields */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_grpinfo_se_s wifi_p2p_grpinfo_se_t; + + +/* WiFi P2P Action Frame */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_action_frame { + uint8 category; /* P2P_AF_CATEGORY */ + uint8 OUI[3]; /* OUI - P2P_OUI */ + uint8 type; /* OUI Type - P2P_VER */ + uint8 subtype; /* OUI Subtype - P2P_AF_* */ + uint8 dialog_token; /* nonzero, identifies req/resp tranaction */ + uint8 elts[1]; /* Variable length information elements. Max size = + * ACTION_FRAME_SIZE - sizeof(this structure) - 1 + */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_action_frame wifi_p2p_action_frame_t; +#define P2P_AF_CATEGORY 0x7f + +#define P2P_AF_FIXED_LEN 7 + +/* WiFi P2P Action Frame OUI Subtypes */ +#define P2P_AF_NOTICE_OF_ABSENCE 0 /* Notice of Absence */ +#define P2P_AF_PRESENCE_REQ 1 /* P2P Presence Request */ +#define P2P_AF_PRESENCE_RSP 2 /* P2P Presence Response */ +#define P2P_AF_GO_DISC_REQ 3 /* GO Discoverability Request */ + + +/* WiFi P2P Public Action Frame */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_pub_act_frame { + uint8 category; /* P2P_PUB_AF_CATEGORY */ + uint8 action; /* P2P_PUB_AF_ACTION */ + uint8 oui[3]; /* P2P_OUI */ + uint8 oui_type; /* OUI type - P2P_VER */ + uint8 subtype; /* OUI subtype - P2P_TYPE_* */ + uint8 dialog_token; /* nonzero, identifies req/rsp transaction */ + uint8 elts[1]; /* Variable length information elements. Max size = + * ACTION_FRAME_SIZE - sizeof(this structure) - 1 + */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_pub_act_frame wifi_p2p_pub_act_frame_t; +#define P2P_PUB_AF_FIXED_LEN 8 +#define P2P_PUB_AF_CATEGORY 0x04 +#define P2P_PUB_AF_ACTION 0x09 + +/* WiFi P2P Public Action Frame OUI Subtypes */ +#define P2P_PAF_GON_REQ 0 /* Group Owner Negotiation Req */ +#define P2P_PAF_GON_RSP 1 /* Group Owner Negotiation Rsp */ +#define P2P_PAF_GON_CONF 2 /* Group Owner Negotiation Confirm */ +#define P2P_PAF_INVITE_REQ 3 /* P2P Invitation Request */ +#define P2P_PAF_INVITE_RSP 4 /* P2P Invitation Response */ +#define P2P_PAF_DEVDIS_REQ 5 /* Device Discoverability Request */ +#define P2P_PAF_DEVDIS_RSP 6 /* Device Discoverability Response */ +#define P2P_PAF_PROVDIS_REQ 7 /* Provision Discovery Request */ +#define P2P_PAF_PROVDIS_RSP 8 /* Provision Discovery Request */ + +/* TODO: Stop using these obsolete aliases for P2P_PAF_GON_* */ +#define P2P_TYPE_MNREQ P2P_PAF_GON_REQ +#define P2P_TYPE_MNRSP P2P_PAF_GON_RSP +#define P2P_TYPE_MNCONF P2P_PAF_GON_CONF + +/* WiFi P2P IE subelement: Notice of Absence */ +BWL_PRE_PACKED_STRUCT struct wifi_p2p_noa_desc { + uint8 cnt_type; /* Count/Type */ + uint32 duration; /* Duration */ + uint32 interval; /* Interval */ + uint32 start; /* Start Time */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_noa_desc wifi_p2p_noa_desc_t; + +BWL_PRE_PACKED_STRUCT struct wifi_p2p_noa_se { + uint8 eltId; /* Subelement ID */ + uint8 len[2]; /* Length */ + uint8 index; /* Index */ + uint8 ops_ctw_parms; /* CTWindow and OppPS Parameters */ + wifi_p2p_noa_desc_t desc[1]; /* Notice of Absence Descriptor(s) */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2p_noa_se wifi_p2p_noa_se_t; + +#define P2P_NOA_SE_FIXED_LEN 5 + +/* cnt_type field values */ +#define P2P_NOA_DESC_CNT_RESERVED 0 /* reserved and should not be used */ +#define P2P_NOA_DESC_CNT_REPEAT 255 /* continuous schedule */ +#define P2P_NOA_DESC_TYPE_PREFERRED 1 /* preferred values */ +#define P2P_NOA_DESC_TYPE_ACCEPTABLE 2 /* acceptable limits */ + +/* ctw_ops_parms field values */ +#define P2P_NOA_CTW_MASK 0x7f +#define P2P_NOA_OPS_MASK 0x80 +#define P2P_NOA_OPS_SHIFT 7 + +#define P2P_CTW_MIN 10 /* minimum 10TU */ + +/* + * P2P Service Discovery related + */ +#define P2PSD_ACTION_CATEGORY 0x04 + /* Public action frame */ +#define P2PSD_ACTION_ID_GAS_IREQ 0x0a + /* Action value for GAS Initial Request AF */ +#define P2PSD_ACTION_ID_GAS_IRESP 0x0b + /* Action value for GAS Initial Response AF */ +#define P2PSD_ACTION_ID_GAS_CREQ 0x0c + /* Action value for GAS Comback Request AF */ +#define P2PSD_ACTION_ID_GAS_CRESP 0x0d + /* Action value for GAS Comback Response AF */ +#define P2PSD_AD_EID 0x6c + /* Advertisement Protocol IE ID */ +#define P2PSD_ADP_TUPLE_QLMT_PAMEBI 0x00 + /* Query Response Length Limit 7 bits plus PAME-BI 1 bit */ +#define P2PSD_ADP_PROTO_ID 0x00 + /* Advertisement Protocol ID. Always 0 for P2P SD */ +#define P2PSD_GAS_OUI P2P_OUI + /* WFA OUI */ +#define P2PSD_GAS_OUI_SUBTYPE P2P_VER + /* OUI Subtype for GAS IE */ +#define P2PSD_GAS_NQP_INFOID 0xDDDD + /* NQP Query Info ID: 56797 */ +#define P2PSD_GAS_COMEBACKDEALY 0x00 + /* Not used in the Native GAS protocol */ + +/* Service Protocol Type */ +typedef enum p2psd_svc_protype { + SVC_RPOTYPE_ALL = 0, + SVC_RPOTYPE_BONJOUR = 1, + SVC_RPOTYPE_UPNP = 2, + SVC_RPOTYPE_WSD = 3, + SVC_RPOTYPE_VENDOR = 255 +} p2psd_svc_protype_t; + +/* Service Discovery response status code */ +typedef enum { + P2PSD_RESP_STATUS_SUCCESS = 0, + P2PSD_RESP_STATUS_PROTYPE_NA = 1, + P2PSD_RESP_STATUS_DATA_NA = 2, + P2PSD_RESP_STATUS_BAD_REQUEST = 3 +} p2psd_resp_status_t; + +/* Advertisement Protocol IE tuple field */ +BWL_PRE_PACKED_STRUCT struct wifi_p2psd_adp_tpl { + uint8 llm_pamebi; /* Query Response Length Limit bit 0-6, set to 0 plus + * Pre-Associated Message Exchange BSSID Independent bit 7, set to 0 + */ + uint8 adp_id; /* Advertisement Protocol ID: 0 for NQP Native Query Protocol */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2psd_adp_tpl wifi_p2psd_adp_tpl_t; + +/* Advertisement Protocol IE */ +BWL_PRE_PACKED_STRUCT struct wifi_p2psd_adp_ie { + uint8 id; /* IE ID: 0x6c - 108 */ + uint8 len; /* IE length */ + wifi_p2psd_adp_tpl_t adp_tpl; /* Advertisement Protocol Tuple field. Only one + * tuple is defined for P2P Service Discovery + */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2psd_adp_ie wifi_p2psd_adp_ie_t; + +/* NQP Vendor-specific Content */ +BWL_PRE_PACKED_STRUCT struct wifi_p2psd_nqp_query_vsc { + uint8 oui_subtype; /* OUI Subtype: 0x09 */ + uint16 svc_updi; /* Service Update Indicator */ + uint8 svc_tlvs[1]; /* wifi_p2psd_qreq_tlv_t type for service request, + * wifi_p2psd_qresp_tlv_t type for service response + */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2psd_nqp_query_vsc wifi_p2psd_nqp_query_vsc_t; + +/* Service Request TLV */ +BWL_PRE_PACKED_STRUCT struct wifi_p2psd_qreq_tlv { + uint16 len; /* Length: 5 plus size of Query Data */ + uint8 svc_prot; /* Service Protocol Type */ + uint8 svc_tscid; /* Service Transaction ID */ + uint8 query_data[1]; /* Query Data, passed in from above Layer 2 */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2psd_qreq_tlv wifi_p2psd_qreq_tlv_t; + +/* Query Request Frame, defined in generic format, instead of NQP specific */ +BWL_PRE_PACKED_STRUCT struct wifi_p2psd_qreq_frame { + uint16 info_id; /* Info ID: 0xDDDD */ + uint16 len; /* Length of service request TLV, 5 plus the size of request data */ + uint8 oui[3]; /* WFA OUI: 0x0050F2 */ + uint8 qreq_vsc[1]; /* Vendor-specific Content: wifi_p2psd_nqp_query_vsc_t type for NQP */ + +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2psd_qreq_frame wifi_p2psd_qreq_frame_t; + +/* GAS Initial Request AF body, "elts" in wifi_p2p_pub_act_frame */ +BWL_PRE_PACKED_STRUCT struct wifi_p2psd_gas_ireq_frame { + wifi_p2psd_adp_ie_t adp_ie; /* Advertisement Protocol IE */ + uint16 qreq_len; /* Query Request Length */ + uint8 qreq_frm[1]; /* Query Request Frame wifi_p2psd_qreq_frame_t */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2psd_gas_ireq_frame wifi_p2psd_gas_ireq_frame_t; + +/* Service Response TLV */ +BWL_PRE_PACKED_STRUCT struct wifi_p2psd_qresp_tlv { + uint16 len; /* Length: 5 plus size of Query Data */ + uint8 svc_prot; /* Service Protocol Type */ + uint8 svc_tscid; /* Service Transaction ID */ + uint8 status; /* Value defined in Table 57 of P2P spec. */ + uint8 query_data[1]; /* Response Data, passed in from above Layer 2 */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2psd_qresp_tlv wifi_p2psd_qresp_tlv_t; + +/* Query Response Frame, defined in generic format, instead of NQP specific */ +BWL_PRE_PACKED_STRUCT struct wifi_p2psd_qresp_frame { + uint16 info_id; /* Info ID: 0xDDDD */ + uint16 len; /* Lenth of service response TLV, 6 plus the size of resp data */ + uint8 oui[3]; /* WFA OUI: 0x0050F2 */ + uint8 qresp_vsc[1]; /* Vendor-specific Content: wifi_p2psd_qresp_tlv_t type for NQP */ + +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2psd_qresp_frame wifi_p2psd_qresp_frame_t; + +/* GAS Initial Response AF body, "elts" in wifi_p2p_pub_act_frame */ +BWL_PRE_PACKED_STRUCT struct wifi_p2psd_gas_iresp_frame { + uint16 status; /* Value defined in Table 7-23 of IEEE P802.11u */ + uint16 cb_delay; /* GAS Comeback Delay */ + wifi_p2psd_adp_ie_t adp_ie; /* Advertisement Protocol IE */ + uint16 qresp_len; /* Query Response Length */ + uint8 qresp_frm[1]; /* Query Response Frame wifi_p2psd_qresp_frame_t */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2psd_gas_iresp_frame wifi_p2psd_gas_iresp_frame_t; + +/* GAS Comeback Response AF body, "elts" in wifi_p2p_pub_act_frame */ +BWL_PRE_PACKED_STRUCT struct wifi_p2psd_gas_cresp_frame { + uint16 status; /* Value defined in Table 7-23 of IEEE P802.11u */ + uint8 fragment_id; /* Fragmentation ID */ + uint16 cb_delay; /* GAS Comeback Delay */ + wifi_p2psd_adp_ie_t adp_ie; /* Advertisement Protocol IE */ + uint16 qresp_len; /* Query Response Length */ + uint8 qresp_frm[1]; /* Query Response Frame wifi_p2psd_qresp_frame_t */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2psd_gas_cresp_frame wifi_p2psd_gas_cresp_frame_t; + +/* Wi-Fi GAS Public Action Frame */ +BWL_PRE_PACKED_STRUCT struct wifi_p2psd_gas_pub_act_frame { + uint8 category; /* 0x04 Public Action Frame */ + uint8 action; /* 0x6c Advertisement Protocol */ + uint8 dialog_token; /* nonzero, identifies req/rsp transaction */ + uint8 query_data[1]; /* Query Data. wifi_p2psd_gas_ireq_frame_t + * or wifi_p2psd_gas_iresp_frame_t format + */ +} BWL_POST_PACKED_STRUCT; +typedef struct wifi_p2psd_gas_pub_act_frame wifi_p2psd_gas_pub_act_frame_t; + +/* This marks the end of a packed structure section. */ +#include + +#endif /* _P2P_H_ */ diff --git a/external/cache/sources/wl/include/proto/sdspi.h b/external/cache/sources/wl/include/proto/sdspi.h new file mode 100644 index 0000000..71cce43 --- /dev/null +++ b/external/cache/sources/wl/include/proto/sdspi.h @@ -0,0 +1,57 @@ +/* + * SD-SPI Protocol Standard + * + * $ Copyright Open Broadcom Corporation $ + * + * $Id: sdspi.h 241182 2011-02-17 21:50:03Z $ + */ +#ifndef _SD_SPI_H +#define _SD_SPI_H + +#define SPI_START_M BITFIELD_MASK(1) /* Bit [31] - Start Bit */ +#define SPI_START_S 31 +#define SPI_DIR_M BITFIELD_MASK(1) /* Bit [30] - Direction */ +#define SPI_DIR_S 30 +#define SPI_CMD_INDEX_M BITFIELD_MASK(6) /* Bits [29:24] - Command number */ +#define SPI_CMD_INDEX_S 24 +#define SPI_RW_M BITFIELD_MASK(1) /* Bit [23] - Read=0, Write=1 */ +#define SPI_RW_S 23 +#define SPI_FUNC_M BITFIELD_MASK(3) /* Bits [22:20] - Function Number */ +#define SPI_FUNC_S 20 +#define SPI_RAW_M BITFIELD_MASK(1) /* Bit [19] - Read After Wr */ +#define SPI_RAW_S 19 +#define SPI_STUFF_M BITFIELD_MASK(1) /* Bit [18] - Stuff bit */ +#define SPI_STUFF_S 18 +#define SPI_BLKMODE_M BITFIELD_MASK(1) /* Bit [19] - Blockmode 1=blk */ +#define SPI_BLKMODE_S 19 +#define SPI_OPCODE_M BITFIELD_MASK(1) /* Bit [18] - OP Code */ +#define SPI_OPCODE_S 18 +#define SPI_ADDR_M BITFIELD_MASK(17) /* Bits [17:1] - Address */ +#define SPI_ADDR_S 1 +#define SPI_STUFF0_M BITFIELD_MASK(1) /* Bit [0] - Stuff bit */ +#define SPI_STUFF0_S 0 + +#define SPI_RSP_START_M BITFIELD_MASK(1) /* Bit [7] - Start Bit (always 0) */ +#define SPI_RSP_START_S 7 +#define SPI_RSP_PARAM_ERR_M BITFIELD_MASK(1) /* Bit [6] - Parameter Error */ +#define SPI_RSP_PARAM_ERR_S 6 +#define SPI_RSP_RFU5_M BITFIELD_MASK(1) /* Bit [5] - RFU (Always 0) */ +#define SPI_RSP_RFU5_S 5 +#define SPI_RSP_FUNC_ERR_M BITFIELD_MASK(1) /* Bit [4] - Function number error */ +#define SPI_RSP_FUNC_ERR_S 4 +#define SPI_RSP_CRC_ERR_M BITFIELD_MASK(1) /* Bit [3] - COM CRC Error */ +#define SPI_RSP_CRC_ERR_S 3 +#define SPI_RSP_ILL_CMD_M BITFIELD_MASK(1) /* Bit [2] - Illegal Command error */ +#define SPI_RSP_ILL_CMD_S 2 +#define SPI_RSP_RFU1_M BITFIELD_MASK(1) /* Bit [1] - RFU (Always 0) */ +#define SPI_RSP_RFU1_S 1 +#define SPI_RSP_IDLE_M BITFIELD_MASK(1) /* Bit [0] - In idle state */ +#define SPI_RSP_IDLE_S 0 + +/* SD-SPI Protocol Definitions */ +#define SDSPI_COMMAND_LEN 6 /* Number of bytes in an SD command */ +#define SDSPI_START_BLOCK 0xFE /* SD Start Block Token */ +#define SDSPI_IDLE_PAD 0xFF /* SD-SPI idle value for MOSI */ +#define SDSPI_START_BIT_MASK 0x80 + +#endif /* _SD_SPI_H */ diff --git a/external/cache/sources/wl/include/proto/vlan.h b/external/cache/sources/wl/include/proto/vlan.h new file mode 100644 index 0000000..f13d3ca --- /dev/null +++ b/external/cache/sources/wl/include/proto/vlan.h @@ -0,0 +1,77 @@ +/* + * 802.1Q VLAN protocol definitions + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: vlan.h 352279 2012-08-22 07:21:57Z cylee $ + */ + +#ifndef _vlan_h_ +#define _vlan_h_ + +#ifndef _TYPEDEFS_H_ +#include +#endif + +/* This marks the start of a packed structure section. */ +#include + +#ifndef VLAN_VID_MASK +#define VLAN_VID_MASK 0xfff /* low 12 bits are vlan id */ +#endif + +#define VLAN_CFI_SHIFT 12 /* canonical format indicator bit */ +#define VLAN_PRI_SHIFT 13 /* user priority */ + +#define VLAN_PRI_MASK 7 /* 3 bits of priority */ + +#define VLAN_TPID_OFFSET 12 /* offset of tag protocol id field */ +#define VLAN_TCI_OFFSET 14 /* offset of tag ctrl info field */ + +#define VLAN_TAG_LEN 4 +#define VLAN_TAG_OFFSET (2 * ETHER_ADDR_LEN) /* offset in Ethernet II packet only */ + +#define VLAN_TPID 0x8100 /* VLAN ethertype/Tag Protocol ID */ + +struct vlan_header { + uint16 vlan_type; /* 0x8100 */ + uint16 vlan_tag; /* priority, cfi and vid */ +}; + +struct ethervlan_header { + uint8 ether_dhost[ETHER_ADDR_LEN]; + uint8 ether_shost[ETHER_ADDR_LEN]; + uint16 vlan_type; /* 0x8100 */ + uint16 vlan_tag; /* priority, cfi and vid */ + uint16 ether_type; +}; + +struct dot3_mac_llc_snapvlan_header { + uint8 ether_dhost[ETHER_ADDR_LEN]; /* dest mac */ + uint8 ether_shost[ETHER_ADDR_LEN]; /* src mac */ + uint16 length; /* frame length incl header */ + uint8 dsap; /* always 0xAA */ + uint8 ssap; /* always 0xAA */ + uint8 ctl; /* always 0x03 */ + uint8 oui[3]; /* RFC1042: 0x00 0x00 0x00 + * Bridge-Tunnel: 0x00 0x00 0xF8 + */ + uint16 vlan_type; /* 0x8100 */ + uint16 vlan_tag; /* priority, cfi and vid */ + uint16 ether_type; /* ethertype */ +}; + +#define ETHERVLAN_HDR_LEN (ETHER_HDR_LEN + VLAN_TAG_LEN) + + +/* This marks the end of a packed structure section. */ +#include + +#define ETHERVLAN_MOVE_HDR(d, s) \ +do { \ + struct ethervlan_header t; \ + t = *(struct ethervlan_header *)(s); \ + *(struct ethervlan_header *)(d) = t; \ +} while (0) + +#endif /* _vlan_h_ */ diff --git a/external/cache/sources/wl/include/proto/wpa.h b/external/cache/sources/wl/include/proto/wpa.h new file mode 100644 index 0000000..563cc39 --- /dev/null +++ b/external/cache/sources/wl/include/proto/wpa.h @@ -0,0 +1,196 @@ +/* + * Fundamental types and constants relating to WPA + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: wpa.h 367468 2012-11-08 05:49:44Z cylee $ + */ + +#ifndef _proto_wpa_h_ +#define _proto_wpa_h_ + +#include +#include + + +/* This marks the start of a packed structure section. */ +#include + +/* Reason Codes */ + +/* 13 through 23 taken from IEEE Std 802.11i-2004 */ +#define DOT11_RC_INVALID_WPA_IE 13 /* Invalid info. element */ +#define DOT11_RC_MIC_FAILURE 14 /* Michael failure */ +#define DOT11_RC_4WH_TIMEOUT 15 /* 4-way handshake timeout */ +#define DOT11_RC_GTK_UPDATE_TIMEOUT 16 /* Group key update timeout */ +#define DOT11_RC_WPA_IE_MISMATCH 17 /* WPA IE in 4-way handshake differs from + * (re-)assoc. request/probe response + */ +#define DOT11_RC_INVALID_MC_CIPHER 18 /* Invalid multicast cipher */ +#define DOT11_RC_INVALID_UC_CIPHER 19 /* Invalid unicast cipher */ +#define DOT11_RC_INVALID_AKMP 20 /* Invalid authenticated key management protocol */ +#define DOT11_RC_BAD_WPA_VERSION 21 /* Unsupported WPA version */ +#define DOT11_RC_INVALID_WPA_CAP 22 /* Invalid WPA IE capabilities */ +#define DOT11_RC_8021X_AUTH_FAIL 23 /* 802.1X authentication failure */ + +#define WPA2_PMKID_LEN 16 + +/* WPA IE fixed portion */ +typedef BWL_PRE_PACKED_STRUCT struct +{ + uint8 tag; /* TAG */ + uint8 length; /* TAG length */ + uint8 oui[3]; /* IE OUI */ + uint8 oui_type; /* OUI type */ + BWL_PRE_PACKED_STRUCT struct { + uint8 low; + uint8 high; + } BWL_POST_PACKED_STRUCT version; /* IE version */ +} BWL_POST_PACKED_STRUCT wpa_ie_fixed_t; +#define WPA_IE_OUITYPE_LEN 4 +#define WPA_IE_FIXED_LEN 8 +#define WPA_IE_TAG_FIXED_LEN 6 + +typedef BWL_PRE_PACKED_STRUCT struct { + uint8 tag; /* TAG */ + uint8 length; /* TAG length */ + BWL_PRE_PACKED_STRUCT struct { + uint8 low; + uint8 high; + } BWL_POST_PACKED_STRUCT version; /* IE version */ +} BWL_POST_PACKED_STRUCT wpa_rsn_ie_fixed_t; +#define WPA_RSN_IE_FIXED_LEN 4 +#define WPA_RSN_IE_TAG_FIXED_LEN 2 +typedef uint8 wpa_pmkid_t[WPA2_PMKID_LEN]; + +/* WPA suite/multicast suite */ +typedef BWL_PRE_PACKED_STRUCT struct +{ + uint8 oui[3]; + uint8 type; +} BWL_POST_PACKED_STRUCT wpa_suite_t, wpa_suite_mcast_t; +#define WPA_SUITE_LEN 4 + +/* WPA unicast suite list/key management suite list */ +typedef BWL_PRE_PACKED_STRUCT struct +{ + BWL_PRE_PACKED_STRUCT struct { + uint8 low; + uint8 high; + } BWL_POST_PACKED_STRUCT count; + wpa_suite_t list[1]; +} BWL_POST_PACKED_STRUCT wpa_suite_ucast_t, wpa_suite_auth_key_mgmt_t; +#define WPA_IE_SUITE_COUNT_LEN 2 +typedef BWL_PRE_PACKED_STRUCT struct +{ + BWL_PRE_PACKED_STRUCT struct { + uint8 low; + uint8 high; + } BWL_POST_PACKED_STRUCT count; + wpa_pmkid_t list[1]; +} BWL_POST_PACKED_STRUCT wpa_pmkid_list_t; + +/* WPA cipher suites */ +#define WPA_CIPHER_NONE 0 /* None */ +#define WPA_CIPHER_WEP_40 1 /* WEP (40-bit) */ +#define WPA_CIPHER_TKIP 2 /* TKIP: default for WPA */ +#define WPA_CIPHER_AES_OCB 3 /* AES (OCB) */ +#define WPA_CIPHER_AES_CCM 4 /* AES (CCM) */ +#define WPA_CIPHER_WEP_104 5 /* WEP (104-bit) */ +#define WPA_CIPHER_BIP 6 /* WEP (104-bit) */ +#define WPA_CIPHER_TPK 7 /* Group addressed traffic not allowed */ +#ifdef BCMCCX +#define WPA_CIPHER_CKIP 8 /* KP with no MIC */ +#define WPA_CIPHER_CKIP_MMH 9 /* KP with MIC ("CKIP/MMH", "CKIP+CMIC") */ +#define WPA_CIPHER_WEP_MMH 10 /* MIC with no KP ("WEP/MMH", "CMIC") */ + +#define IS_CCX_CIPHER(cipher) ((cipher) == WPA_CIPHER_CKIP || \ + (cipher) == WPA_CIPHER_CKIP_MMH || \ + (cipher) == WPA_CIPHER_WEP_MMH) +#endif + +#ifdef BCMWAPI_WAI +#define WAPI_CIPHER_NONE WPA_CIPHER_NONE +#define WAPI_CIPHER_SMS4 11 + +#define WAPI_CSE_WPI_SMS4 1 +#endif /* BCMWAPI_WAI */ + +#define IS_WPA_CIPHER(cipher) ((cipher) == WPA_CIPHER_NONE || \ + (cipher) == WPA_CIPHER_WEP_40 || \ + (cipher) == WPA_CIPHER_WEP_104 || \ + (cipher) == WPA_CIPHER_TKIP || \ + (cipher) == WPA_CIPHER_AES_OCB || \ + (cipher) == WPA_CIPHER_AES_CCM || \ + (cipher) == WPA_CIPHER_TPK) + +#ifdef BCMWAPI_WAI +#define IS_WAPI_CIPHER(cipher) ((cipher) == WAPI_CIPHER_NONE || \ + (cipher) == WAPI_CSE_WPI_SMS4) + +/* convert WAPI_CSE_WPI_XXX to WAPI_CIPHER_XXX */ +#define WAPI_CSE_WPI_2_CIPHER(cse) ((cse) == WAPI_CSE_WPI_SMS4 ? \ + WAPI_CIPHER_SMS4 : WAPI_CIPHER_NONE) + +#define WAPI_CIPHER_2_CSE_WPI(cipher) ((cipher) == WAPI_CIPHER_SMS4 ? \ + WAPI_CSE_WPI_SMS4 : WAPI_CIPHER_NONE) +#endif /* BCMWAPI_WAI */ + +/* WPA TKIP countermeasures parameters */ +#define WPA_TKIP_CM_DETECT 60 /* multiple MIC failure window (seconds) */ +#define WPA_TKIP_CM_BLOCK 60 /* countermeasures active window (seconds) */ + +/* RSN IE defines */ +#define RSN_CAP_LEN 2 /* Length of RSN capabilities field (2 octets) */ + +/* RSN Capabilities defined in 802.11i */ +#define RSN_CAP_PREAUTH 0x0001 +#define RSN_CAP_NOPAIRWISE 0x0002 +#define RSN_CAP_PTK_REPLAY_CNTR_MASK 0x000C +#define RSN_CAP_PTK_REPLAY_CNTR_SHIFT 2 +#define RSN_CAP_GTK_REPLAY_CNTR_MASK 0x0030 +#define RSN_CAP_GTK_REPLAY_CNTR_SHIFT 4 +#define RSN_CAP_1_REPLAY_CNTR 0 +#define RSN_CAP_2_REPLAY_CNTRS 1 +#define RSN_CAP_4_REPLAY_CNTRS 2 +#define RSN_CAP_16_REPLAY_CNTRS 3 +#define RSN_CAP_MFPR 0x0040 +#define RSN_CAP_MFPC 0x0080 +#define RSN_CAP_SPPC 0x0400 +#define RSN_CAP_SPPR 0x0800 + +/* WPA capabilities defined in 802.11i */ +#define WPA_CAP_4_REPLAY_CNTRS RSN_CAP_4_REPLAY_CNTRS +#define WPA_CAP_16_REPLAY_CNTRS RSN_CAP_16_REPLAY_CNTRS +#define WPA_CAP_REPLAY_CNTR_SHIFT RSN_CAP_PTK_REPLAY_CNTR_SHIFT +#define WPA_CAP_REPLAY_CNTR_MASK RSN_CAP_PTK_REPLAY_CNTR_MASK + +/* WPA capabilities defined in 802.11zD9.0 */ +#define WPA_CAP_PEER_KEY_ENABLE (0x1 << 1) /* bit 9 */ + +/* WPA Specific defines */ +#define WPA_CAP_LEN RSN_CAP_LEN /* Length of RSN capabilities in RSN IE (2 octets) */ +#define WPA_PMKID_CNT_LEN 2 /* Length of RSN PMKID count (2 octests) */ + +#define WPA_CAP_WPA2_PREAUTH RSN_CAP_PREAUTH + +#define WPA2_PMKID_COUNT_LEN 2 + +#ifdef BCMWAPI_WAI +#define WAPI_CAP_PREAUTH RSN_CAP_PREAUTH + +/* Other WAI definition */ +#define WAPI_WAI_REQUEST 0x00F1 +#define WAPI_UNICAST_REKEY 0x00F2 +#define WAPI_STA_AGING 0x00F3 +#define WAPI_MUTIL_REKEY 0x00F4 +#define WAPI_STA_STATS 0x00F5 + +#define WAPI_USK_REKEY_COUNT 0x4000000 /* 0xA00000 */ +#define WAPI_MSK_REKEY_COUNT 0x4000000 /* 0xA00000 */ +#endif /* BCMWAPI_WAI */ + +/* This marks the end of a packed structure section. */ +#include + +#endif /* _proto_wpa_h_ */ diff --git a/external/cache/sources/wl/include/proto/wps.h b/external/cache/sources/wl/include/proto/wps.h new file mode 100644 index 0000000..9bcd9e4 --- /dev/null +++ b/external/cache/sources/wl/include/proto/wps.h @@ -0,0 +1,361 @@ +/* + * WPS IE definitions + * + * $Copyright Open Broadcom Corporation$ + * + * $Id$ + */ + +#ifndef _WPS_ +#define _WPS_ + +#ifdef __cplusplus +extern "C" { +#endif + +/* Data Element Definitions */ +#define WPS_ID_AP_CHANNEL 0x1001 +#define WPS_ID_ASSOC_STATE 0x1002 +#define WPS_ID_AUTH_TYPE 0x1003 +#define WPS_ID_AUTH_TYPE_FLAGS 0x1004 +#define WPS_ID_AUTHENTICATOR 0x1005 +#define WPS_ID_CONFIG_METHODS 0x1008 +#define WPS_ID_CONFIG_ERROR 0x1009 +#define WPS_ID_CONF_URL4 0x100A +#define WPS_ID_CONF_URL6 0x100B +#define WPS_ID_CONN_TYPE 0x100C +#define WPS_ID_CONN_TYPE_FLAGS 0x100D +#define WPS_ID_CREDENTIAL 0x100E +#define WPS_ID_DEVICE_NAME 0x1011 +#define WPS_ID_DEVICE_PWD_ID 0x1012 +#define WPS_ID_E_HASH1 0x1014 +#define WPS_ID_E_HASH2 0x1015 +#define WPS_ID_E_SNONCE1 0x1016 +#define WPS_ID_E_SNONCE2 0x1017 +#define WPS_ID_ENCR_SETTINGS 0x1018 +#define WPS_ID_ENCR_TYPE 0x100F +#define WPS_ID_ENCR_TYPE_FLAGS 0x1010 +#define WPS_ID_ENROLLEE_NONCE 0x101A +#define WPS_ID_FEATURE_ID 0x101B +#define WPS_ID_IDENTITY 0x101C +#define WPS_ID_IDENTITY_PROOF 0x101D +#define WPS_ID_KEY_WRAP_AUTH 0x101E +#define WPS_ID_KEY_IDENTIFIER 0x101F +#define WPS_ID_MAC_ADDR 0x1020 +#define WPS_ID_MANUFACTURER 0x1021 +#define WPS_ID_MSG_TYPE 0x1022 +#define WPS_ID_MODEL_NAME 0x1023 +#define WPS_ID_MODEL_NUMBER 0x1024 +#define WPS_ID_NW_INDEX 0x1026 +#define WPS_ID_NW_KEY 0x1027 +#define WPS_ID_NW_KEY_INDEX 0x1028 +#define WPS_ID_NEW_DEVICE_NAME 0x1029 +#define WPS_ID_NEW_PWD 0x102A +#define WPS_ID_OOB_DEV_PWD 0x102C +#define WPS_ID_OS_VERSION 0x102D +#define WPS_ID_POWER_LEVEL 0x102F +#define WPS_ID_PSK_CURRENT 0x1030 +#define WPS_ID_PSK_MAX 0x1031 +#define WPS_ID_PUBLIC_KEY 0x1032 +#define WPS_ID_RADIO_ENABLED 0x1033 +#define WPS_ID_REBOOT 0x1034 +#define WPS_ID_REGISTRAR_CURRENT 0x1035 +#define WPS_ID_REGISTRAR_ESTBLSHD 0x1036 +#define WPS_ID_REGISTRAR_LIST 0x1037 +#define WPS_ID_REGISTRAR_MAX 0x1038 +#define WPS_ID_REGISTRAR_NONCE 0x1039 +#define WPS_ID_REQ_TYPE 0x103A +#define WPS_ID_RESP_TYPE 0x103B +#define WPS_ID_RF_BAND 0x103C +#define WPS_ID_R_HASH1 0x103D +#define WPS_ID_R_HASH2 0x103E +#define WPS_ID_R_SNONCE1 0x103F +#define WPS_ID_R_SNONCE2 0x1040 +#define WPS_ID_SEL_REGISTRAR 0x1041 +#define WPS_ID_SERIAL_NUM 0x1042 +#define WPS_ID_SC_STATE 0x1044 +#define WPS_ID_SSID 0x1045 +#define WPS_ID_TOT_NETWORKS 0x1046 +#define WPS_ID_UUID_E 0x1047 +#define WPS_ID_UUID_R 0x1048 +#define WPS_ID_VENDOR_EXT 0x1049 +#define WPS_ID_VERSION 0x104A +#define WPS_ID_X509_CERT_REQ 0x104B +#define WPS_ID_X509_CERT 0x104C +#define WPS_ID_EAP_IDENTITY 0x104D +#define WPS_ID_MSG_COUNTER 0x104E +#define WPS_ID_PUBKEY_HASH 0x104F +#define WPS_ID_REKEY_KEY 0x1050 +#define WPS_ID_KEY_LIFETIME 0x1051 +#define WPS_ID_PERM_CFG_METHODS 0x1052 +#define WPS_ID_SEL_REG_CFG_METHODS 0x1053 +#define WPS_ID_PRIM_DEV_TYPE 0x1054 +#define WPS_ID_SEC_DEV_TYPE_LIST 0x1055 +#define WPS_ID_PORTABLE_DEVICE 0x1056 +#define WPS_ID_AP_SETUP_LOCKED 0x1057 +#define WPS_ID_APP_LIST 0x1058 +#define WPS_ID_EAP_TYPE 0x1059 +#define WPS_ID_INIT_VECTOR 0x1060 +#define WPS_ID_KEY_PROVIDED_AUTO 0x1061 +#define WPS_ID_8021X_ENABLED 0x1062 +#define WPS_ID_WEP_TRANSMIT_KEY 0x1064 +#define WPS_ID_REQ_DEV_TYPE 0x106A + +/* WSC 2.0, WFA Vendor Extension Subelements */ +#define WFA_VENDOR_EXT_ID "\x00\x37\x2A" +#define WPS_WFA_SUBID_VERSION2 0x00 +#define WPS_WFA_SUBID_AUTHORIZED_MACS 0x01 +#define WPS_WFA_SUBID_NW_KEY_SHAREABLE 0x02 +#define WPS_WFA_SUBID_REQ_TO_ENROLL 0x03 +#define WPS_WFA_SUBID_SETTINGS_DELAY_TIME 0x04 + + +/* WCN-NET Windows Rally Vertical Pairing Vendor Extensions */ +#define MS_VENDOR_EXT_ID "\x00\x01\x37" +#define WPS_MS_ID_VPI 0x1001 /* Vertical Pairing Identifier TLV */ +#define WPS_MS_ID_TRANSPORT_UUID 0x1002 /* Transport UUID TLV */ + +/* Vertical Pairing Identifier TLV Definitions */ +#define WPS_MS_VPI_TRANSPORT_NONE 0x00 /* None */ +#define WPS_MS_VPI_TRANSPORT_DPWS 0x01 /* Devices Profile for Web Services */ +#define WPS_MS_VPI_TRANSPORT_UPNP 0x02 /* uPnP */ +#define WPS_MS_VPI_TRANSPORT_SDNWS 0x03 /* Secure Devices Profile for Web Services */ +#define WPS_MS_VPI_NO_PROFILE_REQ 0x00 /* Wi-Fi profile not requested. + * Not supported in Windows 7 + */ +#define WPS_MS_VPI_PROFILE_REQ 0x01 /* Wi-Fi profile requested. */ + +/* sizes of the fixed size elements */ +#define WPS_ID_AP_CHANNEL_S 2 +#define WPS_ID_ASSOC_STATE_S 2 +#define WPS_ID_AUTH_TYPE_S 2 +#define WPS_ID_AUTH_TYPE_FLAGS_S 2 +#define WPS_ID_AUTHENTICATOR_S 8 +#define WPS_ID_CONFIG_METHODS_S 2 +#define WPS_ID_CONFIG_ERROR_S 2 +#define WPS_ID_CONN_TYPE_S 1 +#define WPS_ID_CONN_TYPE_FLAGS_S 1 +#define WPS_ID_DEVICE_PWD_ID_S 2 +#define WPS_ID_ENCR_TYPE_S 2 +#define WPS_ID_ENCR_TYPE_FLAGS_S 2 +#define WPS_ID_FEATURE_ID_S 4 +#define WPS_ID_MAC_ADDR_S 6 +#define WPS_ID_MSG_TYPE_S 1 +#define WPS_ID_SC_STATE_S 1 +#define WPS_ID_RF_BAND_S 1 +#define WPS_ID_OS_VERSION_S 4 +#define WPS_ID_VERSION_S 1 +#define WPS_ID_SEL_REGISTRAR_S 1 +#define WPS_ID_SEL_REG_CFG_METHODS_S 2 +#define WPS_ID_REQ_TYPE_S 1 +#define WPS_ID_RESP_TYPE_S 1 +#define WPS_ID_AP_SETUP_LOCKED_S 1 + +/* WSC 2.0, WFA Vendor Extension Subelements */ +#define WPS_WFA_SUBID_VERSION2_S 1 +#define WPS_WFA_SUBID_NW_KEY_SHAREABLE_S 1 +#define WPS_WFA_SUBID_REQ_TO_ENROLL_S 1 +#define WPS_WFA_SUBID_SETTINGS_DELAY_TIME_S 1 + +/* Association states */ +#define WPS_ASSOC_NOT_ASSOCIATED 0 +#define WPS_ASSOC_CONN_SUCCESS 1 +#define WPS_ASSOC_CONFIG_FAIL 2 +#define WPS_ASSOC_ASSOC_FAIL 3 +#define WPS_ASSOC_IP_FAIL 4 + +/* Authentication types */ +#define WPS_AUTHTYPE_OPEN 0x0001 +#define WPS_AUTHTYPE_WPAPSK 0x0002 /* Deprecated in WSC 2.0 */ +#define WPS_AUTHTYPE_SHARED 0x0004 /* Deprecated in WSC 2.0 */ +#define WPS_AUTHTYPE_WPA 0x0008 /* Deprecated in WSC 2.0 */ +#define WPS_AUTHTYPE_WPA2 0x0010 +#define WPS_AUTHTYPE_WPA2PSK 0x0020 + +/* Config methods */ +#define WPS_CONFMET_USBA 0x0001 /* Deprecated in WSC 2.0 */ +#define WPS_CONFMET_ETHERNET 0x0002 /* Deprecated in WSC 2.0 */ +#define WPS_CONFMET_LABEL 0x0004 +#define WPS_CONFMET_DISPLAY 0x0008 +#define WPS_CONFMET_EXT_NFC_TOK 0x0010 +#define WPS_CONFMET_INT_NFC_TOK 0x0020 +#define WPS_CONFMET_NFC_INTF 0x0040 +#define WPS_CONFMET_PBC 0x0080 +#define WPS_CONFMET_KEYPAD 0x0100 +/* WSC 2.0 */ +#define WPS_CONFMET_VIRT_PBC 0x0280 +#define WPS_CONFMET_PHY_PBC 0x0480 +#define WPS_CONFMET_VIRT_DISPLAY 0x2008 +#define WPS_CONFMET_PHY_DISPLAY 0x4008 + +/* WPS error messages */ +#define WPS_ERROR_NO_ERROR 0 +#define WPS_ERROR_OOB_INT_READ_ERR 1 +#define WPS_ERROR_DECRYPT_CRC_FAIL 2 +#define WPS_ERROR_CHAN24_NOT_SUPP 3 +#define WPS_ERROR_CHAN50_NOT_SUPP 4 +#define WPS_ERROR_SIGNAL_WEAK 5 /* Deprecated in WSC 2.0 */ +#define WPS_ERROR_NW_AUTH_FAIL 6 /* Deprecated in WSC 2.0 */ +#define WPS_ERROR_NW_ASSOC_FAIL 7 /* Deprecated in WSC 2.0 */ +#define WPS_ERROR_NO_DHCP_RESP 8 /* Deprecated in WSC 2.0 */ +#define WPS_ERROR_FAILED_DHCP_CONF 9 /* Deprecated in WSC 2.0 */ +#define WPS_ERROR_IP_ADDR_CONFLICT 10 /* Deprecated in WSC 2.0 */ +#define WPS_ERROR_FAIL_CONN_REGISTRAR 11 +#define WPS_ERROR_MULTI_PBC_DETECTED 12 +#define WPS_ERROR_ROGUE_SUSPECTED 13 +#define WPS_ERROR_DEVICE_BUSY 14 +#define WPS_ERROR_SETUP_LOCKED 15 +#define WPS_ERROR_MSG_TIMEOUT 16 /* Deprecated in WSC 2.0 */ +#define WPS_ERROR_REG_SESSION_TIMEOUT 17 /* Deprecated in WSC 2.0 */ +#define WPS_ERROR_DEV_PWD_AUTH_FAIL 18 + +/* Connection types */ +#define WPS_CONNTYPE_ESS 0x01 +#define WPS_CONNTYPE_IBSS 0x02 + +/* Device password ID */ +#define WPS_DEVICEPWDID_DEFAULT 0x0000 +#define WPS_DEVICEPWDID_USER_SPEC 0x0001 +#define WPS_DEVICEPWDID_MACHINE_SPEC 0x0002 +#define WPS_DEVICEPWDID_REKEY 0x0003 +#define WPS_DEVICEPWDID_PUSH_BTN 0x0004 +#define WPS_DEVICEPWDID_REG_SPEC 0x0005 + +/* Encryption type */ +#define WPS_ENCRTYPE_NONE 0x0001 +#define WPS_ENCRTYPE_WEP 0x0002 /* Deprecated in WSC 2.0 */ +#define WPS_ENCRTYPE_TKIP 0x0004 /* Deprecated in version 2.0. TKIP can only + * be advertised on the AP when Mixed Mode + * is enabled (Encryption Type is 0x000c). + */ +#define WPS_ENCRTYPE_AES 0x0008 + + +/* WPS Message Types */ +#define WPS_ID_BEACON 0x01 +#define WPS_ID_PROBE_REQ 0x02 +#define WPS_ID_PROBE_RESP 0x03 +#define WPS_ID_MESSAGE_M1 0x04 +#define WPS_ID_MESSAGE_M2 0x05 +#define WPS_ID_MESSAGE_M2D 0x06 +#define WPS_ID_MESSAGE_M3 0x07 +#define WPS_ID_MESSAGE_M4 0x08 +#define WPS_ID_MESSAGE_M5 0x09 +#define WPS_ID_MESSAGE_M6 0x0A +#define WPS_ID_MESSAGE_M7 0x0B +#define WPS_ID_MESSAGE_M8 0x0C +#define WPS_ID_MESSAGE_ACK 0x0D +#define WPS_ID_MESSAGE_NACK 0x0E +#define WPS_ID_MESSAGE_DONE 0x0F + +/* WSP private ID for local use */ +#define WPS_PRIVATE_ID_IDENTITY (WPS_ID_MESSAGE_DONE + 1) +#define WPS_PRIVATE_ID_WPS_START (WPS_ID_MESSAGE_DONE + 2) +#define WPS_PRIVATE_ID_FAILURE (WPS_ID_MESSAGE_DONE + 3) +#define WPS_PRIVATE_ID_FRAG (WPS_ID_MESSAGE_DONE + 4) +#define WPS_PRIVATE_ID_FRAG_ACK (WPS_ID_MESSAGE_DONE + 5) +#define WPS_PRIVATE_ID_EAPOL_START (WPS_ID_MESSAGE_DONE + 6) + + +/* Device Type categories for primary and secondary device types */ +#define WPS_DEVICE_TYPE_CAT_COMPUTER 1 +#define WPS_DEVICE_TYPE_CAT_INPUT_DEVICE 2 +#define WPS_DEVICE_TYPE_CAT_PRINTER 3 +#define WPS_DEVICE_TYPE_CAT_CAMERA 4 +#define WPS_DEVICE_TYPE_CAT_STORAGE 5 +#define WPS_DEVICE_TYPE_CAT_NW_INFRA 6 +#define WPS_DEVICE_TYPE_CAT_DISPLAYS 7 +#define WPS_DEVICE_TYPE_CAT_MM_DEVICES 8 +#define WPS_DEVICE_TYPE_CAT_GAME_DEVICES 9 +#define WPS_DEVICE_TYPE_CAT_TELEPHONE 10 +#define WPS_DEVICE_TYPE_CAT_AUDIO_DEVICES 11 /* WSC 2.0 */ + +/* Device Type sub categories for primary and secondary device types */ +#define WPS_DEVICE_TYPE_SUB_CAT_COMP_PC 1 +#define WPS_DEVICE_TYPE_SUB_CAT_COMP_SERVER 2 +#define WPS_DEVICE_TYPE_SUB_CAT_COMP_MEDIA_CTR 3 +#define WPS_DEVICE_TYPE_SUB_CAT_COMP_UM_PC 4 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_COMP_NOTEBOOK 5 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_COMP_DESKTOP 6 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_COMP_MID 7 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_COMP_NETBOOK 8 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_INP_Keyboard 1 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_INP_MOUSE 2 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_INP_JOYSTICK 3 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_INP_TRACKBALL 4 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_INP_GAM_CTRL 5 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_INP_REMOTE 6 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_INP_TOUCHSCREEN 7 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_INP_BIO_READER 8 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_INP_BAR_READER 9 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_PRTR_PRINTER 1 +#define WPS_DEVICE_TYPE_SUB_CAT_PRTR_SCANNER 2 +#define WPS_DEVICE_TYPE_SUB_CAT_PRTR_FAX 3 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_PRTR_COPIER 4 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_PRTR_ALLINONE 5 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_CAM_DGTL_STILL 1 +#define WPS_DEVICE_TYPE_SUB_CAT_CAM_VIDEO_CAM 2 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_CAM_WEB_CAM 3 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_CAM_SECU_CAM 4 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_STOR_NAS 1 +#define WPS_DEVICE_TYPE_SUB_CAT_NW_AP 1 +#define WPS_DEVICE_TYPE_SUB_CAT_NW_ROUTER 2 +#define WPS_DEVICE_TYPE_SUB_CAT_NW_SWITCH 3 +#define WPS_DEVICE_TYPE_SUB_CAT_NW_GATEWAY 4 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_NW_BRIDGE 5 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_DISP_TV 1 +#define WPS_DEVICE_TYPE_SUB_CAT_DISP_PIC_FRAME 2 +#define WPS_DEVICE_TYPE_SUB_CAT_DISP_PROJECTOR 3 +#define WPS_DEVICE_TYPE_SUB_CAT_DISP_MONITOR 4 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_MM_DAR 1 +#define WPS_DEVICE_TYPE_SUB_CAT_MM_PVR 2 +#define WPS_DEVICE_TYPE_SUB_CAT_MM_MCX 3 +#define WPS_DEVICE_TYPE_SUB_CAT_MM_STB 4 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_MM_MS_ME 5 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_MM_PVP 6 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_GAM_XBOX 1 +#define WPS_DEVICE_TYPE_SUB_CAT_GAM_XBOX_360 2 +#define WPS_DEVICE_TYPE_SUB_CAT_GAM_PS 3 +#define WPS_DEVICE_TYPE_SUB_CAT_GAM_GC 4 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_GAM_PGD 5 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_PHONE_WM 1 +#define WPS_DEVICE_TYPE_SUB_CAT_PHONE_PSM 2 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_PHONE_PDM 3 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_PHONE_SSM 4 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_PHONE_SDM 5 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_AUDIO_TUNER 1 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_AUDIO_SPEAKERS 2 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_AUDIO_PMP 3 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_AUDIO_HEADSET 4 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_AUDIO_HPHONE 5 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_AUDIO_MPHONE 6 /* WSC 2.0 */ +#define WPS_DEVICE_TYPE_SUB_CAT_AUDIO_HTS 7 /* WSC 2.0 */ + + +/* Device request/response type */ +#define WPS_MSGTYPE_ENROLLEE_INFO_ONLY 0x00 +#define WPS_MSGTYPE_ENROLLEE_OPEN_8021X 0x01 +#define WPS_MSGTYPE_REGISTRAR 0x02 +#define WPS_MSGTYPE_AP_WLAN_MGR 0x03 + +/* RF Band */ +#define WPS_RFBAND_24GHZ 0x01 +#define WPS_RFBAND_50GHZ 0x02 + +/* Simple Config state */ +#define WPS_SCSTATE_UNCONFIGURED 0x01 +#define WPS_SCSTATE_CONFIGURED 0x02 +#define WPS_SCSTATE_OFF 11 + +/* WPS Vendor extension key */ +#define WPS_OUI_HEADER_LEN 2 +#define WPS_OUI_HEADER_SIZE 4 +#define WPS_OUI_FIXED_HEADER_OFF 16 +#define WPS_WFA_SUBID_V2_OFF 3 +#define WPS_WFA_V2_OFF 5 + +#ifdef __cplusplus +} +#endif + +#endif /* _WPS_ */ diff --git a/external/cache/sources/wl/include/rwl_wifi.h b/external/cache/sources/wl/include/rwl_wifi.h new file mode 100644 index 0000000..4248300 --- /dev/null +++ b/external/cache/sources/wl/include/rwl_wifi.h @@ -0,0 +1,86 @@ +/* + * RWL definitions of + * Broadcom 802.11bang Networking Device Driver + * + * $ Copyright Broadcom Corporation $ + * + * $Id: rwl_wifi.h 393460 2013-03-27 19:43:28Z fengwang $ + * + */ + +#ifndef _rwl_wifi_h_ +#define _rwl_wifi_h_ + +#if defined(RWL_WIFI) || defined(WIFI_REFLECTOR) || defined(RFAWARE) + +#define RWL_ACTION_WIFI_CATEGORY 127 /* Vendor-specific category value for WiFi */ +#define RWL_WIFI_OUI_BYTE0 0x00 /* BRCM-specific public OUI */ +#define RWL_WIFI_OUI_BYTE1 0x90 +#define RWL_WIFI_OUI_BYTE2 0x4c +#define RWL_WIFI_ACTION_FRAME_SIZE sizeof(struct dot11_action_wifi_vendor_specific) + +/* + * Information about the action frame data fields in the dot11_action_wifi_vendor_specific + * cdc structure (1 to 16). This does not include the status flag. Since this + * is not directly visible to the driver code, we can't use sizeof(struct cdc_ioctl). + * Hence Ref MAC address offset starts from byte 17. + * REF MAC ADDR (6 bytes (MAC Address len) from byte 17 to 22) + * DUT MAC ADDR (6 bytes after the REF MAC Address byte 23 to 28) + * unused (byte 29 to 49) + * REF/Client Channel offset (50) + * DUT/Server channel offset (51) + * --------------------------------------------------------------------------------------- + * cdc struct|REF MAC ADDR|DUT_MAC_ADDR|un used|REF Channel|DUT channel|Action frame Data| + * 1---------17-----------23-------------------50----------51----------52----------------1040 + * REF MAC addr after CDC struct without status flag (status flag not used by wifi) + */ + +#define RWL_REF_MAC_ADDRESS_OFFSET 17 +#define RWL_DUT_MAC_ADDRESS_OFFSET 23 +#define RWL_WIFI_CLIENT_CHANNEL_OFFSET 50 +#define RWL_WIFI_SERVER_CHANNEL_OFFSET 51 + +#ifdef WIFI_REFLECTOR +#include +#define REMOTE_FINDSERVER_CMD 16 +#define RWL_WIFI_ACTION_CMD "wifiaction" +#define RWL_WIFI_ACTION_CMD_LEN 11 /* With the NULL terminator */ +#define REMOTE_SET_CMD 1 +#define REMOTE_GET_CMD 2 +#define REMOTE_REPLY 4 +#define RWL_WIFI_DEFAULT_TYPE 0x00 +#define RWL_WIFI_DEFAULT_SUBTYPE 0x00 +#define RWL_ACTION_FRAME_DATA_SIZE 1024 /* fixed size for the wifi frame data */ +#define RWL_WIFI_CDC_HEADER_OFFSET 0 +#define RWL_WIFI_FRAG_DATA_SIZE 960 /* max size of the frag data */ +#define RWL_DEFAULT_WIFI_FRAG_COUNT 127 /* maximum fragment count */ +#define RWL_WIFI_RETRY 5 /* CMD retry count for wifi */ +#define RWL_WIFI_SEND 5 /* WIFI frame sent count */ +#define RWL_WIFI_SEND_DELAY 100 /* delay between two frames */ +#define MICROSEC_CONVERTOR_VAL 1000 +#ifndef IFNAMSIZ +#define IFNAMSIZ 16 +#endif + +typedef struct rem_packet { + rem_ioctl_t rem_cdc; + uchar message [RWL_ACTION_FRAME_DATA_SIZE]; +} rem_packet_t; + +struct send_packet { + char command [RWL_WIFI_ACTION_CMD_LEN]; + dot11_action_wifi_vendor_specific_t response; +} PACKED; +typedef struct send_packet send_packet_t; + +#define REMOTE_SIZE sizeof(rem_ioctl_t) +#endif /* WIFI_REFLECTOR */ + +typedef struct rwl_request { + struct rwl_request* next_request; + struct dot11_action_wifi_vendor_specific action_frame; +} rwl_request_t; + + +#endif /* defined(RWL_WIFI) || defined(WIFI_REFLECTOR) */ +#endif /* _rwl_wifi_h_ */ diff --git a/external/cache/sources/wl/include/saverestore.h b/external/cache/sources/wl/include/saverestore.h new file mode 100644 index 0000000..a09aa8c --- /dev/null +++ b/external/cache/sources/wl/include/saverestore.h @@ -0,0 +1,97 @@ +/* + * Header file for save-restore functionality in driver + * + * Copyright (C) 2012, Broadcom Corporation + * All Rights Reserved. + * + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation; + * the contents of this file may not be disclosed to third parties, copied + * or duplicated in any form, in whole or in part, without the prior + * written permission of Broadcom Corporation. + * + * $Id: Exp $ + */ + +#ifndef _SAVERESTORE_H +#define _SAVERESTORE_H + +/* WL_ENAB_RUNTIME_CHECK may be set based upon the #define below (for ROM builds). It may also + * be defined via makefiles (e.g. ROM auto abandon unoptimized compiles). + */ +#if defined(BCMROMBUILD) + #ifndef WL_ENAB_RUNTIME_CHECK + #define WL_ENAB_RUNTIME_CHECK + #endif +#endif /* BCMROMBUILD */ + +/* SAVERESTORE Support */ +#ifdef SAVERESTORE + extern bool _sr; + #if defined(WL_ENAB_RUNTIME_CHECK) || !defined(DONGLEBUILD) + #define SR_ENAB() (_sr) + #elif defined(SAVERESTORE_DISABLED) + #define SR_ENAB() (0) + #else + #define SR_ENAB() (1) + #endif +#else + #define SR_ENAB() (0) +#endif /* SAVERESTORE */ + +/* BANK size is calculated in the units of 32bit WORDS */ +#define SRCTL_BANK_SIZE(sr_cntrl) ((((sr_cntrl & 0x7F0) >> 4) + 1) << 8) +#define SRCTL_BANK_NUM(sr_cntrl) (sr_cntrl & 0xF) +#define SRCTL_EXP_MEM_SIZE(chipid) (chipid == BCM43239_CHIP_ID ? (24 << 8) : (48 << 8)) + +#define SR_HOST 0 +#define SR_ENGINE 1 + +#ifdef SAVERESTORE +typedef enum { + SR_HSIC_OOB_SHALLOW_WAKE_MODE = 0, + SR_HSIC_OOB_SHALLOW_SLEEP_MODE +} hsic_sr_module_t; + +bool hsic_sr_save(void *arg); +#endif /* defined(SAVERESTORE) */ + +extern CONST uint32 sr_source_code[]; +extern CONST uint sr_source_codesz; + +typedef bool (*sr_save_callback_t)(void* arg); +typedef void (*sr_restore_callback_t)(void* arg); + +/* Function prototypes */ +void sr_download_firmware(si_t *si_h); +int sr_engine_enable(si_t *si_h, bool oper, bool enable); +int sr_pll_toggle(si_t *si_h, bool enable); +int sr_update_srfast_dependency(si_t *sih, bool enable); +uint32 sr_chipcontrol(si_t *si_h, uint32 mask, uint32 val); +void sr_save_restore_init(si_t *si_h); +uint32 sr_mem_access(si_t *sih, int op, uint32 addr, uint32 data); + +uint32 sr_register_save(si_t *sih, sr_save_callback_t cb, void *arg); +uint32 sr_register_restore(si_t *sih, sr_restore_callback_t cb, void *arg); +void sr_process_save(si_t *sih); +void sr_process_restore(si_t *sih); +int sr_gpio_oobwake(si_t *si_h, bool enable); +int sr_uart_oobwake(si_t *si_h, bool enable); +int sr_uart_oobwake_irq_ack(si_t *sih); +void sr_wakeup_workaround(si_t *sih); +uint32 sr_get_cur_minresmask(si_t *sih); + +#ifdef SAVERESTORE +bool sr_cap(si_t *sih); +bool sr_is_wakeup_from_deep_sleep(void); +bool sr_is_wakeup_from_deep_sleep_bit28_check(void); +void sr_wokeup_from_deep_sleep(bool state); +void sr_force_deep_sleep_bit28_check(bool state); +#else +#define sr_cap(a) (FALSE) +#define sr_is_wakeup_from_deep_sleep() (FALSE) +#define sr_is_wakeup_from_deep_sleep_bit28_check() (FALSE) +#define sr_wokeup_from_deep_sleep(state) (FALSE) +#define sr_force_deep_sleep_bit28_check(state) (FALSE) +#endif + +#endif /* _SAVERESTORE_H */ diff --git a/external/cache/sources/wl/include/sbchipc.h b/external/cache/sources/wl/include/sbchipc.h new file mode 100644 index 0000000..275bcb4 --- /dev/null +++ b/external/cache/sources/wl/include/sbchipc.h @@ -0,0 +1,2854 @@ +/* + * SiliconBackplane Chipcommon core hardware definitions. + * + * The chipcommon core provides chip identification, SB control, + * JTAG, 0/1/2 UARTs, clock frequency control, a watchdog interrupt timer, + * GPIO interface, extbus, and support for serial and parallel flashes. + * + * $Id: sbchipc.h 393772 2013-03-28 19:46:56Z $ + * + * $Copyright Open Broadcom Corporation$ + */ + +#ifndef _SBCHIPC_H +#define _SBCHIPC_H + +#ifndef _LANGUAGE_ASSEMBLY + + +#ifndef PAD +#define _PADLINE(line) pad ## line +#define _XSTR(line) _PADLINE(line) +#define PAD _XSTR(__LINE__) +#endif + +typedef struct eci_prerev35 { + uint32 eci_output; + uint32 eci_control; + uint32 eci_inputlo; + uint32 eci_inputmi; + uint32 eci_inputhi; + uint32 eci_inputintpolaritylo; + uint32 eci_inputintpolaritymi; + uint32 eci_inputintpolarityhi; + uint32 eci_intmasklo; + uint32 eci_intmaskmi; + uint32 eci_intmaskhi; + uint32 eci_eventlo; + uint32 eci_eventmi; + uint32 eci_eventhi; + uint32 eci_eventmasklo; + uint32 eci_eventmaskmi; + uint32 eci_eventmaskhi; + uint32 PAD[3]; +} eci_prerev35_t; + +typedef struct eci_rev35 { + uint32 eci_outputlo; + uint32 eci_outputhi; + uint32 eci_controllo; + uint32 eci_controlhi; + uint32 eci_inputlo; + uint32 eci_inputhi; + uint32 eci_inputintpolaritylo; + uint32 eci_inputintpolarityhi; + uint32 eci_intmasklo; + uint32 eci_intmaskhi; + uint32 eci_eventlo; + uint32 eci_eventhi; + uint32 eci_eventmasklo; + uint32 eci_eventmaskhi; + uint32 eci_auxtx; + uint32 eci_auxrx; + uint32 eci_datatag; + uint32 eci_uartescvalue; + uint32 eci_autobaudctr; + uint32 eci_uartfifolevel; +} eci_rev35_t; + +typedef struct flash_config { + uint32 PAD[19]; + + uint32 flashstrconfig; +} flash_config_t; + +typedef volatile struct { + uint32 chipid; + uint32 capabilities; + uint32 corecontrol; + uint32 bist; + + + uint32 otpstatus; + uint32 otpcontrol; + uint32 otpprog; + uint32 otplayout; + + + uint32 intstatus; + uint32 intmask; + + + uint32 chipcontrol; + uint32 chipstatus; + + + uint32 jtagcmd; + uint32 jtagir; + uint32 jtagdr; + uint32 jtagctrl; + + + uint32 flashcontrol; + uint32 flashaddress; + uint32 flashdata; + uint32 otplayoutextension; + + + uint32 broadcastaddress; + uint32 broadcastdata; + + + uint32 gpiopullup; + uint32 gpiopulldown; + uint32 gpioin; + uint32 gpioout; + uint32 gpioouten; + uint32 gpiocontrol; + uint32 gpiointpolarity; + uint32 gpiointmask; + + + uint32 gpioevent; + uint32 gpioeventintmask; + + + uint32 watchdog; + + + uint32 gpioeventintpolarity; + + + uint32 gpiotimerval; + uint32 gpiotimeroutmask; + + + uint32 clockcontrol_n; + uint32 clockcontrol_sb; + uint32 clockcontrol_pci; + uint32 clockcontrol_m2; + uint32 clockcontrol_m3; + uint32 clkdiv; + uint32 gpiodebugsel; + uint32 capabilities_ext; + + + uint32 pll_on_delay; + uint32 fref_sel_delay; + uint32 slow_clk_ctl; + uint32 PAD; + + + uint32 system_clk_ctl; + uint32 clkstatestretch; + uint32 PAD[2]; + + + uint32 bp_addrlow; + uint32 bp_addrhigh; + uint32 bp_data; + uint32 PAD; + uint32 bp_indaccess; + + uint32 gsioctrl; + uint32 gsioaddress; + uint32 gsiodata; + + + uint32 clkdiv2; + + uint32 otpcontrol1; + uint32 fabid; + + + uint32 eromptr; + + + uint32 pcmcia_config; + uint32 pcmcia_memwait; + uint32 pcmcia_attrwait; + uint32 pcmcia_iowait; + uint32 ide_config; + uint32 ide_memwait; + uint32 ide_attrwait; + uint32 ide_iowait; + uint32 prog_config; + uint32 prog_waitcount; + uint32 flash_config; + uint32 flash_waitcount; + uint32 SECI_config; + uint32 SECI_status; + uint32 SECI_statusmask; + uint32 SECI_rxnibchanged; + + uint32 PAD[20]; + + + uint32 sromcontrol; + uint32 sromaddress; + uint32 sromdata; + uint32 PAD[1]; + + uint32 nflashctrl; + uint32 nflashconf; + uint32 nflashcoladdr; + uint32 nflashrowaddr; + uint32 nflashdata; + uint32 nflashwaitcnt0; + uint32 PAD[2]; + + uint32 seci_uart_data; + uint32 seci_uart_bauddiv; + uint32 seci_uart_fcr; + uint32 seci_uart_lcr; + uint32 seci_uart_mcr; + uint32 seci_uart_lsr; + uint32 seci_uart_msr; + uint32 seci_uart_baudadj; + + uint32 clk_ctl_st; + uint32 hw_war; + uint32 PAD[70]; + + + uint8 uart0data; + uint8 uart0imr; + uint8 uart0fcr; + uint8 uart0lcr; + uint8 uart0mcr; + uint8 uart0lsr; + uint8 uart0msr; + uint8 uart0scratch; + uint8 PAD[248]; + + uint8 uart1data; + uint8 uart1imr; + uint8 uart1fcr; + uint8 uart1lcr; + uint8 uart1mcr; + uint8 uart1lsr; + uint8 uart1msr; + uint8 uart1scratch; + uint32 PAD[126]; + + + + uint32 pmucontrol; + uint32 pmucapabilities; + uint32 pmustatus; + uint32 res_state; + uint32 res_pending; + uint32 pmutimer; + uint32 min_res_mask; + uint32 max_res_mask; + uint32 res_table_sel; + uint32 res_dep_mask; + uint32 res_updn_timer; + uint32 res_timer; + uint32 clkstretch; + uint32 pmuwatchdog; + uint32 gpiosel; + uint32 gpioenable; + uint32 res_req_timer_sel; + uint32 res_req_timer; + uint32 res_req_mask; + uint32 PAD; + uint32 chipcontrol_addr; + uint32 chipcontrol_data; + uint32 regcontrol_addr; + uint32 regcontrol_data; + uint32 pllcontrol_addr; + uint32 pllcontrol_data; + uint32 pmustrapopt; + uint32 pmu_xtalfreq; + uint32 PAD[100]; + uint16 sromotp[512]; +#ifdef NFLASH_SUPPORT + + uint32 nand_revision; + uint32 nand_cmd_start; + uint32 nand_cmd_addr_x; + uint32 nand_cmd_addr; + uint32 nand_cmd_end_addr; + uint32 nand_cs_nand_select; + uint32 nand_cs_nand_xor; + uint32 PAD; + uint32 nand_spare_rd0; + uint32 nand_spare_rd4; + uint32 nand_spare_rd8; + uint32 nand_spare_rd12; + uint32 nand_spare_wr0; + uint32 nand_spare_wr4; + uint32 nand_spare_wr8; + uint32 nand_spare_wr12; + uint32 nand_acc_control; + uint32 PAD; + uint32 nand_config; + uint32 PAD; + uint32 nand_timing_1; + uint32 nand_timing_2; + uint32 nand_semaphore; + uint32 PAD; + uint32 nand_devid; + uint32 nand_devid_x; + uint32 nand_block_lock_status; + uint32 nand_intfc_status; + uint32 nand_ecc_corr_addr_x; + uint32 nand_ecc_corr_addr; + uint32 nand_ecc_unc_addr_x; + uint32 nand_ecc_unc_addr; + uint32 nand_read_error_count; + uint32 nand_corr_stat_threshold; + uint32 PAD[2]; + uint32 nand_read_addr_x; + uint32 nand_read_addr; + uint32 nand_page_program_addr_x; + uint32 nand_page_program_addr; + uint32 nand_copy_back_addr_x; + uint32 nand_copy_back_addr; + uint32 nand_block_erase_addr_x; + uint32 nand_block_erase_addr; + uint32 nand_inv_read_addr_x; + uint32 nand_inv_read_addr; + uint32 PAD[2]; + uint32 nand_blk_wr_protect; + uint32 PAD[3]; + uint32 nand_acc_control_cs1; + uint32 nand_config_cs1; + uint32 nand_timing_1_cs1; + uint32 nand_timing_2_cs1; + uint32 PAD[20]; + uint32 nand_spare_rd16; + uint32 nand_spare_rd20; + uint32 nand_spare_rd24; + uint32 nand_spare_rd28; + uint32 nand_cache_addr; + uint32 nand_cache_data; + uint32 nand_ctrl_config; + uint32 nand_ctrl_status; +#endif + uint32 gci_corecaps0; + uint32 gci_corecaps1; + uint32 gci_corecaps2; + uint32 gci_corectrl; + uint32 gci_corestat; + uint32 gci_intstat; + uint32 gci_intmask; + uint32 gci_wakemask; + uint32 gci_levelintstat; + uint32 gci_eventintstat; + uint32 PAD[6]; + uint32 gci_indirect_addr; + uint32 gci_gpioctl; + uint32 PAD; + uint32 gci_gpiomask; + uint32 PAD; + uint32 gci_miscctl; + uint32 PAD[2]; + uint32 gci_input[32]; + uint32 gci_event[32]; + uint32 gci_output[4]; + uint32 gci_control_0; + uint32 gci_control_1; + uint32 gci_level_polreg; + uint32 gci_levelintmask; + uint32 gci_eventintmask; + uint32 PAD[3]; + uint32 gci_inbandlevelintmask; + uint32 gci_inbandeventintmask; + uint32 PAD[2]; + uint32 gci_seciauxtx; + uint32 gci_seciauxrx; + uint32 gci_secitx_datatag; + uint32 gci_secirx_datatag; + uint32 gci_secitx_datamask; + uint32 gci_seciusef0tx_reg; + uint32 gci_secif0tx_offset; + uint32 gci_secif0rx_offset; + uint32 gci_secif1tx_offset; + uint32 PAD[3]; + uint32 gci_uartescval; + uint32 PAD[3]; + uint32 gci_secibauddiv; + uint32 gci_secifcr; + uint32 gci_secilcr; + uint32 gci_secimcr; + uint32 PAD[2]; + uint32 gci_baudadj; + uint32 PAD; + uint32 gci_chipctrl; + uint32 gci_chipsts; +} chipcregs_t; + +#endif + + +#define CC_CHIPID 0 +#define CC_CAPABILITIES 4 +#define CC_CHIPST 0x2c +#define CC_EROMPTR 0xfc + +#define CC_OTPST 0x10 +#define CC_JTAGCMD 0x30 +#define CC_JTAGIR 0x34 +#define CC_JTAGDR 0x38 +#define CC_JTAGCTRL 0x3c +#define CC_GPIOPU 0x58 +#define CC_GPIOPD 0x5c +#define CC_GPIOIN 0x60 +#define CC_GPIOOUT 0x64 +#define CC_GPIOOUTEN 0x68 +#define CC_GPIOCTRL 0x6c +#define CC_GPIOPOL 0x70 +#define CC_GPIOINTM 0x74 +#define CC_WATCHDOG 0x80 +#define CC_CLKC_N 0x90 +#define CC_CLKC_M0 0x94 +#define CC_CLKC_M1 0x98 +#define CC_CLKC_M2 0x9c +#define CC_CLKC_M3 0xa0 +#define CC_CLKDIV 0xa4 +#define CC_SYS_CLK_CTL 0xc0 +#define CC_CLK_CTL_ST SI_CLK_CTL_ST +#define PMU_CTL 0x600 +#define PMU_CAP 0x604 +#define PMU_ST 0x608 +#define PMU_RES_STATE 0x60c +#define PMU_TIMER 0x614 +#define PMU_MIN_RES_MASK 0x618 +#define PMU_MAX_RES_MASK 0x61c +#define CC_CHIPCTL_ADDR 0x650 +#define CC_CHIPCTL_DATA 0x654 +#define PMU_REG_CONTROL_ADDR 0x658 +#define PMU_REG_CONTROL_DATA 0x65C +#define PMU_PLL_CONTROL_ADDR 0x660 +#define PMU_PLL_CONTROL_DATA 0x664 +#define CC_SROM_CTRL 0x190 +#define CC_SROM_OTP 0x800 +#define CC_GCI_INDIRECT_ADDR_REG 0xC40 +#define CC_GCI_CHIP_CTRL_REG 0xE00 +#define CC_GCI_CC_OFFSET_2 2 +#define CC_GCI_CC_OFFSET_5 5 + +#define CHIPCTRLREG0 0x0 +#define CHIPCTRLREG1 0x1 +#define CHIPCTRLREG2 0x2 +#define CHIPCTRLREG3 0x3 +#define CHIPCTRLREG4 0x4 +#define CHIPCTRLREG5 0x5 +#define CHIPCTRLREG6 0x6 +#define REGCTRLREG4 0x4 +#define MINRESMASKREG 0x618 +#define MAXRESMASKREG 0x61c +#define CHIPCTRLADDR 0x650 +#define CHIPCTRLDATA 0x654 +#define RSRCTABLEADDR 0x620 +#define RSRCUPDWNTIME 0x628 +#define PMUREG_RESREQ_MASK 0x68c +#define EXT_LPO_AVAIL 0x100 +#define LPO_SEL 0x0 +#define CC_EXT_LPO_PU 0x200000 +#define GC_EXT_LPO_PU 0x2 +#define CC_INT_LPO_PU 0x100000 +#define GC_INT_LPO_PU 0x1 +#define EXT_LPO_SEL 0x8 +#define INT_LPO_SEL 0x4 + +#ifdef NFLASH_SUPPORT + +#define CC_NAND_REVISION 0xC00 +#define CC_NAND_CMD_START 0xC04 +#define CC_NAND_CMD_ADDR 0xC0C +#define CC_NAND_SPARE_RD_0 0xC20 +#define CC_NAND_SPARE_RD_4 0xC24 +#define CC_NAND_SPARE_RD_8 0xC28 +#define CC_NAND_SPARE_RD_C 0xC2C +#define CC_NAND_CONFIG 0xC48 +#define CC_NAND_DEVID 0xC60 +#define CC_NAND_DEVID_EXT 0xC64 +#define CC_NAND_INTFC_STATUS 0xC6C +#endif + + +#define CID_ID_MASK 0x0000ffff +#define CID_REV_MASK 0x000f0000 +#define CID_REV_SHIFT 16 +#define CID_PKG_MASK 0x00f00000 +#define CID_PKG_SHIFT 20 +#define CID_CC_MASK 0x0f000000 +#define CID_CC_SHIFT 24 +#define CID_TYPE_MASK 0xf0000000 +#define CID_TYPE_SHIFT 28 + + +#define CC_CAP_UARTS_MASK 0x00000003 +#define CC_CAP_MIPSEB 0x00000004 +#define CC_CAP_UCLKSEL 0x00000018 +#define CC_CAP_UINTCLK 0x00000008 +#define CC_CAP_UARTGPIO 0x00000020 +#define CC_CAP_EXTBUS_MASK 0x000000c0 +#define CC_CAP_EXTBUS_NONE 0x00000000 +#define CC_CAP_EXTBUS_FULL 0x00000040 +#define CC_CAP_EXTBUS_PROG 0x00000080 +#define CC_CAP_FLASH_MASK 0x00000700 +#define CC_CAP_PLL_MASK 0x00038000 +#define CC_CAP_PWR_CTL 0x00040000 +#define CC_CAP_OTPSIZE 0x00380000 +#define CC_CAP_OTPSIZE_SHIFT 19 +#define CC_CAP_OTPSIZE_BASE 5 +#define CC_CAP_JTAGP 0x00400000 +#define CC_CAP_ROM 0x00800000 +#define CC_CAP_BKPLN64 0x08000000 +#define CC_CAP_PMU 0x10000000 +#define CC_CAP_ECI 0x20000000 +#define CC_CAP_SROM 0x40000000 +#define CC_CAP_NFLASH 0x80000000 + +#define CC_CAP2_SECI 0x00000001 +#define CC_CAP2_GSIO 0x00000002 + + +#define CC_CAP_EXT_SECI_PRESENT 0x00000001 +#define CC_CAP_EXT_GCI_PRESENT 0x00000004 + +#define GCI_WL_CHN_INFO_MASK (0xFF00) +#define GCI_WL_BANDWIDTH_OFFSET 41 +#define GCI_WL_BANDWIDTH_MASK (0x7) + + +#define PLL_NONE 0x00000000 +#define PLL_TYPE1 0x00010000 +#define PLL_TYPE2 0x00020000 +#define PLL_TYPE3 0x00030000 +#define PLL_TYPE4 0x00008000 +#define PLL_TYPE5 0x00018000 +#define PLL_TYPE6 0x00028000 +#define PLL_TYPE7 0x00038000 + + +#define ILP_CLOCK 32000 + + +#define ALP_CLOCK 20000000 + +#ifdef CFG_SIM +#define NS_ALP_CLOCK 84922 +#define NS_SLOW_ALP_CLOCK 84922 +#define NS_CPU_CLOCK 534500 +#define NS_SLOW_CPU_CLOCK 534500 +#define NS_SI_CLOCK 271750 +#define NS_SLOW_SI_CLOCK 271750 +#define NS_FAST_MEM_CLOCK 271750 +#define NS_MEM_CLOCK 271750 +#define NS_SLOW_MEM_CLOCK 271750 +#else +#define NS_ALP_CLOCK 125000000 +#define NS_SLOW_ALP_CLOCK 100000000 +#define NS_CPU_CLOCK 1000000000 +#define NS_SLOW_CPU_CLOCK 800000000 +#define NS_SI_CLOCK 250000000 +#define NS_SLOW_SI_CLOCK 200000000 +#define NS_FAST_MEM_CLOCK 800000000 +#define NS_MEM_CLOCK 533000000 +#define NS_SLOW_MEM_CLOCK 400000000 +#endif + + +#define HT_CLOCK 80000000 + + +#define CC_UARTCLKO 0x00000001 +#define CC_SE 0x00000002 +#define CC_ASYNCGPIO 0x00000004 +#define CC_UARTCLKEN 0x00000008 + + +#define CHIPCTRL_4321A0_DEFAULT 0x3a4 +#define CHIPCTRL_4321A1_DEFAULT 0x0a4 +#define CHIPCTRL_4321_PLL_DOWN 0x800000 + + +#define OTPS_OL_MASK 0x000000ff +#define OTPS_OL_MFG 0x00000001 +#define OTPS_OL_OR1 0x00000002 +#define OTPS_OL_OR2 0x00000004 +#define OTPS_OL_GU 0x00000008 +#define OTPS_GUP_MASK 0x00000f00 +#define OTPS_GUP_SHIFT 8 +#define OTPS_GUP_HW 0x00000100 +#define OTPS_GUP_SW 0x00000200 +#define OTPS_GUP_CI 0x00000400 +#define OTPS_GUP_FUSE 0x00000800 +#define OTPS_READY 0x00001000 +#define OTPS_RV(x) (1 << (16 + (x))) +#define OTPS_RV_MASK 0x0fff0000 +#define OTPS_PROGOK 0x40000000 + + +#define OTPC_PROGSEL 0x00000001 +#define OTPC_PCOUNT_MASK 0x0000000e +#define OTPC_PCOUNT_SHIFT 1 +#define OTPC_VSEL_MASK 0x000000f0 +#define OTPC_VSEL_SHIFT 4 +#define OTPC_TMM_MASK 0x00000700 +#define OTPC_TMM_SHIFT 8 +#define OTPC_ODM 0x00000800 +#define OTPC_PROGEN 0x80000000 + + +#define OTPC_40NM_PROGSEL_SHIFT 0 +#define OTPC_40NM_PCOUNT_SHIFT 1 +#define OTPC_40NM_PCOUNT_WR 0xA +#define OTPC_40NM_PCOUNT_V1X 0xB +#define OTPC_40NM_REGCSEL_SHIFT 5 +#define OTPC_40NM_REGCSEL_DEF 0x4 +#define OTPC_40NM_PROGIN_SHIFT 8 +#define OTPC_40NM_R2X_SHIFT 10 +#define OTPC_40NM_ODM_SHIFT 11 +#define OTPC_40NM_DF_SHIFT 15 +#define OTPC_40NM_VSEL_SHIFT 16 +#define OTPC_40NM_VSEL_WR 0xA +#define OTPC_40NM_VSEL_V1X 0xA +#define OTPC_40NM_VSEL_R1X 0x5 +#define OTPC_40NM_COFAIL_SHIFT 30 + +#define OTPC1_CPCSEL_SHIFT 0 +#define OTPC1_CPCSEL_DEF 6 +#define OTPC1_TM_SHIFT 8 +#define OTPC1_TM_WR 0x84 +#define OTPC1_TM_V1X 0x84 +#define OTPC1_TM_R1X 0x4 + + +#define OTPP_COL_MASK 0x000000ff +#define OTPP_COL_SHIFT 0 +#define OTPP_ROW_MASK 0x0000ff00 +#define OTPP_ROW_SHIFT 8 +#define OTPP_OC_MASK 0x0f000000 +#define OTPP_OC_SHIFT 24 +#define OTPP_READERR 0x10000000 +#define OTPP_VALUE_MASK 0x20000000 +#define OTPP_VALUE_SHIFT 29 +#define OTPP_START_BUSY 0x80000000 +#define OTPP_READ 0x40000000 + + +#define OTPL_HWRGN_OFF_MASK 0x00000FFF +#define OTPL_HWRGN_OFF_SHIFT 0 +#define OTPL_WRAP_REVID_MASK 0x00F80000 +#define OTPL_WRAP_REVID_SHIFT 19 +#define OTPL_WRAP_TYPE_MASK 0x00070000 +#define OTPL_WRAP_TYPE_SHIFT 16 +#define OTPL_WRAP_TYPE_65NM 0 +#define OTPL_WRAP_TYPE_40NM 1 +#define OTPL_ROW_SIZE_MASK 0x70000000 +#define OTPL_ROW_SIZE_SHIFT 28 + + +#define OTP_CISFORMAT_NEW 0x80000000 + + +#define OTPPOC_READ 0 +#define OTPPOC_BIT_PROG 1 +#define OTPPOC_VERIFY 3 +#define OTPPOC_INIT 4 +#define OTPPOC_SET 5 +#define OTPPOC_RESET 6 +#define OTPPOC_OCST 7 +#define OTPPOC_ROW_LOCK 8 +#define OTPPOC_PRESCN_TEST 9 + + +#define OTPPOC_READ_40NM 0 +#define OTPPOC_PROG_ENABLE_40NM 1 +#define OTPPOC_PROG_DISABLE_40NM 2 +#define OTPPOC_VERIFY_40NM 3 +#define OTPPOC_WORD_VERIFY_1_40NM 4 +#define OTPPOC_ROW_LOCK_40NM 5 +#define OTPPOC_STBY_40NM 6 +#define OTPPOC_WAKEUP_40NM 7 +#define OTPPOC_WORD_VERIFY_0_40NM 8 +#define OTPPOC_PRESCN_TEST_40NM 9 +#define OTPPOC_BIT_PROG_40NM 10 +#define OTPPOC_WORDPROG_40NM 11 +#define OTPPOC_BURNIN_40NM 12 +#define OTPPOC_AUTORELOAD_40NM 13 +#define OTPPOC_OVST_READ_40NM 14 +#define OTPPOC_OVST_PROG_40NM 15 + + +#define OTPLAYOUTEXT_FUSE_MASK 0x3FF +#define OTPLAYOUTEXT_AUTOLOAD_PRESENT_MASK 0x00001000 +#define OTPLAYOUTEXT_AUTOLOAD_PRESENT_SHIFT 12 +#define OTPLAYOUTEXT_NUM_AUTOLOAD_MASK 0x0003E000 +#define OTPLAYOUTEXT_NUM_AUTOLOAD_SHIFT 13 +#define OTPLAYOUTEXT_AUTOLOAD_OFF_MASK 0x0FF00000 +#define OTPLAYOUTEXT_AUTOLOAD_OFF_SHIFT 20 + + + +#define JTAGM_CREV_OLD 10 +#define JTAGM_CREV_IRP 22 +#define JTAGM_CREV_RTI 28 + + +#define JCMD_START 0x80000000 +#define JCMD_BUSY 0x80000000 +#define JCMD_STATE_MASK 0x60000000 +#define JCMD_STATE_TLR 0x00000000 +#define JCMD_STATE_PIR 0x20000000 +#define JCMD_STATE_PDR 0x40000000 +#define JCMD_STATE_RTI 0x60000000 +#define JCMD0_ACC_MASK 0x0000f000 +#define JCMD0_ACC_IRDR 0x00000000 +#define JCMD0_ACC_DR 0x00001000 +#define JCMD0_ACC_IR 0x00002000 +#define JCMD0_ACC_RESET 0x00003000 +#define JCMD0_ACC_IRPDR 0x00004000 +#define JCMD0_ACC_PDR 0x00005000 +#define JCMD0_IRW_MASK 0x00000f00 +#define JCMD_ACC_MASK 0x000f0000 +#define JCMD_ACC_IRDR 0x00000000 +#define JCMD_ACC_DR 0x00010000 +#define JCMD_ACC_IR 0x00020000 +#define JCMD_ACC_RESET 0x00030000 +#define JCMD_ACC_IRPDR 0x00040000 +#define JCMD_ACC_PDR 0x00050000 +#define JCMD_ACC_PIR 0x00060000 +#define JCMD_ACC_IRDR_I 0x00070000 +#define JCMD_ACC_DR_I 0x00080000 +#define JCMD_IRW_MASK 0x00001f00 +#define JCMD_IRW_SHIFT 8 +#define JCMD_DRW_MASK 0x0000003f + + +#define JCTRL_FORCE_CLK 4 +#define JCTRL_EXT_EN 2 +#define JCTRL_EN 1 + + +#define CLKD_SFLASH 0x0f000000 +#define CLKD_SFLASH_SHIFT 24 +#define CLKD_OTP 0x000f0000 +#define CLKD_OTP_SHIFT 16 +#define CLKD_JTAG 0x00000f00 +#define CLKD_JTAG_SHIFT 8 +#define CLKD_UART 0x000000ff + +#define CLKD2_SROM 0x00000003 + + +#define CI_GPIO 0x00000001 +#define CI_EI 0x00000002 +#define CI_TEMP 0x00000004 +#define CI_SIRQ 0x00000008 +#define CI_ECI 0x00000010 +#define CI_PMU 0x00000020 +#define CI_UART 0x00000040 +#define CI_SGWI 0x00000080 +#define CI_SPM 0x00000100 +#define CI_WDRESET 0x80000000 + + +#define SCC_SS_MASK 0x00000007 +#define SCC_SS_LPO 0x00000000 +#define SCC_SS_XTAL 0x00000001 +#define SCC_SS_PCI 0x00000002 +#define SCC_LF 0x00000200 +#define SCC_LP 0x00000400 +#define SCC_FS 0x00000800 +#define SCC_IP 0x00001000 +#define SCC_XC 0x00002000 +#define SCC_XP 0x00004000 +#define SCC_CD_MASK 0xffff0000 +#define SCC_CD_SHIFT 16 + + +#define SYCC_IE 0x00000001 +#define SYCC_AE 0x00000002 +#define SYCC_FP 0x00000004 +#define SYCC_AR 0x00000008 +#define SYCC_HR 0x00000010 +#define SYCC_CD_MASK 0xffff0000 +#define SYCC_CD_SHIFT 16 + + +#define BPIA_BYTEEN 0x0000000f +#define BPIA_SZ1 0x00000001 +#define BPIA_SZ2 0x00000003 +#define BPIA_SZ4 0x00000007 +#define BPIA_SZ8 0x0000000f +#define BPIA_WRITE 0x00000100 +#define BPIA_START 0x00000200 +#define BPIA_BUSY 0x00000200 +#define BPIA_ERROR 0x00000400 + + +#define CF_EN 0x00000001 +#define CF_EM_MASK 0x0000000e +#define CF_EM_SHIFT 1 +#define CF_EM_FLASH 0 +#define CF_EM_SYNC 2 +#define CF_EM_PCMCIA 4 +#define CF_DS 0x00000010 +#define CF_BS 0x00000020 +#define CF_CD_MASK 0x000000c0 +#define CF_CD_SHIFT 6 +#define CF_CD_DIV2 0x00000000 +#define CF_CD_DIV3 0x00000040 +#define CF_CD_DIV4 0x00000080 +#define CF_CE 0x00000100 +#define CF_SB 0x00000200 + + +#define PM_W0_MASK 0x0000003f +#define PM_W1_MASK 0x00001f00 +#define PM_W1_SHIFT 8 +#define PM_W2_MASK 0x001f0000 +#define PM_W2_SHIFT 16 +#define PM_W3_MASK 0x1f000000 +#define PM_W3_SHIFT 24 + + +#define PA_W0_MASK 0x0000003f +#define PA_W1_MASK 0x00001f00 +#define PA_W1_SHIFT 8 +#define PA_W2_MASK 0x001f0000 +#define PA_W2_SHIFT 16 +#define PA_W3_MASK 0x1f000000 +#define PA_W3_SHIFT 24 + + +#define PI_W0_MASK 0x0000003f +#define PI_W1_MASK 0x00001f00 +#define PI_W1_SHIFT 8 +#define PI_W2_MASK 0x001f0000 +#define PI_W2_SHIFT 16 +#define PI_W3_MASK 0x1f000000 +#define PI_W3_SHIFT 24 + + +#define PW_W0_MASK 0x0000001f +#define PW_W1_MASK 0x00001f00 +#define PW_W1_SHIFT 8 +#define PW_W2_MASK 0x001f0000 +#define PW_W2_SHIFT 16 +#define PW_W3_MASK 0x1f000000 +#define PW_W3_SHIFT 24 + +#define PW_W0 0x0000000c +#define PW_W1 0x00000a00 +#define PW_W2 0x00020000 +#define PW_W3 0x01000000 + + +#define FW_W0_MASK 0x0000003f +#define FW_W1_MASK 0x00001f00 +#define FW_W1_SHIFT 8 +#define FW_W2_MASK 0x001f0000 +#define FW_W2_SHIFT 16 +#define FW_W3_MASK 0x1f000000 +#define FW_W3_SHIFT 24 + + +#define SRC_START 0x80000000 +#define SRC_BUSY 0x80000000 +#define SRC_OPCODE 0x60000000 +#define SRC_OP_READ 0x00000000 +#define SRC_OP_WRITE 0x20000000 +#define SRC_OP_WRDIS 0x40000000 +#define SRC_OP_WREN 0x60000000 +#define SRC_OTPSEL 0x00000010 +#define SRC_LOCK 0x00000008 +#define SRC_SIZE_MASK 0x00000006 +#define SRC_SIZE_1K 0x00000000 +#define SRC_SIZE_4K 0x00000002 +#define SRC_SIZE_16K 0x00000004 +#define SRC_SIZE_SHIFT 1 +#define SRC_PRESENT 0x00000001 + + +#define PCTL_ILP_DIV_MASK 0xffff0000 +#define PCTL_ILP_DIV_SHIFT 16 +#define PCTL_PLL_PLLCTL_UPD 0x00000400 +#define PCTL_NOILP_ON_WAIT 0x00000200 +#define PCTL_HT_REQ_EN 0x00000100 +#define PCTL_ALP_REQ_EN 0x00000080 +#define PCTL_XTALFREQ_MASK 0x0000007c +#define PCTL_XTALFREQ_SHIFT 2 +#define PCTL_ILP_DIV_EN 0x00000002 +#define PCTL_LPO_SEL 0x00000001 + + +#define CSTRETCH_HT 0xffff0000 +#define CSTRETCH_ALP 0x0000ffff + + +#define GPIO_ONTIME_SHIFT 16 + + +#define CN_N1_MASK 0x3f +#define CN_N2_MASK 0x3f00 +#define CN_N2_SHIFT 8 +#define CN_PLLC_MASK 0xf0000 +#define CN_PLLC_SHIFT 16 + + +#define CC_M1_MASK 0x3f +#define CC_M2_MASK 0x3f00 +#define CC_M2_SHIFT 8 +#define CC_M3_MASK 0x3f0000 +#define CC_M3_SHIFT 16 +#define CC_MC_MASK 0x1f000000 +#define CC_MC_SHIFT 24 + + +#define CC_F6_2 0x02 +#define CC_F6_3 0x03 +#define CC_F6_4 0x05 +#define CC_F6_5 0x09 +#define CC_F6_6 0x11 +#define CC_F6_7 0x21 + +#define CC_F5_BIAS 5 + +#define CC_MC_BYPASS 0x08 +#define CC_MC_M1 0x04 +#define CC_MC_M1M2 0x02 +#define CC_MC_M1M2M3 0x01 +#define CC_MC_M1M3 0x11 + + +#define CC_T2_BIAS 2 +#define CC_T2M2_BIAS 3 + +#define CC_T2MC_M1BYP 1 +#define CC_T2MC_M2BYP 2 +#define CC_T2MC_M3BYP 4 + + +#define CC_T6_MMASK 1 +#define CC_T6_M0 120000000 +#define CC_T6_M1 100000000 +#define SB2MIPS_T6(sb) (2 * (sb)) + + +#define CC_CLOCK_BASE1 24000000 +#define CC_CLOCK_BASE2 12500000 + + +#define CLKC_5350_N 0x0311 +#define CLKC_5350_M 0x04020009 + + +#define FLASH_NONE 0x000 +#define SFLASH_ST 0x100 +#define SFLASH_AT 0x200 +#define NFLASH 0x300 +#define PFLASH 0x700 +#define QSPIFLASH_ST 0x800 +#define QSPIFLASH_AT 0x900 + + +#define CC_CFG_EN 0x0001 +#define CC_CFG_EM_MASK 0x000e +#define CC_CFG_EM_ASYNC 0x0000 +#define CC_CFG_EM_SYNC 0x0002 +#define CC_CFG_EM_PCMCIA 0x0004 +#define CC_CFG_EM_IDE 0x0006 +#define CC_CFG_DS 0x0010 +#define CC_CFG_CD_MASK 0x00e0 +#define CC_CFG_CE 0x0100 +#define CC_CFG_SB 0x0200 +#define CC_CFG_IS 0x0400 + + +#define CC_EB_BASE 0x1a000000 +#define CC_EB_PCMCIA_MEM 0x1a000000 +#define CC_EB_PCMCIA_IO 0x1a200000 +#define CC_EB_PCMCIA_CFG 0x1a400000 +#define CC_EB_IDE 0x1a800000 +#define CC_EB_PCMCIA1_MEM 0x1a800000 +#define CC_EB_PCMCIA1_IO 0x1aa00000 +#define CC_EB_PCMCIA1_CFG 0x1ac00000 +#define CC_EB_PROGIF 0x1b000000 + + + +#define SFLASH_OPCODE 0x000000ff +#define SFLASH_ACTION 0x00000700 +#define SFLASH_CS_ACTIVE 0x00001000 +#define SFLASH_START 0x80000000 +#define SFLASH_BUSY SFLASH_START + + +#define SFLASH_ACT_OPONLY 0x0000 +#define SFLASH_ACT_OP1D 0x0100 +#define SFLASH_ACT_OP3A 0x0200 +#define SFLASH_ACT_OP3A1D 0x0300 +#define SFLASH_ACT_OP3A4D 0x0400 +#define SFLASH_ACT_OP3A4X4D 0x0500 +#define SFLASH_ACT_OP3A1X4D 0x0700 + + +#define SFLASH_ST_WREN 0x0006 +#define SFLASH_ST_WRDIS 0x0004 +#define SFLASH_ST_RDSR 0x0105 +#define SFLASH_ST_WRSR 0x0101 +#define SFLASH_ST_READ 0x0303 +#define SFLASH_ST_PP 0x0302 +#define SFLASH_ST_SE 0x02d8 +#define SFLASH_ST_BE 0x00c7 +#define SFLASH_ST_DP 0x00b9 +#define SFLASH_ST_RES 0x03ab +#define SFLASH_ST_CSA 0x1000 +#define SFLASH_ST_SSE 0x0220 + +#define SFLASH_MXIC_RDID 0x0390 +#define SFLASH_MXIC_MFID 0xc2 + + +#define SFLASH_ST_WIP 0x01 +#define SFLASH_ST_WEL 0x02 +#define SFLASH_ST_BP_MASK 0x1c +#define SFLASH_ST_BP_SHIFT 2 +#define SFLASH_ST_SRWD 0x80 + + +#define SFLASH_AT_READ 0x07e8 +#define SFLASH_AT_PAGE_READ 0x07d2 +#define SFLASH_AT_BUF1_READ +#define SFLASH_AT_BUF2_READ +#define SFLASH_AT_STATUS 0x01d7 +#define SFLASH_AT_BUF1_WRITE 0x0384 +#define SFLASH_AT_BUF2_WRITE 0x0387 +#define SFLASH_AT_BUF1_ERASE_PROGRAM 0x0283 +#define SFLASH_AT_BUF2_ERASE_PROGRAM 0x0286 +#define SFLASH_AT_BUF1_PROGRAM 0x0288 +#define SFLASH_AT_BUF2_PROGRAM 0x0289 +#define SFLASH_AT_PAGE_ERASE 0x0281 +#define SFLASH_AT_BLOCK_ERASE 0x0250 +#define SFLASH_AT_BUF1_WRITE_ERASE_PROGRAM 0x0382 +#define SFLASH_AT_BUF2_WRITE_ERASE_PROGRAM 0x0385 +#define SFLASH_AT_BUF1_LOAD 0x0253 +#define SFLASH_AT_BUF2_LOAD 0x0255 +#define SFLASH_AT_BUF1_COMPARE 0x0260 +#define SFLASH_AT_BUF2_COMPARE 0x0261 +#define SFLASH_AT_BUF1_REPROGRAM 0x0258 +#define SFLASH_AT_BUF2_REPROGRAM 0x0259 + + +#define SFLASH_AT_READY 0x80 +#define SFLASH_AT_MISMATCH 0x40 +#define SFLASH_AT_ID_MASK 0x38 +#define SFLASH_AT_ID_SHIFT 3 + + +#define GSIO_START 0x80000000 +#define GSIO_BUSY GSIO_START + + + +#define UART_RX 0 +#define UART_TX 0 +#define UART_DLL 0 +#define UART_IER 1 +#define UART_DLM 1 +#define UART_IIR 2 +#define UART_FCR 2 +#define UART_LCR 3 +#define UART_MCR 4 +#define UART_LSR 5 +#define UART_MSR 6 +#define UART_SCR 7 +#define UART_LCR_DLAB 0x80 +#define UART_LCR_WLEN8 0x03 +#define UART_MCR_OUT2 0x08 +#define UART_MCR_LOOP 0x10 +#define UART_LSR_RX_FIFO 0x80 +#define UART_LSR_TDHR 0x40 +#define UART_LSR_THRE 0x20 +#define UART_LSR_BREAK 0x10 +#define UART_LSR_FRAMING 0x08 +#define UART_LSR_PARITY 0x04 +#define UART_LSR_OVERRUN 0x02 +#define UART_LSR_RXRDY 0x01 +#define UART_FCR_FIFO_ENABLE 1 + + +#define UART_IIR_FIFO_MASK 0xc0 +#define UART_IIR_INT_MASK 0xf +#define UART_IIR_MDM_CHG 0x0 +#define UART_IIR_NOINT 0x1 +#define UART_IIR_THRE 0x2 +#define UART_IIR_RCVD_DATA 0x4 +#define UART_IIR_RCVR_STATUS 0x6 +#define UART_IIR_CHAR_TIME 0xc + + +#define UART_IER_EDSSI 8 +#define UART_IER_ELSI 4 +#define UART_IER_ETBEI 2 +#define UART_IER_ERBFI 1 + + +#define PST_EXTLPOAVAIL 0x0100 +#define PST_WDRESET 0x0080 +#define PST_INTPEND 0x0040 +#define PST_SBCLKST 0x0030 +#define PST_SBCLKST_ILP 0x0010 +#define PST_SBCLKST_ALP 0x0020 +#define PST_SBCLKST_HT 0x0030 +#define PST_ALPAVAIL 0x0008 +#define PST_HTAVAIL 0x0004 +#define PST_RESINIT 0x0003 + + +#define PCAP_REV_MASK 0x000000ff +#define PCAP_RC_MASK 0x00001f00 +#define PCAP_RC_SHIFT 8 +#define PCAP_TC_MASK 0x0001e000 +#define PCAP_TC_SHIFT 13 +#define PCAP_PC_MASK 0x001e0000 +#define PCAP_PC_SHIFT 17 +#define PCAP_VC_MASK 0x01e00000 +#define PCAP_VC_SHIFT 21 +#define PCAP_CC_MASK 0x1e000000 +#define PCAP_CC_SHIFT 25 +#define PCAP5_PC_MASK 0x003e0000 +#define PCAP5_PC_SHIFT 17 +#define PCAP5_VC_MASK 0x07c00000 +#define PCAP5_VC_SHIFT 22 +#define PCAP5_CC_MASK 0xf8000000 +#define PCAP5_CC_SHIFT 27 + + + +#define PRRT_TIME_MASK 0x03ff +#define PRRT_INTEN 0x0400 +#define PRRT_REQ_ACTIVE 0x0800 +#define PRRT_ALP_REQ 0x1000 +#define PRRT_HT_REQ 0x2000 +#define PRRT_HQ_REQ 0x4000 + + +#define PMURES_BIT(bit) (1 << (bit)) + + +#define PMURES_MAX_RESNUM 30 + + +#define PMU_CHIPCTL0 0 + + +#define PMU_CC1_CLKREQ_TYPE_SHIFT 19 +#define PMU_CC1_CLKREQ_TYPE_MASK (1 << PMU_CC1_CLKREQ_TYPE_SHIFT) + +#define CLKREQ_TYPE_CONFIG_OPENDRAIN 0 +#define CLKREQ_TYPE_CONFIG_PUSHPULL 1 + + +#define PMU_CHIPCTL1 1 +#define PMU_CC1_RXC_DLL_BYPASS 0x00010000 +#define PMU_CC1_ENABLE_BBPLL_PWR_DOWN 0x00000010 + +#define PMU_CC1_IF_TYPE_MASK 0x00000030 +#define PMU_CC1_IF_TYPE_RMII 0x00000000 +#define PMU_CC1_IF_TYPE_MII 0x00000010 +#define PMU_CC1_IF_TYPE_RGMII 0x00000020 + +#define PMU_CC1_SW_TYPE_MASK 0x000000c0 +#define PMU_CC1_SW_TYPE_EPHY 0x00000000 +#define PMU_CC1_SW_TYPE_EPHYMII 0x00000040 +#define PMU_CC1_SW_TYPE_EPHYRMII 0x00000080 +#define PMU_CC1_SW_TYPE_RGMII 0x000000c0 + + +#define PMU_CHIPCTL2 2 +#define PMU_CC2_FORCE_SUBCORE_PWR_SWITCH_ON (1 << 18) +#define PMU_CC2_FORCE_PHY_PWR_SWITCH_ON (1 << 19) +#define PMU_CC2_FORCE_VDDM_PWR_SWITCH_ON (1 << 20) +#define PMU_CC2_FORCE_MEMLPLDO_PWR_SWITCH_ON (1 << 21) + + +#define PMU_CHIPCTL3 3 +#define PMU_CC3_ENABLE_SDIO_WAKEUP_SHIFT 19 +#define PMU_CC3_ENABLE_RF_SHIFT 22 +#define PMU_CC3_RF_DISABLE_IVALUE_SHIFT 23 + + +#define PMU_CHIPCTL5 5 + + +#define PMU_CHIPCTL6 6 +#define PMU_CC6_ENABLE_CLKREQ_WAKEUP (1 << 4) +#define PMU_CC6_ENABLE_PMU_WAKEUP_ALP (1 << 6) + + + + +#define PMU0_PLL0_PLLCTL0 0 +#define PMU0_PLL0_PC0_PDIV_MASK 1 +#define PMU0_PLL0_PC0_PDIV_FREQ 25000 +#define PMU0_PLL0_PC0_DIV_ARM_MASK 0x00000038 +#define PMU0_PLL0_PC0_DIV_ARM_SHIFT 3 +#define PMU0_PLL0_PC0_DIV_ARM_BASE 8 + + +#define PMU0_PLL0_PC0_DIV_ARM_110MHZ 0 +#define PMU0_PLL0_PC0_DIV_ARM_97_7MHZ 1 +#define PMU0_PLL0_PC0_DIV_ARM_88MHZ 2 +#define PMU0_PLL0_PC0_DIV_ARM_80MHZ 3 +#define PMU0_PLL0_PC0_DIV_ARM_73_3MHZ 4 +#define PMU0_PLL0_PC0_DIV_ARM_67_7MHZ 5 +#define PMU0_PLL0_PC0_DIV_ARM_62_9MHZ 6 +#define PMU0_PLL0_PC0_DIV_ARM_58_6MHZ 7 + + +#define PMU0_PLL0_PLLCTL1 1 +#define PMU0_PLL0_PC1_WILD_INT_MASK 0xf0000000 +#define PMU0_PLL0_PC1_WILD_INT_SHIFT 28 +#define PMU0_PLL0_PC1_WILD_FRAC_MASK 0x0fffff00 +#define PMU0_PLL0_PC1_WILD_FRAC_SHIFT 8 +#define PMU0_PLL0_PC1_STOP_MOD 0x00000040 + + +#define PMU0_PLL0_PLLCTL2 2 +#define PMU0_PLL0_PC2_WILD_INT_MASK 0xf +#define PMU0_PLL0_PC2_WILD_INT_SHIFT 4 + + + +#define PMU1_PLL0_PLLCTL0 0 +#define PMU1_PLL0_PC0_P1DIV_MASK 0x00f00000 +#define PMU1_PLL0_PC0_P1DIV_SHIFT 20 +#define PMU1_PLL0_PC0_P2DIV_MASK 0x0f000000 +#define PMU1_PLL0_PC0_P2DIV_SHIFT 24 + + +#define PMU1_PLL0_PLLCTL1 1 +#define PMU1_PLL0_PC1_M1DIV_MASK 0x000000ff +#define PMU1_PLL0_PC1_M1DIV_SHIFT 0 +#define PMU1_PLL0_PC1_M2DIV_MASK 0x0000ff00 +#define PMU1_PLL0_PC1_M2DIV_SHIFT 8 +#define PMU1_PLL0_PC1_M3DIV_MASK 0x00ff0000 +#define PMU1_PLL0_PC1_M3DIV_SHIFT 16 +#define PMU1_PLL0_PC1_M4DIV_MASK 0xff000000 +#define PMU1_PLL0_PC1_M4DIV_SHIFT 24 +#define PMU1_PLL0_PC1_M4DIV_BY_9 9 +#define PMU1_PLL0_PC1_M4DIV_BY_18 0x12 +#define PMU1_PLL0_PC1_M4DIV_BY_36 0x24 + +#define DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT 8 +#define DOT11MAC_880MHZ_CLK_DIVISOR_MASK (0xFF << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT) +#define DOT11MAC_880MHZ_CLK_DIVISOR_VAL (0xE << DOT11MAC_880MHZ_CLK_DIVISOR_SHIFT) + + +#define PMU1_PLL0_PLLCTL2 2 +#define PMU1_PLL0_PC2_M5DIV_MASK 0x000000ff +#define PMU1_PLL0_PC2_M5DIV_SHIFT 0 +#define PMU1_PLL0_PC2_M5DIV_BY_12 0xc +#define PMU1_PLL0_PC2_M5DIV_BY_18 0x12 +#define PMU1_PLL0_PC2_M5DIV_BY_36 0x24 +#define PMU1_PLL0_PC2_M6DIV_MASK 0x0000ff00 +#define PMU1_PLL0_PC2_M6DIV_SHIFT 8 +#define PMU1_PLL0_PC2_M6DIV_BY_18 0x12 +#define PMU1_PLL0_PC2_M6DIV_BY_36 0x24 +#define PMU1_PLL0_PC2_NDIV_MODE_MASK 0x000e0000 +#define PMU1_PLL0_PC2_NDIV_MODE_SHIFT 17 +#define PMU1_PLL0_PC2_NDIV_MODE_MASH 1 +#define PMU1_PLL0_PC2_NDIV_MODE_MFB 2 +#define PMU1_PLL0_PC2_NDIV_INT_MASK 0x1ff00000 +#define PMU1_PLL0_PC2_NDIV_INT_SHIFT 20 + + +#define PMU1_PLL0_PLLCTL3 3 +#define PMU1_PLL0_PC3_NDIV_FRAC_MASK 0x00ffffff +#define PMU1_PLL0_PC3_NDIV_FRAC_SHIFT 0 + + +#define PMU1_PLL0_PLLCTL4 4 + + +#define PMU1_PLL0_PLLCTL5 5 +#define PMU1_PLL0_PC5_CLK_DRV_MASK 0xffffff00 +#define PMU1_PLL0_PC5_CLK_DRV_SHIFT 8 + + +#define PMU2_PHY_PLL_PLLCTL 4 +#define PMU2_SI_PLL_PLLCTL 10 + + + + +#define PMU2_PLL_PLLCTL0 0 +#define PMU2_PLL_PC0_P1DIV_MASK 0x00f00000 +#define PMU2_PLL_PC0_P1DIV_SHIFT 20 +#define PMU2_PLL_PC0_P2DIV_MASK 0x0f000000 +#define PMU2_PLL_PC0_P2DIV_SHIFT 24 + + +#define PMU2_PLL_PLLCTL1 1 +#define PMU2_PLL_PC1_M1DIV_MASK 0x000000ff +#define PMU2_PLL_PC1_M1DIV_SHIFT 0 +#define PMU2_PLL_PC1_M2DIV_MASK 0x0000ff00 +#define PMU2_PLL_PC1_M2DIV_SHIFT 8 +#define PMU2_PLL_PC1_M3DIV_MASK 0x00ff0000 +#define PMU2_PLL_PC1_M3DIV_SHIFT 16 +#define PMU2_PLL_PC1_M4DIV_MASK 0xff000000 +#define PMU2_PLL_PC1_M4DIV_SHIFT 24 + + +#define PMU2_PLL_PLLCTL2 2 +#define PMU2_PLL_PC2_M5DIV_MASK 0x000000ff +#define PMU2_PLL_PC2_M5DIV_SHIFT 0 +#define PMU2_PLL_PC2_M6DIV_MASK 0x0000ff00 +#define PMU2_PLL_PC2_M6DIV_SHIFT 8 +#define PMU2_PLL_PC2_NDIV_MODE_MASK 0x000e0000 +#define PMU2_PLL_PC2_NDIV_MODE_SHIFT 17 +#define PMU2_PLL_PC2_NDIV_INT_MASK 0x1ff00000 +#define PMU2_PLL_PC2_NDIV_INT_SHIFT 20 + + +#define PMU2_PLL_PLLCTL3 3 +#define PMU2_PLL_PC3_NDIV_FRAC_MASK 0x00ffffff +#define PMU2_PLL_PC3_NDIV_FRAC_SHIFT 0 + + +#define PMU2_PLL_PLLCTL4 4 + + +#define PMU2_PLL_PLLCTL5 5 +#define PMU2_PLL_PC5_CLKDRIVE_CH1_MASK 0x00000f00 +#define PMU2_PLL_PC5_CLKDRIVE_CH1_SHIFT 8 +#define PMU2_PLL_PC5_CLKDRIVE_CH2_MASK 0x0000f000 +#define PMU2_PLL_PC5_CLKDRIVE_CH2_SHIFT 12 +#define PMU2_PLL_PC5_CLKDRIVE_CH3_MASK 0x000f0000 +#define PMU2_PLL_PC5_CLKDRIVE_CH3_SHIFT 16 +#define PMU2_PLL_PC5_CLKDRIVE_CH4_MASK 0x00f00000 +#define PMU2_PLL_PC5_CLKDRIVE_CH4_SHIFT 20 +#define PMU2_PLL_PC5_CLKDRIVE_CH5_MASK 0x0f000000 +#define PMU2_PLL_PC5_CLKDRIVE_CH5_SHIFT 24 +#define PMU2_PLL_PC5_CLKDRIVE_CH6_MASK 0xf0000000 +#define PMU2_PLL_PC5_CLKDRIVE_CH6_SHIFT 28 + + +#define PMU5_PLL_P1P2_OFF 0 +#define PMU5_PLL_P1_MASK 0x0f000000 +#define PMU5_PLL_P1_SHIFT 24 +#define PMU5_PLL_P2_MASK 0x00f00000 +#define PMU5_PLL_P2_SHIFT 20 +#define PMU5_PLL_M14_OFF 1 +#define PMU5_PLL_MDIV_MASK 0x000000ff +#define PMU5_PLL_MDIV_WIDTH 8 +#define PMU5_PLL_NM5_OFF 2 +#define PMU5_PLL_NDIV_MASK 0xfff00000 +#define PMU5_PLL_NDIV_SHIFT 20 +#define PMU5_PLL_NDIV_MODE_MASK 0x000e0000 +#define PMU5_PLL_NDIV_MODE_SHIFT 17 +#define PMU5_PLL_FMAB_OFF 3 +#define PMU5_PLL_MRAT_MASK 0xf0000000 +#define PMU5_PLL_MRAT_SHIFT 28 +#define PMU5_PLL_ABRAT_MASK 0x08000000 +#define PMU5_PLL_ABRAT_SHIFT 27 +#define PMU5_PLL_FDIV_MASK 0x07ffffff +#define PMU5_PLL_PLLCTL_OFF 4 +#define PMU5_PLL_PCHI_OFF 5 +#define PMU5_PLL_PCHI_MASK 0x0000003f + + +#define PMU_XTALFREQ_REG_ILPCTR_MASK 0x00001FFF +#define PMU_XTALFREQ_REG_MEASURE_MASK 0x80000000 +#define PMU_XTALFREQ_REG_MEASURE_SHIFT 31 + + +#define PMU5_MAINPLL_CPU 1 +#define PMU5_MAINPLL_MEM 2 +#define PMU5_MAINPLL_SI 3 + + +#define PMU4706_MAINPLL_PLL0 0 +#define PMU6_4706_PROCPLL_OFF 4 +#define PMU6_4706_PROC_P2DIV_MASK 0x000f0000 +#define PMU6_4706_PROC_P2DIV_SHIFT 16 +#define PMU6_4706_PROC_P1DIV_MASK 0x0000f000 +#define PMU6_4706_PROC_P1DIV_SHIFT 12 +#define PMU6_4706_PROC_NDIV_INT_MASK 0x00000ff8 +#define PMU6_4706_PROC_NDIV_INT_SHIFT 3 +#define PMU6_4706_PROC_NDIV_MODE_MASK 0x00000007 +#define PMU6_4706_PROC_NDIV_MODE_SHIFT 0 + +#define PMU7_PLL_PLLCTL7 7 +#define PMU7_PLL_CTL7_M4DIV_MASK 0xff000000 +#define PMU7_PLL_CTL7_M4DIV_SHIFT 24 +#define PMU7_PLL_CTL7_M4DIV_BY_6 6 +#define PMU7_PLL_CTL7_M4DIV_BY_12 0xc +#define PMU7_PLL_CTL7_M4DIV_BY_24 0x18 +#define PMU7_PLL_PLLCTL8 8 +#define PMU7_PLL_CTL8_M5DIV_MASK 0x000000ff +#define PMU7_PLL_CTL8_M5DIV_SHIFT 0 +#define PMU7_PLL_CTL8_M5DIV_BY_8 8 +#define PMU7_PLL_CTL8_M5DIV_BY_12 0xc +#define PMU7_PLL_CTL8_M5DIV_BY_24 0x18 +#define PMU7_PLL_CTL8_M6DIV_MASK 0x0000ff00 +#define PMU7_PLL_CTL8_M6DIV_SHIFT 8 +#define PMU7_PLL_CTL8_M6DIV_BY_12 0xc +#define PMU7_PLL_CTL8_M6DIV_BY_24 0x18 +#define PMU7_PLL_PLLCTL11 11 +#define PMU7_PLL_PLLCTL11_MASK 0xffffff00 +#define PMU7_PLL_PLLCTL11_VAL 0x22222200 + + +#define PMU15_PLL_PLLCTL0 0 +#define PMU15_PLL_PC0_CLKSEL_MASK 0x00000003 +#define PMU15_PLL_PC0_CLKSEL_SHIFT 0 +#define PMU15_PLL_PC0_FREQTGT_MASK 0x003FFFFC +#define PMU15_PLL_PC0_FREQTGT_SHIFT 2 +#define PMU15_PLL_PC0_PRESCALE_MASK 0x00C00000 +#define PMU15_PLL_PC0_PRESCALE_SHIFT 22 +#define PMU15_PLL_PC0_KPCTRL_MASK 0x07000000 +#define PMU15_PLL_PC0_KPCTRL_SHIFT 24 +#define PMU15_PLL_PC0_FCNTCTRL_MASK 0x38000000 +#define PMU15_PLL_PC0_FCNTCTRL_SHIFT 27 +#define PMU15_PLL_PC0_FDCMODE_MASK 0x40000000 +#define PMU15_PLL_PC0_FDCMODE_SHIFT 30 +#define PMU15_PLL_PC0_CTRLBIAS_MASK 0x80000000 +#define PMU15_PLL_PC0_CTRLBIAS_SHIFT 31 + +#define PMU15_PLL_PLLCTL1 1 +#define PMU15_PLL_PC1_BIAS_CTLM_MASK 0x00000060 +#define PMU15_PLL_PC1_BIAS_CTLM_SHIFT 5 +#define PMU15_PLL_PC1_BIAS_CTLM_RST_MASK 0x00000040 +#define PMU15_PLL_PC1_BIAS_CTLM_RST_SHIFT 6 +#define PMU15_PLL_PC1_BIAS_SS_DIVR_MASK 0x0001FF80 +#define PMU15_PLL_PC1_BIAS_SS_DIVR_SHIFT 7 +#define PMU15_PLL_PC1_BIAS_SS_RSTVAL_MASK 0x03FE0000 +#define PMU15_PLL_PC1_BIAS_SS_RSTVAL_SHIFT 17 +#define PMU15_PLL_PC1_BIAS_INTG_BW_MASK 0x0C000000 +#define PMU15_PLL_PC1_BIAS_INTG_BW_SHIFT 26 +#define PMU15_PLL_PC1_BIAS_INTG_BYP_MASK 0x10000000 +#define PMU15_PLL_PC1_BIAS_INTG_BYP_SHIFT 28 +#define PMU15_PLL_PC1_OPENLP_EN_MASK 0x40000000 +#define PMU15_PLL_PC1_OPENLP_EN_SHIFT 30 + +#define PMU15_PLL_PLLCTL2 2 +#define PMU15_PLL_PC2_CTEN_MASK 0x00000001 +#define PMU15_PLL_PC2_CTEN_SHIFT 0 + +#define PMU15_PLL_PLLCTL3 3 +#define PMU15_PLL_PC3_DITHER_EN_MASK 0x00000001 +#define PMU15_PLL_PC3_DITHER_EN_SHIFT 0 +#define PMU15_PLL_PC3_DCOCTLSP_MASK 0xFE000000 +#define PMU15_PLL_PC3_DCOCTLSP_SHIFT 25 +#define PMU15_PLL_PC3_DCOCTLSP_DIV2EN_MASK 0x01 +#define PMU15_PLL_PC3_DCOCTLSP_DIV2EN_SHIFT 0 +#define PMU15_PLL_PC3_DCOCTLSP_CH0EN_MASK 0x02 +#define PMU15_PLL_PC3_DCOCTLSP_CH0EN_SHIFT 1 +#define PMU15_PLL_PC3_DCOCTLSP_CH1EN_MASK 0x04 +#define PMU15_PLL_PC3_DCOCTLSP_CH1EN_SHIFT 2 +#define PMU15_PLL_PC3_DCOCTLSP_CH0SEL_MASK 0x18 +#define PMU15_PLL_PC3_DCOCTLSP_CH0SEL_SHIFT 3 +#define PMU15_PLL_PC3_DCOCTLSP_CH1SEL_MASK 0x60 +#define PMU15_PLL_PC3_DCOCTLSP_CH1SEL_SHIFT 5 +#define PMU15_PLL_PC3_DCOCTLSP_CHSEL_OUTP_DIV1 0 +#define PMU15_PLL_PC3_DCOCTLSP_CHSEL_OUTP_DIV2 1 +#define PMU15_PLL_PC3_DCOCTLSP_CHSEL_OUTP_DIV3 2 +#define PMU15_PLL_PC3_DCOCTLSP_CHSEL_OUTP_DIV5 3 + +#define PMU15_PLL_PLLCTL4 4 +#define PMU15_PLL_PC4_FLLCLK1_DIV_MASK 0x00000007 +#define PMU15_PLL_PC4_FLLCLK1_DIV_SHIFT 0 +#define PMU15_PLL_PC4_FLLCLK2_DIV_MASK 0x00000038 +#define PMU15_PLL_PC4_FLLCLK2_DIV_SHIFT 3 +#define PMU15_PLL_PC4_FLLCLK3_DIV_MASK 0x000001C0 +#define PMU15_PLL_PC4_FLLCLK3_DIV_SHIFT 6 +#define PMU15_PLL_PC4_DBGMODE_MASK 0x00000E00 +#define PMU15_PLL_PC4_DBGMODE_SHIFT 9 +#define PMU15_PLL_PC4_FLL480_CTLSP_LK_MASK 0x00001000 +#define PMU15_PLL_PC4_FLL480_CTLSP_LK_SHIFT 12 +#define PMU15_PLL_PC4_FLL480_CTLSP_MASK 0x000FE000 +#define PMU15_PLL_PC4_FLL480_CTLSP_SHIFT 13 +#define PMU15_PLL_PC4_DINPOL_MASK 0x00100000 +#define PMU15_PLL_PC4_DINPOL_SHIFT 20 +#define PMU15_PLL_PC4_CLKOUT_PD_MASK 0x00200000 +#define PMU15_PLL_PC4_CLKOUT_PD_SHIFT 21 +#define PMU15_PLL_PC4_CLKDIV2_PD_MASK 0x00400000 +#define PMU15_PLL_PC4_CLKDIV2_PD_SHIFT 22 +#define PMU15_PLL_PC4_CLKDIV4_PD_MASK 0x00800000 +#define PMU15_PLL_PC4_CLKDIV4_PD_SHIFT 23 +#define PMU15_PLL_PC4_CLKDIV8_PD_MASK 0x01000000 +#define PMU15_PLL_PC4_CLKDIV8_PD_SHIFT 24 +#define PMU15_PLL_PC4_CLKDIV16_PD_MASK 0x02000000 +#define PMU15_PLL_PC4_CLKDIV16_PD_SHIFT 25 +#define PMU15_PLL_PC4_TEST_EN_MASK 0x04000000 +#define PMU15_PLL_PC4_TEST_EN_SHIFT 26 + +#define PMU15_PLL_PLLCTL5 5 +#define PMU15_PLL_PC5_FREQTGT_MASK 0x000FFFFF +#define PMU15_PLL_PC5_FREQTGT_SHIFT 0 +#define PMU15_PLL_PC5_DCOCTLSP_MASK 0x07F00000 +#define PMU15_PLL_PC5_DCOCTLSP_SHIFT 20 +#define PMU15_PLL_PC5_PRESCALE_MASK 0x18000000 +#define PMU15_PLL_PC5_PRESCALE_SHIFT 27 + +#define PMU15_PLL_PLLCTL6 6 +#define PMU15_PLL_PC6_FREQTGT_MASK 0x000FFFFF +#define PMU15_PLL_PC6_FREQTGT_SHIFT 0 +#define PMU15_PLL_PC6_DCOCTLSP_MASK 0x07F00000 +#define PMU15_PLL_PC6_DCOCTLSP_SHIFT 20 +#define PMU15_PLL_PC6_PRESCALE_MASK 0x18000000 +#define PMU15_PLL_PC6_PRESCALE_SHIFT 27 + +#define PMU15_FREQTGT_480_DEFAULT 0x19AB1 +#define PMU15_FREQTGT_492_DEFAULT 0x1A4F5 +#define PMU15_ARM_96MHZ 96000000 +#define PMU15_ARM_98MHZ 98400000 +#define PMU15_ARM_97MHZ 97000000 + + +#define PMU17_PLLCTL2_NDIVTYPE_MASK 0x00000070 +#define PMU17_PLLCTL2_NDIVTYPE_SHIFT 4 + +#define PMU17_PLLCTL2_NDIV_MODE_INT 0 +#define PMU17_PLLCTL2_NDIV_MODE_INT1B8 1 +#define PMU17_PLLCTL2_NDIV_MODE_MASH111 2 +#define PMU17_PLLCTL2_NDIV_MODE_MASH111B8 3 + +#define PMU17_PLLCTL0_BBPLL_PWRDWN 0 +#define PMU17_PLLCTL0_BBPLL_DRST 3 +#define PMU17_PLLCTL0_BBPLL_DISBL_CLK 8 + + +#define PMU4335_PLL0_PC2_P1DIV_MASK 0x000f0000 +#define PMU4335_PLL0_PC2_P1DIV_SHIFT 16 +#define PMU4335_PLL0_PC2_NDIV_INT_MASK 0xff800000 +#define PMU4335_PLL0_PC2_NDIV_INT_SHIFT 23 +#define PMU4335_PLL0_PC1_MDIV2_MASK 0x0000ff00 +#define PMU4335_PLL0_PC1_MDIV2_SHIFT 8 + + +#define PMU4716_MAINPLL_PLL0 12 + + +#define PMU5356_MAINPLL_PLL0 0 +#define PMU5357_MAINPLL_PLL0 0 + + +#define RES4716_PROC_PLL_ON 0x00000040 +#define RES4716_PROC_HT_AVAIL 0x00000080 + + +#define CCTRL_471X_I2S_PINS_ENABLE 0x0080 + + + +#define CCTRL_5357_I2S_PINS_ENABLE 0x00040000 +#define CCTRL_5357_I2CSPI_PINS_ENABLE 0x00080000 + + +#define RES5354_EXT_SWITCHER_PWM 0 +#define RES5354_BB_SWITCHER_PWM 1 +#define RES5354_BB_SWITCHER_BURST 2 +#define RES5354_BB_EXT_SWITCHER_BURST 3 +#define RES5354_ILP_REQUEST 4 +#define RES5354_RADIO_SWITCHER_PWM 5 +#define RES5354_RADIO_SWITCHER_BURST 6 +#define RES5354_ROM_SWITCH 7 +#define RES5354_PA_REF_LDO 8 +#define RES5354_RADIO_LDO 9 +#define RES5354_AFE_LDO 10 +#define RES5354_PLL_LDO 11 +#define RES5354_BG_FILTBYP 12 +#define RES5354_TX_FILTBYP 13 +#define RES5354_RX_FILTBYP 14 +#define RES5354_XTAL_PU 15 +#define RES5354_XTAL_EN 16 +#define RES5354_BB_PLL_FILTBYP 17 +#define RES5354_RF_PLL_FILTBYP 18 +#define RES5354_BB_PLL_PU 19 + + +#define CCTRL5357_EXTPA (1<<14) +#define CCTRL5357_ANT_MUX_2o3 (1<<15) +#define CCTRL5357_NFLASH (1<<16) + + +#define CCTRL43217_EXTPA_C0 (1<<13) +#define CCTRL43217_EXTPA_C1 (1<<8) + + +#define CCTRL43228_EXTPA_C0 (1<<14) +#define CCTRL43228_EXTPA_C1 (1<<9) + + +#define RES4328_EXT_SWITCHER_PWM 0 +#define RES4328_BB_SWITCHER_PWM 1 +#define RES4328_BB_SWITCHER_BURST 2 +#define RES4328_BB_EXT_SWITCHER_BURST 3 +#define RES4328_ILP_REQUEST 4 +#define RES4328_RADIO_SWITCHER_PWM 5 +#define RES4328_RADIO_SWITCHER_BURST 6 +#define RES4328_ROM_SWITCH 7 +#define RES4328_PA_REF_LDO 8 +#define RES4328_RADIO_LDO 9 +#define RES4328_AFE_LDO 10 +#define RES4328_PLL_LDO 11 +#define RES4328_BG_FILTBYP 12 +#define RES4328_TX_FILTBYP 13 +#define RES4328_RX_FILTBYP 14 +#define RES4328_XTAL_PU 15 +#define RES4328_XTAL_EN 16 +#define RES4328_BB_PLL_FILTBYP 17 +#define RES4328_RF_PLL_FILTBYP 18 +#define RES4328_BB_PLL_PU 19 + + +#define RES4325_BUCK_BOOST_BURST 0 +#define RES4325_CBUCK_BURST 1 +#define RES4325_CBUCK_PWM 2 +#define RES4325_CLDO_CBUCK_BURST 3 +#define RES4325_CLDO_CBUCK_PWM 4 +#define RES4325_BUCK_BOOST_PWM 5 +#define RES4325_ILP_REQUEST 6 +#define RES4325_ABUCK_BURST 7 +#define RES4325_ABUCK_PWM 8 +#define RES4325_LNLDO1_PU 9 +#define RES4325_OTP_PU 10 +#define RES4325_LNLDO3_PU 11 +#define RES4325_LNLDO4_PU 12 +#define RES4325_XTAL_PU 13 +#define RES4325_ALP_AVAIL 14 +#define RES4325_RX_PWRSW_PU 15 +#define RES4325_TX_PWRSW_PU 16 +#define RES4325_RFPLL_PWRSW_PU 17 +#define RES4325_LOGEN_PWRSW_PU 18 +#define RES4325_AFE_PWRSW_PU 19 +#define RES4325_BBPLL_PWRSW_PU 20 +#define RES4325_HT_AVAIL 21 + + +#define RES4325B0_CBUCK_LPOM 1 +#define RES4325B0_CBUCK_BURST 2 +#define RES4325B0_CBUCK_PWM 3 +#define RES4325B0_CLDO_PU 4 + + +#define RES4325C1_LNLDO2_PU 12 + + +#define CST4325_SPROM_OTP_SEL_MASK 0x00000003 +#define CST4325_DEFCIS_SEL 0 +#define CST4325_SPROM_SEL 1 +#define CST4325_OTP_SEL 2 +#define CST4325_OTP_PWRDN 3 +#define CST4325_SDIO_USB_MODE_MASK 0x00000004 +#define CST4325_SDIO_USB_MODE_SHIFT 2 +#define CST4325_RCAL_VALID_MASK 0x00000008 +#define CST4325_RCAL_VALID_SHIFT 3 +#define CST4325_RCAL_VALUE_MASK 0x000001f0 +#define CST4325_RCAL_VALUE_SHIFT 4 +#define CST4325_PMUTOP_2B_MASK 0x00000200 +#define CST4325_PMUTOP_2B_SHIFT 9 + +#define RES4329_RESERVED0 0 +#define RES4329_CBUCK_LPOM 1 +#define RES4329_CBUCK_BURST 2 +#define RES4329_CBUCK_PWM 3 +#define RES4329_CLDO_PU 4 +#define RES4329_PALDO_PU 5 +#define RES4329_ILP_REQUEST 6 +#define RES4329_RESERVED7 7 +#define RES4329_RESERVED8 8 +#define RES4329_LNLDO1_PU 9 +#define RES4329_OTP_PU 10 +#define RES4329_RESERVED11 11 +#define RES4329_LNLDO2_PU 12 +#define RES4329_XTAL_PU 13 +#define RES4329_ALP_AVAIL 14 +#define RES4329_RX_PWRSW_PU 15 +#define RES4329_TX_PWRSW_PU 16 +#define RES4329_RFPLL_PWRSW_PU 17 +#define RES4329_LOGEN_PWRSW_PU 18 +#define RES4329_AFE_PWRSW_PU 19 +#define RES4329_BBPLL_PWRSW_PU 20 +#define RES4329_HT_AVAIL 21 + +#define CST4329_SPROM_OTP_SEL_MASK 0x00000003 +#define CST4329_DEFCIS_SEL 0 +#define CST4329_SPROM_SEL 1 +#define CST4329_OTP_SEL 2 +#define CST4329_OTP_PWRDN 3 +#define CST4329_SPI_SDIO_MODE_MASK 0x00000004 +#define CST4329_SPI_SDIO_MODE_SHIFT 2 + + +#define CST4312_SPROM_OTP_SEL_MASK 0x00000003 +#define CST4312_DEFCIS_SEL 0 +#define CST4312_SPROM_SEL 1 +#define CST4312_OTP_SEL 2 +#define CST4312_OTP_BAD 3 + + +#define RES4312_SWITCHER_BURST 0 +#define RES4312_SWITCHER_PWM 1 +#define RES4312_PA_REF_LDO 2 +#define RES4312_CORE_LDO_BURST 3 +#define RES4312_CORE_LDO_PWM 4 +#define RES4312_RADIO_LDO 5 +#define RES4312_ILP_REQUEST 6 +#define RES4312_BG_FILTBYP 7 +#define RES4312_TX_FILTBYP 8 +#define RES4312_RX_FILTBYP 9 +#define RES4312_XTAL_PU 10 +#define RES4312_ALP_AVAIL 11 +#define RES4312_BB_PLL_FILTBYP 12 +#define RES4312_RF_PLL_FILTBYP 13 +#define RES4312_HT_AVAIL 14 + + +#define RES4322_RF_LDO 0 +#define RES4322_ILP_REQUEST 1 +#define RES4322_XTAL_PU 2 +#define RES4322_ALP_AVAIL 3 +#define RES4322_SI_PLL_ON 4 +#define RES4322_HT_SI_AVAIL 5 +#define RES4322_PHY_PLL_ON 6 +#define RES4322_HT_PHY_AVAIL 7 +#define RES4322_OTP_PU 8 + + +#define CST4322_XTAL_FREQ_20_40MHZ 0x00000020 +#define CST4322_SPROM_OTP_SEL_MASK 0x000000c0 +#define CST4322_SPROM_OTP_SEL_SHIFT 6 +#define CST4322_NO_SPROM_OTP 0 +#define CST4322_SPROM_PRESENT 1 +#define CST4322_OTP_PRESENT 2 +#define CST4322_PCI_OR_USB 0x00000100 +#define CST4322_BOOT_MASK 0x00000600 +#define CST4322_BOOT_SHIFT 9 +#define CST4322_BOOT_FROM_SRAM 0 +#define CST4322_BOOT_FROM_ROM 1 +#define CST4322_BOOT_FROM_FLASH 2 +#define CST4322_BOOT_FROM_INVALID 3 +#define CST4322_ILP_DIV_EN 0x00000800 +#define CST4322_FLASH_TYPE_MASK 0x00001000 +#define CST4322_FLASH_TYPE_SHIFT 12 +#define CST4322_FLASH_TYPE_SHIFT_ST 0 +#define CST4322_FLASH_TYPE_SHIFT_ATMEL 1 +#define CST4322_ARM_TAP_SEL 0x00002000 +#define CST4322_RES_INIT_MODE_MASK 0x0000c000 +#define CST4322_RES_INIT_MODE_SHIFT 14 +#define CST4322_RES_INIT_MODE_ILPAVAIL 0 +#define CST4322_RES_INIT_MODE_ILPREQ 1 +#define CST4322_RES_INIT_MODE_ALPAVAIL 2 +#define CST4322_RES_INIT_MODE_HTAVAIL 3 +#define CST4322_PCIPLLCLK_GATING 0x00010000 +#define CST4322_CLK_SWITCH_PCI_TO_ALP 0x00020000 +#define CST4322_PCI_CARDBUS_MODE 0x00040000 + + +#define CCTRL43224_GPIO_TOGGLE 0x8000 +#define CCTRL_43224A0_12MA_LED_DRIVE 0x00F000F0 +#define CCTRL_43224B0_12MA_LED_DRIVE 0xF0 + + +#define RES43236_REGULATOR 0 +#define RES43236_ILP_REQUEST 1 +#define RES43236_XTAL_PU 2 +#define RES43236_ALP_AVAIL 3 +#define RES43236_SI_PLL_ON 4 +#define RES43236_HT_SI_AVAIL 5 + + +#define CCTRL43236_BT_COEXIST (1<<0) +#define CCTRL43236_SECI (1<<1) +#define CCTRL43236_EXT_LNA (1<<2) +#define CCTRL43236_ANT_MUX_2o3 (1<<3) +#define CCTRL43236_GSIO (1<<4) + + +#define CST43236_SFLASH_MASK 0x00000040 +#define CST43236_OTP_SEL_MASK 0x00000080 +#define CST43236_OTP_SEL_SHIFT 7 +#define CST43236_HSIC_MASK 0x00000100 +#define CST43236_BP_CLK 0x00000200 +#define CST43236_BOOT_MASK 0x00001800 +#define CST43236_BOOT_SHIFT 11 +#define CST43236_BOOT_FROM_SRAM 0 +#define CST43236_BOOT_FROM_ROM 1 +#define CST43236_BOOT_FROM_FLASH 2 +#define CST43236_BOOT_FROM_INVALID 3 + + +#define RES43237_REGULATOR 0 +#define RES43237_ILP_REQUEST 1 +#define RES43237_XTAL_PU 2 +#define RES43237_ALP_AVAIL 3 +#define RES43237_SI_PLL_ON 4 +#define RES43237_HT_SI_AVAIL 5 + + +#define CCTRL43237_BT_COEXIST (1<<0) +#define CCTRL43237_SECI (1<<1) +#define CCTRL43237_EXT_LNA (1<<2) +#define CCTRL43237_ANT_MUX_2o3 (1<<3) +#define CCTRL43237_GSIO (1<<4) + + +#define CST43237_SFLASH_MASK 0x00000040 +#define CST43237_OTP_SEL_MASK 0x00000080 +#define CST43237_OTP_SEL_SHIFT 7 +#define CST43237_HSIC_MASK 0x00000100 +#define CST43237_BP_CLK 0x00000200 +#define CST43237_BOOT_MASK 0x00001800 +#define CST43237_BOOT_SHIFT 11 +#define CST43237_BOOT_FROM_SRAM 0 +#define CST43237_BOOT_FROM_ROM 1 +#define CST43237_BOOT_FROM_FLASH 2 +#define CST43237_BOOT_FROM_INVALID 3 + + +#define RES43239_OTP_PU 9 +#define RES43239_MACPHY_CLKAVAIL 23 +#define RES43239_HT_AVAIL 24 + + +#define CST43239_SPROM_MASK 0x00000002 +#define CST43239_SFLASH_MASK 0x00000004 +#define CST43239_RES_INIT_MODE_SHIFT 7 +#define CST43239_RES_INIT_MODE_MASK 0x000001f0 +#define CST43239_CHIPMODE_SDIOD(cs) ((cs) & (1 << 15)) +#define CST43239_CHIPMODE_USB20D(cs) (~(cs) & (1 << 15)) +#define CST43239_CHIPMODE_SDIO(cs) (((cs) & (1 << 0)) == 0) +#define CST43239_CHIPMODE_GSPI(cs) (((cs) & (1 << 0)) == (1 << 0)) + + + +#define RES4324_LPLDO_PU 0 +#define RES4324_RESET_PULLDN_DIS 1 +#define RES4324_PMU_BG_PU 2 +#define RES4324_HSIC_LDO_PU 3 +#define RES4324_CBUCK_LPOM_PU 4 +#define RES4324_CBUCK_PFM_PU 5 +#define RES4324_CLDO_PU 6 +#define RES4324_LPLDO2_LVM 7 +#define RES4324_LNLDO1_PU 8 +#define RES4324_LNLDO2_PU 9 +#define RES4324_LDO3P3_PU 10 +#define RES4324_OTP_PU 11 +#define RES4324_XTAL_PU 12 +#define RES4324_BBPLL_PU 13 +#define RES4324_LQ_AVAIL 14 +#define RES4324_WL_CORE_READY 17 +#define RES4324_ILP_REQ 18 +#define RES4324_ALP_AVAIL 19 +#define RES4324_PALDO_PU 20 +#define RES4324_RADIO_PU 21 +#define RES4324_SR_CLK_STABLE 22 +#define RES4324_SR_SAVE_RESTORE 23 +#define RES4324_SR_PHY_PWRSW 24 +#define RES4324_SR_PHY_PIC 25 +#define RES4324_SR_SUBCORE_PWRSW 26 +#define RES4324_SR_SUBCORE_PIC 27 +#define RES4324_SR_MEM_PM0 28 +#define RES4324_HT_AVAIL 29 +#define RES4324_MACPHY_CLKAVAIL 30 + + +#define CST4324_SPROM_MASK 0x00000080 +#define CST4324_SFLASH_MASK 0x00400000 +#define CST4324_RES_INIT_MODE_SHIFT 10 +#define CST4324_RES_INIT_MODE_MASK 0x00000c00 +#define CST4324_CHIPMODE_MASK 0x7 +#define CST4324_CHIPMODE_SDIOD(cs) ((~(cs)) & (1 << 2)) +#define CST4324_CHIPMODE_USB20D(cs) (((cs) & CST4324_CHIPMODE_MASK) == 0x6) + + +#define CST43242_SFLASH_MASK 0x00000008 +#define CST43242_SR_HALT (1<<25) +#define CST43242_SR_CHIP_STATUS_2 27 + + +#define RES4331_REGULATOR 0 +#define RES4331_ILP_REQUEST 1 +#define RES4331_XTAL_PU 2 +#define RES4331_ALP_AVAIL 3 +#define RES4331_SI_PLL_ON 4 +#define RES4331_HT_SI_AVAIL 5 + + +#define CCTRL4331_BT_COEXIST (1<<0) +#define CCTRL4331_SECI (1<<1) +#define CCTRL4331_EXT_LNA_G (1<<2) +#define CCTRL4331_SPROM_GPIO13_15 (1<<3) +#define CCTRL4331_EXTPA_EN (1<<4) +#define CCTRL4331_GPIOCLK_ON_SPROMCS (1<<5) +#define CCTRL4331_PCIE_MDIO_ON_SPROMCS (1<<6) +#define CCTRL4331_EXTPA_ON_GPIO2_5 (1<<7) +#define CCTRL4331_OVR_PIPEAUXCLKEN (1<<8) +#define CCTRL4331_OVR_PIPEAUXPWRDOWN (1<<9) +#define CCTRL4331_PCIE_AUXCLKEN (1<<10) +#define CCTRL4331_PCIE_PIPE_PLLDOWN (1<<11) +#define CCTRL4331_EXTPA_EN2 (1<<12) +#define CCTRL4331_EXT_LNA_A (1<<13) +#define CCTRL4331_BT_SHD0_ON_GPIO4 (1<<16) +#define CCTRL4331_BT_SHD1_ON_GPIO5 (1<<17) +#define CCTRL4331_EXTPA_ANA_EN (1<<24) + + +#define CST4331_XTAL_FREQ 0x00000001 +#define CST4331_SPROM_OTP_SEL_MASK 0x00000006 +#define CST4331_SPROM_OTP_SEL_SHIFT 1 +#define CST4331_SPROM_PRESENT 0x00000002 +#define CST4331_OTP_PRESENT 0x00000004 +#define CST4331_LDO_RF 0x00000008 +#define CST4331_LDO_PAR 0x00000010 + + +#define RES4315_CBUCK_LPOM 1 +#define RES4315_CBUCK_BURST 2 +#define RES4315_CBUCK_PWM 3 +#define RES4315_CLDO_PU 4 +#define RES4315_PALDO_PU 5 +#define RES4315_ILP_REQUEST 6 +#define RES4315_LNLDO1_PU 9 +#define RES4315_OTP_PU 10 +#define RES4315_LNLDO2_PU 12 +#define RES4315_XTAL_PU 13 +#define RES4315_ALP_AVAIL 14 +#define RES4315_RX_PWRSW_PU 15 +#define RES4315_TX_PWRSW_PU 16 +#define RES4315_RFPLL_PWRSW_PU 17 +#define RES4315_LOGEN_PWRSW_PU 18 +#define RES4315_AFE_PWRSW_PU 19 +#define RES4315_BBPLL_PWRSW_PU 20 +#define RES4315_HT_AVAIL 21 + + +#define CST4315_SPROM_OTP_SEL_MASK 0x00000003 +#define CST4315_DEFCIS_SEL 0x00000000 +#define CST4315_SPROM_SEL 0x00000001 +#define CST4315_OTP_SEL 0x00000002 +#define CST4315_OTP_PWRDN 0x00000003 +#define CST4315_SDIO_MODE 0x00000004 +#define CST4315_RCAL_VALID 0x00000008 +#define CST4315_RCAL_VALUE_MASK 0x000001f0 +#define CST4315_RCAL_VALUE_SHIFT 4 +#define CST4315_PALDO_EXTPNP 0x00000200 +#define CST4315_CBUCK_MODE_MASK 0x00000c00 +#define CST4315_CBUCK_MODE_BURST 0x00000400 +#define CST4315_CBUCK_MODE_LPBURST 0x00000c00 + + +#define RES4319_CBUCK_LPOM 1 +#define RES4319_CBUCK_BURST 2 +#define RES4319_CBUCK_PWM 3 +#define RES4319_CLDO_PU 4 +#define RES4319_PALDO_PU 5 +#define RES4319_ILP_REQUEST 6 +#define RES4319_LNLDO1_PU 9 +#define RES4319_OTP_PU 10 +#define RES4319_LNLDO2_PU 12 +#define RES4319_XTAL_PU 13 +#define RES4319_ALP_AVAIL 14 +#define RES4319_RX_PWRSW_PU 15 +#define RES4319_TX_PWRSW_PU 16 +#define RES4319_RFPLL_PWRSW_PU 17 +#define RES4319_LOGEN_PWRSW_PU 18 +#define RES4319_AFE_PWRSW_PU 19 +#define RES4319_BBPLL_PWRSW_PU 20 +#define RES4319_HT_AVAIL 21 + + +#define CST4319_SPI_CPULESSUSB 0x00000001 +#define CST4319_SPI_CLK_POL 0x00000002 +#define CST4319_SPI_CLK_PH 0x00000008 +#define CST4319_SPROM_OTP_SEL_MASK 0x000000c0 +#define CST4319_SPROM_OTP_SEL_SHIFT 6 +#define CST4319_DEFCIS_SEL 0x00000000 +#define CST4319_SPROM_SEL 0x00000040 +#define CST4319_OTP_SEL 0x00000080 +#define CST4319_OTP_PWRDN 0x000000c0 +#define CST4319_SDIO_USB_MODE 0x00000100 +#define CST4319_REMAP_SEL_MASK 0x00000600 +#define CST4319_ILPDIV_EN 0x00000800 +#define CST4319_XTAL_PD_POL 0x00001000 +#define CST4319_LPO_SEL 0x00002000 +#define CST4319_RES_INIT_MODE 0x0000c000 +#define CST4319_PALDO_EXTPNP 0x00010000 +#define CST4319_CBUCK_MODE_MASK 0x00060000 +#define CST4319_CBUCK_MODE_BURST 0x00020000 +#define CST4319_CBUCK_MODE_LPBURST 0x00060000 +#define CST4319_RCAL_VALID 0x01000000 +#define CST4319_RCAL_VALUE_MASK 0x3e000000 +#define CST4319_RCAL_VALUE_SHIFT 25 + +#define PMU1_PLL0_CHIPCTL0 0 +#define PMU1_PLL0_CHIPCTL1 1 +#define PMU1_PLL0_CHIPCTL2 2 +#define CCTL_4319USB_XTAL_SEL_MASK 0x00180000 +#define CCTL_4319USB_XTAL_SEL_SHIFT 19 +#define CCTL_4319USB_48MHZ_PLL_SEL 1 +#define CCTL_4319USB_24MHZ_PLL_SEL 2 + + +#define RES4336_CBUCK_LPOM 0 +#define RES4336_CBUCK_BURST 1 +#define RES4336_CBUCK_LP_PWM 2 +#define RES4336_CBUCK_PWM 3 +#define RES4336_CLDO_PU 4 +#define RES4336_DIS_INT_RESET_PD 5 +#define RES4336_ILP_REQUEST 6 +#define RES4336_LNLDO_PU 7 +#define RES4336_LDO3P3_PU 8 +#define RES4336_OTP_PU 9 +#define RES4336_XTAL_PU 10 +#define RES4336_ALP_AVAIL 11 +#define RES4336_RADIO_PU 12 +#define RES4336_BG_PU 13 +#define RES4336_VREG1p4_PU_PU 14 +#define RES4336_AFE_PWRSW_PU 15 +#define RES4336_RX_PWRSW_PU 16 +#define RES4336_TX_PWRSW_PU 17 +#define RES4336_BB_PWRSW_PU 18 +#define RES4336_SYNTH_PWRSW_PU 19 +#define RES4336_MISC_PWRSW_PU 20 +#define RES4336_LOGEN_PWRSW_PU 21 +#define RES4336_BBPLL_PWRSW_PU 22 +#define RES4336_MACPHY_CLKAVAIL 23 +#define RES4336_HT_AVAIL 24 +#define RES4336_RSVD 25 + + +#define CST4336_SPI_MODE_MASK 0x00000001 +#define CST4336_SPROM_PRESENT 0x00000002 +#define CST4336_OTP_PRESENT 0x00000004 +#define CST4336_ARMREMAP_0 0x00000008 +#define CST4336_ILPDIV_EN_MASK 0x00000010 +#define CST4336_ILPDIV_EN_SHIFT 4 +#define CST4336_XTAL_PD_POL_MASK 0x00000020 +#define CST4336_XTAL_PD_POL_SHIFT 5 +#define CST4336_LPO_SEL_MASK 0x00000040 +#define CST4336_LPO_SEL_SHIFT 6 +#define CST4336_RES_INIT_MODE_MASK 0x00000180 +#define CST4336_RES_INIT_MODE_SHIFT 7 +#define CST4336_CBUCK_MODE_MASK 0x00000600 +#define CST4336_CBUCK_MODE_SHIFT 9 + + +#define PCTL_4336_SERIAL_ENAB (1 << 24) + + +#define RES4330_CBUCK_LPOM 0 +#define RES4330_CBUCK_BURST 1 +#define RES4330_CBUCK_LP_PWM 2 +#define RES4330_CBUCK_PWM 3 +#define RES4330_CLDO_PU 4 +#define RES4330_DIS_INT_RESET_PD 5 +#define RES4330_ILP_REQUEST 6 +#define RES4330_LNLDO_PU 7 +#define RES4330_LDO3P3_PU 8 +#define RES4330_OTP_PU 9 +#define RES4330_XTAL_PU 10 +#define RES4330_ALP_AVAIL 11 +#define RES4330_RADIO_PU 12 +#define RES4330_BG_PU 13 +#define RES4330_VREG1p4_PU_PU 14 +#define RES4330_AFE_PWRSW_PU 15 +#define RES4330_RX_PWRSW_PU 16 +#define RES4330_TX_PWRSW_PU 17 +#define RES4330_BB_PWRSW_PU 18 +#define RES4330_SYNTH_PWRSW_PU 19 +#define RES4330_MISC_PWRSW_PU 20 +#define RES4330_LOGEN_PWRSW_PU 21 +#define RES4330_BBPLL_PWRSW_PU 22 +#define RES4330_MACPHY_CLKAVAIL 23 +#define RES4330_HT_AVAIL 24 +#define RES4330_5gRX_PWRSW_PU 25 +#define RES4330_5gTX_PWRSW_PU 26 +#define RES4330_5g_LOGEN_PWRSW_PU 27 + + +#define CST4330_CHIPMODE_SDIOD(cs) (((cs) & 0x7) < 6) +#define CST4330_CHIPMODE_USB20D(cs) (((cs) & 0x7) >= 6) +#define CST4330_CHIPMODE_SDIO(cs) (((cs) & 0x4) == 0) +#define CST4330_CHIPMODE_GSPI(cs) (((cs) & 0x6) == 4) +#define CST4330_CHIPMODE_USB(cs) (((cs) & 0x7) == 6) +#define CST4330_CHIPMODE_USBDA(cs) (((cs) & 0x7) == 7) +#define CST4330_OTP_PRESENT 0x00000010 +#define CST4330_LPO_AUTODET_EN 0x00000020 +#define CST4330_ARMREMAP_0 0x00000040 +#define CST4330_SPROM_PRESENT 0x00000080 +#define CST4330_ILPDIV_EN 0x00000100 +#define CST4330_LPO_SEL 0x00000200 +#define CST4330_RES_INIT_MODE_SHIFT 10 +#define CST4330_RES_INIT_MODE_MASK 0x00000c00 +#define CST4330_CBUCK_MODE_SHIFT 12 +#define CST4330_CBUCK_MODE_MASK 0x00003000 +#define CST4330_CBUCK_POWER_OK 0x00004000 +#define CST4330_BB_PLL_LOCKED 0x00008000 +#define SOCDEVRAM_BP_ADDR 0x1E000000 +#define SOCDEVRAM_ARM_ADDR 0x00800000 + + +#define PCTL_4330_SERIAL_ENAB (1 << 24) + + +#define CCTRL_4330_GPIO_SEL 0x00000001 +#define CCTRL_4330_ERCX_SEL 0x00000002 +#define CCTRL_4330_SDIO_HOST_WAKE 0x00000004 +#define CCTRL_4330_JTAG_DISABLE 0x00000008 + + +#define RES4334_LPLDO_PU 0 +#define RES4334_RESET_PULLDN_DIS 1 +#define RES4334_PMU_BG_PU 2 +#define RES4334_HSIC_LDO_PU 3 +#define RES4334_CBUCK_LPOM_PU 4 +#define RES4334_CBUCK_PFM_PU 5 +#define RES4334_CLDO_PU 6 +#define RES4334_LPLDO2_LVM 7 +#define RES4334_LNLDO_PU 8 +#define RES4334_LDO3P3_PU 9 +#define RES4334_OTP_PU 10 +#define RES4334_XTAL_PU 11 +#define RES4334_WL_PWRSW_PU 12 +#define RES4334_LQ_AVAIL 13 +#define RES4334_LOGIC_RET 14 +#define RES4334_MEM_SLEEP 15 +#define RES4334_MACPHY_RET 16 +#define RES4334_WL_CORE_READY 17 +#define RES4334_ILP_REQ 18 +#define RES4334_ALP_AVAIL 19 +#define RES4334_MISC_PWRSW_PU 20 +#define RES4334_SYNTH_PWRSW_PU 21 +#define RES4334_RX_PWRSW_PU 22 +#define RES4334_RADIO_PU 23 +#define RES4334_WL_PMU_PU 24 +#define RES4334_VCO_LDO_PU 25 +#define RES4334_AFE_LDO_PU 26 +#define RES4334_RX_LDO_PU 27 +#define RES4334_TX_LDO_PU 28 +#define RES4334_HT_AVAIL 29 +#define RES4334_MACPHY_CLK_AVAIL 30 + + +#define CST4334_CHIPMODE_MASK 7 +#define CST4334_SDIO_MODE 0x00000000 +#define CST4334_SPI_MODE 0x00000004 +#define CST4334_HSIC_MODE 0x00000006 +#define CST4334_BLUSB_MODE 0x00000007 +#define CST4334_CHIPMODE_HSIC(cs) (((cs) & CST4334_CHIPMODE_MASK) == CST4334_HSIC_MODE) +#define CST4334_OTP_PRESENT 0x00000010 +#define CST4334_LPO_AUTODET_EN 0x00000020 +#define CST4334_ARMREMAP_0 0x00000040 +#define CST4334_SPROM_PRESENT 0x00000080 +#define CST4334_ILPDIV_EN_MASK 0x00000100 +#define CST4334_ILPDIV_EN_SHIFT 8 +#define CST4334_LPO_SEL_MASK 0x00000200 +#define CST4334_LPO_SEL_SHIFT 9 +#define CST4334_RES_INIT_MODE_MASK 0x00000C00 +#define CST4334_RES_INIT_MODE_SHIFT 10 + + +#define PCTL_4334_GPIO3_ENAB (1 << 3) + + +#define CCTRL4334_HSIC_LDO_PU (1 << 23) + + +#define CCTRL1_4324_GPIO_SEL (1 << 0) +#define CCTRL1_4324_SDIO_HOST_WAKE (1 << 2) + + + +#define CST43143_REMAP_TO_ROM (3 << 0) +#define CST43143_SDIO_EN (1 << 2) +#define CST43143_SDIO_ISO (1 << 3) +#define CST43143_USB_CPU_LESS (1 << 4) +#define CST43143_CBUCK_MODE (3 << 6) +#define CST43143_POK_CBUCK (1 << 8) +#define CST43143_PMU_OVRSPIKE (1 << 9) +#define CST43143_PMU_OVRTEMP (0xF << 10) +#define CST43143_SR_FLL_CAL_DONE (1 << 14) +#define CST43143_USB_PLL_LOCKDET (1 << 15) +#define CST43143_PMU_PLL_LOCKDET (1 << 16) +#define CST43143_CHIPMODE_SDIOD(cs) (((cs) & CST43143_SDIO_EN) != 0) + + + +#define CCTRL_43143_SECI (1<<0) +#define CCTRL_43143_BT_LEGACY (1<<1) +#define CCTRL_43143_I2S_MODE (1<<2) +#define CCTRL_43143_I2S_MASTER (1<<3) +#define CCTRL_43143_I2S_FULL (1<<4) +#define CCTRL_43143_GSIO (1<<5) +#define CCTRL_43143_RF_SWCTRL_MASK (7<<6) +#define CCTRL_43143_RF_SWCTRL_0 (1<<6) +#define CCTRL_43143_RF_SWCTRL_1 (2<<6) +#define CCTRL_43143_RF_SWCTRL_2 (4<<6) +#define CCTRL_43143_RF_XSWCTRL (1<<9) +#define CCTRL_43143_HOST_WAKE0 (1<<11) +#define CCTRL_43143_HOST_WAKE1 (1<<12) + + +#define RES43143_EXT_SWITCHER_PWM 0 +#define RES43143_XTAL_PU 1 +#define RES43143_ILP_REQUEST 2 +#define RES43143_ALP_AVAIL 3 +#define RES43143_WL_CORE_READY 4 +#define RES43143_BBPLL_PWRSW_PU 5 +#define RES43143_HT_AVAIL 6 +#define RES43143_RADIO_PU 7 +#define RES43143_MACPHY_CLK_AVAIL 8 +#define RES43143_OTP_PU 9 +#define RES43143_LQ_AVAIL 10 + +#define PMU43143_XTAL_CORE_SIZE_MASK 0x3F + + +#define RES4313_BB_PU_RSRC 0 +#define RES4313_ILP_REQ_RSRC 1 +#define RES4313_XTAL_PU_RSRC 2 +#define RES4313_ALP_AVAIL_RSRC 3 +#define RES4313_RADIO_PU_RSRC 4 +#define RES4313_BG_PU_RSRC 5 +#define RES4313_VREG1P4_PU_RSRC 6 +#define RES4313_AFE_PWRSW_RSRC 7 +#define RES4313_RX_PWRSW_RSRC 8 +#define RES4313_TX_PWRSW_RSRC 9 +#define RES4313_BB_PWRSW_RSRC 10 +#define RES4313_SYNTH_PWRSW_RSRC 11 +#define RES4313_MISC_PWRSW_RSRC 12 +#define RES4313_BB_PLL_PWRSW_RSRC 13 +#define RES4313_HT_AVAIL_RSRC 14 +#define RES4313_MACPHY_CLK_AVAIL_RSRC 15 + + +#define CST4313_SPROM_PRESENT 1 +#define CST4313_OTP_PRESENT 2 +#define CST4313_SPROM_OTP_SEL_MASK 0x00000002 +#define CST4313_SPROM_OTP_SEL_SHIFT 0 + + +#define CCTRL_4313_12MA_LED_DRIVE 0x00000007 + + +#define RES4314_LPLDO_PU 0 +#define RES4314_PMU_SLEEP_DIS 1 +#define RES4314_PMU_BG_PU 2 +#define RES4314_CBUCK_LPOM_PU 3 +#define RES4314_CBUCK_PFM_PU 4 +#define RES4314_CLDO_PU 5 +#define RES4314_LPLDO2_LVM 6 +#define RES4314_WL_PMU_PU 7 +#define RES4314_LNLDO_PU 8 +#define RES4314_LDO3P3_PU 9 +#define RES4314_OTP_PU 10 +#define RES4314_XTAL_PU 11 +#define RES4314_WL_PWRSW_PU 12 +#define RES4314_LQ_AVAIL 13 +#define RES4314_LOGIC_RET 14 +#define RES4314_MEM_SLEEP 15 +#define RES4314_MACPHY_RET 16 +#define RES4314_WL_CORE_READY 17 +#define RES4314_ILP_REQ 18 +#define RES4314_ALP_AVAIL 19 +#define RES4314_MISC_PWRSW_PU 20 +#define RES4314_SYNTH_PWRSW_PU 21 +#define RES4314_RX_PWRSW_PU 22 +#define RES4314_RADIO_PU 23 +#define RES4314_VCO_LDO_PU 24 +#define RES4314_AFE_LDO_PU 25 +#define RES4314_RX_LDO_PU 26 +#define RES4314_TX_LDO_PU 27 +#define RES4314_HT_AVAIL 28 +#define RES4314_MACPHY_CLK_AVAIL 29 + + +#define CST4314_OTP_ENABLED 0x00200000 + + +#define RES43228_NOT_USED 0 +#define RES43228_ILP_REQUEST 1 +#define RES43228_XTAL_PU 2 +#define RES43228_ALP_AVAIL 3 +#define RES43228_PLL_EN 4 +#define RES43228_HT_PHY_AVAIL 5 + + +#define CST43228_ILP_DIV_EN 0x1 +#define CST43228_OTP_PRESENT 0x2 +#define CST43228_SERDES_REFCLK_PADSEL 0x4 +#define CST43228_SDIO_MODE 0x8 +#define CST43228_SDIO_OTP_PRESENT 0x10 +#define CST43228_SDIO_RESET 0x20 + + +#define CST4706_PKG_OPTION (1<<0) +#define CST4706_SFLASH_PRESENT (1<<1) +#define CST4706_SFLASH_TYPE (1<<2) +#define CST4706_MIPS_BENDIAN (1<<3) +#define CST4706_PCIE1_DISABLE (1<<5) + + +#define FLSTRCF4706_MASK 0x000000ff +#define FLSTRCF4706_SF1 0x00000001 +#define FLSTRCF4706_PF1 0x00000002 +#define FLSTRCF4706_SF1_TYPE 0x00000004 +#define FLSTRCF4706_NF1 0x00000008 +#define FLSTRCF4706_1ST_MADDR_SEG_MASK 0x000000f0 +#define FLSTRCF4706_1ST_MADDR_SEG_4MB 0x00000010 +#define FLSTRCF4706_1ST_MADDR_SEG_8MB 0x00000020 +#define FLSTRCF4706_1ST_MADDR_SEG_16MB 0x00000030 +#define FLSTRCF4706_1ST_MADDR_SEG_32MB 0x00000040 +#define FLSTRCF4706_1ST_MADDR_SEG_64MB 0x00000050 +#define FLSTRCF4706_1ST_MADDR_SEG_128MB 0x00000060 +#define FLSTRCF4706_1ST_MADDR_SEG_256MB 0x00000070 + + +#define CCTRL4360_I2C_MODE (1 << 0) +#define CCTRL4360_UART_MODE (1 << 1) +#define CCTRL4360_SECI_MODE (1 << 2) +#define CCTRL4360_BTSWCTRL_MODE (1 << 3) +#define CCTRL4360_DISCRETE_FEMCTRL_MODE (1 << 4) +#define CCTRL4360_DIGITAL_PACTRL_MODE (1 << 5) +#define CCTRL4360_BTSWCTRL_AND_DIGPA_PRESENT (1 << 6) +#define CCTRL4360_EXTRA_GPIO_MODE (1 << 7) +#define CCTRL4360_EXTRA_FEMCTRL_MODE (1 << 8) +#define CCTRL4360_BT_LGCY_MODE (1 << 9) +#define CCTRL4360_CORE2FEMCTRL4_ON (1 << 21) +#define CCTRL4360_SECI_ON_GPIO01 (1 << 24) + + +#define RCTRL4360_RFLDO_PWR_DOWN (1 << 1) + + +#define RES4360_REGULATOR 0 +#define RES4360_ILP_AVAIL 1 +#define RES4360_ILP_REQ 2 +#define RES4360_XTAL_LDO_PU 3 +#define RES4360_XTAL_PU 4 +#define RES4360_ALP_AVAIL 5 +#define RES4360_BBPLLPWRSW_PU 6 +#define RES4360_HT_AVAIL 7 +#define RES4360_OTP_PU 8 + +#define CST4360_XTAL_40MZ 0x00000001 +#define CST4360_SFLASH 0x00000002 +#define CST4360_SPROM_PRESENT 0x00000004 +#define CST4360_SFLASH_TYPE 0x00000004 +#define CST4360_OTP_ENABLED 0x00000008 +#define CST4360_REMAP_ROM 0x00000010 +#define CST4360_RSRC_INIT_MODE_MASK 0x00000060 +#define CST4360_RSRC_INIT_MODE_SHIFT 5 +#define CST4360_ILP_DIVEN 0x00000080 +#define CST4360_MODE_USB 0x00000100 +#define CST4360_SPROM_SIZE_MASK 0x00000600 +#define CST4360_SPROM_SIZE_SHIFT 9 +#define CST4360_BBPLL_LOCK 0x00000800 +#define CST4360_AVBBPLL_LOCK 0x00001000 +#define CST4360_USBBBPLL_LOCK 0x00002000 + +#define CCTL_4360_UART_SEL 2 + + +#define CHIP_HOSTIF_PCIEMODE 0x1 +#define CHIP_HOSTIF_USBMODE 0x2 +#define CHIP_HOSTIF_SDIOMODE 0x4 +#define CHIP_HOSTIF_PCIE(sih) (si_chip_hostif(sih) == CHIP_HOSTIF_PCIEMODE) +#define CHIP_HOSTIF_USB(sih) (si_chip_hostif(sih) == CHIP_HOSTIF_USBMODE) +#define CHIP_HOSTIF_SDIO(sih) (si_chip_hostif(sih) == CHIP_HOSTIF_SDIOMODE) + + +#define RES4335_LPLDO_PO 0 +#define RES4335_PMU_BG_PU 1 +#define RES4335_PMU_SLEEP 2 +#define RES4335_RSVD_3 3 +#define RES4335_CBUCK_LPOM_PU 4 +#define RES4335_CBUCK_PFM_PU 5 +#define RES4335_RSVD_6 6 +#define RES4335_RSVD_7 7 +#define RES4335_LNLDO_PU 8 +#define RES4335_XTALLDO_PU 9 +#define RES4335_LDO3P3_PU 10 +#define RES4335_OTP_PU 11 +#define RES4335_XTAL_PU 12 +#define RES4335_SR_CLK_START 13 +#define RES4335_LQ_AVAIL 14 +#define RES4335_LQ_START 15 +#define RES4335_RSVD_16 16 +#define RES4335_WL_CORE_RDY 17 +#define RES4335_ILP_REQ 18 +#define RES4335_ALP_AVAIL 19 +#define RES4335_MINI_PMU 20 +#define RES4335_RADIO_PU 21 +#define RES4335_SR_CLK_STABLE 22 +#define RES4335_SR_SAVE_RESTORE 23 +#define RES4335_SR_PHY_PWRSW 24 +#define RES4335_SR_VDDM_PWRSW 25 +#define RES4335_SR_SUBCORE_PWRSW 26 +#define RES4335_SR_SLEEP 27 +#define RES4335_HT_START 28 +#define RES4335_HT_AVAIL 29 +#define RES4335_MACPHY_CLKAVAIL 30 + + +#define CST4335_SPROM_MASK 0x00000020 +#define CST4335_SFLASH_MASK 0x00000040 +#define CST4335_RES_INIT_MODE_SHIFT 7 +#define CST4335_RES_INIT_MODE_MASK 0x00000180 +#define CST4335_CHIPMODE_MASK 0xF +#define CST4335_CHIPMODE_SDIOD(cs) (((cs) & (1 << 0)) != 0) +#define CST4335_CHIPMODE_GSPI(cs) (((cs) & (1 << 1)) != 0) +#define CST4335_CHIPMODE_USB20D(cs) (((cs) & (1 << 2)) != 0) +#define CST4335_CHIPMODE_PCIE(cs) (((cs) & (1 << 3)) != 0) + + +#define CCTRL1_4335_GPIO_SEL (1 << 0) +#define CCTRL1_4335_SDIO_HOST_WAKE (1 << 2) + +#define CR4_RAM_BASE (0x180000) +#define PATCHTBL_SIZE (0x800) + + +#define SPROM4335_OTP_SELECT 0x00000010 +#define SPROM4335_OTP_PRESENT 0x00000020 + + +#define CC4335_GCI_STRAP_OVERRIDE_SFLASH_PRESENT (1 << 24) +#define CC4335_GCI_STRAP_OVERRIDE_SFLASH_TYPE 25 +#define CC4335_GCI_FUNC_SEL_PAD_SDIO 0x00707770 + + +#define CC4335_SFLASH_CLKDIV_MASK 0x1F000000 +#define CC4335_SFLASH_CLKDIV_SHIFT 25 + + +#define CC4335_SROM_OTP_SFLASH 40 +#define CC4335_SROM_OTP_SFLASH_PRESENT 0x1 +#define CC4335_SROM_OTP_SFLASH_TYPE 0x2 +#define CC4335_SROM_OTP_SFLASH_CLKDIV_MASK 0x003C +#define CC4335_SROM_OTP_SFLASH_CLKDIV_SHIFT 2 + + + + +#define CID4345_REV_TC0 0 +#define CID4345_REV_A0 1 + + +#define CST4345_SPROM_MASK 0x00000020 +#define CST4345_SFLASH_MASK 0x00000040 +#define CST4345_RES_INIT_MODE_SHIFT 7 +#define CST4345_RES_INIT_MODE_MASK 0x00000180 +#define CST4345_CHIPMODE_MASK 0x4000F +#define CST4345_CHIPMODE_SDIOD(cs) (((cs) & (1 << 0)) != 0) +#define CST4345_CHIPMODE_GSPI(cs) (((cs) & (1 << 1)) != 0) +#define CST4345_CHIPMODE_HSIC(cs) (((cs) & (1 << 2)) != 0) +#define CST4345_CHIPMODE_PCIE(cs) (((cs) & (1 << 3)) != 0) +#define CST4345_CHIPMODE_USB20D(cs) (((cs) & (1 << 18)) != 0) + + +#define CST4350_SDIO_MODE 0x00000001 +#define CST4350_HSIC20D_MODE 0x00000002 +#define CST4350_BP_ON_HSIC_CLK 0x00000004 +#define CST4350_PCIE_MODE 0x00000008 +#define CST4350_USB20D_MODE 0x00000010 +#define CST4350_USB30D_MODE 0x00000020 +#define CST4350_SPROM_PRESENT 0x00000040 +#define CST4350_RSRC_INIT_MODE_0 0x00000080 +#define CST4350_RSRC_INIT_MODE_1 0x00000100 +#define CST4350_SEL0_SDIO 0x00000200 +#define CST4350_SEL1_SDIO 0x00000400 +#define CST4350_SDIO_PAD_MODE 0x00000800 +#define CST4350_BBPLL_LOCKED 0x00001000 +#define CST4350_USBPLL_LOCKED 0x00002000 +#define CST4350_LINE_STATE 0x0000C000 +#define CST4350_SERDES_PIPE_PLLLOCK 0x00010000 +#define CST4350_BT_READY 0x00020000 +#define CST4350_SFLASH_PRESENT 0x00040000 +#define CST4350_CPULESS_ENABLE 0x00080000 +#define CST4350_STRAP_HOST_IFC_1 0x00100000 +#define CST4350_STRAP_HOST_IFC_2 0x00200000 +#define CST4350_STRAP_HOST_IFC_3 0x00400000 +#define CST4350_RAW_SPROM_PRESENT 0x00800000 +#define CST4350_APP_CLK_SWITCH_SEL_RDBACK 0x01000000 +#define CST4350_RAW_RSRC_INIT_MODE_0 0x02000000 +#define CST4350_SDIO_PAD_VDDIO 0x04000000 +#define CST4350_GSPI_MODE 0x08000000 +#define CST4350_PACKAGE_OPTION 0xF0000000 + + +#define CST4350_HOST_IFC_MASK 0x00700000 +#define CST4350_HOST_IFC_SHIFT 20 + + +#define CST4350_IFC_MODE_SDIOD 0x0 +#define CST4350_IFC_MODE_HSIC20D 0x1 +#define CST4350_IFC_MODE_HSIC30D 0x2 +#define CST4350_IFC_MODE_PCIE 0x3 +#define CST4350_IFC_MODE_USB20D 0x4 +#define CST4350_IFC_MODE_USB30D 0x5 +#define CST4350_IFC_MODE_USB30D_WL 0x6 +#define CST4350_IFC_MODE_USB30D_BT 0x7 + +#define CST4350_IFC_MODE(cs) ((cs & CST4350_HOST_IFC_MASK) >> CST4350_HOST_IFC_SHIFT) + +#define CST4350_CHIPMODE_SDIOD(cs) (CST4350_IFC_MODE(cs) == (CST4350_IFC_MODE_SDIOD)) +#define CST4350_CHIPMODE_USB20D(cs) ((CST4350_IFC_MODE(cs)) == (CST4350_IFC_MODE_USB20D)) +#define CST4350_CHIPMODE_HSIC20D(cs) (CST4350_IFC_MODE(cs) == (CST4350_IFC_MODE_HSIC20D)) +#define CST4350_CHIPMODE_HSIC30D(cs) (CST4350_IFC_MODE(cs) == (CST4350_IFC_MODE_HSIC30D)) +#define CST4350_CHIPMODE_USB30D(cs) (CST4350_IFC_MODE(cs) == (CST4350_IFC_MODE_USB30D)) +#define CST4350_CHIPMODE_USB30D_WL(cs) (CST4350_IFC_MODE(cs) == (CST4350_IFC_MODE_USB30D_WL)) +#define CST4350_CHIPMODE_PCIE(cs) (CST4350_IFC_MODE(cs) == (CST4350_IFC_MODE_PCIE)) + + +#define RES4350_LPLDO_PU 0 +#define RES4350_PMU_BG_PU 1 +#define RES4350_PMU_SLEEP 2 +#define RES4350_RSVD_3 3 +#define RES4350_CBUCK_LPOM_PU 4 +#define RES4350_CBUCK_PFM_PU 5 +#define RES4350_COLD_START_WAIT 6 +#define RES4350_RSVD_7 7 +#define RES4350_LNLDO_PU 8 +#define RES4350_XTALLDO_PU 9 +#define RES4350_LDO3P3_PU 10 +#define RES4350_OTP_PU 11 +#define RES4350_XTAL_PU 12 +#define RES4350_SR_CLK_START 13 +#define RES4350_LQ_AVAIL 14 +#define RES4350_LQ_START 15 +#define RES4350_RSVD_16 16 +#define RES4350_WL_CORE_RDY 17 +#define RES4350_ILP_REQ 18 +#define RES4350_ALP_AVAIL 19 +#define RES4350_MINI_PMU 20 +#define RES4350_RADIO_PU 21 +#define RES4350_SR_CLK_STABLE 22 +#define RES4350_SR_SAVE_RESTORE 23 +#define RES4350_SR_PHY_PWRSW 24 +#define RES4350_SR_VDDM_PWRSW 25 +#define RES4350_SR_SUBCORE_PWRSW 26 +#define RES4350_SR_SLEEP 27 +#define RES4350_HT_START 28 +#define RES4350_HT_AVAIL 29 +#define RES4350_MACPHY_CLKAVAIL 30 + +#define MUXENAB4350_UART_MASK (0x0000000f) + + +#define CC4350_FNSEL_HWDEF (0) +#define CC4350_FNSEL_SAMEASPIN (1) +#define CC4350_FNSEL_UART (2) +#define CC4350_FNSEL_SFLASH (3) +#define CC4350_FNSEL_SPROM (4) +#define CC4350_FNSEL_I2C (5) +#define CC4350_FNSEL_MISC0 (6) +#define CC4350_FNSEL_GCI (7) +#define CC4350_FNSEL_MISC1 (8) +#define CC4350_FNSEL_MISC2 (9) +#define CC4350_FNSEL_PWDOG (10) +#define CC4350_FNSEL_IND (12) +#define CC4350_FNSEL_PDN (13) +#define CC4350_FNSEL_PUP (14) +#define CC4350_FNSEL_TRISTATE (15) + + +#define CC4350_PIN_GPIO_00 (0) +#define CC4350_PIN_GPIO_01 (1) +#define CC4350_PIN_GPIO_02 (2) +#define CC4350_PIN_GPIO_03 (3) +#define CC4350_PIN_GPIO_04 (4) +#define CC4350_PIN_GPIO_05 (5) +#define CC4350_PIN_GPIO_06 (6) +#define CC4350_PIN_GPIO_07 (7) +#define CC4350_PIN_GPIO_08 (8) +#define CC4350_PIN_GPIO_09 (9) +#define CC4350_PIN_GPIO_10 (10) +#define CC4350_PIN_GPIO_11 (11) +#define CC4350_PIN_GPIO_12 (12) +#define CC4350_PIN_GPIO_13 (13) +#define CC4350_PIN_GPIO_14 (14) +#define CC4350_PIN_GPIO_15 (15) + +#define CC2_4350_PHY_PWRSW_UPTIME_MASK (0xf << 0) +#define CC2_4350_PHY_PWRSW_UPTIME_SHIFT (0) +#define CC2_4350_VDDM_PWRSW_UPDELAY_MASK (0xf << 4) +#define CC2_4350_VDDM_PWRSW_UPDELAY_SHIFT (4) +#define CC2_4350_VDDM_PWRSW_UPTIME_MASK (0xf << 8) +#define CC2_4350_VDDM_PWRSW_UPTIME_SHIFT (8) +#define CC2_4350_SBC_PWRSW_DNDELAY_MASK (0x3 << 12) +#define CC2_4350_SBC_PWRSW_DNDELAY_SHIFT (12) +#define CC2_4350_PHY_PWRSW_DNDELAY_MASK (0x3 << 14) +#define CC2_4350_PHY_PWRSW_DNDELAY_SHIFT (14) +#define CC2_4350_VDDM_PWRSW_DNDELAY_MASK (0x3 << 16) +#define CC2_4350_VDDM_PWRSW_DNDELAY_SHIFT (16) +#define CC2_4350_VDDM_PWRSW_EN_MASK (1 << 20) +#define CC2_4350_VDDM_PWRSW_EN_SHIFT (20) +#define CC2_4350_MEMLPLDO_PWRSW_EN_MASK (1 << 21) +#define CC2_4350_MEMLPLDO_PWRSW_EN_SHIFT (21) +#define CC2_4350_SDIO_AOS_WAKEUP_MASK (1 << 24) +#define CC2_4350_SDIO_AOS_WAKEUP_SHIFT (24) + + +#define CC3_SR_CLK_SR_MEM_MASK (1 << 0) +#define CC3_SR_CLK_SR_MEM_SHIFT (0) +#define CC3_SR_BIT1_TBD_MASK (1 << 1) +#define CC3_SR_BIT1_TBD_SHIFT (1) +#define CC3_SR_ENGINE_ENABLE_MASK (1 << 2) +#define CC3_SR_ENGINE_ENABLE_SHIFT (2) +#define CC3_SR_BIT3_TBD_MASK (1 << 3) +#define CC3_SR_BIT3_TBD_SHIFT (3) +#define CC3_SR_MINDIV_FAST_CLK_MASK (0xF << 4) +#define CC3_SR_MINDIV_FAST_CLK_SHIFT (4) +#define CC3_SR_R23_SR2_RISE_EDGE_TRIG_MASK (1 << 8) +#define CC3_SR_R23_SR2_RISE_EDGE_TRIG_SHIFT (8) +#define CC3_SR_R23_SR2_FALL_EDGE_TRIG_MASK (1 << 9) +#define CC3_SR_R23_SR2_FALL_EDGE_TRIG_SHIFT (9) +#define CC3_SR_R23_SR_RISE_EDGE_TRIG_MASK (1 << 10) +#define CC3_SR_R23_SR_RISE_EDGE_TRIG_SHIFT (10) +#define CC3_SR_R23_SR_FALL_EDGE_TRIG_MASK (1 << 11) +#define CC3_SR_R23_SR_FALL_EDGE_TRIG_SHIFT (11) +#define CC3_SR_NUM_CLK_HIGH_MASK (0x7 << 12) +#define CC3_SR_NUM_CLK_HIGH_SHIFT (12) +#define CC3_SR_BIT15_TBD_MASK (1 << 15) +#define CC3_SR_BIT15_TBD_SHIFT (15) +#define CC3_SR_PHY_FUNC_PIC_MASK (1 << 16) +#define CC3_SR_PHY_FUNC_PIC_SHIFT (16) +#define CC3_SR_BIT17_19_TBD_MASK (0x7 << 17) +#define CC3_SR_BIT17_19_TBD_SHIFT (17) +#define CC3_SR_CHIP_TRIGGER_1_MASK (1 << 20) +#define CC3_SR_CHIP_TRIGGER_1_SHIFT (20) +#define CC3_SR_CHIP_TRIGGER_2_MASK (1 << 21) +#define CC3_SR_CHIP_TRIGGER_2_SHIFT (21) +#define CC3_SR_CHIP_TRIGGER_3_MASK (1 << 22) +#define CC3_SR_CHIP_TRIGGER_3_SHIFT (22) +#define CC3_SR_CHIP_TRIGGER_4_MASK (1 << 23) +#define CC3_SR_CHIP_TRIGGER_4_SHIFT (23) +#define CC3_SR_ALLOW_SBC_FUNC_PIC_MASK (1 << 24) +#define CC3_SR_ALLOW_SBC_FUNC_PIC_SHIFT (24) +#define CC3_SR_BIT25_26_TBD_MASK (0x3 << 25) +#define CC3_SR_BIT25_26_TBD_SHIFT (25) +#define CC3_SR_ALLOW_SBC_STBY_MASK (1 << 27) +#define CC3_SR_ALLOW_SBC_STBY_SHIFT (27) +#define CC3_SR_GPIO_MUX_MASK (0xF << 28) +#define CC3_SR_GPIO_MUX_SHIFT (28) + + +#define CC4_SR_INIT_ADDR_MASK (0x3FF0000) +#define CC4_4350_SR_ASM_ADDR (0x30) +#define CC4_4335_SR_ASM_ADDR (0x48) +#define CC4_4345_SR_ASM_ADDR (0x48) +#define CC4_SR_INIT_ADDR_SHIFT (16) + +#define CC4_4350_EN_SR_CLK_ALP_MASK (1 << 30) +#define CC4_4350_EN_SR_CLK_ALP_SHIFT (30) +#define CC4_4350_EN_SR_CLK_HT_MASK (1 << 31) +#define CC4_4350_EN_SR_CLK_HT_SHIFT (31) + +#define VREG4_4350_MEMLPDO_PU_MASK (1 << 31) +#define VREG4_4350_MEMLPDO_PU_SHIFT 31 + +#define CC6_4350_PCIE_CLKREQ_WAKEUP_MASK (1 << 4) +#define CC6_4350_PCIE_CLKREQ_WAKEUP_SHIFT (4) +#define CC6_4350_PMU_WAKEUP_ALPAVAIL_MASK (1 << 6) +#define CC6_4350_PMU_WAKEUP_ALPAVAIL_SHIFT (6) + + +#define CC_GCI_CHIPCTRL_00 (0) +#define CC_GCI_CHIPCTRL_01 (1) +#define CC_GCI_CHIPCTRL_02 (2) +#define CC_GCI_CHIPCTRL_03 (3) +#define CC_GCI_CHIPCTRL_04 (4) +#define CC_GCI_CHIPCTRL_05 (5) +#define CC_GCI_CHIPCTRL_06 (6) +#define CC_GCI_06_JTAG_SEL_SHIFT 4 +#define CC_GCI_06_JTAG_SEL_MASK (1 << 4) +#define CC_GCI_CHIPCTRL_07 (7) +#define CC_GCI_CHIPCTRL_08 (8) + +#define CC_GCI_NUMCHIPCTRLREGS(cap1) ((cap1 & 0xF00) >> 8) + + +#define RES4345_LPLDO_PU 0 +#define RES4345_PMU_BG_PU 1 +#define RES4345_PMU_SLEEP 2 +#define RES4345_HSICLDO_PU 3 +#define RES4345_CBUCK_LPOM_PU 4 +#define RES4345_CBUCK_PFM_PU 5 +#define RES4345_COLD_START_WAIT 6 +#define RES4345_RSVD_7 7 +#define RES4345_LNLDO_PU 8 +#define RES4345_XTALLDO_PU 9 +#define RES4345_LDO3P3_PU 10 +#define RES4345_OTP_PU 11 +#define RES4345_XTAL_PU 12 +#define RES4345_SR_CLK_START 13 +#define RES4345_LQ_AVAIL 14 +#define RES4345_LQ_START 15 +#define RES4345_PERST_OVR 16 +#define RES4345_WL_CORE_RDY 17 +#define RES4345_ILP_REQ 18 +#define RES4345_ALP_AVAIL 19 +#define RES4345_MINI_PMU 20 +#define RES4345_RADIO_PU 21 +#define RES4345_SR_CLK_STABLE 22 +#define RES4345_SR_SAVE_RESTORE 23 +#define RES4345_SR_PHY_PWRSW 24 +#define RES4345_SR_VDDM_PWRSW 25 +#define RES4345_SR_SUBCORE_PWRSW 26 +#define RES4345_SR_SLEEP 27 +#define RES4345_HT_START 28 +#define RES4345_HT_AVAIL 29 +#define RES4345_MACPHY_CLK_AVAIL 30 + + +#define CC4335_PIN_GPIO_00 (0) +#define CC4335_PIN_GPIO_01 (1) +#define CC4335_PIN_GPIO_02 (2) +#define CC4335_PIN_GPIO_03 (3) +#define CC4335_PIN_GPIO_04 (4) +#define CC4335_PIN_GPIO_05 (5) +#define CC4335_PIN_GPIO_06 (6) +#define CC4335_PIN_GPIO_07 (7) +#define CC4335_PIN_GPIO_08 (8) +#define CC4335_PIN_GPIO_09 (9) +#define CC4335_PIN_GPIO_10 (10) +#define CC4335_PIN_GPIO_11 (11) +#define CC4335_PIN_GPIO_12 (12) +#define CC4335_PIN_GPIO_13 (13) +#define CC4335_PIN_GPIO_14 (14) +#define CC4335_PIN_GPIO_15 (15) +#define CC4335_PIN_SDIO_CLK (16) +#define CC4335_PIN_SDIO_CMD (17) +#define CC4335_PIN_SDIO_DATA0 (18) +#define CC4335_PIN_SDIO_DATA1 (19) +#define CC4335_PIN_SDIO_DATA2 (20) +#define CC4335_PIN_SDIO_DATA3 (21) +#define CC4335_PIN_RF_SW_CTRL_6 (22) +#define CC4335_PIN_RF_SW_CTRL_7 (23) +#define CC4335_PIN_RF_SW_CTRL_8 (24) +#define CC4335_PIN_RF_SW_CTRL_9 (25) + + +#define CC4335_FNSEL_HWDEF (0) +#define CC4335_FNSEL_SAMEASPIN (1) +#define CC4335_FNSEL_GPIO0 (2) +#define CC4335_FNSEL_GPIO1 (3) +#define CC4335_FNSEL_GCI0 (4) +#define CC4335_FNSEL_GCI1 (5) +#define CC4335_FNSEL_UART (6) +#define CC4335_FNSEL_SFLASH (7) +#define CC4335_FNSEL_SPROM (8) +#define CC4335_FNSEL_MISC0 (9) +#define CC4335_FNSEL_MISC1 (10) +#define CC4335_FNSEL_MISC2 (11) +#define CC4335_FNSEL_IND (12) +#define CC4335_FNSEL_PDN (13) +#define CC4335_FNSEL_PUP (14) +#define CC4335_FNSEL_TRI (15) + + +#define GCIMASK(pos) (((uint32)0xF) << pos) + + +#define GCIPOSVAL(val, pos) ((((uint32)val) << pos) & GCIMASK(pos)) + + +#define MUXENAB4335_UART_MASK (0x0000000f) +#define MUXENAB4335_UART_SHIFT 0 +#define MUXENAB4335_HOSTWAKE_MASK (0x000000f0) +#define MUXENAB4335_HOSTWAKE_SHIFT 4 + +#define MUXENAB4335_GETIX(val, name) \ + ((((val) & MUXENAB4335_ ## name ## _MASK) >> MUXENAB4335_ ## name ## _SHIFT) - 1) + + +#define PMU_MAX_TRANSITION_DLY 20000 + + +#define PMURES_UP_TRANSITION 2 + + + +#define SECI_MODE_UART 0x0 +#define SECI_MODE_SECI 0x1 +#define SECI_MODE_LEGACY_3WIRE_BT 0x2 +#define SECI_MODE_LEGACY_3WIRE_WLAN 0x3 +#define SECI_MODE_HALF_SECI 0x4 + +#define SECI_RESET (1 << 0) +#define SECI_RESET_BAR_UART (1 << 1) +#define SECI_ENAB_SECI_ECI (1 << 2) +#define SECI_ENAB_SECIOUT_DIS (1 << 3) +#define SECI_MODE_MASK 0x7 +#define SECI_MODE_SHIFT 4 +#define SECI_UPD_SECI (1 << 7) + +#define SECI_SLIP_ESC_CHAR 0xDB +#define SECI_SIGNOFF_0 SECI_SLIP_ESC_CHAR +#define SECI_SIGNOFF_1 0 +#define SECI_REFRESH_REQ 0xDA + + +#define CLKCTL_STS_SECI_CLK_REQ (1 << 8) +#define CLKCTL_STS_SECI_CLK_AVAIL (1 << 24) + +#define SECI_UART_MSR_CTS_STATE (1 << 0) +#define SECI_UART_MSR_RTS_STATE (1 << 1) +#define SECI_UART_SECI_IN_STATE (1 << 2) +#define SECI_UART_SECI_IN2_STATE (1 << 3) + + +#define SECI_UART_LCR_STOP_BITS (1 << 0) +#define SECI_UART_LCR_PARITY_EN (1 << 1) +#define SECI_UART_LCR_PARITY (1 << 2) +#define SECI_UART_LCR_RX_EN (1 << 3) +#define SECI_UART_LCR_LBRK_CTRL (1 << 4) +#define SECI_UART_LCR_TXO_EN (1 << 5) +#define SECI_UART_LCR_RTSO_EN (1 << 6) +#define SECI_UART_LCR_SLIPMODE_EN (1 << 7) +#define SECI_UART_LCR_RXCRC_CHK (1 << 8) +#define SECI_UART_LCR_TXCRC_INV (1 << 9) +#define SECI_UART_LCR_TXCRC_LSBF (1 << 10) +#define SECI_UART_LCR_TXCRC_EN (1 << 11) + +#define SECI_UART_MCR_TX_EN (1 << 0) +#define SECI_UART_MCR_PRTS (1 << 1) +#define SECI_UART_MCR_SWFLCTRL_EN (1 << 2) +#define SECI_UART_MCR_HIGHRATE_EN (1 << 3) +#define SECI_UART_MCR_LOOPBK_EN (1 << 4) +#define SECI_UART_MCR_AUTO_RTS (1 << 5) +#define SECI_UART_MCR_AUTO_TX_DIS (1 << 6) +#define SECI_UART_MCR_BAUD_ADJ_EN (1 << 7) +#define SECI_UART_MCR_XONOFF_RPT (1 << 9) + + + + +#define ECI_BW_20 0x0 +#define ECI_BW_25 0x1 +#define ECI_BW_30 0x2 +#define ECI_BW_35 0x3 +#define ECI_BW_40 0x4 +#define ECI_BW_45 0x5 +#define ECI_BW_50 0x6 +#define ECI_BW_ALL 0x7 + + +#define WLAN_NUM_ANT1 TXANT_0 +#define WLAN_NUM_ANT2 TXANT_1 + +#endif diff --git a/external/cache/sources/wl/include/sbconfig.h b/external/cache/sources/wl/include/sbconfig.h new file mode 100644 index 0000000..1ee5a8c --- /dev/null +++ b/external/cache/sources/wl/include/sbconfig.h @@ -0,0 +1,257 @@ +/* + * Broadcom SiliconBackplane hardware register definitions. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: sbconfig.h 241182 2011-02-17 21:50:03Z $ + */ + +#ifndef _SBCONFIG_H +#define _SBCONFIG_H + + +#ifndef PAD +#define _PADLINE(line) pad ## line +#define _XSTR(line) _PADLINE(line) +#define PAD _XSTR(__LINE__) +#endif + + +#define SB_BUS_SIZE 0x10000 +#define SB_BUS_BASE(b) (SI_ENUM_BASE + (b) * SB_BUS_SIZE) +#define SB_BUS_MAXCORES (SB_BUS_SIZE / SI_CORE_SIZE) + + +#define SBCONFIGOFF 0xf00 +#define SBCONFIGSIZE 256 + +#define SBIPSFLAG 0x08 +#define SBTPSFLAG 0x18 +#define SBTMERRLOGA 0x48 +#define SBTMERRLOG 0x50 +#define SBADMATCH3 0x60 +#define SBADMATCH2 0x68 +#define SBADMATCH1 0x70 +#define SBIMSTATE 0x90 +#define SBINTVEC 0x94 +#define SBTMSTATELOW 0x98 +#define SBTMSTATEHIGH 0x9c +#define SBBWA0 0xa0 +#define SBIMCONFIGLOW 0xa8 +#define SBIMCONFIGHIGH 0xac +#define SBADMATCH0 0xb0 +#define SBTMCONFIGLOW 0xb8 +#define SBTMCONFIGHIGH 0xbc +#define SBBCONFIG 0xc0 +#define SBBSTATE 0xc8 +#define SBACTCNFG 0xd8 +#define SBFLAGST 0xe8 +#define SBIDLOW 0xf8 +#define SBIDHIGH 0xfc + + + +#define SBIMERRLOGA 0xea8 +#define SBIMERRLOG 0xeb0 +#define SBTMPORTCONNID0 0xed8 +#define SBTMPORTLOCK0 0xef8 + +#ifndef _LANGUAGE_ASSEMBLY + +typedef volatile struct _sbconfig { + uint32 PAD[2]; + uint32 sbipsflag; + uint32 PAD[3]; + uint32 sbtpsflag; + uint32 PAD[11]; + uint32 sbtmerrloga; + uint32 PAD; + uint32 sbtmerrlog; + uint32 PAD[3]; + uint32 sbadmatch3; + uint32 PAD; + uint32 sbadmatch2; + uint32 PAD; + uint32 sbadmatch1; + uint32 PAD[7]; + uint32 sbimstate; + uint32 sbintvec; + uint32 sbtmstatelow; + uint32 sbtmstatehigh; + uint32 sbbwa0; + uint32 PAD; + uint32 sbimconfiglow; + uint32 sbimconfighigh; + uint32 sbadmatch0; + uint32 PAD; + uint32 sbtmconfiglow; + uint32 sbtmconfighigh; + uint32 sbbconfig; + uint32 PAD; + uint32 sbbstate; + uint32 PAD[3]; + uint32 sbactcnfg; + uint32 PAD[3]; + uint32 sbflagst; + uint32 PAD[3]; + uint32 sbidlow; + uint32 sbidhigh; +} sbconfig_t; + +#endif + + +#define SBIPS_INT1_MASK 0x3f +#define SBIPS_INT1_SHIFT 0 +#define SBIPS_INT2_MASK 0x3f00 +#define SBIPS_INT2_SHIFT 8 +#define SBIPS_INT3_MASK 0x3f0000 +#define SBIPS_INT3_SHIFT 16 +#define SBIPS_INT4_MASK 0x3f000000 +#define SBIPS_INT4_SHIFT 24 + + +#define SBTPS_NUM0_MASK 0x3f +#define SBTPS_F0EN0 0x40 + + +#define SBTMEL_CM 0x00000007 +#define SBTMEL_CI 0x0000ff00 +#define SBTMEL_EC 0x0f000000 +#define SBTMEL_ME 0x80000000 + + +#define SBIM_PC 0xf +#define SBIM_AP_MASK 0x30 +#define SBIM_AP_BOTH 0x00 +#define SBIM_AP_TS 0x10 +#define SBIM_AP_TK 0x20 +#define SBIM_AP_RSV 0x30 +#define SBIM_IBE 0x20000 +#define SBIM_TO 0x40000 +#define SBIM_BY 0x01800000 +#define SBIM_RJ 0x02000000 + + +#define SBTML_RESET 0x0001 +#define SBTML_REJ_MASK 0x0006 +#define SBTML_REJ 0x0002 +#define SBTML_TMPREJ 0x0004 + +#define SBTML_SICF_SHIFT 16 + + +#define SBTMH_SERR 0x0001 +#define SBTMH_INT 0x0002 +#define SBTMH_BUSY 0x0004 +#define SBTMH_TO 0x0020 + +#define SBTMH_SISF_SHIFT 16 + + +#define SBBWA_TAB0_MASK 0xffff +#define SBBWA_TAB1_MASK 0xffff +#define SBBWA_TAB1_SHIFT 16 + + +#define SBIMCL_STO_MASK 0x7 +#define SBIMCL_RTO_MASK 0x70 +#define SBIMCL_RTO_SHIFT 4 +#define SBIMCL_CID_MASK 0xff0000 +#define SBIMCL_CID_SHIFT 16 + + +#define SBIMCH_IEM_MASK 0xc +#define SBIMCH_TEM_MASK 0x30 +#define SBIMCH_TEM_SHIFT 4 +#define SBIMCH_BEM_MASK 0xc0 +#define SBIMCH_BEM_SHIFT 6 + + +#define SBAM_TYPE_MASK 0x3 +#define SBAM_AD64 0x4 +#define SBAM_ADINT0_MASK 0xf8 +#define SBAM_ADINT0_SHIFT 3 +#define SBAM_ADINT1_MASK 0x1f8 +#define SBAM_ADINT1_SHIFT 3 +#define SBAM_ADINT2_MASK 0x1f8 +#define SBAM_ADINT2_SHIFT 3 +#define SBAM_ADEN 0x400 +#define SBAM_ADNEG 0x800 +#define SBAM_BASE0_MASK 0xffffff00 +#define SBAM_BASE0_SHIFT 8 +#define SBAM_BASE1_MASK 0xfffff000 +#define SBAM_BASE1_SHIFT 12 +#define SBAM_BASE2_MASK 0xffff0000 +#define SBAM_BASE2_SHIFT 16 + + +#define SBTMCL_CD_MASK 0xff +#define SBTMCL_CO_MASK 0xf800 +#define SBTMCL_CO_SHIFT 11 +#define SBTMCL_IF_MASK 0xfc0000 +#define SBTMCL_IF_SHIFT 18 +#define SBTMCL_IM_MASK 0x3000000 +#define SBTMCL_IM_SHIFT 24 + + +#define SBTMCH_BM_MASK 0x3 +#define SBTMCH_RM_MASK 0x3 +#define SBTMCH_RM_SHIFT 2 +#define SBTMCH_SM_MASK 0x30 +#define SBTMCH_SM_SHIFT 4 +#define SBTMCH_EM_MASK 0x300 +#define SBTMCH_EM_SHIFT 8 +#define SBTMCH_IM_MASK 0xc00 +#define SBTMCH_IM_SHIFT 10 + + +#define SBBC_LAT_MASK 0x3 +#define SBBC_MAX0_MASK 0xf0000 +#define SBBC_MAX0_SHIFT 16 +#define SBBC_MAX1_MASK 0xf00000 +#define SBBC_MAX1_SHIFT 20 + + +#define SBBS_SRD 0x1 +#define SBBS_HRD 0x2 + + +#define SBIDL_CS_MASK 0x3 +#define SBIDL_AR_MASK 0x38 +#define SBIDL_AR_SHIFT 3 +#define SBIDL_SYNCH 0x40 +#define SBIDL_INIT 0x80 +#define SBIDL_MINLAT_MASK 0xf00 +#define SBIDL_MINLAT_SHIFT 8 +#define SBIDL_MAXLAT 0xf000 +#define SBIDL_MAXLAT_SHIFT 12 +#define SBIDL_FIRST 0x10000 +#define SBIDL_CW_MASK 0xc0000 +#define SBIDL_CW_SHIFT 18 +#define SBIDL_TP_MASK 0xf00000 +#define SBIDL_TP_SHIFT 20 +#define SBIDL_IP_MASK 0xf000000 +#define SBIDL_IP_SHIFT 24 +#define SBIDL_RV_MASK 0xf0000000 +#define SBIDL_RV_SHIFT 28 +#define SBIDL_RV_2_2 0x00000000 +#define SBIDL_RV_2_3 0x10000000 + + +#define SBIDH_RC_MASK 0x000f +#define SBIDH_RCE_MASK 0x7000 +#define SBIDH_RCE_SHIFT 8 +#define SBCOREREV(sbidh) \ + ((((sbidh) & SBIDH_RCE_MASK) >> SBIDH_RCE_SHIFT) | ((sbidh) & SBIDH_RC_MASK)) +#define SBIDH_CC_MASK 0x8ff0 +#define SBIDH_CC_SHIFT 4 +#define SBIDH_VC_MASK 0xffff0000 +#define SBIDH_VC_SHIFT 16 + +#define SB_COMMIT 0xfd8 + + +#define SB_VEND_BCM 0x4243 + +#endif diff --git a/external/cache/sources/wl/include/sbhnddma.h b/external/cache/sources/wl/include/sbhnddma.h new file mode 100644 index 0000000..9092d62 --- /dev/null +++ b/external/cache/sources/wl/include/sbhnddma.h @@ -0,0 +1,371 @@ +/* + * Generic Broadcom Home Networking Division (HND) DMA engine HW interface + * This supports the following chips: BCM42xx, 44xx, 47xx . + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: sbhnddma.h 345316 2012-07-17 17:46:04Z $ + */ + +#ifndef _sbhnddma_h_ +#define _sbhnddma_h_ + + + + + + + +typedef volatile struct { + uint32 control; + uint32 addr; + uint32 ptr; + uint32 status; +} dma32regs_t; + +typedef volatile struct { + dma32regs_t xmt; + dma32regs_t rcv; +} dma32regp_t; + +typedef volatile struct { + uint32 fifoaddr; + uint32 fifodatalow; + uint32 fifodatahigh; + uint32 pad; +} dma32diag_t; + + +typedef volatile struct { + uint32 ctrl; + uint32 addr; +} dma32dd_t; + + +#define D32RINGALIGN_BITS 12 +#define D32MAXRINGSZ (1 << D32RINGALIGN_BITS) +#define D32RINGALIGN (1 << D32RINGALIGN_BITS) + +#define D32MAXDD (D32MAXRINGSZ / sizeof (dma32dd_t)) + + +#define XC_XE ((uint32)1 << 0) +#define XC_SE ((uint32)1 << 1) +#define XC_LE ((uint32)1 << 2) +#define XC_FL ((uint32)1 << 4) +#define XC_MR_MASK 0x000000C0 +#define XC_MR_SHIFT 6 +#define XC_PD ((uint32)1 << 11) +#define XC_AE ((uint32)3 << 16) +#define XC_AE_SHIFT 16 +#define XC_BL_MASK 0x001C0000 +#define XC_BL_SHIFT 18 +#define XC_PC_MASK 0x00E00000 +#define XC_PC_SHIFT 21 +#define XC_PT_MASK 0x03000000 +#define XC_PT_SHIFT 24 + + +#define DMA_MR_1 0 +#define DMA_MR_2 1 + + + +#define DMA_BL_16 0 +#define DMA_BL_32 1 +#define DMA_BL_64 2 +#define DMA_BL_128 3 +#define DMA_BL_256 4 +#define DMA_BL_512 5 +#define DMA_BL_1024 6 + + +#define DMA_PC_0 0 +#define DMA_PC_4 1 +#define DMA_PC_8 2 +#define DMA_PC_16 3 + + + +#define DMA_PT_1 0 +#define DMA_PT_2 1 +#define DMA_PT_4 2 +#define DMA_PT_8 3 + + +#define XP_LD_MASK 0xfff + + +#define XS_CD_MASK 0x0fff +#define XS_XS_MASK 0xf000 +#define XS_XS_SHIFT 12 +#define XS_XS_DISABLED 0x0000 +#define XS_XS_ACTIVE 0x1000 +#define XS_XS_IDLE 0x2000 +#define XS_XS_STOPPED 0x3000 +#define XS_XS_SUSP 0x4000 +#define XS_XE_MASK 0xf0000 +#define XS_XE_SHIFT 16 +#define XS_XE_NOERR 0x00000 +#define XS_XE_DPE 0x10000 +#define XS_XE_DFU 0x20000 +#define XS_XE_BEBR 0x30000 +#define XS_XE_BEDA 0x40000 +#define XS_AD_MASK 0xfff00000 +#define XS_AD_SHIFT 20 + + +#define RC_RE ((uint32)1 << 0) +#define RC_RO_MASK 0xfe +#define RC_RO_SHIFT 1 +#define RC_FM ((uint32)1 << 8) +#define RC_SH ((uint32)1 << 9) +#define RC_OC ((uint32)1 << 10) +#define RC_PD ((uint32)1 << 11) +#define RC_AE ((uint32)3 << 16) +#define RC_AE_SHIFT 16 +#define RC_BL_MASK 0x001C0000 +#define RC_BL_SHIFT 18 +#define RC_PC_MASK 0x00E00000 +#define RC_PC_SHIFT 21 +#define RC_PT_MASK 0x03000000 +#define RC_PT_SHIFT 24 + + +#define RP_LD_MASK 0xfff + + +#define RS_CD_MASK 0x0fff +#define RS_RS_MASK 0xf000 +#define RS_RS_SHIFT 12 +#define RS_RS_DISABLED 0x0000 +#define RS_RS_ACTIVE 0x1000 +#define RS_RS_IDLE 0x2000 +#define RS_RS_STOPPED 0x3000 +#define RS_RE_MASK 0xf0000 +#define RS_RE_SHIFT 16 +#define RS_RE_NOERR 0x00000 +#define RS_RE_DPE 0x10000 +#define RS_RE_DFO 0x20000 +#define RS_RE_BEBW 0x30000 +#define RS_RE_BEDA 0x40000 +#define RS_AD_MASK 0xfff00000 +#define RS_AD_SHIFT 20 + + +#define FA_OFF_MASK 0xffff +#define FA_SEL_MASK 0xf0000 +#define FA_SEL_SHIFT 16 +#define FA_SEL_XDD 0x00000 +#define FA_SEL_XDP 0x10000 +#define FA_SEL_RDD 0x40000 +#define FA_SEL_RDP 0x50000 +#define FA_SEL_XFD 0x80000 +#define FA_SEL_XFP 0x90000 +#define FA_SEL_RFD 0xc0000 +#define FA_SEL_RFP 0xd0000 +#define FA_SEL_RSD 0xe0000 +#define FA_SEL_RSP 0xf0000 + + +#define CTRL_BC_MASK 0x00001fff +#define CTRL_AE ((uint32)3 << 16) +#define CTRL_AE_SHIFT 16 +#define CTRL_PARITY ((uint32)3 << 18) +#define CTRL_EOT ((uint32)1 << 28) +#define CTRL_IOC ((uint32)1 << 29) +#define CTRL_EOF ((uint32)1 << 30) +#define CTRL_SOF ((uint32)1 << 31) + + +#define CTRL_CORE_MASK 0x0ff00000 + + + + +typedef volatile struct { + uint32 control; + uint32 ptr; + uint32 addrlow; + uint32 addrhigh; + uint32 status0; + uint32 status1; +} dma64regs_t; + +typedef volatile struct { + dma64regs_t tx; + dma64regs_t rx; +} dma64regp_t; + +typedef volatile struct { + uint32 fifoaddr; + uint32 fifodatalow; + uint32 fifodatahigh; + uint32 pad; +} dma64diag_t; + + +typedef volatile struct { + uint32 ctrl1; + uint32 ctrl2; + uint32 addrlow; + uint32 addrhigh; +} dma64dd_t; + + +#define D64RINGALIGN_BITS 13 +#define D64MAXRINGSZ (1 << D64RINGALIGN_BITS) +#define D64RINGBOUNDARY (1 << D64RINGALIGN_BITS) + +#define D64MAXDD (D64MAXRINGSZ / sizeof (dma64dd_t)) + + +#define D64MAXDD_LARGE ((1 << 16) / sizeof (dma64dd_t)) + + +#define D64RINGBOUNDARY_LARGE (1 << 16) + + +#define D64_DEF_USBBURSTLEN 2 +#define D64_DEF_SDIOBURSTLEN 1 + + +#ifndef D64_USBBURSTLEN +#define D64_USBBURSTLEN DMA_BL_64 +#endif +#ifndef D64_SDIOBURSTLEN +#define D64_SDIOBURSTLEN DMA_BL_32 +#endif + + +#define D64_XC_XE 0x00000001 +#define D64_XC_SE 0x00000002 +#define D64_XC_LE 0x00000004 +#define D64_XC_FL 0x00000010 +#define D64_XC_MR_MASK 0x000000C0 +#define D64_XC_MR_SHIFT 6 +#define D64_XC_PD 0x00000800 +#define D64_XC_AE 0x00030000 +#define D64_XC_AE_SHIFT 16 +#define D64_XC_BL_MASK 0x001C0000 +#define D64_XC_BL_SHIFT 18 +#define D64_XC_PC_MASK 0x00E00000 +#define D64_XC_PC_SHIFT 21 +#define D64_XC_PT_MASK 0x03000000 +#define D64_XC_PT_SHIFT 24 + + +#define D64_XP_LD_MASK 0x00001fff + + +#define D64_XS0_CD_MASK (di->d64_xs0_cd_mask) +#define D64_XS0_XS_MASK 0xf0000000 +#define D64_XS0_XS_SHIFT 28 +#define D64_XS0_XS_DISABLED 0x00000000 +#define D64_XS0_XS_ACTIVE 0x10000000 +#define D64_XS0_XS_IDLE 0x20000000 +#define D64_XS0_XS_STOPPED 0x30000000 +#define D64_XS0_XS_SUSP 0x40000000 + +#define D64_XS1_AD_MASK (di->d64_xs1_ad_mask) +#define D64_XS1_XE_MASK 0xf0000000 +#define D64_XS1_XE_SHIFT 28 +#define D64_XS1_XE_NOERR 0x00000000 +#define D64_XS1_XE_DPE 0x10000000 +#define D64_XS1_XE_DFU 0x20000000 +#define D64_XS1_XE_DTE 0x30000000 +#define D64_XS1_XE_DESRE 0x40000000 +#define D64_XS1_XE_COREE 0x50000000 + + +#define D64_RC_RE 0x00000001 +#define D64_RC_RO_MASK 0x000000fe +#define D64_RC_RO_SHIFT 1 +#define D64_RC_FM 0x00000100 +#define D64_RC_SH 0x00000200 +#define D64_RC_OC 0x00000400 +#define D64_RC_PD 0x00000800 +#define D64_RC_GE 0x00004000 +#define D64_RC_AE 0x00030000 +#define D64_RC_AE_SHIFT 16 +#define D64_RC_BL_MASK 0x001C0000 +#define D64_RC_BL_SHIFT 18 +#define D64_RC_PC_MASK 0x00E00000 +#define D64_RC_PC_SHIFT 21 +#define D64_RC_PT_MASK 0x03000000 +#define D64_RC_PT_SHIFT 24 + + +#define DMA_CTRL_PEN (1 << 0) +#define DMA_CTRL_ROC (1 << 1) +#define DMA_CTRL_RXMULTI (1 << 2) +#define DMA_CTRL_UNFRAMED (1 << 3) +#define DMA_CTRL_USB_BOUNDRY4KB_WAR (1 << 4) +#define DMA_CTRL_DMA_AVOIDANCE_WAR (1 << 5) + + +#define D64_RP_LD_MASK 0x00001fff + + +#define D64_RS0_CD_MASK (di->d64_rs0_cd_mask) +#define D64_RS0_RS_MASK 0xf0000000 +#define D64_RS0_RS_SHIFT 28 +#define D64_RS0_RS_DISABLED 0x00000000 +#define D64_RS0_RS_ACTIVE 0x10000000 +#define D64_RS0_RS_IDLE 0x20000000 +#define D64_RS0_RS_STOPPED 0x30000000 +#define D64_RS0_RS_SUSP 0x40000000 + +#define D64_RS1_AD_MASK 0x0001ffff +#define D64_RS1_RE_MASK 0xf0000000 +#define D64_RS1_RE_SHIFT 28 +#define D64_RS1_RE_NOERR 0x00000000 +#define D64_RS1_RE_DPO 0x10000000 +#define D64_RS1_RE_DFU 0x20000000 +#define D64_RS1_RE_DTE 0x30000000 +#define D64_RS1_RE_DESRE 0x40000000 +#define D64_RS1_RE_COREE 0x50000000 + + +#define D64_FA_OFF_MASK 0xffff +#define D64_FA_SEL_MASK 0xf0000 +#define D64_FA_SEL_SHIFT 16 +#define D64_FA_SEL_XDD 0x00000 +#define D64_FA_SEL_XDP 0x10000 +#define D64_FA_SEL_RDD 0x40000 +#define D64_FA_SEL_RDP 0x50000 +#define D64_FA_SEL_XFD 0x80000 +#define D64_FA_SEL_XFP 0x90000 +#define D64_FA_SEL_RFD 0xc0000 +#define D64_FA_SEL_RFP 0xd0000 +#define D64_FA_SEL_RSD 0xe0000 +#define D64_FA_SEL_RSP 0xf0000 + + +#define D64_CTRL_COREFLAGS 0x0ff00000 +#define D64_CTRL1_EOT ((uint32)1 << 28) +#define D64_CTRL1_IOC ((uint32)1 << 29) +#define D64_CTRL1_EOF ((uint32)1 << 30) +#define D64_CTRL1_SOF ((uint32)1 << 31) + + +#define D64_CTRL2_BC_MASK 0x00007fff +#define D64_CTRL2_AE 0x00030000 +#define D64_CTRL2_AE_SHIFT 16 +#define D64_CTRL2_PARITY 0x00040000 + + +#define D64_CTRL_CORE_MASK 0x0ff00000 + +#define D64_RX_FRM_STS_LEN 0x0000ffff +#define D64_RX_FRM_STS_OVFL 0x00800000 +#define D64_RX_FRM_STS_DSCRCNT 0x0f000000 +#define D64_RX_FRM_STS_DATATYPE 0xf0000000 + + +typedef volatile struct { + uint16 len; + uint16 flags; +} dma_rxh_t; + +#endif diff --git a/external/cache/sources/wl/include/sbpcmcia.h b/external/cache/sources/wl/include/sbpcmcia.h new file mode 100644 index 0000000..10b5efe --- /dev/null +++ b/external/cache/sources/wl/include/sbpcmcia.h @@ -0,0 +1,350 @@ +/* + * BCM43XX Sonics SiliconBackplane PCMCIA core hardware definitions. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: sbpcmcia.h 401759 2013-05-13 16:08:08Z sudhirbs $ + */ + +#ifndef _SBPCMCIA_H +#define _SBPCMCIA_H + +/* All the addresses that are offsets in attribute space are divided + * by two to account for the fact that odd bytes are invalid in + * attribute space and our read/write routines make the space appear + * as if they didn't exist. Still we want to show the original numbers + * as documented in the hnd_pcmcia core manual. + */ + +/* PCMCIA Function Configuration Registers */ +#define PCMCIA_FCR (0x700 / 2) + +#define FCR0_OFF 0 +#define FCR1_OFF (0x40 / 2) +#define FCR2_OFF (0x80 / 2) +#define FCR3_OFF (0xc0 / 2) + +#define PCMCIA_FCR0 (0x700 / 2) +#define PCMCIA_FCR1 (0x740 / 2) +#define PCMCIA_FCR2 (0x780 / 2) +#define PCMCIA_FCR3 (0x7c0 / 2) + +/* Standard PCMCIA FCR registers */ + +#define PCMCIA_COR 0 + +#define COR_RST 0x80 +#define COR_LEV 0x40 +#define COR_IRQEN 0x04 +#define COR_BLREN 0x01 +#define COR_FUNEN 0x01 + + +#define PCICIA_FCSR (2 / 2) +#define PCICIA_PRR (4 / 2) +#define PCICIA_SCR (6 / 2) +#define PCICIA_ESR (8 / 2) + + +#define PCM_MEMOFF 0x0000 +#define F0_MEMOFF 0x1000 +#define F1_MEMOFF 0x2000 +#define F2_MEMOFF 0x3000 +#define F3_MEMOFF 0x4000 + +/* Memory base in the function fcr's */ +#define MEM_ADDR0 (0x728 / 2) +#define MEM_ADDR1 (0x72a / 2) +#define MEM_ADDR2 (0x72c / 2) + +/* PCMCIA base plus Srom access in fcr0: */ +#define PCMCIA_ADDR0 (0x072e / 2) +#define PCMCIA_ADDR1 (0x0730 / 2) +#define PCMCIA_ADDR2 (0x0732 / 2) + +#define MEM_SEG (0x0734 / 2) +#define SROM_CS (0x0736 / 2) +#define SROM_DATAL (0x0738 / 2) +#define SROM_DATAH (0x073a / 2) +#define SROM_ADDRL (0x073c / 2) +#define SROM_ADDRH (0x073e / 2) +#define SROM_INFO2 (0x0772 / 2) /* Corerev >= 2 && <= 5 */ +#define SROM_INFO (0x07be / 2) /* Corerev >= 6 */ + +/* Values for srom_cs: */ +#define SROM_IDLE 0 +#define SROM_WRITE 1 +#define SROM_READ 2 +#define SROM_WEN 4 +#define SROM_WDS 7 +#define SROM_DONE 8 + +/* Fields in srom_info: */ +#define SRI_SZ_MASK 0x03 +#define SRI_BLANK 0x04 +#define SRI_OTP 0x80 + +#if !defined(LINUX_POSTMOGRIFY_REMOVAL) +/* CIS stuff */ + +/* The CIS stops where the FCRs start */ +#define CIS_SIZE PCMCIA_FCR + +/* CIS tuple length field max */ +#define CIS_TUPLE_LEN_MAX 0xff + +/* Standard tuples we know about */ + +#define CISTPL_NULL 0x00 +#define CISTPL_VERS_1 0x15 /* CIS ver, manf, dev & ver strings */ +#define CISTPL_MANFID 0x20 /* Manufacturer and device id */ +#define CISTPL_FUNCID 0x21 /* Function identification */ +#define CISTPL_FUNCE 0x22 /* Function extensions */ +#define CISTPL_CFTABLE 0x1b /* Config table entry */ +#define CISTPL_END 0xff /* End of the CIS tuple chain */ + +/* Function identifier provides context for the function extentions tuple */ +#define CISTPL_FID_SDIO 0x0c /* Extensions defined by SDIO spec */ + +/* Function extensions for LANs (assumed for extensions other than SDIO) */ +#define LAN_TECH 1 /* Technology type */ +#define LAN_SPEED 2 /* Raw bit rate */ +#define LAN_MEDIA 3 /* Transmission media */ +#define LAN_NID 4 /* Node identification (aka MAC addr) */ +#define LAN_CONN 5 /* Connector standard */ + + +/* CFTable */ +#define CFTABLE_REGWIN_2K 0x08 /* 2k reg windows size */ +#define CFTABLE_REGWIN_4K 0x10 /* 4k reg windows size */ +#define CFTABLE_REGWIN_8K 0x20 /* 8k reg windows size */ + +/* Vendor unique tuples are 0x80-0x8f. Within Broadcom we'll + * take one for HNBU, and use "extensions" (a la FUNCE) within it. + */ + +#define CISTPL_BRCM_HNBU 0x80 + +/* Subtypes of BRCM_HNBU: */ + +#define HNBU_SROMREV 0x00 /* A byte with sromrev, 1 if not present */ +#define HNBU_CHIPID 0x01 /* Two 16bit values: PCI vendor & device id */ +#define HNBU_BOARDREV 0x02 /* One byte board revision */ +#define HNBU_PAPARMS 0x03 /* PA parameters: 8 (sromrev == 1) + * or 9 (sromrev > 1) bytes + */ +#define HNBU_OEM 0x04 /* Eight bytes OEM data (sromrev == 1) */ +#define HNBU_CC 0x05 /* Default country code (sromrev == 1) */ +#define HNBU_AA 0x06 /* Antennas available */ +#define HNBU_AG 0x07 /* Antenna gain */ +#define HNBU_BOARDFLAGS 0x08 /* board flags (2 or 4 bytes) */ +#define HNBU_LEDS 0x09 /* LED set */ +#define HNBU_CCODE 0x0a /* Country code (2 bytes ascii + 1 byte cctl) + * in rev 2 + */ +#define HNBU_CCKPO 0x0b /* 2 byte cck power offsets in rev 3 */ +#define HNBU_OFDMPO 0x0c /* 4 byte 11g ofdm power offsets in rev 3 */ +#define HNBU_GPIOTIMER 0x0d /* 2 bytes with on/off values in rev 3 */ +#define HNBU_PAPARMS5G 0x0e /* 5G PA params */ +#define HNBU_ANT5G 0x0f /* 4328 5G antennas available/gain */ +#define HNBU_RDLID 0x10 /* 2 byte USB remote downloader (RDL) product Id */ +#define HNBU_RSSISMBXA2G 0x11 /* 4328 2G RSSI mid pt sel & board switch arch, + * 2 bytes, rev 3. + */ +#define HNBU_RSSISMBXA5G 0x12 /* 4328 5G RSSI mid pt sel & board switch arch, + * 2 bytes, rev 3. + */ +#define HNBU_XTALFREQ 0x13 /* 4 byte Crystal frequency in kilohertz */ +#define HNBU_TRI2G 0x14 /* 4328 2G TR isolation, 1 byte */ +#define HNBU_TRI5G 0x15 /* 4328 5G TR isolation, 3 bytes */ +#define HNBU_RXPO2G 0x16 /* 4328 2G RX power offset, 1 byte */ +#define HNBU_RXPO5G 0x17 /* 4328 5G RX power offset, 1 byte */ +#define HNBU_BOARDNUM 0x18 /* board serial number, independent of mac addr */ +#define HNBU_MACADDR 0x19 /* mac addr override for the standard CIS LAN_NID */ +#define HNBU_RDLSN 0x1a /* 2 bytes; serial # advertised in USB descriptor */ +#define HNBU_BOARDTYPE 0x1b /* 2 bytes; boardtype */ +#define HNBU_LEDDC 0x1c /* 2 bytes; LED duty cycle */ +#define HNBU_HNBUCIS 0x1d /* what follows is proprietary HNBU CIS format */ +#define HNBU_PAPARMS_SSLPNPHY 0x1e /* SSLPNPHY PA params */ +#define HNBU_RSSISMBXA2G_SSLPNPHY 0x1f /* SSLPNPHY RSSI mid pt sel & board switch arch */ +#define HNBU_RDLRNDIS 0x20 /* 1 byte; 1 = RDL advertises RNDIS config */ +#define HNBU_CHAINSWITCH 0x21 /* 2 byte; txchain, rxchain */ +#define HNBU_REGREV 0x22 /* 1 byte; */ +#define HNBU_FEM 0x23 /* 2 or 4 byte: 11n frontend specification */ +#define HNBU_PAPARMS_C0 0x24 /* 8 or 30 bytes: 11n pa paramater for chain 0 */ +#define HNBU_PAPARMS_C1 0x25 /* 8 or 30 bytes: 11n pa paramater for chain 1 */ +#define HNBU_PAPARMS_C2 0x26 /* 8 or 30 bytes: 11n pa paramater for chain 2 */ +#define HNBU_PAPARMS_C3 0x27 /* 8 or 30 bytes: 11n pa paramater for chain 3 */ +#define HNBU_PO_CCKOFDM 0x28 /* 6 or 18 bytes: cck2g/ofdm2g/ofdm5g power offset */ +#define HNBU_PO_MCS2G 0x29 /* 8 bytes: mcs2g power offset */ +#define HNBU_PO_MCS5GM 0x2a /* 8 bytes: mcs5g mid band power offset */ +#define HNBU_PO_MCS5GLH 0x2b /* 16 bytes: mcs5g low-high band power offset */ +#define HNBU_PO_CDD 0x2c /* 2 bytes: cdd2g/5g power offset */ +#define HNBU_PO_STBC 0x2d /* 2 bytes: stbc2g/5g power offset */ +#define HNBU_PO_40M 0x2e /* 2 bytes: 40Mhz channel 2g/5g power offset */ +#define HNBU_PO_40MDUP 0x2f /* 2 bytes: 40Mhz channel dup 2g/5g power offset */ + +#define HNBU_RDLRWU 0x30 /* 1 byte; 1 = RDL advertises Remote Wake-up */ +#define HNBU_WPS 0x31 /* 1 byte; GPIO pin for WPS button */ +#define HNBU_USBFS 0x32 /* 1 byte; 1 = USB advertises FS mode only */ +#define HNBU_BRMIN 0x33 /* 4 byte bootloader min resource mask */ +#define HNBU_BRMAX 0x34 /* 4 byte bootloader max resource mask */ +#define HNBU_PATCH 0x35 /* bootloader patch addr(2b) & data(4b) pair */ +#define HNBU_CCKFILTTYPE 0x36 /* CCK digital filter selection options */ +#define HNBU_OFDMPO5G 0x37 /* 4 * 3 = 12 byte 11a ofdm power offsets in rev 3 */ +#define HNBU_ELNA2G 0x38 +#define HNBU_ELNA5G 0x39 +#define HNBU_TEMPTHRESH 0x3A /* 2 bytes + * byte1 tempthresh + * byte2 period(msb 4 bits) | hysterisis(lsb 4 bits) + */ +#define HNBU_UUID 0x3B /* 16 Bytes Hex */ + +#define HNBU_USBEPNUM 0x40 /* USB endpoint numbers */ + +/* POWER PER RATE for SROM V9 */ +#define HNBU_CCKBW202GPO 0x41 /* 2 bytes each + * CCK Power offsets for 20 MHz rates (11, 5.5, 2, 1Mbps) + * cckbw202gpo cckbw20ul2gpo + */ + +#define HNBU_LEGOFDMBW202GPO 0x42 /* 4 bytes each + * OFDM power offsets for 20 MHz Legacy rates + * (54, 48, 36, 24, 18, 12, 9, 6 Mbps) + * legofdmbw202gpo legofdmbw20ul2gpo + */ + +#define HNBU_LEGOFDMBW205GPO 0x43 /* 4 bytes each + * 5G band: OFDM power offsets for 20 MHz Legacy rates + * (54, 48, 36, 24, 18, 12, 9, 6 Mbps) + * low subband : legofdmbw205glpo legofdmbw20ul2glpo + * mid subband :legofdmbw205gmpo legofdmbw20ul2gmpo + * high subband :legofdmbw205ghpo legofdmbw20ul2ghpo + */ + +#define HNBU_MCS2GPO 0x44 /* 4 bytes each + * mcs 0-7 power-offset. LSB nibble: m0, MSB nibble: m7 + * mcsbw202gpo mcsbw20ul2gpo mcsbw402gpo + */ +#define HNBU_MCS5GLPO 0x45 /* 4 bytes each + * 5G low subband mcs 0-7 power-offset. + * LSB nibble: m0, MSB nibble: m7 + * mcsbw205glpo mcsbw20ul5glpo mcsbw405glpo + */ +#define HNBU_MCS5GMPO 0x46 /* 4 bytes each + * 5G mid subband mcs 0-7 power-offset. + * LSB nibble: m0, MSB nibble: m7 + * mcsbw205gmpo mcsbw20ul5gmpo mcsbw405gmpo + */ +#define HNBU_MCS5GHPO 0x47 /* 4 bytes each + * 5G high subband mcs 0-7 power-offset. + * LSB nibble: m0, MSB nibble: m7 + * mcsbw205ghpo mcsbw20ul5ghpo mcsbw405ghpo + */ +#define HNBU_MCS32PO 0x48 /* 2 bytes total + * mcs-32 power offset for each band/subband. + * LSB nibble: 2G band, MSB nibble: + * mcs322ghpo, mcs325gmpo, mcs325glpo, mcs322gpo + */ +#define HNBU_LEG40DUPPO 0x49 /* 2 bytes total + * Additional power offset for Legacy Dup40 transmissions. + * Applied in addition to legofdmbw20ulXpo, X=2g, 5gl, 5gm, or 5gh. + * LSB nibble: 2G band, MSB nibble: 5G band high subband. + * leg40dup5ghpo, leg40dup5gmpo, leg40dup5glpo, leg40dup2gpo + */ + +#define HNBU_PMUREGS 0x4a /* Variable length (5 bytes for each register) + * The setting of the ChipCtrl, PLL, RegulatorCtrl, Up/Down Timer and + * ResourceDependency Table registers. + */ + +#define HNBU_PATCH2 0x4b /* bootloader TCAM patch addr(4b) & data(4b) pair . + * This is required for socram rev 15 onwards. + */ + +#define HNBU_USBRDY 0x4c /* Variable length (upto 5 bytes) + * This is to indicate the USB/HSIC host controller + * that the device is ready for enumeration. + */ + +#define HNBU_USBREGS 0x4d /* Variable length + * The setting of the devcontrol, HSICPhyCtrl1 and HSICPhyCtrl2 + * registers during the USB initialization. + */ + +#define HNBU_BLDR_TIMEOUT 0x4e /* 2 bytes used for HSIC bootloader to reset chip + * on connect timeout. + * The Delay after USBConnect for timeout till dongle receives + * get_descriptor request. + */ +#define HNBU_USBFLAGS 0x4f +#define HNBU_PATCH_AUTOINC 0x50 +#define HNBU_MDIO_REGLIST 0x51 +#define HNBU_MDIOEX_REGLIST 0x52 +/* Unified OTP: tupple to embed USB manfid inside SDIO CIS */ +#define HNBU_UMANFID 0x53 +#define HNBU_PUBKEY 0x54 /* 128 byte; publick key to validate downloaded FW */ +#define HNBU_MUXENAB 0x56 /* 1 byte to enable mux options */ +#define HNBU_GCI_CCR 0x57 /* GCI Chip control register */ +#define HNBU_FEM_CFG 0x58 /* FEM config */ +#define HNBU_ACPA_C0 0x59 /* ACPHY PA parameters: chain 0 */ +#define HNBU_ACPA_C1 0x5a /* ACPHY PA parameters: chain 1 */ +#define HNBU_ACPA_C2 0x5b /* ACPHY PA parameters: chain 2 */ +#define HNBU_MEAS_PWR 0x5c +#define HNBU_PDOFF 0x5d +#define HNBU_ACPPR_2GPO 0x5e /* ACPHY Power-per-rate 2gpo */ +#define HNBU_ACPPR_5GPO 0x5f /* ACPHY Power-per-rate 5gpo */ +#define HNBU_ACPPR_SBPO 0x60 /* ACPHY Power-per-rate sbpo */ +#define HNBU_NOISELVL 0x61 +#define HNBU_RXGAIN_ERR 0x62 +#define HNBU_AGBGA 0x63 +#define HNBU_USBDESC_COMPOSITE 0x64 /* USB WLAN/BT composite descriptor */ +#define HNBU_PATCH_AUTOINC8 0x65 /* Auto increment patch entry for 8 byte patching */ +#define HNBU_PATCH8 0x66 /* Patch entry for 8 byte patching */ +#define HNBU_ACRXGAINS_C0 0x67 /* ACPHY rxgains: chain 0 */ +#define HNBU_ACRXGAINS_C1 0x68 /* ACPHY rxgains: chain 1 */ +#define HNBU_ACRXGAINS_C2 0x69 /* ACPHY rxgains: chain 2 */ +#define HNBU_TXDUTY 0x6a /* Tx duty cycle for ACPHY 5g 40/80 Mhz */ +#define HNBU_USBUTMI_CTL 0x6b /* 2 byte USB UTMI/LDO Control */ +#define HNBU_PDOFF_2G 0x6c +#define HNBU_USBSSPHY_UTMI_CTL0 0x6d /* 4 byte USB SSPHY UTMI Control */ +#define HNBU_USBSSPHY_UTMI_CTL1 0x6e /* 4 byte USB SSPHY UTMI Control */ +#define HNBU_USBSSPHY_UTMI_CTL2 0x6f /* 4 byte USB SSPHY UTMI Control */ +#define HNBU_USBSSPHY_SLEEP0 0x70 /* 2 byte USB SSPHY sleep */ +#define HNBU_USBSSPHY_SLEEP1 0x71 /* 2 byte USB SSPHY sleep */ +#define HNBU_USBSSPHY_SLEEP2 0x72 /* 2 byte USB SSPHY sleep */ +#define HNBU_USBSSPHY_SLEEP3 0x73 /* 2 byte USB SSPHY sleep */ +#define HNBU_USBSSPHY_MDIO 0x74 /* USB SSPHY INIT regs setting */ +#define HNBU_USB30PHY_NOSS 0x75 /* USB30 NO Super Speed */ +#define HNBU_USB30PHY_U1U2 0x76 /* USB30 PHY U1U2 Enable */ +#define HNBU_USB30PHY_REGS 0x77 /* USB30 PHY REGs update */ + +#define HNBU_SROM3SWRGN 0x80 /* 78 bytes; srom rev 3 s/w region without crc8 + * plus extra info appended. + */ +#define HNBU_RESERVED 0x81 /* Reserved for non-BRCM post-mfg additions */ + /* XXX Added for 'Olympic' OTP management */ +#define HNBU_CUSTOM1 0x82 /* 4 byte; For non-BRCM post-mfg additions */ +#define HNBU_CUSTOM2 0x83 /* Reserved; For non-BRCM post-mfg additions */ +#define HNBU_ACPAPARAM 0x84 /* ACPHY PAPARAM */ +#define HNBU_ACPA_CCK 0x86 /* ACPHY PA trimming parameters: CCK */ +#define HNBU_ACPA_40 0x87 /* ACPHY PA trimming parameters: 40 */ +#define HNBU_ACPA_80 0x88 /* ACPHY PA trimming parameters: 80 */ +#define HNBU_ACPA_4080 0x89 /* ACPHY PA trimming parameters: 40/80 */ +#define HNBU_SUBBAND5GVER 0x8a /* subband5gver */ +#define HNBU_PAPARAMBWVER 0x8b /* paparambwver */ + +/* XXX IMPORTANT XXX + * Please update CisTuples twiki page when you define new tuples + */ + +#endif /* !defined(LINUX_POSTMOGRIFY_REMOVAL) */ + +/* sbtmstatelow */ +#define SBTML_INT_ACK 0x40000 /* ack the sb interrupt */ +#define SBTML_INT_EN 0x20000 /* enable sb interrupt */ + +/* sbtmstatehigh */ +#define SBTMH_INT_STATUS 0x40000 /* sb interrupt status */ + +#endif /* _SBPCMCIA_H */ diff --git a/external/cache/sources/wl/include/sbpcmcia.h.orig b/external/cache/sources/wl/include/sbpcmcia.h.orig new file mode 100644 index 0000000..6ad98b5 --- /dev/null +++ b/external/cache/sources/wl/include/sbpcmcia.h.orig @@ -0,0 +1,108 @@ +/* + * BCM43XX Sonics SiliconBackplane PCMCIA core hardware definitions. + * + * Copyright (C) 1999-2012, Broadcom Corporation + * + * Unless you and Broadcom execute a separate written software license + * agreement governing use of this software, this software is licensed to you + * under the terms of the GNU General Public License version 2 (the "GPL"), + * available at http://www.broadcom.com/licenses/GPLv2.php, with the + * following added to such license: + * + * As a special exception, the copyright holders of this software give you + * permission to link this software with independent modules, and to copy and + * distribute the resulting executable under terms of your choice, provided that + * you also meet, for each linked independent module, the terms and conditions of + * the license of that module. An independent module is a module which is not + * derived from this software. The special exception does not apply to any + * modifications of the software. + * + * Notwithstanding the above, under no circumstances may you combine this + * software in any way with any other Broadcom software provided under a license + * other than the GPL, without Broadcom's express prior written consent. + * + * $Id: sbpcmcia.h 326494 2012-04-09 13:29:57Z $ + */ + +#ifndef _SBPCMCIA_H +#define _SBPCMCIA_H + + + + +#define PCMCIA_FCR (0x700 / 2) + +#define FCR0_OFF 0 +#define FCR1_OFF (0x40 / 2) +#define FCR2_OFF (0x80 / 2) +#define FCR3_OFF (0xc0 / 2) + +#define PCMCIA_FCR0 (0x700 / 2) +#define PCMCIA_FCR1 (0x740 / 2) +#define PCMCIA_FCR2 (0x780 / 2) +#define PCMCIA_FCR3 (0x7c0 / 2) + + + +#define PCMCIA_COR 0 + +#define COR_RST 0x80 +#define COR_LEV 0x40 +#define COR_IRQEN 0x04 +#define COR_BLREN 0x01 +#define COR_FUNEN 0x01 + + +#define PCICIA_FCSR (2 / 2) +#define PCICIA_PRR (4 / 2) +#define PCICIA_SCR (6 / 2) +#define PCICIA_ESR (8 / 2) + + +#define PCM_MEMOFF 0x0000 +#define F0_MEMOFF 0x1000 +#define F1_MEMOFF 0x2000 +#define F2_MEMOFF 0x3000 +#define F3_MEMOFF 0x4000 + + +#define MEM_ADDR0 (0x728 / 2) +#define MEM_ADDR1 (0x72a / 2) +#define MEM_ADDR2 (0x72c / 2) + + +#define PCMCIA_ADDR0 (0x072e / 2) +#define PCMCIA_ADDR1 (0x0730 / 2) +#define PCMCIA_ADDR2 (0x0732 / 2) + +#define MEM_SEG (0x0734 / 2) +#define SROM_CS (0x0736 / 2) +#define SROM_DATAL (0x0738 / 2) +#define SROM_DATAH (0x073a / 2) +#define SROM_ADDRL (0x073c / 2) +#define SROM_ADDRH (0x073e / 2) +#define SROM_INFO2 (0x0772 / 2) +#define SROM_INFO (0x07be / 2) + + +#define SROM_IDLE 0 +#define SROM_WRITE 1 +#define SROM_READ 2 +#define SROM_WEN 4 +#define SROM_WDS 7 +#define SROM_DONE 8 + + +#define SRI_SZ_MASK 0x03 +#define SRI_BLANK 0x04 +#define SRI_OTP 0x80 + + + +#define SBTML_INT_ACK 0x40000 +#define SBTML_INT_EN 0x20000 + + +#define SBTMH_INT_STATUS 0x40000 + +#endif diff --git a/external/cache/sources/wl/include/sbsdio.h b/external/cache/sources/wl/include/sbsdio.h new file mode 100644 index 0000000..631b1dd --- /dev/null +++ b/external/cache/sources/wl/include/sbsdio.h @@ -0,0 +1,161 @@ +/* + * SDIO device core hardware definitions. + * sdio is a portion of the pcmcia core in core rev 3 - rev 8 + * + * SDIO core support 1bit, 4 bit SDIO mode as well as SPI mode. + * + * $Copyright Open 2003 Broadcom Corporation$ + * + * $Id: sbsdio.h 241182 2011-02-17 21:50:03Z $ + */ + +#ifndef _SBSDIO_H +#define _SBSDIO_H + +#define SBSDIO_NUM_FUNCTION 3 /* as of sdiod rev 0, supports 3 functions */ + +/* function 1 miscellaneous registers */ +#define SBSDIO_SPROM_CS 0x10000 /* sprom command and status */ +#define SBSDIO_SPROM_INFO 0x10001 /* sprom info register */ +#define SBSDIO_SPROM_DATA_LOW 0x10002 /* sprom indirect access data byte 0 */ +#define SBSDIO_SPROM_DATA_HIGH 0x10003 /* sprom indirect access data byte 1 */ +#define SBSDIO_SPROM_ADDR_LOW 0x10004 /* sprom indirect access addr byte 0 */ +#define SBSDIO_SPROM_ADDR_HIGH 0x10005 /* sprom indirect access addr byte 0 */ +#define SBSDIO_CHIP_CTRL_DATA 0x10006 /* xtal_pu (gpio) output */ +#define SBSDIO_CHIP_CTRL_EN 0x10007 /* xtal_pu (gpio) enable */ +#define SBSDIO_WATERMARK 0x10008 /* rev < 7, watermark for sdio device */ +#define SBSDIO_DEVICE_CTL 0x10009 /* control busy signal generation */ + +/* registers introduced in rev 8, some content (mask/bits) defs in sbsdpcmdev.h */ +#define SBSDIO_FUNC1_SBADDRLOW 0x1000A /* SB Address Window Low (b15) */ +#define SBSDIO_FUNC1_SBADDRMID 0x1000B /* SB Address Window Mid (b23:b16) */ +#define SBSDIO_FUNC1_SBADDRHIGH 0x1000C /* SB Address Window High (b31:b24) */ +#define SBSDIO_FUNC1_FRAMECTRL 0x1000D /* Frame Control (frame term/abort) */ +#define SBSDIO_FUNC1_CHIPCLKCSR 0x1000E /* ChipClockCSR (ALP/HT ctl/status) */ +#define SBSDIO_FUNC1_SDIOPULLUP 0x1000F /* SdioPullUp (on cmd, d0-d2) */ +#define SBSDIO_FUNC1_WFRAMEBCLO 0x10019 /* Write Frame Byte Count Low */ +#define SBSDIO_FUNC1_WFRAMEBCHI 0x1001A /* Write Frame Byte Count High */ +#define SBSDIO_FUNC1_RFRAMEBCLO 0x1001B /* Read Frame Byte Count Low */ +#define SBSDIO_FUNC1_RFRAMEBCHI 0x1001C /* Read Frame Byte Count High */ + +#define SBSDIO_FUNC1_MISC_REG_START 0x10000 /* f1 misc register start */ +#define SBSDIO_FUNC1_MISC_REG_LIMIT 0x1001C /* f1 misc register end */ + +/* Sdio Core Rev 12 */ +#define SBSDIO_FUNC1_WAKEUPCTRL 0x1001E +#define SBSDIO_FUNC1_SLEEPCSR 0x1001F +#define SBSDIO_FUNC1_SLEEPCSR_KSO_MASK 0x1 +#define SBSDIO_FUNC1_SLEEPCSR_KSO_SHIFT 0 +#define SBSDIO_FUNC1_SLEEPCSR_KSO_EN 1 +#define SBSDIO_FUNC1_SLEEPCSR_DEVON_MASK 0x2 +#define SBSDIO_FUNC1_SLEEPCSR_DEVON_SHIFT 1 + +/* SBSDIO_SPROM_CS */ +#define SBSDIO_SPROM_IDLE 0 +#define SBSDIO_SPROM_WRITE 1 +#define SBSDIO_SPROM_READ 2 +#define SBSDIO_SPROM_WEN 4 +#define SBSDIO_SPROM_WDS 7 +#define SBSDIO_SPROM_DONE 8 + +/* SBSDIO_SPROM_INFO */ +#define SROM_SZ_MASK 0x03 /* SROM size, 1: 4k, 2: 16k */ +#define SROM_BLANK 0x04 /* depreciated in corerev 6 */ +#define SROM_OTP 0x80 /* OTP present */ + +/* SBSDIO_CHIP_CTRL */ +#define SBSDIO_CHIP_CTRL_XTAL 0x01 /* or'd with onchip xtal_pu, + * 1: power on oscillator + * (for 4318 only) + */ +/* SBSDIO_WATERMARK */ +#define SBSDIO_WATERMARK_MASK 0x7f /* number of words - 1 for sd device + * to wait before sending data to host + */ + +/* SBSDIO_DEVICE_CTL */ +#define SBSDIO_DEVCTL_SETBUSY 0x01 /* 1: device will assert busy signal when + * receiving CMD53 + */ +#define SBSDIO_DEVCTL_SPI_INTR_SYNC 0x02 /* 1: assertion of sdio interrupt is + * synchronous to the sdio clock + */ +#define SBSDIO_DEVCTL_CA_INT_ONLY 0x04 /* 1: mask all interrupts to host + * except the chipActive (rev 8) + */ +#define SBSDIO_DEVCTL_PADS_ISO 0x08 /* 1: isolate internal sdio signals, put + * external pads in tri-state; requires + * sdio bus power cycle to clear (rev 9) + */ +#define SBSDIO_DEVCTL_SB_RST_CTL 0x30 /* Force SD->SB reset mapping (rev 11) */ +#define SBSDIO_DEVCTL_RST_CORECTL 0x00 /* Determined by CoreControl bit */ +#define SBSDIO_DEVCTL_RST_BPRESET 0x10 /* Force backplane reset */ +#define SBSDIO_DEVCTL_RST_NOBPRESET 0x20 /* Force no backplane reset */ + + +/* SBSDIO_FUNC1_CHIPCLKCSR */ +#define SBSDIO_FORCE_ALP 0x01 /* Force ALP request to backplane */ +#define SBSDIO_FORCE_HT 0x02 /* Force HT request to backplane */ +#define SBSDIO_FORCE_ILP 0x04 /* Force ILP request to backplane */ +#define SBSDIO_ALP_AVAIL_REQ 0x08 /* Make ALP ready (power up xtal) */ +#define SBSDIO_HT_AVAIL_REQ 0x10 /* Make HT ready (power up PLL) */ +#define SBSDIO_FORCE_HW_CLKREQ_OFF 0x20 /* Squelch clock requests from HW */ +#define SBSDIO_ALP_AVAIL 0x40 /* Status: ALP is ready */ +#define SBSDIO_HT_AVAIL 0x80 /* Status: HT is ready */ +/* In rev8, actual avail bits followed original docs */ +#define SBSDIO_Rev8_HT_AVAIL 0x40 +#define SBSDIO_Rev8_ALP_AVAIL 0x80 + +#define SBSDIO_AVBITS (SBSDIO_HT_AVAIL | SBSDIO_ALP_AVAIL) +#define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS) +#define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS) +#define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval)) +#define SBSDIO_CLKAV(regval, alponly) (SBSDIO_ALPAV(regval) && \ + (alponly ? 1 : SBSDIO_HTAV(regval))) + +/* SBSDIO_FUNC1_SDIOPULLUP */ +#define SBSDIO_PULLUP_D0 0x01 /* Enable D0/MISO pullup */ +#define SBSDIO_PULLUP_D1 0x02 /* Enable D1/INT# pullup */ +#define SBSDIO_PULLUP_D2 0x04 /* Enable D2 pullup */ +#define SBSDIO_PULLUP_CMD 0x08 /* Enable CMD/MOSI pullup */ +#define SBSDIO_PULLUP_ALL 0x0f /* All valid bits */ + +/* function 1 OCP space */ +#define SBSDIO_SB_OFT_ADDR_MASK 0x07FFF /* sb offset addr is <= 15 bits, 32k */ +#define SBSDIO_SB_OFT_ADDR_LIMIT 0x08000 +#define SBSDIO_SB_ACCESS_2_4B_FLAG 0x08000 /* with b15, maps to 32-bit SB access */ + +/* some duplication with sbsdpcmdev.h here */ +/* valid bits in SBSDIO_FUNC1_SBADDRxxx regs */ +#define SBSDIO_SBADDRLOW_MASK 0x80 /* Valid bits in SBADDRLOW */ +#define SBSDIO_SBADDRMID_MASK 0xff /* Valid bits in SBADDRMID */ +#define SBSDIO_SBADDRHIGH_MASK 0xffU /* Valid bits in SBADDRHIGH */ +#define SBSDIO_SBWINDOW_MASK 0xffff8000 /* Address bits from SBADDR regs */ + +/* direct(mapped) cis space */ +#define SBSDIO_CIS_BASE_COMMON 0x1000 /* MAPPED common CIS address */ +#ifdef BCMSPI +#define SBSDIO_CIS_SIZE_LIMIT 0x100 /* maximum bytes in one spi CIS */ +#else +#define SBSDIO_CIS_SIZE_LIMIT 0x200 /* maximum bytes in one CIS */ +#endif /* !BCMSPI */ +#define SBSDIO_OTP_CIS_SIZE_LIMIT 0x078 /* maximum bytes OTP CIS */ + +#define SBSDIO_CIS_OFT_ADDR_MASK 0x1FFFF /* cis offset addr is < 17 bits */ + +#define SBSDIO_CIS_MANFID_TUPLE_LEN 6 /* manfid tuple length, include tuple, + * link bytes + */ + +/* indirect cis access (in sprom) */ +#define SBSDIO_SPROM_CIS_OFFSET 0x8 /* 8 control bytes first, CIS starts from + * 8th byte + */ + +#define SBSDIO_BYTEMODE_DATALEN_MAX 64 /* sdio byte mode: maximum length of one + * data comamnd + */ + +#define SBSDIO_CORE_ADDR_MASK 0x1FFFF /* sdio core function one address mask */ + +#endif /* _SBSDIO_H */ diff --git a/external/cache/sources/wl/include/sbsdioh.h b/external/cache/sources/wl/include/sbsdioh.h new file mode 100644 index 0000000..f7e7630 --- /dev/null +++ b/external/cache/sources/wl/include/sbsdioh.h @@ -0,0 +1,310 @@ +/* + * BRCM SDIOH (host controller) core hardware definitions. + * + * SDIOH support 1bit, 4 bit SDIO mode as well as SPI mode. + * + * $Id: sbsdioh.h 241182 2011-02-17 21:50:03Z gmo $ + * Copyright(c) 2003 Broadcom Corporation + */ + +#ifndef _SBSDIOH_H +#define _SBSDIOH_H + +/* cpp contortions to concatenate w/arg prescan */ +#ifndef PAD +#define _PADLINE(line) pad ## line +#define _XSTR(line) _PADLINE(line) +#define PAD _XSTR(__LINE__) +#endif /* PAD */ + +typedef volatile struct { + uint32 devcontrol; /* device control */ + uint32 PAD[15]; /* PADDING old codec registers */ + + /* sdioh registers */ + uint32 mode; /* 0x40: sd mode: SDIO1/SDIO4/SPI */ + uint32 delay; /* 0x44: various clock config */ + uint32 rdto; /* 0x48: read timeout value before SDERROR.ReadTimeOut + * is generated + */ + uint32 rbto; /* 0x4c: response busy timeout value before SDERROR.BusyTimeOut + * is generated + */ + uint32 test; /* 0x50: test register to force bad CRC */ + uint32 arvm; /* 0x54: auto response value and mask */ + + uint32 error; /* 0x58: Error */ + uint32 errormask; /* 0x5c: Error mask */ + uint32 cmddat; /* 0x60: SDIO CMD data */ + uint32 cmdl; /* 0x64: SDIO CMD argument */ + uint32 fifodata; /* 0x68: SDIO fifo data, little endian, changable + * in mode register + */ + uint32 respq; /* 0x6c: response queue */ + + uint32 ct_cmddat; /* 0x70: SDIO CMD data for cutthrough commands */ + uint32 ct_cmdl; /* 0x74: SDIO CMD argument for cutthrough commands */ + uint32 ct_fifodata; /* 0x78: SDIO fifo data for cutthrough commands, + * little endian only + */ + uint32 PAD; + + uint32 ap_cmddat; /* 0x80: SDIO CMD data for append commands */ + uint32 ap_cmdl; /* 0x84: SDIO CMD argument for append commands */ + uint32 ap_fifodata; /* 0x88: SDIO fifo data for append commands, little endian only */ + uint32 PAD; + + uint32 intstatus; /* 0x90: interrupt status */ + uint32 intmask; /* 0x94: interrupt mask */ + uint32 PAD; + + uint32 debuginfo; /* 0x9c: debug register */ + uint32 fifoctl; /* 0xa0: fifo control */ + uint32 blocksize; /* 0xa4: cmd53 block mode block size */ + + uint32 PAD[86]; + + dma32regp_t dmaregs; /* 0x200 - 0x21C */ + +} sdioh_regs_t; + +/* devcontrol */ +#define CODEC_DEVCTRL_SDIOH 0x4000 /* 1: config codec to SDIOH mode, + * 0: normal codec mode + */ + +/* mode */ +#define MODE_DONT_WAIT_DMA 0x2000 /* diag only: in receive DMA mode, Cmdatadone + * will be generated when data transfer done + */ +#define MODE_BIG_ENDIAN 0x1000 /* 1: big endian, 0: small endian */ +#define MODE_STOP_ALL_CLK 0x0800 /* diag only: 1: stop all SD clock */ +#define MODE_PRECMD_CNT_EN 0x0400 /* 1: enable precmd count, + * 0: disable precmd count + */ +#define MODE_CLK_OUT_EN 0x0200 /* 0/1: en/disable the clock output to sdio bus */ +#define MODE_USE_EXT_CLK 0x0100 /* use external clock or not */ +#define MODE_CLK_DIV_MASK 0x00f0 /* divide host clock by 2*this field */ +#define MODE_OP_MASK 0x000f /* mode is [3:0] bits */ +#define MODE_OP_SDIO4BIT 2 /* SDIO 4 bit mode */ +#define MODE_OP_SDIO1BIT 1 /* SDIO 1 bit mode */ +#define MODE_OP_SPI 0 /* SPI mode */ +#define MODE_HIGHSPEED_EN 0x10000 /* Enable High-Speed clocking Mode. */ + +/* delay */ +#define DLY_CLK_COUNT_PRE_M 0x0000ffff /* dynamic clock: pre clock on cycles before tx */ +#define DLY_CLK_COUNT_PRE_O 0 +#define DLY_TX_START_COUNT_M 0xffff0000 /* DMA mode only: wait cycle before transferring + * non-empty fifo + */ +#define DLY_TX_START_COUNT_O 23 + +/* test */ +#define TEST_BAD_CMD_CRC 0x1 /* force bad CMD crc */ +#define TEST_BAD_DAT_CRC 0x2 /* force bad DAT crc */ + +/* arvm */ +#define AR_MASK_OFT 8 /* CMD53 auto response mask */ +#define AR_VAL 0x00ff /* CMD53 expected value of auto response, + * after mask + */ + +/* cmd dat */ +#define CMDAT_INDEX_M 0x0000003f /* command index */ +#define CMDAT_EXP_RSPTYPE_M 0x000001c0 /* expected response type */ +#define CMDAT_EXP_RSPTYPE_O 6 +#define CMDAT_DAT_EN_M 0x00000200 /* data command flag */ +#define CMDAT_DAT_EN_O 9 +#define CMDAT_DAT_WR_M 0x00000400 /* 0: read from SD device, + * 1: write to SD device + */ +#define CMDAT_DAT_WR_O 10 +#define CMDAT_DMA_MODE_M 0x00000800 /* 0: pio, 1: dma */ +#define CMDAT_DMA_MODE_O 11 +#define CMDAT_ARC_EN_M 0x00001000 /* auto response check enable/disable */ +#define CMDAT_ARC_EN_O 12 +#define CMDAT_EXP_BUSY_M 0x00002000 /* R1b only: expect busy after response */ +#define CMDAT_EXP_BUSY_O 13 +#define CMDAT_NO_RSP_CRC_CHK_M 0x00004000 /* disable response crc checking */ +#define CMDAT_NO_RSP_CRC_CHK_O 14 +#define CMDAT_NO_RSP_CDX_CHK_M 0x00008000 /* disable response command index checking */ +#define CMDAT_NO_RSP_CDX_CHK_O 15 +#define CMDAT_DAT_TX_CNT_M 0x1fff0000 /* total number of bytes to transfer */ +#define CMDAT_DAT_TX_CNT_O 16 +#define CMDAT_DATLEN_PIO 64 /* data length limit for pio mode */ +#define CMDAT_DATLEN_DMA_NON53 512 /* data length limit for DMA mode non cmd53 */ +#define CMDAT_DATLEN_DMA_53 8096 /* data length limit for DMA mode cmd53 */ +#define CMDAT_APPEND_EN_M 0x20000000 /* enable sdioh to append a command */ +#define CMDAT_APPEND_EN_O 29 +#define CMDAT_ABORT_M 0x40000000 /* abort data */ +#define CMDAT_ABORT_O 30 +#define CMDAT_BLK_EN_M 0x80000000 /* use block mode */ +#define CMDAT_BLK_EN_O 31 + +/* error and error_mask */ +#define ERROR_RSP_CRC 0x0001 /* response crc error */ +#define ERROR_RSP_TIME 0x0002 /* response time error */ +#define ERROR_RSP_DBIT 0x0004 /* response D bit error */ +#define ERROR_RSP_EBIT 0x0008 /* response E bit error */ +#define ERROR_DAT_CRC 0x0010 /* data r/w crc error */ +#define ERROR_DAT_SBIT 0x0020 /* receive data START bir error */ +#define ERROR_DAT_EBIT 0x0040 /* receive data END bit error */ +#define ERROR_DAT_RSP_S 0x0080 /* data crc response START bit error */ +#define ERROR_DAT_RSP_E 0x0100 /* data crc response END bit error */ +#define ERROR_DAT_RSP_UNKNOWN 0x0200 /* data response unknown, not 101 or 010 */ +#define ERROR_DAT_RSP_TURNARD 0x0400 /* no 2 turnaround cycle between WRITE and + * CRC reponse + */ +#define ERROR_DAT_READ_TO 0x0800 /* data read timeout */ +#define ERROR_SPI_TOKEN_UNK 0x1000 /* SPI token unknown */ +#define ERROR_SPI_TOKEN_BAD 0x2000 /* SPI error token received */ +#define ERROR_SPI_ET_OUTRANGE 0x4000 /* SPI error token: out of range */ +#define ERROR_SPI_ET_ECC 0x8000 /* SPI error token: ECC failed */ +#define ERROR_SPI_ET_CC 0x010000 /* SPI error token: cc error */ +#define ERROR_SPI_ET_ERR 0x020000 /* SPI error token: error */ +#define ERROR_AUTO_RSP_CHK 0x040000 /* auto response check error */ +#define ERROR_RSP_BUSY_TO 0x080000 /* busy timeout for RBTO */ +#define ERROR_RSP_CMDIDX_BAD 0x100000 /* response command index error */ + +/* intstatus and intmask */ +#define INT_CMD_DAT_DONE 0x0001 /* sticky, sdio command/data xfer done */ +#define INT_HOST_BUSY 0x0002 /* host busy */ +#define INT_DEV_INT 0x0004 /* sdio card interrupt recieved */ +#define INT_ERROR_SUM 0x0008 /* logic OR of Error register masked by ErrorMask */ +#define INT_CARD_INS 0x0010 /* card inserted */ +#define INT_CARD_GONE 0x0020 /* card removed */ +#define INT_CMDBUSY_CUTTHRU 0x0040 /* sdioh is busy writing to cmdl_cutthru register */ +#define INT_CMDBUSY_APPEND 0x0080 /* this bit is clear when writing cmdl, + * and set when APPEND starts + */ +#define INT_CARD_PRESENT 0x0100 /* card is present */ +#define INT_STD_PCI_DESC 0x0400 /* standard DMA engine definition */ +#define INT_STD_PCI_DATA 0x0800 /* standard DMA engine definition */ +#define INT_STD_DESC_ERR 0x1000 /* standard DMA engine definition */ +#define INT_STD_RCV_DESC_UF 0x2000 /* standard DMA engine definition */ +#define INT_STD_RCV_FIFO_OF 0x4000 /* standard DMA engine definition */ +#define INT_STD_XMT_FIFO_UF 0x8000 /* standard DMA engine definition */ +#define INT_RCV_INT 0x00010000 /* standard DMA engine definition */ +#define INT_XMT_INT 0x01000000 /* standard DMA engine definition */ + +/* debuginfo */ +#define DBGI_REMAIN_COUNT 0x00001fff /* remaining count for data comand, + * change on the fly + */ +#define DBGI_CUR_ADDR 0xCfffE000 /* current address of CDM53 */ +#define DBGI_CARD_WASBUSY 0x40000000 /* receive card busy signal on data line */ +#define DBGI_R1B_DETECTED 0x80000000 /* R1B detected, overwritten by next cmd's status */ + +/* fifoctl(rcv/xmt) */ +#define FIFO_RCV_BUF_RDY 0x10 /* HW set 1 when data are ready and avaiable in + * FIFO, write 1 before read RCVFIFODATA + */ +#define FIFO_XMT_BYTE_VALID 0x0f /* which bit is valid in all subsequent writes to + * xmtfifodata + */ +#define FIFO_VALID_BYTE1 0x01 /* byte 0 valid */ +#define FIFO_VALID_BYTE2 0x02 /* byte 1 valid */ +#define FIFO_VALID_BYTE3 0x04 /* byte 2 valid */ +#define FIFO_VALID_BYTE4 0x08 /* byte 3 valid */ +#define FIFO_VALID_ALL 0x0f /* all four bytes are valid */ + +#define SDIOH_MODE_PIO 0 /* pio mode */ +#define SDIOH_MODE_DMA 1 /* dma mode */ + +#define SDIOH_CMDTYPE_NORMAL 0 /* normal command */ +#define SDIOH_CMDTYPE_APPEND 1 /* append command */ +#define SDIOH_CMDTYPE_CUTTHRU 2 /* cut through command */ + +#define SDIOH_DMA_START_EARLY 0 +#define SDIOH_DMA_START_LATE 1 + +#define SDIOH_DMA_TX 1 +#define SDIOH_DMA_RX 2 + +#define SDIOH_BLOCK_SIZE_MIN 4 +#define SDIOH_BLOCK_SIZE_MAX 0x200 + +#define SDIOH_SB_ENUM_OFFSET 0x1000 /* sdioh-codec core SB address inside pci-sdioh + * controller + */ + +#define SDIOH_HOST_SUPPORT_OCR 0xfff000 /* supported OCR by host controller */ + +#define RESP_TYPE_NONE 0 +#define RESP_TYPE_R1 1 +#define RESP_TYPE_R2 2 +#define RESP_TYPE_R3 3 +#define RESP_TYPE_R4 4 +#define RESP_TYPE_R5 5 +#define RESP_TYPE_R6 6 + +/* SDCMDAT Register */ +#define SDIOH_CMD_INDEX_M BITFIELD_MASK(6) /* Bits [5:0] - Command number */ +#define SDIOH_CMD_INDEX_S 0 +#define SDIOH_CMD_RESP_TYPE_M BITFIELD_MASK(3) /* Bits [8:6] - Response type */ +#define SDIOH_CMD_RESP_TYPE_S 6 +#define SDIOH_CMD_DATA_EN_M BITFIELD_MASK(1) /* Bit 9 - Using DAT line */ +#define SDIOH_CMD_DATA_EN_S 9 + +#define SDIOH_CMD_DATWR_M BITFIELD_MASK(1) /* Bit 10 - Data Write */ +#define SDIOH_CMD_DATWR_S 10 +#define SDIOH_CMD_DMAMODE_M BITFIELD_MASK(1) /* Bit 11 - DMA Mode */ +#define SDIOH_CMD_DMAMODE_S 11 +#define SDIOH_CMD_ARC_EN_M BITFIELD_MASK(1) /* Bit 12 - Auto Response Checking */ +#define SDIOH_CMD_ARC_EN_S 12 +#define SDIOH_CMD_EXP_BSY_M BITFIELD_MASK(1) /* Bit 13 - Expect Busy (R1b) */ +#define SDIOH_CMD_EXP_BSY_S 13 + +#define SDIOH_CMD_CRC_DIS_M BITFIELD_MASK(1) /* Bit 14 - CRC disable */ +#define SDIOH_CMD_CRC_DIS_S 14 +#define SDIOH_CMD_INDEX_DIS_M BITFIELD_MASK(1) /* Bit 15 - Disable index checking */ +#define SDIOH_CMD_INDEX_DIS_S 15 + +#define SDIOH_CMD_TR_COUNT_M BITFIELD_MASK(13) /* Bits [28:16] - Transfer Count */ +#define SDIOH_CMD_TR_COUNT_S 16 + +#define SDIOH_CMD_APPEND_EN_M BITFIELD_MASK(1) /* Bit 29 - Append enable */ +#define SDIOH_CMD_APPEND_EN_S 29 +#define SDIOH_CMD_ABORT_EN_M BITFIELD_MASK(1) /* Bit 30 - Abort enable */ +#define SDIOH_CMD_ABORT_EN_S 30 +#define SDIOH_CMD_BLKMODE_EN_M BITFIELD_MASK(1) /* Bit 31 - Blockmode enable */ +#define SDIOH_CMD_BLKMODE_EN_S 31 + + +/* intstatus and intmask */ +#define INT_CMD_DAT_DONE_M BITFIELD_MASK(1) /* Bit 0: sticky, + * sdio command/data xfer done + */ +#define INT_CMD_DAT_DONE_S 0 +#define INT_HOST_BUSY_M BITFIELD_MASK(1) /* Bit 1: host busy */ +#define INT_HOST_BUSY_S 1 +#define INT_DEV_INT_M BITFIELD_MASK(1) /* Bit 2: sdio dev interrupt recieved */ +#define INT_DEV_INT_S 2 +#define INT_ERROR_SUM_M BITFIELD_MASK(1) /* Bit 3: OR of Error reg + * masked by ErrorMask + */ +#define INT_ERROR_SUM_S 3 +#define INT_CARD_INS_M BITFIELD_MASK(1) /* Bit 4: dev inserted */ +#define INT_CARD_INS_S 4 +#define INT_CARD_GONE_M BITFIELD_MASK(1) /* Bit 5: dev removed */ +#define INT_CARD_GONE_S 5 +#define INT_CMDBUSY_CUTTHRU_M BITFIELD_MASK(1) /* sdioh is busy writing to cmdl_cutthru reg + */ +#define INT_CMDBUSY_CUTTHRU_S 6 +#define INT_CMDBUSY_APPEND_M BITFIELD_MASK(1) /* this bit is clear when writing cmdl, */ +#define INT_CMDBUSY_APPEND_S 7 /* and set when APPEND starts */ + +#define INT_RCV_INT_M BITFIELD_MASK(1) /* Receive DMA Interrupt */ +#define INT_RCV_INT_S 16 +#define INT_XMT_INT_M BITFIELD_MASK(1) /* Transmit DMA Interrupt */ +#define INT_XMT_INT_S 24 + + +/* SDBLOCK Register */ +#define SDBLOCK_M BITFIELD_MASK(10) /* Bits [9:0] Blocksize */ +#define SDBLOCK_S 0 + +#define SD1_MODE 0x1 /* SD Host Cntrlr Spec */ +#define SD4_MODE 0x2 /* SD Host Cntrlr Spec */ + +#endif /* _SBSDIOH_H */ diff --git a/external/cache/sources/wl/include/sbsdpcmdev.h b/external/cache/sources/wl/include/sbsdpcmdev.h new file mode 100644 index 0000000..8f48ca4 --- /dev/null +++ b/external/cache/sources/wl/include/sbsdpcmdev.h @@ -0,0 +1,286 @@ +/* + * Broadcom SiliconBackplane SDIO/PCMCIA hardware-specific + * device core support + * + * $Copyright Open 2005 Broadcom Corporation$ + * + * $Id: sbsdpcmdev.h 391685 2013-03-19 03:39:02Z $ + */ + +#ifndef _sbsdpcmdev_h_ +#define _sbsdpcmdev_h_ + +/* cpp contortions to concatenate w/arg prescan */ +#ifndef PAD +#define _PADLINE(line) pad ## line +#define _XSTR(line) _PADLINE(line) +#define PAD _XSTR(__LINE__) +#endif /* PAD */ + + +typedef volatile struct { + dma64regs_t xmt; /* dma tx */ + uint32 PAD[2]; + dma64regs_t rcv; /* dma rx */ + uint32 PAD[2]; +} dma64p_t; + +/* dma64 sdiod corerev >= 1 */ +typedef volatile struct { + dma64p_t dma64regs[2]; + dma64diag_t dmafifo; /* DMA Diagnostic Regs, 0x280-0x28c */ + uint32 PAD[92]; +} sdiodma64_t; + +/* dma32 sdiod corerev == 0 */ +typedef volatile struct { + dma32regp_t dma32regs[2]; /* dma tx & rx, 0x200-0x23c */ + dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x240-0x24c */ + uint32 PAD[108]; +} sdiodma32_t; + +/* dma32 regs for pcmcia core */ +typedef volatile struct { + dma32regp_t dmaregs; /* DMA Regs, 0x200-0x21c, rev8 */ + dma32diag_t dmafifo; /* DMA Diagnostic Regs, 0x220-0x22c */ + uint32 PAD[116]; +} pcmdma32_t; + +/* core registers */ +typedef volatile struct { + uint32 corecontrol; /* CoreControl, 0x000, rev8 */ + uint32 corestatus; /* CoreStatus, 0x004, rev8 */ + uint32 PAD[1]; + uint32 biststatus; /* BistStatus, 0x00c, rev8 */ + + /* PCMCIA access */ + uint16 pcmciamesportaladdr; /* PcmciaMesPortalAddr, 0x010, rev8 */ + uint16 PAD[1]; + uint16 pcmciamesportalmask; /* PcmciaMesPortalMask, 0x014, rev8 */ + uint16 PAD[1]; + uint16 pcmciawrframebc; /* PcmciaWrFrameBC, 0x018, rev8 */ + uint16 PAD[1]; + uint16 pcmciaunderflowtimer; /* PcmciaUnderflowTimer, 0x01c, rev8 */ + uint16 PAD[1]; + + /* interrupt */ + uint32 intstatus; /* IntStatus, 0x020, rev8 */ + uint32 hostintmask; /* IntHostMask, 0x024, rev8 */ + uint32 intmask; /* IntSbMask, 0x028, rev8 */ + uint32 sbintstatus; /* SBIntStatus, 0x02c, rev8 */ + uint32 sbintmask; /* SBIntMask, 0x030, rev8 */ + uint32 funcintmask; /* SDIO Function Interrupt Mask, SDIO rev4 */ + uint32 PAD[2]; + uint32 tosbmailbox; /* ToSBMailbox, 0x040, rev8 */ + uint32 tohostmailbox; /* ToHostMailbox, 0x044, rev8 */ + uint32 tosbmailboxdata; /* ToSbMailboxData, 0x048, rev8 */ + uint32 tohostmailboxdata; /* ToHostMailboxData, 0x04c, rev8 */ + + /* synchronized access to registers in SDIO clock domain */ + uint32 sdioaccess; /* SdioAccess, 0x050, rev8 */ + uint32 PAD[3]; + + /* PCMCIA frame control */ + uint8 pcmciaframectrl; /* pcmciaFrameCtrl, 0x060, rev8 */ + uint8 PAD[3]; + uint8 pcmciawatermark; /* pcmciaWaterMark, 0x064, rev8 */ + uint8 PAD[155]; + + /* interrupt batching control */ + uint32 intrcvlazy; /* IntRcvLazy, 0x100, rev8 */ + uint32 PAD[3]; + + /* counters */ + uint32 cmd52rd; /* Cmd52RdCount, 0x110, rev8, SDIO: cmd52 reads */ + uint32 cmd52wr; /* Cmd52WrCount, 0x114, rev8, SDIO: cmd52 writes */ + uint32 cmd53rd; /* Cmd53RdCount, 0x118, rev8, SDIO: cmd53 reads */ + uint32 cmd53wr; /* Cmd53WrCount, 0x11c, rev8, SDIO: cmd53 writes */ + uint32 abort; /* AbortCount, 0x120, rev8, SDIO: aborts */ + uint32 datacrcerror; /* DataCrcErrorCount, 0x124, rev8, SDIO: frames w/bad CRC */ + uint32 rdoutofsync; /* RdOutOfSyncCount, 0x128, rev8, SDIO/PCMCIA: Rd Frm OOS */ + uint32 wroutofsync; /* RdOutOfSyncCount, 0x12c, rev8, SDIO/PCMCIA: Wr Frm OOS */ + uint32 writebusy; /* WriteBusyCount, 0x130, rev8, SDIO: dev asserted "busy" */ + uint32 readwait; /* ReadWaitCount, 0x134, rev8, SDIO: read: no data avail */ + uint32 readterm; /* ReadTermCount, 0x138, rev8, SDIO: rd frm terminates */ + uint32 writeterm; /* WriteTermCount, 0x13c, rev8, SDIO: wr frm terminates */ + uint32 PAD[40]; + uint32 clockctlstatus; /* ClockCtlStatus, 0x1e0, rev8 */ + uint32 PAD[7]; + + /* DMA engines */ + volatile union { + pcmdma32_t pcm32; + sdiodma32_t sdiod32; + sdiodma64_t sdiod64; + } dma; + + /* SDIO/PCMCIA CIS region */ + char cis[512]; /* 512 byte CIS, 0x400-0x5ff, rev6 */ + + /* PCMCIA function control registers */ + char pcmciafcr[256]; /* PCMCIA FCR, 0x600-6ff, rev6 */ + uint16 PAD[55]; + + /* PCMCIA backplane access */ + uint16 backplanecsr; /* BackplaneCSR, 0x76E, rev6 */ + uint16 backplaneaddr0; /* BackplaneAddr0, 0x770, rev6 */ + uint16 backplaneaddr1; /* BackplaneAddr1, 0x772, rev6 */ + uint16 backplaneaddr2; /* BackplaneAddr2, 0x774, rev6 */ + uint16 backplaneaddr3; /* BackplaneAddr3, 0x776, rev6 */ + uint16 backplanedata0; /* BackplaneData0, 0x778, rev6 */ + uint16 backplanedata1; /* BackplaneData1, 0x77a, rev6 */ + uint16 backplanedata2; /* BackplaneData2, 0x77c, rev6 */ + uint16 backplanedata3; /* BackplaneData3, 0x77e, rev6 */ + uint16 PAD[31]; + + /* sprom "size" & "blank" info */ + uint16 spromstatus; /* SPROMStatus, 0x7BE, rev2 */ + + uint16 PAD[32]; + uint32 f3corectl; /* F3(BT) Core control, 0x800, rev8 */ + uint32 f3corestatus; /* F3 Core Status, 0x804, rev8 */ + uint32 f3intstatus; /* F3 Interrupt Status, 0x808, rev8 */ + uint32 btinten; /* Bt interrupt enable, 0x80c, rev8 */ + uint32 PAD[9]; + uint32 btintrcvlazy; + uint32 PAD[430]; + /* Sonics SiliconBackplane registers */ + sbconfig_t sbconfig; /* SbConfig Regs, 0xf00-0xfff, rev8 */ +} sdpcmd_regs_t; + +/* corecontrol */ +#define CC_CISRDY (1 << 0) /* CIS Ready */ +#define CC_BPRESEN (1 << 1) /* CCCR RES signal causes backplane reset */ +#define CC_F2RDY (1 << 2) /* set CCCR IOR2 bit */ +#define CC_CLRPADSISO (1 << 3) /* clear SDIO pads isolation bit (rev 11) */ +#define CC_XMTDATAAVAIL_MODE (1 << 4) /* data avail generates an interrupt */ +#define CC_XMTDATAAVAIL_CTRL (1 << 5) /* data avail interrupt ctrl */ + +/* corestatus */ +#define CS_PCMCIAMODE (1 << 0) /* Device Mode; 0=SDIO, 1=PCMCIA */ +#define CS_SMARTDEV (1 << 1) /* 1=smartDev enabled */ +#define CS_F2ENABLED (1 << 2) /* 1=host has enabled the device */ + +#define PCMCIA_MES_PA_MASK 0x7fff /* PCMCIA Message Portal Address Mask */ +#define PCMCIA_MES_PM_MASK 0x7fff /* PCMCIA Message Portal Mask Mask */ +#define PCMCIA_WFBC_MASK 0xffff /* PCMCIA Write Frame Byte Count Mask */ +#define PCMCIA_UT_MASK 0x07ff /* PCMCIA Underflow Timer Mask */ + +/* intstatus */ +#define I_SMB_SW0 (1 << 0) /* To SB Mail S/W interrupt 0 */ +#define I_SMB_SW1 (1 << 1) /* To SB Mail S/W interrupt 1 */ +#define I_SMB_SW2 (1 << 2) /* To SB Mail S/W interrupt 2 */ +#define I_SMB_SW3 (1 << 3) /* To SB Mail S/W interrupt 3 */ +#define I_SMB_SW_MASK 0x0000000f /* To SB Mail S/W interrupts mask */ +#define I_SMB_SW_SHIFT 0 /* To SB Mail S/W interrupts shift */ +#define I_HMB_SW0 (1 << 4) /* To Host Mail S/W interrupt 0 */ +#define I_HMB_SW1 (1 << 5) /* To Host Mail S/W interrupt 1 */ +#define I_HMB_SW2 (1 << 6) /* To Host Mail S/W interrupt 2 */ +#define I_HMB_SW3 (1 << 7) /* To Host Mail S/W interrupt 3 */ +#define I_HMB_SW_MASK 0x000000f0 /* To Host Mail S/W interrupts mask */ +#define I_HMB_SW_SHIFT 4 /* To Host Mail S/W interrupts shift */ +#define I_WR_OOSYNC (1 << 8) /* Write Frame Out Of Sync */ +#define I_RD_OOSYNC (1 << 9) /* Read Frame Out Of Sync */ +#define I_PC (1 << 10) /* descriptor error */ +#define I_PD (1 << 11) /* data error */ +#define I_DE (1 << 12) /* Descriptor protocol Error */ +#define I_RU (1 << 13) /* Receive descriptor Underflow */ +#define I_RO (1 << 14) /* Receive fifo Overflow */ +#define I_XU (1 << 15) /* Transmit fifo Underflow */ +#define I_RI (1 << 16) /* Receive Interrupt */ +#define I_BUSPWR (1 << 17) /* SDIO Bus Power Change (rev 9) */ +#define I_XMTDATA_AVAIL (1 << 23) /* bits in fifo */ +#define I_XI (1 << 24) /* Transmit Interrupt */ +#define I_RF_TERM (1 << 25) /* Read Frame Terminate */ +#define I_WF_TERM (1 << 26) /* Write Frame Terminate */ +#define I_PCMCIA_XU (1 << 27) /* PCMCIA Transmit FIFO Underflow */ +#define I_SBINT (1 << 28) /* sbintstatus Interrupt */ +#define I_CHIPACTIVE (1 << 29) /* chip transitioned from doze to active state */ +#define I_SRESET (1 << 30) /* CCCR RES interrupt */ +#define I_IOE2 (1U << 31) /* CCCR IOE2 Bit Changed */ +#define I_ERRORS (I_PC | I_PD | I_DE | I_RU | I_RO | I_XU) /* DMA Errors */ +#define I_DMA (I_RI | I_XI | I_ERRORS) + +/* sbintstatus */ +#define I_SB_SERR (1 << 8) /* Backplane SError (write) */ +#define I_SB_RESPERR (1 << 9) /* Backplane Response Error (read) */ +#define I_SB_SPROMERR (1 << 10) /* Error accessing the sprom */ + +/* sdioaccess */ +#define SDA_DATA_MASK 0x000000ff /* Read/Write Data Mask */ +#define SDA_ADDR_MASK 0x000fff00 /* Read/Write Address Mask */ +#define SDA_ADDR_SHIFT 8 /* Read/Write Address Shift */ +#define SDA_WRITE 0x01000000 /* Write bit */ +#define SDA_READ 0x00000000 /* Write bit cleared for Read */ +#define SDA_BUSY 0x80000000 /* Busy bit */ + +/* sdioaccess-accessible register address spaces */ +#define SDA_CCCR_SPACE 0x000 /* sdioAccess CCCR register space */ +#define SDA_F1_FBR_SPACE 0x100 /* sdioAccess F1 FBR register space */ +#define SDA_F2_FBR_SPACE 0x200 /* sdioAccess F2 FBR register space */ +#define SDA_F1_REG_SPACE 0x300 /* sdioAccess F1 core-specific register space */ + +/* SDA_F1_REG_SPACE sdioaccess-accessible F1 reg space register offsets */ +#define SDA_CHIPCONTROLDATA 0x006 /* ChipControlData */ +#define SDA_CHIPCONTROLENAB 0x007 /* ChipControlEnable */ +#define SDA_F2WATERMARK 0x008 /* Function 2 Watermark */ +#define SDA_DEVICECONTROL 0x009 /* DeviceControl */ +#define SDA_SBADDRLOW 0x00a /* SbAddrLow */ +#define SDA_SBADDRMID 0x00b /* SbAddrMid */ +#define SDA_SBADDRHIGH 0x00c /* SbAddrHigh */ +#define SDA_FRAMECTRL 0x00d /* FrameCtrl */ +#define SDA_CHIPCLOCKCSR 0x00e /* ChipClockCSR */ +#define SDA_SDIOPULLUP 0x00f /* SdioPullUp */ +#define SDA_SDIOWRFRAMEBCLOW 0x019 /* SdioWrFrameBCLow */ +#define SDA_SDIOWRFRAMEBCHIGH 0x01a /* SdioWrFrameBCHigh */ +#define SDA_SDIORDFRAMEBCLOW 0x01b /* SdioRdFrameBCLow */ +#define SDA_SDIORDFRAMEBCHIGH 0x01c /* SdioRdFrameBCHigh */ + +/* SDA_F2WATERMARK */ +#define SDA_F2WATERMARK_MASK 0x7f /* F2Watermark Mask */ + +/* SDA_SBADDRLOW */ +#define SDA_SBADDRLOW_MASK 0x80 /* SbAddrLow Mask */ + +/* SDA_SBADDRMID */ +#define SDA_SBADDRMID_MASK 0xff /* SbAddrMid Mask */ + +/* SDA_SBADDRHIGH */ +#define SDA_SBADDRHIGH_MASK 0xff /* SbAddrHigh Mask */ + +/* SDA_FRAMECTRL */ +#define SFC_RF_TERM (1 << 0) /* Read Frame Terminate */ +#define SFC_WF_TERM (1 << 1) /* Write Frame Terminate */ +#define SFC_CRC4WOOS (1 << 2) /* HW reports CRC error for write out of sync */ +#define SFC_ABORTALL (1 << 3) /* Abort cancels all in-progress frames */ + +/* pcmciaframectrl */ +#define PFC_RF_TERM (1 << 0) /* Read Frame Terminate */ +#define PFC_WF_TERM (1 << 1) /* Write Frame Terminate */ + +/* intrcvlazy */ +#define IRL_TO_MASK 0x00ffffff /* timeout */ +#define IRL_FC_MASK 0xff000000 /* frame count */ +#define IRL_FC_SHIFT 24 /* frame count */ + +/* rx header */ +typedef volatile struct { + uint16 len; + uint16 flags; +} sdpcmd_rxh_t; + +/* rx header flags */ +#define RXF_CRC 0x0001 /* CRC error detected */ +#define RXF_WOOS 0x0002 /* write frame out of sync */ +#define RXF_WF_TERM 0x0004 /* write frame terminated */ +#define RXF_ABORT 0x0008 /* write frame aborted */ +#define RXF_DISCARD (RXF_CRC | RXF_WOOS | RXF_WF_TERM | RXF_ABORT) /* bad frame */ + +/* HW frame tag */ +#define SDPCM_FRAMETAG_LEN 4 /* HW frametag: 2 bytes len, 2 bytes check val */ + +/* HW Extention tag for glomming */ +/* 2 byte Pkt len, Frame channel, Frame Flags, 2byte hdr len, 2 byte pad len */ +#define SDPCM_HWEXT_LEN 8 + +#endif /* _sbsdpcmdev_h_ */ diff --git a/external/cache/sources/wl/include/sbsocram.h b/external/cache/sources/wl/include/sbsocram.h new file mode 100644 index 0000000..fcf10da --- /dev/null +++ b/external/cache/sources/wl/include/sbsocram.h @@ -0,0 +1,175 @@ +/* + * BCM47XX Sonics SiliconBackplane embedded ram core + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: sbsocram.h 271781 2011-07-13 20:00:06Z $ + */ + +#ifndef _SBSOCRAM_H +#define _SBSOCRAM_H + +#ifndef _LANGUAGE_ASSEMBLY + + +#ifndef PAD +#define _PADLINE(line) pad ## line +#define _XSTR(line) _PADLINE(line) +#define PAD _XSTR(__LINE__) +#endif + + +typedef volatile struct sbsocramregs { + uint32 coreinfo; + uint32 bwalloc; + uint32 extracoreinfo; + uint32 biststat; + uint32 bankidx; + uint32 standbyctrl; + + uint32 errlogstatus; + uint32 errlogaddr; + + uint32 cambankidx; + uint32 cambankstandbyctrl; + uint32 cambankpatchctrl; + uint32 cambankpatchtblbaseaddr; + uint32 cambankcmdreg; + uint32 cambankdatareg; + uint32 cambankmaskreg; + uint32 PAD[1]; + uint32 bankinfo; + uint32 PAD[15]; + uint32 extmemconfig; + uint32 extmemparitycsr; + uint32 extmemparityerrdata; + uint32 extmemparityerrcnt; + uint32 extmemwrctrlandsize; + uint32 PAD[84]; + uint32 workaround; + uint32 pwrctl; + uint32 PAD[133]; + uint32 sr_control; + uint32 sr_status; + uint32 sr_address; + uint32 sr_data; +} sbsocramregs_t; + +#endif + + +#define SR_COREINFO 0x00 +#define SR_BWALLOC 0x04 +#define SR_BISTSTAT 0x0c +#define SR_BANKINDEX 0x10 +#define SR_BANKSTBYCTL 0x14 +#define SR_PWRCTL 0x1e8 + + +#define SRCI_PT_MASK 0x00070000 +#define SRCI_PT_SHIFT 16 + +#define SRCI_PT_OCP_OCP 0 +#define SRCI_PT_AXI_OCP 1 +#define SRCI_PT_ARM7AHB_OCP 2 +#define SRCI_PT_CM3AHB_OCP 3 +#define SRCI_PT_AXI_AXI 4 +#define SRCI_PT_AHB_AXI 5 + +#define SRCI_LSS_MASK 0x00f00000 +#define SRCI_LSS_SHIFT 20 +#define SRCI_LRS_MASK 0x0f000000 +#define SRCI_LRS_SHIFT 24 + + +#define SRCI_MS0_MASK 0xf +#define SR_MS0_BASE 16 + + +#define SRCI_ROMNB_MASK 0xf000 +#define SRCI_ROMNB_SHIFT 12 +#define SRCI_ROMBSZ_MASK 0xf00 +#define SRCI_ROMBSZ_SHIFT 8 +#define SRCI_SRNB_MASK 0xf0 +#define SRCI_SRNB_SHIFT 4 +#define SRCI_SRBSZ_MASK 0xf +#define SRCI_SRBSZ_SHIFT 0 + +#define SR_BSZ_BASE 14 + + +#define SRSC_SBYOVR_MASK 0x80000000 +#define SRSC_SBYOVR_SHIFT 31 +#define SRSC_SBYOVRVAL_MASK 0x60000000 +#define SRSC_SBYOVRVAL_SHIFT 29 +#define SRSC_SBYEN_MASK 0x01000000 +#define SRSC_SBYEN_SHIFT 24 + + +#define SRPC_PMU_STBYDIS_MASK 0x00000010 +#define SRPC_PMU_STBYDIS_SHIFT 4 +#define SRPC_STBYOVRVAL_MASK 0x00000008 +#define SRPC_STBYOVRVAL_SHIFT 3 +#define SRPC_STBYOVR_MASK 0x00000007 +#define SRPC_STBYOVR_SHIFT 0 + + +#define SRECC_NUM_BANKS_MASK 0x000000F0 +#define SRECC_NUM_BANKS_SHIFT 4 +#define SRECC_BANKSIZE_MASK 0x0000000F +#define SRECC_BANKSIZE_SHIFT 0 + +#define SRECC_BANKSIZE(value) (1 << (value)) + + +#define SRCBPC_PATCHENABLE 0x80000000 + +#define SRP_ADDRESS 0x0001FFFC +#define SRP_VALID 0x8000 + + +#define SRCMD_WRITE 0x00020000 +#define SRCMD_READ 0x00010000 +#define SRCMD_DONE 0x80000000 + +#define SRCMD_DONE_DLY 1000 + + +#define SOCRAM_BANKINFO_SZMASK 0x7f +#define SOCRAM_BANKIDX_ROM_MASK 0x100 + +#define SOCRAM_BANKIDX_MEMTYPE_SHIFT 8 + +#define SOCRAM_MEMTYPE_RAM 0 +#define SOCRAM_MEMTYPE_R0M 1 +#define SOCRAM_MEMTYPE_DEVRAM 2 + +#define SOCRAM_BANKINFO_REG 0x40 +#define SOCRAM_BANKIDX_REG 0x10 +#define SOCRAM_BANKINFO_STDBY_MASK 0x400 +#define SOCRAM_BANKINFO_STDBY_TIMER 0x800 + + +#define SOCRAM_BANKINFO_DEVRAMSEL_SHIFT 13 +#define SOCRAM_BANKINFO_DEVRAMSEL_MASK 0x2000 +#define SOCRAM_BANKINFO_DEVRAMPRO_SHIFT 14 +#define SOCRAM_BANKINFO_DEVRAMPRO_MASK 0x4000 +#define SOCRAM_BANKINFO_SLPSUPP_SHIFT 15 +#define SOCRAM_BANKINFO_SLPSUPP_MASK 0x8000 +#define SOCRAM_BANKINFO_RETNTRAM_SHIFT 16 +#define SOCRAM_BANKINFO_RETNTRAM_MASK 0x00010000 +#define SOCRAM_BANKINFO_PDASZ_SHIFT 17 +#define SOCRAM_BANKINFO_PDASZ_MASK 0x003E0000 +#define SOCRAM_BANKINFO_DEVRAMREMAP_SHIFT 24 +#define SOCRAM_BANKINFO_DEVRAMREMAP_MASK 0x01000000 + + +#define SOCRAM_DEVRAMBANK_MASK 0xF000 +#define SOCRAM_DEVRAMBANK_SHIFT 12 + + +#define SOCRAM_BANKINFO_SZBASE 8192 +#define SOCRAM_BANKSIZE_SHIFT 13 + + +#endif diff --git a/external/cache/sources/wl/include/sbsprom.h b/external/cache/sources/wl/include/sbsprom.h new file mode 100644 index 0000000..01bfff3 --- /dev/null +++ b/external/cache/sources/wl/include/sbsprom.h @@ -0,0 +1,279 @@ +/* + * SPROM format definitions for the Broadcom 47xx and 43xx chip family. + * + * $Id: sbsprom.h 241182 2011-02-17 21:50:03Z gmo $ + * Copyright(c) 2002 Broadcom Corporation + */ + +#ifndef _SBSPROM_H +#define _SBSPROM_H + +#include "typedefs.h" +#include "bcmdevs.h" + +/* A word is this many bytes */ +#define SRW 2 + +/* offset into PCI config space for write enable bit */ +#define CFG_SROM_WRITABLE_OFFSET 0x88 +#define SROM_WRITEABLE 0x10 + +/* enumeration space consists of N contiguous 4Kbyte core register sets */ +#define SBCORES_BASE 0x18000000 +#define SBCORES_EACH 0x1000 + +/* offset from BAR0 for srom space */ +#define SROM_BASE 4096 + +/* number of 2-byte words in srom */ +#define SROM_SIZE 64 + +#define SROM_BYTES (SROM_SIZE * SRW) + +#define MAX_FN 4 + +/* Word 0, Hardware control */ +#define SROM_HWCTL 0 +#define HW_FUNMSK 0x000f +#define HW_FCLK 0x0200 +#define HW_CBM 0x0400 +#define HW_PIMSK 0xf000 +#define HW_PISHIFT 12 +#define HW_4301PISHIFT 13 +#define HW_PI4402 0x2 +#define HW_FUN4401 0x0001 +#define HW_FCLK4402 0x0000 + +/* Word 1, common-power/boot-rom */ +#define SROM_COMMPW 1 +/* boot rom present bit */ +#define BR_PRESSHIFT 8 +/* 15:9 for n; boot rom size is 2^(14 + n) bytes */ +#define BR_SIZESHIFT 9 + +/* Word 2, SubsystemId */ +#define SROM_SSID 2 + +/* Word 3, VendorId */ +#define SROM_VID 3 + +/* Function 0 info, function info length */ +#define SROM_FN0 4 +#define SROM_FNSZ 8 + +/* Within each function: */ +/* Word 0, deviceID */ +#define SRFN_DID 0 + +/* Words 1-2, ClassCode */ +#define SRFN_CCL 1 +/* Word 2, D0 Power */ +#define SRFN_CCHD0 2 + +/* Word 3, PME and D1D2D3 power */ +#define SRFN_PMED123 3 + +#define PME_IL 0 +#define PME_ENET0 1 +#define PME_ENET1 2 +#define PME_CODEC 3 + +#define PME_4402_ENET 0 +#define PME_4402_CODEC 1 +#define PME_4301_WL 2 +#define PMEREP_4402_ENET (PMERD3CV | PMERD3CA | PMERD3H | PMERD2 | PMERD1 | PMERD0 | PME) + +/* Word 4, Bar1 enable, pme reports */ +#define SRFN_B1PMER 4 +#define B1E 1 +#define B1SZMSK 0xe +#define B1SZSH 1 +#define PMERMSK 0x0ff0 +#define PME 0x0010 +#define PMERD0 0x0020 +#define PMERD1 0x0040 +#define PMERD2 0x0080 +#define PMERD3H 0x0100 +#define PMERD3CA 0x0200 +#define PMERD3CV 0x0400 +#define IGNCLKRR 0x0800 +#define B0LMSK 0xf000 + +/* Words 4-5, Bar0 Sonics value */ +#define SRFN_B0H 5 +/* Words 6-7, CIS Pointer */ +#define SRFN_CISL 6 +#define SRFN_CISH 7 + +/* Words 36-38: iLine MAC address */ +#define SROM_I_MACHI 36 +#define SROM_I_MACMID 37 +#define SROM_I_MACLO 38 + +/* Words 36-38: wireless0 MAC address on 43xx */ +#define SROM_W0_MACHI 36 +#define SROM_W0_MACMID 37 +#define SROM_W0_MACLO 38 + +/* Words 39-41: enet0 MAC address */ +#define SROM_E0_MACHI 39 +#define SROM_E0_MACMID 40 +#define SROM_E0_MACLO 41 + +/* Words 42-44: enet1 MAC address */ +#define SROM_E1_MACHI 42 +#define SROM_E1_MACMID 43 +#define SROM_E1_MACLO 44 + +/* Words 42-44: wireless1 MAC address on 4309 */ +#define SROM_W1_MACHI 42 +#define SROM_W1_MACMID 43 +#define SROM_W1_MACLO 44 + +#define SROM_EPHY 45 + +/* Word 46: BdRev & Antennas0/1 & ccLock for 430x */ +#define SROM_REV_AA_LOCK 46 + +/* Words 47-51 wl0 PA bx */ +#define SROM_WL0_PAB0 47 +#define SROM_WL0_PAB1 48 +#define SROM_WL0_PAB2 49 +#define SROM_WL0_PAB3 50 +#define SROM_WL0_PAB4 51 + +/* Word 52: wl0/wl1 MaxPower */ +#define SROM_WL_MAXPWR 52 + +/* Words 53-55 wl1 PA bx */ +#define SROM_WL1_PAB0 53 +#define SROM_WL1_PAB1 54 +#define SROM_WL1_PAB2 55 + +/* Woprd 56: itt */ +#define SROM_ITT 56 + +/* Words 59-62: OEM Space */ +#define SROM_WL_OEM 59 +#define SROM_OEM_SIZE 4 + +/* Contents for the srom */ + +#define BU4710_SSID 0x0400 +#define VSIM4710_SSID 0x0401 +#define QT4710_SSID 0x0402 + +#define BU4610_SSID 0x0403 +#define VSIM4610_SSID 0x0404 + +#define BU4307_SSID 0x0405 +#define BCM94301CB_SSID 0x0406 +#define BCM94301MP_SSID 0x0407 +#define BCM94307MP_SSID 0x0408 +#define AP4307_SSID 0x0409 + +#define BU4309_SSID 0x040a +#define BCM94309CB_SSID 0x040b +#define BCM94309MP_SSID 0x040c +#define AP4309_SSID 0x040d + +#define BU4312_SSID 0x048a + +#define BU4402_SSID 0x4402 + +#define CLASS_OTHER 0x8000 +#define CLASS_ETHER 0x0000 +#define CLASS_NET 0x0002 +#define CLASS_COMM 0x0007 +#define CLASS_MODEM 0x0300 +#define CLASS_MIPS 0x3000 +#define CLASS_PROC 0x000b +#define CLASS_FLASH 0x0100 +#define CLASS_MEM 0x0005 +#define CLASS_SERIALBUS 0x000c +#define CLASS_OHCI 0x0310 + +/* Broadcom IEEE MAC addresses are 00:90:4c:xx:xx:xx */ +#define MACHI 0x90 + +#define MACMID_BU4710I 0x4c17 +#define MACMID_BU4710E0 0x4c18 +#define MACMID_BU4710E1 0x4c19 + +#define MACMID_94710R1I 0x4c1a +#define MACMID_94710R1E0 0x4c1b +#define MACMID_94710R1E1 0x4c1c + +#define MACMID_94710R4I 0x4c1d +#define MACMID_94710R4E0 0x4c1e +#define MACMID_94710R4E1 0x4c1f + +#define MACMID_94710DEVI 0x4c20 +#define MACMID_94710DEVE0 0x4c21 +#define MACMID_94710DEVE1 0x4c22 + +#define MACMID_BU4402 0x4c23 + +#define MACMID_BU4610I 0x4c24 +#define MACMID_BU4610E0 0x4c25 +#define MACMID_BU4610E1 0x4c26 + +#define MACMID_BU4307W 0x4c27 +#define MACMID_BU4307E 0x4c28 + +#define MACMID_94301CB 0x4c29 + +#define MACMID_94301MP 0x4c2a + +#define MACMID_94307MPW 0x4c2b +#define MACMID_94307MPE 0x4c2c + +#define MACMID_AP4307W 0x4c2d +#define MACMID_AP4307E 0x4c2e + +#define MACMID_BU4309W0 0x4c2f +#define MACMID_BU4309W1 0x4c30 +#define MACMID_BU4309E 0x4c31 + +#define MACMID_94309CBW0 0x4c32 +#define MACMID_94309CBW1 0x4c33 + +#define MACMID_94309MPW0 0x4c34 +#define MACMID_94309MPW1 0x4c35 +#define MACMID_94309MPE 0x4c36 + +#define MACMID_BU4401 0x4c37 + +/* Enet phy settings one or two singles or a dual */ +/* Bits 4-0 : MII address for enet0 (0x1f for not there */ +/* Bits 9-5 : MII address for enet1 (0x1f for not there */ +/* Bit 14 : Mdio for enet0 */ +/* Bit 15 : Mdio for enet1 */ + +/* bu4710 with only one phy on enet1 with address 7: */ +#define SROM_EPHY_ONE 0x80ff + +/* bu4710 with two individual phys, at 6 and 7, */ +/* each mdio connected to its own mac: */ +#define SROM_EPHY_TWO 0x80e6 + +/* bu4710 with a dual phy addresses 0 & 1, mdio-connected to enet0 */ +#define SROM_EPHY_DUAL 0x0001 + +/* r1 board with a dual phy at 0, 1 (NOT swapped and mdc0 */ +#define SROM_EPHY_R1 0x0010 + +/* r4 board with a single phy on enet0 at address 5 and a switch */ +/* chip on enet1 (speciall case: 0x1e */ +#define SROM_EPHY_R4 0x83e5 + +/* 4402 uses an internal phy at phyaddr 1; want mdcport == coreunit == 0 */ +#define SROM_EPHY_INTERNAL 0x0001 + +/* 4307 uses an external phy at phyaddr 0; want mdcport == coreunit == 0 */ +#define SROM_EPHY_ZERO 0x0000 + +#define SROM_VERS 0x0001 + + +#endif /* _SBSPROM_H */ diff --git a/external/cache/sources/wl/include/sdio.h b/external/cache/sources/wl/include/sdio.h new file mode 100644 index 0000000..ea2631b --- /dev/null +++ b/external/cache/sources/wl/include/sdio.h @@ -0,0 +1,594 @@ +/* + * SDIO spec header file + * Protocol and standard (common) device definitions + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: sdio.h 288543 2011-10-07 12:15:31Z $ + */ + +#ifndef _SDIO_H +#define _SDIO_H + + +/* CCCR structure for function 0 */ +typedef volatile struct { + uint8 cccr_sdio_rev; /* RO, cccr and sdio revision */ + uint8 sd_rev; /* RO, sd spec revision */ + uint8 io_en; /* I/O enable */ + uint8 io_rdy; /* I/O ready reg */ + uint8 intr_ctl; /* Master and per function interrupt enable control */ + uint8 intr_status; /* RO, interrupt pending status */ + uint8 io_abort; /* read/write abort or reset all functions */ + uint8 bus_inter; /* bus interface control */ + uint8 capability; /* RO, card capability */ + + uint8 cis_base_low; /* 0x9 RO, common CIS base address, LSB */ + uint8 cis_base_mid; + uint8 cis_base_high; /* 0xB RO, common CIS base address, MSB */ + + /* suspend/resume registers */ + uint8 bus_suspend; /* 0xC */ + uint8 func_select; /* 0xD */ + uint8 exec_flag; /* 0xE */ + uint8 ready_flag; /* 0xF */ + + uint8 fn0_blk_size[2]; /* 0x10(LSB), 0x11(MSB) */ + + uint8 power_control; /* 0x12 (SDIO version 1.10) */ + + uint8 speed_control; /* 0x13 */ +} sdio_regs_t; + +/* SDIO Device CCCR offsets */ +#define SDIOD_CCCR_REV 0x00 +#define SDIOD_CCCR_SDREV 0x01 +#define SDIOD_CCCR_IOEN 0x02 +#define SDIOD_CCCR_IORDY 0x03 +#define SDIOD_CCCR_INTEN 0x04 +#define SDIOD_CCCR_INTPEND 0x05 +#define SDIOD_CCCR_IOABORT 0x06 +#define SDIOD_CCCR_BICTRL 0x07 +#define SDIOD_CCCR_CAPABLITIES 0x08 +#define SDIOD_CCCR_CISPTR_0 0x09 +#define SDIOD_CCCR_CISPTR_1 0x0A +#define SDIOD_CCCR_CISPTR_2 0x0B +#define SDIOD_CCCR_BUSSUSP 0x0C +#define SDIOD_CCCR_FUNCSEL 0x0D +#define SDIOD_CCCR_EXECFLAGS 0x0E +#define SDIOD_CCCR_RDYFLAGS 0x0F +#define SDIOD_CCCR_BLKSIZE_0 0x10 +#define SDIOD_CCCR_BLKSIZE_1 0x11 +#define SDIOD_CCCR_POWER_CONTROL 0x12 +#define SDIOD_CCCR_SPEED_CONTROL 0x13 +#define SDIOD_CCCR_UHSI_SUPPORT 0x14 +#define SDIOD_CCCR_DRIVER_STRENGTH 0x15 +#define SDIOD_CCCR_INTR_EXTN 0x16 + +/* Broadcom extensions (corerev >= 1) */ +#define SDIOD_CCCR_BRCM_SEPINT 0xf2 + +/* cccr_sdio_rev */ +#define SDIO_REV_SDIOID_MASK 0xf0 /* SDIO spec revision number */ +#define SDIO_REV_CCCRID_MASK 0x0f /* CCCR format version number */ + +/* sd_rev */ +#define SD_REV_PHY_MASK 0x0f /* SD format version number */ + +/* io_en */ +#define SDIO_FUNC_ENABLE_1 0x02 /* function 1 I/O enable */ +#define SDIO_FUNC_ENABLE_2 0x04 /* function 2 I/O enable */ + +/* io_rdys */ +#define SDIO_FUNC_READY_1 0x02 /* function 1 I/O ready */ +#define SDIO_FUNC_READY_2 0x04 /* function 2 I/O ready */ + +/* intr_ctl */ +#define INTR_CTL_MASTER_EN 0x1 /* interrupt enable master */ +#define INTR_CTL_FUNC1_EN 0x2 /* interrupt enable for function 1 */ +#define INTR_CTL_FUNC2_EN 0x4 /* interrupt enable for function 2 */ + +/* intr_status */ +#define INTR_STATUS_FUNC1 0x2 /* interrupt pending for function 1 */ +#define INTR_STATUS_FUNC2 0x4 /* interrupt pending for function 2 */ + +/* io_abort */ +#define IO_ABORT_RESET_ALL 0x08 /* I/O card reset */ +#define IO_ABORT_FUNC_MASK 0x07 /* abort selction: function x */ + +/* bus_inter */ +#define BUS_CARD_DETECT_DIS 0x80 /* Card Detect disable */ +#define BUS_SPI_CONT_INTR_CAP 0x40 /* support continuous SPI interrupt */ +#define BUS_SPI_CONT_INTR_EN 0x20 /* continuous SPI interrupt enable */ +#define BUS_SD_DATA_WIDTH_MASK 0x03 /* bus width mask */ +#define BUS_SD_DATA_WIDTH_4BIT 0x02 /* bus width 4-bit mode */ +#define BUS_SD_DATA_WIDTH_1BIT 0x00 /* bus width 1-bit mode */ + +/* capability */ +#define SDIO_CAP_4BLS 0x80 /* 4-bit support for low speed card */ +#define SDIO_CAP_LSC 0x40 /* low speed card */ +#define SDIO_CAP_E4MI 0x20 /* enable interrupt between block of data in 4-bit mode */ +#define SDIO_CAP_S4MI 0x10 /* support interrupt between block of data in 4-bit mode */ +#define SDIO_CAP_SBS 0x08 /* support suspend/resume */ +#define SDIO_CAP_SRW 0x04 /* support read wait */ +#define SDIO_CAP_SMB 0x02 /* support multi-block transfer */ +#define SDIO_CAP_SDC 0x01 /* Support Direct commands during multi-byte transfer */ + +/* power_control */ +#define SDIO_POWER_SMPC 0x01 /* supports master power control (RO) */ +#define SDIO_POWER_EMPC 0x02 /* enable master power control (allow > 200mA) (RW) */ + +/* speed_control (control device entry into high-speed clocking mode) */ +#define SDIO_SPEED_SHS 0x01 /* supports high-speed [clocking] mode (RO) */ +#define SDIO_SPEED_EHS 0x02 /* enable high-speed [clocking] mode (RW) */ + +/* for setting bus speed in card: 0x13h */ +#define SDIO_BUS_SPEED_UHSISEL_M BITFIELD_MASK(3) +#define SDIO_BUS_SPEED_UHSISEL_S 1 + +/* for getting bus speed cap in card: 0x14h */ +#define SDIO_BUS_SPEED_UHSICAP_M BITFIELD_MASK(3) +#define SDIO_BUS_SPEED_UHSICAP_S 0 + +/* for getting driver type CAP in card: 0x15h */ +#define SDIO_BUS_DRVR_TYPE_CAP_M BITFIELD_MASK(3) +#define SDIO_BUS_DRVR_TYPE_CAP_S 0 + +/* for setting driver type selection in card: 0x15h */ +#define SDIO_BUS_DRVR_TYPE_SEL_M BITFIELD_MASK(2) +#define SDIO_BUS_DRVR_TYPE_SEL_S 4 + +/* for getting async int support in card: 0x16h */ +#define SDIO_BUS_ASYNCINT_CAP_M BITFIELD_MASK(1) +#define SDIO_BUS_ASYNCINT_CAP_S 0 + +/* for setting async int selection in card: 0x16h */ +#define SDIO_BUS_ASYNCINT_SEL_M BITFIELD_MASK(1) +#define SDIO_BUS_ASYNCINT_SEL_S 1 + +/* brcm sepint */ +#define SDIO_SEPINT_MASK 0x01 /* route sdpcmdev intr onto separate pad (chip-specific) */ +#define SDIO_SEPINT_OE 0x02 /* 1 asserts output enable for above pad */ +#define SDIO_SEPINT_ACT_HI 0x04 /* use active high interrupt level instead of active low */ + +/* FBR structure for function 1-7, FBR addresses and register offsets */ +typedef volatile struct { + uint8 devctr; /* device interface, CSA control */ + uint8 ext_dev; /* extended standard I/O device type code */ + uint8 pwr_sel; /* power selection support */ + uint8 PAD[6]; /* reserved */ + + uint8 cis_low; /* CIS LSB */ + uint8 cis_mid; + uint8 cis_high; /* CIS MSB */ + uint8 csa_low; /* code storage area, LSB */ + uint8 csa_mid; + uint8 csa_high; /* code storage area, MSB */ + uint8 csa_dat_win; /* data access window to function */ + + uint8 fnx_blk_size[2]; /* block size, little endian */ +} sdio_fbr_t; + +/* Maximum number of I/O funcs */ +#define SDIOD_MAX_FUNCS 8 +#define SDIOD_MAX_IOFUNCS 7 + +/* SDIO Device FBR Start Address */ +#define SDIOD_FBR_STARTADDR 0x100 + +/* SDIO Device FBR Size */ +#define SDIOD_FBR_SIZE 0x100 + +/* Macro to calculate FBR register base */ +#define SDIOD_FBR_BASE(n) ((n) * 0x100) + +/* Function register offsets */ +#define SDIOD_FBR_DEVCTR 0x00 /* basic info for function */ +#define SDIOD_FBR_EXT_DEV 0x01 /* extended I/O device code */ +#define SDIOD_FBR_PWR_SEL 0x02 /* power selection bits */ + +/* SDIO Function CIS ptr offset */ +#define SDIOD_FBR_CISPTR_0 0x09 +#define SDIOD_FBR_CISPTR_1 0x0A +#define SDIOD_FBR_CISPTR_2 0x0B + +/* Code Storage Area pointer */ +#define SDIOD_FBR_CSA_ADDR_0 0x0C +#define SDIOD_FBR_CSA_ADDR_1 0x0D +#define SDIOD_FBR_CSA_ADDR_2 0x0E +#define SDIOD_FBR_CSA_DATA 0x0F + +/* SDIO Function I/O Block Size */ +#define SDIOD_FBR_BLKSIZE_0 0x10 +#define SDIOD_FBR_BLKSIZE_1 0x11 + +/* devctr */ +#define SDIOD_FBR_DEVCTR_DIC 0x0f /* device interface code */ +#define SDIOD_FBR_DECVTR_CSA 0x40 /* CSA support flag */ +#define SDIOD_FBR_DEVCTR_CSA_EN 0x80 /* CSA enabled */ +/* interface codes */ +#define SDIOD_DIC_NONE 0 /* SDIO standard interface is not supported */ +#define SDIOD_DIC_UART 1 +#define SDIOD_DIC_BLUETOOTH_A 2 +#define SDIOD_DIC_BLUETOOTH_B 3 +#define SDIOD_DIC_GPS 4 +#define SDIOD_DIC_CAMERA 5 +#define SDIOD_DIC_PHS 6 +#define SDIOD_DIC_WLAN 7 +#define SDIOD_DIC_EXT 0xf /* extended device interface, read ext_dev register */ + +/* pwr_sel */ +#define SDIOD_PWR_SEL_SPS 0x01 /* supports power selection */ +#define SDIOD_PWR_SEL_EPS 0x02 /* enable power selection (low-current mode) */ + +/* misc defines */ +#define SDIO_FUNC_0 0 +#define SDIO_FUNC_1 1 +#define SDIO_FUNC_2 2 +#define SDIO_FUNC_3 3 +#define SDIO_FUNC_4 4 +#define SDIO_FUNC_5 5 +#define SDIO_FUNC_6 6 +#define SDIO_FUNC_7 7 + +#define SD_CARD_TYPE_UNKNOWN 0 /* bad type or unrecognized */ +#define SD_CARD_TYPE_IO 1 /* IO only card */ +#define SD_CARD_TYPE_MEMORY 2 /* memory only card */ +#define SD_CARD_TYPE_COMBO 3 /* IO and memory combo card */ + +#define SDIO_MAX_BLOCK_SIZE 2048 /* maximum block size for block mode operation */ +#define SDIO_MIN_BLOCK_SIZE 1 /* minimum block size for block mode operation */ + +/* Card registers: status bit position */ +#define CARDREG_STATUS_BIT_OUTOFRANGE 31 +#define CARDREG_STATUS_BIT_COMCRCERROR 23 +#define CARDREG_STATUS_BIT_ILLEGALCOMMAND 22 +#define CARDREG_STATUS_BIT_ERROR 19 +#define CARDREG_STATUS_BIT_IOCURRENTSTATE3 12 +#define CARDREG_STATUS_BIT_IOCURRENTSTATE2 11 +#define CARDREG_STATUS_BIT_IOCURRENTSTATE1 10 +#define CARDREG_STATUS_BIT_IOCURRENTSTATE0 9 +#define CARDREG_STATUS_BIT_FUN_NUM_ERROR 4 + + + +#define SD_CMD_GO_IDLE_STATE 0 /* mandatory for SDIO */ +#define SD_CMD_SEND_OPCOND 1 +#define SD_CMD_MMC_SET_RCA 3 +#define SD_CMD_IO_SEND_OP_COND 5 /* mandatory for SDIO */ +#define SD_CMD_SELECT_DESELECT_CARD 7 +#define SD_CMD_SEND_CSD 9 +#define SD_CMD_SEND_CID 10 +#define SD_CMD_STOP_TRANSMISSION 12 +#define SD_CMD_SEND_STATUS 13 +#define SD_CMD_GO_INACTIVE_STATE 15 +#define SD_CMD_SET_BLOCKLEN 16 +#define SD_CMD_READ_SINGLE_BLOCK 17 +#define SD_CMD_READ_MULTIPLE_BLOCK 18 +#define SD_CMD_WRITE_BLOCK 24 +#define SD_CMD_WRITE_MULTIPLE_BLOCK 25 +#define SD_CMD_PROGRAM_CSD 27 +#define SD_CMD_SET_WRITE_PROT 28 +#define SD_CMD_CLR_WRITE_PROT 29 +#define SD_CMD_SEND_WRITE_PROT 30 +#define SD_CMD_ERASE_WR_BLK_START 32 +#define SD_CMD_ERASE_WR_BLK_END 33 +#define SD_CMD_ERASE 38 +#define SD_CMD_LOCK_UNLOCK 42 +#define SD_CMD_IO_RW_DIRECT 52 /* mandatory for SDIO */ +#define SD_CMD_IO_RW_EXTENDED 53 /* mandatory for SDIO */ +#define SD_CMD_APP_CMD 55 +#define SD_CMD_GEN_CMD 56 +#define SD_CMD_READ_OCR 58 +#define SD_CMD_CRC_ON_OFF 59 /* mandatory for SDIO */ +#define SD_ACMD_SD_STATUS 13 +#define SD_ACMD_SEND_NUM_WR_BLOCKS 22 +#define SD_ACMD_SET_WR_BLOCK_ERASE_CNT 23 +#define SD_ACMD_SD_SEND_OP_COND 41 +#define SD_ACMD_SET_CLR_CARD_DETECT 42 +#define SD_ACMD_SEND_SCR 51 + +/* argument for SD_CMD_IO_RW_DIRECT and SD_CMD_IO_RW_EXTENDED */ +#define SD_IO_OP_READ 0 /* Read_Write: Read */ +#define SD_IO_OP_WRITE 1 /* Read_Write: Write */ +#define SD_IO_RW_NORMAL 0 /* no RAW */ +#define SD_IO_RW_RAW 1 /* RAW */ +#define SD_IO_BYTE_MODE 0 /* Byte Mode */ +#define SD_IO_BLOCK_MODE 1 /* BlockMode */ +#define SD_IO_FIXED_ADDRESS 0 /* fix Address */ +#define SD_IO_INCREMENT_ADDRESS 1 /* IncrementAddress */ + +/* build SD_CMD_IO_RW_DIRECT Argument */ +#define SDIO_IO_RW_DIRECT_ARG(rw, raw, func, addr, data) \ + ((((rw) & 1) << 31) | (((func) & 0x7) << 28) | (((raw) & 1) << 27) | \ + (((addr) & 0x1FFFF) << 9) | ((data) & 0xFF)) + +/* build SD_CMD_IO_RW_EXTENDED Argument */ +#define SDIO_IO_RW_EXTENDED_ARG(rw, blk, func, addr, inc_addr, count) \ + ((((rw) & 1) << 31) | (((func) & 0x7) << 28) | (((blk) & 1) << 27) | \ + (((inc_addr) & 1) << 26) | (((addr) & 0x1FFFF) << 9) | ((count) & 0x1FF)) + +/* SDIO response parameters */ +#define SD_RSP_NO_NONE 0 +#define SD_RSP_NO_1 1 +#define SD_RSP_NO_2 2 +#define SD_RSP_NO_3 3 +#define SD_RSP_NO_4 4 +#define SD_RSP_NO_5 5 +#define SD_RSP_NO_6 6 + + /* Modified R6 response (to CMD3) */ +#define SD_RSP_MR6_COM_CRC_ERROR 0x8000 +#define SD_RSP_MR6_ILLEGAL_COMMAND 0x4000 +#define SD_RSP_MR6_ERROR 0x2000 + + /* Modified R1 in R4 Response (to CMD5) */ +#define SD_RSP_MR1_SBIT 0x80 +#define SD_RSP_MR1_PARAMETER_ERROR 0x40 +#define SD_RSP_MR1_RFU5 0x20 +#define SD_RSP_MR1_FUNC_NUM_ERROR 0x10 +#define SD_RSP_MR1_COM_CRC_ERROR 0x08 +#define SD_RSP_MR1_ILLEGAL_COMMAND 0x04 +#define SD_RSP_MR1_RFU1 0x02 +#define SD_RSP_MR1_IDLE_STATE 0x01 + + /* R5 response (to CMD52 and CMD53) */ +#define SD_RSP_R5_COM_CRC_ERROR 0x80 +#define SD_RSP_R5_ILLEGAL_COMMAND 0x40 +#define SD_RSP_R5_IO_CURRENTSTATE1 0x20 +#define SD_RSP_R5_IO_CURRENTSTATE0 0x10 +#define SD_RSP_R5_ERROR 0x08 +#define SD_RSP_R5_RFU 0x04 +#define SD_RSP_R5_FUNC_NUM_ERROR 0x02 +#define SD_RSP_R5_OUT_OF_RANGE 0x01 + +#define SD_RSP_R5_ERRBITS 0xCB + + +/* ------------------------------------------------ + * SDIO Commands and responses + * + * I/O only commands are: + * CMD0, CMD3, CMD5, CMD7, CMD14, CMD15, CMD52, CMD53 + * ------------------------------------------------ + */ + +/* SDIO Commands */ +#define SDIOH_CMD_0 0 +#define SDIOH_CMD_3 3 +#define SDIOH_CMD_5 5 +#define SDIOH_CMD_7 7 +#define SDIOH_CMD_11 11 +#define SDIOH_CMD_14 14 +#define SDIOH_CMD_15 15 +#define SDIOH_CMD_19 19 +#define SDIOH_CMD_52 52 +#define SDIOH_CMD_53 53 +#define SDIOH_CMD_59 59 + +/* SDIO Command Responses */ +#define SDIOH_RSP_NONE 0 +#define SDIOH_RSP_R1 1 +#define SDIOH_RSP_R2 2 +#define SDIOH_RSP_R3 3 +#define SDIOH_RSP_R4 4 +#define SDIOH_RSP_R5 5 +#define SDIOH_RSP_R6 6 + +/* + * SDIO Response Error flags + */ +#define SDIOH_RSP5_ERROR_FLAGS 0xCB + +/* ------------------------------------------------ + * SDIO Command structures. I/O only commands are: + * + * CMD0, CMD3, CMD5, CMD7, CMD15, CMD52, CMD53 + * ------------------------------------------------ + */ + +#define CMD5_OCR_M BITFIELD_MASK(24) +#define CMD5_OCR_S 0 + +#define CMD5_S18R_M BITFIELD_MASK(1) +#define CMD5_S18R_S 24 + +#define CMD7_RCA_M BITFIELD_MASK(16) +#define CMD7_RCA_S 16 + +#define CMD14_RCA_M BITFIELD_MASK(16) +#define CMD14_RCA_S 16 +#define CMD14_SLEEP_M BITFIELD_MASK(1) +#define CMD14_SLEEP_S 15 + +#define CMD_15_RCA_M BITFIELD_MASK(16) +#define CMD_15_RCA_S 16 + +#define CMD52_DATA_M BITFIELD_MASK(8) /* Bits [7:0] - Write Data/Stuff bits of CMD52 + */ +#define CMD52_DATA_S 0 +#define CMD52_REG_ADDR_M BITFIELD_MASK(17) /* Bits [25:9] - register address */ +#define CMD52_REG_ADDR_S 9 +#define CMD52_RAW_M BITFIELD_MASK(1) /* Bit 27 - Read after Write flag */ +#define CMD52_RAW_S 27 +#define CMD52_FUNCTION_M BITFIELD_MASK(3) /* Bits [30:28] - Function number */ +#define CMD52_FUNCTION_S 28 +#define CMD52_RW_FLAG_M BITFIELD_MASK(1) /* Bit 31 - R/W flag */ +#define CMD52_RW_FLAG_S 31 + + +#define CMD53_BYTE_BLK_CNT_M BITFIELD_MASK(9) /* Bits [8:0] - Byte/Block Count of CMD53 */ +#define CMD53_BYTE_BLK_CNT_S 0 +#define CMD53_REG_ADDR_M BITFIELD_MASK(17) /* Bits [25:9] - register address */ +#define CMD53_REG_ADDR_S 9 +#define CMD53_OP_CODE_M BITFIELD_MASK(1) /* Bit 26 - R/W Operation Code */ +#define CMD53_OP_CODE_S 26 +#define CMD53_BLK_MODE_M BITFIELD_MASK(1) /* Bit 27 - Block Mode */ +#define CMD53_BLK_MODE_S 27 +#define CMD53_FUNCTION_M BITFIELD_MASK(3) /* Bits [30:28] - Function number */ +#define CMD53_FUNCTION_S 28 +#define CMD53_RW_FLAG_M BITFIELD_MASK(1) /* Bit 31 - R/W flag */ +#define CMD53_RW_FLAG_S 31 + +/* ------------------------------------------------------ + * SDIO Command Response structures for SD1 and SD4 modes + * ----------------------------------------------------- + */ +#define RSP4_IO_OCR_M BITFIELD_MASK(24) /* Bits [23:0] - Card's OCR Bits [23:0] */ +#define RSP4_IO_OCR_S 0 + +#define RSP4_S18A_M BITFIELD_MASK(1) /* Bits [23:0] - Card's OCR Bits [23:0] */ +#define RSP4_S18A_S 24 + +#define RSP4_STUFF_M BITFIELD_MASK(3) /* Bits [26:24] - Stuff bits */ +#define RSP4_STUFF_S 24 +#define RSP4_MEM_PRESENT_M BITFIELD_MASK(1) /* Bit 27 - Memory present */ +#define RSP4_MEM_PRESENT_S 27 +#define RSP4_NUM_FUNCS_M BITFIELD_MASK(3) /* Bits [30:28] - Number of I/O funcs */ +#define RSP4_NUM_FUNCS_S 28 +#define RSP4_CARD_READY_M BITFIELD_MASK(1) /* Bit 31 - SDIO card ready */ +#define RSP4_CARD_READY_S 31 + +#define RSP6_STATUS_M BITFIELD_MASK(16) /* Bits [15:0] - Card status bits [19,22,23,12:0] + */ +#define RSP6_STATUS_S 0 +#define RSP6_IO_RCA_M BITFIELD_MASK(16) /* Bits [31:16] - RCA bits[31-16] */ +#define RSP6_IO_RCA_S 16 + +#define RSP1_AKE_SEQ_ERROR_M BITFIELD_MASK(1) /* Bit 3 - Authentication seq error */ +#define RSP1_AKE_SEQ_ERROR_S 3 +#define RSP1_APP_CMD_M BITFIELD_MASK(1) /* Bit 5 - Card expects ACMD */ +#define RSP1_APP_CMD_S 5 +#define RSP1_READY_FOR_DATA_M BITFIELD_MASK(1) /* Bit 8 - Ready for data (buff empty) */ +#define RSP1_READY_FOR_DATA_S 8 +#define RSP1_CURR_STATE_M BITFIELD_MASK(4) /* Bits [12:9] - State of card + * when Cmd was received + */ +#define RSP1_CURR_STATE_S 9 +#define RSP1_EARSE_RESET_M BITFIELD_MASK(1) /* Bit 13 - Erase seq cleared */ +#define RSP1_EARSE_RESET_S 13 +#define RSP1_CARD_ECC_DISABLE_M BITFIELD_MASK(1) /* Bit 14 - Card ECC disabled */ +#define RSP1_CARD_ECC_DISABLE_S 14 +#define RSP1_WP_ERASE_SKIP_M BITFIELD_MASK(1) /* Bit 15 - Partial blocks erased due to W/P */ +#define RSP1_WP_ERASE_SKIP_S 15 +#define RSP1_CID_CSD_OVERW_M BITFIELD_MASK(1) /* Bit 16 - Illegal write to CID or R/O bits + * of CSD + */ +#define RSP1_CID_CSD_OVERW_S 16 +#define RSP1_ERROR_M BITFIELD_MASK(1) /* Bit 19 - General/Unknown error */ +#define RSP1_ERROR_S 19 +#define RSP1_CC_ERROR_M BITFIELD_MASK(1) /* Bit 20 - Internal Card Control error */ +#define RSP1_CC_ERROR_S 20 +#define RSP1_CARD_ECC_FAILED_M BITFIELD_MASK(1) /* Bit 21 - Card internal ECC failed + * to correct data + */ +#define RSP1_CARD_ECC_FAILED_S 21 +#define RSP1_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 22 - Cmd not legal for the card state */ +#define RSP1_ILLEGAL_CMD_S 22 +#define RSP1_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 23 - CRC check of previous command failed + */ +#define RSP1_COM_CRC_ERROR_S 23 +#define RSP1_LOCK_UNLOCK_FAIL_M BITFIELD_MASK(1) /* Bit 24 - Card lock-unlock Cmd Seq error */ +#define RSP1_LOCK_UNLOCK_FAIL_S 24 +#define RSP1_CARD_LOCKED_M BITFIELD_MASK(1) /* Bit 25 - Card locked by the host */ +#define RSP1_CARD_LOCKED_S 25 +#define RSP1_WP_VIOLATION_M BITFIELD_MASK(1) /* Bit 26 - Attempt to program + * write-protected blocks + */ +#define RSP1_WP_VIOLATION_S 26 +#define RSP1_ERASE_PARAM_M BITFIELD_MASK(1) /* Bit 27 - Invalid erase blocks */ +#define RSP1_ERASE_PARAM_S 27 +#define RSP1_ERASE_SEQ_ERR_M BITFIELD_MASK(1) /* Bit 28 - Erase Cmd seq error */ +#define RSP1_ERASE_SEQ_ERR_S 28 +#define RSP1_BLK_LEN_ERR_M BITFIELD_MASK(1) /* Bit 29 - Block length error */ +#define RSP1_BLK_LEN_ERR_S 29 +#define RSP1_ADDR_ERR_M BITFIELD_MASK(1) /* Bit 30 - Misaligned address */ +#define RSP1_ADDR_ERR_S 30 +#define RSP1_OUT_OF_RANGE_M BITFIELD_MASK(1) /* Bit 31 - Cmd arg was out of range */ +#define RSP1_OUT_OF_RANGE_S 31 + + +#define RSP5_DATA_M BITFIELD_MASK(8) /* Bits [0:7] - data */ +#define RSP5_DATA_S 0 +#define RSP5_FLAGS_M BITFIELD_MASK(8) /* Bit [15:8] - Rsp flags */ +#define RSP5_FLAGS_S 8 +#define RSP5_STUFF_M BITFIELD_MASK(16) /* Bits [31:16] - Stuff bits */ +#define RSP5_STUFF_S 16 + +/* ---------------------------------------------- + * SDIO Command Response structures for SPI mode + * ---------------------------------------------- + */ +#define SPIRSP4_IO_OCR_M BITFIELD_MASK(16) /* Bits [15:0] - Card's OCR Bits [23:8] */ +#define SPIRSP4_IO_OCR_S 0 +#define SPIRSP4_STUFF_M BITFIELD_MASK(3) /* Bits [18:16] - Stuff bits */ +#define SPIRSP4_STUFF_S 16 +#define SPIRSP4_MEM_PRESENT_M BITFIELD_MASK(1) /* Bit 19 - Memory present */ +#define SPIRSP4_MEM_PRESENT_S 19 +#define SPIRSP4_NUM_FUNCS_M BITFIELD_MASK(3) /* Bits [22:20] - Number of I/O funcs */ +#define SPIRSP4_NUM_FUNCS_S 20 +#define SPIRSP4_CARD_READY_M BITFIELD_MASK(1) /* Bit 23 - SDIO card ready */ +#define SPIRSP4_CARD_READY_S 23 +#define SPIRSP4_IDLE_STATE_M BITFIELD_MASK(1) /* Bit 24 - idle state */ +#define SPIRSP4_IDLE_STATE_S 24 +#define SPIRSP4_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 26 - Illegal Cmd error */ +#define SPIRSP4_ILLEGAL_CMD_S 26 +#define SPIRSP4_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 27 - COM CRC error */ +#define SPIRSP4_COM_CRC_ERROR_S 27 +#define SPIRSP4_FUNC_NUM_ERROR_M BITFIELD_MASK(1) /* Bit 28 - Function number error + */ +#define SPIRSP4_FUNC_NUM_ERROR_S 28 +#define SPIRSP4_PARAM_ERROR_M BITFIELD_MASK(1) /* Bit 30 - Parameter Error Bit */ +#define SPIRSP4_PARAM_ERROR_S 30 +#define SPIRSP4_START_BIT_M BITFIELD_MASK(1) /* Bit 31 - Start Bit */ +#define SPIRSP4_START_BIT_S 31 + +#define SPIRSP5_DATA_M BITFIELD_MASK(8) /* Bits [23:16] - R/W Data */ +#define SPIRSP5_DATA_S 16 +#define SPIRSP5_IDLE_STATE_M BITFIELD_MASK(1) /* Bit 24 - Idle state */ +#define SPIRSP5_IDLE_STATE_S 24 +#define SPIRSP5_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 26 - Illegal Cmd error */ +#define SPIRSP5_ILLEGAL_CMD_S 26 +#define SPIRSP5_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 27 - COM CRC error */ +#define SPIRSP5_COM_CRC_ERROR_S 27 +#define SPIRSP5_FUNC_NUM_ERROR_M BITFIELD_MASK(1) /* Bit 28 - Function number error + */ +#define SPIRSP5_FUNC_NUM_ERROR_S 28 +#define SPIRSP5_PARAM_ERROR_M BITFIELD_MASK(1) /* Bit 30 - Parameter Error Bit */ +#define SPIRSP5_PARAM_ERROR_S 30 +#define SPIRSP5_START_BIT_M BITFIELD_MASK(1) /* Bit 31 - Start Bit */ +#define SPIRSP5_START_BIT_S 31 + +/* RSP6 card status format; Pg 68 Physical Layer spec v 1.10 */ +#define RSP6STAT_AKE_SEQ_ERROR_M BITFIELD_MASK(1) /* Bit 3 - Authentication seq error + */ +#define RSP6STAT_AKE_SEQ_ERROR_S 3 +#define RSP6STAT_APP_CMD_M BITFIELD_MASK(1) /* Bit 5 - Card expects ACMD */ +#define RSP6STAT_APP_CMD_S 5 +#define RSP6STAT_READY_FOR_DATA_M BITFIELD_MASK(1) /* Bit 8 - Ready for data + * (buff empty) + */ +#define RSP6STAT_READY_FOR_DATA_S 8 +#define RSP6STAT_CURR_STATE_M BITFIELD_MASK(4) /* Bits [12:9] - Card state at + * Cmd reception + */ +#define RSP6STAT_CURR_STATE_S 9 +#define RSP6STAT_ERROR_M BITFIELD_MASK(1) /* Bit 13 - General/Unknown error Bit 19 + */ +#define RSP6STAT_ERROR_S 13 +#define RSP6STAT_ILLEGAL_CMD_M BITFIELD_MASK(1) /* Bit 14 - Illegal cmd for + * card state Bit 22 + */ +#define RSP6STAT_ILLEGAL_CMD_S 14 +#define RSP6STAT_COM_CRC_ERROR_M BITFIELD_MASK(1) /* Bit 15 - CRC previous command + * failed Bit 23 + */ +#define RSP6STAT_COM_CRC_ERROR_S 15 + +#define SDIOH_XFER_TYPE_READ SD_IO_OP_READ +#define SDIOH_XFER_TYPE_WRITE SD_IO_OP_WRITE + +/* command issue options */ +#define CMD_OPTION_DEFAULT 0 +#define CMD_OPTION_TUNING 1 +#endif /* _SDIO_H */ diff --git a/external/cache/sources/wl/include/sdioh.h b/external/cache/sources/wl/include/sdioh.h new file mode 100644 index 0000000..c6f5d73 --- /dev/null +++ b/external/cache/sources/wl/include/sdioh.h @@ -0,0 +1,423 @@ +/* + * SDIO Host Controller Spec header file + * Register map and definitions for the Standard Host Controller + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: sdioh.h 299859 2011-12-01 03:53:27Z $ + */ + +#ifndef _SDIOH_H +#define _SDIOH_H + +#define SD_SysAddr 0x000 +#define SD_BlockSize 0x004 +#define SD_BlockCount 0x006 +#define SD_Arg0 0x008 +#define SD_Arg1 0x00A +#define SD_TransferMode 0x00C +#define SD_Command 0x00E +#define SD_Response0 0x010 +#define SD_Response1 0x012 +#define SD_Response2 0x014 +#define SD_Response3 0x016 +#define SD_Response4 0x018 +#define SD_Response5 0x01A +#define SD_Response6 0x01C +#define SD_Response7 0x01E +#define SD_BufferDataPort0 0x020 +#define SD_BufferDataPort1 0x022 +#define SD_PresentState 0x024 +#define SD_HostCntrl 0x028 +#define SD_PwrCntrl 0x029 +#define SD_BlockGapCntrl 0x02A +#define SD_WakeupCntrl 0x02B +#define SD_ClockCntrl 0x02C +#define SD_TimeoutCntrl 0x02E +#define SD_SoftwareReset 0x02F +#define SD_IntrStatus 0x030 +#define SD_ErrorIntrStatus 0x032 +#define SD_IntrStatusEnable 0x034 +#define SD_ErrorIntrStatusEnable 0x036 +#define SD_IntrSignalEnable 0x038 +#define SD_ErrorIntrSignalEnable 0x03A +#define SD_CMD12ErrorStatus 0x03C +#define SD_Capabilities 0x040 +#define SD_Capabilities3 0x044 +#define SD_MaxCurCap 0x048 +#define SD_MaxCurCap_Reserved 0x04C +#define SD_ADMA_ErrStatus 0x054 +#define SD_ADMA_SysAddr 0x58 +#define SD_SlotInterruptStatus 0x0FC +#define SD_HostControllerVersion 0x0FE +#define SD_GPIO_Reg 0x100 +#define SD_GPIO_OE 0x104 +#define SD_GPIO_Enable 0x108 + +/* SD specific registers in PCI config space */ +#define SD_SlotInfo 0x40 + +/* HC 3.0 specific registers and offsets */ +#define SD3_HostCntrl2 0x03E +/* preset regsstart and count */ +#define SD3_PresetValStart 0x060 +#define SD3_PresetValCount 8 +/* preset-indiv regs */ +#define SD3_PresetVal_init 0x060 +#define SD3_PresetVal_default 0x062 +#define SD3_PresetVal_HS 0x064 +#define SD3_PresetVal_SDR12 0x066 +#define SD3_PresetVal_SDR25 0x068 +#define SD3_PresetVal_SDR50 0x06a +#define SD3_PresetVal_SDR104 0x06c +#define SD3_PresetVal_DDR50 0x06e + +/* preset value indices */ +#define SD3_PRESETVAL_INITIAL_IX 0 +#define SD3_PRESETVAL_DESPEED_IX 1 +#define SD3_PRESETVAL_HISPEED_IX 2 +#define SD3_PRESETVAL_SDR12_IX 3 +#define SD3_PRESETVAL_SDR25_IX 4 +#define SD3_PRESETVAL_SDR50_IX 5 +#define SD3_PRESETVAL_SDR104_IX 6 +#define SD3_PRESETVAL_DDR50_IX 7 + +/* SD_Capabilities reg (0x040) */ +#define CAP_TO_CLKFREQ_M BITFIELD_MASK(6) +#define CAP_TO_CLKFREQ_S 0 +#define CAP_TO_CLKUNIT_M BITFIELD_MASK(1) +#define CAP_TO_CLKUNIT_S 7 +/* Note: for sdio-2.0 case, this mask has to be 6 bits, but msb 2 + bits are reserved. going ahead with 8 bits, as it is req for 3.0 +*/ +#define CAP_BASECLK_M BITFIELD_MASK(8) +#define CAP_BASECLK_S 8 +#define CAP_MAXBLOCK_M BITFIELD_MASK(2) +#define CAP_MAXBLOCK_S 16 +#define CAP_ADMA2_M BITFIELD_MASK(1) +#define CAP_ADMA2_S 19 +#define CAP_ADMA1_M BITFIELD_MASK(1) +#define CAP_ADMA1_S 20 +#define CAP_HIGHSPEED_M BITFIELD_MASK(1) +#define CAP_HIGHSPEED_S 21 +#define CAP_DMA_M BITFIELD_MASK(1) +#define CAP_DMA_S 22 +#define CAP_SUSPEND_M BITFIELD_MASK(1) +#define CAP_SUSPEND_S 23 +#define CAP_VOLT_3_3_M BITFIELD_MASK(1) +#define CAP_VOLT_3_3_S 24 +#define CAP_VOLT_3_0_M BITFIELD_MASK(1) +#define CAP_VOLT_3_0_S 25 +#define CAP_VOLT_1_8_M BITFIELD_MASK(1) +#define CAP_VOLT_1_8_S 26 +#define CAP_64BIT_HOST_M BITFIELD_MASK(1) +#define CAP_64BIT_HOST_S 28 + +#define SDIO_OCR_READ_FAIL (2) + + +#define CAP_ASYNCINT_SUP_M BITFIELD_MASK(1) +#define CAP_ASYNCINT_SUP_S 29 + +#define CAP_SLOTTYPE_M BITFIELD_MASK(2) +#define CAP_SLOTTYPE_S 30 + +#define CAP3_MSBits_OFFSET (32) +/* note: following are caps MSB32 bits. + So the bits start from 0, instead of 32. that is why + CAP3_MSBits_OFFSET is subtracted. +*/ +#define CAP3_SDR50_SUP_M BITFIELD_MASK(1) +#define CAP3_SDR50_SUP_S (32 - CAP3_MSBits_OFFSET) + +#define CAP3_SDR104_SUP_M BITFIELD_MASK(1) +#define CAP3_SDR104_SUP_S (33 - CAP3_MSBits_OFFSET) + +#define CAP3_DDR50_SUP_M BITFIELD_MASK(1) +#define CAP3_DDR50_SUP_S (34 - CAP3_MSBits_OFFSET) + +/* for knowing the clk caps in a single read */ +#define CAP3_30CLKCAP_M BITFIELD_MASK(3) +#define CAP3_30CLKCAP_S (32 - CAP3_MSBits_OFFSET) + +#define CAP3_DRIVTYPE_A_M BITFIELD_MASK(1) +#define CAP3_DRIVTYPE_A_S (36 - CAP3_MSBits_OFFSET) + +#define CAP3_DRIVTYPE_C_M BITFIELD_MASK(1) +#define CAP3_DRIVTYPE_C_S (37 - CAP3_MSBits_OFFSET) + +#define CAP3_DRIVTYPE_D_M BITFIELD_MASK(1) +#define CAP3_DRIVTYPE_D_S (38 - CAP3_MSBits_OFFSET) + +#define CAP3_RETUNING_TC_M BITFIELD_MASK(4) +#define CAP3_RETUNING_TC_S (40 - CAP3_MSBits_OFFSET) + +#define CAP3_TUNING_SDR50_M BITFIELD_MASK(1) +#define CAP3_TUNING_SDR50_S (45 - CAP3_MSBits_OFFSET) + +#define CAP3_RETUNING_MODES_M BITFIELD_MASK(2) +#define CAP3_RETUNING_MODES_S (46 - CAP3_MSBits_OFFSET) + +#define CAP3_CLK_MULT_M BITFIELD_MASK(8) +#define CAP3_CLK_MULT_S (48 - CAP3_MSBits_OFFSET) + +#define PRESET_DRIVR_SELECT_M BITFIELD_MASK(2) +#define PRESET_DRIVR_SELECT_S 14 + +#define PRESET_CLK_DIV_M BITFIELD_MASK(10) +#define PRESET_CLK_DIV_S 0 + +/* SD_MaxCurCap reg (0x048) */ +#define CAP_CURR_3_3_M BITFIELD_MASK(8) +#define CAP_CURR_3_3_S 0 +#define CAP_CURR_3_0_M BITFIELD_MASK(8) +#define CAP_CURR_3_0_S 8 +#define CAP_CURR_1_8_M BITFIELD_MASK(8) +#define CAP_CURR_1_8_S 16 + +/* SD_SysAddr: Offset 0x0000, Size 4 bytes */ + +/* SD_BlockSize: Offset 0x004, Size 2 bytes */ +#define BLKSZ_BLKSZ_M BITFIELD_MASK(12) +#define BLKSZ_BLKSZ_S 0 +#define BLKSZ_BNDRY_M BITFIELD_MASK(3) +#define BLKSZ_BNDRY_S 12 + +/* SD_BlockCount: Offset 0x006, size 2 bytes */ + +/* SD_Arg0: Offset 0x008, size = 4 bytes */ +/* SD_TransferMode Offset 0x00C, size = 2 bytes */ +#define XFER_DMA_ENABLE_M BITFIELD_MASK(1) +#define XFER_DMA_ENABLE_S 0 +#define XFER_BLK_COUNT_EN_M BITFIELD_MASK(1) +#define XFER_BLK_COUNT_EN_S 1 +#define XFER_CMD_12_EN_M BITFIELD_MASK(1) +#define XFER_CMD_12_EN_S 2 +#define XFER_DATA_DIRECTION_M BITFIELD_MASK(1) +#define XFER_DATA_DIRECTION_S 4 +#define XFER_MULTI_BLOCK_M BITFIELD_MASK(1) +#define XFER_MULTI_BLOCK_S 5 + +/* SD_Command: Offset 0x00E, size = 2 bytes */ +/* resp_type field */ +#define RESP_TYPE_NONE 0 +#define RESP_TYPE_136 1 +#define RESP_TYPE_48 2 +#define RESP_TYPE_48_BUSY 3 +/* type field */ +#define CMD_TYPE_NORMAL 0 +#define CMD_TYPE_SUSPEND 1 +#define CMD_TYPE_RESUME 2 +#define CMD_TYPE_ABORT 3 + +#define CMD_RESP_TYPE_M BITFIELD_MASK(2) /* Bits [0-1] - Response type */ +#define CMD_RESP_TYPE_S 0 +#define CMD_CRC_EN_M BITFIELD_MASK(1) /* Bit 3 - CRC enable */ +#define CMD_CRC_EN_S 3 +#define CMD_INDEX_EN_M BITFIELD_MASK(1) /* Bit 4 - Enable index checking */ +#define CMD_INDEX_EN_S 4 +#define CMD_DATA_EN_M BITFIELD_MASK(1) /* Bit 5 - Using DAT line */ +#define CMD_DATA_EN_S 5 +#define CMD_TYPE_M BITFIELD_MASK(2) /* Bit [6-7] - Normal, abort, resume, etc + */ +#define CMD_TYPE_S 6 +#define CMD_INDEX_M BITFIELD_MASK(6) /* Bits [8-13] - Command number */ +#define CMD_INDEX_S 8 + +/* SD_BufferDataPort0 : Offset 0x020, size = 2 or 4 bytes */ +/* SD_BufferDataPort1 : Offset 0x022, size = 2 bytes */ +/* SD_PresentState : Offset 0x024, size = 4 bytes */ +#define PRES_CMD_INHIBIT_M BITFIELD_MASK(1) /* Bit 0 May use CMD */ +#define PRES_CMD_INHIBIT_S 0 +#define PRES_DAT_INHIBIT_M BITFIELD_MASK(1) /* Bit 1 May use DAT */ +#define PRES_DAT_INHIBIT_S 1 +#define PRES_DAT_BUSY_M BITFIELD_MASK(1) /* Bit 2 DAT is busy */ +#define PRES_DAT_BUSY_S 2 +#define PRES_PRESENT_RSVD_M BITFIELD_MASK(5) /* Bit [3-7] rsvd */ +#define PRES_PRESENT_RSVD_S 3 +#define PRES_WRITE_ACTIVE_M BITFIELD_MASK(1) /* Bit 8 Write is active */ +#define PRES_WRITE_ACTIVE_S 8 +#define PRES_READ_ACTIVE_M BITFIELD_MASK(1) /* Bit 9 Read is active */ +#define PRES_READ_ACTIVE_S 9 +#define PRES_WRITE_DATA_RDY_M BITFIELD_MASK(1) /* Bit 10 Write buf is avail */ +#define PRES_WRITE_DATA_RDY_S 10 +#define PRES_READ_DATA_RDY_M BITFIELD_MASK(1) /* Bit 11 Read buf data avail */ +#define PRES_READ_DATA_RDY_S 11 +#define PRES_CARD_PRESENT_M BITFIELD_MASK(1) /* Bit 16 Card present - debounced */ +#define PRES_CARD_PRESENT_S 16 +#define PRES_CARD_STABLE_M BITFIELD_MASK(1) /* Bit 17 Debugging */ +#define PRES_CARD_STABLE_S 17 +#define PRES_CARD_PRESENT_RAW_M BITFIELD_MASK(1) /* Bit 18 Not debounced */ +#define PRES_CARD_PRESENT_RAW_S 18 +#define PRES_WRITE_ENABLED_M BITFIELD_MASK(1) /* Bit 19 Write protected? */ +#define PRES_WRITE_ENABLED_S 19 +#define PRES_DAT_SIGNAL_M BITFIELD_MASK(4) /* Bit [20-23] Debugging */ +#define PRES_DAT_SIGNAL_S 20 +#define PRES_CMD_SIGNAL_M BITFIELD_MASK(1) /* Bit 24 Debugging */ +#define PRES_CMD_SIGNAL_S 24 + +/* SD_HostCntrl: Offset 0x028, size = 1 bytes */ +#define HOST_LED_M BITFIELD_MASK(1) /* Bit 0 LED On/Off */ +#define HOST_LED_S 0 +#define HOST_DATA_WIDTH_M BITFIELD_MASK(1) /* Bit 1 4 bit enable */ +#define HOST_DATA_WIDTH_S 1 +#define HOST_HI_SPEED_EN_M BITFIELD_MASK(1) /* Bit 2 High speed vs low speed */ +#define HOST_DMA_SEL_S 3 +#define HOST_DMA_SEL_M BITFIELD_MASK(2) /* Bit 4:3 DMA Select */ +#define HOST_HI_SPEED_EN_S 2 + +/* Host Control2: */ +#define HOSTCtrl2_PRESVAL_EN_M BITFIELD_MASK(1) /* 1 bit */ +#define HOSTCtrl2_PRESVAL_EN_S 15 /* bit# */ + +#define HOSTCtrl2_ASYINT_EN_M BITFIELD_MASK(1) /* 1 bit */ +#define HOSTCtrl2_ASYINT_EN_S 14 /* bit# */ + +#define HOSTCtrl2_SAMPCLK_SEL_M BITFIELD_MASK(1) /* 1 bit */ +#define HOSTCtrl2_SAMPCLK_SEL_S 7 /* bit# */ + +#define HOSTCtrl2_EXEC_TUNING_M BITFIELD_MASK(1) /* 1 bit */ +#define HOSTCtrl2_EXEC_TUNING_S 6 /* bit# */ + +#define HOSTCtrl2_DRIVSTRENGTH_SEL_M BITFIELD_MASK(2) /* 2 bit */ +#define HOSTCtrl2_DRIVSTRENGTH_SEL_S 4 /* bit# */ + +#define HOSTCtrl2_1_8SIG_EN_M BITFIELD_MASK(1) /* 1 bit */ +#define HOSTCtrl2_1_8SIG_EN_S 3 /* bit# */ + +#define HOSTCtrl2_UHSMODE_SEL_M BITFIELD_MASK(3) /* 3 bit */ +#define HOSTCtrl2_UHSMODE_SEL_S 0 /* bit# */ + +#define HOST_CONTR_VER_2 (1) +#define HOST_CONTR_VER_3 (2) + +/* misc defines */ +#define SD1_MODE 0x1 /* SD Host Cntrlr Spec */ +#define SD4_MODE 0x2 /* SD Host Cntrlr Spec */ + +/* SD_PwrCntrl: Offset 0x029, size = 1 bytes */ +#define PWR_BUS_EN_M BITFIELD_MASK(1) /* Bit 0 Power the bus */ +#define PWR_BUS_EN_S 0 +#define PWR_VOLTS_M BITFIELD_MASK(3) /* Bit [1-3] Voltage Select */ +#define PWR_VOLTS_S 1 + +/* SD_SoftwareReset: Offset 0x02F, size = 1 byte */ +#define SW_RESET_ALL_M BITFIELD_MASK(1) /* Bit 0 Reset All */ +#define SW_RESET_ALL_S 0 +#define SW_RESET_CMD_M BITFIELD_MASK(1) /* Bit 1 CMD Line Reset */ +#define SW_RESET_CMD_S 1 +#define SW_RESET_DAT_M BITFIELD_MASK(1) /* Bit 2 DAT Line Reset */ +#define SW_RESET_DAT_S 2 + +/* SD_IntrStatus: Offset 0x030, size = 2 bytes */ +/* Defs also serve SD_IntrStatusEnable and SD_IntrSignalEnable */ +#define INTSTAT_CMD_COMPLETE_M BITFIELD_MASK(1) /* Bit 0 */ +#define INTSTAT_CMD_COMPLETE_S 0 +#define INTSTAT_XFER_COMPLETE_M BITFIELD_MASK(1) +#define INTSTAT_XFER_COMPLETE_S 1 +#define INTSTAT_BLOCK_GAP_EVENT_M BITFIELD_MASK(1) +#define INTSTAT_BLOCK_GAP_EVENT_S 2 +#define INTSTAT_DMA_INT_M BITFIELD_MASK(1) +#define INTSTAT_DMA_INT_S 3 +#define INTSTAT_BUF_WRITE_READY_M BITFIELD_MASK(1) +#define INTSTAT_BUF_WRITE_READY_S 4 +#define INTSTAT_BUF_READ_READY_M BITFIELD_MASK(1) +#define INTSTAT_BUF_READ_READY_S 5 +#define INTSTAT_CARD_INSERTION_M BITFIELD_MASK(1) +#define INTSTAT_CARD_INSERTION_S 6 +#define INTSTAT_CARD_REMOVAL_M BITFIELD_MASK(1) +#define INTSTAT_CARD_REMOVAL_S 7 +#define INTSTAT_CARD_INT_M BITFIELD_MASK(1) +#define INTSTAT_CARD_INT_S 8 +#define INTSTAT_RETUNING_INT_M BITFIELD_MASK(1) /* Bit 12 */ +#define INTSTAT_RETUNING_INT_S 12 +#define INTSTAT_ERROR_INT_M BITFIELD_MASK(1) /* Bit 15 */ +#define INTSTAT_ERROR_INT_S 15 + +/* SD_ErrorIntrStatus: Offset 0x032, size = 2 bytes */ +/* Defs also serve SD_ErrorIntrStatusEnable and SD_ErrorIntrSignalEnable */ +#define ERRINT_CMD_TIMEOUT_M BITFIELD_MASK(1) +#define ERRINT_CMD_TIMEOUT_S 0 +#define ERRINT_CMD_CRC_M BITFIELD_MASK(1) +#define ERRINT_CMD_CRC_S 1 +#define ERRINT_CMD_ENDBIT_M BITFIELD_MASK(1) +#define ERRINT_CMD_ENDBIT_S 2 +#define ERRINT_CMD_INDEX_M BITFIELD_MASK(1) +#define ERRINT_CMD_INDEX_S 3 +#define ERRINT_DATA_TIMEOUT_M BITFIELD_MASK(1) +#define ERRINT_DATA_TIMEOUT_S 4 +#define ERRINT_DATA_CRC_M BITFIELD_MASK(1) +#define ERRINT_DATA_CRC_S 5 +#define ERRINT_DATA_ENDBIT_M BITFIELD_MASK(1) +#define ERRINT_DATA_ENDBIT_S 6 +#define ERRINT_CURRENT_LIMIT_M BITFIELD_MASK(1) +#define ERRINT_CURRENT_LIMIT_S 7 +#define ERRINT_AUTO_CMD12_M BITFIELD_MASK(1) +#define ERRINT_AUTO_CMD12_S 8 +#define ERRINT_VENDOR_M BITFIELD_MASK(4) +#define ERRINT_VENDOR_S 12 +#define ERRINT_ADMA_M BITFIELD_MASK(1) +#define ERRINT_ADMA_S 9 + +/* Also provide definitions in "normal" form to allow combined masks */ +#define ERRINT_CMD_TIMEOUT_BIT 0x0001 +#define ERRINT_CMD_CRC_BIT 0x0002 +#define ERRINT_CMD_ENDBIT_BIT 0x0004 +#define ERRINT_CMD_INDEX_BIT 0x0008 +#define ERRINT_DATA_TIMEOUT_BIT 0x0010 +#define ERRINT_DATA_CRC_BIT 0x0020 +#define ERRINT_DATA_ENDBIT_BIT 0x0040 +#define ERRINT_CURRENT_LIMIT_BIT 0x0080 +#define ERRINT_AUTO_CMD12_BIT 0x0100 +#define ERRINT_ADMA_BIT 0x0200 + +/* Masks to select CMD vs. DATA errors */ +#define ERRINT_CMD_ERRS (ERRINT_CMD_TIMEOUT_BIT | ERRINT_CMD_CRC_BIT |\ + ERRINT_CMD_ENDBIT_BIT | ERRINT_CMD_INDEX_BIT) +#define ERRINT_DATA_ERRS (ERRINT_DATA_TIMEOUT_BIT | ERRINT_DATA_CRC_BIT |\ + ERRINT_DATA_ENDBIT_BIT | ERRINT_ADMA_BIT) +#define ERRINT_TRANSFER_ERRS (ERRINT_CMD_ERRS | ERRINT_DATA_ERRS) + +/* SD_WakeupCntr_BlockGapCntrl : Offset 0x02A , size = bytes */ +/* SD_ClockCntrl : Offset 0x02C , size = bytes */ +/* SD_SoftwareReset_TimeoutCntrl : Offset 0x02E , size = bytes */ +/* SD_IntrStatus : Offset 0x030 , size = bytes */ +/* SD_ErrorIntrStatus : Offset 0x032 , size = bytes */ +/* SD_IntrStatusEnable : Offset 0x034 , size = bytes */ +/* SD_ErrorIntrStatusEnable : Offset 0x036 , size = bytes */ +/* SD_IntrSignalEnable : Offset 0x038 , size = bytes */ +/* SD_ErrorIntrSignalEnable : Offset 0x03A , size = bytes */ +/* SD_CMD12ErrorStatus : Offset 0x03C , size = bytes */ +/* SD_Capabilities : Offset 0x040 , size = bytes */ +/* SD_MaxCurCap : Offset 0x048 , size = bytes */ +/* SD_MaxCurCap_Reserved: Offset 0x04C , size = bytes */ +/* SD_SlotInterruptStatus: Offset 0x0FC , size = bytes */ +/* SD_HostControllerVersion : Offset 0x0FE , size = bytes */ + +/* SDIO Host Control Register DMA Mode Definitions */ +#define SDIOH_SDMA_MODE 0 +#define SDIOH_ADMA1_MODE 1 +#define SDIOH_ADMA2_MODE 2 +#define SDIOH_ADMA2_64_MODE 3 + +#define ADMA2_ATTRIBUTE_VALID (1 << 0) /* ADMA Descriptor line valid */ +#define ADMA2_ATTRIBUTE_END (1 << 1) /* End of Descriptor */ +#define ADMA2_ATTRIBUTE_INT (1 << 2) /* Interrupt when line is done */ +#define ADMA2_ATTRIBUTE_ACT_NOP (0 << 4) /* Skip current line, go to next. */ +#define ADMA2_ATTRIBUTE_ACT_RSV (1 << 4) /* Same as NOP */ +#define ADMA1_ATTRIBUTE_ACT_SET (1 << 4) /* ADMA1 Only - set transfer length */ +#define ADMA2_ATTRIBUTE_ACT_TRAN (2 << 4) /* Transfer Data of one descriptor line. */ +#define ADMA2_ATTRIBUTE_ACT_LINK (3 << 4) /* Link Descriptor */ + +/* ADMA2 Descriptor Table Entry for 32-bit Address */ +typedef struct adma2_dscr_32b { + uint32 len_attr; + uint32 phys_addr; +} adma2_dscr_32b_t; + +/* ADMA1 Descriptor Table Entry */ +typedef struct adma1_dscr { + uint32 phys_addr_attr; +} adma1_dscr_t; + +#endif /* _SDIOH_H */ diff --git a/external/cache/sources/wl/include/sdiovar.h b/external/cache/sources/wl/include/sdiovar.h new file mode 100644 index 0000000..285ec0b --- /dev/null +++ b/external/cache/sources/wl/include/sdiovar.h @@ -0,0 +1,63 @@ +/* + * Structure used by apps whose drivers access SDIO drivers. + * Pulled out separately so dhdu and wlu can both use it. + * + * $ Copyright Open Broadcom Corporation $ + * + * $Id: sdiovar.h 241182 2011-02-17 21:50:03Z $ + */ + +#ifndef _sdiovar_h_ +#define _sdiovar_h_ + +#include + +/* require default structure packing */ +#define BWL_DEFAULT_PACKING +#include + +typedef struct sdreg { + int func; + int offset; + int value; +} sdreg_t; + +/* Common msglevel constants */ +#define SDH_ERROR_VAL 0x0001 /* Error */ +#define SDH_TRACE_VAL 0x0002 /* Trace */ +#define SDH_INFO_VAL 0x0004 /* Info */ +#define SDH_DEBUG_VAL 0x0008 /* Debug */ +#define SDH_DATA_VAL 0x0010 /* Data */ +#define SDH_CTRL_VAL 0x0020 /* Control Regs */ +#define SDH_LOG_VAL 0x0040 /* Enable bcmlog */ +#define SDH_DMA_VAL 0x0080 /* DMA */ + +#define NUM_PREV_TRANSACTIONS 16 + +#ifdef BCMSPI +/* Error statistics for gSPI */ +struct spierrstats_t { + uint32 dna; /* The requested data is not available. */ + uint32 rdunderflow; /* FIFO underflow happened due to current (F2, F3) rd command */ + uint32 wroverflow; /* FIFO underflow happened due to current (F1, F2, F3) wr command */ + + uint32 f2interrupt; /* OR of all F2 related intr status bits. */ + uint32 f3interrupt; /* OR of all F3 related intr status bits. */ + + uint32 f2rxnotready; /* F2 FIFO is not ready to receive data (FIFO empty) */ + uint32 f3rxnotready; /* F3 FIFO is not ready to receive data (FIFO empty) */ + + uint32 hostcmddataerr; /* Error in command or host data, detected by CRC/checksum + * (optional) + */ + uint32 f2pktavailable; /* Packet is available in F2 TX FIFO */ + uint32 f3pktavailable; /* Packet is available in F2 TX FIFO */ + + uint32 dstatus[NUM_PREV_TRANSACTIONS]; /* dstatus bits of last 16 gSPI transactions */ + uint32 spicmd[NUM_PREV_TRANSACTIONS]; +}; +#endif /* BCMSPI */ + +#include + +#endif /* _sdiovar_h_ */ diff --git a/external/cache/sources/wl/include/siutils.h b/external/cache/sources/wl/include/siutils.h new file mode 100644 index 0000000..0bc65cb --- /dev/null +++ b/external/cache/sources/wl/include/siutils.h @@ -0,0 +1,379 @@ +/* + * Misc utility routines for accessing the SOC Interconnects + * of Broadcom HNBU chips. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: siutils.h 395358 2013-04-06 07:45:27Z $ + */ + +#ifndef _siutils_h_ +#define _siutils_h_ + + +#include + + +struct si_pub { + uint socitype; + + uint bustype; + uint buscoretype; + uint buscorerev; + uint buscoreidx; + int ccrev; + uint32 cccaps; + uint32 cccaps_ext; + int pmurev; + uint32 pmucaps; + uint boardtype; + uint boardrev; + uint boardvendor; + uint boardflags; + uint boardflags2; + uint chip; + uint chiprev; + uint chippkg; + uint32 chipst; + bool issim; + uint socirev; + bool pci_pr32414; + +}; + + +typedef const struct si_pub si_t; + + + +#define SI_OSH NULL + +#define BADIDX (SI_MAXCORES + 1) + + +#define XTAL 0x1 +#define PLL 0x2 + + +#define CLK_FAST 0 +#define CLK_DYNAMIC 2 + + +#define GPIO_DRV_PRIORITY 0 +#define GPIO_APP_PRIORITY 1 +#define GPIO_HI_PRIORITY 2 + + +#define GPIO_PULLUP 0 +#define GPIO_PULLDN 1 + + +#define GPIO_REGEVT 0 +#define GPIO_REGEVT_INTMSK 1 +#define GPIO_REGEVT_INTPOL 2 + + +#define SI_DEVPATH_BUFSZ 16 + + +#define SI_DOATTACH 1 +#define SI_PCIDOWN 2 +#define SI_PCIUP 3 + +#define ISSIM_ENAB(sih) FALSE + + +#if defined(BCMPMUCTL) +#define PMUCTL_ENAB(sih) (BCMPMUCTL) +#else +#define PMUCTL_ENAB(sih) ((sih)->cccaps & CC_CAP_PMU) +#endif + + +#if defined(BCMPMUCTL) && BCMPMUCTL +#define CCCTL_ENAB(sih) (0) +#define CCPLL_ENAB(sih) (0) +#else +#define CCCTL_ENAB(sih) ((sih)->cccaps & CC_CAP_PWR_CTL) +#define CCPLL_ENAB(sih) ((sih)->cccaps & CC_CAP_PLL_MASK) +#endif + +typedef void (*gpio_handler_t)(uint32 stat, void *arg); + +#define CC_BTCOEX_EN_MASK 0x01 + +#define GPIO_CTRL_EPA_EN_MASK 0x40 + +#define GPIO_CTRL_5_6_EN_MASK 0x60 +#define GPIO_CTRL_7_6_EN_MASK 0xC0 +#define GPIO_OUT_7_EN_MASK 0x80 + + + +#define SI_CR4_CAP (0x04) +#define SI_CR4_BANKIDX (0x40) +#define SI_CR4_BANKINFO (0x44) + +#define ARMCR4_TCBBNB_MASK 0xf0 +#define ARMCR4_TCBBNB_SHIFT 4 +#define ARMCR4_TCBANB_MASK 0xf +#define ARMCR4_TCBANB_SHIFT 0 + +#define SICF_CPUHALT (0x0020) +#define ARMCR4_BSZ_MASK 0x3f +#define ARMCR4_BSZ_MULT 8192 + + + +extern si_t *si_attach(uint pcidev, osl_t *osh, void *regs, uint bustype, + void *sdh, char **vars, uint *varsz); +extern si_t *si_kattach(osl_t *osh); +extern void si_detach(si_t *sih); +extern bool si_pci_war16165(si_t *sih); + +extern uint si_corelist(si_t *sih, uint coreid[]); +extern uint si_coreid(si_t *sih); +extern uint si_flag(si_t *sih); +extern uint si_flag_alt(si_t *sih); +extern uint si_intflag(si_t *sih); +extern uint si_coreidx(si_t *sih); +extern uint si_coreunit(si_t *sih); +extern uint si_corevendor(si_t *sih); +extern uint si_corerev(si_t *sih); +extern void *si_osh(si_t *sih); +extern void si_setosh(si_t *sih, osl_t *osh); +extern uint si_corereg(si_t *sih, uint coreidx, uint regoff, uint mask, uint val); +extern void *si_coreregs(si_t *sih); +extern uint si_wrapperreg(si_t *sih, uint32 offset, uint32 mask, uint32 val); +extern uint si_core_wrapperreg(si_t *sih, uint32 coreidx, uint32 offset, uint32 mask, uint32 val); +extern void *si_wrapperregs(si_t *sih); +extern uint32 si_core_cflags(si_t *sih, uint32 mask, uint32 val); +extern void si_core_cflags_wo(si_t *sih, uint32 mask, uint32 val); +extern uint32 si_core_sflags(si_t *sih, uint32 mask, uint32 val); +extern bool si_iscoreup(si_t *sih); +extern uint si_findcoreidx(si_t *sih, uint coreid, uint coreunit); +extern void *si_setcoreidx(si_t *sih, uint coreidx); +extern void *si_setcore(si_t *sih, uint coreid, uint coreunit); +extern void *si_switch_core(si_t *sih, uint coreid, uint *origidx, uint *intr_val); +extern void si_restore_core(si_t *sih, uint coreid, uint intr_val); +extern int si_numaddrspaces(si_t *sih); +extern uint32 si_addrspace(si_t *sih, uint asidx); +extern uint32 si_addrspacesize(si_t *sih, uint asidx); +extern void si_coreaddrspaceX(si_t *sih, uint asidx, uint32 *addr, uint32 *size); +extern int si_corebist(si_t *sih); +extern void si_core_reset(si_t *sih, uint32 bits, uint32 resetbits); +extern void si_core_disable(si_t *sih, uint32 bits); +extern uint32 si_clock_rate(uint32 pll_type, uint32 n, uint32 m); +extern uint si_chip_hostif(si_t *sih); +extern bool si_read_pmu_autopll(si_t *sih); +extern uint32 si_clock(si_t *sih); +extern uint32 si_alp_clock(si_t *sih); +extern uint32 si_ilp_clock(si_t *sih); +extern void si_pci_setup(si_t *sih, uint coremask); +extern void si_pcmcia_init(si_t *sih); +extern void si_setint(si_t *sih, int siflag); +extern bool si_backplane64(si_t *sih); +extern void si_register_intr_callback(si_t *sih, void *intrsoff_fn, void *intrsrestore_fn, + void *intrsenabled_fn, void *intr_arg); +extern void si_deregister_intr_callback(si_t *sih); +extern void si_clkctl_init(si_t *sih); +extern uint16 si_clkctl_fast_pwrup_delay(si_t *sih); +extern bool si_clkctl_cc(si_t *sih, uint mode); +extern int si_clkctl_xtal(si_t *sih, uint what, bool on); +extern uint32 si_gpiotimerval(si_t *sih, uint32 mask, uint32 val); +extern void si_btcgpiowar(si_t *sih); +extern bool si_deviceremoved(si_t *sih); +extern uint32 si_socram_size(si_t *sih); +extern uint32 si_socdevram_size(si_t *sih); +extern void si_socdevram(si_t *sih, bool set, uint8 *ennable, uint8 *protect, uint8 *remap); +extern bool si_socdevram_pkg(si_t *sih); +extern bool si_socdevram_remap_isenb(si_t *sih); +extern uint32 si_socdevram_remap_size(si_t *sih); + +extern void si_watchdog(si_t *sih, uint ticks); +extern void si_watchdog_ms(si_t *sih, uint32 ms); +extern uint32 si_watchdog_msticks(void); +extern void *si_gpiosetcore(si_t *sih); +extern uint32 si_gpiocontrol(si_t *sih, uint32 mask, uint32 val, uint8 priority); +extern uint32 si_gpioouten(si_t *sih, uint32 mask, uint32 val, uint8 priority); +extern uint32 si_gpioout(si_t *sih, uint32 mask, uint32 val, uint8 priority); +extern uint32 si_gpioin(si_t *sih); +extern uint32 si_gpiointpolarity(si_t *sih, uint32 mask, uint32 val, uint8 priority); +extern uint32 si_gpiointmask(si_t *sih, uint32 mask, uint32 val, uint8 priority); +extern uint32 si_gpioled(si_t *sih, uint32 mask, uint32 val); +extern uint32 si_gpioreserve(si_t *sih, uint32 gpio_num, uint8 priority); +extern uint32 si_gpiorelease(si_t *sih, uint32 gpio_num, uint8 priority); +extern uint32 si_gpiopull(si_t *sih, bool updown, uint32 mask, uint32 val); +extern uint32 si_gpioevent(si_t *sih, uint regtype, uint32 mask, uint32 val); +extern uint32 si_gpio_int_enable(si_t *sih, bool enable); + + +extern void *si_gpio_handler_register(si_t *sih, uint32 e, bool lev, gpio_handler_t cb, void *arg); +extern void si_gpio_handler_unregister(si_t *sih, void* gpioh); +extern void si_gpio_handler_process(si_t *sih); + + +extern bool si_pci_pmecap(si_t *sih); +struct osl_info; +extern bool si_pci_fastpmecap(struct osl_info *osh); +extern bool si_pci_pmestat(si_t *sih); +extern void si_pci_pmeclr(si_t *sih); +extern void si_pci_pmeen(si_t *sih); +extern void si_pci_pmestatclr(si_t *sih); +extern uint si_pcie_readreg(void *sih, uint addrtype, uint offset); +extern uint si_pcie_writereg(void *sih, uint addrtype, uint offset, uint val); + + +extern void si_sdio_init(si_t *sih); + +extern uint16 si_d11_devid(si_t *sih); +extern int si_corepciid(si_t *sih, uint func, uint16 *pcivendor, uint16 *pcidevice, + uint8 *pciclass, uint8 *pcisubclass, uint8 *pciprogif, uint8 *pciheader); + +#define si_eci(sih) 0 +static INLINE void * si_eci_init(si_t *sih) {return NULL;} +#define si_eci_notify_bt(sih, type, val) (0) +#define si_seci(sih) 0 +#define si_seci_upd(sih, a) do {} while (0) +static INLINE void * si_seci_init(si_t *sih, uint8 use_seci) {return NULL;} +static INLINE void * si_gci_init(si_t *sih) {return NULL;} +#define si_seci_down(sih) do {} while (0) +#define si_gci(sih) 0 + + +extern bool si_is_otp_disabled(si_t *sih); +extern bool si_is_otp_powered(si_t *sih); +extern void si_otp_power(si_t *sih, bool on); + + +extern bool si_is_sprom_available(si_t *sih); +extern bool si_is_sprom_enabled(si_t *sih); +extern void si_sprom_enable(si_t *sih, bool enable); + + +extern int si_cis_source(si_t *sih); +#define CIS_DEFAULT 0 +#define CIS_SROM 1 +#define CIS_OTP 2 + + +#define DEFAULT_FAB 0x0 +#define CSM_FAB7 0x1 +#define TSMC_FAB12 0x2 +#define SMIC_FAB4 0x3 + +extern int BCMINITFN(si_otp_fabid)(si_t *sih, uint16 *fabid, bool rw); +extern uint16 BCMATTACHFN(si_fabid)(si_t *sih); + + +extern int si_devpath(si_t *sih, char *path, int size); + +extern char *si_getdevpathvar(si_t *sih, const char *name); +extern int si_getdevpathintvar(si_t *sih, const char *name); +extern char *si_coded_devpathvar(si_t *sih, char *varname, int var_len, const char *name); + + +extern uint8 si_pcieclkreq(si_t *sih, uint32 mask, uint32 val); +extern uint32 si_pcielcreg(si_t *sih, uint32 mask, uint32 val); +extern uint8 si_pcieltrenable(si_t *sih, uint32 mask, uint32 val); +extern uint8 si_pcieobffenable(si_t *sih, uint32 mask, uint32 val); +extern uint32 si_pcieltr_reg(si_t *sih, uint32 reg, uint32 mask, uint32 val); +extern uint32 si_pcieltrspacing_reg(si_t *sih, uint32 mask, uint32 val); +extern uint32 si_pcieltrhysteresiscnt_reg(si_t *sih, uint32 mask, uint32 val); +extern void si_pcie_set_error_injection(si_t *sih, uint32 mode); +extern void si_pcie_set_L1substate(si_t *sih, uint32 substate); +extern uint32 si_pcie_get_L1substate(si_t *sih); +extern void si_war42780_clkreq(si_t *sih, bool clkreq); +extern void si_pci_down(si_t *sih); +extern void si_pci_up(si_t *sih); +extern void si_pci_sleep(si_t *sih); +extern void si_pcie_war_ovr_update(si_t *sih, uint8 aspm); +extern void si_pcie_power_save_enable(si_t *sih, bool enable); +extern void si_pcie_extendL1timer(si_t *sih, bool extend); +extern int si_pci_fixcfg(si_t *sih); +extern void si_chippkg_set(si_t *sih, uint); + +extern void si_chipcontrl_btshd0_4331(si_t *sih, bool on); +extern void si_chipcontrl_restore(si_t *sih, uint32 val); +extern uint32 si_chipcontrl_read(si_t *sih); +extern void si_chipcontrl_epa4331(si_t *sih, bool on); +extern void si_chipcontrl_epa4331_wowl(si_t *sih, bool enter_wowl); +extern void si_chipcontrl_srom4360(si_t *sih, bool on); + +extern void si_epa_4313war(si_t *sih); +extern void si_btc_enable_chipcontrol(si_t *sih); + +extern void si_btcombo_p250_4313_war(si_t *sih); +extern void si_btcombo_43228_war(si_t *sih); +extern void si_clk_pmu_htavail_set(si_t *sih, bool set_clear); +extern void si_pmu_synth_pwrsw_4313_war(si_t *sih); +extern uint si_pll_reset(si_t *sih); + + +extern bool si_taclear(si_t *sih, bool details); + + +extern uint32 si_ccreg(si_t *sih, uint32 offset, uint32 mask, uint32 val); +extern uint32 si_pciereg(si_t *sih, uint32 offset, uint32 mask, uint32 val, uint type); +extern uint32 write_ccreg(si_t *sih, uint32 offset, uint32 mask, uint32 val); +extern uint32 si_pcieserdesreg(si_t *sih, uint32 mdioslave, uint32 offset, uint32 mask, uint32 val); +extern void si_pcie_set_request_size(si_t *sih, uint16 size); +extern uint16 si_pcie_get_request_size(si_t *sih); +extern void si_pcie_set_maxpayload_size(si_t *sih, uint16 size); +extern uint16 si_pcie_get_maxpayload_size(si_t *sih); +extern uint16 si_pcie_get_ssid(si_t *sih); +extern uint32 si_pcie_get_bar0(si_t *sih); +extern int si_pcie_configspace_cache(si_t *sih); +extern int si_pcie_configspace_restore(si_t *sih); +extern int si_pcie_configspace_get(si_t *sih, uint8 *buf, uint size); + +char *si_getnvramflvar(si_t *sih, const char *name); + + +extern uint32 si_tcm_size(si_t *sih); +extern bool si_has_flops(si_t *sih); + +extern uint32 si_gci_direct(si_t *sih, uint offset, uint32 mask, uint32 val); +extern uint32 si_gci_indirect(si_t *sih, uint regidx, uint offset, uint32 mask, uint32 val); +extern uint32 si_gci_output(si_t *sih, uint reg, uint32 mask, uint32 val); +extern uint32 si_gci_input(si_t *sih, uint reg); +extern uint32 si_gci_int_enable(si_t *sih, bool enable); +extern void si_gci_reset(si_t *sih); +extern void si_ercx_init(si_t *sih); +extern void si_wci2_init(si_t *sih); +extern void si_gci_seci_init(si_t *sih); +extern void si_gci_set_functionsel(si_t *sih, uint32 pin, uint8 fnsel); +extern uint8 si_gci_get_chipctrlreg_idx(uint32 pin, uint32 *regidx, uint32 *pos); +extern uint32 si_gci_chipcontrol(si_t *sih, uint reg, uint32 mask, uint32 val); +extern int si_set_sromctl(si_t *sih, uint32 value); +extern uint32 si_get_sromctl(si_t *sih); + +extern uint16 si_cc_get_reg16(uint32 reg_offs); +extern uint32 si_cc_get_reg32(uint32 reg_offs); +extern uint32 si_cc_set_reg32(uint32 reg_offs, uint32 val); +extern uint32 si_gci_preinit_upd_indirect(uint32 regidx, uint32 setval, uint32 mask); + +extern uint si_chipid_override(si_t *sih); +extern uint si_chiprev_override(si_t *sih); + +#define CHIPCTRLREG1 0x1 +#define CHIPCTRLREG2 0x2 +#define CHIPCTRLREG3 0x3 +#define CHIPCTRLREG4 0x4 +#define CHIPCTRLREG5 0x5 +#define REGCTRLREG4 0x4 +#define MINRESMASKREG 0x618 +#define MAXRESMASKREG 0x61c +#define CHIPCTRLADDR 0x650 +#define CHIPCTRLDATA 0x654 +#define RSRCTABLEADDR 0x620 +#define RSRCUPDWNTIME 0x628 +#define PMUREG_RESREQ_MASK 0x68c + +extern void si_update_masks(si_t *sih); + +extern void si_force_islanding(si_t *sih, bool enable); + +extern uint32 si_pmu_res_req_timer_clr(si_t *sih); +extern void si_pmu_rfldo(si_t *sih, bool on); +#endif diff --git a/external/cache/sources/wl/include/spid.h b/external/cache/sources/wl/include/spid.h new file mode 100644 index 0000000..be3d009 --- /dev/null +++ b/external/cache/sources/wl/include/spid.h @@ -0,0 +1,153 @@ +/* + * SPI device spec header file + * + * Copyright (C) 2013, Broadcom Corporation + * All Rights Reserved. + * + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation; + * the contents of this file may not be disclosed to third parties, copied + * or duplicated in any form, in whole or in part, without the prior + * written permission of Broadcom Corporation. + * + * $Id: spid.h 241182 2011-02-17 21:50:03Z $ + */ + +#ifndef _SPI_H +#define _SPI_H + +/* + * Brcm SPI Device Register Map. + * + */ + +typedef volatile struct { + uint8 config; /* 0x00, len, endian, clock, speed, polarity, wakeup */ + uint8 response_delay; /* 0x01, read response delay in bytes (corerev < 3) */ + uint8 status_enable; /* 0x02, status-enable, intr with status, response_delay + * function selection, command/data error check + */ + uint8 reset_bp; /* 0x03, reset on wlan/bt backplane reset (corerev >= 1) */ + uint16 intr_reg; /* 0x04, Intr status register */ + uint16 intr_en_reg; /* 0x06, Intr mask register */ + uint32 status_reg; /* 0x08, RO, Status bits of last spi transfer */ + uint16 f1_info_reg; /* 0x0c, RO, enabled, ready for data transfer, blocksize */ + uint16 f2_info_reg; /* 0x0e, RO, enabled, ready for data transfer, blocksize */ + uint16 f3_info_reg; /* 0x10, RO, enabled, ready for data transfer, blocksize */ + uint32 test_read; /* 0x14, RO 0xfeedbead signature */ + uint32 test_rw; /* 0x18, RW */ + uint8 resp_delay_f0; /* 0x1c, read resp delay bytes for F0 (corerev >= 3) */ + uint8 resp_delay_f1; /* 0x1d, read resp delay bytes for F1 (corerev >= 3) */ + uint8 resp_delay_f2; /* 0x1e, read resp delay bytes for F2 (corerev >= 3) */ + uint8 resp_delay_f3; /* 0x1f, read resp delay bytes for F3 (corerev >= 3) */ +} spi_regs_t; + +/* SPI device register offsets */ +#define SPID_CONFIG 0x00 +#define SPID_RESPONSE_DELAY 0x01 +#define SPID_STATUS_ENABLE 0x02 +#define SPID_RESET_BP 0x03 /* (corerev >= 1) */ +#define SPID_INTR_REG 0x04 /* 16 bits - Interrupt status */ +#define SPID_INTR_EN_REG 0x06 /* 16 bits - Interrupt mask */ +#define SPID_STATUS_REG 0x08 /* 32 bits */ +#define SPID_F1_INFO_REG 0x0C /* 16 bits */ +#define SPID_F2_INFO_REG 0x0E /* 16 bits */ +#define SPID_F3_INFO_REG 0x10 /* 16 bits */ +#define SPID_TEST_READ 0x14 /* 32 bits */ +#define SPID_TEST_RW 0x18 /* 32 bits */ +#define SPID_RESP_DELAY_F0 0x1c /* 8 bits (corerev >= 3) */ +#define SPID_RESP_DELAY_F1 0x1d /* 8 bits (corerev >= 3) */ +#define SPID_RESP_DELAY_F2 0x1e /* 8 bits (corerev >= 3) */ +#define SPID_RESP_DELAY_F3 0x1f /* 8 bits (corerev >= 3) */ + +/* Bit masks for SPID_CONFIG device register */ +#define WORD_LENGTH_32 0x1 /* 0/1 16/32 bit word length */ +#define ENDIAN_BIG 0x2 /* 0/1 Little/Big Endian */ +#define CLOCK_PHASE 0x4 /* 0/1 clock phase delay */ +#define CLOCK_POLARITY 0x8 /* 0/1 Idle state clock polarity is low/high */ +#define HIGH_SPEED_MODE 0x10 /* 1/0 High Speed mode / Normal mode */ +#define INTR_POLARITY 0x20 /* 1/0 Interrupt active polarity is high/low */ +#define WAKE_UP 0x80 /* 0/1 Wake-up command from Host to WLAN */ + +/* Bit mask for SPID_RESPONSE_DELAY device register */ +#define RESPONSE_DELAY_MASK 0xFF /* Configurable rd response delay in multiples of 8 bits */ + +/* Bit mask for SPID_STATUS_ENABLE device register */ +#define STATUS_ENABLE 0x1 /* 1/0 Status sent/not sent to host after read/write */ +#define INTR_WITH_STATUS 0x2 /* 0/1 Do-not / do-interrupt if status is sent */ +#define RESP_DELAY_ALL 0x4 /* Applicability of resp delay to F1 or all func's read */ +#define DWORD_PKT_LEN_EN 0x8 /* Packet len denoted in dwords instead of bytes */ +#define CMD_ERR_CHK_EN 0x20 /* Command error check enable */ +#define DATA_ERR_CHK_EN 0x40 /* Data error check enable */ + +/* Bit mask for SPID_RESET_BP device register */ +#define RESET_ON_WLAN_BP_RESET 0x4 /* enable reset for WLAN backplane */ +#define RESET_ON_BT_BP_RESET 0x8 /* enable reset for BT backplane */ +#define RESET_SPI 0x80 /* reset the above enabled logic */ + +/* Bit mask for SPID_INTR_REG device register */ +#define DATA_UNAVAILABLE 0x0001 /* Requested data not available; Clear by writing a "1" */ +#define F2_F3_FIFO_RD_UNDERFLOW 0x0002 +#define F2_F3_FIFO_WR_OVERFLOW 0x0004 +#define COMMAND_ERROR 0x0008 /* Cleared by writing 1 */ +#define DATA_ERROR 0x0010 /* Cleared by writing 1 */ +#define F2_PACKET_AVAILABLE 0x0020 +#define F3_PACKET_AVAILABLE 0x0040 +#define F1_OVERFLOW 0x0080 /* Due to last write. Bkplane has pending write requests */ +#define MISC_INTR0 0x0100 +#define MISC_INTR1 0x0200 +#define MISC_INTR2 0x0400 +#define MISC_INTR3 0x0800 +#define MISC_INTR4 0x1000 +#define F1_INTR 0x2000 +#define F2_INTR 0x4000 +#define F3_INTR 0x8000 + +/* Bit mask for 32bit SPID_STATUS_REG device register */ +#define STATUS_DATA_NOT_AVAILABLE 0x00000001 +#define STATUS_UNDERFLOW 0x00000002 +#define STATUS_OVERFLOW 0x00000004 +#define STATUS_F2_INTR 0x00000008 +#define STATUS_F3_INTR 0x00000010 +#define STATUS_F2_RX_READY 0x00000020 +#define STATUS_F3_RX_READY 0x00000040 +#define STATUS_HOST_CMD_DATA_ERR 0x00000080 +#define STATUS_F2_PKT_AVAILABLE 0x00000100 +#define STATUS_F2_PKT_LEN_MASK 0x000FFE00 +#define STATUS_F2_PKT_LEN_SHIFT 9 +#define STATUS_F3_PKT_AVAILABLE 0x00100000 +#define STATUS_F3_PKT_LEN_MASK 0xFFE00000 +#define STATUS_F3_PKT_LEN_SHIFT 21 + +/* Bit mask for 16 bits SPID_F1_INFO_REG device register */ +#define F1_ENABLED 0x0001 +#define F1_RDY_FOR_DATA_TRANSFER 0x0002 +#define F1_MAX_PKT_SIZE 0x01FC + +/* Bit mask for 16 bits SPID_F2_INFO_REG device register */ +#define F2_ENABLED 0x0001 +#define F2_RDY_FOR_DATA_TRANSFER 0x0002 +#define F2_MAX_PKT_SIZE 0x3FFC + +/* Bit mask for 16 bits SPID_F3_INFO_REG device register */ +#define F3_ENABLED 0x0001 +#define F3_RDY_FOR_DATA_TRANSFER 0x0002 +#define F3_MAX_PKT_SIZE 0x3FFC + +/* Bit mask for 32 bits SPID_TEST_READ device register read in 16bit LE mode */ +#define TEST_RO_DATA_32BIT_LE 0xFEEDBEAD + +/* Maximum number of I/O funcs */ +#define SPI_MAX_IOFUNCS 4 + +#define SPI_MAX_PKT_LEN (2048*4) + +/* Misc defines */ +#define SPI_FUNC_0 0 +#define SPI_FUNC_1 1 +#define SPI_FUNC_2 2 +#define SPI_FUNC_3 3 + +#define WAIT_F2RXFIFORDY 100 +#define WAIT_F2RXFIFORDY_DELAY 20 + +#endif /* _SPI_H */ diff --git a/external/cache/sources/wl/include/trxhdr.h b/external/cache/sources/wl/include/trxhdr.h new file mode 100644 index 0000000..b015e0b --- /dev/null +++ b/external/cache/sources/wl/include/trxhdr.h @@ -0,0 +1,74 @@ +/* + * TRX image file header format. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: trxhdr.h 314841 2012-02-14 18:28:33Z chandrum $ + */ + +#ifndef _TRX_HDR_H +#define _TRX_HDR_H + +#include + +#define TRX_MAGIC 0x30524448 /* "HDR0" */ +#define TRX_MAX_LEN 0x3B0000 /* Max length */ +#define TRX_NO_HEADER 1 /* Do not write TRX header */ +#define TRX_GZ_FILES 0x2 /* Contains up to TRX_MAX_OFFSET individual gzip files */ +#define TRX_EMBED_UCODE 0x8 /* Trx contains embedded ucode image */ +#define TRX_ROMSIM_IMAGE 0x10 /* Trx contains ROM simulation image */ +#define TRX_UNCOMP_IMAGE 0x20 /* Trx contains uncompressed rtecdc.bin image */ +#define TRX_BOOTLOADER 0x40 /* the image is a bootloader */ + +#define TRX_V1 1 +#define TRX_V1_MAX_OFFSETS 3 /* V1: Max number of individual files */ + +#ifndef BCMTRXV2 +#define TRX_VERSION TRX_V1 /* Version 1 */ +#define TRX_MAX_OFFSET TRX_V1_MAX_OFFSETS +#endif + +/* BMAC Host driver/application like bcmdl need to support both Ver 1 as well as + * Ver 2 of trx header. To make it generic, trx_header is structure is modified + * as below where size of "offsets" field will vary as per the TRX version. + * Currently, BMAC host driver and bcmdl are modified to support TRXV2 as well. + * To make sure, other applications like "dhdl" which are yet to be enhanced to support + * TRXV2 are not broken, new macro and structure defintion take effect only when BCMTRXV2 + * is defined. + */ +struct trx_header { + uint32 magic; /* "HDR0" */ + uint32 len; /* Length of file including header */ + uint32 crc32; /* 32-bit CRC from flag_version to end of file */ + uint32 flag_version; /* 0:15 flags, 16:31 version */ +#ifndef BCMTRXV2 + uint32 offsets[TRX_MAX_OFFSET]; /* Offsets of partitions from start of header */ +#else + uint32 offsets[1]; /* Offsets of partitions from start of header */ +#endif +}; + +#ifdef BCMTRXV2 +#define TRX_VERSION TRX_V2 /* Version 2 */ +#define TRX_MAX_OFFSET TRX_V2_MAX_OFFSETS + +#define TRX_V2 2 +/* V2: Max number of individual files + * To support SDR signature + Config data region + */ +#define TRX_V2_MAX_OFFSETS 5 +#define SIZEOF_TRXHDR_V1 (sizeof(struct trx_header)+(TRX_V1_MAX_OFFSETS-1)*sizeof(uint32)) +#define SIZEOF_TRXHDR_V2 (sizeof(struct trx_header)+(TRX_V2_MAX_OFFSETS-1)*sizeof(uint32)) +#define TRX_VER(trx) (trx->flag_version>>16) +#define ISTRX_V1(trx) (TRX_VER(trx) == TRX_V1) +#define ISTRX_V2(trx) (TRX_VER(trx) == TRX_V2) +/* For V2, return size of V2 size: others, return V1 size */ +#define SIZEOF_TRX(trx) (ISTRX_V2(trx) ? SIZEOF_TRXHDR_V2: SIZEOF_TRXHDR_V1) +#else +#define SIZEOF_TRX(trx) (sizeof(struct trx_header)) +#endif /* BCMTRXV2 */ + +/* Compatibility */ +typedef struct trx_header TRXHDR, *PTRXHDR; + +#endif /* _TRX_HDR_H */ diff --git a/external/cache/sources/wl/include/typedefs.h b/external/cache/sources/wl/include/typedefs.h new file mode 100644 index 0000000..66dd97b --- /dev/null +++ b/external/cache/sources/wl/include/typedefs.h @@ -0,0 +1,442 @@ +/* + * $Copyright Open Broadcom Corporation$ + * $Id: typedefs.h 401759 2013-05-13 16:08:08Z sudhirbs $ + */ + +#ifndef _TYPEDEFS_H_ +#define _TYPEDEFS_H_ + +#ifdef SITE_TYPEDEFS + +/* + * Define SITE_TYPEDEFS in the compile to include a site-specific + * typedef file "site_typedefs.h". + * + * If SITE_TYPEDEFS is not defined, then the code section below makes + * inferences about the compile environment based on defined symbols and + * possibly compiler pragmas. + * + * Following these two sections is the Default Typedefs section. + * This section is only processed if USE_TYPEDEF_DEFAULTS is + * defined. This section has a default set of typedefs and a few + * preprocessor symbols (TRUE, FALSE, NULL, ...). + */ + +#include "site_typedefs.h" + +#else + +/* + * Infer the compile environment based on preprocessor symbols and pragmas. + * Override type definitions as needed, and include configuration-dependent + * header files to define types. + */ + +#ifdef __cplusplus + +#define TYPEDEF_BOOL +#ifndef FALSE +#define FALSE false +#endif +#ifndef TRUE +#define TRUE true +#endif + +#else /* ! __cplusplus */ + +#if defined(_WIN32) + +#define TYPEDEF_BOOL +typedef unsigned char bool; /* consistent w/BOOL */ + +#endif /* _WIN32 */ + +#endif /* ! __cplusplus */ + +#if defined(_WIN64) && !defined(EFI) +/* use the Windows ULONG_PTR type when compiling for 64 bit */ +#include +#define TYPEDEF_UINTPTR +typedef ULONG_PTR uintptr; +#elif defined(__x86_64__) +#define TYPEDEF_UINTPTR +typedef unsigned long long int uintptr; +#endif + +#if defined(_HNDRTE_) && !defined(_HNDRTE_SIM_) +#define _NEED_SIZE_T_ +#endif + +#if defined(_MINOSL_) +#define _NEED_SIZE_T_ +#endif + +#if defined(EFI) && !defined(_WIN64) +#define _NEED_SIZE_T_ +#endif + +#if defined(TARGETOS_nucleus) +/* for 'size_t' type */ +#include + +/* float_t types conflict with the same typedefs from the standard ANSI-C +** math.h header file. Don't re-typedef them here. +*/ +#define TYPEDEF_FLOAT_T +#endif /* TARGETOS_nucleus */ + +#if defined(_NEED_SIZE_T_) +typedef long unsigned int size_t; +#endif + +#ifdef _MSC_VER /* Microsoft C */ +#define TYPEDEF_INT64 +#define TYPEDEF_UINT64 +typedef signed __int64 int64; +typedef unsigned __int64 uint64; +#endif + +#if defined(MACOSX) +#define TYPEDEF_BOOL +#endif /* MACOSX */ + +#if defined(__NetBSD__) +#ifndef _KERNEL +#include +#endif +#define TYPEDEF_BOOL +#define TYPEDEF_UINT +#define TYPEDEF_USHORT +#define TYPEDEF_ULONG +#endif /* NetBSD */ + +#if defined(__sparc__) +#define TYPEDEF_ULONG +#endif + +#if defined(vxworks) +#define TYPEDEF_USHORT +typedef unsigned int socklen_t; +#endif + +#ifdef linux +/* + * If this is either a Linux hybrid build or the per-port code of a hybrid build + * then use the Linux header files to get some of the typedefs. Otherwise, define + * them entirely in this file. We can't always define the types because we get + * a duplicate typedef error; there is no way to "undefine" a typedef. + * We know when it's per-port code because each file defines LINUX_PORT at the top. + */ +#if !defined(LINUX_HYBRID) || defined(LINUX_PORT) +#define TYPEDEF_UINT +#ifndef TARGETENV_android +#define TYPEDEF_USHORT +#define TYPEDEF_ULONG +#endif /* TARGETENV_android */ +#ifdef __KERNEL__ +#include +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2, 6, 19)) +#define TYPEDEF_BOOL +#endif /* >= 2.6.19 */ +/* special detection for 2.6.18-128.7.1.0.1.el5 */ +#if (LINUX_VERSION_CODE == KERNEL_VERSION(2, 6, 18)) +#include +#ifdef noinline_for_stack +#define TYPEDEF_BOOL +#endif +#endif /* == 2.6.18 */ +#endif /* __KERNEL__ */ +#endif /* !defined(LINUX_HYBRID) || defined(LINUX_PORT) */ +#endif /* linux */ + +#if defined(__ECOS) +#define TYPEDEF_UCHAR +#define TYPEDEF_UINT +#define TYPEDEF_USHORT +#define TYPEDEF_ULONG +#define TYPEDEF_BOOL +#endif + +#if !defined(linux) && !defined(vxworks) && !defined(_WIN32) && !defined(_CFE_) && \ +!defined(_HNDRTE_) && !defined(_MINOSL_) && !defined(__DJGPP__) && \ +!defined(__IOPOS__) && !defined(__ECOS) && !defined(__BOB__) && \ +!defined(TARGETOS_nucleus) && !defined(EFI) && !defined(__FreeBSD__) +#define TYPEDEF_UINT +#define TYPEDEF_USHORT +#endif + +#if defined(vxworks) +/* Do not support the int64 type in VxWorks */ +#define TYPEDEF_INT64 +#endif + +/* Do not support the (u)int64 types with strict ansi for GNU C */ +#if defined(__GNUC__) && defined(__STRICT_ANSI__) +#define TYPEDEF_INT64 +#define TYPEDEF_UINT64 +#endif + +/* ICL accepts unsigned 64 bit type only, and complains in ANSI mode + * for signed or unsigned + */ +#if defined(__ICL) + +#define TYPEDEF_INT64 + +#if defined(__STDC__) +#define TYPEDEF_UINT64 +#endif + +#endif /* __ICL */ + +#if !defined(_WIN32) && !defined(_CFE_) && !defined(_HNDRTE_) && !defined(_MINOSL_) && \ + !defined(__DJGPP__) && !defined(__IOPOS__) && !defined(__BOB__) && \ + !defined(TARGETOS_nucleus) && !defined(EFI) + +/* pick up ushort & uint from standard types.h */ +#if defined(linux) && defined(__KERNEL__) + +/* See note above */ +#if !defined(LINUX_HYBRID) || defined(LINUX_PORT) +#ifdef USER_MODE +#include +#else +#include /* sys/types.h and linux/types.h are oil and water */ +#endif /* USER_MODE */ +#endif /* !defined(LINUX_HYBRID) || defined(LINUX_PORT) */ + +#else + +#if defined(__ECOS) +#include +#include +#include +#endif + +#include + +#endif /* linux && __KERNEL__ */ + +#endif /* !_WIN32 && !PMON && !_CFE_ && !_HNDRTE_ && !_MINOSL_ && !__DJGPP__ */ + +#if defined(MACOSX) + +#ifdef __BIG_ENDIAN__ +#define IL_BIGENDIAN +#else +#ifdef IL_BIGENDIAN +#error "IL_BIGENDIAN was defined for a little-endian compile" +#endif +#endif /* __BIG_ENDIAN__ */ + +#if !defined(__cplusplus) + +#if defined (__i386__) +typedef unsigned char bool; +#else +typedef unsigned int bool; +#endif +#define TYPE_BOOL 1 +enum { + false = 0, + true = 1 +}; + +#if defined(KERNEL) +#include +#endif /* KERNEL */ + +#endif /* __cplusplus */ + +#endif /* MACOSX */ + +#if defined(vxworks) +#include +#endif + +/* use the default typedefs in the next section of this file */ +#define USE_TYPEDEF_DEFAULTS + +#endif /* SITE_TYPEDEFS */ + + +/* + * Default Typedefs + */ + +#ifdef USE_TYPEDEF_DEFAULTS +#undef USE_TYPEDEF_DEFAULTS + +#ifndef TYPEDEF_BOOL +typedef /* @abstract@ */ unsigned char bool; +#endif + +/* define uchar, ushort, uint, ulong */ + +#ifndef TYPEDEF_UCHAR +typedef unsigned char uchar; +#endif + +#ifndef TYPEDEF_USHORT +typedef unsigned short ushort; +#endif + +#ifndef TYPEDEF_UINT +typedef unsigned int uint; +#endif + +#ifndef TYPEDEF_ULONG +typedef unsigned long ulong; +#endif + +/* define [u]int8/16/32/64, uintptr */ + +#ifndef TYPEDEF_UINT8 +typedef unsigned char uint8; +#endif + +#ifndef TYPEDEF_UINT16 +typedef unsigned short uint16; +#endif + +#ifndef TYPEDEF_UINT32 +typedef unsigned int uint32; +#endif + +#ifndef TYPEDEF_UINT64 +typedef unsigned long long uint64; +#endif + +#ifndef TYPEDEF_UINTPTR +typedef unsigned int uintptr; +#endif + +#ifndef TYPEDEF_INT8 +typedef signed char int8; +#endif + +#ifndef TYPEDEF_INT16 +typedef signed short int16; +#endif + +#ifndef TYPEDEF_INT32 +typedef signed int int32; +#endif + +#ifndef TYPEDEF_INT64 +typedef signed long long int64; +#endif + +/* define float32/64, float_t */ + +#ifndef TYPEDEF_FLOAT32 +typedef float float32; +#endif + +#ifndef TYPEDEF_FLOAT64 +typedef double float64; +#endif + +/* + * abstracted floating point type allows for compile time selection of + * single or double precision arithmetic. Compiling with -DFLOAT32 + * selects single precision; the default is double precision. + */ + +#ifndef TYPEDEF_FLOAT_T + +#if defined(FLOAT32) +typedef float32 float_t; +#else /* default to double precision floating point */ +typedef float64 float_t; +#endif + +#endif /* TYPEDEF_FLOAT_T */ + +/* define macro values */ + +#ifndef FALSE +#define FALSE 0 +#endif + +#ifndef TRUE +#define TRUE 1 /* TRUE */ +#endif + +#ifndef NULL +#define NULL 0 +#endif + +#ifndef OFF +#define OFF 0 +#endif + +#ifndef ON +#define ON 1 /* ON = 1 */ +#endif + +#define AUTO (-1) /* Auto = -1 */ + +/* define PTRSZ, INLINE */ + +#ifndef PTRSZ +#define PTRSZ sizeof(char*) +#endif + + +/* Detect compiler type. */ +#ifdef _MSC_VER + #define BWL_COMPILER_MICROSOFT +#elif defined(__GNUC__) || defined(__lint) + #define BWL_COMPILER_GNU +#elif defined(__CC_ARM) && __CC_ARM + #define BWL_COMPILER_ARMCC +#else + #error "Unknown compiler!" +#endif /* _MSC_VER */ + + +#ifndef INLINE + #if defined(BWL_COMPILER_MICROSOFT) + #define INLINE __inline + #elif defined(BWL_COMPILER_GNU) + #define INLINE __inline__ + #elif defined(BWL_COMPILER_ARMCC) + #define INLINE __inline + #else + #define INLINE + #endif /* _MSC_VER */ +#endif /* INLINE */ + +#undef TYPEDEF_BOOL +#undef TYPEDEF_UCHAR +#undef TYPEDEF_USHORT +#undef TYPEDEF_UINT +#undef TYPEDEF_ULONG +#undef TYPEDEF_UINT8 +#undef TYPEDEF_UINT16 +#undef TYPEDEF_UINT32 +#undef TYPEDEF_UINT64 +#undef TYPEDEF_UINTPTR +#undef TYPEDEF_INT8 +#undef TYPEDEF_INT16 +#undef TYPEDEF_INT32 +#undef TYPEDEF_INT64 +#undef TYPEDEF_FLOAT32 +#undef TYPEDEF_FLOAT64 +#undef TYPEDEF_FLOAT_T + +#endif /* USE_TYPEDEF_DEFAULTS */ + +/* Suppress unused parameter warning */ +#define UNUSED_PARAMETER(x) (void)(x) + +/* Avoid warning for discarded const or volatile qualifier in special cases (-Wcast-qual) */ +#define DISCARD_QUAL(ptr, type) ((type *)(uintptr)(ptr)) + +/* + * Including the bcmdefs.h here, to make sure everyone including typedefs.h + * gets this automatically +*/ +#include +#endif /* _TYPEDEFS_H_ */ diff --git a/external/cache/sources/wl/include/usbrdl.h b/external/cache/sources/wl/include/usbrdl.h new file mode 100644 index 0000000..31a7aa5 --- /dev/null +++ b/external/cache/sources/wl/include/usbrdl.h @@ -0,0 +1,205 @@ +/* + * Broadcom USB remote download definitions + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: usbrdl.h 394558 2013-04-03 00:11:01Z kadavath $ + */ + +#ifndef _USB_RDL_H +#define _USB_RDL_H + +/* Control messages: bRequest values */ +#define DL_GETSTATE 0 /* returns the rdl_state_t struct */ +#define DL_CHECK_CRC 1 /* currently unused */ +#define DL_GO 2 /* execute downloaded image */ +#define DL_START 3 /* initialize dl state */ +#define DL_REBOOT 4 /* reboot the device in 2 seconds */ +#define DL_GETVER 5 /* returns the bootrom_id_t struct */ +#define DL_GO_PROTECTED 6 /* execute the downloaded code and set reset event + * to occur in 2 seconds. It is the responsibility + * of the downloaded code to clear this event + */ +#define DL_EXEC 7 /* jump to a supplied address */ +#define DL_RESETCFG 8 /* To support single enum on dongle + * - Not used by bootloader + */ +#define DL_DEFER_RESP_OK 9 /* Potentially defer the response to setup + * if resp unavailable + */ + +#define DL_HWCMD_MASK 0xfc /* Mask for hardware read commands: */ +#define DL_RDHW 0x10 /* Read a hardware address (Ctl-in) */ +#define DL_RDHW32 0x10 /* Read a 32 bit word */ +#define DL_RDHW16 0x11 /* Read 16 bits */ +#define DL_RDHW8 0x12 /* Read an 8 bit byte */ +#define DL_WRHW 0x14 /* Write a hardware address (Ctl-out) */ +#define DL_WRHW_BLK 0x13 /* Block write to hardware access */ + +#define DL_CMD_RDHW 1 /* read data from a backplane address */ +#define DL_CMD_WRHW 2 /* write data to a backplane address */ + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +#define DL_JTCONF 0x15 /* Get JTAG configuration (Ctl_in) + * Set JTAG configuration (Ctl-out) + */ +#define DL_JTON 0x16 /* Turn on jtag master (Ctl-in) */ +#define DL_JTOFF 0x17 /* Turn on jtag master (Ctl-in) */ +#define DL_RDRJT 0x18 /* Read a JTAG register (Ctl-in) */ +#define DL_WRJT 0x19 /* Write a hardware address over JTAG (Ctl/Bulk-out) */ +#define DL_WRRJT 0x1a /* Write a JTAG register (Ctl/Bulk-out) */ +#define DL_JTRST 0x1b /* Reset jtag fsm on jtag DUT (Ctl-in) */ + +#define DL_RDJT 0x1c /* Read a hardware address over JTAG (Ctl-in) */ +#define DL_RDJT32 0x1c /* Read 32 bits */ +#define DL_RDJT16 0x1e /* Read 16 bits (sz = 4 - low bits) */ +#define DL_RDJT8 0x1f /* Read 8 bits */ + +#define DL_MRDJT 0x20 /* Multiple read over JTAG (Ctl-out+Bulk-in) */ +#define DL_MRDJT32 0x20 /* M-read 32 bits */ +#define DL_MRDJT16 0x22 /* M-read 16 bits (sz = 4 - low bits) */ +#define DL_MRDJT6 0x23 /* M-read 8 bits */ +#define DL_MRDIJT 0x24 /* M-read over JTAG (Ctl-out+Bulk-in) with auto-increment */ +#define DL_MRDIJT32 0x24 /* M-read 32 bits w/ai */ +#define DL_MRDIJT16 0x26 /* M-read 16 bits w/ai (sz = 4 - low bits) */ +#define DL_MRDIJT8 0x27 /* M-read 8 bits w/ai */ +#define DL_MRDDJT 0x28 /* M-read over JTAG (Ctl-out+Bulk-in) with auto-decrement */ +#define DL_MRDDJT32 0x28 /* M-read 32 bits w/ad */ +#define DL_MRDDJT16 0x2a /* M-read 16 bits w/ad (sz = 4 - low bits) */ +#define DL_MRDDJT8 0x2b /* M-read 8 bits w/ad */ +#define DL_MWRJT 0x2c /* Multiple write over JTAG (Bulk-out) */ +#define DL_MWRIJT 0x2d /* With auto-increment */ +#define DL_MWRDJT 0x2e /* With auto-decrement */ +#define DL_VRDJT 0x2f /* Vector read over JTAG (Bulk-out+Bulk-in) */ +#define DL_VWRJT 0x30 /* Vector write over JTAG (Bulk-out+Bulk-in) */ +#define DL_SCJT 0x31 /* Jtag scan (Bulk-out+Bulk-in) */ + +#define DL_CFRD 0x33 /* Reserved for dmamem use */ +#define DL_CFWR 0x34 /* Reserved for dmamem use */ +#define DL_GET_NVRAM 0x35 /* Query nvram parameter */ + +#define DL_DBGTRIG 0xFF /* Trigger bRequest type to aid debug */ + +#define DL_JTERROR 0x80000000 +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +/* states */ +#define DL_WAITING 0 /* waiting to rx first pkt that includes the hdr info */ +#define DL_READY 1 /* hdr was good, waiting for more of the compressed image */ +#define DL_BAD_HDR 2 /* hdr was corrupted */ +#define DL_BAD_CRC 3 /* compressed image was corrupted */ +#define DL_RUNNABLE 4 /* download was successful, waiting for go cmd */ +#define DL_START_FAIL 5 /* failed to initialize correctly */ +#define DL_NVRAM_TOOBIG 6 /* host specified nvram data exceeds DL_NVRAM value */ +#define DL_IMAGE_TOOBIG 7 /* download image too big (exceeds DATA_START for rdl) */ + +#define TIMEOUT 5000 /* Timeout for usb commands */ + +struct bcm_device_id { + char *name; + uint32 vend; + uint32 prod; +}; + +typedef struct { + uint32 state; + uint32 bytes; +} rdl_state_t; + +typedef struct { + uint32 chip; /* Chip id */ + uint32 chiprev; /* Chip rev */ + uint32 ramsize; /* Size of RAM */ + uint32 remapbase; /* Current remap base address */ + uint32 boardtype; /* Type of board */ + uint32 boardrev; /* Board revision */ +} bootrom_id_t; + +/* struct for backplane & jtag accesses */ +typedef struct { + uint32 cmd; /* tag to identify the cmd */ + uint32 addr; /* backplane address for write */ + uint32 len; /* length of data: 1, 2, 4 bytes */ + uint32 data; /* data to write */ +} hwacc_t; + +/* struct for backplane */ +typedef struct { + uint32 cmd; /* tag to identify the cmd */ + uint32 addr; /* backplane address for write */ + uint32 len; /* length of data: 1, 2, 4 bytes */ + uint8 data[1]; /* data to write */ +} hwacc_blk_t; + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +typedef struct { + uint32 chip; /* Chip id */ + uint32 chiprev; /* Chip rev */ + uint32 ccrev; /* Chipcommon core rev */ + uint32 siclock; /* Backplane clock */ +} jtagd_id_t; + +/* Jtag configuration structure */ +typedef struct { + uint32 cmd; /* tag to identify the cmd */ + uint8 clkd; /* Jtag clock divisor */ + uint8 disgpio; /* Gpio to disable external driver */ + uint8 irsz; /* IR size for readreg/writereg */ + uint8 drsz; /* DR size for readreg/writereg */ + + uint8 bigend; /* Big endian */ + uint8 mode; /* Current mode */ + uint16 delay; /* Delay between jtagm "simple commands" */ + + uint32 retries; /* Number of retries for jtagm operations */ + uint32 ctrl; /* Jtag control reg copy */ + uint32 ir_lvbase; /* Bits to add to IR values in LV tap */ + uint32 dretries; /* Number of retries for dma operations */ +} jtagconf_t; + +/* struct for jtag scan */ +#define MAX_USB_IR_BITS 256 +#define MAX_USB_DR_BITS 3072 +#define USB_IR_WORDS (MAX_USB_IR_BITS / 32) +#define USB_DR_WORDS (MAX_USB_DR_BITS / 32) +typedef struct { + uint32 cmd; /* tag to identify the cmd */ + uint32 irsz; /* IR size in bits */ + uint32 drsz; /* DR size in bits */ + uint32 ts; /* Terminal state (def, pause, rti) */ + uint32 data[USB_IR_WORDS + USB_DR_WORDS]; /* IR & DR data */ +} scjt_t; +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +/* struct for querying nvram params from bootloader */ +#define QUERY_STRING_MAX 32 +typedef struct { + uint32 cmd; /* tag to identify the cmd */ + char var[QUERY_STRING_MAX]; /* param name */ +} nvparam_t; + +typedef void (*exec_fn_t)(void *sih); + +#define USB_CTRL_IN (USB_TYPE_VENDOR | 0x80 | USB_RECIP_INTERFACE) +#define USB_CTRL_OUT (USB_TYPE_VENDOR | 0 | USB_RECIP_INTERFACE) + +#define USB_CTRL_EP_TIMEOUT 500 /* Timeout used in USB control_msg transactions. */ + +#define RDL_CHUNK 1500 /* size of each dl transfer */ + +/* bootloader makes special use of trx header "offsets" array */ +#define TRX_OFFSETS_DLFWLEN_IDX 0 /* Size of the fw; used in uncompressed case */ +#define TRX_OFFSETS_JUMPTO_IDX 1 /* RAM address for jumpto after download */ +#define TRX_OFFSETS_NVM_LEN_IDX 2 /* Length of appended NVRAM data */ +#ifdef BCMTRXV2 +/* The NVRAM region part of trx will be digitally signed in SDR image, + * so is the need for new cfg region which could pass parameters + * which dones not need to be digitally signed + */ +#define TRX_OFFSETS_DSG_LEN_IDX 3 /* Length of digital signature for the first image */ +#define TRX_OFFSETS_CFG_LEN_IDX 4 /* Length of config region, which is not digitally signed */ +#endif /* BCMTRXV2 */ + +#define TRX_OFFSETS_DLBASE_IDX 0 /* RAM start address for download */ + +#endif /* _USB_RDL_H */ diff --git a/external/cache/sources/wl/include/wlc_clm_rates.h b/external/cache/sources/wl/include/wlc_clm_rates.h new file mode 100644 index 0000000..8b00cdc --- /dev/null +++ b/external/cache/sources/wl/include/wlc_clm_rates.h @@ -0,0 +1,218 @@ +/* + * Indices for 802.11 a/b/g/n 1-3 chain symmetric transmit rates + * Copyright (C) 2012, Broadcom Corporation + * All Rights Reserved. + * + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation; + * the contents of this file may not be disclosed to third parties, copied + * or duplicated in any form, in whole or in part, without the prior + * written permission of Broadcom Corporation. + * + * $Id: wlc_clm_rates.h 252708 2011-04-12 06:45:56Z fnejati $ + */ + +#ifndef _WLC_CLM_RATES_H_ +#define _WLC_CLM_RATES_H_ + +#ifdef __cplusplus +extern "C" { +#endif /* __cplusplus */ + + +#define CHSPEC_IS80(x) FALSE + + +#define WL_RATESET_SZ_DSSS 4 +#define WL_RATESET_SZ_OFDM 8 +#define WL_RATESET_SZ_HT_MCS 8 +#define WL_RATESET_SZ_VHT_MCS 10 + +#define WL_TX_CHAINS_MAX 3 + +#define WL_RATE_DISABLED (-128) /* Power value corresponding to unsupported rate */ + +/* Transmit channel bandwidths */ +typedef enum wl_tx_bw { + WL_TX_BW_20, + WL_TX_BW_40, + WL_TX_BW_80, + WL_TX_BW_20IN40, + WL_TX_BW_20IN80, + WL_TX_BW_40IN80, + WL_TX_BW_ALL +} wl_tx_bw_t; + + +/* + * Transmit modes. + * Not all modes are listed here, only those required for disambiguation. e.g. SPEXP is not listed + */ +typedef enum wl_tx_mode { + WL_TX_MODE_NONE, + WL_TX_MODE_STBC, + WL_TX_MODE_CDD, + WL_TX_MODE_TXBF, + WL_NUM_TX_MODES +} wl_tx_mode_t; + + +/* Number of transmit chains */ +typedef enum wl_tx_chains { + WL_TX_CHAINS_1 = 1, + WL_TX_CHAINS_2, + WL_TX_CHAINS_3 +} wl_tx_chains_t; + + +/* Number of transmit streams */ +typedef enum wl_tx_nss { + WL_TX_NSS_1 = 1, + WL_TX_NSS_2, + WL_TX_NSS_3 +} wl_tx_nss_t; + +typedef enum clm_rates { + /************ + * 1 chain * + ************ + */ + + CLM_RATE_1X1_DSSS_1 = 0, + CLM_RATE_1X1_DSSS_2 = 1, + CLM_RATE_1X1_DSSS_5_5 = 2, + CLM_RATE_1X1_DSSS_11 = 3, + + CLM_RATE_1X1_OFDM_6 = 4, + CLM_RATE_1X1_OFDM_9 = 5, + CLM_RATE_1X1_OFDM_12 = 6, + CLM_RATE_1X1_OFDM_18 = 7, + CLM_RATE_1X1_OFDM_24 = 8, + CLM_RATE_1X1_OFDM_36 = 9, + CLM_RATE_1X1_OFDM_48 = 10, + CLM_RATE_1X1_OFDM_54 = 11, + + CLM_RATE_1X1_MCS0 = 12, + CLM_RATE_1X1_MCS1 = 13, + CLM_RATE_1X1_MCS2 = 14, + CLM_RATE_1X1_MCS3 = 15, + CLM_RATE_1X1_MCS4 = 16, + CLM_RATE_1X1_MCS5 = 17, + CLM_RATE_1X1_MCS6 = 18, + CLM_RATE_1X1_MCS7 = 19, + + /************ + * 2 chains * + ************ + */ + + /* 1 Stream expanded + 1 */ + CLM_RATE_1X2_DSSS_1 = 20, + CLM_RATE_1X2_DSSS_2 = 21, + CLM_RATE_1X2_DSSS_5_5 = 22, + CLM_RATE_1X2_DSSS_11 = 23, + + CLM_RATE_1X2_CDD_OFDM_6 = 24, + CLM_RATE_1X2_CDD_OFDM_9 = 25, + CLM_RATE_1X2_CDD_OFDM_12 = 26, + CLM_RATE_1X2_CDD_OFDM_18 = 27, + CLM_RATE_1X2_CDD_OFDM_24 = 28, + CLM_RATE_1X2_CDD_OFDM_36 = 29, + CLM_RATE_1X2_CDD_OFDM_48 = 30, + CLM_RATE_1X2_CDD_OFDM_54 = 31, + + CLM_RATE_1X2_CDD_MCS0 = 32, + CLM_RATE_1X2_CDD_MCS1 = 33, + CLM_RATE_1X2_CDD_MCS2 = 34, + CLM_RATE_1X2_CDD_MCS3 = 35, + CLM_RATE_1X2_CDD_MCS4 = 36, + CLM_RATE_1X2_CDD_MCS5 = 37, + CLM_RATE_1X2_CDD_MCS6 = 38, + CLM_RATE_1X2_CDD_MCS7 = 39, + + /* 2 Streams */ + CLM_RATE_2X2_STBC_MCS0 = 40, + CLM_RATE_2X2_STBC_MCS1 = 41, + CLM_RATE_2X2_STBC_MCS2 = 42, + CLM_RATE_2X2_STBC_MCS3 = 43, + CLM_RATE_2X2_STBC_MCS4 = 44, + CLM_RATE_2X2_STBC_MCS5 = 45, + CLM_RATE_2X2_STBC_MCS6 = 46, + CLM_RATE_2X2_STBC_MCS7 = 47, + + CLM_RATE_2X2_SDM_MCS8 = 48, + CLM_RATE_2X2_SDM_MCS9 = 49, + CLM_RATE_2X2_SDM_MCS10 = 50, + CLM_RATE_2X2_SDM_MCS11 = 51, + CLM_RATE_2X2_SDM_MCS12 = 52, + CLM_RATE_2X2_SDM_MCS13 = 53, + CLM_RATE_2X2_SDM_MCS14 = 54, + CLM_RATE_2X2_SDM_MCS15 = 55, + + + /************ + * 3 chains * + ************ + */ + + /* 1 Stream expanded + 2 */ + CLM_RATE_1X3_DSSS_1 = 56, + CLM_RATE_1X3_DSSS_2 = 57, + CLM_RATE_1X3_DSSS_5_5 = 58, + CLM_RATE_1X3_DSSS_11 = 59, + + CLM_RATE_1X3_CDD_OFDM_6 = 60, + CLM_RATE_1X3_CDD_OFDM_9 = 61, + CLM_RATE_1X3_CDD_OFDM_12 = 62, + CLM_RATE_1X3_CDD_OFDM_18 = 63, + CLM_RATE_1X3_CDD_OFDM_24 = 64, + CLM_RATE_1X3_CDD_OFDM_36 = 65, + CLM_RATE_1X3_CDD_OFDM_48 = 66, + CLM_RATE_1X3_CDD_OFDM_54 = 67, + + CLM_RATE_1X3_CDD_MCS0 = 68, + CLM_RATE_1X3_CDD_MCS1 = 69, + CLM_RATE_1X3_CDD_MCS2 = 70, + CLM_RATE_1X3_CDD_MCS3 = 71, + CLM_RATE_1X3_CDD_MCS4 = 72, + CLM_RATE_1X3_CDD_MCS5 = 73, + CLM_RATE_1X3_CDD_MCS6 = 74, + CLM_RATE_1X3_CDD_MCS7 = 75, + + /* 2 Streams expanded + 1 */ + CLM_RATE_2X3_STBC_MCS0 = 76, + CLM_RATE_2X3_STBC_MCS1 = 77, + CLM_RATE_2X3_STBC_MCS2 = 78, + CLM_RATE_2X3_STBC_MCS3 = 79, + CLM_RATE_2X3_STBC_MCS4 = 80, + CLM_RATE_2X3_STBC_MCS5 = 81, + CLM_RATE_2X3_STBC_MCS6 = 82, + CLM_RATE_2X3_STBC_MCS7 = 83, + + CLM_RATE_2X3_SDM_MCS8 = 84, + CLM_RATE_2X3_SDM_MCS9 = 85, + CLM_RATE_2X3_SDM_MCS10 = 86, + CLM_RATE_2X3_SDM_MCS11 = 87, + CLM_RATE_2X3_SDM_MCS12 = 88, + CLM_RATE_2X3_SDM_MCS13 = 89, + CLM_RATE_2X3_SDM_MCS14 = 90, + CLM_RATE_2X3_SDM_MCS15 = 91, + + /* 3 Streams */ + CLM_RATE_3X3_SDM_MCS16 = 92, + CLM_RATE_3X3_SDM_MCS17 = 93, + CLM_RATE_3X3_SDM_MCS18 = 94, + CLM_RATE_3X3_SDM_MCS19 = 95, + CLM_RATE_3X3_SDM_MCS20 = 96, + CLM_RATE_3X3_SDM_MCS21 = 97, + CLM_RATE_3X3_SDM_MCS22 = 98, + CLM_RATE_3X3_SDM_MCS23 = 99 + + /* Number of rate codes */ + } clm_rates_t; + +#define CLM_NUMRATES 100 + +#ifdef __cplusplus +} +#endif /* __cplusplus */ +#endif /* _WLC_CLM_RATES_H_ */ diff --git a/external/cache/sources/wl/include/wlc_extlog_idstr.h b/external/cache/sources/wl/include/wlc_extlog_idstr.h new file mode 100644 index 0000000..5a3e5d5 --- /dev/null +++ b/external/cache/sources/wl/include/wlc_extlog_idstr.h @@ -0,0 +1,117 @@ +/* + * EXTLOG Module log ID to log Format String mapping table + * + * Copyright (C) 2013, Broadcom Corporation + * All Rights Reserved. + * + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation; + * the contents of this file may not be disclosed to third parties, copied + * or duplicated in any form, in whole or in part, without the prior + * written permission of Broadcom Corporation. + * + * $Id: wlc_extlog_idstr.h 241182 2011-02-17 21:50:03Z $ + */ +#ifndef _WLC_EXTLOG_IDSTR_H_ +#define _WLC_EXTLOG_IDSTR_H_ + +#include "wlioctl.h" + +/* Strings corresponding to the IDs defined in wlioctl.h + * This file is only included by the apps and not included by the external driver + * Formats of pre-existing ids should NOT be changed + */ +log_idstr_t extlog_fmt_str[ ] = { + {FMTSTR_DRIVER_UP_ID, 0, LOG_ARGTYPE_NULL, + "Driver is Up\n"}, + + {FMTSTR_DRIVER_DOWN_ID, 0, LOG_ARGTYPE_NULL, + "Driver is Down\n"}, + + {FMTSTR_SUSPEND_MAC_FAIL_ID, 0, LOG_ARGTYPE_INT, + "wlc_suspend_mac_and_wait() failed with psmdebug 0x%08x\n"}, + + {FMTSTR_NO_PROGRESS_ID, 0, LOG_ARGTYPE_INT, + "No Progress on TX for %d seconds\n"}, + + {FMTSTR_RFDISABLE_ID, 0, LOG_ARGTYPE_INT, + "Detected a change in RF Disable Input 0x%x\n"}, + + {FMTSTR_REG_PRINT_ID, 0, LOG_ARGTYPE_STR_INT, + "Register %s = 0x%x\n"}, + + {FMTSTR_EXPTIME_ID, FMTSTRF_USER, LOG_ARGTYPE_NULL, + "Strong RF interference detected\n"}, + + {FMTSTR_JOIN_START_ID, FMTSTRF_USER, LOG_ARGTYPE_STR, + "Searching for networks with ssid %s\n"}, + + {FMTSTR_JOIN_COMPLETE_ID, FMTSTRF_USER, LOG_ARGTYPE_STR, + "Successfully joined network with BSSID %s\n"}, + + {FMTSTR_NO_NETWORKS_ID, FMTSTRF_USER, LOG_ARGTYPE_NULL, + "No networks found. Please check if the network exists and is in range\n"}, + + {FMTSTR_SECURITY_MISMATCH_ID, FMTSTRF_USER, LOG_ARGTYPE_NULL, + "AP rejected due to security mismatch. Change the security settings and try again...\n"}, + + {FMTSTR_RATE_MISMATCH_ID, FMTSTRF_USER, LOG_ARGTYPE_NULL, + "AP rejected due to rate mismatch\n"}, + + {FMTSTR_AP_PRUNED_ID, 0, LOG_ARGTYPE_INT, + "AP rejected due to reason %d\n"}, + + {FMTSTR_KEY_INSERTED_ID, 0, LOG_ARGTYPE_INT, + "Inserting keys for algorithm %d\n"}, + + {FMTSTR_DEAUTH_ID, FMTSTRF_USER, LOG_ARGTYPE_STR_INT, + "Received Deauth from %s with Reason %d\n"}, + + {FMTSTR_DISASSOC_ID, FMTSTRF_USER, LOG_ARGTYPE_STR_INT, + "Received Disassoc from %s with Reason %d\n"}, + + {FMTSTR_LINK_UP_ID, FMTSTRF_USER, LOG_ARGTYPE_NULL, + "Link Up\n"}, + + {FMTSTR_LINK_DOWN_ID, FMTSTRF_USER, LOG_ARGTYPE_NULL, + "Link Down\n"}, + + {FMTSTR_RADIO_HW_OFF_ID, FMTSTRF_USER, LOG_ARGTYPE_NULL, + "Radio button is turned OFF. Please turn it on...\n"}, + + {FMTSTR_RADIO_HW_ON_ID, FMTSTRF_USER, LOG_ARGTYPE_NULL, + "Hardware Radio button is turned ON\n"}, + + {FMTSTR_EVENT_DESC_ID, 0, LOG_ARGTYPE_INT_STR, + "Generated event id %d: (result status) is (%s)\n"}, + + {FMTSTR_PNP_SET_POWER_ID, 0, LOG_ARGTYPE_INT, + "Device going into power state %d\n"}, + + {FMTSTR_RADIO_SW_OFF_ID, FMTSTRF_USER, LOG_ARGTYPE_NULL, + "Software Radio is disabled. Please enable it through the UI...\n"}, + + {FMTSTR_RADIO_SW_ON_ID, FMTSTRF_USER, LOG_ARGTYPE_NULL, + "Software Radio is enabled\n"}, + + {FMTSTR_PWD_MISMATCH_ID, FMTSTRF_USER, LOG_ARGTYPE_NULL, + "Potential passphrase mismatch. Please try a different one...\n"}, + + {FMTSTR_FATAL_ERROR_ID, 0, LOG_ARGTYPE_INT, + "Fatal Error: intstatus 0x%x\n"}, + + {FMTSTR_AUTH_FAIL_ID, 0, LOG_ARGTYPE_STR_INT, + "Authentication to %s Failed with status %d\n"}, + + {FMTSTR_ASSOC_FAIL_ID, 0, LOG_ARGTYPE_STR_INT, + "Association to %s Failed with status %d\n"}, + + {FMTSTR_IBSS_FAIL_ID, FMTSTRF_USER, LOG_ARGTYPE_NULL, + "Unable to start IBSS since PeerNet is already active\n"}, + + {FMTSTR_EXTAP_FAIL_ID, FMTSTRF_USER, LOG_ARGTYPE_NULL, + "Unable to start Ext-AP since PeerNet is already active\n"}, + + {FMTSTR_MAX_ID, 0, 0, "\0"} +}; + +#endif /* _WLC_EXTLOG_IDSTR_H_ */ diff --git a/external/cache/sources/wl/include/wlc_ppr.h b/external/cache/sources/wl/include/wlc_ppr.h new file mode 100644 index 0000000..cd7db85 --- /dev/null +++ b/external/cache/sources/wl/include/wlc_ppr.h @@ -0,0 +1,340 @@ +/* + * PHY module Power-per-rate API. Provides interface functions and definitions for opaque + * ppr structure for use containing regulatory and board limits and tx power targets. + * + * $ Copyright Broadcom Corporation $ + * + * $Id: $ + */ + +#ifndef _wlc_ppr_h_ +#define _wlc_ppr_h_ + +#include +#include +#ifdef BCMDRIVER +#include +#else +#define osl_t void +#endif + +/* Helper macro */ +#define PPR_CHSPEC_BW(x) (CHSPEC_IS80(x) ? WL_TX_BW_80 : \ + (CHSPEC_IS40(x) ? WL_TX_BW_40 : WL_TX_BW_20)) + +#ifndef BCMPHYCORENUM +#define PPR_MAX_TX_CHAINS 3 +#else +#if (BCMPHYCORENUM < 1) || (BCMPHYCORENUM > 3) +#error Invalid number of PHY cores +#endif /* BCMPHYCORENUM < 1 || BCMPHYCORENUM > 3 */ +#define PPR_MAX_TX_CHAINS (BCMPHYCORENUM) +#endif /* !defined(BCMPHYCORENUM) */ + +/* Opaque PPR data - it keeps its structure to itself */ +typedef struct ppr ppr_t; + + +/* Power values for DSSS 1, 2, 5.5, 11 */ +typedef struct ppr_dsss_rateset { int8 pwr[WL_RATESET_SZ_DSSS]; } ppr_dsss_rateset_t; + +/* Power values for OFDM 6, 9, 12... 54 */ +typedef struct ppr_ofdm_rateset { int8 pwr[WL_RATESET_SZ_OFDM]; } ppr_ofdm_rateset_t; + +/* Power values one set of 8 HT MCS values (0-7, 8-15, etc) */ +typedef struct ppr_ht_mcs_rateset { int8 pwr[WL_RATESET_SZ_HT_MCS]; } ppr_ht_mcs_rateset_t; + +/* Power values one set of 10 VHT MCS values (0-9) */ +typedef struct ppr_vht_mcs_rateset { int8 pwr[WL_RATESET_SZ_VHT_MCS]; } ppr_vht_mcs_rateset_t; + + +/* API Routines */ + +/* Initialization routine for opaque PPR struct */ +void ppr_init(ppr_t* pprptr, wl_tx_bw_t bw); + +/* Reinitialization routine for opaque PPR struct */ +void ppr_clear(ppr_t* pprptr); + + +/* Size routine for user alloc/dealloc */ +uint32 ppr_size(wl_tx_bw_t bw); + +/* Size routine for user serialization alloc */ +uint32 ppr_ser_size(const ppr_t* pprptr); + +/* Size routine for user serialization alloc for a given bw */ +uint32 ppr_ser_size_by_bw(wl_tx_bw_t bw); + +/* Init allocated memory with a ppr serialization head + * This function must be called if serialization side has different + * compilation conditions (e.g PPR_MAX_TX_CHAINS, WL_BEAMFORMING etc.) + */ +int ppr_init_ser_mem_by_bw(uint8* pbuf, wl_tx_bw_t bw, uint32 len); + +/* Init allocated memory with a ppr serialization head for the given ppr pointer + * This function must be called if serialization side has different + * compilation conditions (e.g PPR_MAX_TX_CHAINS, WL_BEAMFORMING etc.) + */ +int ppr_init_ser_mem(uint8* pbuf, ppr_t * ppr, uint32 len); + +/* Constructor routine for opaque PPR struct */ +ppr_t* ppr_create(osl_t *osh, wl_tx_bw_t bw); + +/* Destructor routine for opaque PPR struct */ +void ppr_delete(osl_t *osh, ppr_t* pprptr); + +/* Type routine for inferring opaque structure size */ +wl_tx_bw_t ppr_get_ch_bw(const ppr_t* pprptr); + +/* Type routine to get ppr supported maximum bw */ +wl_tx_bw_t ppr_get_max_bw(void); + +/* Get the DSSS values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_get_dsss(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_chains_t tx_chains, + ppr_dsss_rateset_t* dsss); + +/* Get the OFDM values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_get_ofdm(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_mode_t mode, wl_tx_chains_t tx_chains, + ppr_ofdm_rateset_t* ofdm); + +/* Get the HT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_get_ht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, ppr_ht_mcs_rateset_t* mcs); + +/* Get the VHT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_get_vht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, ppr_vht_mcs_rateset_t* mcs); + + +/* Routines to set target powers per rate for a whole rate set */ + +/* Set the DSSS values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_set_dsss(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_chains_t tx_chains, + const ppr_dsss_rateset_t* dsss); + +/* Set the OFDM values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_set_ofdm(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_mode_t mode, wl_tx_chains_t tx_chains, + const ppr_ofdm_rateset_t* ofdm); + +/* Set the HT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_set_ht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, const ppr_ht_mcs_rateset_t* mcs); + +/* Set the VHT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_set_vht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, const ppr_vht_mcs_rateset_t* mcs); + + +/* Routines to set a whole rate set to a single target value */ + +/* Set the DSSS values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_set_same_dsss(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_chains_t tx_chains, const int8 power); + +/* Set the OFDM values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_set_same_ofdm(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_mode_t mode, wl_tx_chains_t tx_chains, + const int8 power); + +/* Set the HT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_set_same_ht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, const int8 power); + + +/* Set the HT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_set_same_vht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, const int8 power); + + +/* Helper routines to operate on the entire ppr set */ + +/* Ensure no rate limit is greater than the specified maximum */ +uint ppr_apply_max(ppr_t* pprptr, int8 max); + +/* + * Reduce total transmitted power to level of constraint. + * For two chain rates, the per-antenna power must be halved. + * For three chain rates, it must be a third of the constraint. + */ +uint ppr_apply_constraint_total_tx(ppr_t* pprptr, int8 constraint); + +/* Ensure no rate limit is lower than the specified minimum */ +uint ppr_apply_min(ppr_t* pprptr, int8 min); + + +/* Ensure no rate limit in this ppr set is greater than the corresponding limit in ppr_cap */ +uint ppr_apply_vector_ceiling(ppr_t* pprptr, const ppr_t* ppr_cap); + +/* Ensure no rate limit in this ppr set is lower than the corresponding limit in ppr_min */ +uint ppr_apply_vector_floor(ppr_t* pprptr, const ppr_t* ppr_min); + + +/* Get the maximum power in the ppr set */ +int8 ppr_get_max(ppr_t* pprptr); + +/* + * Get the minimum power in the ppr set excluding disallowed + * rates and powers set to the minimum for the phy + */ +int8 ppr_get_min(ppr_t* pprptr, int8 floor); + + +/* Get the maximum power for a given bandwidth in the ppr set */ +int8 ppr_get_max_for_bw(ppr_t* pprptr, wl_tx_bw_t bw); + +/* Get the minimum power for a given bandwidth in the ppr set */ +int8 ppr_get_min_for_bw(ppr_t* pprptr, wl_tx_bw_t bw); + + +typedef void (*ppr_mapfn_t)(void *context, uint8 *a, uint8 *b); + +/* Map the given function with its context value over the two power vectors */ +void ppr_map_vec_dsss(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, + ppr_t* pprptr2, wl_tx_bw_t bw, wl_tx_chains_t tx_chains); + +/* Map the given function with its context value over the two power vectors */ +void ppr_map_vec_ofdm(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, + ppr_t* pprptr2, wl_tx_bw_t bw, wl_tx_mode_t mode, wl_tx_chains_t tx_chains); + +/* Map the given function with its context value over the two power vectors */ +void ppr_map_vec_ht_mcs(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, + ppr_t* pprptr2, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains); + +/* Map the given function with its context value over the two power vectors */ +void ppr_map_vec_vht_mcs(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, + ppr_t* pprptr2, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains); + +/* Map the given function with its context value over the two power vectors */ +void ppr_map_vec_all(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, ppr_t* pprptr2); + +/* Get the first index that is larger than a given power level */ +int16 ppr_get_idx(ppr_t* pprptr, int8 pwr); + +/* Set PPR struct to a certain power level */ +void ppr_set_cmn_val(ppr_t* pprptr, int8 val); + +/* Make an identical copy of a ppr structure (for ppr_bw==all case) */ +void ppr_copy_struct(ppr_t* pprptr_s, ppr_t* pprptr_d); + +/* Subtract each power from a common value and re-store */ +void ppr_cmn_val_minus(ppr_t* pprptr, int8 val); + +/* Compare two ppr variables p1 and p2, save the min. value of each + * contents to variable p1 + */ +void ppr_compare_min(ppr_t* p1, ppr_t* p2); + +/* compare two ppr variables p1 and p2, save the max. value of each + * contents to variable p1 + */ +void ppr_compare_max(ppr_t* p1, ppr_t* p2); + +/* Serialize the contents of the opaque ppr struct. + * Writes number of bytes copied, zero on error. + * Returns error code, BCME_OK if successful. + */ +int ppr_serialize(const ppr_t* pprptr, uint8* buf, uint buflen, uint* bytes_copied); + +/* Deserialize the contents of a buffer into an existing opaque ppr struct. + * The ppr struct *must* be of the same type as the one that was serialized. + * Returns error code, BCME_OK if successful. + */ +int ppr_deserialize(ppr_t* pprptr, const uint8* buf, uint buflen); + +/* Deserialize the contents of a buffer into a new opaque ppr struct. + * Creates an opaque structure referenced by *pptrptr, NULL on error. + * Returns error code, BCME_OK if successful. + */ +int ppr_deserialize_create(osl_t *osh, const uint8* buf, uint buflen, ppr_t** pprptr); + +/* Subtract a common value from each power and re-store */ +void ppr_minus_cmn_val(ppr_t* pprptr, int8 val); + +/* Add a common value to the given bw struct components */ +void ppr_plus_cmn_val(ppr_t* pprptr, int8 val); + +/* Multiply a percentage */ +void ppr_multiply_percentage(ppr_t* pprptr, uint8 val); + + +#ifdef WLTXPWR_CACHE + +/** + * Usage of the WLTXPWR_CACHE API: + * 1. Reserve one or more entries in the cache for a specific chanspec: + * wlc_phy_txpwr_setup_entry(chanspec1); + * wlc_phy_txpwr_setup_entry(chanspec2); + * 2. Use any of the getter/setter functions. Note that they may return an error on a chanspec + * that was not reserved. For setter functions, for pointer type arguments (e.g. ppr_t), the + * cache maintains a reference to the caller provided object rather than copying it. + * 3. Use wlc_phy_txpwr_cache_clear() or wlc_phy_txpwr_cache_invalidate() to get rid of cache + * entries. Note that this clears, amongst others, ppr_t structs. + * + * For non-BMAC builds, only the cache is allowed to delete the ppr_t object, and the driver code is + * not allowed to reuse it for another channel as it can when the cache is not being used. + * + * For BMAC builds, the cache has to be made to release the stf offsets object to avoid some nasty + * race conditions. + * + * Mike thinks when this is reimplemented for trunk he would consider having a reference count + * associated with each object to make this cleaner. + * + * Note that the functions start with wlc_phy_* despite not residing in the PHY code. This is + * probably for historical reasons. + */ + +enum txpwr_cache_info_type { + TXPWR_CACHE_STF_OFFSETS, /* PPR offsets for stf */ + TXPWR_CACHE_POWER_OFFSETS, /* PPR offsets for phy */ + TXPWR_CACHE_NUM_TYPES, /* How many types of pwr info */ +}; + +#define TXPWR_STF_PWR_MIN_INVALID 0x80 +#define TXPWR_STF_TARGET_PWR_MIN_INVALID 0x40 +#define TXPWR_STF_TARGET_PWR_NOT_CACHED 0x20 + +extern ppr_t* wlc_phy_get_cached_pwr(chanspec_t chanspec, uint pwr_type); + +extern int wlc_phy_set_cached_pwr(osl_t *osh, chanspec_t chanspec, uint pwr_type, ppr_t* pwrptr); + +extern uint8 wlc_phy_get_cached_pwr_max(chanspec_t chanspec, uint core); + +extern int wlc_phy_set_cached_pwr_max(chanspec_t chanspec, uint core, uint8 max_pwr); + +extern uint8 wlc_phy_get_cached_pwr_min(chanspec_t chanspec, uint core); + +extern int wlc_phy_set_cached_pwr_min(chanspec_t chanspec, uint core, uint8 min_pwr); + +extern int wlc_phy_get_cached_stf_target_pwr_min(chanspec_t chanspec); + +extern int wlc_phy_set_cached_stf_target_pwr_min(chanspec_t chanspec, int min_pwr); + +extern int8 wlc_phy_get_cached_txchain_offsets(chanspec_t chanspec, uint core); + +extern int wlc_phy_set_cached_txchain_offsets(chanspec_t chanspec, uint core, int8 offset); + +extern bool wlc_phy_txpwr_cache_is_cached(chanspec_t chanspec); + +extern bool wlc_phy_is_pwr_cached(uint pwr_type, ppr_t* pwrptr); + +extern void wlc_phy_uncache_pwr(uint pwr_type, ppr_t* pwrptr); + +extern void wlc_phy_uncache_pwr(uint pwr_type, ppr_t* pwrptr); + +extern chanspec_t wlc_phy_txpwr_cache_find_other_cached_chanspec(chanspec_t chanspec); + +extern void wlc_phy_txpwr_cache_clear(osl_t *osh, chanspec_t chanspec); + +extern void wlc_phy_txpwr_cache_invalidate(void); + +extern void wlc_phy_txpwr_cache_close(osl_t *osh); + +extern int wlc_phy_txpwr_setup_entry(chanspec_t chanspec); + +extern bool wlc_phy_get_stf_ppr_cached(chanspec_t chanspec); + +extern void wlc_phy_set_stf_ppr_cached(chanspec_t chanspec, bool bcached); +#endif /* WLTXPWR_CACHE */ + +#endif /* _wlc_ppr_h_ */ diff --git a/external/cache/sources/wl/include/wlfc_proto.h b/external/cache/sources/wl/include/wlfc_proto.h new file mode 100644 index 0000000..b7649e6 --- /dev/null +++ b/external/cache/sources/wl/include/wlfc_proto.h @@ -0,0 +1,203 @@ +/* +* $Copyright Open 2009 Broadcom Corporation$ +* $Id: wlfc_proto.h 359986 2012-10-01 13:38:04Z $ +* +*/ +#ifndef __wlfc_proto_definitions_h__ +#define __wlfc_proto_definitions_h__ + + /* Use TLV to convey WLFC information. + --------------------------------------------------------------------------- + | Type | Len | value | Description + --------------------------------------------------------------------------- + | 1 | 1 | (handle) | MAC OPEN + --------------------------------------------------------------------------- + | 2 | 1 | (handle) | MAC CLOSE + --------------------------------------------------------------------------- + | 3 | 2 | (count, handle, prec_bmp)| Set the credit depth for a MAC dstn + --------------------------------------------------------------------------- + | 4 | 4 | see pkttag comments | TXSTATUS + --------------------------------------------------------------------------- + | 5 | 4 | see pkttag comments | PKKTTAG [host->firmware] + --------------------------------------------------------------------------- + | 6 | 8 | (handle, ifid, MAC) | MAC ADD + --------------------------------------------------------------------------- + | 7 | 8 | (handle, ifid, MAC) | MAC DEL + --------------------------------------------------------------------------- + | 8 | 1 | (rssi) | RSSI - RSSI value for the packet. + --------------------------------------------------------------------------- + | 9 | 1 | (interface ID) | Interface OPEN + --------------------------------------------------------------------------- + | 10 | 1 | (interface ID) | Interface CLOSE + --------------------------------------------------------------------------- + | 11 | 8 | fifo credit returns map | FIFO credits back to the host + | | | | + | | | | -------------------------------------- + | | | | | ac0 | ac1 | ac2 | ac3 | bcmc | atim | + | | | | -------------------------------------- + | | | | + --------------------------------------------------------------------------- + | 12 | 2 | MAC handle, | Host provides a bitmap of pending + | | | AC[0-3] traffic bitmap | unicast traffic for MAC-handle dstn. + | | | | [host->firmware] + --------------------------------------------------------------------------- + | 13 | 3 | (count, handle, prec_bmp)| One time request for packet to a specific + | | | | MAC destination. + --------------------------------------------------------------------------- + | 255 | N/A | N/A | FILLER - This is a special type + | | | | that has no length or value. + | | | | Typically used for padding. + --------------------------------------------------------------------------- + */ + +#define WLFC_CTL_TYPE_MAC_OPEN 1 +#define WLFC_CTL_TYPE_MAC_CLOSE 2 +#define WLFC_CTL_TYPE_MAC_REQUEST_CREDIT 3 +#define WLFC_CTL_TYPE_TXSTATUS 4 +#define WLFC_CTL_TYPE_PKTTAG 5 + +#define WLFC_CTL_TYPE_MACDESC_ADD 6 +#define WLFC_CTL_TYPE_MACDESC_DEL 7 +#define WLFC_CTL_TYPE_RSSI 8 + +#define WLFC_CTL_TYPE_INTERFACE_OPEN 9 +#define WLFC_CTL_TYPE_INTERFACE_CLOSE 10 + +#define WLFC_CTL_TYPE_FIFO_CREDITBACK 11 + +#define WLFC_CTL_TYPE_PENDING_TRAFFIC_BMP 12 +#define WLFC_CTL_TYPE_MAC_REQUEST_PACKET 13 +#define WLFC_CTL_TYPE_HOST_REORDER_RXPKTS 14 +#define WLFC_CTL_TYPE_TRANS_ID 18 + +#define WLFC_CTL_TYPE_COMP_TXSTATUS 19 + +#define WLFC_CTL_TYPE_FILLER 255 + +#define WLFC_CTL_VALUE_LEN_MACDESC 8 /* handle, interface, MAC */ + +#define WLFC_CTL_VALUE_LEN_MAC 1 /* MAC-handle */ +#define WLFC_CTL_VALUE_LEN_RSSI 1 + +#define WLFC_CTL_VALUE_LEN_INTERFACE 1 +#define WLFC_CTL_VALUE_LEN_PENDING_TRAFFIC_BMP 2 + +#define WLFC_CTL_VALUE_LEN_TXSTATUS 4 +#define WLFC_CTL_VALUE_LEN_PKTTAG 4 + +/* enough space to host all 4 ACs, bc/mc and atim fifo credit */ +#define WLFC_CTL_VALUE_LEN_FIFO_CREDITBACK 6 + +#define WLFC_CTL_VALUE_LEN_REQUEST_CREDIT 3 /* credit, MAC-handle, prec_bitmap */ +#define WLFC_CTL_VALUE_LEN_REQUEST_PACKET 3 /* credit, MAC-handle, prec_bitmap */ + + + +#define WLFC_PKTID_GEN_MASK 0x80000000 +#define WLFC_PKTID_GEN_SHIFT 31 + +#define WLFC_PKTID_GEN(x) (((x) & WLFC_PKTID_GEN_MASK) >> WLFC_PKTID_GEN_SHIFT) +#define WLFC_PKTID_SETGEN(x, gen) (x) = ((x) & ~WLFC_PKTID_GEN_MASK) | \ + (((gen) << WLFC_PKTID_GEN_SHIFT) & WLFC_PKTID_GEN_MASK) + +#define WLFC_PKTFLAG_PKTFROMHOST 0x01 +#define WLFC_PKTFLAG_PKT_REQUESTED 0x02 + +#define WL_TXSTATUS_FLAGS_MASK 0xf /* allow 4 bits only */ +#define WL_TXSTATUS_FLAGS_SHIFT 27 + +#define WL_TXSTATUS_SET_FLAGS(x, flags) ((x) = \ + ((x) & ~(WL_TXSTATUS_FLAGS_MASK << WL_TXSTATUS_FLAGS_SHIFT)) | \ + (((flags) & WL_TXSTATUS_FLAGS_MASK) << WL_TXSTATUS_FLAGS_SHIFT)) +#define WL_TXSTATUS_GET_FLAGS(x) (((x) >> WL_TXSTATUS_FLAGS_SHIFT) & \ + WL_TXSTATUS_FLAGS_MASK) + +#define WL_TXSTATUS_FIFO_MASK 0x7 /* allow 3 bits for FIFO ID */ +#define WL_TXSTATUS_FIFO_SHIFT 24 + +#define WL_TXSTATUS_SET_FIFO(x, flags) ((x) = \ + ((x) & ~(WL_TXSTATUS_FIFO_MASK << WL_TXSTATUS_FIFO_SHIFT)) | \ + (((flags) & WL_TXSTATUS_FIFO_MASK) << WL_TXSTATUS_FIFO_SHIFT)) +#define WL_TXSTATUS_GET_FIFO(x) (((x) >> WL_TXSTATUS_FIFO_SHIFT) & WL_TXSTATUS_FIFO_MASK) + +#define WL_TXSTATUS_PKTID_MASK 0xffffff /* allow 24 bits */ +#define WL_TXSTATUS_SET_PKTID(x, num) ((x) = \ + ((x) & ~WL_TXSTATUS_PKTID_MASK) | (num)) +#define WL_TXSTATUS_GET_PKTID(x) ((x) & WL_TXSTATUS_PKTID_MASK) + +/* 32 STA should be enough??, 6 bits; Must be power of 2 */ +#define WLFC_MAC_DESC_TABLE_SIZE 32 +#define WLFC_MAX_IFNUM 16 +#define WLFC_MAC_DESC_ID_INVALID 0xff + +/* b[7:5] -reuse guard, b[4:0] -value */ +#define WLFC_MAC_DESC_GET_LOOKUP_INDEX(x) ((x) & 0x1f) + +#define WLFC_PKTFLAG_SET_PKTREQUESTED(x) (x) |= \ + (WLFC_PKTFLAG_PKT_REQUESTED << WL_TXSTATUS_FLAGS_SHIFT) + +#define WLFC_PKTFLAG_CLR_PKTREQUESTED(x) (x) &= \ + ~(WLFC_PKTFLAG_PKT_REQUESTED << WL_TXSTATUS_FLAGS_SHIFT) + +#define WL_TXSTATUS_GENERATION_MASK 1 +#define WL_TXSTATUS_GENERATION_SHIFT 31 + +#define WLFC_PKTFLAG_SET_GENERATION(x, gen) ((x) = \ + ((x) & ~(WL_TXSTATUS_GENERATION_MASK << WL_TXSTATUS_GENERATION_SHIFT)) | \ + (((gen) & WL_TXSTATUS_GENERATION_MASK) << WL_TXSTATUS_GENERATION_SHIFT)) + +#define WLFC_PKTFLAG_GENERATION(x) (((x) >> WL_TXSTATUS_GENERATION_SHIFT) & \ + WL_TXSTATUS_GENERATION_MASK) + +#define WLFC_MAX_PENDING_DATALEN 120 + +/* host is free to discard the packet */ +#define WLFC_CTL_PKTFLAG_DISCARD 0 +/* D11 suppressed a packet */ +#define WLFC_CTL_PKTFLAG_D11SUPPRESS 1 +/* WL firmware suppressed a packet because MAC is + already in PSMode (short time window) +*/ +#define WLFC_CTL_PKTFLAG_WLSUPPRESS 2 +/* Firmware tossed this packet */ +#define WLFC_CTL_PKTFLAG_TOSSED_BYWLC 3 + +#define WLFC_D11_STATUS_INTERPRET(txs) \ + (((txs)->status.suppr_ind != 0) ? WLFC_CTL_PKTFLAG_D11SUPPRESS : WLFC_CTL_PKTFLAG_DISCARD) + +#ifdef PROP_TXSTATUS_DEBUG +#define WLFC_DBGMESG(x) printf x +/* wlfc-breadcrumb */ +#define WLFC_BREADCRUMB(x) do {if ((x) == NULL) \ + {printf("WLFC: %s():%d:caller:%p\n", \ + __FUNCTION__, __LINE__, __builtin_return_address(0));}} while (0) +#define WLFC_PRINTMAC(banner, ea) do {printf("%s MAC: [%02x:%02x:%02x:%02x:%02x:%02x]\n", \ + banner, ea[0], ea[1], ea[2], ea[3], ea[4], ea[5]); } while (0) +#define WLFC_WHEREIS(s) printf("WLFC: at %s():%d, %s\n", __FUNCTION__, __LINE__, (s)) +#else +#define WLFC_DBGMESG(x) +#define WLFC_BREADCRUMB(x) +#define WLFC_PRINTMAC(banner, ea) +#define WLFC_WHEREIS(s) +#endif + +/* host reorder packet flags */ +#define WLHOST_REORDERDATA_MAXFLOWS 256 +#define WLHOST_REORDERDATA_LEN 10 + +#define WLHOST_REORDERDATA_FLOWID_OFFSET 0 +#define WLHOST_REORDERDATA_MAXIDX_OFFSET 2 +#define WLHOST_REORDERDATA_FLAGS_OFFSET 4 +#define WLHOST_REORDERDATA_CURIDX_OFFSET 6 +#define WLHOST_REORDERDATA_EXPIDX_OFFSET 8 + +#define WLHOST_REORDERDATA_DEL_FLOW 0x01 +#define WLHOST_REORDERDATA_FLUSH_ALL 0x02 +#define WLHOST_REORDERDATA_CURIDX_VALID 0x04 +#define WLHOST_REORDERDATA_EXPIDX_VALID 0x08 +#define WLHOST_REORDERDATA_NEW_HOLE 0x10 + +/* wlfc host debug seqnumber */ +#define WLFC_TYPE_TRANS_ID_LEN 6 + +#endif /* __wlfc_proto_definitions_h__ */ diff --git a/external/cache/sources/wl/include/wlioctl.h b/external/cache/sources/wl/include/wlioctl.h new file mode 100644 index 0000000..a2fb3c0 --- /dev/null +++ b/external/cache/sources/wl/include/wlioctl.h @@ -0,0 +1,6600 @@ +/* + * Custom OID/ioctl definitions for + * Broadcom 802.11abg Networking Device Driver + * + * Definitions subject to change without notice. + * + * $Copyright Open Broadcom Corporation$ + * + * $Id: wlioctl.h 407107 2013-06-11 19:39:14Z esawma $ + */ + +#ifndef _wlioctl_h_ +#define _wlioctl_h_ + +#include +#include +#include +#include +#include +#include +#include +#include + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +#include +#include +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +/* XXX: LINUX_POSTMOGRIFY_REMOVAL: undefined during compile phase, so its + * a no-op for most cases. For hybrid and other open source releases, + * its defined during a second pass and mogrified out for distribution. + */ + +#ifdef __NetBSD__ +/* NetBSD 2.0 does not have SIOCDEVPRIVATE. */ +#define SIOCDEVPRIVATE _IOWR('i', 139, struct ifreq) +#endif + +#ifndef LINUX_POSTMOGRIFY_REMOVAL + +#ifndef INTF_NAME_SIZ +#define INTF_NAME_SIZ 16 +#endif + +/* Used to send ioctls over the transport pipe */ +typedef struct remote_ioctl { + cdc_ioctl_t msg; + uint data_len; +#ifndef OLYMPIC_RWL + char intf_name[INTF_NAME_SIZ]; +#endif +} rem_ioctl_t; +#define REMOTE_SIZE sizeof(rem_ioctl_t) +#ifdef EFI +/* XXX + * This is the Broadcom-specific guid selector for IOCTL handler in Apple 80211 Protocol + * define for EFI. However, we use last 4 nibbles to communicate 'cmd' from tool to + * driver. + */ +#define BCMWL_IOCTL_GUID \ + {0xB4910A35, 0x88C5, 0x4328, { 0x90, 0x08, 0x9F, 0xB2, 0x00, 0x00, 0x0, 0x0 } } +#endif /* EFI */ + +#define ACTION_FRAME_SIZE 1800 + +typedef struct wl_action_frame { + struct ether_addr da; + uint16 len; + uint32 packetId; + uint8 data[ACTION_FRAME_SIZE]; +} wl_action_frame_t; + +#define WL_WIFI_ACTION_FRAME_SIZE sizeof(struct wl_action_frame) + +typedef struct ssid_info +{ + uint8 ssid_len; /* the length of SSID */ + uint8 ssid[32]; /* SSID string */ +} ssid_info_t; + +typedef struct wl_af_params { + uint32 channel; + int32 dwell_time; + struct ether_addr BSSID; + wl_action_frame_t action_frame; +} wl_af_params_t; + +#define WL_WIFI_AF_PARAMS_SIZE sizeof(struct wl_af_params) + +#define MFP_TEST_FLAG_NORMAL 0 +#define MFP_TEST_FLAG_ANY_KEY 1 +typedef struct wl_sa_query { + uint32 flag; + uint8 action; + uint16 id; + struct ether_addr da; +} wl_sa_query_t; + +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +/* require default structure packing */ +#define BWL_DEFAULT_PACKING +#include + +/* Note: Due to unpredictable size, bool type should not be used in any ioctl argument structure + * Cf PR53622 + */ + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +/* Legacy structure to help keep backward compatible wl tool and tray app */ + +#define LEGACY_WL_BSS_INFO_VERSION 107 /* older version of wl_bss_info struct */ + +typedef struct wl_bss_info_107 { + uint32 version; /* version field */ + uint32 length; /* byte length of data in this record, + * starting at version and including IEs + */ + struct ether_addr BSSID; + uint16 beacon_period; /* units are Kusec */ + uint16 capability; /* Capability information */ + uint8 SSID_len; + uint8 SSID[32]; + struct { + uint count; /* # rates in this set */ + uint8 rates[16]; /* rates in 500kbps units w/hi bit set if basic */ + } rateset; /* supported rates */ + uint8 channel; /* Channel no. */ + uint16 atim_window; /* units are Kusec */ + uint8 dtim_period; /* DTIM period */ + int16 RSSI; /* receive signal strength (in dBm) */ + int8 phy_noise; /* noise (in dBm) */ + uint32 ie_length; /* byte length of Information Elements */ + /* variable length Information Elements */ +} wl_bss_info_107_t; + +/* + * Per-BSS information structure. + */ + +#define LEGACY2_WL_BSS_INFO_VERSION 108 /* old version of wl_bss_info struct */ + +/* BSS info structure + * Applications MUST CHECK ie_offset field and length field to access IEs and + * next bss_info structure in a vector (in wl_scan_results_t) + */ +typedef struct wl_bss_info_108 { + uint32 version; /* version field */ + uint32 length; /* byte length of data in this record, + * starting at version and including IEs + */ + struct ether_addr BSSID; + uint16 beacon_period; /* units are Kusec */ + uint16 capability; /* Capability information */ + uint8 SSID_len; + uint8 SSID[32]; + struct { + uint count; /* # rates in this set */ + uint8 rates[16]; /* rates in 500kbps units w/hi bit set if basic */ + } rateset; /* supported rates */ + chanspec_t chanspec; /* chanspec for bss */ + uint16 atim_window; /* units are Kusec */ + uint8 dtim_period; /* DTIM period */ + int16 RSSI; /* receive signal strength (in dBm) */ + int8 phy_noise; /* noise (in dBm) */ + + uint8 n_cap; /* BSS is 802.11N Capable */ + uint32 nbss_cap; /* 802.11N BSS Capabilities (based on HT_CAP_*) */ + uint8 ctl_ch; /* 802.11N BSS control channel number */ + uint32 reserved32[1]; /* Reserved for expansion of BSS properties */ + uint8 flags; /* flags */ + uint8 reserved[3]; /* Reserved for expansion of BSS properties */ + uint8 basic_mcs[MCSSET_LEN]; /* 802.11N BSS required MCS set */ + + uint16 ie_offset; /* offset at which IEs start, from beginning */ + uint32 ie_length; /* byte length of Information Elements */ + /* Add new fields here */ + /* variable length Information Elements */ +} wl_bss_info_108_t; + +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +#define WL_BSS_INFO_VERSION 109 /* current version of wl_bss_info struct */ + +/* BSS info structure + * Applications MUST CHECK ie_offset field and length field to access IEs and + * next bss_info structure in a vector (in wl_scan_results_t) + */ +typedef struct wl_bss_info { + uint32 version; /* version field */ + uint32 length; /* byte length of data in this record, + * starting at version and including IEs + */ + struct ether_addr BSSID; + uint16 beacon_period; /* units are Kusec */ + uint16 capability; /* Capability information */ + uint8 SSID_len; + uint8 SSID[32]; + struct { + uint count; /* # rates in this set */ + uint8 rates[16]; /* rates in 500kbps units w/hi bit set if basic */ + } rateset; /* supported rates */ + chanspec_t chanspec; /* chanspec for bss */ + uint16 atim_window; /* units are Kusec */ + uint8 dtim_period; /* DTIM period */ + int16 RSSI; /* receive signal strength (in dBm) */ + int8 phy_noise; /* noise (in dBm) */ + + uint8 n_cap; /* BSS is 802.11N Capable */ + uint32 nbss_cap; /* 802.11N+AC BSS Capabilities */ + uint8 ctl_ch; /* 802.11N BSS control channel number */ + uint8 padding1[3]; /* explicit struct alignment padding */ + uint16 vht_rxmcsmap; /* VHT rx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ + uint16 vht_txmcsmap; /* VHT tx mcs map (802.11ac IE, VHT_CAP_MCS_MAP_*) */ + uint8 flags; /* flags */ + uint8 vht_cap; /* BSS is vht capable */ + uint8 reserved[2]; /* Reserved for expansion of BSS properties */ + uint8 basic_mcs[MCSSET_LEN]; /* 802.11N BSS required MCS set */ + + uint16 ie_offset; /* offset at which IEs start, from beginning */ + uint32 ie_length; /* byte length of Information Elements */ + int16 SNR; /* average SNR of during frame reception */ + /* Add new fields here */ + /* variable length Information Elements */ +} wl_bss_info_t; + +/* bss_info_cap_t flags */ +#define WL_BSS_FLAGS_FROM_BEACON 0x01 /* bss_info derived from beacon */ +#define WL_BSS_FLAGS_FROM_CACHE 0x02 /* bss_info collected from cache */ +#define WL_BSS_FLAGS_RSSI_ONCHANNEL 0x04 /* rssi info was received on channel (vs offchannel) */ +#define WL_BSS_FLAGS_HS20 0x08 /* hotspot 2.0 capable */ + +/* bssinfo flag for nbss_cap */ +#define VHT_BI_SGI_80MHZ 0x00000100 +#define VHT_BI_80MHZ 0x00000200 +#define VHT_BI_160MHZ 0x00000400 +#define VHT_BI_8080MHZ 0x00000800 + +#ifndef LINUX_POSTMOGRIFY_REMOVAL + +typedef struct wl_bsscfg { + uint32 wsec; + uint32 WPA_auth; + uint32 wsec_index; + uint32 associated; + uint32 BSS; + uint32 phytest_on; + struct ether_addr prev_BSSID; + struct ether_addr BSSID; +} wl_bsscfg_t; + +typedef struct wl_bss_config { + uint32 atim_window; + uint32 beacon_period; + uint32 chanspec; +} wl_bss_config_t; + +#define WL_BSS_USER_RADAR_CHAN_SELECT 0x1 /* User application will randomply select + * radar channel. + */ + +#define DLOAD_HANDLER_VER 1 /* Downloader version */ +#define DLOAD_FLAG_VER_MASK 0xf000 /* Downloader version mask */ +#define DLOAD_FLAG_VER_SHIFT 12 /* Downloader version shift */ + +#define DL_CRC_NOT_INUSE 0x0001 + +/* generic download types & flags */ +enum { + DL_TYPE_UCODE = 1, + DL_TYPE_CLM = 2 +}; + +/* ucode type values */ +enum { + UCODE_FW, + INIT_VALS, + BS_INIT_VALS +}; + +struct wl_dload_data { + uint16 flag; + uint16 dload_type; + uint32 len; + uint32 crc; + uint8 data[1]; +}; +typedef struct wl_dload_data wl_dload_data_t; + +struct wl_ucode_info { + uint32 ucode_type; + uint32 num_chunks; + uint32 chunk_len; + uint32 chunk_num; + uint8 data_chunk[1]; +}; +typedef struct wl_ucode_info wl_ucode_info_t; + +struct wl_clm_dload_info { + uint32 ds_id; + uint32 clm_total_len; + uint32 num_chunks; + uint32 chunk_len; + uint32 chunk_offset; + uint8 data_chunk[1]; +}; +typedef struct wl_clm_dload_info wl_clm_dload_info_t; + +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +typedef struct wlc_ssid { + uint32 SSID_len; + uchar SSID[32]; +} wlc_ssid_t; + +#ifndef LINUX_POSTMOGRIFY_REMOVAL + +#define MAX_PREFERRED_AP_NUM 5 +typedef struct wlc_fastssidinfo { + uint32 SSID_channel[MAX_PREFERRED_AP_NUM]; + wlc_ssid_t SSID_info[MAX_PREFERRED_AP_NUM]; +} wlc_fastssidinfo_t; + +typedef BWL_PRE_PACKED_STRUCT struct wnm_url { + uint8 len; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT wnm_url_t; + +typedef struct chan_scandata { + uint8 txpower; + uint8 pad; + chanspec_t channel; /* Channel num, bw, ctrl_sb and band */ + uint32 channel_mintime; + uint32 channel_maxtime; +} chan_scandata_t; + +typedef enum wl_scan_type { + EXTDSCAN_FOREGROUND_SCAN, + EXTDSCAN_BACKGROUND_SCAN, + EXTDSCAN_FORCEDBACKGROUND_SCAN +} wl_scan_type_t; + +#define WLC_EXTDSCAN_MAX_SSID 5 + +typedef struct wl_extdscan_params { + int8 nprobes; /* 0, passive, otherwise active */ + int8 split_scan; /* split scan */ + int8 band; /* band */ + int8 pad; + wlc_ssid_t ssid[WLC_EXTDSCAN_MAX_SSID]; /* ssid list */ + uint32 tx_rate; /* in 500ksec units */ + wl_scan_type_t scan_type; /* enum */ + int32 channel_num; + chan_scandata_t channel_list[1]; /* list of chandata structs */ +} wl_extdscan_params_t; + +#define WL_EXTDSCAN_PARAMS_FIXED_SIZE (sizeof(wl_extdscan_params_t) - sizeof(chan_scandata_t)) + +#define WL_BSSTYPE_INFRA 1 +#define WL_BSSTYPE_INDEP 0 +#define WL_BSSTYPE_ANY 2 + +/* Bitmask for scan_type */ +/* XXX Reserved flag precludes the use of 0xff for scan_type which is + * interpreted as default for backward compatibility + */ +#define WL_SCANFLAGS_PASSIVE 0x01 /* force passive scan */ +#define WL_SCANFLAGS_RESERVED 0x02 /* Reserved */ +#define WL_SCANFLAGS_PROHIBITED 0x04 /* allow scanning prohibited channels */ +#define WL_SCANFLAGS_OFFCHAN 0x08 /* allow scanning/reporting off-channel APs */ +#define WL_SCANFLAGS_HOTSPOT 0x10 /* automatic ANQP to hotspot APs */ + +#define WL_SCAN_PARAMS_SSID_MAX 10 + +typedef struct wl_scan_params { + wlc_ssid_t ssid; /* default: {0, ""} */ + struct ether_addr bssid; /* default: bcast */ + int8 bss_type; /* default: any, + * DOT11_BSSTYPE_ANY/INFRASTRUCTURE/INDEPENDENT + */ + uint8 scan_type; /* flags, 0 use default */ + int32 nprobes; /* -1 use default, number of probes per channel */ + int32 active_time; /* -1 use default, dwell time per channel for + * active scanning + */ + int32 passive_time; /* -1 use default, dwell time per channel + * for passive scanning + */ + int32 home_time; /* -1 use default, dwell time for the home channel + * between channel scans + */ + int32 channel_num; /* count of channels and ssids that follow + * + * low half is count of channels in channel_list, 0 + * means default (use all available channels) + * + * high half is entries in wlc_ssid_t array that + * follows channel_list, aligned for int32 (4 bytes) + * meaning an odd channel count implies a 2-byte pad + * between end of channel_list and first ssid + * + * if ssid count is zero, single ssid in the fixed + * parameter portion is assumed, otherwise ssid in + * the fixed portion is ignored + */ + uint16 channel_list[1]; /* list of chanspecs */ +} wl_scan_params_t; + +/* size of wl_scan_params not including variable length array */ +#define WL_SCAN_PARAMS_FIXED_SIZE 64 + +/* masks for channel and ssid count */ +#define WL_SCAN_PARAMS_COUNT_MASK 0x0000ffff +#define WL_SCAN_PARAMS_NSSID_SHIFT 16 + +#define WL_SCAN_ACTION_START 1 +#define WL_SCAN_ACTION_CONTINUE 2 +#define WL_SCAN_ACTION_ABORT 3 + +#define ISCAN_REQ_VERSION 1 + +/* incremental scan struct */ +typedef struct wl_iscan_params { + uint32 version; + uint16 action; + uint16 scan_duration; + wl_scan_params_t params; +} wl_iscan_params_t; + +/* 3 fields + size of wl_scan_params, not including variable length array */ +#define WL_ISCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_iscan_params_t, params) + sizeof(wlc_ssid_t)) +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +typedef struct wl_scan_results { + uint32 buflen; + uint32 version; + uint32 count; + wl_bss_info_t bss_info[1]; +} wl_scan_results_t; + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +/* size of wl_scan_results not including variable length array */ +#define WL_SCAN_RESULTS_FIXED_SIZE (sizeof(wl_scan_results_t) - sizeof(wl_bss_info_t)) + +/* wl_iscan_results status values */ +#define WL_SCAN_RESULTS_SUCCESS 0 +#define WL_SCAN_RESULTS_PARTIAL 1 +#define WL_SCAN_RESULTS_PENDING 2 +#define WL_SCAN_RESULTS_ABORTED 3 +#define WL_SCAN_RESULTS_NO_MEM 4 + +/* Used in EXT_STA */ +#define DNGL_RXCTXT_SIZE 45 + +#if defined(SIMPLE_ISCAN) +#define ISCAN_RETRY_CNT 5 +#define ISCAN_STATE_IDLE 0 +#define ISCAN_STATE_SCANING 1 +#define ISCAN_STATE_PENDING 2 + +/* the buf lengh can be WLC_IOCTL_MAXLEN (8K) to reduce iteration */ +#define WLC_IW_ISCAN_MAXLEN 2048 +typedef struct iscan_buf { + struct iscan_buf * next; + char iscan_buf[WLC_IW_ISCAN_MAXLEN]; +} iscan_buf_t; +#endif /* SIMPLE_ISCAN */ + +#define ESCAN_REQ_VERSION 1 + +typedef struct wl_escan_params { + uint32 version; + uint16 action; + uint16 sync_id; + wl_scan_params_t params; +} wl_escan_params_t; + +#define WL_ESCAN_PARAMS_FIXED_SIZE (OFFSETOF(wl_escan_params_t, params) + sizeof(wlc_ssid_t)) + +typedef struct wl_escan_result { + uint32 buflen; + uint32 version; + uint16 sync_id; + uint16 bss_count; + wl_bss_info_t bss_info[1]; +} wl_escan_result_t; + +#define WL_ESCAN_RESULTS_FIXED_SIZE (sizeof(wl_escan_result_t) - sizeof(wl_bss_info_t)) + +/* incremental scan results struct */ +typedef struct wl_iscan_results { + uint32 status; + wl_scan_results_t results; +} wl_iscan_results_t; + +/* size of wl_iscan_results not including variable length array */ +#define WL_ISCAN_RESULTS_FIXED_SIZE \ + (WL_SCAN_RESULTS_FIXED_SIZE + OFFSETOF(wl_iscan_results_t, results)) + +#define SCANOL_ENABLED (1 << 0) +#define SCANOL_BCAST_SSID (1 << 1) +#define SCANOL_NOTIFY_BCAST_SSID (1 << 2) +#define SCANOL_RESULTS_PER_CYCLE (1 << 3) +#define SCANOL_PARAMS_VERSION 1 + +/* scan times in milliseconds */ +#define SCANOL_HOME_TIME 45 /* for home channel processing */ +#define SCANOL_ASSOC_TIME 20 /* dwell on a channel while associated */ +#define SCANOL_UNASSOC_TIME 40 /* dwell on a channel while unassociated */ +#define SCANOL_PASSIVE_TIME 110 /* listen on a channelfor passive scan */ +#define SCANOL_AWAY_LIMIT 100 /* max time to be away from home channel */ +#define SCANOL_IDLE_REST_TIME 40 +#define SCANOL_IDLE_REST_MULTIPLIER 0 +#define SCANOL_ACTIVE_REST_TIME 20 +#define SCANOL_ACTIVE_REST_MULTIPLIER 0 +#define SCANOL_CYCLE_IDLE_REST_TIME 300000 /* Idle Rest Time between Scan Cycle (msec) */ +#define SCANOL_CYCLE_IDLE_REST_MULTIPLIER 0 /* Idle Rest Time Multiplier */ +#define SCANOL_CYCLE_ACTIVE_REST_TIME 200 +#define SCANOL_CYCLE_ACTIVE_REST_MULTIPLIER 0 +#define SCANOL_MAX_REST_TIME 3600000 /* max rest time between scan cycle (msec) */ +#define SCANOL_CYCLE_DEFAULT 0 /* default for Max Scan Cycle, 0 = forever */ +#define SCANOL_CYCLE_MAX 864000 /* Max Scan Cycle */ + /* 10 sec/scan cycle => 100 days */ +#define SCANOL_NPROBES 2 /* for Active scan; send n probes on each channel */ +#define SCANOL_NPROBES_MAX 5 /* for Active scan; send n probes on each channel */ +#define SCANOL_SCAN_START_DLY 10 /* delay start of offload scan (sec) */ +#define SCANOL_SCAN_START_DLY_MAX 240 /* delay start of offload scan (sec) */ +#define SCANOL_MULTIPLIER_MAX 10 /* Max Multiplier */ +#define SCANOL_UNASSOC_TIME_MAX 100 /* max dwell on a channel while unassociated */ +#define SCANOL_PASSIVE_TIME_MAX 500 /* max listen on a channel for passive scan */ +#define SCANOL_SSID_MAX 16 /* max supported preferred SSID */ + +typedef struct scanol_params { + uint32 version; + uint32 flags; /* offload scanning flags */ + int32 active_time; /* -1 use default, dwell time per channel for active scanning */ + int32 passive_time; /* -1 use default, dwell time per channel for passive scanning */ + int32 idle_rest_time; /* -1 use default, time idle between scan cycle */ + int32 idle_rest_time_multiplier; + int32 active_rest_time; + int32 active_rest_time_multiplier; + int32 scan_cycle_idle_rest_time; + int32 scan_cycle_idle_rest_multiplier; + int32 scan_cycle_active_rest_time; + int32 scan_cycle_active_rest_multiplier; + int32 max_rest_time; + int32 max_scan_cycles; + int32 nprobes; /* -1 use default, number of probes per channel */ + int32 scan_start_delay; + uint32 nchannels; + uint32 ssid_count; + wlc_ssid_t ssidlist[1]; +} scanol_params_t; + +typedef struct wl_probe_params { + wlc_ssid_t ssid; + struct ether_addr bssid; + struct ether_addr mac; +} wl_probe_params_t; +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +#define WL_MAXRATES_IN_SET 16 /* max # of rates in a rateset */ +typedef struct wl_rateset { + uint32 count; /* # rates in this set */ + uint8 rates[WL_MAXRATES_IN_SET]; /* rates in 500kbps units w/hi bit set if basic */ +} wl_rateset_t; + +typedef struct wl_rateset_args { + uint32 count; /* # rates in this set */ + uint8 rates[WL_MAXRATES_IN_SET]; /* rates in 500kbps units w/hi bit set if basic */ + uint8 mcs[MCSSET_LEN]; /* supported mcs index bit map */ + uint16 vht_mcs[VHT_CAP_MCS_MAP_NSS_MAX]; /* supported mcs index bit map per nss */ +} wl_rateset_args_t; + +#define TXBF_RATE_MCS_ALL 4 +#define TXBF_RATE_VHT_ALL 4 +#define TXBF_RATE_OFDM_ALL 8 + +typedef struct wl_txbf_rateset { + uint8 txbf_rate_mcs[TXBF_RATE_MCS_ALL]; /* one for each stream */ + uint8 txbf_rate_mcs_bcm[TXBF_RATE_MCS_ALL]; /* one for each stream */ + uint16 txbf_rate_vht[TXBF_RATE_VHT_ALL]; /* one for each stream */ + uint16 txbf_rate_vht_bcm[TXBF_RATE_VHT_ALL]; /* one for each stream */ + uint8 txbf_rate_ofdm[TXBF_RATE_OFDM_ALL]; /* bitmap of ofdm rates that enables txbf */ + uint8 txbf_rate_ofdm_bcm[TXBF_RATE_OFDM_ALL]; /* bitmap of ofdm rates that enables txbf */ + uint8 txbf_rate_ofdm_cnt; + uint8 txbf_rate_ofdm_cnt_bcm; +} wl_txbf_rateset_t; + +#define OFDM_RATE_MASK 0x0000007f +typedef uint8 ofdm_rates_t; + +/* uint32 list */ +typedef struct wl_uint32_list { + /* in - # of elements, out - # of entries */ + uint32 count; + /* variable length uint32 list */ + uint32 element[1]; +} wl_uint32_list_t; + +/* used for association with a specific BSSID and chanspec list */ +typedef struct wl_assoc_params { + struct ether_addr bssid; /* 00:00:00:00:00:00: broadcast scan */ + uint16 bssid_cnt; /* 0: just use chanspec_num, + * otherwise count of chanspecs in chanspec_list + * AND paired bssids following chanspec_list + */ + int32 chanspec_num; /* 0: all available channels, + * otherwise count of chanspecs in chanspec_list + */ + chanspec_t chanspec_list[1]; /* list of chanspecs */ +} wl_assoc_params_t; +#define WL_ASSOC_PARAMS_FIXED_SIZE OFFSETOF(wl_assoc_params_t, chanspec_list) + +/* used for reassociation/roam to a specific BSSID and channel */ +typedef wl_assoc_params_t wl_reassoc_params_t; +#define WL_REASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE + +/* used for association to a specific BSSID and channel */ +typedef wl_assoc_params_t wl_join_assoc_params_t; +#define WL_JOIN_ASSOC_PARAMS_FIXED_SIZE WL_ASSOC_PARAMS_FIXED_SIZE + +/* used for join with or without a specific bssid and channel list */ +typedef struct wl_join_params { + wlc_ssid_t ssid; + wl_assoc_params_t params; /* optional field, but it must include the fixed portion + * of the wl_assoc_params_t struct when it does present. + */ +} wl_join_params_t; + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +#define WL_JOIN_PARAMS_FIXED_SIZE (OFFSETOF(wl_join_params_t, params) + \ + WL_ASSOC_PARAMS_FIXED_SIZE) +/* scan params for extended join */ +typedef struct wl_join_scan_params { + uint8 scan_type; /* 0 use default, active or passive scan */ + int32 nprobes; /* -1 use default, number of probes per channel */ + int32 active_time; /* -1 use default, dwell time per channel for + * active scanning + */ + int32 passive_time; /* -1 use default, dwell time per channel + * for passive scanning + */ + int32 home_time; /* -1 use default, dwell time for the home channel + * between channel scans + */ +} wl_join_scan_params_t; + +/* extended join params */ +typedef struct wl_extjoin_params { + wlc_ssid_t ssid; /* {0, ""}: wildcard scan */ + wl_join_scan_params_t scan; + wl_join_assoc_params_t assoc; /* optional field, but it must include the fixed portion + * of the wl_join_assoc_params_t struct when it does + * present. + */ +} wl_extjoin_params_t; +#define WL_EXTJOIN_PARAMS_FIXED_SIZE (OFFSETOF(wl_extjoin_params_t, assoc) + \ + WL_JOIN_ASSOC_PARAMS_FIXED_SIZE) + + +#ifndef D11AC_IOTYPES + +/* defines used by the nrate iovar */ +#define NRATE_MCS_INUSE 0x00000080 /* MSC in use,indicates b0-6 holds an mcs */ +#define NRATE_RATE_MASK 0x0000007f /* rate/mcs value */ +#define NRATE_STF_MASK 0x0000ff00 /* stf mode mask: siso, cdd, stbc, sdm */ +#define NRATE_STF_SHIFT 8 /* stf mode shift */ +#define NRATE_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */ +#define NRATE_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicate to override mcs only */ +#define NRATE_SGI_MASK 0x00800000 /* sgi mode */ +#define NRATE_SGI_SHIFT 23 /* sgi mode */ +#define NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */ +#define NRATE_LDPC_SHIFT 22 /* ldpc shift */ +#define NRATE_BCMC_OVERRIDE 0x00200000 /* bit indicates BCMC override */ +#define NRATE_BCMC_SHIFT 21 /* BCMC override shift */ + +#define NRATE_STF_SISO 0 /* stf mode SISO */ +#define NRATE_STF_CDD 1 /* stf mode CDD */ +#define NRATE_STF_STBC 2 /* stf mode STBC */ +#define NRATE_STF_SDM 3 /* stf mode SDM */ + +#else /* D11AC_IOTYPES */ + +/* WL_RSPEC defines for rate information */ +#define WL_RSPEC_RATE_MASK 0x000000FF /* rate or HT MCS value */ +#define WL_RSPEC_VHT_MCS_MASK 0x0000000F /* VHT MCS value */ +#define WL_RSPEC_VHT_NSS_MASK 0x000000F0 /* VHT Nss value */ +#define WL_RSPEC_VHT_NSS_SHIFT 4 /* VHT Nss value shift */ +#define WL_RSPEC_TXEXP_MASK 0x00000300 +#define WL_RSPEC_TXEXP_SHIFT 8 +#define WL_RSPEC_BW_MASK 0x00070000 /* bandwidth mask */ +#define WL_RSPEC_BW_SHIFT 16 /* bandwidth shift */ +#define WL_RSPEC_STBC 0x00100000 /* STBC encoding, Nsts = 2 x Nss */ +#define WL_RSPEC_TXBF 0x00200000 /* bit indicates TXBF mode */ +#define WL_RSPEC_LDPC 0x00400000 /* bit indicates adv coding in use */ +#define WL_RSPEC_SGI 0x00800000 /* Short GI mode */ +#define WL_RSPEC_ENCODING_MASK 0x03000000 /* Encoding of Rate/MCS field */ +#define WL_RSPEC_OVERRIDE_RATE 0x40000000 /* bit indicate to override mcs only */ +#define WL_RSPEC_OVERRIDE_MODE 0x80000000 /* bit indicates override both rate & mode */ + +/* WL_RSPEC_ENCODING field defs */ +#define WL_RSPEC_ENCODE_RATE 0x00000000 /* Legacy rate is stored in RSPEC_RATE_MASK */ +#define WL_RSPEC_ENCODE_HT 0x01000000 /* HT MCS is stored in RSPEC_RATE_MASK */ +#define WL_RSPEC_ENCODE_VHT 0x02000000 /* VHT MCS and Nss is stored in RSPEC_RATE_MASK */ + +/* WL_RSPEC_BW field defs */ +#define WL_RSPEC_BW_UNSPECIFIED 0 +#define WL_RSPEC_BW_20MHZ 0x00010000 +#define WL_RSPEC_BW_40MHZ 0x00020000 +#define WL_RSPEC_BW_80MHZ 0x00030000 +#define WL_RSPEC_BW_160MHZ 0x00040000 + +/* Legacy defines for the nrate iovar */ +#define OLD_NRATE_MCS_INUSE 0x00000080 /* MSC in use,indicates b0-6 holds an mcs */ +#define OLD_NRATE_RATE_MASK 0x0000007f /* rate/mcs value */ +#define OLD_NRATE_STF_MASK 0x0000ff00 /* stf mode mask: siso, cdd, stbc, sdm */ +#define OLD_NRATE_STF_SHIFT 8 /* stf mode shift */ +#define OLD_NRATE_OVERRIDE 0x80000000 /* bit indicates override both rate & mode */ +#define OLD_NRATE_OVERRIDE_MCS_ONLY 0x40000000 /* bit indicate to override mcs only */ +#define OLD_NRATE_SGI 0x00800000 /* sgi mode */ +#define OLD_NRATE_LDPC_CODING 0x00400000 /* bit indicates adv coding in use */ + +#define OLD_NRATE_STF_SISO 0 /* stf mode SISO */ +#define OLD_NRATE_STF_CDD 1 /* stf mode CDD */ +#define OLD_NRATE_STF_STBC 2 /* stf mode STBC */ +#define OLD_NRATE_STF_SDM 3 /* stf mode SDM */ + +#endif /* D11AC_IOTYPES */ + +#define ANTENNA_NUM_1 1 /* total number of antennas to be used */ +#define ANTENNA_NUM_2 2 +#define ANTENNA_NUM_3 3 +#define ANTENNA_NUM_4 4 + +#define ANT_SELCFG_AUTO 0x80 /* bit indicates antenna sel AUTO */ +#define ANT_SELCFG_MASK 0x33 /* antenna configuration mask */ +#define ANT_SELCFG_MAX 4 /* max number of antenna configurations */ +#define ANT_SELCFG_TX_UNICAST 0 /* unicast tx antenna configuration */ +#define ANT_SELCFG_RX_UNICAST 1 /* unicast rx antenna configuration */ +#define ANT_SELCFG_TX_DEF 2 /* default tx antenna configuration */ +#define ANT_SELCFG_RX_DEF 3 /* default rx antenna configuration */ + +#define MAX_STREAMS_SUPPORTED 4 /* max number of streams supported */ + +typedef struct { + uint8 ant_config[ANT_SELCFG_MAX]; /* antenna configuration */ + uint8 num_antcfg; /* number of available antenna configurations */ +} wlc_antselcfg_t; + +#define HIGHEST_SINGLE_STREAM_MCS 7 /* MCS values greater than this enable multiple streams */ + +#define MAX_CCA_CHANNELS 38 /* Max number of 20 Mhz wide channels */ +#define MAX_CCA_SECS 60 /* CCA keeps this many seconds history */ + +#define IBSS_MED 15 /* Mediom in-bss congestion percentage */ +#define IBSS_HI 25 /* Hi in-bss congestion percentage */ +#define OBSS_MED 12 +#define OBSS_HI 25 +#define INTERFER_MED 5 +#define INTERFER_HI 10 + +#define CCA_FLAG_2G_ONLY 0x01 /* Return a channel from 2.4 Ghz band */ +#define CCA_FLAG_5G_ONLY 0x02 /* Return a channel from 2.4 Ghz band */ +#define CCA_FLAG_IGNORE_DURATION 0x04 /* Ignore dwell time for each channel */ +#define CCA_FLAGS_PREFER_1_6_11 0x10 +#define CCA_FLAG_IGNORE_INTERFER 0x20 /* do not exlude channel based on interfer level */ + +#define CCA_ERRNO_BAND 1 /* After filtering for band pref, no choices left */ +#define CCA_ERRNO_DURATION 2 /* After filtering for duration, no choices left */ +#define CCA_ERRNO_PREF_CHAN 3 /* After filtering for chan pref, no choices left */ +#define CCA_ERRNO_INTERFER 4 /* After filtering for interference, no choices left */ +#define CCA_ERRNO_TOO_FEW 5 /* Only 1 channel was input */ + +typedef struct { + uint32 duration; /* millisecs spent sampling this channel */ + uint32 congest_ibss; /* millisecs in our bss (presumably this traffic will */ + /* move if cur bss moves channels) */ + uint32 congest_obss; /* traffic not in our bss */ + uint32 interference; /* millisecs detecting a non 802.11 interferer. */ + uint32 timestamp; /* second timestamp */ +} cca_congest_t; + +typedef struct { + chanspec_t chanspec; /* Which channel? */ + uint8 num_secs; /* How many secs worth of data */ + cca_congest_t secs[1]; /* Data */ +} cca_congest_channel_req_t; + +/* interference source detection and identification mode */ +#define ITFR_MODE_DISABLE 0 /* disable feature */ +#define ITFR_MODE_MANUAL_ENABLE 1 /* enable manual detection */ +#define ITFR_MODE_AUTO_ENABLE 2 /* enable auto detection */ + +/* interference sources */ +enum interference_source { + ITFR_NONE = 0, /* interference */ + ITFR_PHONE, /* wireless phone */ + ITFR_VIDEO_CAMERA, /* wireless video camera */ + ITFR_MICROWAVE_OVEN, /* microwave oven */ + ITFR_BABY_MONITOR, /* wireless baby monitor */ + ITFR_BLUETOOTH, /* bluetooth */ + ITFR_VIDEO_CAMERA_OR_BABY_MONITOR, /* wireless camera or baby monitor */ + ITFR_BLUETOOTH_OR_BABY_MONITOR, /* bluetooth or baby monitor */ + ITFR_VIDEO_CAMERA_OR_PHONE, /* video camera or phone */ + ITFR_UNIDENTIFIED /* interference from unidentified source */ +}; + +/* structure for interference source report */ +typedef struct { + uint32 flags; /* flags. bit definitions below */ + uint32 source; /* last detected interference source */ + uint32 timestamp; /* second timestamp on interferenced flag change */ +} interference_source_rep_t; + +/* bit definitions for flags in interference source report */ +#define ITFR_INTERFERENCED 1 /* interference detected */ +#define ITFR_HOME_CHANNEL 2 /* home channel has interference */ +#define ITFR_NOISY_ENVIRONMENT 4 /* noisy environemnt so feature stopped */ + +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +#define WLC_CNTRY_BUF_SZ 4 /* Country string is 3 bytes + NUL */ + +#ifndef LINUX_POSTMOGRIFY_REMOVAL + +typedef struct wl_country { + char country_abbrev[WLC_CNTRY_BUF_SZ]; /* nul-terminated country code used in + * the Country IE + */ + int32 rev; /* revision specifier for ccode + * on set, -1 indicates unspecified. + * on get, rev >= 0 + */ + char ccode[WLC_CNTRY_BUF_SZ]; /* nul-terminated built-in country code. + * variable length, but fixed size in + * struct allows simple allocation for + * expected country strings <= 3 chars. + */ +} wl_country_t; + +typedef struct wl_channels_in_country { + uint32 buflen; + uint32 band; + char country_abbrev[WLC_CNTRY_BUF_SZ]; + uint32 count; + uint32 channel[1]; +} wl_channels_in_country_t; + +typedef struct wl_country_list { + uint32 buflen; + uint32 band_set; + uint32 band; + uint32 count; + char country_abbrev[1]; +} wl_country_list_t; + +#define WL_NUM_RPI_BINS 8 +#define WL_RM_TYPE_BASIC 1 +#define WL_RM_TYPE_CCA 2 +#define WL_RM_TYPE_RPI 3 + +#define WL_RM_FLAG_PARALLEL (1<<0) + +#define WL_RM_FLAG_LATE (1<<1) +#define WL_RM_FLAG_INCAPABLE (1<<2) +#define WL_RM_FLAG_REFUSED (1<<3) + +typedef struct wl_rm_req_elt { + int8 type; + int8 flags; + chanspec_t chanspec; + uint32 token; /* token for this measurement */ + uint32 tsf_h; /* TSF high 32-bits of Measurement start time */ + uint32 tsf_l; /* TSF low 32-bits */ + uint32 dur; /* TUs */ +} wl_rm_req_elt_t; + +typedef struct wl_rm_req { + uint32 token; /* overall measurement set token */ + uint32 count; /* number of measurement requests */ + void *cb; /* completion callback function: may be NULL */ + void *cb_arg; /* arg to completion callback function */ + wl_rm_req_elt_t req[1]; /* variable length block of requests */ +} wl_rm_req_t; +#define WL_RM_REQ_FIXED_LEN OFFSETOF(wl_rm_req_t, req) + +typedef struct wl_rm_rep_elt { + int8 type; + int8 flags; + chanspec_t chanspec; + uint32 token; /* token for this measurement */ + uint32 tsf_h; /* TSF high 32-bits of Measurement start time */ + uint32 tsf_l; /* TSF low 32-bits */ + uint32 dur; /* TUs */ + uint32 len; /* byte length of data block */ + uint8 data[1]; /* variable length data block */ +} wl_rm_rep_elt_t; +#define WL_RM_REP_ELT_FIXED_LEN 24 /* length excluding data block */ + +#define WL_RPI_REP_BIN_NUM 8 +typedef struct wl_rm_rpi_rep { + uint8 rpi[WL_RPI_REP_BIN_NUM]; + int8 rpi_max[WL_RPI_REP_BIN_NUM]; +} wl_rm_rpi_rep_t; + +typedef struct wl_rm_rep { + uint32 token; /* overall measurement set token */ + uint32 len; /* length of measurement report block */ + wl_rm_rep_elt_t rep[1]; /* variable length block of reports */ +} wl_rm_rep_t; +#define WL_RM_REP_FIXED_LEN 8 + +#ifdef BCMCCX + +#define LEAP_USER_MAX 32 +#define LEAP_DOMAIN_MAX 32 +#define LEAP_PASSWORD_MAX 32 + +typedef struct wl_leap_info { + wlc_ssid_t ssid; + uint8 user_len; + uchar user[LEAP_USER_MAX]; + uint8 password_len; + uchar password[LEAP_PASSWORD_MAX]; + uint8 domain_len; + uchar domain[LEAP_DOMAIN_MAX]; +} wl_leap_info_t; + +typedef struct wl_leap_list { + uint32 buflen; + uint32 version; + uint32 count; + wl_leap_info_t leap_info[1]; +} wl_leap_list_t; +#endif /* BCMCCX */ + +#if defined(BCMCCX) || defined(BCMSUP_PSK) || defined(BCMDONGLEHOST) +typedef enum sup_auth_status { + /* Basic supplicant authentication states */ + WLC_SUP_DISCONNECTED = 0, + WLC_SUP_CONNECTING, + WLC_SUP_IDREQUIRED, + WLC_SUP_AUTHENTICATING, + WLC_SUP_AUTHENTICATED, + WLC_SUP_KEYXCHANGE, + WLC_SUP_KEYED, + WLC_SUP_TIMEOUT, + WLC_SUP_LAST_BASIC_STATE, + + /* Extended supplicant authentication states */ + /* Waiting to receive handshake msg M1 */ + WLC_SUP_KEYXCHANGE_WAIT_M1 = WLC_SUP_AUTHENTICATED, + /* Preparing to send handshake msg M2 */ + WLC_SUP_KEYXCHANGE_PREP_M2 = WLC_SUP_KEYXCHANGE, + /* Waiting to receive handshake msg M3 */ + WLC_SUP_KEYXCHANGE_WAIT_M3 = WLC_SUP_LAST_BASIC_STATE, + WLC_SUP_KEYXCHANGE_PREP_M4, /* Preparing to send handshake msg M4 */ + WLC_SUP_KEYXCHANGE_WAIT_G1, /* Waiting to receive handshake msg G1 */ + WLC_SUP_KEYXCHANGE_PREP_G2 /* Preparing to send handshake msg G2 */ +} sup_auth_status_t; +#endif /* defined(BCMCCX) || defined(BCMSUP_PSK) || defined(BCMDONGLEHOST) */ +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +/* Enumerate crypto algorithms */ +#define CRYPTO_ALGO_OFF 0 +#define CRYPTO_ALGO_WEP1 1 +#define CRYPTO_ALGO_TKIP 2 +#define CRYPTO_ALGO_WEP128 3 +#define CRYPTO_ALGO_AES_CCM 4 +#define CRYPTO_ALGO_AES_OCB_MSDU 5 +#define CRYPTO_ALGO_AES_OCB_MPDU 6 +#if !defined(BCMCCX) && !defined(BCMEXTCCX) +#define CRYPTO_ALGO_NALG 7 +#else +#define CRYPTO_ALGO_CKIP 7 +#define CRYPTO_ALGO_CKIP_MMH 8 +#define CRYPTO_ALGO_WEP_MMH 9 +#define CRYPTO_ALGO_NALG 10 +#endif /* !BCMCCX && !BCMEXTCCX */ +#ifdef BCMWAPI_WPI +#define CRYPTO_ALGO_SMS4 11 +#endif /* BCMWAPI_WPI */ +#define CRYPTO_ALGO_PMK 12 /* for 802.1x supp to set PMK before 4-way */ +#define CRYPTO_ALGO_BIP 13 /* 802.11w BIP (aes cmac) */ + +#define WSEC_GEN_MIC_ERROR 0x0001 +#define WSEC_GEN_REPLAY 0x0002 +#define WSEC_GEN_ICV_ERROR 0x0004 +#define WSEC_GEN_MFP_ACT_ERROR 0x0008 +#define WSEC_GEN_MFP_DISASSOC_ERROR 0x0010 +#define WSEC_GEN_MFP_DEAUTH_ERROR 0x0020 + +#define WL_SOFT_KEY (1 << 0) /* Indicates this key is using soft encrypt */ +#define WL_PRIMARY_KEY (1 << 1) /* Indicates this key is the primary (ie tx) key */ +#if defined(BCMCCX) || defined(BCMEXTCCX) +#define WL_CKIP_KP (1 << 4) /* CMIC */ +#define WL_CKIP_MMH (1 << 5) /* CKIP */ +#else +#define WL_KF_RES_4 (1 << 4) /* Reserved for backward compat */ +#define WL_KF_RES_5 (1 << 5) /* Reserved for backward compat */ +#endif /* BCMCCX || BCMEXTCCX */ +#define WL_IBSS_PEER_GROUP_KEY (1 << 6) /* Indicates a group key for a IBSS PEER */ + +typedef struct wl_wsec_key { + uint32 index; /* key index */ + uint32 len; /* key length */ + uint8 data[DOT11_MAX_KEY_SIZE]; /* key data */ + uint32 pad_1[18]; + uint32 algo; /* CRYPTO_ALGO_AES_CCM, CRYPTO_ALGO_WEP128, etc */ + uint32 flags; /* misc flags */ + uint32 pad_2[2]; + int pad_3; + int iv_initialized; /* has IV been initialized already? */ + int pad_4; + /* Rx IV */ + struct { + uint32 hi; /* upper 32 bits of IV */ + uint16 lo; /* lower 16 bits of IV */ + } rxiv; + uint32 pad_5[2]; + struct ether_addr ea; /* per station */ +} wl_wsec_key_t; + +#define WSEC_MIN_PSK_LEN 8 +#define WSEC_MAX_PSK_LEN 64 + +/* Flag for key material needing passhash'ing */ +#define WSEC_PASSPHRASE (1<<0) + +/* receptacle for WLC_SET_WSEC_PMK parameter */ +typedef struct { + ushort key_len; /* octets in key material */ + ushort flags; /* key handling qualification */ + uint8 key[WSEC_MAX_PSK_LEN]; /* PMK material */ +} wsec_pmk_t; + +/* wireless security bitvec */ +#define WEP_ENABLED 0x0001 +#define TKIP_ENABLED 0x0002 +#define AES_ENABLED 0x0004 +#define WSEC_SWFLAG 0x0008 +#ifdef BCMCCX +#define CKIP_KP_ENABLED 0x0010 +#define CKIP_MIC_ENABLED 0x0020 +#endif /* BCMCCX */ +#define SES_OW_ENABLED 0x0040 /* to go into transition mode without setting wep */ +#ifdef WLFIPS +#define FIPS_ENABLED 0x0080 +#endif /* WLFIPS */ +#ifdef BCMWAPI_WPI +#define SMS4_ENABLED 0x0100 +#endif /* BCMWAPI_WPI */ + +/* wsec macros for operating on the above definitions */ +#define WSEC_WEP_ENABLED(wsec) ((wsec) & WEP_ENABLED) +#define WSEC_TKIP_ENABLED(wsec) ((wsec) & TKIP_ENABLED) +#define WSEC_AES_ENABLED(wsec) ((wsec) & AES_ENABLED) + +#ifdef BCMCCX +#define WSEC_CKIP_KP_ENABLED(wsec) ((wsec) & CKIP_KP_ENABLED) +#define WSEC_CKIP_MIC_ENABLED(wsec) ((wsec) & CKIP_MIC_ENABLED) +#define WSEC_CKIP_ENABLED(wsec) ((wsec) & (CKIP_KP_ENABLED|CKIP_MIC_ENABLED)) + +#ifdef BCMWAPI_WPI +#define WSEC_ENABLED(wsec) \ + ((wsec) & (WEP_ENABLED | TKIP_ENABLED | AES_ENABLED | CKIP_KP_ENABLED | \ + CKIP_MIC_ENABLED | SMS4_ENABLED)) +#else /* BCMWAPI_WPI */ +#define WSEC_ENABLED(wsec) \ + ((wsec) & \ + (WEP_ENABLED | TKIP_ENABLED | AES_ENABLED | CKIP_KP_ENABLED | CKIP_MIC_ENABLED)) +#endif /* BCMWAPI_WPI */ +#else /* defined BCMCCX */ +#ifdef BCMWAPI_WPI +#define WSEC_ENABLED(wsec) ((wsec) & (WEP_ENABLED | TKIP_ENABLED | AES_ENABLED | SMS4_ENABLED)) +#else /* BCMWAPI_WPI */ +#define WSEC_ENABLED(wsec) ((wsec) & (WEP_ENABLED | TKIP_ENABLED | AES_ENABLED)) +#endif /* BCMWAPI_WPI */ +#endif /* BCMCCX */ +#define WSEC_SES_OW_ENABLED(wsec) ((wsec) & SES_OW_ENABLED) +#ifdef BCMWAPI_WAI +#define WSEC_SMS4_ENABLED(wsec) ((wsec) & SMS4_ENABLED) +#endif /* BCMWAPI_WAI */ + +#define MFP_CAPABLE 0x0200 +#define MFP_REQUIRED 0x0400 +#define MFP_SHA256 0x0800 /* a special configuration for STA for WIFI test tool */ + +/* WPA authentication mode bitvec */ +#define WPA_AUTH_DISABLED 0x0000 /* Legacy (i.e., non-WPA) */ +#define WPA_AUTH_NONE 0x0001 /* none (IBSS) */ +#define WPA_AUTH_UNSPECIFIED 0x0002 /* over 802.1x */ +#define WPA_AUTH_PSK 0x0004 /* Pre-shared key */ +#if defined(BCMCCX) || defined(BCMEXTCCX) +#define WPA_AUTH_CCKM 0x0008 /* CCKM */ +#define WPA2_AUTH_CCKM 0x0010 /* CCKM2 */ +#endif /* BCMCCX || BCMEXTCCX */ +/* #define WPA_AUTH_8021X 0x0020 */ /* 802.1x, reserved */ +#define WPA2_AUTH_UNSPECIFIED 0x0040 /* over 802.1x */ +#define WPA2_AUTH_PSK 0x0080 /* Pre-shared key */ +#define BRCM_AUTH_PSK 0x0100 /* BRCM specific PSK */ +#define BRCM_AUTH_DPT 0x0200 /* DPT PSK without group keys */ +#if defined(BCMWAPI_WAI) || defined(BCMWAPI_WPI) +#define WAPI_AUTH_NONE WPA_AUTH_NONE /* none (IBSS) */ +#define WAPI_AUTH_UNSPECIFIED 0x0400 /* over AS */ +#define WAPI_AUTH_PSK 0x0800 /* Pre-shared key */ +#endif /* BCMWAPI_WAI || BCMWAPI_WPI */ +#define WPA2_AUTH_MFP 0x1000 /* MFP (11w) in contrast to CCX */ +#define WPA2_AUTH_TPK 0x2000 /* TDLS Peer Key */ +#define WPA2_AUTH_FT 0x4000 /* Fast Transition. */ +#define WPA_AUTH_PFN_ANY 0xffffffff /* for PFN, match only ssid */ + +/* pmkid */ +#define MAXPMKID 16 /* max # PMKID cache entries (XXX - NDIS) */ + +typedef struct _pmkid { + struct ether_addr BSSID; + uint8 PMKID[WPA2_PMKID_LEN]; +} pmkid_t; + +typedef struct _pmkid_list { + uint32 npmkid; + pmkid_t pmkid[1]; +} pmkid_list_t; + +typedef struct _pmkid_cand { + struct ether_addr BSSID; + uint8 preauth; +} pmkid_cand_t; + +typedef struct _pmkid_cand_list { + uint32 npmkid_cand; + pmkid_cand_t pmkid_cand[1]; +} pmkid_cand_list_t; + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +typedef struct wl_assoc_info { + uint32 req_len; + uint32 resp_len; + uint32 flags; + struct dot11_assoc_req req; + struct ether_addr reassoc_bssid; /* used in reassoc's */ + struct dot11_assoc_resp resp; +} wl_assoc_info_t; + +/* flags */ +#define WLC_ASSOC_REQ_IS_REASSOC 0x01 /* assoc req was actually a reassoc */ + +typedef struct wl_led_info { + uint32 index; /* led index */ + uint32 behavior; + uint8 activehi; +} wl_led_info_t; + + +/* srom read/write struct passed through ioctl */ +typedef struct { + uint byteoff; /* byte offset */ + uint nbytes; /* number of bytes */ + uint16 buf[1]; +} srom_rw_t; + +/* similar cis (srom or otp) struct [iovar: may not be aligned] */ +typedef struct { + uint32 source; /* cis source */ + uint32 byteoff; /* byte offset */ + uint32 nbytes; /* number of bytes */ + /* data follows here */ +} cis_rw_t; + +#define WLC_CIS_DEFAULT 0 /* built-in default */ +#define WLC_CIS_SROM 1 /* source is sprom */ +#define WLC_CIS_OTP 2 /* source is otp */ + +/* R_REG and W_REG struct passed through ioctl */ +typedef struct { + uint32 byteoff; /* byte offset of the field in d11regs_t */ + uint32 val; /* read/write value of the field */ + uint32 size; /* sizeof the field */ + uint band; /* band (optional) */ +} rw_reg_t; + +/* Structure used by GET/SET_ATTEN ioctls - it controls power in b/g-band */ +/* PCL - Power Control Loop */ +/* current gain setting is replaced by user input */ +#define WL_ATTEN_APP_INPUT_PCL_OFF 0 /* turn off PCL, apply supplied input */ +#define WL_ATTEN_PCL_ON 1 /* turn on PCL */ +/* current gain setting is maintained */ +#define WL_ATTEN_PCL_OFF 2 /* turn off PCL. */ + +typedef struct { + uint16 auto_ctrl; /* WL_ATTEN_XX */ + uint16 bb; /* Baseband attenuation */ + uint16 radio; /* Radio attenuation */ + uint16 txctl1; /* Radio TX_CTL1 value */ +} atten_t; + +/* Per-AC retry parameters */ +struct wme_tx_params_s { + uint8 short_retry; + uint8 short_fallback; + uint8 long_retry; + uint8 long_fallback; + uint16 max_rate; /* In units of 512 Kbps */ +}; + +typedef struct wme_tx_params_s wme_tx_params_t; + +#define WL_WME_TX_PARAMS_IO_BYTES (sizeof(wme_tx_params_t) * AC_COUNT) + +/* defines used by poweridx iovar - it controls power in a-band */ +/* current gain setting is maintained */ +#define WL_PWRIDX_PCL_OFF -2 /* turn off PCL. */ +#define WL_PWRIDX_PCL_ON -1 /* turn on PCL */ +#define WL_PWRIDX_LOWER_LIMIT -2 /* lower limit */ +#define WL_PWRIDX_UPPER_LIMIT 63 /* upper limit */ +/* value >= 0 causes + * - input to be set to that value + * - PCL to be off + */ + +/* Used to get specific link/ac parameters */ +typedef struct { + int ac; + uint8 val; + struct ether_addr ea; +} link_val_t; + +#define BCM_MAC_STATUS_INDICATION (0x40010200L) + +/* XXX + * Please update the following when modifying this structure: + * StaInfo Twiki page flags section - description of the sta_info_t struct + * src/wl/exe/wlu.c - print of sta_info_t + * Pay attention to version if structure changes. + */ + +#define WL_STA_ANT_MAX 4 /* max possible rx antennas */ + +typedef struct { + uint16 ver; /* version of this struct */ + uint16 len; /* length in bytes of this structure */ + uint16 cap; /* sta's advertised capabilities */ + uint32 flags; /* flags defined below */ + uint32 idle; /* time since data pkt rx'd from sta */ + struct ether_addr ea; /* Station address */ + wl_rateset_t rateset; /* rateset in use */ + uint32 in; /* seconds elapsed since associated */ + uint32 listen_interval_inms; /* Min Listen interval in ms for this STA */ + uint32 tx_pkts; /* # of packets transmitted */ + uint32 tx_failures; /* # of packets failed */ + uint32 rx_ucast_pkts; /* # of unicast packets received */ + uint32 rx_mcast_pkts; /* # of multicast packets received */ + uint32 tx_rate; /* Rate of last successful tx frame */ + uint32 rx_rate; /* Rate of last successful rx frame */ + uint32 rx_decrypt_succeeds; /* # of packet decrypted successfully */ + uint32 rx_decrypt_failures; /* # of packet decrypted unsuccessfully */ + uint32 tx_tot_pkts; /* # of tx pkts (ucast + mcast) */ + uint32 rx_tot_pkts; /* # of data packets recvd (uni + mcast) */ + uint32 tx_mcast_pkts; /* # of mcast pkts txed */ + uint64 tx_tot_bytes; /* data bytes txed (ucast + mcast) */ + uint64 rx_tot_bytes; /* data bytes recvd (ucast + mcast) */ + uint64 tx_ucast_bytes; /* data bytes txed (ucast) */ + uint64 tx_mcast_bytes; /* # data bytes txed (mcast) */ + uint64 rx_ucast_bytes; /* data bytes recvd (ucast) */ + uint64 rx_mcast_bytes; /* data bytes recvd (mcast) */ + int8 rssi[WL_STA_ANT_MAX]; /* per antenna rssi */ + int8 nf[WL_STA_ANT_MAX]; /* per antenna noise floor */ + uint16 aid; /* association ID */ + uint16 ht_capabilities; /* advertised ht caps */ + uint16 vht_flags; /* converted vht flags */ +} sta_info_t; + +/* XXX: define to help support one version older sta_info_t from user level + * applications. + */ +#define WL_OLD_STAINFO_SIZE OFFSETOF(sta_info_t, tx_tot_pkts) + +#define WL_STA_VER 4 + +#define WL_STA_AID(a) ((a) &~ 0xc000) + +/* Flags for sta_info_t indicating properties of STA */ +#define WL_STA_BRCM 0x00000001 /* Running a Broadcom driver */ +#define WL_STA_WME 0x00000002 /* WMM association */ +#define WL_STA_NONERP 0x00000004 /* No ERP */ +#define WL_STA_AUTHE 0x00000008 /* Authenticated */ +#define WL_STA_ASSOC 0x00000010 /* Associated */ +#define WL_STA_AUTHO 0x00000020 /* Authorized */ +#define WL_STA_WDS 0x00000040 /* Wireless Distribution System */ +#define WL_STA_WDS_LINKUP 0x00000080 /* WDS traffic/probes flowing properly */ +#define WL_STA_PS 0x00000100 /* STA is in power save mode from AP's viewpoint */ +#define WL_STA_APSD_BE 0x00000200 /* APSD delv/trigger for AC_BE is default enabled */ +#define WL_STA_APSD_BK 0x00000400 /* APSD delv/trigger for AC_BK is default enabled */ +#define WL_STA_APSD_VI 0x00000800 /* APSD delv/trigger for AC_VI is default enabled */ +#define WL_STA_APSD_VO 0x00001000 /* APSD delv/trigger for AC_VO is default enabled */ +#define WL_STA_N_CAP 0x00002000 /* STA 802.11n capable */ +#define WL_STA_SCBSTATS 0x00004000 /* Per STA debug stats */ +#define WL_STA_AMPDU_CAP 0x00008000 /* STA AMPDU capable */ +#define WL_STA_AMSDU_CAP 0x00010000 /* STA AMSDU capable */ +#define WL_STA_MIMO_PS 0x00020000 /* mimo ps mode is enabled */ +#define WL_STA_MIMO_RTS 0x00040000 /* send rts in mimo ps mode */ +#define WL_STA_RIFS_CAP 0x00080000 /* rifs enabled */ +#define WL_STA_VHT_CAP 0x00100000 /* STA VHT(11ac) capable */ + +#define WL_WDS_LINKUP WL_STA_WDS_LINKUP /* deprecated */ +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +#define WLC_NUMRATES 16 /* max # of rates in a rateset */ + +typedef struct wlc_rateset { + uint count; /* number of rates in rates[] */ + uint8 rates[WLC_NUMRATES]; /* rates in 500kbps units w/hi bit set if basic */ + uint8 htphy_membership; /* HT PHY Membership */ + uint8 mcs[MCSSET_LEN]; /* supported mcs index bit map */ + uint16 vht_mcsmap; /* supported vht mcs nss bit map */ +} wlc_rateset_t; + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +/* STA HT cap fields */ +#define WL_STA_CAP_LDPC_CODING 0x0001 /* Support for rx of LDPC coded pkts */ +#define WL_STA_CAP_40MHZ 0x0002 /* FALSE:20Mhz, TRUE:20/40MHZ supported */ +#define WL_STA_CAP_MIMO_PS_MASK 0x000C /* Mimo PS mask */ +#define WL_STA_CAP_MIMO_PS_SHIFT 0x0002 /* Mimo PS shift */ +#define WL_STA_CAP_MIMO_PS_OFF 0x0003 /* Mimo PS, no restriction */ +#define WL_STA_CAP_MIMO_PS_RTS 0x0001 /* Mimo PS, send RTS/CTS around MIMO frames */ +#define WL_STA_CAP_MIMO_PS_ON 0x0000 /* Mimo PS, MIMO disallowed */ +#define WL_STA_CAP_GF 0x0010 /* Greenfield preamble support */ +#define WL_STA_CAP_SHORT_GI_20 0x0020 /* 20MHZ short guard interval support */ +#define WL_STA_CAP_SHORT_GI_40 0x0040 /* 40Mhz short guard interval support */ +#define WL_STA_CAP_TX_STBC 0x0080 /* Tx STBC support */ +#define WL_STA_CAP_RX_STBC_MASK 0x0300 /* Rx STBC mask */ +#define WL_STA_CAP_RX_STBC_SHIFT 8 /* Rx STBC shift */ +#define WL_STA_CAP_DELAYED_BA 0x0400 /* delayed BA support */ +#define WL_STA_CAP_MAX_AMSDU 0x0800 /* Max AMSDU size in bytes , 0=3839, 1=7935 */ +#define WL_STA_CAP_DSSS_CCK 0x1000 /* DSSS/CCK supported by the BSS */ +#define WL_STA_CAP_PSMP 0x2000 /* Power Save Multi Poll support */ +#define WL_STA_CAP_40MHZ_INTOLERANT 0x4000 /* 40MHz Intolerant */ +#define WL_STA_CAP_LSIG_TXOP 0x8000 /* L-SIG TXOP protection support */ + +#define WL_STA_CAP_RX_STBC_NO 0x0 /* no rx STBC support */ +#define WL_STA_CAP_RX_STBC_ONE_STREAM 0x1 /* rx STBC support of 1 spatial stream */ +#define WL_STA_CAP_RX_STBC_TWO_STREAM 0x2 /* rx STBC support of 1-2 spatial streams */ +#define WL_STA_CAP_RX_STBC_THREE_STREAM 0x3 /* rx STBC support of 1-3 spatial streams */ + +/* scb vht flags */ +#define WL_STA_VHT_LDPCCAP 0x0001 +#define WL_STA_SGI80 0x0002 +#define WL_STA_SGI160 0x0004 +#define WL_STA_VHT_TX_STBCCAP 0x0008 +#define WL_STA_VHT_RX_STBCCAP 0x0010 +#define WL_STA_SU_BEAMFORMER 0x0020 +#define WL_STA_SU_BEAMFORMEE 0x0040 +#define WL_STA_MU_BEAMFORMER 0x0080 +#define WL_STA_MU_BEAMFORMEE 0x0100 +#define WL_STA_VHT_TXOP_PS 0x0200 +#define WL_STA_HTC_VHT_CAP 0x0400 + +/* Values for TX Filter override mode */ +#define WLC_TXFILTER_OVERRIDE_DISABLED 0 +#define WLC_TXFILTER_OVERRIDE_ENABLED 1 + +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +/* Used to get specific STA parameters */ +typedef struct { + uint32 val; + struct ether_addr ea; +} scb_val_t; + +/* Used by iovar versions of some ioctls, i.e. WLC_SCB_AUTHORIZE et al */ +typedef struct { + uint32 code; + scb_val_t ioctl_args; +} authops_t; + +/* channel encoding */ +typedef struct channel_info { + int hw_channel; + int target_channel; + int scan_channel; +} channel_info_t; + +/* For ioctls that take a list of MAC addresses */ +struct maclist { + uint count; /* number of MAC addresses */ + struct ether_addr ea[1]; /* variable length array of MAC addresses */ +}; + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +/* get pkt count struct passed through ioctl */ +typedef struct get_pktcnt { + uint rx_good_pkt; + uint rx_bad_pkt; + uint tx_good_pkt; + uint tx_bad_pkt; + uint rx_ocast_good_pkt; /* unicast packets destined for others */ +} get_pktcnt_t; + +/* NINTENDO2 */ +#define LQ_IDX_MIN 0 +#define LQ_IDX_MAX 1 +#define LQ_IDX_AVG 2 +#define LQ_IDX_SUM 2 +#define LQ_IDX_LAST 3 +#define LQ_STOP_MONITOR 0 +#define LQ_START_MONITOR 1 + +/* Get averages RSSI, Rx PHY rate and SNR values */ +typedef struct { + int rssi[LQ_IDX_LAST]; /* Array to keep min, max, avg rssi */ + int snr[LQ_IDX_LAST]; /* Array to keep min, max, avg snr */ + int isvalid; /* Flag indicating whether above data is valid */ +} wl_lq_t; /* Link Quality */ + +typedef enum wl_wakeup_reason_type { + LCD_ON = 1, + LCD_OFF, + DRC1_WAKE, + DRC2_WAKE, + REASON_LAST +} wl_wr_type_t; + +typedef struct { +/* Unique filter id */ + uint32 id; + +/* stores the reason for the last wake up */ + uint8 reason; +} wl_wr_t; + +/* Get MAC specific rate histogram command */ +typedef struct { + struct ether_addr ea; /* MAC Address */ + uint8 ac_cat; /* Access Category */ + uint8 num_pkts; /* Number of packet entries to be averaged */ +} wl_mac_ratehisto_cmd_t; /* MAC Specific Rate Histogram command */ + +/* Get MAC rate histogram response */ +typedef struct { + uint32 rate[DOT11_RATE_MAX + 1]; /* Rates */ + uint32 mcs[WL_RATESET_SZ_HT_MCS * WL_TX_CHAINS_MAX]; /* MCS counts */ + uint32 vht[WL_RATESET_SZ_VHT_MCS][WL_TX_CHAINS_MAX]; /* VHT counts */ + uint32 tsf_timer[2][2]; /* Start and End time for 8bytes value */ +} wl_mac_ratehisto_res_t; /* MAC Specific Rate Histogram Response */ + +/* Values for TX Filter override mode */ +#define WLC_TXFILTER_OVERRIDE_DISABLED 0 +#define WLC_TXFILTER_OVERRIDE_ENABLED 1 + +#define WL_IOCTL_ACTION_GET 0x0 +#define WL_IOCTL_ACTION_SET 0x1 +#define WL_IOCTL_ACTION_OVL_IDX_MASK 0x1e +#define WL_IOCTL_ACTION_OVL_RSV 0x20 +#define WL_IOCTL_ACTION_OVL 0x40 +#define WL_IOCTL_ACTION_MASK 0x7e +#define WL_IOCTL_ACTION_OVL_SHIFT 1 + +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +/* Linux network driver ioctl encoding */ +typedef struct wl_ioctl { + uint cmd; /* common ioctl definition */ + void *buf; /* pointer to user buffer */ + uint len; /* length of user buffer */ +#if defined(BCMINTERNAL) && defined(DONGLEOVERLAYS) + uint8 action; /* get, set, overlay reserve request (optional) */ +#else + uint8 set; /* 1=set IOCTL; 0=query IOCTL */ +#endif /* defined(BCMINTERNAL) && defined(DONGLEOVERLAYS) */ + uint used; /* bytes read or written (optional) */ + uint needed; /* bytes needed (optional) */ +} wl_ioctl_t; + +#ifndef LINUX_POSTMOGRIFY_REMOVAL + +/* reference to wl_ioctl_t struct used by usermode driver */ +#define ioctl_subtype set /* subtype param */ +#define ioctl_pid used /* pid param */ +#define ioctl_status needed /* status param */ + +/* + * Structure for passing hardware and software + * revision info up from the driver. + */ +typedef struct wlc_rev_info { + uint vendorid; /* PCI vendor id */ + uint deviceid; /* device id of chip */ + uint radiorev; /* radio revision */ + uint chiprev; /* chip revision */ + uint corerev; /* core revision */ + uint boardid; /* board identifier (usu. PCI sub-device id) */ + uint boardvendor; /* board vendor (usu. PCI sub-vendor id) */ + uint boardrev; /* board revision */ + uint driverrev; /* driver version */ + uint ucoderev; /* microcode version */ + uint bus; /* bus type */ + uint chipnum; /* chip number */ + uint phytype; /* phy type */ + uint phyrev; /* phy revision */ + uint anarev; /* anacore rev */ + uint chippkg; /* chip package info */ + uint nvramrev; /* nvram revision number */ +} wlc_rev_info_t; + +#define WL_REV_INFO_LEGACY_LENGTH 48 + +#define WL_BRAND_MAX 10 +typedef struct wl_instance_info { + uint instance; + char brand[WL_BRAND_MAX]; +} wl_instance_info_t; + +/* structure to change size of tx fifo */ +typedef struct wl_txfifo_sz { + uint16 magic; + uint16 fifo; + uint16 size; +} wl_txfifo_sz_t; +/* magic pattern used for mismatch driver and wl */ +#define WL_TXFIFO_SZ_MAGIC 0xa5a5 + +/* Transfer info about an IOVar from the driver */ +/* Max supported IOV name size in bytes, + 1 for nul termination */ +#define WLC_IOV_NAME_LEN 30 +typedef struct wlc_iov_trx_s { + uint8 module; + uint8 type; + char name[WLC_IOV_NAME_LEN]; +} wlc_iov_trx_t; + +/* check this magic number */ +#define WLC_IOCTL_MAGIC 0x14e46c77 + +/* bump this number if you change the ioctl interface */ +#ifdef D11AC_IOTYPES +#define WLC_IOCTL_VERSION 2 +#define WLC_IOCTL_VERSION_LEGACY_IOTYPES 1 +#else +#define WLC_IOCTL_VERSION 1 +#endif /* D11AC_IOTYPES */ +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +#define WLC_IOCTL_MAXLEN 8192 /* max length ioctl buffer required */ +#define WLC_IOCTL_SMLEN 256 /* "small" length ioctl buffer required */ +#define WLC_IOCTL_MEDLEN 1536 /* "med" length ioctl buffer required */ +#ifdef WLC_HIGH_ONLY +#define WLC_SAMPLECOLLECT_MAXLEN 1024 /* limit sample size for bmac */ +#define WLC_SAMPLECOLLECT_MAXLEN_LCN40 1024 +#else +#if defined(LCNCONF) || defined(LCN40CONF) +#define WLC_SAMPLECOLLECT_MAXLEN 8192 /* Max Sample Collect buffer */ +#else +#define WLC_SAMPLECOLLECT_MAXLEN 10240 /* Max Sample Collect buffer for two cores */ +#endif +#define WLC_SAMPLECOLLECT_MAXLEN_LCN40 8192 +#endif /* WLC_HIGH_ONLY */ + +/* common ioctl definitions */ +#define WLC_GET_MAGIC 0 +#define WLC_GET_VERSION 1 +#define WLC_UP 2 +#define WLC_DOWN 3 +#define WLC_GET_LOOP 4 +#define WLC_SET_LOOP 5 +#define WLC_DUMP 6 +#define WLC_GET_MSGLEVEL 7 +#define WLC_SET_MSGLEVEL 8 +#define WLC_GET_PROMISC 9 +#define WLC_SET_PROMISC 10 +/* #define WLC_OVERLAY_IOCTL 11 */ /* not supported */ +#define WLC_GET_RATE 12 +#define WLC_GET_MAX_RATE 13 +#define WLC_GET_INSTANCE 14 +/* #define WLC_GET_FRAG 15 */ /* no longer supported */ +/* #define WLC_SET_FRAG 16 */ /* no longer supported */ +/* #define WLC_GET_RTS 17 */ /* no longer supported */ +/* #define WLC_SET_RTS 18 */ /* no longer supported */ +#define WLC_GET_INFRA 19 +#define WLC_SET_INFRA 20 +#define WLC_GET_AUTH 21 +#define WLC_SET_AUTH 22 +#define WLC_GET_BSSID 23 +#define WLC_SET_BSSID 24 +#define WLC_GET_SSID 25 +#define WLC_SET_SSID 26 +#define WLC_RESTART 27 +#define WLC_TERMINATED 28 +/* #define WLC_DUMP_SCB 28 */ /* no longer supported */ +#define WLC_GET_CHANNEL 29 +#define WLC_SET_CHANNEL 30 +#define WLC_GET_SRL 31 +#define WLC_SET_SRL 32 +#define WLC_GET_LRL 33 +#define WLC_SET_LRL 34 +#define WLC_GET_PLCPHDR 35 +#define WLC_SET_PLCPHDR 36 +#define WLC_GET_RADIO 37 +#define WLC_SET_RADIO 38 +#define WLC_GET_PHYTYPE 39 +#define WLC_DUMP_RATE 40 +#define WLC_SET_RATE_PARAMS 41 +#define WLC_GET_FIXRATE 42 +#define WLC_SET_FIXRATE 43 +/* #define WLC_GET_WEP 42 */ /* no longer supported */ +/* #define WLC_SET_WEP 43 */ /* no longer supported */ +#define WLC_GET_KEY 44 +#define WLC_SET_KEY 45 +#define WLC_GET_REGULATORY 46 +#define WLC_SET_REGULATORY 47 +#define WLC_GET_PASSIVE_SCAN 48 +#define WLC_SET_PASSIVE_SCAN 49 +#define WLC_SCAN 50 +#define WLC_SCAN_RESULTS 51 +#define WLC_DISASSOC 52 +#define WLC_REASSOC 53 +#define WLC_GET_ROAM_TRIGGER 54 +#define WLC_SET_ROAM_TRIGGER 55 +#define WLC_GET_ROAM_DELTA 56 +#define WLC_SET_ROAM_DELTA 57 +#define WLC_GET_ROAM_SCAN_PERIOD 58 +#define WLC_SET_ROAM_SCAN_PERIOD 59 +#define WLC_EVM 60 /* diag */ +#define WLC_GET_TXANT 61 +#define WLC_SET_TXANT 62 +#define WLC_GET_ANTDIV 63 +#define WLC_SET_ANTDIV 64 +/* #define WLC_GET_TXPWR 65 */ /* no longer supported */ +/* #define WLC_SET_TXPWR 66 */ /* no longer supported */ +#define WLC_GET_CLOSED 67 +#define WLC_SET_CLOSED 68 +#define WLC_GET_MACLIST 69 +#define WLC_SET_MACLIST 70 +#define WLC_GET_RATESET 71 +#define WLC_SET_RATESET 72 +/* #define WLC_GET_LOCALE 73 */ /* no longer supported */ +#define WLC_LONGTRAIN 74 +#define WLC_GET_BCNPRD 75 +#define WLC_SET_BCNPRD 76 +#define WLC_GET_DTIMPRD 77 +#define WLC_SET_DTIMPRD 78 +#define WLC_GET_SROM 79 +#define WLC_SET_SROM 80 +#define WLC_GET_WEP_RESTRICT 81 +#define WLC_SET_WEP_RESTRICT 82 +#define WLC_GET_COUNTRY 83 +#define WLC_SET_COUNTRY 84 +#define WLC_GET_PM 85 +#define WLC_SET_PM 86 +#define WLC_GET_WAKE 87 +#define WLC_SET_WAKE 88 +/* #define WLC_GET_D11CNTS 89 */ /* -> "counters" iovar */ +#define WLC_GET_FORCELINK 90 /* ndis only */ +#define WLC_SET_FORCELINK 91 /* ndis only */ +#define WLC_FREQ_ACCURACY 92 /* diag */ +#define WLC_CARRIER_SUPPRESS 93 /* diag */ +#define WLC_GET_PHYREG 94 +#define WLC_SET_PHYREG 95 +#define WLC_GET_RADIOREG 96 +#define WLC_SET_RADIOREG 97 +#define WLC_GET_REVINFO 98 +#define WLC_GET_UCANTDIV 99 +#define WLC_SET_UCANTDIV 100 +#define WLC_R_REG 101 +#define WLC_W_REG 102 +/* #define WLC_DIAG_LOOPBACK 103 old tray diag */ +/* #define WLC_RESET_D11CNTS 104 */ /* -> "reset_d11cnts" iovar */ +#define WLC_GET_MACMODE 105 +#define WLC_SET_MACMODE 106 +#define WLC_GET_MONITOR 107 +#define WLC_SET_MONITOR 108 +#define WLC_GET_GMODE 109 +#define WLC_SET_GMODE 110 +#define WLC_GET_LEGACY_ERP 111 +#define WLC_SET_LEGACY_ERP 112 +#define WLC_GET_RX_ANT 113 +#define WLC_GET_CURR_RATESET 114 /* current rateset */ +#define WLC_GET_SCANSUPPRESS 115 +#define WLC_SET_SCANSUPPRESS 116 +#define WLC_GET_AP 117 +#define WLC_SET_AP 118 +#define WLC_GET_EAP_RESTRICT 119 +#define WLC_SET_EAP_RESTRICT 120 +#define WLC_SCB_AUTHORIZE 121 +#define WLC_SCB_DEAUTHORIZE 122 +#define WLC_GET_WDSLIST 123 +#define WLC_SET_WDSLIST 124 +#define WLC_GET_ATIM 125 +#define WLC_SET_ATIM 126 +#define WLC_GET_RSSI 127 +#define WLC_GET_PHYANTDIV 128 +#define WLC_SET_PHYANTDIV 129 +#define WLC_AP_RX_ONLY 130 +#define WLC_GET_TX_PATH_PWR 131 +#define WLC_SET_TX_PATH_PWR 132 +#define WLC_GET_WSEC 133 +#define WLC_SET_WSEC 134 +#define WLC_GET_PHY_NOISE 135 +#define WLC_GET_BSS_INFO 136 +#define WLC_GET_PKTCNTS 137 +#define WLC_GET_LAZYWDS 138 +#define WLC_SET_LAZYWDS 139 +#define WLC_GET_BANDLIST 140 + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +#define WLC_GET_BAND 141 +#define WLC_SET_BAND 142 +#define WLC_SCB_DEAUTHENTICATE 143 +#define WLC_GET_SHORTSLOT 144 +#define WLC_GET_SHORTSLOT_OVERRIDE 145 +#define WLC_SET_SHORTSLOT_OVERRIDE 146 +#define WLC_GET_SHORTSLOT_RESTRICT 147 +#define WLC_SET_SHORTSLOT_RESTRICT 148 +#define WLC_GET_GMODE_PROTECTION 149 +#define WLC_GET_GMODE_PROTECTION_OVERRIDE 150 +#define WLC_SET_GMODE_PROTECTION_OVERRIDE 151 +#define WLC_UPGRADE 152 +/* #define WLC_GET_MRATE 153 */ /* no longer supported */ +/* #define WLC_SET_MRATE 154 */ /* no longer supported */ +#define WLC_GET_IGNORE_BCNS 155 +#define WLC_SET_IGNORE_BCNS 156 +#define WLC_GET_SCB_TIMEOUT 157 +#define WLC_SET_SCB_TIMEOUT 158 +#define WLC_GET_ASSOCLIST 159 +#define WLC_GET_CLK 160 +#define WLC_SET_CLK 161 +#define WLC_GET_UP 162 +#define WLC_OUT 163 +#define WLC_GET_WPA_AUTH 164 +#define WLC_SET_WPA_AUTH 165 +#define WLC_GET_UCFLAGS 166 +#define WLC_SET_UCFLAGS 167 +#define WLC_GET_PWRIDX 168 +#define WLC_SET_PWRIDX 169 +#define WLC_GET_TSSI 170 +#define WLC_GET_SUP_RATESET_OVERRIDE 171 +#define WLC_SET_SUP_RATESET_OVERRIDE 172 +/* #define WLC_SET_FAST_TIMER 173 */ /* no longer supported */ +/* #define WLC_GET_FAST_TIMER 174 */ /* no longer supported */ +/* #define WLC_SET_SLOW_TIMER 175 */ /* no longer supported */ +/* #define WLC_GET_SLOW_TIMER 176 */ /* no longer supported */ +/* #define WLC_DUMP_PHYREGS 177 */ /* no longer supported */ +#define WLC_GET_PROTECTION_CONTROL 178 +#define WLC_SET_PROTECTION_CONTROL 179 +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ +#define WLC_GET_PHYLIST 180 +#ifndef LINUX_POSTMOGRIFY_REMOVAL +#define WLC_ENCRYPT_STRENGTH 181 /* ndis only */ +#define WLC_DECRYPT_STATUS 182 /* ndis only */ +#define WLC_GET_KEY_SEQ 183 +#define WLC_GET_SCAN_CHANNEL_TIME 184 +#define WLC_SET_SCAN_CHANNEL_TIME 185 +#define WLC_GET_SCAN_UNASSOC_TIME 186 +#define WLC_SET_SCAN_UNASSOC_TIME 187 +#define WLC_GET_SCAN_HOME_TIME 188 +#define WLC_SET_SCAN_HOME_TIME 189 +#define WLC_GET_SCAN_NPROBES 190 +#define WLC_SET_SCAN_NPROBES 191 +#define WLC_GET_PRB_RESP_TIMEOUT 192 +#define WLC_SET_PRB_RESP_TIMEOUT 193 +#define WLC_GET_ATTEN 194 +#define WLC_SET_ATTEN 195 +#define WLC_GET_SHMEM 196 /* diag */ +#define WLC_SET_SHMEM 197 /* diag */ +/* #define WLC_GET_GMODE_PROTECTION_CTS 198 */ /* no longer supported */ +/* #define WLC_SET_GMODE_PROTECTION_CTS 199 */ /* no longer supported */ +#define WLC_SET_WSEC_TEST 200 +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ +#define WLC_SCB_DEAUTHENTICATE_FOR_REASON 201 +#ifndef LINUX_POSTMOGRIFY_REMOVAL +#define WLC_TKIP_COUNTERMEASURES 202 +#define WLC_GET_PIOMODE 203 +#define WLC_SET_PIOMODE 204 +#define WLC_SET_ASSOC_PREFER 205 +#define WLC_GET_ASSOC_PREFER 206 +#define WLC_SET_ROAM_PREFER 207 +#define WLC_GET_ROAM_PREFER 208 +#define WLC_SET_LED 209 +#define WLC_GET_LED 210 +#define WLC_GET_INTERFERENCE_MODE 211 +#define WLC_SET_INTERFERENCE_MODE 212 +#define WLC_GET_CHANNEL_QA 213 +#define WLC_START_CHANNEL_QA 214 +#define WLC_GET_CHANNEL_SEL 215 +#define WLC_START_CHANNEL_SEL 216 +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ +#define WLC_GET_VALID_CHANNELS 217 +#define WLC_GET_FAKEFRAG 218 +#define WLC_SET_FAKEFRAG 219 +#define WLC_GET_PWROUT_PERCENTAGE 220 +#define WLC_SET_PWROUT_PERCENTAGE 221 +#define WLC_SET_BAD_FRAME_PREEMPT 222 +#define WLC_GET_BAD_FRAME_PREEMPT 223 +#define WLC_SET_LEAP_LIST 224 +#define WLC_GET_LEAP_LIST 225 +#define WLC_GET_CWMIN 226 +#define WLC_SET_CWMIN 227 +#define WLC_GET_CWMAX 228 +#define WLC_SET_CWMAX 229 +#define WLC_GET_WET 230 +#define WLC_SET_WET 231 +#define WLC_GET_PUB 232 +/* #define WLC_SET_GLACIAL_TIMER 233 */ /* no longer supported */ +/* #define WLC_GET_GLACIAL_TIMER 234 */ /* no longer supported */ +#define WLC_GET_KEY_PRIMARY 235 +#define WLC_SET_KEY_PRIMARY 236 + +#ifndef LINUX_POSTMOGRIFY_REMOVAL + +/* #define WLC_DUMP_RADIOREGS 237 */ /* no longer supported */ +#define WLC_GET_ACI_ARGS 238 +#define WLC_SET_ACI_ARGS 239 +#define WLC_UNSET_CALLBACK 240 +#define WLC_SET_CALLBACK 241 +#define WLC_GET_RADAR 242 +#define WLC_SET_RADAR 243 +#define WLC_SET_SPECT_MANAGMENT 244 +#define WLC_GET_SPECT_MANAGMENT 245 +#define WLC_WDS_GET_REMOTE_HWADDR 246 /* handled in wl_linux.c/wl_vx.c */ +#define WLC_WDS_GET_WPA_SUP 247 +#define WLC_SET_CS_SCAN_TIMER 248 +#define WLC_GET_CS_SCAN_TIMER 249 +#define WLC_MEASURE_REQUEST 250 +#define WLC_INIT 251 +#define WLC_SEND_QUIET 252 +#define WLC_KEEPALIVE 253 +#define WLC_SEND_PWR_CONSTRAINT 254 +#define WLC_UPGRADE_STATUS 255 +#define WLC_CURRENT_PWR 256 +#define WLC_GET_SCAN_PASSIVE_TIME 257 +#define WLC_SET_SCAN_PASSIVE_TIME 258 +#define WLC_LEGACY_LINK_BEHAVIOR 259 +#define WLC_GET_CHANNELS_IN_COUNTRY 260 +#define WLC_GET_COUNTRY_LIST 261 +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ +#define WLC_GET_VAR 262 /* get value of named variable */ +#define WLC_SET_VAR 263 /* set named variable to value */ +#ifndef LINUX_POSTMOGRIFY_REMOVAL +#define WLC_NVRAM_GET 264 /* deprecated */ +#define WLC_NVRAM_SET 265 +#define WLC_NVRAM_DUMP 266 +#define WLC_REBOOT 267 +#define WLC_SET_WSEC_PMK 268 +#define WLC_GET_AUTH_MODE 269 +#define WLC_SET_AUTH_MODE 270 +#define WLC_GET_WAKEENTRY 271 +#define WLC_SET_WAKEENTRY 272 +#define WLC_NDCONFIG_ITEM 273 /* currently handled in wl_oid.c */ +#define WLC_NVOTPW 274 +#define WLC_OTPW 275 +#define WLC_IOV_BLOCK_GET 276 +#define WLC_IOV_MODULES_GET 277 +#define WLC_SOFT_RESET 278 +#define WLC_GET_ALLOW_MODE 279 +#define WLC_SET_ALLOW_MODE 280 +#define WLC_GET_DESIRED_BSSID 281 +#define WLC_SET_DESIRED_BSSID 282 +#define WLC_DISASSOC_MYAP 283 +#define WLC_GET_NBANDS 284 /* for Dongle EXT_STA support */ +#define WLC_GET_BANDSTATES 285 /* for Dongle EXT_STA support */ +#define WLC_GET_WLC_BSS_INFO 286 /* for Dongle EXT_STA support */ +#define WLC_GET_ASSOC_INFO 287 /* for Dongle EXT_STA support */ +#define WLC_GET_OID_PHY 288 /* for Dongle EXT_STA support */ +#define WLC_SET_OID_PHY 289 /* for Dongle EXT_STA support */ +#define WLC_SET_ASSOC_TIME 290 /* for Dongle EXT_STA support */ +#define WLC_GET_DESIRED_SSID 291 /* for Dongle EXT_STA support */ +#define WLC_GET_CHANSPEC 292 /* for Dongle EXT_STA support */ +#define WLC_GET_ASSOC_STATE 293 /* for Dongle EXT_STA support */ +#define WLC_SET_PHY_STATE 294 /* for Dongle EXT_STA support */ +#define WLC_GET_SCAN_PENDING 295 /* for Dongle EXT_STA support */ +#define WLC_GET_SCANREQ_PENDING 296 /* for Dongle EXT_STA support */ +#define WLC_GET_PREV_ROAM_REASON 297 /* for Dongle EXT_STA support */ +#define WLC_SET_PREV_ROAM_REASON 298 /* for Dongle EXT_STA support */ +#define WLC_GET_BANDSTATES_PI 299 /* for Dongle EXT_STA support */ +#define WLC_GET_PHY_STATE 300 /* for Dongle EXT_STA support */ +#define WLC_GET_BSS_WPA_RSN 301 /* for Dongle EXT_STA support */ +#define WLC_GET_BSS_WPA2_RSN 302 /* for Dongle EXT_STA support */ +#define WLC_GET_BSS_BCN_TS 303 /* for Dongle EXT_STA support */ +#define WLC_GET_INT_DISASSOC 304 /* for Dongle EXT_STA support */ +#define WLC_SET_NUM_PEERS 305 /* for Dongle EXT_STA support */ +#define WLC_GET_NUM_BSS 306 /* for Dongle EXT_STA support */ +#define WLC_PHY_SAMPLE_COLLECT 307 /* phy sample collect mode */ +/* #define WLC_UM_PRIV 308 */ /* Deprecated: usermode driver */ +#define WLC_GET_CMD 309 +/* #define WLC_LAST 310 */ /* Never used - can be reused */ +#define WLC_SET_INTERFERENCE_OVERRIDE_MODE 311 /* set inter mode override */ +#define WLC_GET_INTERFERENCE_OVERRIDE_MODE 312 /* get inter mode override */ +/* #define WLC_GET_WAI_RESTRICT 313 */ /* for WAPI, deprecated use iovar instead */ +/* #define WLC_SET_WAI_RESTRICT 314 */ /* for WAPI, deprecated use iovar instead */ +/* #define WLC_SET_WAI_REKEY 315 */ /* for WAPI, deprecated use iovar instead */ +#define WLC_SET_NAT_CONFIG 316 /* for configuring NAT filter driver */ +#define WLC_GET_NAT_STATE 317 +#define WLC_GET_TXBF_RATESET 318 +#define WLC_SET_TXBF_RATESET 319 +#define WLC_SCAN_CQ 320 +#define WLC_GET_RSSI_QDB 321 /* qdB portion of the RSSI */ + +#define WLC_LAST 322 /* XXX The last ioctl. Also push this + * number when adding new ioctls + */ + +/* XXX + * Minor kludge alert: + * Duplicate a few definitions that irelay requires from epiioctl.h here + * so caller doesn't have to include this file and epiioctl.h . + * If this grows any more, it would be time to move these irelay-specific + * definitions out of the epiioctl.h and into a separate driver common file. + */ +#ifndef EPICTRL_COOKIE +#define EPICTRL_COOKIE 0xABADCEDE +#endif + +/* vx wlc ioctl's offset */ +#define CMN_IOCTL_OFF 0x180 + +/* + * custom OID support + * + * 0xFF - implementation specific OID + * 0xE4 - first byte of Broadcom PCI vendor ID + * 0x14 - second byte of Broadcom PCI vendor ID + * 0xXX - the custom OID number + */ + +/* begin 0x1f values beyond the start of the ET driver range. */ +#define WL_OID_BASE 0xFFE41420 + +/* NDIS overrides */ +#define OID_WL_GETINSTANCE (WL_OID_BASE + WLC_GET_INSTANCE) +#define OID_WL_GET_FORCELINK (WL_OID_BASE + WLC_GET_FORCELINK) +#define OID_WL_SET_FORCELINK (WL_OID_BASE + WLC_SET_FORCELINK) +#define OID_WL_ENCRYPT_STRENGTH (WL_OID_BASE + WLC_ENCRYPT_STRENGTH) +#define OID_WL_DECRYPT_STATUS (WL_OID_BASE + WLC_DECRYPT_STATUS) +#define OID_LEGACY_LINK_BEHAVIOR (WL_OID_BASE + WLC_LEGACY_LINK_BEHAVIOR) +#define OID_WL_NDCONFIG_ITEM (WL_OID_BASE + WLC_NDCONFIG_ITEM) + +/* EXT_STA Dongle suuport */ +#define OID_STA_CHANSPEC (WL_OID_BASE + WLC_GET_CHANSPEC) +#define OID_STA_NBANDS (WL_OID_BASE + WLC_GET_NBANDS) +#define OID_STA_GET_PHY (WL_OID_BASE + WLC_GET_OID_PHY) +#define OID_STA_SET_PHY (WL_OID_BASE + WLC_SET_OID_PHY) +#define OID_STA_ASSOC_TIME (WL_OID_BASE + WLC_SET_ASSOC_TIME) +#define OID_STA_DESIRED_SSID (WL_OID_BASE + WLC_GET_DESIRED_SSID) +#define OID_STA_SET_PHY_STATE (WL_OID_BASE + WLC_SET_PHY_STATE) +#define OID_STA_SCAN_PENDING (WL_OID_BASE + WLC_GET_SCAN_PENDING) +#define OID_STA_SCANREQ_PENDING (WL_OID_BASE + WLC_GET_SCANREQ_PENDING) +#define OID_STA_GET_ROAM_REASON (WL_OID_BASE + WLC_GET_PREV_ROAM_REASON) +#define OID_STA_SET_ROAM_REASON (WL_OID_BASE + WLC_SET_PREV_ROAM_REASON) +#define OID_STA_GET_PHY_STATE (WL_OID_BASE + WLC_GET_PHY_STATE) +#define OID_STA_INT_DISASSOC (WL_OID_BASE + WLC_GET_INT_DISASSOC) +#define OID_STA_SET_NUM_PEERS (WL_OID_BASE + WLC_SET_NUM_PEERS) +#define OID_STA_GET_NUM_BSS (WL_OID_BASE + WLC_GET_NUM_BSS) + +/* NAT filter driver support */ +#define OID_NAT_SET_CONFIG (WL_OID_BASE + WLC_SET_NAT_CONFIG) +#define OID_NAT_GET_STATE (WL_OID_BASE + WLC_GET_NAT_STATE) + +#define WL_DECRYPT_STATUS_SUCCESS 1 +#define WL_DECRYPT_STATUS_FAILURE 2 +#define WL_DECRYPT_STATUS_UNKNOWN 3 + +/* allows user-mode app to poll the status of USB image upgrade */ +#define WLC_UPGRADE_SUCCESS 0 +#define WLC_UPGRADE_PENDING 1 + +#ifdef CONFIG_USBRNDIS_RETAIL +/* struct passed in for WLC_NDCONFIG_ITEM */ +typedef struct { + char *name; + void *param; +} ndconfig_item_t; +#endif + +#ifdef EXT_STA +typedef struct _wl_assoc_result { + ulong associated; + ulong NDIS_auth; + ulong NDIS_infra; +} wl_assoc_result_t; +#endif + +/* WLC_GET_AUTH, WLC_SET_AUTH values */ +#define WL_AUTH_OPEN_SYSTEM 0 /* d11 open authentication */ +#define WL_AUTH_SHARED_KEY 1 /* d11 shared authentication */ +#define WL_AUTH_OPEN_SHARED 2 /* try open, then shared if open failed w/rc 13 */ +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +/* Bit masks for radio disabled status - returned by WL_GET_RADIO */ +#define WL_RADIO_SW_DISABLE (1<<0) +#define WL_RADIO_HW_DISABLE (1<<1) +#define WL_RADIO_MPC_DISABLE (1<<2) +#define WL_RADIO_COUNTRY_DISABLE (1<<3) /* some countries don't support any channel */ + +#define WL_SPURAVOID_OFF 0 +#define WL_SPURAVOID_ON1 1 +#define WL_SPURAVOID_ON2 2 + + +/* Override bit for WLC_SET_TXPWR. if set, ignore other level limits */ +#define WL_TXPWR_OVERRIDE (1U<<31) +#define WL_TXPWR_NEG (1U<<30) + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +#define WL_PHY_PAVARS_LEN 32 /* Phy type, Band range, chain, a1[0], b0[0], b1[0] ... */ + +#define WL_PHY_PAVARS2_NUM 3 /* a1, b0, b1 */ +#define WL_PHY_PAVAR_VER 1 /* pavars version */ +typedef struct wl_pavars2 { + uint16 ver; /* version of this struct */ + uint16 len; /* len of this structure */ + uint16 inuse; /* driver return 1 for a1,b0,b1 in current band range */ + uint16 phy_type; /* phy type */ + uint16 bandrange; + uint16 chain; + uint16 inpa[WL_PHY_PAVARS2_NUM]; /* phy pavars for one band range */ +} wl_pavars2_t; + +typedef struct wl_po { + uint16 phy_type; /* Phy type */ + uint16 band; + uint16 cckpo; + uint32 ofdmpo; + uint16 mcspo[8]; +} wl_po_t; + +#define WL_NUM_RPCALVARS 5 /* number of rpcal vars */ + +typedef struct wl_rpcal { + uint16 value; + uint16 update; +} wl_rpcal_t; + +/* a large TX Power as an init value to factor out of MIN() calculations, + * keep low enough to fit in an int8, units are .25 dBm + */ +#define WLC_TXPWR_MAX (127) /* ~32 dBm = 1,500 mW */ + +/* "diag" iovar argument and error code */ +#define WL_DIAG_INTERRUPT 1 /* d11 loopback interrupt test */ +#define WL_DIAG_LOOPBACK 2 /* d11 loopback data test */ +#define WL_DIAG_MEMORY 3 /* d11 memory test */ +#define WL_DIAG_LED 4 /* LED test */ +#define WL_DIAG_REG 5 /* d11/phy register test */ +#define WL_DIAG_SROM 6 /* srom read/crc test */ +#define WL_DIAG_DMA 7 /* DMA test */ +#define WL_DIAG_LOOPBACK_EXT 8 /* enhenced d11 loopback data test */ + +#define WL_DIAGERR_SUCCESS 0 +#define WL_DIAGERR_FAIL_TO_RUN 1 /* unable to run requested diag */ +#define WL_DIAGERR_NOT_SUPPORTED 2 /* diag requested is not supported */ +#define WL_DIAGERR_INTERRUPT_FAIL 3 /* loopback interrupt test failed */ +#define WL_DIAGERR_LOOPBACK_FAIL 4 /* loopback data test failed */ +#define WL_DIAGERR_SROM_FAIL 5 /* srom read failed */ +#define WL_DIAGERR_SROM_BADCRC 6 /* srom crc failed */ +#define WL_DIAGERR_REG_FAIL 7 /* d11/phy register test failed */ +#define WL_DIAGERR_MEMORY_FAIL 8 /* d11 memory test failed */ +#define WL_DIAGERR_NOMEM 9 /* diag test failed due to no memory */ +#define WL_DIAGERR_DMA_FAIL 10 /* DMA test failed */ + +#define WL_DIAGERR_MEMORY_TIMEOUT 11 /* d11 memory test didn't finish in time */ +#define WL_DIAGERR_MEMORY_BADPATTERN 12 /* d11 memory test result in bad pattern */ + +/* band types */ +#define WLC_BAND_AUTO 0 /* auto-select */ +#define WLC_BAND_5G 1 /* 5 Ghz */ +#define WLC_BAND_2G 2 /* 2.4 Ghz */ +#define WLC_BAND_ALL 3 /* all bands */ + +/* band range returned by band_range iovar */ +#define WL_CHAN_FREQ_RANGE_2G 0 +#define WL_CHAN_FREQ_RANGE_5GL 1 +#define WL_CHAN_FREQ_RANGE_5GM 2 +#define WL_CHAN_FREQ_RANGE_5GH 3 + +#define WL_CHAN_FREQ_RANGE_5GLL_5BAND 4 +#define WL_CHAN_FREQ_RANGE_5GLH_5BAND 5 +#define WL_CHAN_FREQ_RANGE_5GML_5BAND 6 +#define WL_CHAN_FREQ_RANGE_5GMH_5BAND 7 +#define WL_CHAN_FREQ_RANGE_5GH_5BAND 8 + +#define WL_CHAN_FREQ_RANGE_5G_BAND0 1 +#define WL_CHAN_FREQ_RANGE_5G_BAND1 2 +#define WL_CHAN_FREQ_RANGE_5G_BAND2 3 +#define WL_CHAN_FREQ_RANGE_5G_BAND3 4 + +#define WL_CHAN_FREQ_RANGE_5G_4BAND 5 +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +/* phy types (returned by WLC_GET_PHYTPE) */ +#define WLC_PHY_TYPE_A 0 +#define WLC_PHY_TYPE_B 1 +#define WLC_PHY_TYPE_G 2 +#define WLC_PHY_TYPE_N 4 +#define WLC_PHY_TYPE_LP 5 +#define WLC_PHY_TYPE_SSN 6 +#define WLC_PHY_TYPE_HT 7 +#define WLC_PHY_TYPE_LCN 8 +#define WLC_PHY_TYPE_LCN40 10 +#define WLC_PHY_TYPE_AC 11 +#define WLC_PHY_TYPE_NULL 0xf + +/* Values for PM */ +#define PM_OFF 0 +#define PM_MAX 1 +#define PM_FAST 2 +#define PM_FORCE_OFF 3 /* use this bit to force PM off even bt is active */ + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +/* MAC list modes */ +#define WLC_MACMODE_DISABLED 0 /* MAC list disabled */ +#define WLC_MACMODE_DENY 1 /* Deny specified (i.e. allow unspecified) */ +#define WLC_MACMODE_ALLOW 2 /* Allow specified (i.e. deny unspecified) */ + +/* + * 54g modes (basic bits may still be overridden) + * + * GMODE_LEGACY_B Rateset: 1b, 2b, 5.5, 11 + * Preamble: Long + * Shortslot: Off + * GMODE_AUTO Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 + * Extended Rateset: 6, 9, 12, 48 + * Preamble: Long + * Shortslot: Auto + * GMODE_ONLY Rateset: 1b, 2b, 5.5b, 11b, 18, 24b, 36, 54 + * Extended Rateset: 6b, 9, 12b, 48 + * Preamble: Short required + * Shortslot: Auto + * GMODE_B_DEFERRED Rateset: 1b, 2b, 5.5b, 11b, 18, 24, 36, 54 + * Extended Rateset: 6, 9, 12, 48 + * Preamble: Long + * Shortslot: On + * GMODE_PERFORMANCE Rateset: 1b, 2b, 5.5b, 6b, 9, 11b, 12b, 18, 24b, 36, 48, 54 + * Preamble: Short required + * Shortslot: On and required + * GMODE_LRS Rateset: 1b, 2b, 5.5b, 11b + * Extended Rateset: 6, 9, 12, 18, 24, 36, 48, 54 + * Preamble: Long + * Shortslot: Auto + */ +#define GMODE_LEGACY_B 0 +#define GMODE_AUTO 1 +#define GMODE_ONLY 2 +#define GMODE_B_DEFERRED 3 +#define GMODE_PERFORMANCE 4 +#define GMODE_LRS 5 +#define GMODE_MAX 6 + +/* values for PLCPHdr_override */ +#define WLC_PLCP_AUTO -1 +#define WLC_PLCP_SHORT 0 +#define WLC_PLCP_LONG 1 + +/* values for g_protection_override and n_protection_override */ +#define WLC_PROTECTION_AUTO -1 +#define WLC_PROTECTION_OFF 0 +#define WLC_PROTECTION_ON 1 +#define WLC_PROTECTION_MMHDR_ONLY 2 +#define WLC_PROTECTION_CTS_ONLY 3 + +/* values for g_protection_control and n_protection_control */ +#define WLC_PROTECTION_CTL_OFF 0 +#define WLC_PROTECTION_CTL_LOCAL 1 +#define WLC_PROTECTION_CTL_OVERLAP 2 + +/* values for n_protection */ +#define WLC_N_PROTECTION_OFF 0 +#define WLC_N_PROTECTION_OPTIONAL 1 +#define WLC_N_PROTECTION_20IN40 2 +#define WLC_N_PROTECTION_MIXEDMODE 3 + +/* values for n_preamble_type */ +#define WLC_N_PREAMBLE_MIXEDMODE 0 +#define WLC_N_PREAMBLE_GF 1 +#define WLC_N_PREAMBLE_GF_BRCM 2 + +/* values for band specific 40MHz capabilities (deprecated) */ +#define WLC_N_BW_20ALL 0 +#define WLC_N_BW_40ALL 1 +#define WLC_N_BW_20IN2G_40IN5G 2 + +#define WLC_BW_20MHZ_BIT (1<<0) +#define WLC_BW_40MHZ_BIT (1<<1) +#define WLC_BW_80MHZ_BIT (1<<2) + +/* Bandwidth capabilities */ +#define WLC_BW_CAP_20MHZ (WLC_BW_20MHZ_BIT) +#define WLC_BW_CAP_40MHZ (WLC_BW_40MHZ_BIT|WLC_BW_20MHZ_BIT) +#define WLC_BW_CAP_80MHZ (WLC_BW_80MHZ_BIT|WLC_BW_40MHZ_BIT|WLC_BW_20MHZ_BIT) +#define WLC_BW_CAP_UNRESTRICTED 0xFF + +#define WL_BW_CAP_20MHZ(bw_cap) (((bw_cap) & WLC_BW_20MHZ_BIT) ? TRUE : FALSE) +#define WL_BW_CAP_40MHZ(bw_cap) (((bw_cap) & WLC_BW_40MHZ_BIT) ? TRUE : FALSE) +#define WL_BW_CAP_80MHZ(bw_cap) (((bw_cap) & WLC_BW_80MHZ_BIT) ? TRUE : FALSE) + +/* values to force tx/rx chain */ +#define WLC_N_TXRX_CHAIN0 0 +#define WLC_N_TXRX_CHAIN1 1 + +/* bitflags for SGI support (sgi_rx iovar) */ +#define WLC_N_SGI_20 0x01 +#define WLC_N_SGI_40 0x02 +#define WLC_VHT_SGI_80 0x04 + +/* when sgi_tx==WLC_SGI_ALL, bypass rate selection, enable sgi for all mcs */ +#define WLC_SGI_ALL 0x02 + +#define LISTEN_INTERVAL 10 +/* interference mitigation options */ +#define INTERFERE_OVRRIDE_OFF -1 /* interference override off */ +#define INTERFERE_NONE 0 /* off */ +#define NON_WLAN 1 /* foreign/non 802.11 interference, no auto detect */ +#define WLAN_MANUAL 2 /* ACI: no auto detection */ +#define WLAN_AUTO 3 /* ACI: auto detect */ +#define WLAN_AUTO_W_NOISE 4 /* ACI: auto - detect and non 802.11 interference */ +#define AUTO_ACTIVE (1 << 7) /* Auto is currently active */ + +/* interfernece mode bit-masks (ACPHY) */ +#define ACPHY_ACI_GLITCHBASED_DESENSE 1 /* bit 0 */ +#define ACPHY_ACI_HWACI_PKTGAINLMT 2 /* bit 1 */ +#define ACPHY_ACI_W2NB_PKTGAINLMT 4 /* bit 2 */ +#define ACPHY_ACI_MAX_MODE 7 + +typedef struct wl_aci_args { + int enter_aci_thresh; /* Trigger level to start detecting ACI */ + int exit_aci_thresh; /* Trigger level to exit ACI mode */ + int usec_spin; /* microsecs to delay between rssi samples */ + int glitch_delay; /* interval between ACI scans when glitch count is consistently high */ + uint16 nphy_adcpwr_enter_thresh; /* ADC power to enter ACI mitigation mode */ + uint16 nphy_adcpwr_exit_thresh; /* ADC power to exit ACI mitigation mode */ + uint16 nphy_repeat_ctr; /* Number of tries per channel to compute power */ + uint16 nphy_num_samples; /* Number of samples to compute power on one channel */ + uint16 nphy_undetect_window_sz; /* num of undetects to exit ACI Mitigation mode */ + uint16 nphy_b_energy_lo_aci; /* low ACI power energy threshold for bphy */ + uint16 nphy_b_energy_md_aci; /* mid ACI power energy threshold for bphy */ + uint16 nphy_b_energy_hi_aci; /* high ACI power energy threshold for bphy */ + uint16 nphy_noise_noassoc_glitch_th_up; /* wl interference 4 */ + uint16 nphy_noise_noassoc_glitch_th_dn; + uint16 nphy_noise_assoc_glitch_th_up; + uint16 nphy_noise_assoc_glitch_th_dn; + uint16 nphy_noise_assoc_aci_glitch_th_up; + uint16 nphy_noise_assoc_aci_glitch_th_dn; + uint16 nphy_noise_assoc_enter_th; + uint16 nphy_noise_noassoc_enter_th; + uint16 nphy_noise_assoc_rx_glitch_badplcp_enter_th; + uint16 nphy_noise_noassoc_crsidx_incr; + uint16 nphy_noise_assoc_crsidx_incr; + uint16 nphy_noise_crsidx_decr; +} wl_aci_args_t; + +#define TRIGGER_NOW 0 +#define TRIGGER_CRS 0x01 +#define TRIGGER_CRSDEASSERT 0x02 +#define TRIGGER_GOODFCS 0x04 +#define TRIGGER_BADFCS 0x08 +#define TRIGGER_BADPLCP 0x10 +#define TRIGGER_CRSGLITCH 0x20 +#define WL_ACI_ARGS_LEGACY_LENGTH 16 /* bytes of pre NPHY aci args */ +#define WL_SAMPLECOLLECT_T_VERSION 2 /* version of wl_samplecollect_args_t struct */ +typedef struct wl_samplecollect_args { + /* version 0 fields */ + uint8 coll_us; + int cores; + /* add'l version 1 fields */ + uint16 version; /* see definition of WL_SAMPLECOLLECT_T_VERSION */ + uint16 length; /* length of entire structure */ + int8 trigger; + uint16 timeout; + uint16 mode; + uint32 pre_dur; + uint32 post_dur; + uint8 gpio_sel; + bool downsamp; + bool be_deaf; + bool agc; /* loop from init gain and going down */ + bool filter; /* override high pass corners to lowest */ + /* add'l version 2 fields */ + uint8 trigger_state; + uint8 module_sel1; + uint8 module_sel2; + uint16 nsamps; + int bitStart; + uint32 gpioCapMask; +} wl_samplecollect_args_t; + +#define WL_SAMPLEDATA_HEADER_TYPE 1 +#define WL_SAMPLEDATA_HEADER_SIZE 80 /* sample collect header size (bytes) */ +#define WL_SAMPLEDATA_TYPE 2 +#define WL_SAMPLEDATA_SEQ 0xff /* sequence # */ +#define WL_SAMPLEDATA_MORE_DATA 0x100 /* more data mask */ +#define WL_SAMPLEDATA_T_VERSION 1 /* version of wl_samplecollect_args_t struct */ +/* version for unpacked sample data, int16 {(I,Q),Core(0..N)} */ +#define WL_SAMPLEDATA_T_VERSION_SPEC_AN 2 + +typedef struct wl_sampledata { + uint16 version; /* structure version */ + uint16 size; /* size of structure */ + uint16 tag; /* Header/Data */ + uint16 length; /* data length */ + uint32 flag; /* bit def */ +} wl_sampledata_t; + +/* wl_radar_args_t */ +typedef struct { + int npulses; /* required number of pulses at n * t_int */ + int ncontig; /* required number of pulses at t_int */ + int min_pw; /* minimum pulse width (20 MHz clocks) */ + int max_pw; /* maximum pulse width (20 MHz clocks) */ + uint16 thresh0; /* Radar detection, thresh 0 */ + uint16 thresh1; /* Radar detection, thresh 1 */ + uint16 blank; /* Radar detection, blank control */ + uint16 fmdemodcfg; /* Radar detection, fmdemod config */ + int npulses_lp; /* Radar detection, minimum long pulses */ + int min_pw_lp; /* Minimum pulsewidth for long pulses */ + int max_pw_lp; /* Maximum pulsewidth for long pulses */ + int min_fm_lp; /* Minimum fm for long pulses */ + int max_span_lp; /* Maximum deltat for long pulses */ + int min_deltat; /* Minimum spacing between pulses */ + int max_deltat; /* Maximum spacing between pulses */ + uint16 autocorr; /* Radar detection, autocorr on or off */ + uint16 st_level_time; /* Radar detection, start_timing level */ + uint16 t2_min; /* minimum clocks needed to remain in state 2 */ + uint32 version; /* version */ + uint32 fra_pulse_err; /* sample error margin for detecting French radar pulsed */ + int npulses_fra; /* Radar detection, minimum French pulses set */ + int npulses_stg2; /* Radar detection, minimum staggered-2 pulses set */ + int npulses_stg3; /* Radar detection, minimum staggered-3 pulses set */ + uint16 percal_mask; /* defines which period cal is masked from radar detection */ + int quant; /* quantization resolution to pulse positions */ + uint32 min_burst_intv_lp; /* minimum burst to burst interval for bin3 radar */ + uint32 max_burst_intv_lp; /* maximum burst to burst interval for bin3 radar */ + int nskip_rst_lp; /* number of skipped pulses before resetting lp buffer */ + int max_pw_tol; /* maximum tollerance allowed in detected pulse width for radar detection */ + uint16 feature_mask; /* 16-bit mask to specify enabled features */ +} wl_radar_args_t; + +#define WL_RADAR_ARGS_VERSION 2 + +typedef struct { + uint32 version; /* version */ + uint16 thresh0_20_lo; /* Radar detection, thresh 0 (range 5250-5350MHz) for BW 20MHz */ + uint16 thresh1_20_lo; /* Radar detection, thresh 1 (range 5250-5350MHz) for BW 20MHz */ + uint16 thresh0_40_lo; /* Radar detection, thresh 0 (range 5250-5350MHz) for BW 40MHz */ + uint16 thresh1_40_lo; /* Radar detection, thresh 1 (range 5250-5350MHz) for BW 40MHz */ + uint16 thresh0_80_lo; /* Radar detection, thresh 0 (range 5250-5350MHz) for BW 80MHz */ + uint16 thresh1_80_lo; /* Radar detection, thresh 1 (range 5250-5350MHz) for BW 80MHz */ + uint16 thresh0_20_hi; /* Radar detection, thresh 0 (range 5470-5725MHz) for BW 20MHz */ + uint16 thresh1_20_hi; /* Radar detection, thresh 1 (range 5470-5725MHz) for BW 20MHz */ + uint16 thresh0_40_hi; /* Radar detection, thresh 0 (range 5470-5725MHz) for BW 40MHz */ + uint16 thresh1_40_hi; /* Radar detection, thresh 1 (range 5470-5725MHz) for BW 40MHz */ + uint16 thresh0_80_hi; /* Radar detection, thresh 0 (range 5470-5725MHz) for BW 80MHz */ + uint16 thresh1_80_hi; /* Radar detection, thresh 1 (range 5470-5725MHz) for BW 80MHz */ +} wl_radar_thr_t; + +#define WL_RADAR_THR_VERSION 2 +#define WL_THRESHOLD_LO_BAND 70 /* range from 5250MHz - 5350MHz */ + +/* radar iovar SET defines */ +#define WL_RADAR_DETECTOR_OFF 0 /* radar detector off */ +#define WL_RADAR_DETECTOR_ON 1 /* radar detector on */ +#define WL_RADAR_SIMULATED 2 /* force radar detector to declare + * detection once + */ +#define WL_RSSI_ANT_VERSION 1 /* current version of wl_rssi_ant_t */ +#define WL_ANT_RX_MAX 2 /* max 2 receive antennas */ +#define WL_ANT_HT_RX_MAX 3 /* max 3 receive antennas/cores */ +#define WL_ANT_IDX_1 0 /* antenna index 1 */ +#define WL_ANT_IDX_2 1 /* antenna index 2 */ + +#ifndef WL_RSSI_ANT_MAX +#define WL_RSSI_ANT_MAX 4 /* max possible rx antennas */ +#elif WL_RSSI_ANT_MAX != 4 +#error "WL_RSSI_ANT_MAX does not match" +#endif + +/* RSSI per antenna */ +typedef struct { + uint32 version; /* version field */ + uint32 count; /* number of valid antenna rssi */ + int8 rssi_ant[WL_RSSI_ANT_MAX]; /* rssi per antenna */ +} wl_rssi_ant_t; + +/* dfs_status iovar-related defines */ + +/* cac - channel availability check, + * ism - in-service monitoring + * csa - channel switching announcement + */ + +/* cac state values */ +#define WL_DFS_CACSTATE_IDLE 0 /* state for operating in non-radar channel */ +#define WL_DFS_CACSTATE_PREISM_CAC 1 /* CAC in progress */ +#define WL_DFS_CACSTATE_ISM 2 /* ISM in progress */ +#define WL_DFS_CACSTATE_CSA 3 /* csa */ +#define WL_DFS_CACSTATE_POSTISM_CAC 4 /* ISM CAC */ +#define WL_DFS_CACSTATE_PREISM_OOC 5 /* PREISM OOC */ +#define WL_DFS_CACSTATE_POSTISM_OOC 6 /* POSTISM OOC */ +#define WL_DFS_CACSTATES 7 /* this many states exist */ + +/* data structure used in 'dfs_status' wl interface, which is used to query dfs status */ +typedef struct { + uint state; /* noted by WL_DFS_CACSTATE_XX. */ + uint duration; /* time spent in ms in state. */ + /* as dfs enters ISM state, it removes the operational channel from quiet channel + * list and notes the channel in channel_cleared. set to 0 if no channel is cleared + */ + chanspec_t chanspec_cleared; + /* chanspec cleared used to be a uint, add another to uint16 to maintain size */ + uint16 pad; +} wl_dfs_status_t; + +/* data structure used in 'radar_status' wl interface, which is use to query radar det status */ +typedef struct { + bool detected; + int count; + bool pretended; + uint32 radartype; + uint32 timenow; + uint32 timefromL; + int lp_csect_single; + int detected_pulse_index; + int nconsecq_pulses; + chanspec_t ch; + int pw[10]; + int intv[10]; + int fm[10]; +} wl_radar_status_t; + + +#define NUM_PWRCTRL_RATES 12 + +typedef struct { + uint8 txpwr_band_max[NUM_PWRCTRL_RATES]; /* User set target */ + uint8 txpwr_limit[NUM_PWRCTRL_RATES]; /* reg and local power limit */ + uint8 txpwr_local_max; /* local max according to the AP */ + uint8 txpwr_local_constraint; /* local constraint according to the AP */ + uint8 txpwr_chan_reg_max; /* Regulatory max for this channel */ + uint8 txpwr_target[2][NUM_PWRCTRL_RATES]; /* Latest target for 2.4 and 5 Ghz */ + uint8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */ + uint8 txpwr_opo[NUM_PWRCTRL_RATES]; /* On G phy, OFDM power offset */ + uint8 txpwr_bphy_cck_max[NUM_PWRCTRL_RATES]; /* Max CCK power for this band (SROM) */ + uint8 txpwr_bphy_ofdm_max; /* Max OFDM power for this band (SROM) */ + uint8 txpwr_aphy_max[NUM_PWRCTRL_RATES]; /* Max power for A band (SROM) */ + int8 txpwr_antgain[2]; /* Ant gain for each band - from SROM */ + uint8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */ +} tx_power_legacy_t; + +#define WL_TX_POWER_RATES_LEGACY 45 +#define WL_TX_POWER_MCS20_FIRST 12 +#define WL_TX_POWER_MCS20_NUM 16 +#define WL_TX_POWER_MCS40_FIRST 28 +#define WL_TX_POWER_MCS40_NUM 17 + +typedef struct { + uint32 flags; + chanspec_t chanspec; /* txpwr report for this channel */ + chanspec_t local_chanspec; /* channel on which we are associated */ + uint8 local_max; /* local max according to the AP */ + uint8 local_constraint; /* local constraint according to the AP */ + int8 antgain[2]; /* Ant gain for each band - from SROM */ + uint8 rf_cores; /* count of RF Cores being reported */ + uint8 est_Pout[4]; /* Latest tx power out estimate per RF + * chain without adjustment + */ + uint8 est_Pout_cck; /* Latest CCK tx power out estimate */ + uint8 user_limit[WL_TX_POWER_RATES_LEGACY]; /* User limit */ + uint8 reg_limit[WL_TX_POWER_RATES_LEGACY]; /* Regulatory power limit */ + uint8 board_limit[WL_TX_POWER_RATES_LEGACY]; /* Max power board can support (SROM) */ + uint8 target[WL_TX_POWER_RATES_LEGACY]; /* Latest target power */ +} tx_power_legacy2_t; + +/* TX Power index defines */ +#define WL_NUM_RATES_CCK 4 /* 1, 2, 5.5, 11 Mbps */ +#define WL_NUM_RATES_OFDM 8 /* 6, 9, 12, 18, 24, 36, 48, 54 Mbps SISO/CDD */ +#define WL_NUM_RATES_MCS_1STREAM 8 /* MCS 0-7 1-stream rates - SISO/CDD/STBC/MCS */ +#define WL_NUM_RATES_EXTRA_VHT 2 /* Additional VHT 11AC rates */ +#define WL_NUM_RATES_VHT 10 +#define WL_NUM_RATES_MCS32 1 + +#define WLC_NUM_RATES_CCK WL_NUM_RATES_CCK +#define WLC_NUM_RATES_OFDM WL_NUM_RATES_OFDM +#define WLC_NUM_RATES_MCS_1_STREAM WL_NUM_RATES_MCS_1STREAM +#define WLC_NUM_RATES_MCS_2_STREAM WL_NUM_RATES_MCS_1STREAM +#define WLC_NUM_RATES_MCS32 WL_NUM_RATES_MCS32 +#define WL_TX_POWER_CCK_NUM WL_NUM_RATES_CCK +#define WL_TX_POWER_OFDM_NUM WL_NUM_RATES_OFDM +#define WL_TX_POWER_MCS_1_STREAM_NUM WL_NUM_RATES_MCS_1STREAM +#define WL_TX_POWER_MCS_2_STREAM_NUM WL_NUM_RATES_MCS_1STREAM +#define WL_TX_POWER_MCS_32_NUM WL_NUM_RATES_MCS32 + +#define WL_NUM_2x2_ELEMENTS 4 +#define WL_NUM_3x3_ELEMENTS 6 + +typedef struct { + uint16 ver; /* version of this struct */ + uint16 len; /* length in bytes of this structure */ + uint32 flags; + chanspec_t chanspec; /* txpwr report for this channel */ + chanspec_t local_chanspec; /* channel on which we are associated */ + uint32 buflen; /* ppr buffer length */ + uint8 pprbuf[1]; /* Latest target power buffer */ +} wl_txppr_t; + +#define WL_TXPPR_VERSION 1 +#define WL_TXPPR_LENGTH (sizeof(wl_txppr_t)) +#define TX_POWER_T_VERSION 44 + +/* Defines used with channel_bandwidth for curpower */ +#define WL_BW_20MHZ 0 +#define WL_BW_40MHZ 1 +#define WL_BW_80MHZ 2 +#define WL_BW_160MHZ 3 + +/* tx_power_t.flags bits */ +#define WL_TX_POWER_F_ENABLED 1 +#define WL_TX_POWER_F_HW 2 +#define WL_TX_POWER_F_MIMO 4 +#define WL_TX_POWER_F_SISO 8 +#define WL_TX_POWER_F_HT 0x10 +#define WL_TX_POWER_F_VHT 0x20 +#define WL_TX_POWER_F_OPENLOOP 0x40 + +typedef struct tx_inst_power { + uint8 txpwr_est_Pout[2]; /* Latest estimate for 2.4 and 5 Ghz */ + uint8 txpwr_est_Pout_gofdm; /* Pwr estimate for 2.4 OFDM */ +} tx_inst_power_t; + +#define WL_NUM_TXCHAIN_MAX 4 +typedef struct wl_txchain_pwr_offsets { + int8 offset[WL_NUM_TXCHAIN_MAX]; /* quarter dBm signed offset for each chain */ +} wl_txchain_pwr_offsets_t; + +/* 802.11h measurement types */ +#define WLC_MEASURE_TPC 1 +#define WLC_MEASURE_CHANNEL_BASIC 2 +#define WLC_MEASURE_CHANNEL_CCA 3 +#define WLC_MEASURE_CHANNEL_RPI 4 + +/* regulatory enforcement levels */ +#define SPECT_MNGMT_OFF 0 /* both 11h and 11d disabled */ +#define SPECT_MNGMT_LOOSE_11H 1 /* allow non-11h APs in scan lists */ +#define SPECT_MNGMT_STRICT_11H 2 /* prune out non-11h APs from scan list */ +#define SPECT_MNGMT_STRICT_11D 3 /* switch to 802.11D mode */ +/* SPECT_MNGMT_LOOSE_11H_D - same as SPECT_MNGMT_LOOSE with the exception that Country IE + * adoption is done regardless of capability spectrum_management + */ +#define SPECT_MNGMT_LOOSE_11H_D 4 /* operation defined above */ + +#define WL_CHAN_VALID_HW (1 << 0) /* valid with current HW */ +#define WL_CHAN_VALID_SW (1 << 1) /* valid with current country setting */ +#define WL_CHAN_BAND_5G (1 << 2) /* 5GHz-band channel */ +#define WL_CHAN_RADAR (1 << 3) /* radar sensitive channel */ +#define WL_CHAN_INACTIVE (1 << 4) /* temporarily inactive due to radar */ +#define WL_CHAN_PASSIVE (1 << 5) /* channel is in passive mode */ +#define WL_CHAN_RESTRICTED (1 << 6) /* restricted use channel */ + +/* BTC mode used by "btc_mode" iovar */ +#define WL_BTC_DISABLE 0 /* disable BT coexistence */ +#define WL_BTC_FULLTDM 1 /* full TDM COEX */ +#define WL_BTC_ENABLE 1 /* full TDM COEX to maintain backward compatiblity */ +#define WL_BTC_PREMPT 2 /* full TDM COEX with preemption */ +#define WL_BTC_LITE 3 /* light weight coex for large isolation platform */ +#define WL_BTC_PARALLEL 4 /* BT and WLAN run in parallel with separate antenna */ +#define WL_BTC_HYBRID 5 /* hybrid coex, only ack is allowed to transmit in BT slot */ +#define WL_BTC_DEFAULT 8 /* set the default mode for the device */ +#define WL_INF_BTC_DISABLE 0 +#define WL_INF_BTC_ENABLE 1 +#define WL_INF_BTC_AUTO 3 + +/* BTC wire used by "btc_wire" iovar */ +#define WL_BTC_DEFWIRE 0 /* use default wire setting */ +#define WL_BTC_2WIRE 2 /* use 2-wire BTC */ +#define WL_BTC_3WIRE 3 /* use 3-wire BTC */ +#define WL_BTC_4WIRE 4 /* use 4-wire BTC */ + +/* BTC flags: BTC configuration that can be set by host */ +#define WL_BTC_FLAG_PREMPT (1 << 0) +#define WL_BTC_FLAG_BT_DEF (1 << 1) +#define WL_BTC_FLAG_ACTIVE_PROT (1 << 2) +#define WL_BTC_FLAG_SIM_RSP (1 << 3) +#define WL_BTC_FLAG_PS_PROTECT (1 << 4) +#define WL_BTC_FLAG_SIM_TX_LP (1 << 5) +#define WL_BTC_FLAG_ECI (1 << 6) +#define WL_BTC_FLAG_LIGHT (1 << 7) +#define WL_BTC_FLAG_PARALLEL (1 << 8) + +/* Message levels */ +#define WL_ERROR_VAL 0x00000001 +#define WL_TRACE_VAL 0x00000002 +#define WL_PRHDRS_VAL 0x00000004 +#define WL_PRPKT_VAL 0x00000008 +#define WL_INFORM_VAL 0x00000010 +#define WL_TMP_VAL 0x00000020 +#define WL_OID_VAL 0x00000040 +#define WL_RATE_VAL 0x00000080 +#define WL_ASSOC_VAL 0x00000100 +#define WL_PRUSR_VAL 0x00000200 +#define WL_PS_VAL 0x00000400 +#define WL_TXPWR_VAL 0x00000800 /* retired in TOT on 6/10/2009 */ +#define WL_PORT_VAL 0x00001000 +#define WL_DUAL_VAL 0x00002000 +#define WL_WSEC_VAL 0x00004000 +#define WL_WSEC_DUMP_VAL 0x00008000 +#define WL_LOG_VAL 0x00010000 +#define WL_NRSSI_VAL 0x00020000 /* retired in TOT on 6/10/2009 */ +#define WL_LOFT_VAL 0x00040000 /* retired in TOT on 6/10/2009 */ +#define WL_REGULATORY_VAL 0x00080000 +#define WL_PHYCAL_VAL 0x00100000 /* retired in TOT on 6/10/2009 */ +#define WL_RADAR_VAL 0x00200000 /* retired in TOT on 6/10/2009 */ +#define WL_MPC_VAL 0x00400000 +#define WL_APSTA_VAL 0x00800000 +#define WL_DFS_VAL 0x01000000 +#define WL_BA_VAL 0x02000000 /* retired in TOT on 6/14/2010 */ +#define WL_ACI_VAL 0x04000000 +#if defined(WLNINTENDO) +#define WL_NITRO_VAL 0x04000000 /* Note this value is shared with MBSS below */ +#endif /* WLNINTENDO */ +#define WL_MBSS_VAL 0x04000000 +#define WL_CAC_VAL 0x08000000 +#define WL_AMSDU_VAL 0x10000000 +#define WL_AMPDU_VAL 0x20000000 +#define WL_FFPLD_VAL 0x40000000 +#if defined(WLNINTENDO) +#define WL_NIN_VAL 0x80000000 +#endif /* WLNINTENDO */ + +/* wl_msg_level is full. For new bits take the next one and AND with + * wl_msg_level2 in wl_dbg.h + */ +#define WL_DPT_VAL 0x00000001 +#define WL_SCAN_VAL 0x00000002 +#define WL_WOWL_VAL 0x00000004 +#define WL_COEX_VAL 0x00000008 +#define WL_RTDC_VAL 0x00000010 +#define WL_PROTO_VAL 0x00000020 +#define WL_BTA_VAL 0x00000040 +#define WL_CHANINT_VAL 0x00000080 +#define WL_WMF_VAL 0x00000100 +#define WL_P2P_VAL 0x00000200 +#define WL_ITFR_VAL 0x00000400 +#define WL_MCHAN_VAL 0x00000800 +#define WL_TDLS_VAL 0x00001000 +#define WL_MCNX_VAL 0x00002000 +#define WL_PROT_VAL 0x00004000 +#define WL_PSTA_VAL 0x00008000 +#define WL_TSO_VAL 0x00010000 +#define WL_TRF_MGMT_VAL 0x00020000 +#define WL_LPC_VAL 0x00040000 +#define WL_L2FILTER_VAL 0x00080000 +#define WL_TXBF_VAL 0x00100000 +#define WL_P2PO_VAL 0x00200000 +/* Space reserved for conflicting message levels from trunk */ +#define WL_WNM_VAL 0x04000000 +#define WL_AWDL_VAL 0x08000000 +#define WL_PWRSEL_VAL 0x10000000 +#define WL_NET_DETECT_VAL 0x20000000 +#define WL_PCIE_VAL 0x40000000 + +/* use top-bit for WL_TIME_STAMP_VAL because this is a modifier + * rather than a message-type of its own + */ +#define WL_TIMESTAMP_VAL 0x80000000 + +/* max # of leds supported by GPIO (gpio pin# == led index#) */ +#define WL_LED_NUMGPIO 32 /* gpio 0-31 */ + +/* led per-pin behaviors */ +#define WL_LED_OFF 0 /* always off */ +#define WL_LED_ON 1 /* always on */ +#define WL_LED_ACTIVITY 2 /* activity */ +#define WL_LED_RADIO 3 /* radio enabled */ +#define WL_LED_ARADIO 4 /* 5 Ghz radio enabled */ +#define WL_LED_BRADIO 5 /* 2.4Ghz radio enabled */ +#define WL_LED_BGMODE 6 /* on if gmode, off if bmode */ +#define WL_LED_WI1 7 /* wlan indicator 1 mode (XXX Belkin) */ +#define WL_LED_WI2 8 /* wlan indicator 2 mode (XXX Microsoft) */ +#define WL_LED_WI3 9 /* wlan indicator 3 mode (XXX Microsoft) */ +#define WL_LED_ASSOC 10 /* associated state indicator */ +#define WL_LED_INACTIVE 11 /* null behavior (clears default behavior) */ +#define WL_LED_ASSOCACT 12 /* on when associated; blink fast for activity */ +#define WL_LED_WI4 13 /* wlan indicator 4 mode (xxx Netgear 5 G) */ +#define WL_LED_WI5 14 /* wlan indicator 5 mode (xxx Netgear 2.4G) */ +#define WL_LED_BLINKSLOW 15 /* blink slow */ +#define WL_LED_BLINKMED 16 /* blink med */ +#define WL_LED_BLINKFAST 17 /* blink fast */ +#define WL_LED_BLINKCUSTOM 18 /* blink custom */ +#define WL_LED_BLINKPERIODIC 19 /* blink periodic (custom 1000ms / off 400ms) */ +#define WL_LED_ASSOC_WITH_SEC 20 /* when connected with security */ + /* keep on for 300 sec */ +#define WL_LED_START_OFF 21 /* off upon boot, could be turned on later */ +#define WL_LED_WI6 22 /* wlan indicator 6 mode (xxx Netgear 43526 5 G) */ +#define WL_LED_WI7 23 /* wlan indicator 7 mode (xxx Netgear 43526 2.4G) */ +#define WL_LED_WI8 24 /* wlan indicator 8 mode (xxx DLink 43526 ) */ +#define WL_LED_NUMBEHAVIOR 25 + +/* led behavior numeric value format */ +#define WL_LED_BEH_MASK 0x7f /* behavior mask */ +#define WL_LED_AL_MASK 0x80 /* activelow (polarity) bit */ + +/* maximum channels returned by the get valid channels iovar */ +#define WL_NUMCHANNELS 64 + +/* max number of chanspecs (used by the iovar to calc. buf space) */ +#define WL_NUMCHANSPECS 110 + +/* WDS link local endpoint WPA role */ +#define WL_WDS_WPA_ROLE_AUTH 0 /* authenticator */ +#define WL_WDS_WPA_ROLE_SUP 1 /* supplicant */ +#define WL_WDS_WPA_ROLE_AUTO 255 /* auto, based on mac addr value */ + +/* number of bytes needed to define a 128-bit mask for MAC event reporting */ +#define WL_EVENTING_MASK_LEN ((WLC_E_LAST + 7) / 8) + +/* + * Join preference iovar value is an array of tuples. Each tuple has a one-byte type, + * a one-byte length, and a variable length value. RSSI type tuple must be present + * in the array. + * + * Types are defined in "join preference types" section. + * + * Length is the value size in octets. It is reserved for WL_JOIN_PREF_WPA type tuple + * and must be set to zero. + * + * Values are defined below. + * + * 1. RSSI - 2 octets + * offset 0: reserved + * offset 1: reserved + * + * 2. WPA - 2 + 12 * n octets (n is # tuples defined below) + * offset 0: reserved + * offset 1: # of tuples + * offset 2: tuple 1 + * offset 14: tuple 2 + * ... + * offset 2 + 12 * (n - 1) octets: tuple n + * + * struct wpa_cfg_tuple { + * uint8 akm[DOT11_OUI_LEN+1]; akm suite + * uint8 ucipher[DOT11_OUI_LEN+1]; unicast cipher suite + * uint8 mcipher[DOT11_OUI_LEN+1]; multicast cipher suite + * }; + * + * multicast cipher suite can be specified as a specific cipher suite or WL_WPA_ACP_MCS_ANY. + * + * 3. BAND - 2 octets + * offset 0: reserved + * offset 1: see "band preference" and "band types" + * + * 4. BAND RSSI - 2 octets + * offset 0: band types + * offset 1: +ve RSSI boost balue in dB + */ + +/* join preference types */ +#define WL_JOIN_PREF_RSSI 1 /* by RSSI */ +#define WL_JOIN_PREF_WPA 2 /* by akm and ciphers */ +#define WL_JOIN_PREF_BAND 3 /* by 802.11 band */ +#define WL_JOIN_PREF_RSSI_DELTA 4 /* by 802.11 band only if RSSI delta condition matches */ +#define WL_JOIN_PREF_TRANS_PREF 5 /* defined by requesting AP */ + +/* band preference */ +#define WLJP_BAND_ASSOC_PREF 255 /* use what WLC_SET_ASSOC_PREFER ioctl specifies */ + +/* any multicast cipher suite */ +#define WL_WPA_ACP_MCS_ANY "\x00\x00\x00\x00" + +struct tsinfo_arg { + uint8 octets[3]; +}; +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +#define NFIFO 6 /* # tx/rx fifopairs */ +#define NREINITREASONCOUNT 8 +#define REINITREASONIDX(_x) (((_x) < NREINITREASONCOUNT) ? (_x) : 0) + +#define WL_CNT_T_VERSION 10 /* current version of wl_cnt_t struct */ + +typedef struct { + uint16 version; /* see definition of WL_CNT_T_VERSION */ + uint16 length; /* length of entire structure */ + + /* transmit stat counters */ + uint32 txframe; /* tx data frames */ + uint32 txbyte; /* tx data bytes */ + uint32 txretrans; /* tx mac retransmits */ + uint32 txerror; /* tx data errors (derived: sum of others) */ + uint32 txctl; /* tx management frames */ + uint32 txprshort; /* tx short preamble frames */ + uint32 txserr; /* tx status errors */ + uint32 txnobuf; /* tx out of buffers errors */ + uint32 txnoassoc; /* tx discard because we're not associated */ + uint32 txrunt; /* tx runt frames */ + uint32 txchit; /* tx header cache hit (fastpath) */ + uint32 txcmiss; /* tx header cache miss (slowpath) */ + + /* transmit chip error counters */ + uint32 txuflo; /* tx fifo underflows */ + uint32 txphyerr; /* tx phy errors (indicated in tx status) */ + uint32 txphycrs; /* PR8861/8963 counter */ + + /* receive stat counters */ + uint32 rxframe; /* rx data frames */ + uint32 rxbyte; /* rx data bytes */ + uint32 rxerror; /* rx data errors (derived: sum of others) */ + uint32 rxctl; /* rx management frames */ + uint32 rxnobuf; /* rx out of buffers errors */ + uint32 rxnondata; /* rx non data frames in the data channel errors */ + uint32 rxbadds; /* rx bad DS errors */ + uint32 rxbadcm; /* rx bad control or management frames */ + uint32 rxfragerr; /* rx fragmentation errors */ + uint32 rxrunt; /* rx runt frames */ + uint32 rxgiant; /* rx giant frames */ + uint32 rxnoscb; /* rx no scb error */ + uint32 rxbadproto; /* rx invalid frames */ + uint32 rxbadsrcmac; /* rx frames with Invalid Src Mac */ + uint32 rxbadda; /* rx frames tossed for invalid da */ + uint32 rxfilter; /* rx frames filtered out */ + + /* receive chip error counters */ + uint32 rxoflo; /* rx fifo overflow errors */ + uint32 rxuflo[NFIFO]; /* rx dma descriptor underflow errors */ + + uint32 d11cnt_txrts_off; /* d11cnt txrts value when reset d11cnt */ + uint32 d11cnt_rxcrc_off; /* d11cnt rxcrc value when reset d11cnt */ + uint32 d11cnt_txnocts_off; /* d11cnt txnocts value when reset d11cnt */ + + /* misc counters */ + uint32 dmade; /* tx/rx dma descriptor errors */ + uint32 dmada; /* tx/rx dma data errors */ + uint32 dmape; /* tx/rx dma descriptor protocol errors */ + uint32 reset; /* reset count */ + uint32 tbtt; /* cnts the TBTT int's */ + uint32 txdmawar; /* # occurrences of PR15420 workaround */ + uint32 pkt_callback_reg_fail; /* callbacks register failure */ + + /* MAC counters: 32-bit version of d11.h's macstat_t */ + uint32 txallfrm; /* total number of frames sent, incl. Data, ACK, RTS, CTS, + * Control Management (includes retransmissions) + */ + uint32 txrtsfrm; /* number of RTS sent out by the MAC */ + uint32 txctsfrm; /* number of CTS sent out by the MAC */ + uint32 txackfrm; /* number of ACK frames sent out */ + uint32 txdnlfrm; /* Not used */ + uint32 txbcnfrm; /* beacons transmitted */ + uint32 txfunfl[6]; /* per-fifo tx underflows */ + uint32 rxtoolate; /* receive too late */ + uint32 txfbw; /* transmit at fallback bw (dynamic bw) */ + uint32 txtplunfl; /* Template underflows (mac was too slow to transmit ACK/CTS + * or BCN) + */ + uint32 txphyerror; /* Transmit phy error, type of error is reported in tx-status for + * driver enqueued frames + */ + uint32 rxfrmtoolong; /* Received frame longer than legal limit (2346 bytes) */ + uint32 rxfrmtooshrt; /* Received frame did not contain enough bytes for its frame type */ + uint32 rxinvmachdr; /* Either the protocol version != 0 or frame type not + * data/control/management + */ + uint32 rxbadfcs; /* number of frames for which the CRC check failed in the MAC */ + uint32 rxbadplcp; /* parity check of the PLCP header failed */ + uint32 rxcrsglitch; /* PHY was able to correlate the preamble but not the header */ + uint32 rxstrt; /* Number of received frames with a good PLCP + * (i.e. passing parity check) + */ + uint32 rxdfrmucastmbss; /* Number of received DATA frames with good FCS and matching RA */ + uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ + uint32 rxcfrmucast; /* number of received CNTRL frames with good FCS and matching RA */ + uint32 rxrtsucast; /* number of unicast RTS addressed to the MAC (good FCS) */ + uint32 rxctsucast; /* number of unicast CTS addressed to the MAC (good FCS) */ + uint32 rxackucast; /* number of ucast ACKS received (good FCS) */ + uint32 rxdfrmocast; /* number of received DATA frames (good FCS and not matching RA) */ + uint32 rxmfrmocast; /* number of received MGMT frames (good FCS and not matching RA) */ + uint32 rxcfrmocast; /* number of received CNTRL frame (good FCS and not matching RA) */ + uint32 rxrtsocast; /* number of received RTS not addressed to the MAC */ + uint32 rxctsocast; /* number of received CTS not addressed to the MAC */ + uint32 rxdfrmmcast; /* number of RX Data multicast frames received by the MAC */ + uint32 rxmfrmmcast; /* number of RX Management multicast frames received by the MAC */ + uint32 rxcfrmmcast; /* number of RX Control multicast frames received by the MAC + * (unlikely to see these) + */ + uint32 rxbeaconmbss; /* beacons received from member of BSS */ + uint32 rxdfrmucastobss; /* number of unicast frames addressed to the MAC from + * other BSS (WDS FRAME) + */ + uint32 rxbeaconobss; /* beacons received from other BSS */ + uint32 rxrsptmout; /* Number of response timeouts for transmitted frames + * expecting a response + */ + uint32 bcntxcancl; /* transmit beacons canceled due to receipt of beacon (IBSS) */ + uint32 rxf0ovfl; /* Number of receive fifo 0 overflows */ + uint32 rxf1ovfl; /* Number of receive fifo 1 overflows (obsolete) */ + uint32 rxf2ovfl; /* Number of receive fifo 2 overflows (obsolete) */ + uint32 txsfovfl; /* Number of transmit status fifo overflows (obsolete) */ + uint32 pmqovfl; /* Number of PMQ overflows */ + uint32 rxcgprqfrm; /* Number of received Probe requests that made it into + * the PRQ fifo + */ + uint32 rxcgprsqovfl; /* Rx Probe Request Que overflow in the AP */ + uint32 txcgprsfail; /* Tx Probe Response Fail. AP sent probe response but did + * not get ACK + */ + uint32 txcgprssuc; /* Tx Probe Response Success (ACK was received) */ + uint32 prs_timeout; /* Number of probe requests that were dropped from the PRQ + * fifo because a probe response could not be sent out within + * the time limit defined in M_PRS_MAXTIME + */ + uint32 rxnack; /* obsolete */ + uint32 frmscons; /* obsolete */ + uint32 txnack; /* obsolete */ + uint32 rxback; /* blockack rxcnt */ + uint32 txback; /* blockack txcnt */ + + /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ + uint32 txfrag; /* dot11TransmittedFragmentCount */ + uint32 txmulti; /* dot11MulticastTransmittedFrameCount */ + uint32 txfail; /* dot11FailedCount */ + uint32 txretry; /* dot11RetryCount */ + uint32 txretrie; /* dot11MultipleRetryCount */ + uint32 rxdup; /* dot11FrameduplicateCount */ + uint32 txrts; /* dot11RTSSuccessCount */ + uint32 txnocts; /* dot11RTSFailureCount */ + uint32 txnoack; /* dot11ACKFailureCount */ + uint32 rxfrag; /* dot11ReceivedFragmentCount */ + uint32 rxmulti; /* dot11MulticastReceivedFrameCount */ + uint32 rxcrc; /* dot11FCSErrorCount */ + uint32 txfrmsnt; /* dot11TransmittedFrameCount (bogus MIB?) */ + uint32 rxundec; /* dot11WEPUndecryptableCount */ + + /* WPA2 counters (see rxundec for DecryptFailureCount) */ + uint32 tkipmicfaill; /* TKIPLocalMICFailures */ + uint32 tkipcntrmsr; /* TKIPCounterMeasuresInvoked */ + uint32 tkipreplay; /* TKIPReplays */ + uint32 ccmpfmterr; /* CCMPFormatErrors */ + uint32 ccmpreplay; /* CCMPReplays */ + uint32 ccmpundec; /* CCMPDecryptErrors */ + uint32 fourwayfail; /* FourWayHandshakeFailures */ + uint32 wepundec; /* dot11WEPUndecryptableCount */ + uint32 wepicverr; /* dot11WEPICVErrorCount */ + uint32 decsuccess; /* DecryptSuccessCount */ + uint32 tkipicverr; /* TKIPICVErrorCount */ + uint32 wepexcluded; /* dot11WEPExcludedCount */ + + uint32 txchanrej; /* Tx frames suppressed due to channel rejection */ + uint32 psmwds; /* Count PSM watchdogs */ + uint32 phywatchdog; /* Count Phy watchdogs (triggered by ucode) */ + + /* MBSS counters, AP only */ + uint32 prq_entries_handled; /* PRQ entries read in */ + uint32 prq_undirected_entries; /* which were bcast bss & ssid */ + uint32 prq_bad_entries; /* which could not be translated to info */ + uint32 atim_suppress_count; /* TX suppressions on ATIM fifo */ + uint32 bcn_template_not_ready; /* Template marked in use on send bcn ... */ + uint32 bcn_template_not_ready_done; /* ...but "DMA done" interrupt rcvd */ + uint32 late_tbtt_dpc; /* TBTT DPC did not happen in time */ + + /* per-rate receive stat counters */ + uint32 rx1mbps; /* packets rx at 1Mbps */ + uint32 rx2mbps; /* packets rx at 2Mbps */ + uint32 rx5mbps5; /* packets rx at 5.5Mbps */ + uint32 rx6mbps; /* packets rx at 6Mbps */ + uint32 rx9mbps; /* packets rx at 9Mbps */ + uint32 rx11mbps; /* packets rx at 11Mbps */ + uint32 rx12mbps; /* packets rx at 12Mbps */ + uint32 rx18mbps; /* packets rx at 18Mbps */ + uint32 rx24mbps; /* packets rx at 24Mbps */ + uint32 rx36mbps; /* packets rx at 36Mbps */ + uint32 rx48mbps; /* packets rx at 48Mbps */ + uint32 rx54mbps; /* packets rx at 54Mbps */ + uint32 rx108mbps; /* packets rx at 108mbps */ + uint32 rx162mbps; /* packets rx at 162mbps */ + uint32 rx216mbps; /* packets rx at 216 mbps */ + uint32 rx270mbps; /* packets rx at 270 mbps */ + uint32 rx324mbps; /* packets rx at 324 mbps */ + uint32 rx378mbps; /* packets rx at 378 mbps */ + uint32 rx432mbps; /* packets rx at 432 mbps */ + uint32 rx486mbps; /* packets rx at 486 mbps */ + uint32 rx540mbps; /* packets rx at 540 mbps */ + + /* pkteng rx frame stats */ + uint32 pktengrxducast; /* unicast frames rxed by the pkteng code */ + uint32 pktengrxdmcast; /* multicast frames rxed by the pkteng code */ + + uint32 rfdisable; /* count of radio disables */ + uint32 bphy_rxcrsglitch; /* PHY count of bphy glitches */ + uint32 bphy_badplcp; + + uint32 txexptime; /* Tx frames suppressed due to timer expiration */ + + uint32 txmpdu_sgi; /* count for sgi transmit */ + uint32 rxmpdu_sgi; /* count for sgi received */ + uint32 txmpdu_stbc; /* count for stbc transmit */ + uint32 rxmpdu_stbc; /* count for stbc received */ + + uint32 rxundec_mcst; /* dot11WEPUndecryptableCount */ + + /* WPA2 counters (see rxundec for DecryptFailureCount) */ + uint32 tkipmicfaill_mcst; /* TKIPLocalMICFailures */ + uint32 tkipcntrmsr_mcst; /* TKIPCounterMeasuresInvoked */ + uint32 tkipreplay_mcst; /* TKIPReplays */ + uint32 ccmpfmterr_mcst; /* CCMPFormatErrors */ + uint32 ccmpreplay_mcst; /* CCMPReplays */ + uint32 ccmpundec_mcst; /* CCMPDecryptErrors */ + uint32 fourwayfail_mcst; /* FourWayHandshakeFailures */ + uint32 wepundec_mcst; /* dot11WEPUndecryptableCount */ + uint32 wepicverr_mcst; /* dot11WEPICVErrorCount */ + uint32 decsuccess_mcst; /* DecryptSuccessCount */ + uint32 tkipicverr_mcst; /* TKIPICVErrorCount */ + uint32 wepexcluded_mcst; /* dot11WEPExcludedCount */ + + uint32 dma_hang; /* count for dma hang */ + uint32 reinit; /* count for reinit */ + + uint32 pstatxucast; /* count of ucast frames xmitted on all psta assoc */ + uint32 pstatxnoassoc; /* count of txnoassoc frames xmitted on all psta assoc */ + uint32 pstarxucast; /* count of ucast frames received on all psta assoc */ + uint32 pstarxbcmc; /* count of bcmc frames received on all psta */ + uint32 pstatxbcmc; /* count of bcmc frames transmitted on all psta */ + + uint32 cso_passthrough; /* hw cso required but passthrough */ + uint32 cso_normal; /* hw cso hdr for normal process */ + uint32 chained; /* number of frames chained */ + uint32 chainedsz1; /* number of chain size 1 frames */ + uint32 unchained; /* number of frames not chained */ + uint32 maxchainsz; /* max chain size so far */ + uint32 currchainsz; /* current chain size */ + uint32 rxdrop20s; /* drop secondary cnt */ + uint32 pciereset; /* Secondary Bus Reset issued by driver */ + uint32 cfgrestore; /* configspace restore by driver */ + uint32 reinitreason[NREINITREASONCOUNT]; /* reinitreason counters; 0: Unknown reason */ +} wl_cnt_t; + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +typedef struct { + uint16 version; /* see definition of WL_CNT_T_VERSION */ + uint16 length; /* length of entire structure */ + + /* transmit stat counters */ + uint32 txframe; /* tx data frames */ + uint32 txbyte; /* tx data bytes */ + uint32 txretrans; /* tx mac retransmits */ + uint32 txerror; /* tx data errors (derived: sum of others) */ + uint32 txctl; /* tx management frames */ + uint32 txprshort; /* tx short preamble frames */ + uint32 txserr; /* tx status errors */ + uint32 txnobuf; /* tx out of buffers errors */ + uint32 txnoassoc; /* tx discard because we're not associated */ + uint32 txrunt; /* tx runt frames */ + uint32 txchit; /* tx header cache hit (fastpath) */ + uint32 txcmiss; /* tx header cache miss (slowpath) */ + + /* transmit chip error counters */ + uint32 txuflo; /* tx fifo underflows */ + uint32 txphyerr; /* tx phy errors (indicated in tx status) */ + uint32 txphycrs; /* PR8861/8963 counter */ + + /* receive stat counters */ + uint32 rxframe; /* rx data frames */ + uint32 rxbyte; /* rx data bytes */ + uint32 rxerror; /* rx data errors (derived: sum of others) */ + uint32 rxctl; /* rx management frames */ + uint32 rxnobuf; /* rx out of buffers errors */ + uint32 rxnondata; /* rx non data frames in the data channel errors */ + uint32 rxbadds; /* rx bad DS errors */ + uint32 rxbadcm; /* rx bad control or management frames */ + uint32 rxfragerr; /* rx fragmentation errors */ + uint32 rxrunt; /* rx runt frames */ + uint32 rxgiant; /* rx giant frames */ + uint32 rxnoscb; /* rx no scb error */ + uint32 rxbadproto; /* rx invalid frames */ + uint32 rxbadsrcmac; /* rx frames with Invalid Src Mac */ + uint32 rxbadda; /* rx frames tossed for invalid da */ + uint32 rxfilter; /* rx frames filtered out */ + + /* receive chip error counters */ + uint32 rxoflo; /* rx fifo overflow errors */ + uint32 rxuflo[NFIFO]; /* rx dma descriptor underflow errors */ + + uint32 d11cnt_txrts_off; /* d11cnt txrts value when reset d11cnt */ + uint32 d11cnt_rxcrc_off; /* d11cnt rxcrc value when reset d11cnt */ + uint32 d11cnt_txnocts_off; /* d11cnt txnocts value when reset d11cnt */ + + /* misc counters */ + uint32 dmade; /* tx/rx dma descriptor errors */ + uint32 dmada; /* tx/rx dma data errors */ + uint32 dmape; /* tx/rx dma descriptor protocol errors */ + uint32 reset; /* reset count */ + uint32 tbtt; /* cnts the TBTT int's */ + uint32 txdmawar; /* # occurrences of PR15420 workaround */ + uint32 pkt_callback_reg_fail; /* callbacks register failure */ + + /* MAC counters: 32-bit version of d11.h's macstat_t */ + uint32 txallfrm; /* total number of frames sent, incl. Data, ACK, RTS, CTS, + * Control Management (includes retransmissions) + */ + uint32 txrtsfrm; /* number of RTS sent out by the MAC */ + uint32 txctsfrm; /* number of CTS sent out by the MAC */ + uint32 txackfrm; /* number of ACK frames sent out */ + uint32 txdnlfrm; /* Not used */ + uint32 txbcnfrm; /* beacons transmitted */ + uint32 txfunfl[8]; /* per-fifo tx underflows */ + uint32 txtplunfl; /* Template underflows (mac was too slow to transmit ACK/CTS + * or BCN) + */ + uint32 txphyerror; /* Transmit phy error, type of error is reported in tx-status for + * driver enqueued frames + */ + uint32 rxfrmtoolong; /* Received frame longer than legal limit (2346 bytes) */ + uint32 rxfrmtooshrt; /* Received frame did not contain enough bytes for its frame type */ + uint32 rxinvmachdr; /* Either the protocol version != 0 or frame type not + * data/control/management + */ + uint32 rxbadfcs; /* number of frames for which the CRC check failed in the MAC */ + uint32 rxbadplcp; /* parity check of the PLCP header failed */ + uint32 rxcrsglitch; /* PHY was able to correlate the preamble but not the header */ + uint32 rxstrt; /* Number of received frames with a good PLCP + * (i.e. passing parity check) + */ + uint32 rxdfrmucastmbss; /* Number of received DATA frames with good FCS and matching RA */ + uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ + uint32 rxcfrmucast; /* number of received CNTRL frames with good FCS and matching RA */ + uint32 rxrtsucast; /* number of unicast RTS addressed to the MAC (good FCS) */ + uint32 rxctsucast; /* number of unicast CTS addressed to the MAC (good FCS) */ + uint32 rxackucast; /* number of ucast ACKS received (good FCS) */ + uint32 rxdfrmocast; /* number of received DATA frames (good FCS and not matching RA) */ + uint32 rxmfrmocast; /* number of received MGMT frames (good FCS and not matching RA) */ + uint32 rxcfrmocast; /* number of received CNTRL frame (good FCS and not matching RA) */ + uint32 rxrtsocast; /* number of received RTS not addressed to the MAC */ + uint32 rxctsocast; /* number of received CTS not addressed to the MAC */ + uint32 rxdfrmmcast; /* number of RX Data multicast frames received by the MAC */ + uint32 rxmfrmmcast; /* number of RX Management multicast frames received by the MAC */ + uint32 rxcfrmmcast; /* number of RX Control multicast frames received by the MAC + * (unlikely to see these) + */ + uint32 rxbeaconmbss; /* beacons received from member of BSS */ + uint32 rxdfrmucastobss; /* number of unicast frames addressed to the MAC from + * other BSS (WDS FRAME) + */ + uint32 rxbeaconobss; /* beacons received from other BSS */ + uint32 rxrsptmout; /* Number of response timeouts for transmitted frames + * expecting a response + */ + uint32 bcntxcancl; /* transmit beacons canceled due to receipt of beacon (IBSS) */ + uint32 rxf0ovfl; /* Number of receive fifo 0 overflows */ + uint32 rxf1ovfl; /* Number of receive fifo 1 overflows (obsolete) */ + uint32 rxf2ovfl; /* Number of receive fifo 2 overflows (obsolete) */ + uint32 txsfovfl; /* Number of transmit status fifo overflows (obsolete) */ + uint32 pmqovfl; /* Number of PMQ overflows */ + uint32 rxcgprqfrm; /* Number of received Probe requests that made it into + * the PRQ fifo + */ + uint32 rxcgprsqovfl; /* Rx Probe Request Que overflow in the AP */ + uint32 txcgprsfail; /* Tx Probe Response Fail. AP sent probe response but did + * not get ACK + */ + uint32 txcgprssuc; /* Tx Probe Response Success (ACK was received) */ + uint32 prs_timeout; /* Number of probe requests that were dropped from the PRQ + * fifo because a probe response could not be sent out within + * the time limit defined in M_PRS_MAXTIME + */ + uint32 rxnack; /* obsolete */ + uint32 frmscons; /* obsolete */ + uint32 txnack; /* obsolete */ + uint32 txglitch_nack; /* obsolete */ + uint32 txburst; /* obsolete */ + + /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ + uint32 txfrag; /* dot11TransmittedFragmentCount */ + uint32 txmulti; /* dot11MulticastTransmittedFrameCount */ + uint32 txfail; /* dot11FailedCount */ + uint32 txretry; /* dot11RetryCount */ + uint32 txretrie; /* dot11MultipleRetryCount */ + uint32 rxdup; /* dot11FrameduplicateCount */ + uint32 txrts; /* dot11RTSSuccessCount */ + uint32 txnocts; /* dot11RTSFailureCount */ + uint32 txnoack; /* dot11ACKFailureCount */ + uint32 rxfrag; /* dot11ReceivedFragmentCount */ + uint32 rxmulti; /* dot11MulticastReceivedFrameCount */ + uint32 rxcrc; /* dot11FCSErrorCount */ + uint32 txfrmsnt; /* dot11TransmittedFrameCount (bogus MIB?) */ + uint32 rxundec; /* dot11WEPUndecryptableCount */ + + /* WPA2 counters (see rxundec for DecryptFailureCount) */ + uint32 tkipmicfaill; /* TKIPLocalMICFailures */ + uint32 tkipcntrmsr; /* TKIPCounterMeasuresInvoked */ + uint32 tkipreplay; /* TKIPReplays */ + uint32 ccmpfmterr; /* CCMPFormatErrors */ + uint32 ccmpreplay; /* CCMPReplays */ + uint32 ccmpundec; /* CCMPDecryptErrors */ + uint32 fourwayfail; /* FourWayHandshakeFailures */ + uint32 wepundec; /* dot11WEPUndecryptableCount */ + uint32 wepicverr; /* dot11WEPICVErrorCount */ + uint32 decsuccess; /* DecryptSuccessCount */ + uint32 tkipicverr; /* TKIPICVErrorCount */ + uint32 wepexcluded; /* dot11WEPExcludedCount */ + + uint32 txchanrej; /* Tx frames suppressed due to channel rejection */ + uint32 psmwds; /* Count PSM watchdogs */ + uint32 phywatchdog; /* Count Phy watchdogs (triggered by ucode) */ + + /* MBSS counters, AP only */ + uint32 prq_entries_handled; /* PRQ entries read in */ + uint32 prq_undirected_entries; /* which were bcast bss & ssid */ + uint32 prq_bad_entries; /* which could not be translated to info */ + uint32 atim_suppress_count; /* TX suppressions on ATIM fifo */ + uint32 bcn_template_not_ready; /* Template marked in use on send bcn ... */ + uint32 bcn_template_not_ready_done; /* ...but "DMA done" interrupt rcvd */ + uint32 late_tbtt_dpc; /* TBTT DPC did not happen in time */ + + /* per-rate receive stat counters */ + uint32 rx1mbps; /* packets rx at 1Mbps */ + uint32 rx2mbps; /* packets rx at 2Mbps */ + uint32 rx5mbps5; /* packets rx at 5.5Mbps */ + uint32 rx6mbps; /* packets rx at 6Mbps */ + uint32 rx9mbps; /* packets rx at 9Mbps */ + uint32 rx11mbps; /* packets rx at 11Mbps */ + uint32 rx12mbps; /* packets rx at 12Mbps */ + uint32 rx18mbps; /* packets rx at 18Mbps */ + uint32 rx24mbps; /* packets rx at 24Mbps */ + uint32 rx36mbps; /* packets rx at 36Mbps */ + uint32 rx48mbps; /* packets rx at 48Mbps */ + uint32 rx54mbps; /* packets rx at 54Mbps */ + uint32 rx108mbps; /* packets rx at 108mbps */ + uint32 rx162mbps; /* packets rx at 162mbps */ + uint32 rx216mbps; /* packets rx at 216 mbps */ + uint32 rx270mbps; /* packets rx at 270 mbps */ + uint32 rx324mbps; /* packets rx at 324 mbps */ + uint32 rx378mbps; /* packets rx at 378 mbps */ + uint32 rx432mbps; /* packets rx at 432 mbps */ + uint32 rx486mbps; /* packets rx at 486 mbps */ + uint32 rx540mbps; /* packets rx at 540 mbps */ + + /* pkteng rx frame stats */ + uint32 pktengrxducast; /* unicast frames rxed by the pkteng code */ + uint32 pktengrxdmcast; /* multicast frames rxed by the pkteng code */ + + uint32 rfdisable; /* count of radio disables */ + uint32 bphy_rxcrsglitch; /* PHY count of bphy glitches */ + + uint32 txexptime; /* Tx frames suppressed due to timer expiration */ + + uint32 txmpdu_sgi; /* count for sgi transmit */ + uint32 rxmpdu_sgi; /* count for sgi received */ + uint32 txmpdu_stbc; /* count for stbc transmit */ + uint32 rxmpdu_stbc; /* count for stbc received */ + + uint32 rxundec_mcst; /* dot11WEPUndecryptableCount */ + + /* WPA2 counters (see rxundec for DecryptFailureCount) */ + uint32 tkipmicfaill_mcst; /* TKIPLocalMICFailures */ + uint32 tkipcntrmsr_mcst; /* TKIPCounterMeasuresInvoked */ + uint32 tkipreplay_mcst; /* TKIPReplays */ + uint32 ccmpfmterr_mcst; /* CCMPFormatErrors */ + uint32 ccmpreplay_mcst; /* CCMPReplays */ + uint32 ccmpundec_mcst; /* CCMPDecryptErrors */ + uint32 fourwayfail_mcst; /* FourWayHandshakeFailures */ + uint32 wepundec_mcst; /* dot11WEPUndecryptableCount */ + uint32 wepicverr_mcst; /* dot11WEPICVErrorCount */ + uint32 decsuccess_mcst; /* DecryptSuccessCount */ + uint32 tkipicverr_mcst; /* TKIPICVErrorCount */ + uint32 wepexcluded_mcst; /* dot11WEPExcludedCount */ + + uint32 dma_hang; /* count for stbc received */ +} wl_cnt_ver_seven_t; + +typedef struct { + uint16 version; /* see definition of WL_CNT_T_VERSION */ + uint16 length; /* length of entire structure */ + + /* transmit stat counters */ + uint32 txframe; /* tx data frames */ + uint32 txbyte; /* tx data bytes */ + uint32 txretrans; /* tx mac retransmits */ + uint32 txerror; /* tx data errors (derived: sum of others) */ + uint32 txctl; /* tx management frames */ + uint32 txprshort; /* tx short preamble frames */ + uint32 txserr; /* tx status errors */ + uint32 txnobuf; /* tx out of buffers errors */ + uint32 txnoassoc; /* tx discard because we're not associated */ + uint32 txrunt; /* tx runt frames */ + uint32 txchit; /* tx header cache hit (fastpath) */ + uint32 txcmiss; /* tx header cache miss (slowpath) */ + + /* transmit chip error counters */ + uint32 txuflo; /* tx fifo underflows */ + uint32 txphyerr; /* tx phy errors (indicated in tx status) */ + uint32 txphycrs; /* PR8861/8963 counter */ + + /* receive stat counters */ + uint32 rxframe; /* rx data frames */ + uint32 rxbyte; /* rx data bytes */ + uint32 rxerror; /* rx data errors (derived: sum of others) */ + uint32 rxctl; /* rx management frames */ + uint32 rxnobuf; /* rx out of buffers errors */ + uint32 rxnondata; /* rx non data frames in the data channel errors */ + uint32 rxbadds; /* rx bad DS errors */ + uint32 rxbadcm; /* rx bad control or management frames */ + uint32 rxfragerr; /* rx fragmentation errors */ + uint32 rxrunt; /* rx runt frames */ + uint32 rxgiant; /* rx giant frames */ + uint32 rxnoscb; /* rx no scb error */ + uint32 rxbadproto; /* rx invalid frames */ + uint32 rxbadsrcmac; /* rx frames with Invalid Src Mac */ + uint32 rxbadda; /* rx frames tossed for invalid da */ + uint32 rxfilter; /* rx frames filtered out */ + + /* receive chip error counters */ + uint32 rxoflo; /* rx fifo overflow errors */ + uint32 rxuflo[NFIFO]; /* rx dma descriptor underflow errors */ + + uint32 d11cnt_txrts_off; /* d11cnt txrts value when reset d11cnt */ + uint32 d11cnt_rxcrc_off; /* d11cnt rxcrc value when reset d11cnt */ + uint32 d11cnt_txnocts_off; /* d11cnt txnocts value when reset d11cnt */ + + /* misc counters */ + uint32 dmade; /* tx/rx dma descriptor errors */ + uint32 dmada; /* tx/rx dma data errors */ + uint32 dmape; /* tx/rx dma descriptor protocol errors */ + uint32 reset; /* reset count */ + uint32 tbtt; /* cnts the TBTT int's */ + uint32 txdmawar; /* # occurrences of PR15420 workaround */ + uint32 pkt_callback_reg_fail; /* callbacks register failure */ + + /* MAC counters: 32-bit version of d11.h's macstat_t */ + uint32 txallfrm; /* total number of frames sent, incl. Data, ACK, RTS, CTS, + * Control Management (includes retransmissions) + */ + uint32 txrtsfrm; /* number of RTS sent out by the MAC */ + uint32 txctsfrm; /* number of CTS sent out by the MAC */ + uint32 txackfrm; /* number of ACK frames sent out */ + uint32 txdnlfrm; /* Not used */ + uint32 txbcnfrm; /* beacons transmitted */ + uint32 txfunfl[6]; /* per-fifo tx underflows */ + uint32 rxtoolate; /* receive too late */ + uint32 txfbw; /* transmit at fallback bw (dynamic bw) */ + uint32 txtplunfl; /* Template underflows (mac was too slow to transmit ACK/CTS + * or BCN) + */ + uint32 txphyerror; /* Transmit phy error, type of error is reported in tx-status for + * driver enqueued frames + */ + uint32 rxfrmtoolong; /* Received frame longer than legal limit (2346 bytes) */ + uint32 rxfrmtooshrt; /* Received frame did not contain enough bytes for its frame type */ + uint32 rxinvmachdr; /* Either the protocol version != 0 or frame type not + * data/control/management + */ + uint32 rxbadfcs; /* number of frames for which the CRC check failed in the MAC */ + uint32 rxbadplcp; /* parity check of the PLCP header failed */ + uint32 rxcrsglitch; /* PHY was able to correlate the preamble but not the header */ + uint32 rxstrt; /* Number of received frames with a good PLCP + * (i.e. passing parity check) + */ + uint32 rxdfrmucastmbss; /* Number of received DATA frames with good FCS and matching RA */ + uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ + uint32 rxcfrmucast; /* number of received CNTRL frames with good FCS and matching RA */ + uint32 rxrtsucast; /* number of unicast RTS addressed to the MAC (good FCS) */ + uint32 rxctsucast; /* number of unicast CTS addressed to the MAC (good FCS) */ + uint32 rxackucast; /* number of ucast ACKS received (good FCS) */ + uint32 rxdfrmocast; /* number of received DATA frames (good FCS and not matching RA) */ + uint32 rxmfrmocast; /* number of received MGMT frames (good FCS and not matching RA) */ + uint32 rxcfrmocast; /* number of received CNTRL frame (good FCS and not matching RA) */ + uint32 rxrtsocast; /* number of received RTS not addressed to the MAC */ + uint32 rxctsocast; /* number of received CTS not addressed to the MAC */ + uint32 rxdfrmmcast; /* number of RX Data multicast frames received by the MAC */ + uint32 rxmfrmmcast; /* number of RX Management multicast frames received by the MAC */ + uint32 rxcfrmmcast; /* number of RX Control multicast frames received by the MAC + * (unlikely to see these) + */ + uint32 rxbeaconmbss; /* beacons received from member of BSS */ + uint32 rxdfrmucastobss; /* number of unicast frames addressed to the MAC from + * other BSS (WDS FRAME) + */ + uint32 rxbeaconobss; /* beacons received from other BSS */ + uint32 rxrsptmout; /* Number of response timeouts for transmitted frames + * expecting a response + */ + uint32 bcntxcancl; /* transmit beacons canceled due to receipt of beacon (IBSS) */ + uint32 rxf0ovfl; /* Number of receive fifo 0 overflows */ + uint32 rxf1ovfl; /* Number of receive fifo 1 overflows (obsolete) */ + uint32 rxf2ovfl; /* Number of receive fifo 2 overflows (obsolete) */ + uint32 txsfovfl; /* Number of transmit status fifo overflows (obsolete) */ + uint32 pmqovfl; /* Number of PMQ overflows */ + uint32 rxcgprqfrm; /* Number of received Probe requests that made it into + * the PRQ fifo + */ + uint32 rxcgprsqovfl; /* Rx Probe Request Que overflow in the AP */ + uint32 txcgprsfail; /* Tx Probe Response Fail. AP sent probe response but did + * not get ACK + */ + uint32 txcgprssuc; /* Tx Probe Response Success (ACK was received) */ + uint32 prs_timeout; /* Number of probe requests that were dropped from the PRQ + * fifo because a probe response could not be sent out within + * the time limit defined in M_PRS_MAXTIME + */ + uint32 rxnack; /* XXX Number of NACKS received (Afterburner) */ + uint32 frmscons; /* XXX Number of frames completed without transmission because of an + * Afterburner re-queue + */ + uint32 txnack; /* obsolete */ + uint32 rxback; /* blockack rxcnt */ + uint32 txback; /* blockack txcnt */ + + /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ + uint32 txfrag; /* dot11TransmittedFragmentCount */ + uint32 txmulti; /* dot11MulticastTransmittedFrameCount */ + uint32 txfail; /* dot11FailedCount */ + uint32 txretry; /* dot11RetryCount */ + uint32 txretrie; /* dot11MultipleRetryCount */ + uint32 rxdup; /* dot11FrameduplicateCount */ + uint32 txrts; /* dot11RTSSuccessCount */ + uint32 txnocts; /* dot11RTSFailureCount */ + uint32 txnoack; /* dot11ACKFailureCount */ + uint32 rxfrag; /* dot11ReceivedFragmentCount */ + uint32 rxmulti; /* dot11MulticastReceivedFrameCount */ + uint32 rxcrc; /* dot11FCSErrorCount */ + uint32 txfrmsnt; /* dot11TransmittedFrameCount (bogus MIB?) */ + uint32 rxundec; /* dot11WEPUndecryptableCount */ + + /* WPA2 counters (see rxundec for DecryptFailureCount) */ + uint32 tkipmicfaill; /* TKIPLocalMICFailures */ + uint32 tkipcntrmsr; /* TKIPCounterMeasuresInvoked */ + uint32 tkipreplay; /* TKIPReplays */ + uint32 ccmpfmterr; /* CCMPFormatErrors */ + uint32 ccmpreplay; /* CCMPReplays */ + uint32 ccmpundec; /* CCMPDecryptErrors */ + uint32 fourwayfail; /* FourWayHandshakeFailures */ + uint32 wepundec; /* dot11WEPUndecryptableCount */ + uint32 wepicverr; /* dot11WEPICVErrorCount */ + uint32 decsuccess; /* DecryptSuccessCount */ + uint32 tkipicverr; /* TKIPICVErrorCount */ + uint32 wepexcluded; /* dot11WEPExcludedCount */ + + uint32 rxundec_mcst; /* dot11WEPUndecryptableCount */ + + /* WPA2 counters (see rxundec for DecryptFailureCount) */ + uint32 tkipmicfaill_mcst; /* TKIPLocalMICFailures */ + uint32 tkipcntrmsr_mcst; /* TKIPCounterMeasuresInvoked */ + uint32 tkipreplay_mcst; /* TKIPReplays */ + uint32 ccmpfmterr_mcst; /* CCMPFormatErrors */ + uint32 ccmpreplay_mcst; /* CCMPReplays */ + uint32 ccmpundec_mcst; /* CCMPDecryptErrors */ + uint32 fourwayfail_mcst; /* FourWayHandshakeFailures */ + uint32 wepundec_mcst; /* dot11WEPUndecryptableCount */ + uint32 wepicverr_mcst; /* dot11WEPICVErrorCount */ + uint32 decsuccess_mcst; /* DecryptSuccessCount */ + uint32 tkipicverr_mcst; /* TKIPICVErrorCount */ + uint32 wepexcluded_mcst; /* dot11WEPExcludedCount */ + + uint32 txchanrej; /* Tx frames suppressed due to channel rejection */ + uint32 txexptime; /* Tx frames suppressed due to timer expiration */ + uint32 psmwds; /* Count PSM watchdogs */ + uint32 phywatchdog; /* Count Phy watchdogs (triggered by ucode) */ + + /* MBSS counters, AP only */ + uint32 prq_entries_handled; /* PRQ entries read in */ + uint32 prq_undirected_entries; /* which were bcast bss & ssid */ + uint32 prq_bad_entries; /* which could not be translated to info */ + uint32 atim_suppress_count; /* TX suppressions on ATIM fifo */ + uint32 bcn_template_not_ready; /* Template marked in use on send bcn ... */ + uint32 bcn_template_not_ready_done; /* ...but "DMA done" interrupt rcvd */ + uint32 late_tbtt_dpc; /* TBTT DPC did not happen in time */ + + /* per-rate receive stat counters */ + uint32 rx1mbps; /* packets rx at 1Mbps */ + uint32 rx2mbps; /* packets rx at 2Mbps */ + uint32 rx5mbps5; /* packets rx at 5.5Mbps */ + uint32 rx6mbps; /* packets rx at 6Mbps */ + uint32 rx9mbps; /* packets rx at 9Mbps */ + uint32 rx11mbps; /* packets rx at 11Mbps */ + uint32 rx12mbps; /* packets rx at 12Mbps */ + uint32 rx18mbps; /* packets rx at 18Mbps */ + uint32 rx24mbps; /* packets rx at 24Mbps */ + uint32 rx36mbps; /* packets rx at 36Mbps */ + uint32 rx48mbps; /* packets rx at 48Mbps */ + uint32 rx54mbps; /* packets rx at 54Mbps */ + uint32 rx108mbps; /* packets rx at 108mbps */ + uint32 rx162mbps; /* packets rx at 162mbps */ + uint32 rx216mbps; /* packets rx at 216 mbps */ + uint32 rx270mbps; /* packets rx at 270 mbps */ + uint32 rx324mbps; /* packets rx at 324 mbps */ + uint32 rx378mbps; /* packets rx at 378 mbps */ + uint32 rx432mbps; /* packets rx at 432 mbps */ + uint32 rx486mbps; /* packets rx at 486 mbps */ + uint32 rx540mbps; /* packets rx at 540 mbps */ + + /* pkteng rx frame stats */ + uint32 pktengrxducast; /* unicast frames rxed by the pkteng code */ + uint32 pktengrxdmcast; /* multicast frames rxed by the pkteng code */ + + uint32 rfdisable; /* count of radio disables */ + uint32 bphy_rxcrsglitch; /* PHY count of bphy glitches */ + uint32 bphy_badplcp; + + uint32 txmpdu_sgi; /* count for sgi transmit */ + uint32 rxmpdu_sgi; /* count for sgi received */ + uint32 txmpdu_stbc; /* count for stbc transmit */ + uint32 rxmpdu_stbc; /* count for stbc received */ + + uint32 rxdrop20s; /* drop secondary cnt */ + +} wl_cnt_ver_six_t; + +typedef struct { + uint16 version; /* see definition of WL_CNT_T_VERSION */ + uint16 length; /* length of entire structure */ + + /* transmit stat counters */ + uint32 txframe; /* tx data frames */ + uint32 txbyte; /* tx data bytes */ + uint32 txretrans; /* tx mac retransmits */ + uint32 txerror; /* tx data errors (derived: sum of others) */ + uint32 txctl; /* tx management frames */ + uint32 txprshort; /* tx short preamble frames */ + uint32 txserr; /* tx status errors */ + uint32 txnobuf; /* tx out of buffers errors */ + uint32 txnoassoc; /* tx discard because we're not associated */ + uint32 txrunt; /* tx runt frames */ + uint32 txchit; /* tx header cache hit (fastpath) */ + uint32 txcmiss; /* tx header cache miss (slowpath) */ + + /* transmit chip error counters */ + uint32 txuflo; /* tx fifo underflows */ + uint32 txphyerr; /* tx phy errors (indicated in tx status) */ + uint32 txphycrs; + + /* receive stat counters */ + uint32 rxframe; /* rx data frames */ + uint32 rxbyte; /* rx data bytes */ + uint32 rxerror; /* rx data errors (derived: sum of others) */ + uint32 rxctl; /* rx management frames */ + uint32 rxnobuf; /* rx out of buffers errors */ + uint32 rxnondata; /* rx non data frames in the data channel errors */ + uint32 rxbadds; /* rx bad DS errors */ + uint32 rxbadcm; /* rx bad control or management frames */ + uint32 rxfragerr; /* rx fragmentation errors */ + uint32 rxrunt; /* rx runt frames */ + uint32 rxgiant; /* rx giant frames */ + uint32 rxnoscb; /* rx no scb error */ + uint32 rxbadproto; /* rx invalid frames */ + uint32 rxbadsrcmac; /* rx frames with Invalid Src Mac */ + uint32 rxbadda; /* rx frames tossed for invalid da */ + uint32 rxfilter; /* rx frames filtered out */ + + /* receive chip error counters */ + uint32 rxoflo; /* rx fifo overflow errors */ + uint32 rxuflo[NFIFO]; /* rx dma descriptor underflow errors */ + + uint32 d11cnt_txrts_off; /* d11cnt txrts value when reset d11cnt */ + uint32 d11cnt_rxcrc_off; /* d11cnt rxcrc value when reset d11cnt */ + uint32 d11cnt_txnocts_off; /* d11cnt txnocts value when reset d11cnt */ + + /* misc counters */ + uint32 dmade; /* tx/rx dma descriptor errors */ + uint32 dmada; /* tx/rx dma data errors */ + uint32 dmape; /* tx/rx dma descriptor protocol errors */ + uint32 reset; /* reset count */ + uint32 tbtt; /* cnts the TBTT int's */ + uint32 txdmawar; + uint32 pkt_callback_reg_fail; /* callbacks register failure */ + + /* MAC counters: 32-bit version of d11.h's macstat_t */ + uint32 txallfrm; /* total number of frames sent, incl. Data, ACK, RTS, CTS, + * Control Management (includes retransmissions) + */ + uint32 txrtsfrm; /* number of RTS sent out by the MAC */ + uint32 txctsfrm; /* number of CTS sent out by the MAC */ + uint32 txackfrm; /* number of ACK frames sent out */ + uint32 txdnlfrm; /* Not used */ + uint32 txbcnfrm; /* beacons transmitted */ + uint32 txfunfl[8]; /* per-fifo tx underflows */ + uint32 txtplunfl; /* Template underflows (mac was too slow to transmit ACK/CTS + * or BCN) + */ + uint32 txphyerror; /* Transmit phy error, type of error is reported in tx-status for + * driver enqueued frames + */ + uint32 rxfrmtoolong; /* Received frame longer than legal limit (2346 bytes) */ + uint32 rxfrmtooshrt; /* Received frame did not contain enough bytes for its frame type */ + uint32 rxinvmachdr; /* Either the protocol version != 0 or frame type not + * data/control/management + */ + uint32 rxbadfcs; /* number of frames for which the CRC check failed in the MAC */ + uint32 rxbadplcp; /* parity check of the PLCP header failed */ + uint32 rxcrsglitch; /* PHY was able to correlate the preamble but not the header */ + uint32 rxstrt; /* Number of received frames with a good PLCP + * (i.e. passing parity check) + */ + uint32 rxdfrmucastmbss; /* Number of received DATA frames with good FCS and matching RA */ + uint32 rxmfrmucastmbss; /* number of received mgmt frames with good FCS and matching RA */ + uint32 rxcfrmucast; /* number of received CNTRL frames with good FCS and matching RA */ + uint32 rxrtsucast; /* number of unicast RTS addressed to the MAC (good FCS) */ + uint32 rxctsucast; /* number of unicast CTS addressed to the MAC (good FCS) */ + uint32 rxackucast; /* number of ucast ACKS received (good FCS) */ + uint32 rxdfrmocast; /* number of received DATA frames (good FCS and not matching RA) */ + uint32 rxmfrmocast; /* number of received MGMT frames (good FCS and not matching RA) */ + uint32 rxcfrmocast; /* number of received CNTRL frame (good FCS and not matching RA) */ + uint32 rxrtsocast; /* number of received RTS not addressed to the MAC */ + uint32 rxctsocast; /* number of received CTS not addressed to the MAC */ + uint32 rxdfrmmcast; /* number of RX Data multicast frames received by the MAC */ + uint32 rxmfrmmcast; /* number of RX Management multicast frames received by the MAC */ + uint32 rxcfrmmcast; /* number of RX Control multicast frames received by the MAC + * (unlikely to see these) + */ + uint32 rxbeaconmbss; /* beacons received from member of BSS */ + uint32 rxdfrmucastobss; /* number of unicast frames addressed to the MAC from + * other BSS (WDS FRAME) + */ + uint32 rxbeaconobss; /* beacons received from other BSS */ + uint32 rxrsptmout; /* Number of response timeouts for transmitted frames + * expecting a response + */ + uint32 bcntxcancl; /* transmit beacons canceled due to receipt of beacon (IBSS) */ + uint32 rxf0ovfl; /* Number of receive fifo 0 overflows */ + uint32 rxf1ovfl; /* Number of receive fifo 1 overflows (obsolete) */ + uint32 rxf2ovfl; /* Number of receive fifo 2 overflows (obsolete) */ + uint32 txsfovfl; /* Number of transmit status fifo overflows (obsolete) */ + uint32 pmqovfl; /* Number of PMQ overflows */ + uint32 rxcgprqfrm; /* Number of received Probe requests that made it into + * the PRQ fifo + */ + uint32 rxcgprsqovfl; /* Rx Probe Request Que overflow in the AP */ + uint32 txcgprsfail; /* Tx Probe Response Fail. AP sent probe response but did + * not get ACK + */ + uint32 txcgprssuc; /* Tx Probe Response Success (ACK was received) */ + uint32 prs_timeout; /* Number of probe requests that were dropped from the PRQ + * fifo because a probe response could not be sent out within + * the time limit defined in M_PRS_MAXTIME + */ + uint32 rxnack; + uint32 frmscons; + uint32 txnack; + uint32 txglitch_nack; /* obsolete */ + uint32 txburst; /* obsolete */ + + /* 802.11 MIB counters, pp. 614 of 802.11 reaff doc. */ + uint32 txfrag; /* dot11TransmittedFragmentCount */ + uint32 txmulti; /* dot11MulticastTransmittedFrameCount */ + uint32 txfail; /* dot11FailedCount */ + uint32 txretry; /* dot11RetryCount */ + uint32 txretrie; /* dot11MultipleRetryCount */ + uint32 rxdup; /* dot11FrameduplicateCount */ + uint32 txrts; /* dot11RTSSuccessCount */ + uint32 txnocts; /* dot11RTSFailureCount */ + uint32 txnoack; /* dot11ACKFailureCount */ + uint32 rxfrag; /* dot11ReceivedFragmentCount */ + uint32 rxmulti; /* dot11MulticastReceivedFrameCount */ + uint32 rxcrc; /* dot11FCSErrorCount */ + uint32 txfrmsnt; /* dot11TransmittedFrameCount (bogus MIB?) */ + uint32 rxundec; /* dot11WEPUndecryptableCount */ + + /* WPA2 counters (see rxundec for DecryptFailureCount) */ + uint32 tkipmicfaill; /* TKIPLocalMICFailures */ + uint32 tkipcntrmsr; /* TKIPCounterMeasuresInvoked */ + uint32 tkipreplay; /* TKIPReplays */ + uint32 ccmpfmterr; /* CCMPFormatErrors */ + uint32 ccmpreplay; /* CCMPReplays */ + uint32 ccmpundec; /* CCMPDecryptErrors */ + uint32 fourwayfail; /* FourWayHandshakeFailures */ + uint32 wepundec; /* dot11WEPUndecryptableCount */ + uint32 wepicverr; /* dot11WEPICVErrorCount */ + uint32 decsuccess; /* DecryptSuccessCount */ + uint32 tkipicverr; /* TKIPICVErrorCount */ + uint32 wepexcluded; /* dot11WEPExcludedCount */ + + uint32 txchanrej; /* Tx frames suppressed due to channel rejection */ + uint32 psmwds; /* Count PSM watchdogs */ + uint32 phywatchdog; /* Count Phy watchdogs (triggered by ucode) */ + + /* MBSS counters, AP only */ + uint32 prq_entries_handled; /* PRQ entries read in */ + uint32 prq_undirected_entries; /* which were bcast bss & ssid */ + uint32 prq_bad_entries; /* which could not be translated to info */ + uint32 atim_suppress_count; /* TX suppressions on ATIM fifo */ + uint32 bcn_template_not_ready; /* Template marked in use on send bcn ... */ + uint32 bcn_template_not_ready_done; /* ...but "DMA done" interrupt rcvd */ + uint32 late_tbtt_dpc; /* TBTT DPC did not happen in time */ + + /* per-rate receive stat counters */ + uint32 rx1mbps; /* packets rx at 1Mbps */ + uint32 rx2mbps; /* packets rx at 2Mbps */ + uint32 rx5mbps5; /* packets rx at 5.5Mbps */ + uint32 rx6mbps; /* packets rx at 6Mbps */ + uint32 rx9mbps; /* packets rx at 9Mbps */ + uint32 rx11mbps; /* packets rx at 11Mbps */ + uint32 rx12mbps; /* packets rx at 12Mbps */ + uint32 rx18mbps; /* packets rx at 18Mbps */ + uint32 rx24mbps; /* packets rx at 24Mbps */ + uint32 rx36mbps; /* packets rx at 36Mbps */ + uint32 rx48mbps; /* packets rx at 48Mbps */ + uint32 rx54mbps; /* packets rx at 54Mbps */ + uint32 rx108mbps; /* packets rx at 108mbps */ + uint32 rx162mbps; /* packets rx at 162mbps */ + uint32 rx216mbps; /* packets rx at 216 mbps */ + uint32 rx270mbps; /* packets rx at 270 mbps */ + uint32 rx324mbps; /* packets rx at 324 mbps */ + uint32 rx378mbps; /* packets rx at 378 mbps */ + uint32 rx432mbps; /* packets rx at 432 mbps */ + uint32 rx486mbps; /* packets rx at 486 mbps */ + uint32 rx540mbps; /* packets rx at 540 mbps */ + + /* pkteng rx frame stats */ + uint32 pktengrxducast; /* unicast frames rxed by the pkteng code */ + uint32 pktengrxdmcast; /* multicast frames rxed by the pkteng code */ +} wl_cnt_ver_five_t; + +#define WL_DELTA_STATS_T_VERSION 2 /* current version of wl_delta_stats_t struct */ + +typedef struct { + uint16 version; /* see definition of WL_DELTA_STATS_T_VERSION */ + uint16 length; /* length of entire structure */ + + /* transmit stat counters */ + uint32 txframe; /* tx data frames */ + uint32 txbyte; /* tx data bytes */ + uint32 txretrans; /* tx mac retransmits */ + uint32 txfail; /* tx failures */ + + /* receive stat counters */ + uint32 rxframe; /* rx data frames */ + uint32 rxbyte; /* rx data bytes */ + + /* per-rate receive stat counters */ + uint32 rx1mbps; /* packets rx at 1Mbps */ + uint32 rx2mbps; /* packets rx at 2Mbps */ + uint32 rx5mbps5; /* packets rx at 5.5Mbps */ + uint32 rx6mbps; /* packets rx at 6Mbps */ + uint32 rx9mbps; /* packets rx at 9Mbps */ + uint32 rx11mbps; /* packets rx at 11Mbps */ + uint32 rx12mbps; /* packets rx at 12Mbps */ + uint32 rx18mbps; /* packets rx at 18Mbps */ + uint32 rx24mbps; /* packets rx at 24Mbps */ + uint32 rx36mbps; /* packets rx at 36Mbps */ + uint32 rx48mbps; /* packets rx at 48Mbps */ + uint32 rx54mbps; /* packets rx at 54Mbps */ + uint32 rx108mbps; /* packets rx at 108mbps */ + uint32 rx162mbps; /* packets rx at 162mbps */ + uint32 rx216mbps; /* packets rx at 216 mbps */ + uint32 rx270mbps; /* packets rx at 270 mbps */ + uint32 rx324mbps; /* packets rx at 324 mbps */ + uint32 rx378mbps; /* packets rx at 378 mbps */ + uint32 rx432mbps; /* packets rx at 432 mbps */ + uint32 rx486mbps; /* packets rx at 486 mbps */ + uint32 rx540mbps; /* packets rx at 540 mbps */ + + /* phy stats */ + uint32 rxbadplcp; + uint32 rxcrsglitch; + uint32 bphy_rxcrsglitch; + uint32 bphy_badplcp; + +} wl_delta_stats_t; +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +#define WL_WME_CNT_VERSION 1 /* current version of wl_wme_cnt_t */ + +typedef struct { + uint32 packets; + uint32 bytes; +} wl_traffic_stats_t; + +typedef struct { + uint16 version; /* see definition of WL_WME_CNT_VERSION */ + uint16 length; /* length of entire structure */ + + wl_traffic_stats_t tx[AC_COUNT]; /* Packets transmitted */ + wl_traffic_stats_t tx_failed[AC_COUNT]; /* Packets dropped or failed to transmit */ + wl_traffic_stats_t rx[AC_COUNT]; /* Packets received */ + wl_traffic_stats_t rx_failed[AC_COUNT]; /* Packets failed to receive */ + + wl_traffic_stats_t forward[AC_COUNT]; /* Packets forwarded by AP */ + + wl_traffic_stats_t tx_expired[AC_COUNT]; /* packets dropped due to lifetime expiry */ + +} wl_wme_cnt_t; + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +struct wl_msglevel2 { + uint32 low; + uint32 high; +}; + +typedef struct wl_mkeep_alive_pkt { + uint16 version; /* Version for mkeep_alive */ + uint16 length; /* length of fixed parameters in the structure */ + uint32 period_msec; + uint16 len_bytes; + uint8 keep_alive_id; /* 0 - 3 for N = 4 */ + uint8 data[1]; +} wl_mkeep_alive_pkt_t; + +#define WL_MKEEP_ALIVE_VERSION 1 +#define WL_MKEEP_ALIVE_FIXED_LEN OFFSETOF(wl_mkeep_alive_pkt_t, data) +/* XXX: 1/2 second precision since idle time is a seconds counter anyway */ +#define WL_MKEEP_ALIVE_PRECISION 500 + +/* TCP Keep-Alive conn struct */ +typedef struct wl_mtcpkeep_alive_conn_pkt { + struct ether_addr saddr; /* src mac address */ + struct ether_addr daddr; /* dst mac address */ + struct ipv4_addr sipaddr; /* source IP addr */ + struct ipv4_addr dipaddr; /* dest IP addr */ + uint16 sport; /* src port */ + uint16 dport; /* dest port */ + uint32 seq; /* seq number */ + uint32 ack; /* ACK number */ + uint16 tcpwin; /* TCP window */ +} wl_mtcpkeep_alive_conn_pkt_t; + +/* TCP Keep-Alive interval struct */ +typedef struct wl_mtcpkeep_alive_timers_pkt { + uint16 interval; /* interval timer */ + uint16 retry_interval; /* retry_interval timer */ + uint16 retry_count; /* retry_count */ +} wl_mtcpkeep_alive_timers_pkt_t; + +#ifndef ETHER_MAX_DATA +#define ETHER_MAX_DATA 1500 +#endif /* ETHER_MAX_DATA */ + +typedef struct wake_info { + uint32 wake_reason; + uint32 wake_info_len; /* size of packet */ + uchar packet[1]; +} wake_info_t; + +typedef struct wake_pkt { + uint32 wake_pkt_len; /* size of packet */ + uchar packet[1]; +} wake_pkt_t; + + +#define WL_MTCPKEEP_ALIVE_VERSION 1 + +#ifdef WLBA + +#define WLC_BA_CNT_VERSION 1 /* current version of wlc_ba_cnt_t */ + +/* block ack related stats */ +typedef struct wlc_ba_cnt { + uint16 version; /* WLC_BA_CNT_VERSION */ + uint16 length; /* length of entire structure */ + + /* transmit stat counters */ + uint32 txpdu; /* pdus sent */ + uint32 txsdu; /* sdus sent */ + uint32 txfc; /* tx side flow controlled packets */ + uint32 txfci; /* tx side flow control initiated */ + uint32 txretrans; /* retransmitted pdus */ + uint32 txbatimer; /* ba resend due to timer */ + uint32 txdrop; /* dropped packets */ + uint32 txaddbareq; /* addba req sent */ + uint32 txaddbaresp; /* addba resp sent */ + uint32 txdelba; /* delba sent */ + uint32 txba; /* ba sent */ + uint32 txbar; /* bar sent */ + uint32 txpad[4]; /* future */ + + /* receive side counters */ + uint32 rxpdu; /* pdus recd */ + uint32 rxqed; /* pdus buffered before sending up */ + uint32 rxdup; /* duplicate pdus */ + uint32 rxnobuf; /* pdus discarded due to no buf */ + uint32 rxaddbareq; /* addba req recd */ + uint32 rxaddbaresp; /* addba resp recd */ + uint32 rxdelba; /* delba recd */ + uint32 rxba; /* ba recd */ + uint32 rxbar; /* bar recd */ + uint32 rxinvba; /* invalid ba recd */ + uint32 rxbaholes; /* ba recd with holes */ + uint32 rxunexp; /* unexpected packets */ + uint32 rxpad[4]; /* future */ +} wlc_ba_cnt_t; +#endif /* WLBA */ + +/* structure for per-tid ampdu control */ +struct ampdu_tid_control { + uint8 tid; /* tid */ + uint8 enable; /* enable/disable */ +}; + +/* structure for identifying ea/tid for sending addba/delba */ +struct ampdu_ea_tid { + struct ether_addr ea; /* Station address */ + uint8 tid; /* tid */ +}; +/* structure for identifying retry/tid for retry_limit_tid/rr_retry_limit_tid */ +struct ampdu_retry_tid { + uint8 tid; /* tid */ + uint8 retry; /* retry value */ +}; + +/* Different discovery modes for dpt */ +#define DPT_DISCOVERY_MANUAL 0x01 /* manual discovery mode */ +#define DPT_DISCOVERY_AUTO 0x02 /* auto discovery mode */ +#define DPT_DISCOVERY_SCAN 0x04 /* scan-based discovery mode */ + +/* different path selection values */ +#define DPT_PATHSEL_AUTO 0 /* auto mode for path selection */ +#define DPT_PATHSEL_DIRECT 1 /* always use direct DPT path */ +#define DPT_PATHSEL_APPATH 2 /* always use AP path */ + +/* different ops for deny list */ +#define DPT_DENY_LIST_ADD 1 /* add to dpt deny list */ +#define DPT_DENY_LIST_REMOVE 2 /* remove from dpt deny list */ + +/* different ops for manual end point */ +#define DPT_MANUAL_EP_CREATE 1 /* create manual dpt endpoint */ +#define DPT_MANUAL_EP_MODIFY 2 /* modify manual dpt endpoint */ +#define DPT_MANUAL_EP_DELETE 3 /* delete manual dpt endpoint */ + +/* structure for dpt iovars */ +typedef struct dpt_iovar { + struct ether_addr ea; /* Station address */ + uint8 mode; /* mode: depends on iovar */ + uint32 pad; /* future */ +} dpt_iovar_t; + +/* flags to indicate DPT status */ +#define DPT_STATUS_ACTIVE 0x01 /* link active (though may be suspended) */ +#define DPT_STATUS_AES 0x02 /* link secured through AES encryption */ +#define DPT_STATUS_FAILED 0x04 /* DPT link failed */ + +#define DPT_FNAME_LEN 48 /* Max length of friendly name */ + +typedef struct dpt_status { + uint8 status; /* flags to indicate status */ + uint8 fnlen; /* length of friendly name */ + uchar name[DPT_FNAME_LEN]; /* friendly name */ + uint32 rssi; /* RSSI of the link */ + sta_info_t sta; /* sta info */ +} dpt_status_t; + +/* structure for dpt list */ +typedef struct dpt_list { + uint32 num; /* number of entries in struct */ + dpt_status_t status[1]; /* per station info */ +} dpt_list_t; + +/* structure for dpt friendly name */ +typedef struct dpt_fname { + uint8 len; /* length of friendly name */ + uchar name[DPT_FNAME_LEN]; /* friendly name */ +} dpt_fname_t; + +#define BDD_FNAME_LEN 32 /* Max length of friendly name */ +typedef struct bdd_fname { + uint8 len; /* length of friendly name */ + uchar name[BDD_FNAME_LEN]; /* friendly name */ +} bdd_fname_t; + +/* structure for addts arguments */ +/* For ioctls that take a list of TSPEC */ +struct tslist { + int count; /* number of tspecs */ + struct tsinfo_arg tsinfo[1]; /* variable length array of tsinfo */ +}; + +#ifdef WLTDLS +/* different ops for manual end point */ +#define TDLS_MANUAL_EP_CREATE 1 /* create manual dpt endpoint */ +#define TDLS_MANUAL_EP_MODIFY 2 /* modify manual dpt endpoint */ +#define TDLS_MANUAL_EP_DELETE 3 /* delete manual dpt endpoint */ +#define TDLS_MANUAL_EP_PM 4 /* put dpt endpoint in PM mode */ +#define TDLS_MANUAL_EP_WAKE 5 /* wake up dpt endpoint from PM */ +#define TDLS_MANUAL_EP_DISCOVERY 6 /* discover if endpoint is TDLS capable */ +#define TDLS_MANUAL_EP_CHSW 7 /* channel switch */ +#define TDLS_MANUAL_EP_WFD_TPQ 8 /* WiFi-Display Tunneled Probe reQuest */ + +/* structure for tdls iovars */ +typedef struct tdls_iovar { + struct ether_addr ea; /* Station address */ + uint8 mode; /* mode: depends on iovar */ + chanspec_t chanspec; + uint32 pad; /* future */ +} tdls_iovar_t; + +/* modes */ +#define TDLS_WFD_IE_TX 0 +#define TDLS_WFD_IE_RX 1 +#define TDLS_WFD_PROBE_IE_TX 2 +#define TDLS_WFD_PROBE_IE_RX 3 +#define TDLS_WFD_IE_SIZE 512 +/* structure for tdls wfd ie */ +typedef struct tdls_wfd_ie_iovar { + struct ether_addr ea; /* Station address */ + uint8 mode; + uint16 length; + uint8 data[TDLS_WFD_IE_SIZE]; +} tdls_wfd_ie_iovar_t; +#endif /* WLTDLS */ + +/* structure for addts/delts arguments */ +typedef struct tspec_arg { + uint16 version; /* see definition of TSPEC_ARG_VERSION */ + uint16 length; /* length of entire structure */ + uint flag; /* bit field */ + /* TSPEC Arguments */ + struct tsinfo_arg tsinfo; /* TS Info bit field */ + uint16 nom_msdu_size; /* (Nominal or fixed) MSDU Size (bytes) */ + uint16 max_msdu_size; /* Maximum MSDU Size (bytes) */ + uint min_srv_interval; /* Minimum Service Interval (us) */ + uint max_srv_interval; /* Maximum Service Interval (us) */ + uint inactivity_interval; /* Inactivity Interval (us) */ + uint suspension_interval; /* Suspension Interval (us) */ + uint srv_start_time; /* Service Start Time (us) */ + uint min_data_rate; /* Minimum Data Rate (bps) */ + uint mean_data_rate; /* Mean Data Rate (bps) */ + uint peak_data_rate; /* Peak Data Rate (bps) */ + uint max_burst_size; /* Maximum Burst Size (bytes) */ + uint delay_bound; /* Delay Bound (us) */ + uint min_phy_rate; /* Minimum PHY Rate (bps) */ + uint16 surplus_bw; /* Surplus Bandwidth Allowance (range 1.0 to 8.0) */ + uint16 medium_time; /* Medium Time (32 us/s periods) */ + uint8 dialog_token; /* dialog token */ +} tspec_arg_t; + +/* tspec arg for desired station */ +typedef struct tspec_per_sta_arg { + struct ether_addr ea; + struct tspec_arg ts; +} tspec_per_sta_arg_t; + +/* structure for max bandwidth for each access category */ +typedef struct wme_max_bandwidth { + uint32 ac[AC_COUNT]; /* max bandwidth for each access category */ +} wme_max_bandwidth_t; + +#define WL_WME_MBW_PARAMS_IO_BYTES (sizeof(wme_max_bandwidth_t)) + +/* current version of wl_tspec_arg_t struct */ +#define TSPEC_ARG_VERSION 2 /* current version of wl_tspec_arg_t struct */ +#define TSPEC_ARG_LENGTH 55 /* argument length from tsinfo to medium_time */ +#define TSPEC_DEFAULT_DIALOG_TOKEN 42 /* default dialog token */ +#define TSPEC_DEFAULT_SBW_FACTOR 0x3000 /* default surplus bw */ + + +#define WL_WOWL_KEEPALIVE_MAX_PACKET_SIZE 80 +#define WLC_WOWL_MAX_KEEPALIVE 2 + +/* define for flag */ +#define TSPEC_PENDING 0 /* TSPEC pending */ +#define TSPEC_ACCEPTED 1 /* TSPEC accepted */ +#define TSPEC_REJECTED 2 /* TSPEC rejected */ +#define TSPEC_UNKNOWN 3 /* TSPEC unknown */ +#define TSPEC_STATUS_MASK 7 /* TSPEC status mask */ + +#ifdef BCMCCX +/* "wlan_reason" iovar interface */ +#define WL_WLAN_ASSOC_REASON_NORMAL_NETWORK 0 /* normal WLAN network setup */ +#define WL_WLAN_ASSOC_REASON_ROAM_FROM_CELLULAR_NETWORK 1 /* roam from Cellular network */ +#define WL_WLAN_ASSOC_REASON_ROAM_FROM_LAN 2 /* roam from LAN */ +#define WL_WLAN_ASSOC_REASON_MAX 2 /* largest value allowed */ +#endif /* BCMCCX */ + +/* Software feature flag defines used by wlfeatureflag */ +#ifdef WLAFTERBURNER +#define WL_SWFL_ABBFL 0x0001 /* Allow Afterburner on systems w/o hardware BFL */ +#define WL_SWFL_ABENCORE 0x0002 /* Allow AB on non-4318E chips */ +#endif /* WLAFTERBURNER */ +#define WL_SWFL_NOHWRADIO 0x0004 /* XXX Disable HW Radio monitor (e.g., Apple) */ +#define WL_SWFL_FLOWCONTROL 0x0008 /* Enable backpressure to OS stack */ +#define WL_SWFL_WLBSSSORT 0x0010 /* Per-port supports sorting of BSS */ + +#define WL_LIFETIME_MAX 0xFFFF /* Max value in ms */ + +/* Packet lifetime configuration per ac */ +typedef struct wl_lifetime { + uint32 ac; /* access class */ + uint32 lifetime; /* Packet lifetime value in ms */ +} wl_lifetime_t; + +#define CSA_BROADCAST_ACTION_FRAME 0 /* csa broadcast action frame */ +#define CSA_UNICAST_ACTION_FRAME 1 /* csa unicast action frame */ + +/* Channel Switch Announcement param */ +typedef struct wl_chan_switch { + uint8 mode; /* value 0 or 1 */ + uint8 count; /* count # of beacons before switching */ + chanspec_t chspec; /* chanspec */ + uint8 reg; /* regulatory class */ + uint8 frame_type; /* csa frame type, unicast or broadcast */ +} wl_chan_switch_t; + +/* Roaming trigger definitions for WLC_SET_ROAM_TRIGGER. + * + * (-100 < value < 0) value is used directly as a roaming trigger in dBm + * (0 <= value) value specifies a logical roaming trigger level from + * the list below + * + * WLC_GET_ROAM_TRIGGER always returns roaming trigger value in dBm, never + * the logical roam trigger value. + */ +#define WLC_ROAM_TRIGGER_DEFAULT 0 /* default roaming trigger */ +#define WLC_ROAM_TRIGGER_BANDWIDTH 1 /* optimize for bandwidth roaming trigger */ +#define WLC_ROAM_TRIGGER_DISTANCE 2 /* optimize for distance roaming trigger */ +#define WLC_ROAM_TRIGGER_AUTO 3 /* auto-detect environment */ +#define WLC_ROAM_TRIGGER_MAX_VALUE 3 /* max. valid value */ + +#define WLC_ROAM_NEVER_ROAM_TRIGGER (-100) /* Avoid Roaming by setting a large value */ + +/* Preferred Network Offload (PNO, formerly PFN) defines */ +#define WPA_AUTH_PFN_ANY 0xffffffff /* for PFN, match only ssid */ + +enum { + PFN_LIST_ORDER, + PFN_RSSI +}; + +enum { + DISABLE, + ENABLE +}; + +enum { + OFF_ADAPT, + SMART_ADAPT, + STRICT_ADAPT, + SLOW_ADAPT +}; + +#define SORT_CRITERIA_BIT 0 +#define AUTO_NET_SWITCH_BIT 1 +#define ENABLE_BKGRD_SCAN_BIT 2 +#define IMMEDIATE_SCAN_BIT 3 +#define AUTO_CONNECT_BIT 4 +#define ENABLE_BD_SCAN_BIT 5 +#define ENABLE_ADAPTSCAN_BIT 6 +#define IMMEDIATE_EVENT_BIT 8 +#define SUPPRESS_SSID_BIT 9 +#define ENABLE_NET_OFFLOAD_BIT 10 +/* report found/lost events for SSID and BSSID networks seperately */ +#define REPORT_SEPERATELY_BIT 11 + +#define SORT_CRITERIA_MASK 0x0001 +#define AUTO_NET_SWITCH_MASK 0x0002 +#define ENABLE_BKGRD_SCAN_MASK 0x0004 +#define IMMEDIATE_SCAN_MASK 0x0008 +#define AUTO_CONNECT_MASK 0x0010 + +#define ENABLE_BD_SCAN_MASK 0x0020 +#define ENABLE_ADAPTSCAN_MASK 0x00c0 +#define IMMEDIATE_EVENT_MASK 0x0100 +#define SUPPRESS_SSID_MASK 0x0200 +#define ENABLE_NET_OFFLOAD_MASK 0x0400 +/* report found/lost events for SSID and BSSID networks seperately */ +#define REPORT_SEPERATELY_MASK 0x0800 + +#define PFN_VERSION 2 +#define PFN_SCANRESULT_VERSION 1 +#define MAX_PFN_LIST_COUNT 16 + +#define PFN_COMPLETE 1 +#define PFN_INCOMPLETE 0 + +#define DEFAULT_BESTN 2 +#define DEFAULT_MSCAN 0 +#define DEFAULT_REPEAT 10 +#define DEFAULT_EXP 2 + +/* PFN network info structure */ +typedef struct wl_pfn_subnet_info { + struct ether_addr BSSID; + uint8 channel; /* channel number only */ + uint8 SSID_len; + uint8 SSID[32]; +} wl_pfn_subnet_info_t; + +typedef struct wl_pfn_net_info { + wl_pfn_subnet_info_t pfnsubnet; + int16 RSSI; /* receive signal strength (in dBm) */ + uint16 timestamp; /* age in seconds */ +} wl_pfn_net_info_t; + +typedef struct wl_pfn_scanresults { + uint32 version; + uint32 status; + uint32 count; + wl_pfn_net_info_t netinfo[1]; +} wl_pfn_scanresults_t; + +/* PFN data structure */ +typedef struct wl_pfn_param { + int32 version; /* PNO parameters version */ + int32 scan_freq; /* Scan frequency */ + int32 lost_network_timeout; /* Timeout in sec. to declare + * discovered network as lost + */ + int16 flags; /* Bit field to control features + * of PFN such as sort criteria auto + * enable switch and background scan + */ + int16 rssi_margin; /* Margin to avoid jitter for choosing a + * PFN based on RSSI sort criteria + */ + uint8 bestn; /* number of best networks in each scan */ + uint8 mscan; /* number of scans recorded */ + uint8 repeat; /* Minimum number of scan intervals + *before scan frequency changes in adaptive scan + */ + uint8 exp; /* Exponent of 2 for maximum scan interval */ +#if !defined(WLC_PATCH) || !defined(BCM43362A2) + int32 slow_freq; /* slow scan period */ +#endif /* !WLC_PATCH || !BCM43362A2 */ +} wl_pfn_param_t; + +typedef struct wl_pfn_bssid { + struct ether_addr macaddr; + /* Bit4: suppress_lost, Bit3: suppress_found */ + uint16 flags; +} wl_pfn_bssid_t; +#define WL_PFN_SUPPRESSFOUND_MASK 0x08 +#define WL_PFN_SUPPRESSLOST_MASK 0x10 +#define WL_PFN_RSSI_MASK 0xff00 +#define WL_PFN_RSSI_SHIFT 8 + +typedef struct wl_pfn_cfg { + uint32 reporttype; + int32 channel_num; + uint16 channel_list[WL_NUMCHANNELS]; + uint32 flags; +} wl_pfn_cfg_t; +#define WL_PFN_REPORT_ALLNET 0 +#define WL_PFN_REPORT_SSIDNET 1 +#define WL_PFN_REPORT_BSSIDNET 2 +#define WL_PFN_CFG_FLAGS_PROHIBITED 0x00000001 /* Accept and use prohibited channels */ +#define WL_PFN_CFG_FLAGS_RESERVED 0xfffffffe /* Remaining reserved for future use */ + +#define WL_PFN_HIDDEN_BIT 2 +#define PNO_SCAN_MAX_FW 508*1000 /* max time scan time in msec */ +#define PNO_SCAN_MAX_FW_SEC PNO_SCAN_MAX_FW/1000 /* max time scan time in SEC */ +#define PNO_SCAN_MIN_FW_SEC 10 /* min time scan time in SEC */ +#define WL_PFN_HIDDEN_MASK 0x4 +typedef struct wl_pfn { + wlc_ssid_t ssid; /* ssid name and its length */ + int32 flags; /* bit2: hidden */ + int32 infra; /* BSS Vs IBSS */ + int32 auth; /* Open Vs Closed */ + int32 wpa_auth; /* WPA type */ + int32 wsec; /* wsec value */ +} wl_pfn_t; + +typedef struct wl_pfn_list { + uint32 version; + uint32 enabled; + uint32 count; + wl_pfn_t pfn[1]; +} wl_pfn_list_t; + +typedef BWL_PRE_PACKED_STRUCT struct pfn_olmsg_params_t { + wlc_ssid_t ssid; + uint32 cipher_type; + uint32 auth_type; + uint8 channels[4]; +} BWL_POST_PACKED_STRUCT pfn_olmsg_params; + +#define WL_PFN_HIDDEN_BIT 2 +#define PNO_SCAN_MAX_FW 508*1000 /* max time scan time in msec */ +#define PNO_SCAN_MAX_FW_SEC PNO_SCAN_MAX_FW/1000 /* max time scan time in SEC */ +#define PNO_SCAN_MIN_FW_SEC 10 /* min time scan time in SEC */ +#define WL_PFN_HIDDEN_MASK 0x4 + +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +/* Service discovery */ +typedef struct { + uint8 transaction_id; /* Transaction id */ + uint8 protocol; /* Service protocol type */ + uint16 query_len; /* Length of query */ + uint16 response_len; /* Length of response */ + uint8 qrbuf[1]; +} wl_p2po_qr_t; + +typedef struct { + uint16 period; /* extended listen period */ + uint16 interval; /* extended listen interval */ +} wl_p2po_listen_t; + +/* ANQP offload */ + +#define ANQPO_MAX_QUERY_SIZE 256 +typedef struct { + uint16 max_retransmit; /* ~0 use default, max retransmit on no ACK from peer */ + uint16 response_timeout; /* ~0 use default, msec to wait for resp after tx packet */ + uint16 max_comeback_delay; /* ~0 use default, max comeback delay in resp else fail */ + uint16 max_retries; /* ~0 use default, max retries on failure */ + uint16 query_len; /* length of ANQP query */ + uint8 query_data[1]; /* ANQP encoded query (max ANQPO_MAX_QUERY_SIZE) */ +} wl_anqpo_set_t; + +typedef struct { + uint16 channel; /* channel of the peer */ + struct ether_addr addr; /* addr of the peer */ +} wl_anqpo_peer_t; + +#define ANQPO_MAX_PEER_LIST 64 +typedef struct { + uint16 count; /* number of peers in list */ + wl_anqpo_peer_t peer[1]; /* max ANQPO_MAX_PEER_LIST */ +} wl_anqpo_peer_list_t; + +#define ANQPO_MAX_IGNORE_SSID 64 +typedef struct { + bool is_clear; /* set to clear list (not used on GET) */ + uint16 count; /* number of SSID in list */ + wlc_ssid_t ssid[1]; /* max ANQPO_MAX_IGNORE_SSID */ +} wl_anqpo_ignore_ssid_list_t; + +#define ANQPO_MAX_IGNORE_BSSID 64 +typedef struct { + bool is_clear; /* set to clear list (not used on GET) */ + uint16 count; /* number of addr in list */ + struct ether_addr bssid[1]; /* max ANQPO_MAX_IGNORE_BSSID */ +} wl_anqpo_ignore_bssid_list_t; + +/* TCP Checksum Offload defines */ +#define TOE_TX_CSUM_OL 0x00000001 +#define TOE_RX_CSUM_OL 0x00000002 + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +/* TCP Checksum Offload error injection for testing */ +#define TOE_ERRTEST_TX_CSUM 0x00000001 +#define TOE_ERRTEST_RX_CSUM 0x00000002 +#define TOE_ERRTEST_RX_CSUM2 0x00000004 + +struct toe_ol_stats_t { + /* Num of tx packets that don't need to be checksummed */ + uint32 tx_summed; + + /* Num of tx packets where checksum is filled by offload engine */ + uint32 tx_iph_fill; + uint32 tx_tcp_fill; + uint32 tx_udp_fill; + uint32 tx_icmp_fill; + + /* Num of rx packets where toe finds out if checksum is good or bad */ + uint32 rx_iph_good; + uint32 rx_iph_bad; + uint32 rx_tcp_good; + uint32 rx_tcp_bad; + uint32 rx_udp_good; + uint32 rx_udp_bad; + uint32 rx_icmp_good; + uint32 rx_icmp_bad; + + /* Num of tx packets in which csum error is injected */ + uint32 tx_tcp_errinj; + uint32 tx_udp_errinj; + uint32 tx_icmp_errinj; + + /* Num of rx packets in which csum error is injected */ + uint32 rx_tcp_errinj; + uint32 rx_udp_errinj; + uint32 rx_icmp_errinj; +}; + +/* ARP Offload feature flags for arp_ol iovar */ +#define ARP_OL_AGENT 0x00000001 +#define ARP_OL_SNOOP 0x00000002 +#define ARP_OL_HOST_AUTO_REPLY 0x00000004 +#define ARP_OL_PEER_AUTO_REPLY 0x00000008 + +/* ARP Offload error injection */ +#define ARP_ERRTEST_REPLY_PEER 0x1 +#define ARP_ERRTEST_REPLY_HOST 0x2 + +#define ARP_MULTIHOMING_MAX 8 /* Maximum local host IP addresses */ +#define ND_MULTIHOMING_MAX 10 /* Maximum local host IP addresses */ + +/* Arp offload statistic counts */ +struct arp_ol_stats_t { + uint32 host_ip_entries; /* Host IP table addresses (more than one if multihomed) */ + uint32 host_ip_overflow; /* Host IP table additions skipped due to overflow */ + + uint32 arp_table_entries; /* ARP table entries */ + uint32 arp_table_overflow; /* ARP table additions skipped due to overflow */ + + uint32 host_request; /* ARP requests from host */ + uint32 host_reply; /* ARP replies from host */ + uint32 host_service; /* ARP requests from host serviced by ARP Agent */ + + uint32 peer_request; /* ARP requests received from network */ + uint32 peer_request_drop; /* ARP requests from network that were dropped */ + uint32 peer_reply; /* ARP replies received from network */ + uint32 peer_reply_drop; /* ARP replies from network that were dropped */ + uint32 peer_service; /* ARP request from host serviced by ARP Agent */ +}; + +/* NS offload statistic counts */ +struct nd_ol_stats_t { + uint32 host_ip_entries; /* Host IP table addresses (more than one if multihomed) */ + uint32 host_ip_overflow; /* Host IP table additions skipped due to overflow */ + uint32 peer_request; /* NS requests received from network */ + uint32 peer_request_drop; /* NS requests from network that were dropped */ + uint32 peer_reply_drop; /* NA replies from network that were dropped */ + uint32 peer_service; /* NS request from host serviced by firmware */ +}; + +/* + * Keep-alive packet offloading. + */ + +/* NAT keep-alive packets format: specifies the re-transmission period, the packet + * length, and packet contents. + */ +typedef struct wl_keep_alive_pkt { + uint32 period_msec; /* Retransmission period (0 to disable packet re-transmits) */ + uint16 len_bytes; /* Size of packet to transmit (0 for null packet) */ + uint8 data[1]; /* Variable length packet to transmit. Contents should include + * entire ethernet packet (enet header, IP header, UDP header, + * and UDP payload) in network byte order. + */ +} wl_keep_alive_pkt_t; + +#define WL_KEEP_ALIVE_FIXED_LEN OFFSETOF(wl_keep_alive_pkt_t, data) + +typedef struct awdl_config_params { + uint32 version; + uint8 awdl_chan; /* awdl channel */ + uint8 guard_time; /* Guard Time */ + uint16 aw_period; /* AW interval period */ + uint16 aw_cmn_length; /* Radio on Time AW */ + uint16 action_frame_period; /* awdl action frame period */ + uint16 awdl_pktlifetime; /* max packet life time in msec for awdl action frames */ + uint16 awdl_maxnomaster; /* max master missing time */ + uint16 awdl_extcount; /* Max extended period count for traffic */ + uint16 aw_ext_length; /* AW ext period */ + uint16 awdl_nmode; /* Operation mode of awdl interface; * 0 - Legacy mode + * 1 - 11n rate only * 2 - 11n + ampdu rx/tx + */ + struct ether_addr ea; /* destination bcast/mcast address to which action frame + * need to be sent + */ +} awdl_config_params_t; + +typedef struct wl_awdl_action_frame { + uint16 len_bytes; + uint8 awdl_action_frame_data[1]; +} wl_awdl_action_frame_t; + +#define WL_AWDL_ACTION_FRAME_FIXED_LEN OFFSETOF(wl_awdl_action_frame_t, awdl_sync_frame) + +typedef struct awdl_peer_node { + uint32 type_state; /* Master, slave , etc.. */ + uint16 aw_counter; /* avail window counter */ + int8 rssi; /* rssi last af was received at */ + int8 last_rssi; /* rssi in the last AF */ + uint16 tx_counter; + uint16 tx_delay; /* ts_hw - ts_fw */ + uint16 period_tu; + uint16 aw_period; + uint16 aw_cmn_length; + uint16 aw_ext_length; + uint32 self_metrics; /* Election Metric */ + uint32 top_master_metrics; /* Top Master Metric */ + struct ether_addr addr; + struct ether_addr top_master; + uint8 dist_top; /* Distance from Top */ +} awdl_peer_node_t; + +typedef struct awdl_peer_table { + uint16 version; + uint16 len; + uint8 peer_nodes[1]; +} awdl_peer_table_t; + +typedef struct awdl_af_hdr { + struct ether_addr dst_mac; + uint8 action_hdr[4]; /* Category + OUI[3] */ +} awdl_af_hdr_t; + +typedef struct awdl_oui { + uint8 oui[3]; /* default: 0x00 0x17 0xf2 */ + uint8 oui_type; /* AWDL: 0x08 */ +} awdl_oui_t; + +typedef BWL_PRE_PACKED_STRUCT struct awdl_hdr { + uint8 type; /* 0x08 AWDL */ + uint8 version; + uint8 sub_type; /* Sub type */ + uint8 rsvd; /* Reserved */ + uint32 phy_timestamp; /* PHY Tx time */ + uint32 fw_timestamp; /* Target Tx time */ +} BWL_POST_PACKED_STRUCT awdl_hdr_t; + +/* AWDL AF flags for awdl_oob_af iovar */ +#define AWDL_OOB_AF_FILL_TSF_PARAMS 0x00000001 +#define AWDL_OOB_AF_FILL_SYNC_PARAMS 0x00000002 +#define AWDL_OOB_AF_FILL_ELECT_PARAMS 0x00000004 +#define AWDL_OOB_AF_PARAMS_SIZE 38 + +typedef BWL_PRE_PACKED_STRUCT struct awdl_oob_af_params { + struct ether_addr bssid; + struct ether_addr dst_mac; + uint32 channel; + uint32 dwell_time; + uint32 flags; + uint32 pkt_lifetime; + uint32 tx_rate; + uint32 max_retries; /* for unicast frames only */ + uint16 payload_len; + uint8 payload[1]; /* complete AF payload */ +} BWL_POST_PACKED_STRUCT awdl_oob_af_params_t; + +typedef BWL_PRE_PACKED_STRUCT struct awdl_sync_params { + uint8 type; /* Type */ + uint16 param_len; /* sync param length */ + uint8 tx_chan; /* tx channel */ + uint16 tx_counter; /* tx down counter */ + uint8 master_chan; /* master home channel */ + uint8 guard_time; /* Gaurd Time */ + uint16 aw_period; /* AW period */ + uint16 action_frame_period; /* awdl action frame period */ + uint16 awdl_flags; /* AWDL Flags */ + uint16 aw_ext_length; /* AW extention len */ + uint16 aw_cmn_length; /* AW common len */ + uint16 aw_remaining; /* Remaining AW length */ + uint8 min_ext; /* Minimum Extention count */ + uint8 max_ext_multi; /* Max multicast Extention count */ + uint8 max_ext_uni; /* Max unicast Extention count */ + uint8 max_ext_af; /* Max af Extention count */ + struct ether_addr current_master; /* Current Master mac addr */ + uint8 presence_mode; /* Presence mode */ + uint8 reserved; + uint16 aw_counter; /* AW seq# */ + uint16 ap_bcn_alignment_delta; /* AP Beacon alignment delta */ +} BWL_POST_PACKED_STRUCT awdl_sync_params_t; + +typedef BWL_PRE_PACKED_STRUCT struct awdl_channel_sequence { + uint8 aw_seq_len; /* AW seq length */ + uint8 aw_seq_enc; /* AW seq encoding */ + uint8 aw_seq_duplicate_cnt; /* AW seq dupilcate count */ + uint8 seq_step_cnt; /* Seq spet count */ + uint16 seq_fill_chan; /* channel to fill in; 0xffff repeat current channel */ + uint8 chan_sequence[1]; /* Variable list of channel Sequence */ +} BWL_POST_PACKED_STRUCT awdl_channel_sequence_t; +#define WL_AWDL_CHAN_SEQ_FIXED_LEN OFFSETOF(awdl_channel_sequence_t, chan_sequence) + +typedef BWL_PRE_PACKED_STRUCT struct awdl_election_info { + uint8 election_flags; /* Election Flags */ + uint16 election_ID; /* Election ID */ + uint32 self_metrics; +} BWL_POST_PACKED_STRUCT awdl_election_info_t; + +/* XXX This is the super set of the one above. Will retire that one once this one is established */ +typedef BWL_PRE_PACKED_STRUCT struct awdl_election_tree_info { + uint8 election_flags; /* Election Flags */ + uint16 election_ID; /* Election ID */ + uint32 self_metrics; + int8 master_sync_rssi_thld; + int8 slave_sync_rssi_thld; + int8 edge_sync_rssi_thld; + int8 close_range_rssi_thld; + int8 mid_range_rssi_thld; + uint8 max_higher_masters_close_range; + uint8 max_higher_masters_mid_range; + uint8 max_tree_depth; + /* read only */ + struct ether_addr top_master; /* top Master mac addr */ + uint32 top_master_self_metric; + uint8 current_tree_depth; +} BWL_POST_PACKED_STRUCT awdl_election_tree_info_t; + +typedef BWL_PRE_PACKED_STRUCT struct awdl_election_params_tlv { + uint8 type; /* Type */ + uint16 param_len; /* Election param length */ + uint8 election_flags; /* Election Flags */ + uint16 election_ID; /* Election ID */ + uint8 dist_top; /* Distance from Top */ + uint8 rsvd; /* Reserved */ + struct ether_addr top_master; /* Top Master mac addr */ + uint32 top_master_metrics; + uint32 self_metrics; + uint8 pad[2]; /* Padding */ +} BWL_POST_PACKED_STRUCT awdl_election_params_tlv_t; + +typedef struct awdl_payload { + uint32 len; /* Payload length */ + uint8 payload[1]; /* Payload */ +} awdl_payload_t; + +typedef struct awdl_long_payload { + uint8 long_psf_period; /* transmit every long_psf_perios AWs */ + uint8 long_psf_tx_offset; /* delay from aw_start */ + uint16 len; /* Payload length */ + uint8 payload[1]; /* Payload */ +} BWL_POST_PACKED_STRUCT awdl_long_payload_t; + +typedef BWL_PRE_PACKED_STRUCT struct awdl_opmode { + uint8 mode; /* 0 - Auto; 1 - Fixed */ + uint8 role; /* 0 - slave; 1 - non-elect master; 2 - master */ + uint16 bcast_tu; /* Bcasting period(TU) for non-elect master */ + struct ether_addr master; /* Address of master to sync to */ + uint16 cur_bcast_tu; /* Current Bcasting Period(TU) */ +} BWL_PRE_PACKED_STRUCT awdl_opmode_t; + +typedef BWL_PRE_PACKED_STRUCT struct awdl_extcount { + uint8 minExt; /* Min extension count */ + uint8 maxExtMulti; /* Max extension count for mcast packets */ + uint8 maxExtUni; /* Max extension count for unicast packets */ + uint8 maxAfExt; /* Max extension count */ +} BWL_PRE_PACKED_STRUCT awdl_extcount_t; + +#define AWDL_OPMODE_AUTO 0 +#define AWDL_OPMODE_FIXED 1 + +/* peer add/del operation */ +typedef struct awdl_peer_op { + uint8 version; + uint8 opcode; /* see opcode definition */ + struct ether_addr addr; + uint8 mode; + /* XXX add other fixed fields here and increase the version number */ + /* XXX 0 or more TLVs at the end */ +} awdl_peer_op_t; + +/* peer op table */ +typedef struct awdl_peer_op_tbl { + uint16 len; /* length */ + uint8 tbl[1]; /* Peer table */ +} awdl_peer_op_tbl_t; + +typedef BWL_PRE_PACKED_STRUCT struct awdl_peer_op_node { + struct ether_addr addr; + uint32 flags; /* Flags to indicate various states */ +} BWL_POST_PACKED_STRUCT awdl_peer_op_node_t; + +#define AWDL_PEER_OP_CUR_VER 0 + +/* AWDL related statistics */ +typedef BWL_PRE_PACKED_STRUCT struct awdl_stats { + uint32 afrx; + uint32 aftx; + uint32 datatx; + uint32 datarx; + uint32 txdrop; + uint32 rxdrop; + uint32 monrx; + uint32 lostmaster; + uint32 misalign; + uint32 aws; + uint32 aw_dur; + uint32 debug; + uint32 txsupr; + uint32 afrxdrop; + uint32 awdrop; + uint32 noawchansw; + uint32 rx80211; + uint32 peeropdrop; +} BWL_POST_PACKED_STRUCT awdl_stats_t; + +typedef BWL_PRE_PACKED_STRUCT struct awdl_uct_stats { + uint32 aw_proc_in_aw_sched; + uint32 aw_upd_in_pre_aw_proc; + uint32 pre_aw_proc_in_aw_set; + uint32 ignore_pre_aw_proc; + uint32 miss_pre_aw_intr; + uint32 aw_dur_zero; + uint32 aw_sched; + uint32 aw_proc; + uint32 pre_aw_proc; + uint32 not_init; + uint32 null_awdl; +} BWL_POST_PACKED_STRUCT awdl_uct_stats_t; + +/* peer opcode */ +#define AWDL_PEER_OP_ADD 0 +#define AWDL_PEER_OP_DEL 1 +#define AWDL_PEER_OP_INFO 2 +#define AWDL_PEER_OP_UPD 3 + +typedef struct awdl_pw_opmode { + struct ether_addr top_master; /* Peer mac addr */ + uint8 mode; /* 0 - normal; 1 - fast mode */ +} awdl_pw_opmode_t; + +/* i/f request */ +typedef struct wl_awdl_if { + int32 cfg_idx; + int32 up; + struct ether_addr if_addr; + struct ether_addr bssid; +} wl_awdl_if_t; + +typedef struct _aw_start { + uint8 role; + struct ether_addr master; + uint8 aw_seq_num; +} aw_start_t; + +typedef struct _aw_extension_start { + uint8 aw_ext_num; +} aw_extension_start_t; + +typedef struct _awdl_peer_state { + struct ether_addr peer; + uint8 state; +} awdl_peer_state_t; +#define AWDL_PEER_STATE_OPEN 0 +#define AWDL_PEER_STATE_CLOSE 1 + +typedef struct _awdl_sync_state_changed { + uint8 new_role; + struct ether_addr master; +} awdl_sync_state_changed_t; + +#define SYNC_ROLE_SLAVE 0 +#define SYNC_ROLE_NE_MASTER 1 /* Non-election master */ +#define SYNC_ROLE_MASTER 2 + +typedef struct _awdl_sync_state { + uint8 role; + struct ether_addr master; + uint32 continuous_election_enable; +} awdl_sync_state_t; + +typedef struct _awdl_aw_ap_alignment { + uint32 enabled; + int32 offset; + uint32 align_on_dtim; +} awdl_aw_ap_alignment_t; + +typedef struct _awdl_peer_stats { + uint32 version; + struct ether_addr address; + uint8 clear; + int8 rssi; + int8 avg_rssi; + uint8 txRate; + uint8 rxRate; + uint32 numTx; + uint32 numTxRetries; + uint32 numTxFailures; +} awdl_peer_stats_t; + +#define MAX_NUM_AWDL_KEYS 4 +typedef struct _awdl_aes_key { + uint32 version; + int32 enable; + struct ether_addr awdl_peer; + uint8 keys[MAX_NUM_AWDL_KEYS][16]; +} awdl_aes_key_t; + +/* + * Dongle pattern matching filter. + */ +/* AOAC wake event flag */ +#define WAKE_EVENT_NLO_DISCOVERY_BIT 1 +#define WAKE_EVENT_AP_ASSOCIATION_LOST_BIT 2 +#define WAKE_EVENT_GTK_HANDSHAKE_ERROR_BIT 4 +#define WAKE_EVENT_4WAY_HANDSHAKE_REQUEST_BIT 8 + +#define MAX_NUM_WOL_PATTERN 16 /* LOGO requirements min 16 */ +#define MAX_WAKE_PACKET_CACHE_BYTES 128 /* Maximum cached wake packet */ + +typedef struct pm_wake_packet { + uint32 status; /* Is the wake reason a packet (if all the other field's valid) */ + uint32 pattern_id; /* Pattern ID that matched */ + uint32 original_packet_size; + uint32 saved_packet_size; + uchar packet[MAX_WAKE_PACKET_CACHE_BYTES]; +} pm_wake_packet_t; + +/* Packet filter operation mode */ +/* True: 1; False: 0 */ +#define PKT_FILTER_MODE_FORWARD_ON_MATCH 1 +/* Enable and disable pkt_filter as a whole */ +#define PKT_FILTER_MODE_DISABLE 2 +/* Cache first matched rx pkt(be queried by host later) */ +#define PKT_FILTER_MODE_PKT_CACHE_ON_MATCH 4 +/* If pkt_filter is enabled and no filter is set, don't forward anything */ +#define PKT_FILTER_MODE_PKT_FORWARD_OFF_DEFAULT 8 + +/* Packet filter types. Currently, only pattern matching is supported. */ +typedef enum wl_pkt_filter_type { + WL_PKT_FILTER_TYPE_PATTERN_MATCH=0, /* Pattern matching filter */ + WL_PKT_FILTER_TYPE_MAGIC_PATTERN_MATCH=1, /* Magic packet match */ + WL_PKT_FILTER_TYPE_PATTERN_LIST_MATCH=2 /* A pattern list (match all to match filter) */ +} wl_pkt_filter_type_t; + +#define WL_PKT_FILTER_TYPE wl_pkt_filter_type_t /* xxx backward compatibility; remove */ + +/* String mapping for types that may be used by applications or debug */ +#define WL_PKT_FILTER_TYPE_NAMES \ + { "PATTERN", WL_PKT_FILTER_TYPE_PATTERN_MATCH }, \ + { "MAGIC", WL_PKT_FILTER_TYPE_MAGIC_PATTERN_MATCH }, \ + { "PATLIST", WL_PKT_FILTER_TYPE_PATTERN_LIST_MATCH } + +/* Pattern matching filter. Specifies an offset within received packets to + * start matching, the pattern to match, the size of the pattern, and a bitmask + * that indicates which bits within the pattern should be matched. + */ +typedef struct wl_pkt_filter_pattern { + uint32 offset; /* Offset within received packet to start pattern matching. + * Offset '0' is the first byte of the ethernet header. + */ + uint32 size_bytes; /* Size of the pattern. Bitmask must be the same size. */ + uint8 mask_and_pattern[1]; /* Variable length mask and pattern data. mask starts + * at offset 0. Pattern immediately follows mask. + */ +} wl_pkt_filter_pattern_t; + +/* A pattern list is a numerically specified list of modified pattern structures. */ +typedef struct wl_pkt_filter_pattern_listel { + uint16 rel_offs; /* Offset to begin match (relative to 'base' below) */ + uint16 base_offs; /* Base for offset (defined below) */ + uint16 size_bytes; /* Size of mask/pattern */ + uint16 match_flags; /* Addition flags controlling the match */ + uint8 mask_and_data[1]; /* Variable length mask followed by data, each size_bytes */ +} wl_pkt_filter_pattern_listel_t; + +typedef struct wl_pkt_filter_pattern_list { + uint8 list_cnt; /* Number of elements in the list */ + uint8 PAD1[1]; /* Reserved (possible version: reserved) */ + uint16 totsize; /* Total size of this pattern list (includes this struct) */ + wl_pkt_filter_pattern_listel_t patterns[1]; /* Variable number of list elements */ +} wl_pkt_filter_pattern_list_t; + +/* Base offset values */ +#define WL_PKT_FILTER_BASE_PKT 0 +#define WL_PKT_FILTER_BASE_END 1 +#define WL_PKT_FILTER_BASE_D11_H 2 /* May be removed */ +#define WL_PKT_FILTER_BASE_D11_D 3 /* May be removed */ +#define WL_PKT_FILTER_BASE_ETH_H 4 +#define WL_PKT_FILTER_BASE_ETH_D 5 +#define WL_PKT_FILTER_BASE_ARP_H 6 +#define WL_PKT_FILTER_BASE_ARP_D 7 /* May be removed */ +#define WL_PKT_FILTER_BASE_IP4_H 8 +#define WL_PKT_FILTER_BASE_IP4_D 9 +#define WL_PKT_FILTER_BASE_IP6_H 10 +#define WL_PKT_FILTER_BASE_IP6_D 11 +#define WL_PKT_FILTER_BASE_TCP_H 12 +#define WL_PKT_FILTER_BASE_TCP_D 13 /* May be removed */ +#define WL_PKT_FILTER_BASE_UDP_H 14 +#define WL_PKT_FILTER_BASE_UDP_D 15 +#define WL_PKT_FILTER_BASE_IP6_P 16 +#define WL_PKT_FILTER_BASE_COUNT 17 /* May be removed */ + +/* String mapping for bases that may be used by applications or debug */ +#define WL_PKT_FILTER_BASE_NAMES \ + { "START", WL_PKT_FILTER_BASE_PKT }, \ + { "END", WL_PKT_FILTER_BASE_END }, \ + { "ETH_H", WL_PKT_FILTER_BASE_ETH_H }, \ + { "ETH_D", WL_PKT_FILTER_BASE_ETH_D }, \ + { "D11_H", WL_PKT_FILTER_BASE_D11_H }, \ + { "D11_D", WL_PKT_FILTER_BASE_D11_D }, \ + { "ARP_H", WL_PKT_FILTER_BASE_ARP_H }, \ + { "IP4_H", WL_PKT_FILTER_BASE_IP4_H }, \ + { "IP4_D", WL_PKT_FILTER_BASE_IP4_D }, \ + { "IP6_H", WL_PKT_FILTER_BASE_IP6_H }, \ + { "IP6_D", WL_PKT_FILTER_BASE_IP6_D }, \ + { "IP6_P", WL_PKT_FILTER_BASE_IP6_P }, \ + { "TCP_H", WL_PKT_FILTER_BASE_TCP_H }, \ + { "TCP_D", WL_PKT_FILTER_BASE_TCP_D }, \ + { "UDP_H", WL_PKT_FILTER_BASE_UDP_H }, \ + { "UDP_D", WL_PKT_FILTER_BASE_UDP_D } + +/* Flags for a pattern list element */ +#define WL_PKT_FILTER_MFLAG_NEG 0x0001 + +/* IOVAR "pkt_filter_add" parameter. Used to install packet filters. */ +typedef struct wl_pkt_filter { + uint32 id; /* Unique filter id, specified by app. */ + uint32 type; /* Filter type (WL_PKT_FILTER_TYPE_xxx). */ + uint32 negate_match; /* Negate the result of filter matches */ + union { /* Filter definitions */ + wl_pkt_filter_pattern_t pattern; /* Pattern matching filter */ + wl_pkt_filter_pattern_list_t patlist; /* List of patterns to match */ + } u; + /* XXX Do NOT add structure members after the filter definitions, since they + * may include variable length arrays. + */ +} wl_pkt_filter_t; + +/* IOVAR "tcp_keep_set" parameter. Used to install tcp keep_alive stuff. */ +typedef struct wl_tcp_keep_set { + uint32 val1; + uint32 val2; +} wl_tcp_keep_set_t; + +#define WL_PKT_FILTER_FIXED_LEN OFFSETOF(wl_pkt_filter_t, u) +#define WL_PKT_FILTER_PATTERN_FIXED_LEN OFFSETOF(wl_pkt_filter_pattern_t, mask_and_pattern) +#define WL_PKT_FILTER_PATTERN_LIST_FIXED_LEN OFFSETOF(wl_pkt_filter_pattern_list_t, patterns) +#define WL_PKT_FILTER_PATTERN_LISTEL_FIXED_LEN \ + OFFSETOF(wl_pkt_filter_pattern_listel_t, mask_and_data) + +/* IOVAR "pkt_filter_enable" parameter. */ +typedef struct wl_pkt_filter_enable { + uint32 id; /* Unique filter id */ + uint32 enable; /* Enable/disable bool */ +} wl_pkt_filter_enable_t; + +/* IOVAR "pkt_filter_list" parameter. Used to retrieve a list of installed filters. */ +typedef struct wl_pkt_filter_list { + uint32 num; /* Number of installed packet filters */ + wl_pkt_filter_t filter[1]; /* Variable array of packet filters. */ +} wl_pkt_filter_list_t; + +#define WL_PKT_FILTER_LIST_FIXED_LEN OFFSETOF(wl_pkt_filter_list_t, filter) + +/* IOVAR "pkt_filter_stats" parameter. Used to retrieve debug statistics. */ +typedef struct wl_pkt_filter_stats { + uint32 num_pkts_matched; /* # filter matches for specified filter id */ + uint32 num_pkts_forwarded; /* # packets fwded from dongle to host for all filters */ + uint32 num_pkts_discarded; /* # packets discarded by dongle for all filters */ +} wl_pkt_filter_stats_t; + +/* IOVAR "pkt_filter_ports" parameter. Configure TCP/UDP port filters. */ +typedef struct wl_pkt_filter_ports { + uint8 version; /* Be proper */ + uint8 reserved; /* Be really proper */ + uint16 count; /* Number of ports following */ + /* End of fixed data */ + uint16 ports[1]; /* Placeholder for ports[] */ +} wl_pkt_filter_ports_t; + +#define WL_PKT_FILTER_PORTS_FIXED_LEN OFFSETOF(wl_pkt_filter_ports_t, ports) + +#define WL_PKT_FILTER_PORTS_VERSION 0 +#define WL_PKT_FILTER_PORTS_MAX 128 + +#define RSN_KCK_LENGTH 16 +#define RSN_KEK_LENGTH 16 +#define RSN_REPLAY_LEN 8 +typedef struct _gtkrefresh { + uchar KCK[RSN_KCK_LENGTH]; + uchar KEK[RSN_KEK_LENGTH]; + uchar ReplayCounter[RSN_REPLAY_LEN]; +} gtk_keyinfo_t, *pgtk_keyinfo_t; + +/* Sequential Commands ioctl */ +typedef struct wl_seq_cmd_ioctl { + uint32 cmd; /* common ioctl definition */ + uint32 len; /* length of user buffer */ +} wl_seq_cmd_ioctl_t; + +#define WL_SEQ_CMD_ALIGN_BYTES 4 + +/* These are the set of get IOCTLs that should be allowed when using + * IOCTL sequence commands. These are issued implicitly by wl.exe each time + * it is invoked. We never want to buffer these, or else wl.exe will stop working. + */ +#define WL_SEQ_CMDS_GET_IOCTL_FILTER(cmd) \ + (((cmd) == WLC_GET_MAGIC) || \ + ((cmd) == WLC_GET_VERSION) || \ + ((cmd) == WLC_GET_AP) || \ + ((cmd) == WLC_GET_INSTANCE)) + +/* + * Packet engine interface + */ + +#define WL_PKTENG_PER_TX_START 0x01 +#define WL_PKTENG_PER_TX_STOP 0x02 +#define WL_PKTENG_PER_RX_START 0x04 +#define WL_PKTENG_PER_RX_WITH_ACK_START 0x05 +#define WL_PKTENG_PER_TX_WITH_ACK_START 0x06 +#define WL_PKTENG_PER_RX_STOP 0x08 +#define WL_PKTENG_PER_MASK 0xff + +#define WL_PKTENG_SYNCHRONOUS 0x100 /* synchronous flag */ + +#define WL_PKTENG_MAXPKTSZ 16384 /* max pktsz limit for pkteng */ + +typedef struct wl_pkteng { + uint32 flags; + uint32 delay; /* Inter-packet delay */ + uint32 nframes; /* Number of frames */ + uint32 length; /* Packet length */ + uint8 seqno; /* Enable/disable sequence no. */ + struct ether_addr dest; /* Destination address */ + struct ether_addr src; /* Source address */ +} wl_pkteng_t; + +#define NUM_80211b_RATES 4 +#define NUM_80211ag_RATES 8 +#define NUM_80211n_RATES 32 +#define NUM_80211_RATES (NUM_80211b_RATES+NUM_80211ag_RATES+NUM_80211n_RATES) +typedef struct wl_pkteng_stats { + uint32 lostfrmcnt; /* RX PER test: no of frames lost (skip seqno) */ + int32 rssi; /* RSSI */ + int32 snr; /* signal to noise ratio */ + uint16 rxpktcnt[NUM_80211_RATES+1]; + uint8 rssi_qdb; /* qdB portion of the computed rssi */ +} wl_pkteng_stats_t; + +#if !defined(BCMDONGLEHOST) || defined(BCMINTERNAL) || defined(WLTEST) +typedef struct wl_sslpnphy_papd_debug_data { + uint8 psat_pwr; + uint8 psat_indx; + uint8 final_idx; + uint8 start_idx; + int32 min_phase; + int32 voltage; + int8 temperature; +} wl_sslpnphy_papd_debug_data_t; +typedef struct wl_sslpnphy_debug_data { + int16 papdcompRe [64]; + int16 papdcompIm [64]; +} wl_sslpnphy_debug_data_t; +typedef struct wl_sslpnphy_spbdump_data { + uint16 tbl_length; + int16 spbreal[256]; + int16 spbimg[256]; +} wl_sslpnphy_spbdump_data_t; +typedef struct wl_sslpnphy_percal_debug_data { + uint cur_idx; + uint tx_drift; + uint8 prev_cal_idx; + uint percal_ctr; + int nxt_cal_idx; + uint force_1idxcal; + uint onedxacl_req; + int32 last_cal_volt; + int8 last_cal_temp; + uint vbat_ripple; + uint exit_route; + int32 volt_winner; +} wl_sslpnphy_percal_debug_data_t; +#endif /* !defined(BCMDONGLEHOST) || defined(BCMINTERNAL) || defined(WLTEST) */ + +/* + * WOWL capability/override settings + */ +#define WL_WOWL_MAGIC (1 << 0) /* Wakeup on Magic packet */ +#define WL_WOWL_NET (1 << 1) /* Wakeup on Netpattern */ +#define WL_WOWL_DIS (1 << 2) /* Wakeup on loss-of-link due to Disassoc/Deauth */ +#define WL_WOWL_RETR (1 << 3) /* Wakeup on retrograde TSF */ +#define WL_WOWL_BCN (1 << 4) /* Wakeup on loss of beacon */ +#define WL_WOWL_TST (1 << 5) /* Wakeup after test */ +#define WL_WOWL_M1 (1 << 6) /* Wakeup after PTK refresh */ +#define WL_WOWL_EAPID (1 << 7) /* Wakeup after receipt of EAP-Identity Req */ +#define WL_WOWL_PME_GPIO (1 << 8) /* Wakeind via PME(0) or GPIO(1) */ +#define WL_WOWL_NEEDTKIP1 (1 << 9) /* need tkip phase 1 key to be updated by the driver */ +#define WL_WOWL_GTK_FAILURE (1 << 10) /* enable wakeup if GTK fails */ +#define WL_WOWL_EXTMAGPAT (1 << 11) /* support extended magic packets */ +#define WL_WOWL_ARPOFFLOAD (1 << 12) /* support ARP/NS/keepalive offloading */ +#define WL_WOWL_WPA2 (1 << 13) /* read protocol version for EAPOL frames */ +#define WL_WOWL_KEYROT (1 << 14) /* If the bit is set, use key rotaton */ +#define WL_WOWL_BCAST (1 << 15) /* If the bit is set, frm received was bcast frame */ +#define WL_WOWL_SCANOL (1 << 16) /* If the bit is set, scan offload is enabled */ +#define WL_WOWL_NOT_USED (1 << 17) /* Currently unused, use this bit next */ +#define WL_WOWL_MDNS_CONFLICT (1 << 18) /* Wakeup on mDNS Conflict Resolution */ +#define WL_WOWL_MDNS_SERVICE (1 << 19) /* Wakeup on mDNS Service Connect */ +#define WL_WOWL_TCPKEEP (1 << 20) /* tcp keepalive either timed out or got data */ +#define WL_WOWL_FW_HALT (1 << 21) /* Firmware died in wowl mode */ +#define WL_WOWL_ENAB_HWRADIO (1 << 22) /* Enable detection of radio button changes */ + + +#define MAGIC_PKT_MINLEN 102 /* Magic pkt min length is 6 * 0xFF + 16 * ETHER_ADDR_LEN */ +#define MAGIC_PKT_NUM_MAC_ADDRS 16 + +typedef enum { + wowl_pattern_type_bitmap = 0, + wowl_pattern_type_arp, + wowl_pattern_type_na +} wowl_pattern_type_t; + +typedef struct wl_wowl_pattern { + uint32 masksize; /* Size of the mask in #of bytes */ + uint32 offset; /* Pattern byte offset in packet */ + uint32 patternoffset; /* Offset of start of pattern in the structure */ + uint32 patternsize; /* Size of the pattern itself in #of bytes */ + uint32 id; /* id */ + uint32 reasonsize; /* Size of the wakeup reason code */ + wowl_pattern_type_t type; /* Type of pattern */ + /* Mask follows the structure above */ + /* Pattern follows the mask is at 'patternoffset' from the start */ +} wl_wowl_pattern_t; + +typedef struct wl_wowl_pattern_list { + uint count; + wl_wowl_pattern_t pattern[1]; +} wl_wowl_pattern_list_t; + +typedef struct wl_wowl_wakeind { + uint8 pci_wakeind; /* Whether PCI PMECSR PMEStatus bit was set */ + uint32 ucode_wakeind; /* What wakeup-event indication was set by ucode */ +} wl_wowl_wakeind_t; + +typedef struct { + uint32 pktlen; /* size of packet */ + void *sdu; +} tcp_keepalive_wake_pkt_infop_t; + +/* per AC rate control related data structure */ +typedef struct wl_txrate_class { + uint8 init_rate; + uint8 min_rate; + uint8 max_rate; +} wl_txrate_class_t; + + +#if defined(DSLCPE_DELAY) +#define WL_DELAYMODE_DEFER 0 /* defer by scheduler's choice, make this driver default */ +#define WL_DELAYMODE_FORCE 1 /* force, this is driver default */ +#define WL_DELAYMODE_AUTO 2 /* defer if no sta associated, force if sta associated */ +#endif + +/* Overlap BSS Scan parameters default, minimum, maximum */ +#define WLC_OBSS_SCAN_PASSIVE_DWELL_DEFAULT 20 /* unit TU */ +#define WLC_OBSS_SCAN_PASSIVE_DWELL_MIN 5 /* unit TU */ +#define WLC_OBSS_SCAN_PASSIVE_DWELL_MAX 1000 /* unit TU */ +#define WLC_OBSS_SCAN_ACTIVE_DWELL_DEFAULT 10 /* unit TU */ +#define WLC_OBSS_SCAN_ACTIVE_DWELL_MIN 10 /* unit TU */ +#define WLC_OBSS_SCAN_ACTIVE_DWELL_MAX 1000 /* unit TU */ +#define WLC_OBSS_SCAN_WIDTHSCAN_INTERVAL_DEFAULT 300 /* unit Sec */ +#define WLC_OBSS_SCAN_WIDTHSCAN_INTERVAL_MIN 10 /* unit Sec */ +#define WLC_OBSS_SCAN_WIDTHSCAN_INTERVAL_MAX 900 /* unit Sec */ +#define WLC_OBSS_SCAN_CHANWIDTH_TRANSITION_DLY_DEFAULT 5 +#define WLC_OBSS_SCAN_CHANWIDTH_TRANSITION_DLY_MIN 5 +#define WLC_OBSS_SCAN_CHANWIDTH_TRANSITION_DLY_MAX 100 +#define WLC_OBSS_SCAN_PASSIVE_TOTAL_PER_CHANNEL_DEFAULT 200 /* unit TU */ +#define WLC_OBSS_SCAN_PASSIVE_TOTAL_PER_CHANNEL_MIN 200 /* unit TU */ +#define WLC_OBSS_SCAN_PASSIVE_TOTAL_PER_CHANNEL_MAX 10000 /* unit TU */ +#define WLC_OBSS_SCAN_ACTIVE_TOTAL_PER_CHANNEL_DEFAULT 20 /* unit TU */ +#define WLC_OBSS_SCAN_ACTIVE_TOTAL_PER_CHANNEL_MIN 20 /* unit TU */ +#define WLC_OBSS_SCAN_ACTIVE_TOTAL_PER_CHANNEL_MAX 10000 /* unit TU */ +#define WLC_OBSS_SCAN_ACTIVITY_THRESHOLD_DEFAULT 25 /* unit percent */ +#define WLC_OBSS_SCAN_ACTIVITY_THRESHOLD_MIN 0 /* unit percent */ +#define WLC_OBSS_SCAN_ACTIVITY_THRESHOLD_MAX 100 /* unit percent */ + +/* structure for Overlap BSS scan arguments */ +typedef struct wl_obss_scan_arg { + int16 passive_dwell; + int16 active_dwell; + int16 bss_widthscan_interval; + int16 passive_total; + int16 active_total; + int16 chanwidth_transition_delay; + int16 activity_threshold; +} wl_obss_scan_arg_t; + +#define WL_OBSS_SCAN_PARAM_LEN sizeof(wl_obss_scan_arg_t) +#define WL_MIN_NUM_OBSS_SCAN_ARG 7 /* minimum number of arguments required for OBSS Scan */ + +#define WL_COEX_INFO_MASK 0x07 +#define WL_COEX_INFO_REQ 0x01 +#define WL_COEX_40MHZ_INTOLERANT 0x02 +#define WL_COEX_WIDTH20 0x04 + +#define WLC_RSSI_INVALID 0 /* invalid RSSI value */ + +#define MAX_RSSI_LEVELS 8 + +/* RSSI event notification configuration. */ +typedef struct wl_rssi_event { + uint32 rate_limit_msec; /* # of events posted to application will be limited to + * one per specified period (0 to disable rate limit). + */ + uint8 num_rssi_levels; /* Number of entries in rssi_levels[] below */ + int8 rssi_levels[MAX_RSSI_LEVELS]; /* Variable number of RSSI levels. An event + * will be posted each time the RSSI of received + * beacons/packets crosses a level. + */ +} wl_rssi_event_t; + +typedef struct wl_action_obss_coex_req { + uint8 info; + uint8 num; + uint8 ch_list[1]; +} wl_action_obss_coex_req_t; + + +/* IOVar parameter block for small MAC address array with type indicator */ +#define WL_IOV_MAC_PARAM_LEN 4 + +/* XXX This value is hardcoded to be 16 and MUST match PKTQ_MAX_PREC value defined elsewhere */ +#define WL_IOV_PKTQ_LOG_PRECS 16 + +typedef struct { + uint32 num_addrs; + char addr_type[WL_IOV_MAC_PARAM_LEN]; + struct ether_addr ea[WL_IOV_MAC_PARAM_LEN]; +} wl_iov_mac_params_t; + +/* This is extra info that follows wl_iov_mac_params_t */ +typedef struct { + uint32 addr_info[WL_IOV_MAC_PARAM_LEN]; +} wl_iov_mac_extra_params_t; + +/* Combined structure */ +typedef struct { + wl_iov_mac_params_t params; + wl_iov_mac_extra_params_t extra_params; +} wl_iov_mac_full_params_t; + +/* Parameter block for PKTQ_LOG statistics */ +/* XXX NOTE: this structure cannot change! It is exported to wlu as a binary format + * A new format revision number must be created if the interface changes + * The latest is v04; previous v01,v02,v03 are no longer supported +*/ +typedef struct { + uint32 requested; /* packets requested to be stored */ + uint32 stored; /* packets stored */ + uint32 saved; /* packets saved, + because a lowest priority queue has given away one packet + */ + uint32 selfsaved; /* packets saved, + because an older packet from the same queue has been dropped + */ + uint32 full_dropped; /* packets dropped, + because pktq is full with higher precedence packets + */ + uint32 dropped; /* packets dropped because pktq per that precedence is full */ + uint32 sacrificed; /* packets dropped, + in order to save one from a queue of a highest priority + */ + uint32 busy; /* packets droped because of hardware/transmission error */ + uint32 retry; /* packets re-sent because they were not received */ + uint32 ps_retry; /* packets retried again prior to moving power save mode */ + uint32 suppress; /* suppressed packet count */ + uint32 retry_drop; /* packets finally dropped after retry limit */ + uint32 max_avail; /* the high-water mark of the queue capacity for packets - + goes to zero as queue fills + */ + uint32 max_used; /* the high-water mark of the queue utilisation for packets - + increases with use ('inverse' of max_avail) + */ + uint32 queue_capacity; /* the maximum capacity of the queue */ + uint32 rtsfail; /* count of rts attempts that failed to receive cts */ + uint32 acked; /* count of packets sent (acked) successfully */ + uint32 txrate_succ; /* running total of phy rate of packets sent successfully */ + uint32 txrate_main; /* running total of phy 'main' rate */ + uint32 throughput; /* actual data transferred successfully */ + uint32 time_delta; /* time difference since last pktq_stats */ +} pktq_log_counters_v04_t; + +#define sacrified sacrificed /* xxx compatibility for old spelling error */ + +typedef struct { + uint8 num_prec[WL_IOV_MAC_PARAM_LEN]; + pktq_log_counters_v04_t counters[WL_IOV_MAC_PARAM_LEN][WL_IOV_PKTQ_LOG_PRECS]; + uint32 counter_info[WL_IOV_MAC_PARAM_LEN]; + uint32 pspretend_time_delta[WL_IOV_MAC_PARAM_LEN]; + char headings[1]; +} pktq_log_format_v04_t; + + +typedef struct { + uint32 version; + wl_iov_mac_params_t params; + union { + pktq_log_format_v04_t v04; + } pktq_log; +} wl_iov_pktq_log_t; + + +/* **** EXTLOG **** */ +#define EXTLOG_CUR_VER 0x0100 + +#define MAX_ARGSTR_LEN 18 /* At least big enough for storing ETHER_ADDR_STR_LEN */ + +/* log modules (bitmap) */ +#define LOG_MODULE_COMMON 0x0001 +#define LOG_MODULE_ASSOC 0x0002 +#define LOG_MODULE_EVENT 0x0004 +#define LOG_MODULE_MAX 3 /* Update when adding module */ + +/* log levels */ +#define WL_LOG_LEVEL_DISABLE 0 +#define WL_LOG_LEVEL_ERR 1 +#define WL_LOG_LEVEL_WARN 2 +#define WL_LOG_LEVEL_INFO 3 +#define WL_LOG_LEVEL_MAX WL_LOG_LEVEL_INFO /* Update when adding level */ + +/* flag */ +#define LOG_FLAG_EVENT 1 + +/* log arg_type */ +#define LOG_ARGTYPE_NULL 0 +#define LOG_ARGTYPE_STR 1 /* %s */ +#define LOG_ARGTYPE_INT 2 /* %d */ +#define LOG_ARGTYPE_INT_STR 3 /* %d...%s */ +#define LOG_ARGTYPE_STR_INT 4 /* %s...%d */ + +typedef struct wlc_extlog_cfg { + int max_number; + uint16 module; /* bitmap */ + uint8 level; + uint8 flag; + uint16 version; +} wlc_extlog_cfg_t; + +typedef struct log_record { + uint32 time; + uint16 module; + uint16 id; + uint8 level; + uint8 sub_unit; + uint8 seq_num; + int32 arg; + char str[MAX_ARGSTR_LEN]; +} log_record_t; + +typedef struct wlc_extlog_req { + uint32 from_last; + uint32 num; +} wlc_extlog_req_t; + +typedef struct wlc_extlog_results { + uint16 version; + uint16 record_len; + uint32 num; + log_record_t logs[1]; +} wlc_extlog_results_t; + +typedef struct log_idstr { + uint16 id; + uint16 flag; + uint8 arg_type; + const char *fmt_str; +} log_idstr_t; + +#define FMTSTRF_USER 1 + +/* flat ID definitions + * New definitions HAVE TO BE ADDED at the end of the table. Otherwise, it will + * affect backward compatibility with pre-existing apps + */ +typedef enum { + FMTSTR_DRIVER_UP_ID = 0, + FMTSTR_DRIVER_DOWN_ID = 1, + FMTSTR_SUSPEND_MAC_FAIL_ID = 2, + FMTSTR_NO_PROGRESS_ID = 3, + FMTSTR_RFDISABLE_ID = 4, + FMTSTR_REG_PRINT_ID = 5, + FMTSTR_EXPTIME_ID = 6, + FMTSTR_JOIN_START_ID = 7, + FMTSTR_JOIN_COMPLETE_ID = 8, + FMTSTR_NO_NETWORKS_ID = 9, + FMTSTR_SECURITY_MISMATCH_ID = 10, + FMTSTR_RATE_MISMATCH_ID = 11, + FMTSTR_AP_PRUNED_ID = 12, + FMTSTR_KEY_INSERTED_ID = 13, + FMTSTR_DEAUTH_ID = 14, + FMTSTR_DISASSOC_ID = 15, + FMTSTR_LINK_UP_ID = 16, + FMTSTR_LINK_DOWN_ID = 17, + FMTSTR_RADIO_HW_OFF_ID = 18, + FMTSTR_RADIO_HW_ON_ID = 19, + FMTSTR_EVENT_DESC_ID = 20, + FMTSTR_PNP_SET_POWER_ID = 21, + FMTSTR_RADIO_SW_OFF_ID = 22, + FMTSTR_RADIO_SW_ON_ID = 23, + FMTSTR_PWD_MISMATCH_ID = 24, + FMTSTR_FATAL_ERROR_ID = 25, + FMTSTR_AUTH_FAIL_ID = 26, + FMTSTR_ASSOC_FAIL_ID = 27, + FMTSTR_IBSS_FAIL_ID = 28, + FMTSTR_EXTAP_FAIL_ID = 29, + FMTSTR_MAX_ID +} log_fmtstr_id_t; + +#ifdef DONGLEOVERLAYS +typedef struct { + uint32 flags_idx; /* lower 8 bits: overlay index; upper 24 bits: flags */ + uint32 offset; /* offset into overlay region to write code */ + uint32 len; /* overlay code len */ + /* overlay code follows this struct */ +} wl_ioctl_overlay_t; + +#define OVERLAY_IDX_MASK 0x000000ff +#define OVERLAY_IDX_SHIFT 0 +#define OVERLAY_FLAGS_MASK 0xffffff00 +#define OVERLAY_FLAGS_SHIFT 8 +/* overlay written to device memory immediately after loading the base image */ +#define OVERLAY_FLAG_POSTLOAD 0x100 +/* defer overlay download until the device responds w/WLC_E_OVL_DOWNLOAD event */ +#define OVERLAY_FLAG_DEFER_DL 0x200 +/* overlay downloaded prior to the host going to sleep */ +#define OVERLAY_FLAG_PRESLEEP 0x400 + +#define OVERLAY_DOWNLOAD_CHUNKSIZE 1024 +#endif /* DONGLEOVERLAYS */ + +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +/* 11k Neighbor Report element */ +typedef struct nbr_element { + uint8 id; + uint8 len; + struct ether_addr bssid; + uint32 bssid_info; + uint8 reg; + uint8 channel; + uint8 phytype; + uint8 pad; +} nbr_element_t; + +/* no default structure packing */ +#include + +/* require strict packing */ +#include + +#ifndef LINUX_POSTMOGRIFY_REMOVAL + +/* Structures and constants used for "vndr_ie" IOVar interface */ +#define VNDR_IE_CMD_LEN 4 /* length of the set command string: + * "add", "del" (+ NUL) + */ + +/* 802.11 Mgmt Packet flags */ +#define VNDR_IE_BEACON_FLAG 0x1 +#define VNDR_IE_PRBRSP_FLAG 0x2 +#define VNDR_IE_ASSOCRSP_FLAG 0x4 +#define VNDR_IE_AUTHRSP_FLAG 0x8 +#define VNDR_IE_PRBREQ_FLAG 0x10 +#define VNDR_IE_ASSOCREQ_FLAG 0x20 +#define VNDR_IE_IWAPID_FLAG 0x40 /* vendor IE in IW advertisement protocol ID field */ +#define VNDR_IE_CUSTOM_FLAG 0x100 /* allow custom IE id */ + +#if defined(WLP2P) +/* P2P Action Frames flags (spec ordered) */ +#define VNDR_IE_GONREQ_FLAG 0x001000 +#define VNDR_IE_GONRSP_FLAG 0x002000 +#define VNDR_IE_GONCFM_FLAG 0x004000 +#define VNDR_IE_INVREQ_FLAG 0x008000 +#define VNDR_IE_INVRSP_FLAG 0x010000 +#define VNDR_IE_DISREQ_FLAG 0x020000 +#define VNDR_IE_DISRSP_FLAG 0x040000 +#define VNDR_IE_PRDREQ_FLAG 0x080000 +#define VNDR_IE_PRDRSP_FLAG 0x100000 + +#define VNDR_IE_P2PAF_SHIFT 12 +#endif /* WLP2P */ + +#define VNDR_IE_INFO_HDR_LEN (sizeof(uint32)) + +typedef BWL_PRE_PACKED_STRUCT struct { + uint32 pktflag; /* bitmask indicating which packet(s) contain this IE */ + vndr_ie_t vndr_ie_data; /* vendor IE data */ +} BWL_POST_PACKED_STRUCT vndr_ie_info_t; + +typedef BWL_PRE_PACKED_STRUCT struct { + int iecount; /* number of entries in the vndr_ie_list[] array */ + vndr_ie_info_t vndr_ie_list[1]; /* variable size list of vndr_ie_info_t structs */ +} BWL_POST_PACKED_STRUCT vndr_ie_buf_t; + +typedef BWL_PRE_PACKED_STRUCT struct { + char cmd[VNDR_IE_CMD_LEN]; /* vndr_ie IOVar set command : "add", "del" + NUL */ + vndr_ie_buf_t vndr_ie_buffer; /* buffer containing Vendor IE list information */ +} BWL_POST_PACKED_STRUCT vndr_ie_setbuf_t; + +/* tag_ID/length/value_buffer tuple */ +typedef BWL_PRE_PACKED_STRUCT struct { + uint8 id; + uint8 len; + uint8 data[1]; +} BWL_POST_PACKED_STRUCT tlv_t; + +typedef BWL_PRE_PACKED_STRUCT struct { + uint32 pktflag; /* bitmask indicating which packet(s) contain this IE */ + tlv_t ie_data; /* IE data */ +} BWL_POST_PACKED_STRUCT ie_info_t; + +typedef BWL_PRE_PACKED_STRUCT struct { + int iecount; /* number of entries in the ie_list[] array */ + ie_info_t ie_list[1]; /* variable size list of ie_info_t structs */ +} BWL_POST_PACKED_STRUCT ie_buf_t; + +typedef BWL_PRE_PACKED_STRUCT struct { + char cmd[VNDR_IE_CMD_LEN]; /* ie IOVar set command : "add" + NUL */ + ie_buf_t ie_buffer; /* buffer containing IE list information */ +} BWL_POST_PACKED_STRUCT ie_setbuf_t; + +typedef BWL_PRE_PACKED_STRUCT struct { + uint32 pktflag; /* bitmask indicating which packet(s) contain this IE */ + uint8 id; /* IE type */ +} BWL_POST_PACKED_STRUCT ie_getbuf_t; + +/* structures used to define format of wps ie data from probe requests */ +/* passed up to applications via iovar "prbreq_wpsie" */ +typedef BWL_PRE_PACKED_STRUCT struct sta_prbreq_wps_ie_hdr { + struct ether_addr staAddr; + uint16 ieLen; +} BWL_POST_PACKED_STRUCT sta_prbreq_wps_ie_hdr_t; + +typedef BWL_PRE_PACKED_STRUCT struct sta_prbreq_wps_ie_data { + sta_prbreq_wps_ie_hdr_t hdr; + uint8 ieData[1]; +} BWL_POST_PACKED_STRUCT sta_prbreq_wps_ie_data_t; + +typedef BWL_PRE_PACKED_STRUCT struct sta_prbreq_wps_ie_list { + uint32 totLen; + uint8 ieDataList[1]; +} BWL_POST_PACKED_STRUCT sta_prbreq_wps_ie_list_t; + + +#ifdef WLMEDIA_TXFAILEVENT +typedef BWL_PRE_PACKED_STRUCT struct { + char dest[ETHER_ADDR_LEN]; /* destination MAC */ + uint8 prio; /* Packet Priority */ + uint8 flags; /* Flags */ + uint32 tsf_l; /* TSF timer low */ + uint32 tsf_h; /* TSF timer high */ + uint16 rates; /* Main Rates */ + uint16 txstatus; /* TX Status */ +} BWL_POST_PACKED_STRUCT txfailinfo_t; +#endif /* WLMEDIA_TXFAILEVENT */ + +typedef BWL_PRE_PACKED_STRUCT struct { + uint32 flags; + chanspec_t chanspec; /* txpwr report for this channel */ + chanspec_t local_chanspec; /* channel on which we are associated */ + uint8 local_max; /* local max according to the AP */ + uint8 local_constraint; /* local constraint according to the AP */ + int8 antgain[2]; /* Ant gain for each band - from SROM */ + uint8 rf_cores; /* count of RF Cores being reported */ + uint8 est_Pout[4]; /* Latest tx power out estimate per RF chain */ + uint8 est_Pout_act[4]; /* Latest tx power out estimate per RF chain w/o adjustment */ + uint8 est_Pout_cck; /* Latest CCK tx power out estimate */ + uint8 tx_power_max[4]; /* Maximum target power among all rates */ + uint tx_power_max_rate_ind[4]; /* Index of the rate with the max target power */ + int8 clm_limits[WL_NUMRATES]; /* regulatory limits - 20, 40 or 80MHz */ + int8 clm_limits_subchan1[WL_NUMRATES]; /* regulatory limits - 20in40 or 40in80 */ + int8 clm_limits_subchan2[WL_NUMRATES]; /* regulatory limits - 20in80MHz */ + int8 sar; /* SAR limit for display by wl executable */ + int8 channel_bandwidth; /* 20, 40 or 80 MHz bandwidth? */ + uint8 version; /* Version of the data format wlu <--> driver */ + uint8 display_core; /* Displayed curpower core */ + int8 target_offsets[4]; /* Target power offsets for current rate per core */ + uint32 last_tx_ratespec; /* Ratespec for last transmition */ + uint user_target; /* user limit */ + uint32 board_limit_len; /* length of board limit buffer */ + uint32 target_len; /* length of target power buffer */ + int8 SARLIMIT[MAX_STREAMS_SUPPORTED]; + uint8 pprdata[1]; /* ppr serialization buffer */ +} BWL_POST_PACKED_STRUCT tx_pwr_rpt_t; + + +/* fbt_cap: FBT assoc / reassoc modes. */ +#define WLC_FBT_CAP_DRV_4WAY_AND_REASSOC 1 /* Driver 4-way handshake & reassoc (WLFBT). */ + +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +/* no strict structure packing */ +#include + +#ifndef LINUX_POSTMOGRIFY_REMOVAL +/* Global ASSERT Logging */ +#define ASSERTLOG_CUR_VER 0x0100 +#define MAX_ASSRTSTR_LEN 64 + +typedef struct assert_record { + uint32 time; + uint8 seq_num; + char str[MAX_ASSRTSTR_LEN]; +} assert_record_t; + +typedef struct assertlog_results { + uint16 version; + uint16 record_len; + uint32 num; + assert_record_t logs[1]; +} assertlog_results_t; + +#define LOGRRC_FIX_LEN 8 +#define IOBUF_ALLOWED_NUM_OF_LOGREC(type, len) ((len - LOGRRC_FIX_LEN)/sizeof(type)) + +#ifdef BCMWAPI_WAI +#define IV_LEN 16 /* XXX, same as SMS4_WPI_PN_LEN */ +struct wapi_sta_msg_t +{ + uint16 msg_type; + uint16 datalen; + uint8 vap_mac[6]; + uint8 reserve_data1[2]; + uint8 sta_mac[6]; + uint8 reserve_data2[2]; + uint8 gsn[IV_LEN]; + uint8 wie[256]; +}; +#endif /* BCMWAPI_WAI */ + +/* channel interference measurement (chanim) related defines */ + +/* chanim mode */ +#define CHANIM_DISABLE 0 /* disabled */ +#define CHANIM_DETECT 1 /* detection only */ +#define CHANIM_EXT 2 /* external state machine */ +#define CHANIM_ACT 3 /* full internal state machine, detect + act */ +#define CHANIM_MODE_MAX 4 + +/* define for apcs reason code */ +#define APCS_INIT 0 +#define APCS_IOCTL 1 +#define APCS_CHANIM 2 +#define APCS_CSTIMER 3 +#define APCS_BTA 4 +#define APCS_TXDLY 5 +#define APCS_NONACSD 6 +#define APCS_DFS_REENTRY 7 +#define APCS_TXFAIL 8 +#define APCS_MAX 9 + +/* number of ACS record entries */ +#define CHANIM_ACS_RECORD 10 + +/* CHANIM */ +#define CCASTATS_TXDUR 0 +#define CCASTATS_INBSS 1 +#define CCASTATS_OBSS 2 +#define CCASTATS_NOCTG 3 +#define CCASTATS_NOPKT 4 +#define CCASTATS_DOZE 5 +#define CCASTATS_TXOP 6 +#define CCASTATS_GDTXDUR 7 +#define CCASTATS_BDTXDUR 8 +#define CCASTATS_MAX 9 + +/* chanim acs record */ +typedef struct { + bool valid; + uint8 trigger; + chanspec_t selected_chspc; + int8 bgnoise; + uint32 glitch_cnt; + uint8 ccastats; + uint timestamp; +} chanim_acs_record_t; + +typedef struct { + chanim_acs_record_t acs_record[CHANIM_ACS_RECORD]; + uint8 count; + uint timestamp; +} wl_acs_record_t; + +typedef struct chanim_stats { + uint32 glitchcnt; /* normalized as per second count */ + uint32 badplcp; /* normalized as per second count */ + uint8 ccastats[CCASTATS_MAX]; /* normalized as 0-255 */ + int8 bgnoise; /* background noise level (in dBm) */ + chanspec_t chanspec; + uint32 timestamp; + uint32 bphy_glitchcnt; /* normalized as per second count */ + uint32 bphy_badplcp; /* normalized as per second count */ +} chanim_stats_t; + +#define WL_CHANIM_STATS_VERSION 1 +#define WL_CHANIM_COUNT_ALL 0xff +#define WL_CHANIM_COUNT_ONE 0x1 + +typedef struct { + uint32 buflen; + uint32 version; + uint32 count; + chanim_stats_t stats[1]; +} wl_chanim_stats_t; + +#define WL_CHANIM_STATS_FIXED_LEN OFFSETOF(wl_chanim_stats_t, stats) + +/* Noise measurement metrics. */ +#define NOISE_MEASURE_KNOISE 0x1 + +/* scb probe parameter */ +typedef struct { + uint32 scb_timeout; + uint32 scb_activity_time; + uint32 scb_max_probe; +} wl_scb_probe_t; + +/* ap tpc modes */ +#define AP_TPC_OFF 0 +#define AP_TPC_BSS_PWR 1 /* BSS power control */ +#define AP_TPC_AP_PWR 2 /* AP power control */ +#define AP_TPC_AP_BSS_PWR 3 /* Both AP and BSS power control */ +#define AP_TPC_MAX_LINK_MARGIN 127 + +/* structure/defines for selective mgmt frame (smf) stats support */ + +#define SMFS_VERSION 1 +/* selected mgmt frame (smf) stats element */ +typedef struct wl_smfs_elem { + uint32 count; + uint16 code; /* SC or RC code */ +} wl_smfs_elem_t; + +typedef struct wl_smf_stats { + uint32 version; + uint16 length; /* reserved for future usage */ + uint8 type; + uint8 codetype; + uint32 ignored_cnt; + uint32 malformed_cnt; + uint32 count_total; /* count included the interested group */ + wl_smfs_elem_t elem[1]; +} wl_smf_stats_t; + +#define WL_SMFSTATS_FIXED_LEN OFFSETOF(wl_smf_stats_t, elem); + +enum { + SMFS_CODETYPE_SC, + SMFS_CODETYPE_RC +}; + +/* reuse two number in the sc/rc space */ +#define SMFS_CODE_MALFORMED 0xFFFE +#define SMFS_CODE_IGNORED 0xFFFD + +typedef enum smfs_type { + SMFS_TYPE_AUTH, + SMFS_TYPE_ASSOC, + SMFS_TYPE_REASSOC, + SMFS_TYPE_DISASSOC_TX, + SMFS_TYPE_DISASSOC_RX, + SMFS_TYPE_DEAUTH_TX, + SMFS_TYPE_DEAUTH_RX, + SMFS_TYPE_MAX +} smfs_type_t; + +#ifdef PHYMON + +#define PHYMON_VERSION 1 + +typedef struct wl_phycal_core_state { + /* Tx IQ/LO calibration coeffs */ + int16 tx_iqlocal_a; + int16 tx_iqlocal_b; + int8 tx_iqlocal_ci; + int8 tx_iqlocal_cq; + int8 tx_iqlocal_di; + int8 tx_iqlocal_dq; + int8 tx_iqlocal_ei; + int8 tx_iqlocal_eq; + int8 tx_iqlocal_fi; + int8 tx_iqlocal_fq; + + /* Rx IQ calibration coeffs */ + int16 rx_iqcal_a; + int16 rx_iqcal_b; + + uint8 tx_iqlocal_pwridx; /* Tx Power Index for Tx IQ/LO calibration */ + uint32 papd_epsilon_table[64]; /* PAPD epsilon table */ + int16 papd_epsilon_offset; /* PAPD epsilon offset */ + uint8 curr_tx_pwrindex; /* Tx power index */ + int8 idle_tssi; /* Idle TSSI */ + int8 est_tx_pwr; /* Estimated Tx Power (dB) */ + int8 est_rx_pwr; /* Estimated Rx Power (dB) from RSSI */ + uint16 rx_gaininfo; /* Rx gain applied on last Rx pkt */ + uint16 init_gaincode; /* initgain required for ACI */ + int8 estirr_tx; + int8 estirr_rx; + +} wl_phycal_core_state_t; + +typedef struct wl_phycal_state { + int version; + int8 num_phy_cores; /* number of cores */ + int8 curr_temperature; /* on-chip temperature sensor reading */ + chanspec_t chspec; /* channspec for this state */ + bool aci_state; /* ACI state: ON/OFF */ + uint16 crsminpower; /* crsminpower required for ACI */ + uint16 crsminpowerl; /* crsminpowerl required for ACI */ + uint16 crsminpoweru; /* crsminpoweru required for ACI */ + wl_phycal_core_state_t phycal_core[1]; +} wl_phycal_state_t; + +#define WL_PHYCAL_STAT_FIXED_LEN OFFSETOF(wl_phycal_state_t, phycal_core) +#endif /* PHYMON */ + +/* discovery state */ +typedef struct wl_p2p_disc_st { + uint8 state; /* see state */ + chanspec_t chspec; /* valid in listen state */ + uint16 dwell; /* valid in listen state, in ms */ +} wl_p2p_disc_st_t; + +/* state */ +#define WL_P2P_DISC_ST_SCAN 0 +#define WL_P2P_DISC_ST_LISTEN 1 +#define WL_P2P_DISC_ST_SEARCH 2 + +/* scan request */ +typedef struct wl_p2p_scan { + uint8 type; /* 'S' for WLC_SCAN, 'E' for "escan" */ + uint8 reserved[3]; + /* scan or escan parms... */ +} wl_p2p_scan_t; + +/* i/f request */ +typedef struct wl_p2p_if { + struct ether_addr addr; + uint8 type; /* see i/f type */ + chanspec_t chspec; /* for p2p_ifadd GO */ +} wl_p2p_if_t; + +/* i/f type */ +#define WL_P2P_IF_CLIENT 0 +#define WL_P2P_IF_GO 1 +#define WL_P2P_IF_DYNBCN_GO 2 +#define WL_P2P_IF_DEV 3 + +/* i/f query */ +typedef struct wl_p2p_ifq { + uint bsscfgidx; + char ifname[BCM_MSG_IFNAME_MAX]; +} wl_p2p_ifq_t; + +/* OppPS & CTWindow */ +typedef struct wl_p2p_ops { + uint8 ops; /* 0: disable 1: enable */ + uint8 ctw; /* >= 10 */ +} wl_p2p_ops_t; + +/* absence and presence request */ +typedef struct wl_p2p_sched_desc { + uint32 start; + uint32 interval; + uint32 duration; + uint32 count; /* see count */ +} wl_p2p_sched_desc_t; + +/* count */ +#define WL_P2P_SCHED_RSVD 0 +#define WL_P2P_SCHED_REPEAT 255 /* anything > 255 will be treated as 255 */ + +typedef struct wl_p2p_sched { + uint8 type; /* see schedule type */ + uint8 action; /* see schedule action */ + uint8 option; /* see schedule option */ + wl_p2p_sched_desc_t desc[1]; +} wl_p2p_sched_t; +#define WL_P2P_SCHED_FIXED_LEN 3 + +/* schedule type */ +#define WL_P2P_SCHED_TYPE_ABS 0 /* Scheduled Absence */ +#define WL_P2P_SCHED_TYPE_REQ_ABS 1 /* Requested Absence */ + +/* XXX at some point we may need bitvec here (combination of actions) */ +/* schedule action during absence periods (for WL_P2P_SCHED_ABS type) */ +#define WL_P2P_SCHED_ACTION_NONE 0 /* no action */ +#define WL_P2P_SCHED_ACTION_DOZE 1 /* doze */ +/* schedule option - WL_P2P_SCHED_TYPE_REQ_ABS */ +#define WL_P2P_SCHED_ACTION_GOOFF 2 /* turn off GO beacon/prbrsp functions */ +/* schedule option - WL_P2P_SCHED_TYPE_XXX */ +#define WL_P2P_SCHED_ACTION_RESET 255 /* reset */ + +/* XXX at some point we may need bitvec here (combination of options) */ +/* schedule option - WL_P2P_SCHED_TYPE_ABS */ +#define WL_P2P_SCHED_OPTION_NORMAL 0 /* normal start/interval/duration/count */ +#define WL_P2P_SCHED_OPTION_BCNPCT 1 /* percentage of beacon interval */ +/* schedule option - WL_P2P_SCHED_TYPE_REQ_ABS */ +#define WL_P2P_SCHED_OPTION_TSFOFS 2 /* normal start/internal/duration/count with + * start being an offset of the 'current' TSF + */ + +/* feature flags */ +#define WL_P2P_FEAT_GO_CSA (1 << 0) /* GO moves with the STA using CSA method */ +#define WL_P2P_FEAT_GO_NOLEGACY (1 << 1) /* GO does not probe respond to non-p2p probe + * requests + */ +#define WL_P2P_FEAT_RESTRICT_DEV_RESP (1 << 2) /* Restrict p2p dev interface from responding */ + +/* RFAWARE def */ +#define BCM_ACTION_RFAWARE 0x77 +#define BCM_ACTION_RFAWARE_DCS 0x01 + +/* DCS reason code define */ +#define BCM_DCS_IOVAR 0x1 +#define BCM_DCS_UNKNOWN 0xFF + +typedef struct wl_bcmdcs_data { + uint reason; + chanspec_t chspec; +} wl_bcmdcs_data_t; + +/* n-mode support capability */ +/* 2x2 includes both 1x1 & 2x2 devices + * reserved #define 2 for future when we want to separate 1x1 & 2x2 and + * control it independently + */ +#define WL_11N_2x2 1 +#define WL_11N_3x3 3 +#define WL_11N_4x4 4 + +/* define 11n feature disable flags */ +#define WLFEATURE_DISABLE_11N 0x00000001 +#define WLFEATURE_DISABLE_11N_STBC_TX 0x00000002 +#define WLFEATURE_DISABLE_11N_STBC_RX 0x00000004 +#define WLFEATURE_DISABLE_11N_SGI_TX 0x00000008 +#define WLFEATURE_DISABLE_11N_SGI_RX 0x00000010 +#define WLFEATURE_DISABLE_11N_AMPDU_TX 0x00000020 +#define WLFEATURE_DISABLE_11N_AMPDU_RX 0x00000040 +#define WLFEATURE_DISABLE_11N_GF 0x00000080 + +/* Proxy STA modes */ +#define PSTA_MODE_DISABLED 0 +#define PSTA_MODE_PROXY 1 +#define PSTA_MODE_REPEATER 2 + +#ifdef EXT_STA +/* --------------------------------------------------------------------------- +* Format of IHV data passed to OID_DOT11_NIC_SPECIFIC_EXTENSION. +* --------------------------------------------------------------------------- +*/ +typedef struct _IHV_NIC_SPECIFIC_EXTENSION { + uchar oui[4]; /* vendor specific OUI value */ + uint32 event; /* event code */ + uchar ihvData[1]; /* ihv data */ +} IHV_NIC_SPECIFIC_EXTENSION, *PIHV_NIC_SPECIFIC_EXTENSION; +#define IHV_NIC_SPECIFIC_EXTENTION_HEADER OFFSETOF(IHV_NIC_SPECIFIC_EXTENSION, ihvData[0]) + +#define IHV_OID_BCM 0x00181000 /* based on BRCM_OUI value */ + +/* --------------------------------------------------------------------------- +* Event codes +* --------------------------------------------------------------------------- +*/ +#ifdef BCMCCX +#define IHV_CCX_EVENT_STATUS_INDICATION 0x00000001L /* from driver */ +#define IHV_CCX_EVENT_PACKET_RECEIVED 0x00000002L /* from driver */ +#define IHV_CCX_EVENT_PACKET_TRANSMITTED 0x00000003L /* from driver */ +#define IHV_CCX_EVENT_OID 0x00000004L /* to driver */ +#define IHV_CCX_EVENT_OK_TO_ASSOCIATE 0x00000005L /* to driver */ +#define IHV_CCX_EVENT_SEND_PACKET 0x00000006L /* to driver */ +#endif /* BCMCCX */ + +#define IHV_DRIVER_EVENT_GEN_INDICATION 0x00000011L /* from driver */ + + +#endif /* EXT_STA */ + +/* NAT configuration */ +typedef struct { + uint32 ipaddr; /* interface ip address */ + uint32 ipaddr_mask; /* interface ip address mask */ + uint32 ipaddr_gateway; /* gateway ip address */ + uint8 mac_gateway[6]; /* gateway mac address */ + uint32 ipaddr_dns; /* DNS server ip address, valid only for public if */ + uint8 mac_dns[6]; /* DNS server mac address, valid only for public if */ + uint8 GUID[38]; /* interface GUID */ +} nat_if_info_t; + +typedef struct { + uint op; /* operation code */ + bool pub_if; /* set for public if, clear for private if */ + nat_if_info_t if_info; /* interface info */ +} nat_cfg_t; + +/* op code in nat_cfg */ +#define NAT_OP_ENABLE 1 /* enable NAT on given interface */ +#define NAT_OP_DISABLE 2 /* disable NAT on given interface */ +#define NAT_OP_DISABLE_ALL 3 /* disable NAT on all interfaces */ + +/* NAT state */ +#define NAT_STATE_ENABLED 1 /* NAT is enabled */ +#define NAT_STATE_DISABLED 2 /* NAT is disabled */ + +typedef struct { + int state; /* NAT state returned */ +} nat_state_t; + +#ifdef PROP_TXSTATUS +/* Bit definitions for tlv iovar */ +/* + * enable RSSI signals: + * WLFC_CTL_TYPE_RSSI + */ +#define WLFC_FLAGS_RSSI_SIGNALS 1 + +/* enable (if/mac_open, if/mac_close,, mac_add, mac_del) signals: + * + * WLFC_CTL_TYPE_MAC_OPEN + * WLFC_CTL_TYPE_MAC_CLOSE + * + * WLFC_CTL_TYPE_INTERFACE_OPEN + * WLFC_CTL_TYPE_INTERFACE_CLOSE + * + * WLFC_CTL_TYPE_MACDESC_ADD + * WLFC_CTL_TYPE_MACDESC_DEL + * + */ +#define WLFC_FLAGS_XONXOFF_SIGNALS 2 + +/* enable (status, fifo_credit, mac_credit) signals + * WLFC_CTL_TYPE_MAC_REQUEST_CREDIT + * WLFC_CTL_TYPE_TXSTATUS + * WLFC_CTL_TYPE_FIFO_CREDITBACK + */ +#define WLFC_FLAGS_CREDIT_STATUS_SIGNALS 4 + +#define WLFC_FLAGS_HOST_PROPTXSTATUS_ACTIVE 8 +#define WLFC_FLAGS_PSQ_GENERATIONFSM_ENABLE 16 +#define WLFC_FLAGS_PSQ_ZERO_BUFFER_ENABLE 32 +#endif /* PROP_TXSTATUS */ + +#define BTA_STATE_LOG_SZ 64 + +/* BTAMP Statemachine states */ +enum { + HCIReset = 1, + HCIReadLocalAMPInfo, + HCIReadLocalAMPASSOC, + HCIWriteRemoteAMPASSOC, + HCICreatePhysicalLink, + HCIAcceptPhysicalLinkRequest, + HCIDisconnectPhysicalLink, + HCICreateLogicalLink, + HCIAcceptLogicalLink, + HCIDisconnectLogicalLink, + HCILogicalLinkCancel, + HCIAmpStateChange, + HCIWriteLogicalLinkAcceptTimeout +}; + +typedef struct flush_txfifo { + uint32 txfifobmp; + uint32 hwtxfifoflush; + struct ether_addr ea; +} flush_txfifo_t; + +#define CHANNEL_5G_LOW_START 36 /* 5G low (36..48) CDD enable/disable bit mask */ +#define CHANNEL_5G_MID_START 52 /* 5G mid (52..64) CDD enable/disable bit mask */ +#define CHANNEL_5G_HIGH_START 100 /* 5G high (100..140) CDD enable/disable bit mask */ +#define CHANNEL_5G_UPPER_START 149 /* 5G upper (149..161) CDD enable/disable bit mask */ + +enum { + SPATIAL_MODE_2G_IDX = 0, + SPATIAL_MODE_5G_LOW_IDX, + SPATIAL_MODE_5G_MID_IDX, + SPATIAL_MODE_5G_HIGH_IDX, + SPATIAL_MODE_5G_UPPER_IDX, + SPATIAL_MODE_MAX_IDX +}; + +#define WLC_TXCORE_MAX 4 /* max number of txcore supports */ +#define WLC_SUBBAND_MAX 4 /* max number of sub-band supports */ +typedef struct { + uint8 band2g[WLC_TXCORE_MAX]; + uint8 band5g[WLC_SUBBAND_MAX][WLC_TXCORE_MAX]; +} sar_limit_t; + +/* IOVAR "mempool" parameter. Used to retrieve a list of memory pool statistics. */ +typedef struct wl_mempool_stats { + int num; /* Number of memory pools */ + bcm_mp_stats_t s[1]; /* Variable array of memory pool stats. */ +} wl_mempool_stats_t; + +/* Network Offload Engine */ +#define NWOE_OL_ENABLE 0x00000001 + +typedef struct { + uint32 ipaddr; + uint32 ipaddr_netmask; + uint32 ipaddr_gateway; +} nwoe_ifconfig_t; + +/* + * Traffic management structures/defines. + */ + +/* Traffic management bandwidth parameters */ +#define TRF_MGMT_MAX_PRIORITIES 3 + +#define TRF_MGMT_FLAG_ADD_DSCP 0x0001 /* Add DSCP to IP TOS field */ +#define TRF_MGMT_FLAG_DISABLE_SHAPING 0x0002 /* Don't shape traffic */ +#define TRF_MGMT_FLAG_MANAGE_LOCAL_TRAFFIC 0x0008 /* Manage traffic over our local subnet */ +#define TRF_MGMT_FLAG_FILTER_ON_MACADDR 0x0010 /* filter on MAC address */ +#define TRF_MGMT_FLAG_NO_RX 0x0020 /* do not apply fiters to rx packets */ + +#define TRF_FILTER_MAC_ADDR 0x0001 /* L2 filter use dst mac address for filtering */ +#define TRF_FILTER_IP_ADDR 0x0002 /* L3 filter use ip ddress for filtering */ +#define TRF_FILTER_L4 0x0004 /* L4 filter use tcp/udp for filtering */ +#define TRF_FILTER_DWM 0x0008 /* L3 filter use DSCP for filtering */ +#define TRF_FILTER_FAVORED 0x0010 /* Tag the packet FAVORED */ + +/* Traffic management priority classes */ +typedef enum trf_mgmt_priority_class { + trf_mgmt_priority_low = 0, /* Maps to 802.1p BK */ + trf_mgmt_priority_medium = 1, /* Maps to 802.1p BE */ + trf_mgmt_priority_high = 2, /* Maps to 802.1p VI */ + trf_mgmt_priority_nochange = 3, /* do not update the priority */ + trf_mgmt_priority_invalid = (trf_mgmt_priority_nochange + 1) +} trf_mgmt_priority_class_t; + +/* Traffic management configuration parameters */ +typedef struct trf_mgmt_config { + uint32 trf_mgmt_enabled; /* 0 - disabled, 1 - enabled */ + uint32 flags; /* See TRF_MGMT_FLAG_xxx defines */ + uint32 host_ip_addr; /* My IP address to determine subnet */ + uint32 host_subnet_mask; /* My subnet mask */ + uint32 downlink_bandwidth; /* In units of kbps */ + uint32 uplink_bandwidth; /* In units of kbps */ + uint32 min_tx_bandwidth[TRF_MGMT_MAX_PRIORITIES]; /* Minimum guaranteed tx bandwidth */ + uint32 min_rx_bandwidth[TRF_MGMT_MAX_PRIORITIES]; /* Minimum guaranteed rx bandwidth */ +} trf_mgmt_config_t; + +/* Traffic management filter */ +typedef struct trf_mgmt_filter { + struct ether_addr dst_ether_addr; /* His L2 address */ + uint32 dst_ip_addr; /* His IP address */ + uint16 dst_port; /* His L4 port */ + uint16 src_port; /* My L4 port */ + uint16 prot; /* L4 protocol (only TCP or UDP) */ + uint16 flags; /* TBD. For now, this must be zero. */ + trf_mgmt_priority_class_t priority; /* Priority for filtered packets */ + uint32 dscp; /* DSCP */ +} trf_mgmt_filter_t; + +/* Traffic management filter list (variable length) */ +typedef struct trf_mgmt_filter_list { + uint32 num_filters; + trf_mgmt_filter_t filter[1]; +} trf_mgmt_filter_list_t; + +/* Traffic management global info used for all queues */ +typedef struct trf_mgmt_global_info { + uint32 maximum_bytes_per_second; + uint32 maximum_bytes_per_sampling_period; + uint32 total_bytes_consumed_per_second; + uint32 total_bytes_consumed_per_sampling_period; + uint32 total_unused_bytes_per_sampling_period; +} trf_mgmt_global_info_t; + +/* Traffic management shaping info per priority queue */ +typedef struct trf_mgmt_shaping_info { + uint32 gauranteed_bandwidth_percentage; + uint32 guaranteed_bytes_per_second; + uint32 guaranteed_bytes_per_sampling_period; + uint32 num_bytes_produced_per_second; + uint32 num_bytes_consumed_per_second; + uint32 num_queued_packets; /* Number of packets in queue */ + uint32 num_queued_bytes; /* Number of bytes in queue */ +} trf_mgmt_shaping_info_t; + +/* Traffic management shaping info array */ +typedef struct trf_mgmt_shaping_info_array { + trf_mgmt_global_info_t tx_global_shaping_info; + trf_mgmt_shaping_info_t tx_queue_shaping_info[TRF_MGMT_MAX_PRIORITIES]; + trf_mgmt_global_info_t rx_global_shaping_info; + trf_mgmt_shaping_info_t rx_queue_shaping_info[TRF_MGMT_MAX_PRIORITIES]; +} trf_mgmt_shaping_info_array_t; + + +/* Traffic management statistical counters */ +typedef struct trf_mgmt_stats { + uint32 num_processed_packets; /* Number of packets processed */ + uint32 num_processed_bytes; /* Number of bytes processed */ + uint32 num_discarded_packets; /* Number of packets discarded from queue */ +} trf_mgmt_stats_t; + +/* Traffic management statisics array */ +typedef struct trf_mgmt_stats_array { + trf_mgmt_stats_t tx_queue_stats[TRF_MGMT_MAX_PRIORITIES]; + trf_mgmt_stats_t rx_queue_stats[TRF_MGMT_MAX_PRIORITIES]; +} trf_mgmt_stats_array_t; + +typedef struct lpc_params { + /* LPC Params exposed via IOVAR */ + uint8 rate_stab_thresh; /* Thresh for rate stability based on nupd */ + uint8 pwr_stab_thresh; /* Number of successes before power step down */ + uint8 lpc_exp_time; /* Time lapse for expiry of database */ + uint8 pwrup_slow_step; /* Step size for slow step up */ + uint8 pwrup_fast_step; /* Step size for fast step up */ + uint8 pwrdn_slow_step; /* Step size for slow step down */ +} lpc_params_t; + +/* tx pkt delay statistics */ +#define SCB_RETRY_SHORT_DEF 7 /* Default Short retry Limit */ +#define WLPKTDLY_HIST_NBINS 16 /* number of bins used in the Delay histogram */ + +/* structure to store per-AC delay statistics */ +typedef struct scb_delay_stats { + uint32 txmpdu_lost; /* number of MPDUs lost */ + uint32 txmpdu_cnt[SCB_RETRY_SHORT_DEF]; /* retry times histogram */ + uint32 delay_sum[SCB_RETRY_SHORT_DEF]; /* cumulative packet latency */ + uint32 delay_min; /* minimum packet latency observed */ + uint32 delay_max; /* maximum packet latency observed */ + uint32 delay_avg; /* packet latency average */ + uint32 delay_hist[WLPKTDLY_HIST_NBINS]; /* delay histogram */ +} scb_delay_stats_t; + +/* structure for txdelay event */ +typedef struct txdelay_event { + uint8 status; + int rssi; + chanim_stats_t chanim_stats; + scb_delay_stats_t delay_stats[AC_COUNT]; +} txdelay_event_t; + +/* structure for txdelay parameters */ +typedef struct txdelay_params { + uint16 ratio; /* Avg Txdelay Delta */ + uint8 cnt; /* Sample cnt */ + uint8 period; /* Sample period */ + uint8 tune; /* Debug */ +} txdelay_params_t; + +/* WNM/NPS subfeatures mask */ +#define WL_WNM_BSSTRANS 0x00000001 +#define WL_WNM_PROXYARP 0x00000002 +#define WL_WNM_MAXIDLE 0x00000004 +#define WL_WNM_TIMBC 0x00000008 +#define WL_WNM_TFS 0x00000010 +#define WL_WNM_SLEEP 0x00000020 +#define WL_WNM_DMS 0x00000040 +#define WL_WNM_FMS 0x00000080 +#define WL_WNM_NOTIF 0x00000100 +#define WL_WNM_MAX 0x00000200 + +enum { + WNM_SERVICE_DMS = 1, + WNM_SERVICE_FMS = 2, + WNM_SERVICE_TFS = 3 +}; + +/* Definitions for WNM/NPS TCLAS */ +typedef struct wl_tclas { + uint8 user_priority; + uint8 fc_len; + dot11_tclas_fc_t fc; +} wl_tclas_t; + +#define WL_TCLAS_FIXED_SIZE OFFSETOF(wl_tclas_t, fc) + +typedef struct wl_tclas_list { + uint32 num; + wl_tclas_t tclas[1]; +} wl_tclas_list_t; + +/* Definitions for WNM/NPS Traffic Filter Service */ +typedef struct wl_tfs_filter { + uint8 status; /* Status returned by the AP */ + uint8 tclas_proc; /* TCLAS processing value (0:and, 1:or) */ + uint8 tclas_cnt; /* count of all wl_tclas_t in tclas array */ + uint8 tclas[1]; /* VLA of wl_tclas_t */ +} wl_tfs_filter_t; +#define WL_TFS_FILTER_FIXED_SIZE OFFSETOF(wl_tfs_filter_t, tclas) + +typedef struct wl_tfs_fset { + struct ether_addr ea; /* Address of AP/STA involved with this filter set */ + uint8 tfs_id; /* TFS ID field chosen by STA host */ + uint8 status; /* Internal status TFS_STATUS_xxx */ + uint8 actcode; /* Action code DOT11_TFS_ACTCODE_xxx */ + uint8 token; /* Token used in last request frame */ + uint8 notify; /* Notify frame sent/received because of this set */ + uint8 filter_cnt; /* count of all wl_tfs_filter_t in filter array */ + uint8 filter[1]; /* VLA of wl_tfs_filter_t */ +} wl_tfs_fset_t; +#define WL_TFS_FSET_FIXED_SIZE OFFSETOF(wl_tfs_fset_t, filter) + +enum { + TFS_STATUS_DISABLED = 0, /* TFS filter set disabled by user */ + TFS_STATUS_DISABLING = 1, /* Empty request just sent to AP */ + TFS_STATUS_VALIDATED = 2, /* Filter set validated by AP (but maybe not enabled!) */ + TFS_STATUS_VALIDATING = 3, /* Filter set just sent to AP */ + TFS_STATUS_NOT_ASSOC = 4, /* STA not associated */ + TFS_STATUS_NOT_SUPPORT = 5, /* TFS not supported by AP */ + TFS_STATUS_DENIED = 6, /* Filter set refused by AP (=> all sets are disabled!) */ +}; + +typedef struct wl_tfs_status { + uint8 fset_cnt; /* count of all wl_tfs_fset_t in fset array */ + wl_tfs_fset_t fset[1]; /* VLA of wl_tfs_fset_t */ +} wl_tfs_status_t; + +typedef struct wl_tfs_set { + uint8 send; /* Immediatly register registered sets on AP side */ + uint8 tfs_id; /* ID of a specific set (existing or new), or 0 for all */ + uint8 actcode; /* Action code for this filter set */ + uint8 tclas_proc; /* TCLAS processing operator for this filter set */ +} wl_tfs_set_t; + +enum { + TFS_TERM_SEND_NOW = 1, /* Send the TFS frame immediatly */ + TFS_TERM_DELETE = 2 /* Also delete set internally */ +}; + +typedef struct wl_tfs_term { + uint8 flags; /* Bitfield of WL_TFS_TERM_xxx */ + uint8 tfs_id; /* ID of a specific set (existing), or 0 for all */ +} wl_tfs_term_t; + + +/* Definitions for WNM/NPS Directed Multicast Service */ +enum { + DMS_STATUS_DISABLED = 0, /* DMS desc disabled by user */ + DMS_STATUS_ACCEPTED = 1, /* Request accepted by AP */ + DMS_STATUS_NOT_ASSOC = 2, /* STA not associated */ + DMS_STATUS_NOT_SUPPORT = 3, /* DMS not supported by AP */ + DMS_STATUS_DENIED = 4, /* Request denied by AP */ + DMS_STATUS_TERM = 5, /* Request terminated by AP */ + DMS_STATUS_REMOVING = 6, /* Remove request just sent */ + DMS_STATUS_ADDING = 7, /* Add request just sent */ + DMS_STATUS_ERROR = 8 /* Non compliant AP behvior */ +}; + +typedef struct wl_dms_desc { + uint8 user_id; + uint8 status; + uint8 token; + uint8 dms_id; + uint8 tclas_proc; + uint8 mac_len; /* length of all ether_addr in data array, 0 if STA */ + uint8 tclas_len; /* length of all wl_tclas_t in data array */ + uint8 data[1]; /* VLA of 'ether_addr' and 'wl_tclas_t' (in this order ) */ +} wl_dms_desc_t; + +#define WL_DMS_DESC_FIXED_SIZE OFFSETOF(wl_dms_desc_t, data) + +typedef struct wl_dms_status { + uint32 cnt; + wl_dms_desc_t desc[1]; +} wl_dms_status_t; + +typedef struct wl_dms_set { + uint8 send; + uint8 user_id; + uint8 tclas_proc; +} wl_dms_set_t; + +typedef struct wl_dms_term { + uint8 del; + uint8 user_id; +} wl_dms_term_t; + +typedef struct wl_service_term { + uint8 service; + union { + wl_dms_term_t dms; + } u; +} wl_service_term_t; + +/* Definitions for WNM/NPS BSS Transistion */ +typedef struct wl_bsstrans_req { + uint16 tbtt; /* time of BSS to end of life, in unit of TBTT */ + uint16 dur; /* time of BSS to keep off, in unit of minute */ + uint8 reqmode; /* request mode of BSS transition request */ + uint8 unicast; /* request by unicast or by broadcast */ +} wl_bsstrans_req_t; + +/* Definitions for WNM/NPS TIM Broadcast */ +typedef struct wl_timbc_offset { + int16 offset; /* offset in us */ + uint16 fix_intv; /* override interval sent from STA */ + uint16 rate_override; /* use rate override to send high rate TIM broadcast frame */ + uint8 tsf_present; /* show timestamp in TIM broadcast frame */ +} wl_timbc_offset_t; + +typedef struct wl_timbc_set { + uint8 interval; /* Interval in DTIM wished or required. */ + uint8 flags; /* Bitfield described below */ + uint16 rate_min; /* Minimum rate required for High/Low TIM frames. Optionnal */ + uint16 rate_max; /* Maximum rate required for High/Low TIM frames. Optionnal */ +} wl_timbc_set_t; + +enum { + WL_TIMBC_SET_TSF_REQUIRED = 1, /* Enable TIMBC only if TSF in TIM frames */ + WL_TIMBC_SET_NO_OVERRIDE = 2, /* ... if AP does not override interval */ + WL_TIMBC_SET_PROXY_ARP = 4, /* ... if AP support Proxy ARP */ + WL_TIMBC_SET_DMS_ACCEPTED = 8 /* ... if all DMS desc have been accepted */ +}; + +typedef struct wl_timbc_status { + uint8 status_sta; /* Status from internal state machine (check below) */ + uint8 status_ap; /* From AP response frame (check 8.4.2.86 from 802.11) */ + uint8 interval; + uint8 pad; + int32 offset; + uint16 rate_high; + uint16 rate_low; +} wl_timbc_status_t; + +enum { + WL_TIMBC_STATUS_DISABLE = 0, /* TIMBC disabled by user */ + WL_TIMBC_STATUS_REQ_MISMATCH = 1, /* AP settings do no match user requirements */ + WL_TIMBC_STATUS_NOT_ASSOC = 2, /* STA not associated */ + WL_TIMBC_STATUS_NOT_SUPPORT = 3, /* TIMBC not supported by AP */ + WL_TIMBC_STATUS_DENIED = 4, /* Req to disable TIMBC sent to AP */ + WL_TIMBC_STATUS_ENABLE = 5 /* TIMBC enabled */ +}; + +#define WL_TIMBC_STATUS_AP_UNKNOWN 255 /* AP status for internal use only */ + +/* Definitions for PM2 Dynamic Fast Return To Sleep */ +typedef struct wl_pm2_sleep_ret_ext { + uint8 logic; /* DFRTS logic: see WL_DFRTS_LOGIC_* below */ + uint16 low_ms; /* Low FRTS timeout */ + uint16 high_ms; /* High FRTS timeout */ + uint16 rx_pkts_threshold; /* switching threshold: # rx pkts */ + uint16 tx_pkts_threshold; /* switching threshold: # tx pkts */ + uint16 txrx_pkts_threshold; /* switching threshold: # (tx+rx) pkts */ + uint32 rx_bytes_threshold; /* switching threshold: # rx bytes */ + uint32 tx_bytes_threshold; /* switching threshold: # tx bytes */ + uint32 txrx_bytes_threshold; /* switching threshold: # (tx+rx) bytes */ +} wl_pm2_sleep_ret_ext_t; + +#define WL_DFRTS_LOGIC_OFF 0 /* Feature is disabled */ +#define WL_DFRTS_LOGIC_OR 1 /* OR all non-zero threshold conditions */ +#define WL_DFRTS_LOGIC_AND 2 /* AND all non-zero threshold conditions */ + +/* Definitions for Reliable Multicast */ +#define WL_RELMCAST_MAX_CLIENT 32 +#define WL_RELMCAST_FLAG_INBLACKLIST 1 +#define WL_RELMCAST_FLAG_ACTIVEACKER 2 +#define WL_RELMCAST_FLAG_RELMCAST 4 + +#define WL_RELMCAST_VER 1 + +typedef struct wl_relmcast_client { + uint8 flag; + int16 rssi; + struct ether_addr addr; +} wl_relmcast_client_t; + +typedef struct wl_relmcast_st { + uint8 ver; + uint8 num; + wl_relmcast_client_t clients[WL_RELMCAST_MAX_CLIENT]; +} wl_relmcast_status_t; + +/* structures for proximity detection device role */ +#define WL_PROXD_MODE_DISABLE 0 +#define WL_PROXD_MODE_NEUTRAL 1 +#define WL_PROXD_MODE_INITIATOR 2 +#define WL_PROXD_MODE_TARGET 3 +#define WL_PROXD_RANDOM_WAKEUP 0x8000 + +typedef struct wl_proxd_iovar { + uint16 method; /* Proxmity Detection method */ + uint16 mode; /* Mode (neutral, initiator, target) */ +} wl_proxd_iovar_t; + +/* structures for proximity detection parameters */ +typedef struct wl_proxd_params_rssi_method { + chanspec_t chanspec; /* chanspec for home channel */ + uint16 interval; /* interval between neighbor finding attempts (in TU) */ + uint16 duration; /* duration of neighbor finding attempts (in ms) */ + int16 rssi_thresh; /* RSSI threshold (in dBm) */ + int16 tx_power; /* tx power of Proximity Detection frames (in dBm) */ + uint16 tx_rate; /* tx rate of Proximity Detection frames + * (in 500kbps units) + */ + uint16 timeout; /* state machine wait timeout of the frames (in ms) */ + uint16 maxconvergtmo; /* max wait converge timeout (in ms) */ +} wl_proxd_params_rssi_method_t; + +typedef struct wl_proxd_params_iovar { + uint16 method; /* Proxmity Detection method */ + union { + wl_proxd_params_rssi_method_t rssi_params; + } u; /* Method specific optional parameters */ +} wl_proxd_params_iovar_t; + +enum { + RSSI_REASON_UNKNOW, + RSSI_REASON_LOWRSSI, + RSSI_REASON_NSYC, + RSSI_REASON_TIMEOUT +}; + +enum { + RSSI_STATE_POLL, + RSSI_STATE_TPAIRING, + RSSI_STATE_IPAIRING, + RSSI_STATE_THANDSHAKE, + RSSI_STATE_IHANDSHAKE, + RSSI_STATE_CONFIRMED, + RSSI_STATE_PIPELINE, + RSSI_STATE_NEGMODE, + RSSI_STATE_MONITOR, + RSSI_STATE_LAST +}; + +typedef struct wl_proxd_status_iovar { + uint8 mode; + uint8 peermode; + uint8 state; + uint8 reason; + uint32 txcnt; + uint32 rxcnt; + struct ether_addr peer; + int16 hi_rssi; + int16 low_rssi; +} wl_proxd_status_iovar_t; + +#ifdef NET_DETECT + +#define NET_DETECT_MAX_WAKE_DATA_SIZE 2048 +#define NET_DETECT_MAX_PROFILES 16 +#define NET_DETECT_MAX_CHANNELS 50 + +typedef struct net_detect_adapter_features { + bool wowl_enabled; + bool net_detect_enabled; + bool nlo_enabled; +} net_detect_adapter_features_t; + +typedef enum net_detect_bss_type { + nd_bss_any = 0, + nd_ibss, + nd_ess +} net_detect_bss_type_t; + +typedef struct net_detect_profile { + wlc_ssid_t ssid; + net_detect_bss_type_t bss_type; /* Ignore for now since Phase 1 is only for ESS */ + uint32 cipher_type; /* DOT11_CIPHER_ALGORITHM enumeration values */ + uint32 auth_type; /* DOT11_AUTH_ALGORITHM enumeration values */ +} net_detect_profile_t; + +typedef struct net_detect_profile_list { + uint32 num_nd_profiles; + net_detect_profile_t nd_profile[0]; +} net_detect_profile_list_t; + +typedef struct net_detect_config { + bool nd_enabled; + uint32 scan_interval; + uint32 wait_period; + bool wake_if_connected; + bool wake_if_disconnected; + net_detect_profile_list_t nd_profile_list; +} net_detect_config_t; + +typedef enum net_detect_wake_reason { + nd_reason_unknown, + nd_net_detected, + nd_wowl_event, + nd_ucode_error +} net_detect_wake_reason_t; + +typedef struct net_detect_wake_data { + net_detect_wake_reason_t nd_wake_reason; + uint32 nd_wake_date_length; + uint8 nd_wake_data[0]; /* Wake data (currently unused) */ +} net_detect_wake_data_t; + +#endif /* NET_DETECT */ + +#endif /* LINUX_POSTMOGRIFY_REMOVAL */ + +typedef struct bcnreq { + uint8 bcn_mode; + int dur; + int channel; + struct ether_addr da; + uint16 random_int; + wlc_ssid_t ssid; + uint16 reps; +} bcnreq_t; + +typedef struct rrmreq { + struct ether_addr da; + uint8 reg; + uint8 chan; + uint16 random_int; + uint16 dur; + uint16 reps; +} rrmreq_t; + +typedef struct framereq { + struct ether_addr da; + uint8 reg; + uint8 chan; + uint16 random_int; + uint16 dur; + struct ether_addr ta; + uint16 reps; +} framereq_t; + +typedef struct statreq { + struct ether_addr da; + struct ether_addr peer; + uint16 random_int; + uint16 dur; + uint8 group_id; + uint16 reps; +} statreq_t; + +typedef struct wlc_l2keepalive_ol_params { + uint8 flags; + uint8 prio; + uint16 period_ms; +} wlc_l2keepalive_ol_params_t; + +typedef struct wlc_dwds_config { + uint32 enable; + uint32 mode; /* STA/AP interface */ + struct ether_addr ea; +} wlc_dwds_config_t; + +/* Video Traffic Interference Monitor config */ +#define INTFER_VERSION 1 +typedef struct wl_intfer_params { + uint16 version; /* version */ + uint8 period; /* sample period */ + uint8 cnt; /* sample cnt */ + uint8 txfail_thresh; /* non-TCP txfail threshold */ + uint8 tcptxfail_thresh; /* tcptxfail threshold */ +} wl_intfer_params_t; + +typedef struct wl_staprio_cfg { + struct ether_addr ea; /* mac addr */ + uint8 prio; /* scb priority */ +} wl_staprio_cfg_t; + +#endif /* _wlioctl_h_ */ diff --git a/external/cache/sources/wl/shared/Android.mk b/external/cache/sources/wl/shared/Android.mk new file mode 100644 index 0000000..eefe77d --- /dev/null +++ b/external/cache/sources/wl/shared/Android.mk @@ -0,0 +1,17 @@ +LOCAL_PATH:= $(call my-dir) + +OBJS_c := bcmutils.c bcmwifi_channels.c bcm_app_utils.c miniopt.c wlu_client_shared.c wlu_common.c wlu_pipe.c wlu_pipe_linux.c +INCLUDES := $(LOCAL_PATH)/../include $(LOCAL_PATH)/../wl +L_CFLAGS := -DBCMWPA2 -DWLCNT -DWLBTAMP -Wextra -DWLPFN -DWLPFN_AUTO_CONNECT -DLINUX -DRWLASD -DRWL_SOCKET -DRWL_DONGLE -DRWL_WIFI +L_CFLAGS += -DSDTEST -DTARGETENV_android -Dlinux -DLINUX -DD11AC_IOTYPES +#IFLAGS += -DIL_BIGENDIAN + +include $(CLEAR_VARS) +LOCAL_MODULE := libshared +LOCAL_MODULE_TAGS := debug tests +LOCAL_SHARED_LIBRARIES := libcutils +LOCAL_CFLAGS = $(L_CFLAGS) +LOCAL_SRC_FILES := $(OBJS_c) +LOCAL_C_INCLUDES := $(INCLUDES) +#LOCAL_INCLUDES = $(LOCAL_PATH) +include $(BUILD_STATIC_LIBRARY) diff --git a/external/cache/sources/wl/shared/Makefile b/external/cache/sources/wl/shared/Makefile new file mode 100644 index 0000000..82de232 --- /dev/null +++ b/external/cache/sources/wl/shared/Makefile @@ -0,0 +1,27 @@ +CC = $(CROSS_COMPILE)gcc + +#IFLAGS := -I../include -I../wl -I../shared -g -Wall -static +IFLAGS := -I../include -I../wl -I../shared -g -Wall +DFLAGS := -DBCMWPA2 -DWLCNT -DWLBTAMP -Wextra -DWLPFN -DWLPFN_AUTO_CONNECT -DLINUX -DRWLASD -DRWL_SOCKET -DRWL_DONGLE -DRWL_WIFI -DD11AC_IOTYPES +#IFLAGS += -DIL_BIGENDIAN + +obj-shared = \ + bcmutils.o \ + bcmwifi_channels.o \ + bcm_app_utils.o \ + miniopt.o \ + wlu_client_shared.o \ + wlu_common.o \ + wlu_pipe.o \ + wlu_pipe_linux.o \ + +CFLAGS := $(IFLAGS) $(DFLAGS) + +LIBSHARED = libshared.a + +$(LIBSHARED): $(obj-shared) + ar rscv $(LIBSHARED) $(obj-shared) +# $(CC) $(obj-shared) -shared -o $(LIBSHARED) + +clean: + -rm -f *.o *.a *.so diff --git a/external/cache/sources/wl/shared/bcm_app_utils.c b/external/cache/sources/wl/shared/bcm_app_utils.c new file mode 100644 index 0000000..f35f683 --- /dev/null +++ b/external/cache/sources/wl/shared/bcm_app_utils.c @@ -0,0 +1,236 @@ +/* + * Misc utility routines used by kernel or app-level. + * Contents are wifi-specific, used by any kernel or app-level + * software that might want wifi things as it grows. + * + * $Copyright Open Broadcom Corporation$ + * $Id: bcm_app_utils.c 401759 2013-05-13 16:08:08Z sudhirbs $ + */ + +#include + +#ifdef BCMDRIVER +#include +#include +#define strtoul(nptr, endptr, base) bcm_strtoul((nptr), (endptr), (base)) +#define tolower(c) (bcm_isupper((c)) ? ((c) + 'a' - 'A') : (c)) +#elif defined(__IOPOS__) +#include +#define strtoul(nptr, endptr, base) bcm_strtoul((nptr), (endptr), (base)) +#define tolower(c) (bcm_tolower((c))) +#ifndef ASSERT +#define ASSERT(exp) +#endif +#else /* BCMDRIVER */ +#include +#include +#include +#ifndef ASSERT +#define ASSERT(exp) +#endif +#endif /* BCMDRIVER */ +#include + +#if defined(WIN32) && (defined(BCMDLL) || defined(WLMDLL)) +#include /* For wl/exe/GNUmakefile.brcm_wlu and GNUmakefile.wlm_dll */ +#endif + +#include +#include + +cca_congest_channel_req_t * +cca_per_chan_summary(cca_congest_channel_req_t *input, cca_congest_channel_req_t *avg, + bool percent); + +int +cca_analyze(cca_congest_channel_req_t *input[], int num_chans, uint flags, chanspec_t *answer); + +/* Take an array of measurments representing a single channel over time and return + a summary. Currently implemented as a simple average but could easily evolve + into more cpomplex alogrithms. +*/ +cca_congest_channel_req_t * +cca_per_chan_summary(cca_congest_channel_req_t *input, cca_congest_channel_req_t *avg, bool percent) +{ + int sec; + cca_congest_t totals; + + totals.duration = 0; + totals.congest_ibss = 0; + totals.congest_obss = 0; + totals.interference = 0; + avg->num_secs = 0; + + for (sec = 0; sec < input->num_secs; sec++) { + if (input->secs[sec].duration) { + totals.duration += input->secs[sec].duration; + totals.congest_ibss += input->secs[sec].congest_ibss; + totals.congest_obss += input->secs[sec].congest_obss; + totals.interference += input->secs[sec].interference; + avg->num_secs++; + } + } + avg->chanspec = input->chanspec; + + if (!avg->num_secs || !totals.duration) + return (avg); + + if (percent) { + avg->secs[0].duration = totals.duration / avg->num_secs; + avg->secs[0].congest_ibss = totals.congest_ibss * 100/totals.duration; + avg->secs[0].congest_obss = totals.congest_obss * 100/totals.duration; + avg->secs[0].interference = totals.interference * 100/totals.duration; + } else { + avg->secs[0].duration = totals.duration / avg->num_secs; + avg->secs[0].congest_ibss = totals.congest_ibss / avg->num_secs; + avg->secs[0].congest_obss = totals.congest_obss / avg->num_secs; + avg->secs[0].interference = totals.interference / avg->num_secs; + } + + return (avg); +} + +static void +cca_info(uint8 *bitmap, int num_bits, int *left, int *bit_pos) +{ + int i; + for (*left = 0, i = 0; i < num_bits; i++) { + if (isset(bitmap, i)) { + (*left)++; + *bit_pos = i; + } + } +} + +static uint8 +spec_to_chan(chanspec_t chspec) +{ + uint8 center_ch, edge, primary, sb; + + center_ch = CHSPEC_CHANNEL(chspec); + + if (CHSPEC_IS20(chspec)) { + return center_ch; + } else { + /* the lower edge of the wide channel is half the bw from + * the center channel. + */ + if (CHSPEC_IS40(chspec)) { + edge = center_ch - CH_20MHZ_APART; + } else { + /* must be 80MHz (until we support more) */ + ASSERT(CHSPEC_IS80(chspec)); + edge = center_ch - CH_40MHZ_APART; + } + + /* find the channel number of the lowest 20MHz primary channel */ + primary = edge + CH_10MHZ_APART; + + /* select the actual subband */ + sb = (chspec & WL_CHANSPEC_CTL_SB_MASK) >> WL_CHANSPEC_CTL_SB_SHIFT; + primary = primary + sb * CH_20MHZ_APART; + + return primary; + } +} + +#define CCA_THRESH_MILLI 14 +#define CCA_THRESH_INTERFERE 6 + +/* + Take an array of measumrements representing summaries of different channels. + Return a recomended channel. + Interference is evil, get rid of that first. + Then hunt for lowest Other bss traffic. + Don't forget that channels with low duration times may not have accurate readings. + For the moment, do not overwrite input array. +*/ +int +cca_analyze(cca_congest_channel_req_t *input[], int num_chans, uint flags, chanspec_t *answer) +{ + uint8 bitmap[CEIL(MAX_CCA_CHANNELS, NBBY)]; /* 38 Max channels needs 5 bytes = 40 */ + int i, left, winner; + uint32 min_obss = 1 << 30; + + ASSERT(num_chans < MAX_CCA_CHANNELS); + for (i = 0; i < (int)sizeof(bitmap); i++) + bitmap[i] = 0; + + /* Initially, all channels are up for consideration */ + for (i = 0; i < num_chans; i++) { + if (input[i]->chanspec) + setbit(bitmap, i); + } + cca_info(bitmap, num_chans, &left, &i); + if (!left) + return CCA_ERRNO_TOO_FEW; + + /* Filter for 2.4 GHz Band */ + if (flags & CCA_FLAG_2G_ONLY) { + for (i = 0; i < num_chans; i++) { + if (!CHSPEC_IS2G(input[i]->chanspec)) + clrbit(bitmap, i); + } + } + cca_info(bitmap, num_chans, &left, &i); + if (!left) + return CCA_ERRNO_BAND; + + /* Filter for 5 GHz Band */ + if (flags & CCA_FLAG_5G_ONLY) { + for (i = 0; i < num_chans; i++) { + if (!CHSPEC_IS5G(input[i]->chanspec)) + clrbit(bitmap, i); + } + } + cca_info(bitmap, num_chans, &left, &i); + if (!left) + return CCA_ERRNO_BAND; + + /* Filter for Duration */ + if (!(flags & CCA_FLAG_IGNORE_DURATION)) { + for (i = 0; i < num_chans; i++) { + if (input[i]->secs[0].duration < CCA_THRESH_MILLI) + clrbit(bitmap, i); + } + } + cca_info(bitmap, num_chans, &left, &i); + if (!left) + return CCA_ERRNO_DURATION; + + /* Filter for 1 6 11 on 2.4 Band */ + if (flags & CCA_FLAGS_PREFER_1_6_11) { + int tmp_channel = spec_to_chan(input[i]->chanspec); + int is2g = CHSPEC_IS2G(input[i]->chanspec); + for (i = 0; i < num_chans; i++) { + if (is2g && tmp_channel != 1 && tmp_channel != 6 && tmp_channel != 11) + clrbit(bitmap, i); + } + } + cca_info(bitmap, num_chans, &left, &i); + if (!left) + return CCA_ERRNO_PREF_CHAN; + + /* Toss high interference interference */ + if (!(flags & CCA_FLAG_IGNORE_INTERFER)) { + for (i = 0; i < num_chans; i++) { + if (input[i]->secs[0].interference > CCA_THRESH_INTERFERE) + clrbit(bitmap, i); + } + cca_info(bitmap, num_chans, &left, &i); + if (!left) + return CCA_ERRNO_INTERFER; + } + + /* Now find lowest obss */ + winner = 0; + for (i = 0; i < num_chans; i++) { + if (isset(bitmap, i) && input[i]->secs[0].congest_obss < min_obss) { + winner = i; + min_obss = input[i]->secs[0].congest_obss; + } + } + *answer = input[winner]->chanspec; + + return 0; +} diff --git a/external/cache/sources/wl/shared/bcmutils.c b/external/cache/sources/wl/shared/bcmutils.c new file mode 100644 index 0000000..1f67a71 --- /dev/null +++ b/external/cache/sources/wl/shared/bcmutils.c @@ -0,0 +1,3597 @@ +/* + * Driver O/S-independent utility routines + * + * $Copyright Open Broadcom Corporation$ + * $Id: bcmutils.c 401759 2013-05-13 16:08:08Z sudhirbs $ + */ + +#include +#include +#include +#if defined(__FreeBSD__) || defined(__NetBSD__) +#include +#if __NetBSD_Version__ >= 500000003 +#include +#else +#include +#endif +#else +#include +#endif /* NetBSD */ +#ifdef BCMDRIVER + +#include +#include +#if !defined(BCMDONGLEHOST) || defined(BCMNVRAM) || defined(WLC_LOW) +#include +#include +#endif + +#else /* !BCMDRIVER */ + +#include +#include +#include + +#if defined(BCMEXTSUP) +#include +#endif + +#ifdef DSLCPE +#ifndef ASSERT +#define ASSERT(exp) +#endif +#endif /* DSLCPE */ + +#endif /* !BCMDRIVER */ + +#if defined(_WIN32) || defined(NDIS) || defined(vxworks) || defined(__vxworks) || defined(_CFE_) +/* xxx debatable */ +#include +#endif +#include +#include +#include +#include +#include +#include +#include +#ifdef BCMPERFSTATS +#include +#endif +#include +void *_bcmutils_dummy_fn = NULL; + +#ifdef BCMDRIVER + +#ifdef WLC_LOW +/* nvram vars cache */ +static char *nvram_vars = NULL; +static int vars_len = -1; +#endif /* WLC_LOW */ + +#if !defined(BCMDONGLEHOST) +int +BCMATTACHFN(pktpool_init)(osl_t *osh, pktpool_t *pktp, int *pplen, int plen, bool istx) +{ + int i, err = BCME_OK; + void *p; + int pktplen; + + ASSERT(pktp != NULL); + ASSERT(osh != NULL); + ASSERT(pplen != NULL); + + pktplen = *pplen; + + bzero(pktp, sizeof(pktpool_t)); + pktp->inited = TRUE; + pktp->istx = istx ? TRUE : FALSE; + pktp->plen = (uint16)plen; + *pplen = 0; + + pktp->maxlen = PKTPOOL_LEN_MAX; + if (pktplen > pktp->maxlen) + pktplen = pktp->maxlen; + + for (i = 0; i < pktplen; i++) { + p = PKTGET(osh, plen, pktp->istx); + if (p == NULL) { + /* Not able to allocate all requested pkts + * so just return what was actually allocated + * We can add to the pool later + */ + if (pktp->w == 0) + err = BCME_NOMEM; + + goto exit; + } + + PKTSETPOOL(osh, p, TRUE, pktp); + pktp->q[i] = p; + pktp->w++; + pktp->len++; +#ifdef BCMDBG_POOL + pktp->dbg_q[pktp->dbg_qlen++].p = p; +#endif + } + +exit: + *pplen = pktp->w; + pktp->len++; /* Add one for end */ + return err; +} + +int +BCMATTACHFN(pktpool_deinit)(osl_t *osh, pktpool_t *pktp) +{ + int i; + int cnt; + + ASSERT(osh != NULL); + ASSERT(pktp != NULL); + + cnt = pktp->len; + for (i = 0; i < cnt; i++) { + if (pktp->q[i] != NULL) { + PKTSETPOOL(osh, pktp->q[i], FALSE, NULL); + PKTFREE(osh, pktp->q[i], pktp->istx); + pktp->q[i] = NULL; + pktp->len--; + } +#ifdef BCMDBG_POOL + if (pktp->dbg_q[i].p != NULL) + pktp->dbg_q[i].p = NULL; +#endif + } + pktp->inited = FALSE; + + /* Are there still pending pkts? */ + ASSERT(pktpool_len(pktp) == 0); + + return 0; +} + +int +pktpool_fill(osl_t *osh, pktpool_t *pktp, bool minimal) +{ + void *p; + int err = 0; + int len, psize, maxlen; + + ASSERT(pktpool_plen(pktp) != 0); + + maxlen = pktpool_maxlen(pktp); + psize = minimal ? (maxlen >> 2) : maxlen; + len = pktpool_len(pktp); + for (; len < psize; len++) { + p = PKTGET(osh, pktpool_plen(pktp), FALSE); + if (p == NULL) { + err = BCME_NOMEM; + break; + } + + if (pktpool_add(pktp, p) != BCME_OK) { + PKTFREE(osh, p, FALSE); + err = BCME_ERROR; + break; + } + } + + return err; +} + +uint16 +pktpool_avail(pktpool_t *pktp) +{ + if (pktp->w == pktp->r) + return 0; + + return (pktp->w > pktp->r) ? (pktp->w - pktp->r) : ((pktp->len) - (pktp->r - pktp->w)); +} + +static void * +pktpool_deq(pktpool_t *pktp) +{ + void *p; + + if (pktp->r == pktp->w) + return NULL; + + p = pktp->q[pktp->r]; + ASSERT(p != NULL); + + pktp->q[pktp->r++] = NULL; + pktp->r %= (pktp->len); + + return p; +} + +static void +pktpool_enq(pktpool_t *pktp, void *p) +{ + uint16 next; + + ASSERT(p != NULL); + + next = (pktp->w + 1) % (pktp->len); + if (next == pktp->r) { + /* Should not happen; otherwise pkt leak */ + ASSERT(0); + return; + } + + ASSERT(pktp->q[pktp->w] == NULL); + +#ifdef BCMDBG_ASSERT + if (pktpool_avail(pktp)) { + int prev = (pktp->w == 0) ? (pktp->len - 1) : (pktp->w - 1); + ASSERT(pktp->q[prev] != p); + } +#endif + pktp->q[pktp->w] = p; + pktp->w = next; +} + +int +BCMATTACHFN(pktpool_avail_register)(pktpool_t *pktp, pktpool_cb_t cb, void *arg) +{ + int i; + + ASSERT(cb != NULL); + + i = pktp->cbcnt; + if (i == PKTPOOL_CB_MAX) + return BCME_ERROR; + + ASSERT(pktp->cbs[i].cb == NULL); + pktp->cbs[i].cb = cb; + pktp->cbs[i].arg = arg; + pktp->cbcnt++; + + return 0; +} + +int +BCMATTACHFN(pktpool_empty_register)(pktpool_t *pktp, pktpool_cb_t cb, void *arg) +{ + int i; + + ASSERT(cb != NULL); + + i = pktp->ecbcnt; + if (i == PKTPOOL_CB_MAX) + return BCME_ERROR; + + ASSERT(pktp->ecbs[i].cb == NULL); + pktp->ecbs[i].cb = cb; + pktp->ecbs[i].arg = arg; + pktp->ecbcnt++; + + return 0; +} + +static int +pktpool_empty_notify(pktpool_t *pktp) +{ + int i; + + pktp->empty = TRUE; + for (i = 0; i < pktp->ecbcnt; i++) { + ASSERT(pktp->ecbs[i].cb != NULL); + pktp->ecbs[i].cb(pktp, pktp->ecbs[i].arg); + } + pktp->empty = FALSE; + + return 0; +} + +#ifdef BCMDBG_POOL +int +pktpool_dbg_register(pktpool_t *pktp, pktpool_cb_t cb, void *arg) +{ + int i; + + ASSERT(cb); + + i = pktp->dbg_cbcnt; + if (i == PKTPOOL_CB_MAX) + return BCME_ERROR; + + ASSERT(pktp->dbg_cbs[i].cb == NULL); + pktp->dbg_cbs[i].cb = cb; + pktp->dbg_cbs[i].arg = arg; + pktp->dbg_cbcnt++; + + return 0; +} + +int pktpool_dbg_notify(pktpool_t *pktp); + +int +pktpool_dbg_notify(pktpool_t *pktp) +{ + int i; + + for (i = 0; i < pktp->dbg_cbcnt; i++) { + ASSERT(pktp->dbg_cbs[i].cb); + pktp->dbg_cbs[i].cb(pktp, pktp->dbg_cbs[i].arg); + } + + return 0; +} + +int +pktpool_dbg_dump(pktpool_t *pktp) +{ + int i; + + printf("pool len=%d maxlen=%d\n", pktp->dbg_qlen, pktp->maxlen); + for (i = 0; i < pktp->dbg_qlen; i++) { + ASSERT(pktp->dbg_q[i].p); + printf("%d, p: 0x%x dur:%lu us state:%d\n", i, + pktp->dbg_q[i].p, pktp->dbg_q[i].dur/100, PKTPOOLSTATE(pktp->dbg_q[i].p)); + } + + return 0; +} + +int +pktpool_stats_dump(pktpool_t *pktp, pktpool_stats_t *stats) +{ + int i; + int state; + + bzero(stats, sizeof(pktpool_stats_t)); + for (i = 0; i < pktp->dbg_qlen; i++) { + ASSERT(pktp->dbg_q[i].p != NULL); + + state = PKTPOOLSTATE(pktp->dbg_q[i].p); + switch (state) { + case POOL_TXENQ: + stats->enq++; break; + case POOL_TXDH: + stats->txdh++; break; + case POOL_TXD11: + stats->txd11++; break; + case POOL_RXDH: + stats->rxdh++; break; + case POOL_RXD11: + stats->rxd11++; break; + case POOL_RXFILL: + stats->rxfill++; break; + case POOL_IDLE: + stats->idle++; break; + } + } + + return 0; +} + +int +pktpool_start_trigger(pktpool_t *pktp, void *p) +{ + uint32 cycles, i; + + if (!PKTPOOL(NULL, p)) + return 0; + + OSL_GETCYCLES(cycles); + + for (i = 0; i < pktp->dbg_qlen; i++) { + ASSERT(pktp->dbg_q[i].p != NULL); + + if (pktp->dbg_q[i].p == p) { + pktp->dbg_q[i].cycles = cycles; + break; + } + } + + return 0; +} + +int pktpool_stop_trigger(pktpool_t *pktp, void *p); +int +pktpool_stop_trigger(pktpool_t *pktp, void *p) +{ + uint32 cycles, i; + + if (!PKTPOOL(NULL, p)) + return 0; + + OSL_GETCYCLES(cycles); + + for (i = 0; i < pktp->dbg_qlen; i++) { + ASSERT(pktp->dbg_q[i].p != NULL); + + if (pktp->dbg_q[i].p == p) { + if (pktp->dbg_q[i].cycles == 0) + break; + + if (cycles >= pktp->dbg_q[i].cycles) + pktp->dbg_q[i].dur = cycles - pktp->dbg_q[i].cycles; + else + pktp->dbg_q[i].dur = + (((uint32)-1) - pktp->dbg_q[i].cycles) + cycles + 1; + + pktp->dbg_q[i].cycles = 0; + break; + } + } + + return 0; +} +#endif /* BCMDBG_POOL */ + +int +pktpool_avail_notify_normal(osl_t *osh, pktpool_t *pktp) +{ + ASSERT(pktp); + pktp->availcb_excl = NULL; + return 0; +} + +int +pktpool_avail_notify_exclusive(osl_t *osh, pktpool_t *pktp, pktpool_cb_t cb) +{ + int i; + + ASSERT(pktp); + ASSERT(pktp->availcb_excl == NULL); + for (i = 0; i < pktp->cbcnt; i++) { + if (cb == pktp->cbs[i].cb) { + pktp->availcb_excl = &pktp->cbs[i]; + break; + } + } + + if (pktp->availcb_excl == NULL) + return BCME_ERROR; + else + return 0; +} + +static int +pktpool_avail_notify(pktpool_t *pktp) +{ + int i, k, idx; + int avail; + + ASSERT(pktp); + if (pktp->availcb_excl != NULL) { + pktp->availcb_excl->cb(pktp, pktp->availcb_excl->arg); + return 0; + } + + k = pktp->cbcnt - 1; + for (i = 0; i < pktp->cbcnt; i++) { + avail = pktpool_avail(pktp); + + if (avail) { + if (pktp->cbtoggle) + idx = i; + else + idx = k--; + + ASSERT(pktp->cbs[idx].cb != NULL); + pktp->cbs[idx].cb(pktp, pktp->cbs[idx].arg); + } + } + + /* Alternate between filling from head or tail + */ + pktp->cbtoggle ^= 1; + + return 0; +} + +void * +pktpool_get(pktpool_t *pktp) +{ + void *p; + + p = pktpool_deq(pktp); + + if (p == NULL) { + /* Notify and try to reclaim tx pkts */ + if (pktp->ecbcnt) + pktpool_empty_notify(pktp); + + p = pktpool_deq(pktp); + } + + return p; +} + +void +pktpool_free(pktpool_t *pktp, void *p) +{ + ASSERT(p != NULL); + +#ifdef BCMDBG_POOL + /* pktpool_stop_trigger(pktp, p); */ +#endif + + pktpool_enq(pktp, p); + + if (pktp->emptycb_disable) + return; + + if (pktp->cbcnt) { + if (pktp->empty == FALSE) + pktpool_avail_notify(pktp); + } +} + +int +pktpool_add(pktpool_t *pktp, void *p) +{ + ASSERT(p != NULL); + + if (pktpool_len(pktp) == pktp->maxlen) + return BCME_RANGE; + + ASSERT(pktpool_plen(pktp) == PKTLEN(NULL, p)); /* pkts in pool have same length */ + PKTSETPOOL(NULL, p, TRUE, pktp); + + pktp->len++; + if (pktp->r > pktp->w) { + /* Add to tail */ + ASSERT(pktp->q[pktp->len - 1] == NULL); + pktp->q[pktp->len - 1] = p; + } else + pktpool_enq(pktp, p); + +#ifdef BCMDBG_POOL + pktp->dbg_q[pktp->dbg_qlen++].p = p; +#endif + + return 0; +} + +int +pktpool_setmaxlen(pktpool_t *pktp, uint16 maxlen) +{ + if (maxlen > PKTPOOL_LEN_MAX) + maxlen = PKTPOOL_LEN_MAX; + + /* if pool is already beyond maxlen, then just cap it + * since we currently do not reduce the pool len + * already allocated + */ + pktp->maxlen = (pktpool_len(pktp) > maxlen) ? pktpool_len(pktp) : maxlen; + + return pktp->maxlen; +} + +void +pktpool_emptycb_disable(pktpool_t *pktp, bool disable) +{ + ASSERT(pktp); + + pktp->emptycb_disable = disable; +} + +bool +pktpool_emptycb_disabled(pktpool_t *pktp) +{ + ASSERT(pktp); + return pktp->emptycb_disable; +} +#endif /* BCMDONGLEHOST */ + +/* copy a pkt buffer chain into a buffer */ +uint +pktcopy(osl_t *osh, void *p, uint offset, int len, uchar *buf) +{ + uint n, ret = 0; + + if (len < 0) + len = 4096; /* "infinite" */ + + /* skip 'offset' bytes */ + for (; p && offset; p = PKTNEXT(osh, p)) { + if (offset < (uint)PKTLEN(osh, p)) + break; + offset -= PKTLEN(osh, p); + } + + if (!p) + return 0; + + /* copy the data */ + for (; p && len; p = PKTNEXT(osh, p)) { + n = MIN((uint)PKTLEN(osh, p) - offset, (uint)len); + bcopy(PKTDATA(osh, p) + offset, buf, n); + buf += n; + len -= n; + ret += n; + offset = 0; + } + + return ret; +} + +/* copy a buffer into a pkt buffer chain */ +uint +pktfrombuf(osl_t *osh, void *p, uint offset, int len, uchar *buf) +{ + uint n, ret = 0; + + /* skip 'offset' bytes */ + for (; p && offset; p = PKTNEXT(osh, p)) { + if (offset < (uint)PKTLEN(osh, p)) + break; + offset -= PKTLEN(osh, p); + } + + if (!p) + return 0; + + /* copy the data */ + for (; p && len; p = PKTNEXT(osh, p)) { + n = MIN((uint)PKTLEN(osh, p) - offset, (uint)len); + bcopy(buf, PKTDATA(osh, p) + offset, n); + buf += n; + len -= n; + ret += n; + offset = 0; + } + + return ret; +} + +#ifdef NOTYET +/* copy data from one pkt buffer (chain) to another */ +uint +pkt2pktcopy(osl_t *osh, void *p1, uint offs1, void *p2, uint offs2, int maxlen) +{ + uint8 *dp1, *dp2; + uint len1, len2, copylen, totallen; + + for (; p1 && offs; p1 = PKTNEXT(osh, p1)) { + if (offs1 < (uint)PKTLEN(osh, p1)) + break; + offs1 -= PKTLEN(osh, p1); + } + for (; p2 && offs; p2 = PKTNEXT(osh, p2)) { + if (offs2 < (uint)PKTLEN(osh, p2)) + break; + offs2 -= PKTLEN(osh, p2); + } + + /* Heck w/it, only need the above for now */ +} +#endif /* NOTYET */ + + +/* return total length of buffer chain */ +uint BCMFASTPATH +pkttotlen(osl_t *osh, void *p) +{ + uint total; + int len; + + total = 0; + for (; p; p = PKTNEXT(osh, p)) { + len = PKTLEN(osh, p); +#ifdef MACOSX + if (len < 0) { + /* Bad packet length, just drop and exit */ + printf("wl: pkttotlen bad (%p,%d)\n", p, len); + break; + } +#endif /* MACOSX */ + total += len; + } + + return (total); +} + +/* return the last buffer of chained pkt */ +void * +pktlast(osl_t *osh, void *p) +{ + for (; PKTNEXT(osh, p); p = PKTNEXT(osh, p)) + ; + + return (p); +} + +/* count segments of a chained packet */ +uint BCMFASTPATH +pktsegcnt(osl_t *osh, void *p) +{ + uint cnt; + + for (cnt = 0; p; p = PKTNEXT(osh, p)) + cnt++; + + return cnt; +} + + +/* count segments of a chained packet */ +uint BCMFASTPATH +pktsegcnt_war(osl_t *osh, void *p) +{ + uint cnt; + uint8 *pktdata; + uint len, remain, align64; + + for (cnt = 0; p; p = PKTNEXT(osh, p)) { + cnt++; + len = PKTLEN(osh, p); + if (len > 128) { + pktdata = (uint8 *)PKTDATA(osh, p); /* starting address of data */ + /* Check for page boundary straddle (2048B) */ + if (((uintptr)pktdata & ~0x7ff) != ((uintptr)(pktdata+len) & ~0x7ff)) + cnt++; + + align64 = (uint)((uintptr)pktdata & 0x3f); /* aligned to 64B */ + align64 = (64 - align64) & 0x3f; + len -= align64; /* bytes from aligned 64B to end */ + /* if aligned to 128B, check for MOD 128 between 1 to 4B */ + remain = len % 128; + if (remain > 0 && remain <= 4) + cnt++; /* add extra seg */ + } + } + + return cnt; +} + +uint8 * BCMFASTPATH +pktdataoffset(osl_t *osh, void *p, uint offset) +{ + uint total = pkttotlen(osh, p); + uint pkt_off = 0, len = 0; + uint8 *pdata = (uint8 *) PKTDATA(osh, p); + + if (offset > total) + return NULL; + + for (; p; p = PKTNEXT(osh, p)) { + pdata = (uint8 *) PKTDATA(osh, p); + pkt_off = offset - len; + len += PKTLEN(osh, p); + if (len > offset) + break; + } + return (uint8*) (pdata+pkt_off); +} + + +/* given a offset in pdata, find the pkt seg hdr */ +void * +pktoffset(osl_t *osh, void *p, uint offset) +{ + uint total = pkttotlen(osh, p); + uint len = 0; + + if (offset > total) + return NULL; + + for (; p; p = PKTNEXT(osh, p)) { + len += PKTLEN(osh, p); + if (len > offset) + break; + } + return p; +} + +/* + * osl multiple-precedence packet queue + * hi_prec is always >= the number of the highest non-empty precedence + */ +void * BCMFASTPATH +pktq_penq(struct pktq *pq, int prec, void *p) +{ + struct pktq_prec *q; + + ASSERT(prec >= 0 && prec < pq->num_prec); + ASSERT(PKTLINK(p) == NULL); /* queueing chains not allowed */ + + ASSERT(!pktq_full(pq)); + ASSERT(!pktq_pfull(pq, prec)); + + q = &pq->q[prec]; + + if (q->head) + PKTSETLINK(q->tail, p); + else + q->head = p; + + q->tail = p; + q->len++; + + pq->len++; + + if (pq->hi_prec < prec) + pq->hi_prec = (uint8)prec; + + return p; +} + +void * BCMFASTPATH +pktq_penq_head(struct pktq *pq, int prec, void *p) +{ + struct pktq_prec *q; + + ASSERT(prec >= 0 && prec < pq->num_prec); + ASSERT(PKTLINK(p) == NULL); /* queueing chains not allowed */ + + ASSERT(!pktq_full(pq)); + ASSERT(!pktq_pfull(pq, prec)); + + q = &pq->q[prec]; + + if (q->head == NULL) + q->tail = p; + + PKTSETLINK(p, q->head); + q->head = p; + q->len++; + + pq->len++; + + if (pq->hi_prec < prec) + pq->hi_prec = (uint8)prec; + + return p; +} + +void * BCMFASTPATH +pktq_pdeq(struct pktq *pq, int prec) +{ + struct pktq_prec *q; + void *p; + + ASSERT(prec >= 0 && prec < pq->num_prec); + + q = &pq->q[prec]; + + if ((p = q->head) == NULL) + return NULL; + + if ((q->head = PKTLINK(p)) == NULL) + q->tail = NULL; + + q->len--; + + pq->len--; + + PKTSETLINK(p, NULL); + + return p; +} + +void * BCMFASTPATH +pktq_pdeq_prev(struct pktq *pq, int prec, void *prev_p) +{ + struct pktq_prec *q; + void *p; + + ASSERT(prec >= 0 && prec < pq->num_prec); + + q = &pq->q[prec]; + + if (prev_p == NULL) + return NULL; + + if ((p = PKTLINK(prev_p)) == NULL) + return NULL; + + if (q->tail == p) + q->tail = prev_p; + + q->len--; + + pq->len--; + + PKTSETLINK(prev_p, PKTLINK(p)); + PKTSETLINK(p, NULL); + + return p; +} + +void * BCMFASTPATH +pktq_pdeq_tail(struct pktq *pq, int prec) +{ + struct pktq_prec *q; + void *p, *prev; + + ASSERT(prec >= 0 && prec < pq->num_prec); + + q = &pq->q[prec]; + + if ((p = q->head) == NULL) + return NULL; + + for (prev = NULL; p != q->tail; p = PKTLINK(p)) + prev = p; + + if (prev) + PKTSETLINK(prev, NULL); + else + q->head = NULL; + + q->tail = prev; + q->len--; + + pq->len--; + + return p; +} + +void +pktq_pflush(osl_t *osh, struct pktq *pq, int prec, bool dir, ifpkt_cb_t fn, int arg) +{ + struct pktq_prec *q; + void *p, *prev = NULL; + + q = &pq->q[prec]; + p = q->head; + while (p) { + if (fn == NULL || (*fn)(p, arg)) { + bool head = (p == q->head); + if (head) + q->head = PKTLINK(p); + else + PKTSETLINK(prev, PKTLINK(p)); + PKTSETLINK(p, NULL); + PKTFREE(osh, p, dir); + q->len--; + pq->len--; + p = (head ? q->head : PKTLINK(prev)); + } else { + prev = p; + p = PKTLINK(p); + } + } + + if (q->head == NULL) { + ASSERT(q->len == 0); + q->tail = NULL; + } +} + +bool BCMFASTPATH +pktq_pdel(struct pktq *pq, void *pktbuf, int prec) +{ + struct pktq_prec *q; + void *p; + + ASSERT(prec >= 0 && prec < pq->num_prec); + + /* XXX Should this just assert pktbuf? */ + if (!pktbuf) + return FALSE; + + q = &pq->q[prec]; + + if (q->head == pktbuf) { + if ((q->head = PKTLINK(pktbuf)) == NULL) + q->tail = NULL; + } else { + for (p = q->head; p && PKTLINK(p) != pktbuf; p = PKTLINK(p)) + ; + if (p == NULL) + return FALSE; + + PKTSETLINK(p, PKTLINK(pktbuf)); + if (q->tail == pktbuf) + q->tail = p; + } + + q->len--; + pq->len--; + PKTSETLINK(pktbuf, NULL); + return TRUE; +} + +void +pktq_init(struct pktq *pq, int num_prec, int max_len) +{ + int prec; + + ASSERT(num_prec > 0 && num_prec <= PKTQ_MAX_PREC); + + /* pq is variable size; only zero out what's requested */ + bzero(pq, OFFSETOF(struct pktq, q) + (sizeof(struct pktq_prec) * num_prec)); + + pq->num_prec = (uint16)num_prec; + + pq->max = (uint16)max_len; + + for (prec = 0; prec < num_prec; prec++) + pq->q[prec].max = pq->max; +} + +void +pktq_set_max_plen(struct pktq *pq, int prec, int max_len) +{ + ASSERT(prec >= 0 && prec < pq->num_prec); + + if (prec < pq->num_prec) + pq->q[prec].max = (uint16)max_len; +} + +void * BCMFASTPATH +pktq_deq(struct pktq *pq, int *prec_out) +{ + struct pktq_prec *q; + void *p; + int prec; + + if (pq->len == 0) + return NULL; + + while ((prec = pq->hi_prec) > 0 && pq->q[prec].head == NULL) + pq->hi_prec--; + + q = &pq->q[prec]; + + if ((p = q->head) == NULL) + return NULL; + + if ((q->head = PKTLINK(p)) == NULL) + q->tail = NULL; + + q->len--; + + pq->len--; + + if (prec_out) + *prec_out = prec; + + PKTSETLINK(p, NULL); + + return p; +} + +void * BCMFASTPATH +pktq_deq_tail(struct pktq *pq, int *prec_out) +{ + struct pktq_prec *q; + void *p, *prev; + int prec; + + if (pq->len == 0) + return NULL; + + for (prec = 0; prec < pq->hi_prec; prec++) + if (pq->q[prec].head) + break; + + q = &pq->q[prec]; + + if ((p = q->head) == NULL) + return NULL; + + for (prev = NULL; p != q->tail; p = PKTLINK(p)) + prev = p; + + if (prev) + PKTSETLINK(prev, NULL); + else + q->head = NULL; + + q->tail = prev; + q->len--; + + pq->len--; + + if (prec_out) + *prec_out = prec; + + PKTSETLINK(p, NULL); + + return p; +} + +void * +pktq_peek(struct pktq *pq, int *prec_out) +{ + int prec; + + if (pq->len == 0) + return NULL; + + while ((prec = pq->hi_prec) > 0 && pq->q[prec].head == NULL) + pq->hi_prec--; + + if (prec_out) + *prec_out = prec; + + return (pq->q[prec].head); +} + +void * +pktq_peek_tail(struct pktq *pq, int *prec_out) +{ + int prec; + + if (pq->len == 0) + return NULL; + + for (prec = 0; prec < pq->hi_prec; prec++) + if (pq->q[prec].head) + break; + + if (prec_out) + *prec_out = prec; + + return (pq->q[prec].tail); +} + +void +pktq_flush(osl_t *osh, struct pktq *pq, bool dir, ifpkt_cb_t fn, int arg) +{ + int prec; + + /* Optimize flush, if pktq len = 0, just return. + * pktq len of 0 means pktq's prec q's are all empty. + */ + if (pq->len == 0) { + return; + } + + for (prec = 0; prec < pq->num_prec; prec++) + pktq_pflush(osh, pq, prec, dir, fn, arg); + if (fn == NULL) + ASSERT(pq->len == 0); +} + +/* Return sum of lengths of a specific set of precedences */ +int +pktq_mlen(struct pktq *pq, uint prec_bmp) +{ + int prec, len; + + len = 0; + + for (prec = 0; prec <= pq->hi_prec; prec++) + if (prec_bmp & (1 << prec)) + len += pq->q[prec].len; + + return len; +} + +/* Priority peek from a specific set of precedences */ +void * BCMFASTPATH +pktq_mpeek(struct pktq *pq, uint prec_bmp, int *prec_out) +{ + struct pktq_prec *q; + void *p; + int prec; + + if (pq->len == 0) + { + return NULL; + } + while ((prec = pq->hi_prec) > 0 && pq->q[prec].head == NULL) + pq->hi_prec--; + + while ((prec_bmp & (1 << prec)) == 0 || pq->q[prec].head == NULL) + if (prec-- == 0) + return NULL; + + q = &pq->q[prec]; + + if ((p = q->head) == NULL) + return NULL; + + if (prec_out) + *prec_out = prec; + + return p; +} +/* Priority dequeue from a specific set of precedences */ +void * BCMFASTPATH +pktq_mdeq(struct pktq *pq, uint prec_bmp, int *prec_out) +{ + struct pktq_prec *q; + void *p; + int prec; + + if (pq->len == 0) + return NULL; + + while ((prec = pq->hi_prec) > 0 && pq->q[prec].head == NULL) + pq->hi_prec--; + + while ((pq->q[prec].head == NULL) || ((prec_bmp & (1 << prec)) == 0)) + if (prec-- == 0) + return NULL; + + q = &pq->q[prec]; + + if ((p = q->head) == NULL) + return NULL; + + if ((q->head = PKTLINK(p)) == NULL) + q->tail = NULL; + + q->len--; + + if (prec_out) + *prec_out = prec; + + pq->len--; + + PKTSETLINK(p, NULL); + + return p; +} + +#endif /* BCMDRIVER */ + +#if defined(BCMROMBUILD) +const unsigned char BCMROMDATA(bcm_ctype)[] = { +#else +const unsigned char bcm_ctype[] = { +#endif + + _BCM_C,_BCM_C,_BCM_C,_BCM_C,_BCM_C,_BCM_C,_BCM_C,_BCM_C, /* 0-7 */ + _BCM_C, _BCM_C|_BCM_S, _BCM_C|_BCM_S, _BCM_C|_BCM_S, _BCM_C|_BCM_S, _BCM_C|_BCM_S, _BCM_C, + _BCM_C, /* 8-15 */ + _BCM_C,_BCM_C,_BCM_C,_BCM_C,_BCM_C,_BCM_C,_BCM_C,_BCM_C, /* 16-23 */ + _BCM_C,_BCM_C,_BCM_C,_BCM_C,_BCM_C,_BCM_C,_BCM_C,_BCM_C, /* 24-31 */ + _BCM_S|_BCM_SP,_BCM_P,_BCM_P,_BCM_P,_BCM_P,_BCM_P,_BCM_P,_BCM_P, /* 32-39 */ + _BCM_P,_BCM_P,_BCM_P,_BCM_P,_BCM_P,_BCM_P,_BCM_P,_BCM_P, /* 40-47 */ + _BCM_D,_BCM_D,_BCM_D,_BCM_D,_BCM_D,_BCM_D,_BCM_D,_BCM_D, /* 48-55 */ + _BCM_D,_BCM_D,_BCM_P,_BCM_P,_BCM_P,_BCM_P,_BCM_P,_BCM_P, /* 56-63 */ + _BCM_P, _BCM_U|_BCM_X, _BCM_U|_BCM_X, _BCM_U|_BCM_X, _BCM_U|_BCM_X, _BCM_U|_BCM_X, + _BCM_U|_BCM_X, _BCM_U, /* 64-71 */ + _BCM_U,_BCM_U,_BCM_U,_BCM_U,_BCM_U,_BCM_U,_BCM_U,_BCM_U, /* 72-79 */ + _BCM_U,_BCM_U,_BCM_U,_BCM_U,_BCM_U,_BCM_U,_BCM_U,_BCM_U, /* 80-87 */ + _BCM_U,_BCM_U,_BCM_U,_BCM_P,_BCM_P,_BCM_P,_BCM_P,_BCM_P, /* 88-95 */ + _BCM_P, _BCM_L|_BCM_X, _BCM_L|_BCM_X, _BCM_L|_BCM_X, _BCM_L|_BCM_X, _BCM_L|_BCM_X, + _BCM_L|_BCM_X, _BCM_L, /* 96-103 */ + _BCM_L,_BCM_L,_BCM_L,_BCM_L,_BCM_L,_BCM_L,_BCM_L,_BCM_L, /* 104-111 */ + _BCM_L,_BCM_L,_BCM_L,_BCM_L,_BCM_L,_BCM_L,_BCM_L,_BCM_L, /* 112-119 */ + _BCM_L,_BCM_L,_BCM_L,_BCM_P,_BCM_P,_BCM_P,_BCM_P,_BCM_C, /* 120-127 */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 128-143 */ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, /* 144-159 */ + _BCM_S|_BCM_SP, _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, + _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, /* 160-175 */ + _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, + _BCM_P, _BCM_P, _BCM_P, _BCM_P, _BCM_P, /* 176-191 */ + _BCM_U, _BCM_U, _BCM_U, _BCM_U, _BCM_U, _BCM_U, _BCM_U, _BCM_U, _BCM_U, _BCM_U, _BCM_U, + _BCM_U, _BCM_U, _BCM_U, _BCM_U, _BCM_U, /* 192-207 */ + _BCM_U, _BCM_U, _BCM_U, _BCM_U, _BCM_U, _BCM_U, _BCM_U, _BCM_P, _BCM_U, _BCM_U, _BCM_U, + _BCM_U, _BCM_U, _BCM_U, _BCM_U, _BCM_L, /* 208-223 */ + _BCM_L, _BCM_L, _BCM_L, _BCM_L, _BCM_L, _BCM_L, _BCM_L, _BCM_L, _BCM_L, _BCM_L, _BCM_L, + _BCM_L, _BCM_L, _BCM_L, _BCM_L, _BCM_L, /* 224-239 */ + _BCM_L, _BCM_L, _BCM_L, _BCM_L, _BCM_L, _BCM_L, _BCM_L, _BCM_P, _BCM_L, _BCM_L, _BCM_L, + _BCM_L, _BCM_L, _BCM_L, _BCM_L, _BCM_L /* 240-255 */ +}; + +ulong +BCMROMFN(bcm_strtoul)(const char *cp, char **endp, uint base) +{ + ulong result, last_result = 0, value; + bool minus; + + minus = FALSE; + + while (bcm_isspace(*cp)) + cp++; + + if (cp[0] == '+') + cp++; + else if (cp[0] == '-') { + minus = TRUE; + cp++; + } + + if (base == 0) { + if (cp[0] == '0') { + if ((cp[1] == 'x') || (cp[1] == 'X')) { + base = 16; + cp = &cp[2]; + } else { + base = 8; + cp = &cp[1]; + } + } else + base = 10; + } else if (base == 16 && (cp[0] == '0') && ((cp[1] == 'x') || (cp[1] == 'X'))) { + cp = &cp[2]; + } + + result = 0; + + while (bcm_isxdigit(*cp) && + (value = bcm_isdigit(*cp) ? *cp-'0' : bcm_toupper(*cp)-'A'+10) < base) { + result = result*base + value; + /* Detected overflow */ + if (result < last_result && !minus) + return (ulong)-1; + last_result = result; + cp++; + } + + if (minus) + result = (ulong)(-(long)result); + + if (endp) + *endp = DISCARD_QUAL(cp, char); + + return (result); +} + +int +BCMROMFN(bcm_atoi)(const char *s) +{ + return (int)bcm_strtoul(s, NULL, 10); +} + +/* return pointer to location of substring 'needle' in 'haystack' */ +char * +BCMROMFN(bcmstrstr)(const char *haystack, const char *needle) +{ + int len, nlen; + int i; + + if ((haystack == NULL) || (needle == NULL)) + return DISCARD_QUAL(haystack, char); + + nlen = strlen(needle); + len = strlen(haystack) - nlen + 1; + + for (i = 0; i < len; i++) + if (memcmp(needle, &haystack[i], nlen) == 0) + return DISCARD_QUAL(&haystack[i], char); + return (NULL); +} + +char * +BCMROMFN(bcmstrcat)(char *dest, const char *src) +{ + char *p; + + p = dest + strlen(dest); + + while ((*p++ = *src++) != '\0') + ; + + return (dest); +} + +char * +BCMROMFN(bcmstrncat)(char *dest, const char *src, uint size) +{ + char *endp; + char *p; + + p = dest + strlen(dest); + endp = p + size; + + while (p != endp && (*p++ = *src++) != '\0') + ; + + return (dest); +} + + +/**************************************************************************** +* Function: bcmstrtok +* +* Purpose: +* Tokenizes a string. This function is conceptually similiar to ANSI C strtok(), +* but allows strToken() to be used by different strings or callers at the same +* time. Each call modifies '*string' by substituting a NULL character for the +* first delimiter that is encountered, and updates 'string' to point to the char +* after the delimiter. Leading delimiters are skipped. +* +* Parameters: +* string (mod) Ptr to string ptr, updated by token. +* delimiters (in) Set of delimiter characters. +* tokdelim (out) Character that delimits the returned token. (May +* be set to NULL if token delimiter is not required). +* +* Returns: Pointer to the next token found. NULL when no more tokens are found. +***************************************************************************** +*/ +char * +bcmstrtok(char **string, const char *delimiters, char *tokdelim) +{ + unsigned char *str; + unsigned long map[8]; + int count; + char *nextoken; + + if (tokdelim != NULL) { + /* Prime the token delimiter */ + *tokdelim = '\0'; + } + + /* Clear control map */ + for (count = 0; count < 8; count++) { + map[count] = 0; + } + + /* Set bits in delimiter table */ + do { + map[*delimiters >> 5] |= (1 << (*delimiters & 31)); + } + while (*delimiters++); + + str = (unsigned char*)*string; + + /* Find beginning of token (skip over leading delimiters). Note that + * there is no token iff this loop sets str to point to the terminal + * null (*str == '\0') + */ + while (((map[*str >> 5] & (1 << (*str & 31))) && *str) || (*str == ' ')) { + str++; + } + + nextoken = (char*)str; + + /* Find the end of the token. If it is not the end of the string, + * put a null there. + */ + for (; *str; str++) { + if (map[*str >> 5] & (1 << (*str & 31))) { + if (tokdelim != NULL) { + *tokdelim = *str; + } + + *str++ = '\0'; + break; + } + } + + *string = (char*)str; + + /* Determine if a token has been found. */ + if (nextoken == (char *) str) { + return NULL; + } + else { + return nextoken; + } +} + + +#define xToLower(C) \ + ((C >= 'A' && C <= 'Z') ? (char)((int)C - (int)'A' + (int)'a') : C) + + +/**************************************************************************** +* Function: bcmstricmp +* +* Purpose: Compare to strings case insensitively. +* +* Parameters: s1 (in) First string to compare. +* s2 (in) Second string to compare. +* +* Returns: Return 0 if the two strings are equal, -1 if t1 < t2 and 1 if +* t1 > t2, when ignoring case sensitivity. +***************************************************************************** +*/ +int +bcmstricmp(const char *s1, const char *s2) +{ + char dc, sc; + + while (*s2 && *s1) { + dc = xToLower(*s1); + sc = xToLower(*s2); + if (dc < sc) return -1; + if (dc > sc) return 1; + s1++; + s2++; + } + + if (*s1 && !*s2) return 1; + if (!*s1 && *s2) return -1; + return 0; +} + + +/**************************************************************************** +* Function: bcmstrnicmp +* +* Purpose: Compare to strings case insensitively, upto a max of 'cnt' +* characters. +* +* Parameters: s1 (in) First string to compare. +* s2 (in) Second string to compare. +* cnt (in) Max characters to compare. +* +* Returns: Return 0 if the two strings are equal, -1 if t1 < t2 and 1 if +* t1 > t2, when ignoring case sensitivity. +***************************************************************************** +*/ +int +bcmstrnicmp(const char* s1, const char* s2, int cnt) +{ + char dc, sc; + + while (*s2 && *s1 && cnt) { + dc = xToLower(*s1); + sc = xToLower(*s2); + if (dc < sc) return -1; + if (dc > sc) return 1; + s1++; + s2++; + cnt--; + } + + if (!cnt) return 0; + if (*s1 && !*s2) return 1; + if (!*s1 && *s2) return -1; + return 0; +} + +/* parse a xx:xx:xx:xx:xx:xx format ethernet address */ +int +BCMROMFN(bcm_ether_atoe)(const char *p, struct ether_addr *ea) +{ + int i = 0; + char *ep; + + for (;;) { + ea->octet[i++] = (char) bcm_strtoul(p, &ep, 16); + p = ep; + if (!*p++ || i == 6) + break; + } + + return (i == 6); +} + +#ifdef _HNDRTE_ + +const struct ether_addr ether_bcast = {{255, 255, 255, 255, 255, 255}}; +const struct ether_addr ether_null = {{0, 0, 0, 0, 0, 0}}; +const struct ether_addr ether_ipv6_mcast = {{0x33, 0x33, 0x00, 0x00, 0x00, 0x01}}; + +int +ether_isbcast(const void *ea) +{ + return (memcmp(ea, ðer_bcast, sizeof(struct ether_addr)) == 0); +} + +int +ether_isnulladdr(const void *ea) +{ + return (memcmp(ea, ðer_null, sizeof(struct ether_addr)) == 0); +} + +#endif /* _HNDRTE_ */ + +#if defined(CONFIG_USBRNDIS_RETAIL) || defined(NDIS_MINIPORT_DRIVER) +/* registry routine buffer preparation utility functions: + * parameter order is like strncpy, but returns count + * of bytes copied. Minimum bytes copied is null char(1)/wchar(2) + */ +ulong +wchar2ascii(char *abuf, ushort *wbuf, ushort wbuflen, ulong abuflen) +{ + ulong copyct = 1; + ushort i; + + if (abuflen == 0) + return 0; + + /* wbuflen is in bytes */ + wbuflen /= sizeof(ushort); + + for (i = 0; i < wbuflen; ++i) { + if (--abuflen == 0) + break; + *abuf++ = (char) *wbuf++; + ++copyct; + } + *abuf = '\0'; + + return copyct; +} +#endif /* CONFIG_USBRNDIS_RETAIL || NDIS_MINIPORT_DRIVER */ + +char * +bcm_ether_ntoa(const struct ether_addr *ea, char *buf) +{ + static const char hex[] = + { + '0', '1', '2', '3', '4', '5', '6', '7', + '8', '9', 'a', 'b', 'c', 'd', 'e', 'f' + }; + const uint8 *octet = ea->octet; + char *p = buf; + int i; + + for (i = 0; i < 6; i++, octet++) { + *p++ = hex[(*octet >> 4) & 0xf]; + *p++ = hex[*octet & 0xf]; + *p++ = ':'; + } + + *(p-1) = '\0'; + + return (buf); +} + +char * +bcm_ip_ntoa(struct ipv4_addr *ia, char *buf) +{ + snprintf(buf, 16, "%d.%d.%d.%d", + ia->addr[0], ia->addr[1], ia->addr[2], ia->addr[3]); + return (buf); +} + +char * +bcm_ipv6_ntoa(void *ipv6, char *buf) +{ + /* Implementing RFC 5952 Sections 4 + 5 */ + /* Not thoroughly tested */ + uint16 *a = (uint16 *)ipv6; + char *p = buf; + int i, i_max = -1, cnt = 0, cnt_max = 1; + uint8 *a4 = NULL; + + for (i = 0; i < IPV6_ADDR_LEN/2; i++) { + if (a[i]) { + if (cnt > cnt_max) { + cnt_max = cnt; + i_max = i - cnt; + } + cnt = 0; + } else + cnt++; + } + if (cnt > cnt_max) { + cnt_max = cnt; + i_max = i - cnt; + } + if (i_max == 0 && + /* IPv4-translated: ::ffff:0:a.b.c.d */ + ((cnt_max == 4 && a[4] == 0xffff && a[5] == 0) || + /* IPv4-mapped: ::ffff:a.b.c.d */ + (cnt_max == 5 && a[5] == 0xffff))) + a4 = (uint8*) (a + 6); + + for (i = 0; i < IPV6_ADDR_LEN/2; i++) { + if ((uint8*) (a + i) == a4) { + snprintf(p, 16, ":%u.%u.%u.%u", a4[0], a4[1], a4[2], a4[3]); + break; + } else if (i == i_max) { + *p++ = ':'; + i += cnt_max - 1; + p[0] = ':'; + p[1] = '\0'; + } else { + if (i) + *p++ = ':'; + p += snprintf(p, 8, "%x", ntoh16(a[i])); + } + } + + return buf; +} + +#ifdef BCMDRIVER + +void +bcm_mdelay(uint ms) +{ + uint i; + + for (i = 0; i < ms; i++) { + OSL_DELAY(1000); + } +} + +#if !defined(BCMDONGLEHOST) +/* + * Search the name=value vars for a specific one and return its value. + * Returns NULL if not found. + */ +char * +getvar(char *vars, const char *name) +{ +#ifdef _MINOSL_ + return NULL; +#else + char *s; + int len; + + if (!name) + return NULL; + + len = strlen(name); + if (len == 0) + return NULL; + + /* first look in vars[] */ + for (s = vars; s && *s;) { + if ((bcmp(s, name, len) == 0) && (s[len] == '=')) + return (&s[len+1]); + + while (*s++) + ; + } + + /* then query nvram */ + return (nvram_get(name)); +#endif /* defined(_MINOSL_) */ +} + +/* + * Search the vars for a specific one and return its value as + * an integer. Returns 0 if not found. + */ +int +getintvar(char *vars, const char *name) +{ +#ifdef _MINOSL_ + return 0; +#else + char *val; + + if ((val = getvar(vars, name)) == NULL) + return (0); + + return (bcm_strtoul(val, NULL, 0)); +#endif /* _MINOSL_ */ +} + +int +getintvararray(char *vars, const char *name, int index) +{ +#ifdef _MINOSL_ + return 0; +#else + char *buf, *endp; + int i = 0; + int val = 0; + + if ((buf = getvar(vars, name)) == NULL) { + return (0); + } + + /* table values are always separated by "," or " " */ + while (*buf != '\0') { + val = bcm_strtoul(buf, &endp, 0); + if (i == index) { + return val; + } + buf = endp; + /* delimiter is ',' */ + if (*buf == ',') + buf++; + i++; + } + return 0; +#endif /* _MINOSL_ */ +} + +int +getintvararraysize(char *vars, const char *name) +{ +#ifdef _MINOSL_ + return 0; +#else + char *buf, *endp; + int count = 0; + int val = 0; + + if ((buf = getvar(vars, name)) == NULL) { + return (0); + } + + /* table values are always separated by "," or " " */ + while (*buf != '\0') { + val = bcm_strtoul(buf, &endp, 0); + buf = endp; + /* delimiter is ',' */ + if (*buf == ',') + buf++; + count++; + } + BCM_REFERENCE(val); + return count; +#endif /* _MINOSL_ */ +} + +/* Search for token in comma separated token-string */ +static int +findmatch(const char *string, const char *name) +{ + uint len; + char *c; + + len = strlen(name); + while ((c = strchr(string, ',')) != NULL) { + if (len == (uint)(c - string) && !strncmp(string, name, len)) + return 1; + string = c + 1; + } + + return (!strcmp(string, name)); +} + +/* Return gpio pin number assigned to the named pin + * + * Variable should be in format: + * + * gpio=pin_name,pin_name + * + * This format allows multiple features to share the gpio with mutual + * understanding. + * + * 'def_pin' is returned if a specific gpio is not defined for the requested functionality + * and if def_pin is not used by others. + */ +uint +getgpiopin(char *vars, char *pin_name, uint def_pin) +{ + char name[] = "gpioXXXX"; + char *val; + uint pin; + + /* Go thru all possibilities till a match in pin name */ + for (pin = 0; pin < GPIO_NUMPINS; pin ++) { + snprintf(name, sizeof(name), "gpio%d", pin); + val = getvar(vars, name); + if (val && findmatch(val, pin_name)) + return pin; + } + + if (def_pin != GPIO_PIN_NOTDEFINED) { + /* make sure the default pin is not used by someone else */ + snprintf(name, sizeof(name), "gpio%d", def_pin); + if (getvar(vars, name)) { + def_pin = GPIO_PIN_NOTDEFINED; + } + } + return def_pin; +} +#endif /* !defined(BCMDONGLEHOST) */ + +#if defined(BCMPERFSTATS) || defined(BCMTSTAMPEDLOGS) + +#define LOGSIZE 256 /* should be power of 2 to avoid div below */ +static struct { + uint cycles; + char *fmt; + uint a1; + uint a2; +} logtab[LOGSIZE]; + +/* last entry logged */ +static uint logi = 0; +/* next entry to read */ +static uint readi = 0; +#endif /* defined(BCMPERFSTATS) || defined(BCMTSTAMPEDLOGS) */ + +#ifdef BCMPERFSTATS +/* XXX TODO: make the utility configurable (choose between icache, dcache, hits, misses ...) */ +void +bcm_perf_enable() +{ + BCMPERF_ENABLE_INSTRCOUNT(); + BCMPERF_ENABLE_ICACHE_MISS(); + BCMPERF_ENABLE_ICACHE_HIT(); +} + +/* WARNING: This routine uses OSL_GETCYCLES(), which can give unexpected results on + * modern speed stepping CPUs. Use bcmtslog() instead in combination with TSF counter. + */ +void +bcmlog(char *fmt, uint a1, uint a2) +{ + static uint last = 0; + uint cycles, i; + OSL_GETCYCLES(cycles); + + i = logi; + + logtab[i].cycles = cycles - last; + logtab[i].fmt = fmt; + logtab[i].a1 = a1; + logtab[i].a2 = a2; + + logi = (i + 1) % LOGSIZE; + last = cycles; +} + +/* Same as bcmlog but specializes the use of a1 and a2 to + * store icache misses and instruction count. + * XXX TODO : make this use a configuration array to decide what counter to read. + * We are limited to 2 numbers but it seems it is the most we can get anyway + * since dcache and icache cannot be enabled at the same time. Recording + * both the hits and misses at the same time for a given cache is not that useful either. +*/ + +void +bcmstats(char *fmt) +{ + static uint last = 0; + static uint32 ic_miss = 0; + static uint32 instr_count = 0; + uint32 ic_miss_cur; + uint32 instr_count_cur; + uint cycles, i; + + OSL_GETCYCLES(cycles); + BCMPERF_GETICACHE_MISS(ic_miss_cur); + BCMPERF_GETINSTRCOUNT(instr_count_cur); + + i = logi; + + logtab[i].cycles = cycles - last; + logtab[i].a1 = ic_miss_cur - ic_miss; + logtab[i].a2 = instr_count_cur - instr_count; + logtab[i].fmt = fmt; + + logi = (i + 1) % LOGSIZE; + + last = cycles; + instr_count = instr_count_cur; + ic_miss = ic_miss_cur; +} + +/* + * XXX TODO (linux version): a "proc" version where the log would be dumped + * on the proc file directly. + */ + +void +bcmdumplog(char *buf, int size) +{ + char *limit; + int j = 0; + int num; + + limit = buf + size - 80; + *buf = '\0'; + + num = logi - readi; + + if (num < 0) + num += LOGSIZE; + + /* print in chronological order */ + + for (j = 0; j < num && (buf < limit); readi = (readi + 1) % LOGSIZE, j++) { + if (logtab[readi].fmt == NULL) + continue; + buf += snprintf(buf, (limit - buf), "%d\t", logtab[readi].cycles); + buf += snprintf(buf, (limit - buf), logtab[readi].fmt, logtab[readi].a1, + logtab[readi].a2); + buf += snprintf(buf, (limit - buf), "\n"); + } + +} + + +/* + * Dump one log entry at a time. + * Return index of next entry or -1 when no more . + */ +int +bcmdumplogent(char *buf, uint i) +{ + bool hit; + + /* + * If buf is NULL, return the starting index, + * interpreting i as the indicator of last 'i' entries to dump. + */ + if (buf == NULL) { + i = ((i > 0) && (i < (LOGSIZE - 1))) ? i : (LOGSIZE - 1); + return ((logi - i) % LOGSIZE); + } + + *buf = '\0'; + + ASSERT(i < LOGSIZE); + + if (i == logi) + return (-1); + + hit = FALSE; + for (; (i != logi) && !hit; i = (i + 1) % LOGSIZE) { + if (logtab[i].fmt == NULL) + continue; + buf += sprintf(buf, "%d: %d\t", i, logtab[i].cycles); + buf += sprintf(buf, logtab[i].fmt, logtab[i].a1, logtab[i].a2); + buf += sprintf(buf, "\n"); + hit = TRUE; + } + + return (i); +} + +#endif /* BCMPERFSTATS */ + +#if defined(BCMTSTAMPEDLOGS) +/* Store a TSF timestamp and a log line in the log buffer */ +void +bcmtslog(uint32 tstamp, char *fmt, uint a1, uint a2) +{ + uint i = logi; + bool use_delta = FALSE; + static uint32 last = 0; /* used only when use_delta is true */ + + logtab[i].cycles = tstamp; + if (use_delta) + logtab[i].cycles -= last; + + logtab[i].fmt = fmt; + logtab[i].a1 = a1; + logtab[i].a2 = a2; + + if (use_delta) + last = tstamp; + logi = (i + 1) % LOGSIZE; +} + +/* Print out a microsecond timestamp as "sec.ms.us " */ +void +bcmprinttstamp(uint32 ticks) +{ + uint us, ms, sec; + + us = (ticks % TSF_TICKS_PER_MS) * 1000 / TSF_TICKS_PER_MS; + ms = ticks / TSF_TICKS_PER_MS; + sec = ms / 1000; + ms -= sec * 1000; + printf("%04u.%03u.%03u ", sec, ms, us); +} + +/* Print out the log buffer with timestamps */ +void +bcmprinttslogs(void) +{ + int j = 0; + int num; + + num = logi - readi; + if (num < 0) + num += LOGSIZE; + + /* Format and print the log entries directly in chronological order */ + for (j = 0; j < num; readi = (readi + 1) % LOGSIZE, j++) { + if (logtab[readi].fmt == NULL) + continue; + bcmprinttstamp(logtab[readi].cycles); + printf(logtab[readi].fmt, logtab[readi].a1, logtab[readi].a2); + printf("\n"); + } +} + +/* Identical to bcmdumplog, but output is based on tsf instead of cycles. +XXX Todo: +These logging and printing/dumping routines have become too numerous. +Simplify by combining routines and adding parameters for TSF vs System clock, +printing vs dumping to buffer, and whether output shoud be normalized to usecs. +Also, why are some routines #ifdeffed and others not? +Also, rdtscl((x)) used in linux OSL_GETCYCLES should be avoided since this will slow +down and speed up on speed-stepping cpus. +*/ +void +bcmdumptslog(char *buf, int size) +{ + char *limit; + int j = 0; + int num; + uint us, ms, sec; + + limit = buf + size - 80; + *buf = '\0'; + + num = logi - readi; + + if (num < 0) + num += LOGSIZE; + + /* print in chronological order */ + for (j = 0; j < num && (buf < limit); readi = (readi + 1) % LOGSIZE, j++) { + if (logtab[readi].fmt == NULL) + continue; + us = (logtab[readi].cycles % TSF_TICKS_PER_MS) * 1000 / TSF_TICKS_PER_MS; + ms = logtab[readi].cycles / TSF_TICKS_PER_MS; + sec = ms / 1000; + ms -= sec * 1000; + + buf += snprintf(buf, (limit - buf), "%04u.%03u.%03u ", sec, ms, us); + /* buf += snprintf(buf, (limit - buf), "%d\t", logtab[readi].cycles); */ + buf += snprintf(buf, (limit - buf), logtab[readi].fmt, logtab[readi].a1, + logtab[readi].a2); + buf += snprintf(buf, (limit - buf), "\n"); + } +} + +#endif /* BCMTSTAMPEDLOGS */ + +#if defined(BCMDBG) || defined(DHD_DEBUG) +/* pretty hex print a pkt buffer chain */ +void +prpkt(const char *msg, osl_t *osh, void *p0) +{ + void *p; + + if (msg && (msg[0] != '\0')) + printf("%s:\n", msg); + + for (p = p0; p; p = PKTNEXT(osh, p)) + prhex(NULL, PKTDATA(osh, p), PKTLEN(osh, p)); +} +#endif /* BCMDBG || DHD_DEBUG */ + +/* Takes an Ethernet frame and sets out-of-bound PKTPRIO. + * Also updates the inplace vlan tag if requested. + * For debugging, it returns an indication of what it did. + */ +uint BCMFASTPATH +pktsetprio(void *pkt, bool update_vtag) +{ + struct ether_header *eh; + struct ethervlan_header *evh; + uint8 *pktdata; + int priority = 0; + int rc = 0; + + pktdata = (uint8 *)PKTDATA(NULL, pkt); + ASSERT(ISALIGNED((uintptr)pktdata, sizeof(uint16))); + + eh = (struct ether_header *) pktdata; + + if (eh->ether_type == hton16(ETHER_TYPE_8021Q)) { + uint16 vlan_tag; + int vlan_prio, dscp_prio = 0; + + evh = (struct ethervlan_header *)eh; + + vlan_tag = ntoh16(evh->vlan_tag); + vlan_prio = (int) (vlan_tag >> VLAN_PRI_SHIFT) & VLAN_PRI_MASK; + + if (evh->ether_type == hton16(ETHER_TYPE_IP)) { + uint8 *ip_body = pktdata + sizeof(struct ethervlan_header); + uint8 tos_tc = IP_TOS46(ip_body); + dscp_prio = (int)(tos_tc >> IPV4_TOS_PREC_SHIFT); + } + + /* DSCP priority gets precedence over 802.1P (vlan tag) */ + if (dscp_prio != 0) { + priority = dscp_prio; + rc |= PKTPRIO_VDSCP; + } else { + priority = vlan_prio; + rc |= PKTPRIO_VLAN; + } + /* + * If the DSCP priority is not the same as the VLAN priority, + * then overwrite the priority field in the vlan tag, with the + * DSCP priority value. This is required for Linux APs because + * the VLAN driver on Linux, overwrites the skb->priority field + * with the priority value in the vlan tag + */ + if (update_vtag && (priority != vlan_prio)) { + vlan_tag &= ~(VLAN_PRI_MASK << VLAN_PRI_SHIFT); + vlan_tag |= (uint16)priority << VLAN_PRI_SHIFT; + evh->vlan_tag = hton16(vlan_tag); + rc |= PKTPRIO_UPD; + } + } else if (eh->ether_type == hton16(ETHER_TYPE_IP)) { + uint8 *ip_body = pktdata + sizeof(struct ether_header); + uint8 tos_tc = IP_TOS46(ip_body); + priority = (int)(tos_tc >> IPV4_TOS_PREC_SHIFT); + rc |= PKTPRIO_DSCP; + } + + ASSERT(priority >= 0 && priority <= MAXPRIO); + PKTSETPRIO(pkt, priority); + return (rc | priority); +} + +#ifndef BCM_BOOTLOADER +/* XXX: The 0.5KB string table is not removed by compiler even though it's unused */ + +static char bcm_undeferrstr[32]; +static const char *const bcmerrorstrtable[] = BCMERRSTRINGTABLE; + +/* Convert the error codes into related error strings */ +const char * +bcmerrorstr(int bcmerror) +{ + /* check if someone added a bcmerror code but forgot to add errorstring */ + ASSERT(ABS(BCME_LAST) == (ARRAYSIZE(bcmerrorstrtable) - 1)); + + if (bcmerror > 0 || bcmerror < BCME_LAST) { + snprintf(bcm_undeferrstr, sizeof(bcm_undeferrstr), "Undefined error %d", bcmerror); + return bcm_undeferrstr; + } + + ASSERT(strlen(bcmerrorstrtable[-bcmerror]) < BCME_STRLEN); + + return bcmerrorstrtable[-bcmerror]; +} + +#endif /* !BCM_BOOTLOADER */ + +#ifdef WLC_LOW +static void +BCMINITFN(bcm_nvram_refresh)(char *flash) +{ + int i; + int ret = 0; + + ASSERT(flash != NULL); + + /* default "empty" vars cache */ + bzero(flash, 2); + + if ((ret = nvram_getall(flash, MAX_NVRAM_SPACE))) + return; + + /* determine nvram length */ + for (i = 0; i < MAX_NVRAM_SPACE; i++) { + if (flash[i] == '\0' && flash[i+1] == '\0') + break; + } + + if (i > 1) + vars_len = i + 2; + else + vars_len = 0; +} + +char * +bcm_nvram_vars(uint *length) +{ +#ifndef BCMNVRAMR + /* cache may be stale if nvram is read/write */ + if (nvram_vars) { + ASSERT(!bcmreclaimed); + bcm_nvram_refresh(nvram_vars); + } +#endif + if (length) + *length = vars_len; + return nvram_vars; +} + +/* copy nvram vars into locally-allocated multi-string array */ +int +BCMINITFN(bcm_nvram_cache)(void *sih) +{ + int ret = 0; + void *osh; + char *flash = NULL; + + if (vars_len >= 0) { +#ifndef BCMNVRAMR + bcm_nvram_refresh(nvram_vars); +#endif + return 0; + } + + osh = si_osh((si_t *)sih); + + /* allocate memory and read in flash */ + if (!(flash = MALLOC(osh, MAX_NVRAM_SPACE))) { + ret = BCME_NOMEM; + goto exit; + } + + bcm_nvram_refresh(flash); + +#ifdef BCMNVRAMR + if (vars_len > 3) { + /* copy into a properly-sized buffer */ + if (!(nvram_vars = MALLOC(osh, vars_len))) { + ret = BCME_NOMEM; + } else + bcopy(flash, nvram_vars, vars_len); + } + MFREE(osh, flash, MAX_NVRAM_SPACE); +#else + /* cache must be full size of nvram if read/write */ + nvram_vars = flash; +#endif /* BCMNVRAMR */ + +exit: + return ret; +} +#endif /* WLC_LOW */ + +#ifdef BCMDBG_PKT /* pkt logging for debugging */ +/* Add a packet to the pktlist */ +static void +_pktlist_add(pktlist_info_t *pktlist, void *pkt, int line, char *file) +{ + uint16 i; + char *basename; +#ifdef BCMDBG_PTRACE + uint16 *idx = PKTLIST_IDX(pkt); +#endif /* BCMDBG_PTRACE */ + + ASSERT(pktlist->count < PKTLIST_SIZE); + + /* Verify the packet is not already part of the list */ + for (i = 0; i < pktlist->count; i++) { + if (pktlist->list[i].pkt == pkt) + ASSERT(0); + } + pktlist->list[pktlist->count].pkt = pkt; + pktlist->list[pktlist->count].line = line; + + basename = strrchr(file, '/'); + if (basename) + basename++; + else + basename = file; + pktlist->list[pktlist->count].file = basename; +#ifdef BCMDBG_PTRACE + *idx = pktlist->count; + bzero(pktlist->list[pktlist->count].pkt_trace, PKTTRACE_MAX_BYTES); +#endif /* BCMDBG_PTRACE */ + pktlist->count++; + + return; +} + +void +pktlist_add(pktlist_info_t *pktlist, void *pkt, int line, char *file) +{ + void *p; + for (p = pkt; p != NULL; p = PKTCLINK(p)) + _pktlist_add(pktlist, p, line, file); +} + +/* Remove a packet from the pktlist */ +static void +_pktlist_remove(pktlist_info_t *pktlist, void *pkt) +{ + uint16 i; + uint16 num = pktlist->count; +#ifdef BCMDBG_PTRACE + uint16 *idx = PKTLIST_IDX(pkt); + + ASSERT((*idx) < pktlist->count); +#endif /* BCMDBG_PTRACE */ + + /* find the index where pkt exists */ + for (i = 0; i < num; i++) { + /* check for the existence of pkt in the list */ + if (pktlist->list[i].pkt == pkt) { +#ifdef BCMDBG_PTRACE + ASSERT((*idx) == i); +#endif /* BCMDBG_PTRACE */ + /* replace with the last element */ + pktlist->list[i].pkt = pktlist->list[num-1].pkt; + pktlist->list[i].line = pktlist->list[num-1].line; + pktlist->list[i].file = pktlist->list[num-1].file; +#ifdef BCMDBG_PTRACE + memcpy(pktlist->list[i].pkt_trace, pktlist->list[num-1].pkt_trace, + PKTTRACE_MAX_BYTES); + idx = PKTLIST_IDX(pktlist->list[i].pkt); + *idx = i; +#endif /* BCMDBG_PTRACE */ + pktlist->count--; + return; + } + } + ASSERT(0); +} + +void +pktlist_remove(pktlist_info_t *pktlist, void *pkt) +{ + void *p; + for (p = pkt; p != NULL; p = PKTCLINK(p)) + _pktlist_remove(pktlist, p); +} + +#ifdef BCMDBG_PTRACE +static void +_pktlist_trace(pktlist_info_t *pktlist, void *pkt, uint16 bit) +{ + uint16 *idx = PKTLIST_IDX(pkt); + + ASSERT(((*idx) < pktlist->count) && (bit < PKTTRACE_MAX_BITS)); + ASSERT(pktlist->list[(*idx)].pkt == pkt); + + pktlist->list[(*idx)].pkt_trace[bit/NBBY] |= (1 << ((bit)%NBBY)); + +} +void +pktlist_trace(pktlist_info_t *pktlist, void *pkt, uint16 bit) +{ + void *p; + for (p = pkt; p != NULL; p = PKTCLINK(p)) + _pktlist_trace(pktlist, p, bit); +} +#endif /* BCMDBG_PTRACE */ + +/* Dump the pktlist (and the contents of each packet if 'data' + * is set). 'buf' should be large enough + */ + +char * +pktlist_dump(pktlist_info_t *pktlist, char *buf) +{ + char *obuf = buf; + uint16 i; + + if (buf != NULL) + buf += sprintf(buf, "Packet list dump:\n"); + else + printf("Packet list dump:\n"); + + for (i = 0; i < (pktlist->count); i++) { + if (buf != NULL) + buf += sprintf(buf, "Pkt_addr: 0x%p Line: %d File: %s\t", + pktlist->list[i].pkt, pktlist->list[i].line, + pktlist->list[i].file); + else + printf("Pkt_addr: 0x%p Line: %d File: %s\t", pktlist->list[i].pkt, + pktlist->list[i].line, pktlist->list[i].file); + +/* #ifdef NOTDEF Remove this ifdef to print pkttag and pktdata */ + if (buf != NULL) { + if (PKTTAG(pktlist->list[i].pkt)) { + /* Print pkttag */ + buf += sprintf(buf, "Pkttag(in hex): "); + buf += bcm_format_hex(buf, PKTTAG(pktlist->list[i].pkt), + OSL_PKTTAG_SZ); + } + buf += sprintf(buf, "Pktdata(in hex): "); + buf += bcm_format_hex(buf, PKTDATA(NULL, pktlist->list[i].pkt), + PKTLEN(NULL, pktlist->list[i].pkt)); + } else { + void *pkt = pktlist->list[i].pkt, *npkt; + + printf("Pkt[%d] Dump:\n", i); + while (pkt) { + int hroom, pktlen; + uchar *src; +#ifdef BCMDBG_PTRACE + uint16 *idx = PKTLIST_IDX(pkt); + + ASSERT((*idx) < pktlist->count); + prhex("Pkt Trace (in hex):", pktlist->list[(*idx)].pkt_trace, + PKTTRACE_MAX_BYTES); +#endif /* BCMDBG_PTRACE */ + npkt = (void *)PKTNEXT(NULL, pkt); + PKTSETNEXT(NULL, pkt, NULL); + + src = (uchar *)(PKTTAG(pkt)); + pktlen = PKTLEN(NULL, pkt); + hroom = PKTHEADROOM(NULL, pkt); + + printf("Pkttag_addr: %p\n", src); + if (src) + prhex("Pkttag(in hex): ", src, OSL_PKTTAG_SZ); + src = (uchar *) (PKTDATA(NULL, pkt)); + printf("Pkthead_addr: %p len: %d\n", src - hroom, hroom); + prhex("Pkt headroom content(in hex): ", src - hroom, hroom); + printf("Pktdata_addr: %p len: %d\n", src, pktlen); + prhex("Pktdata(in hex): ", src, pktlen); + + pkt = npkt; + } + } +/* #endif NOTDEF */ + + if (buf != NULL) + buf += sprintf(buf, "\n"); + else + printf("\n"); + } + return obuf; +} +#endif /* BCMDBG_PKT */ + +/* iovar table lookup */ +/* XXX could mandate sorted tables and do a binary search */ +const bcm_iovar_t* +bcm_iovar_lookup(const bcm_iovar_t *table, const char *name) +{ + const bcm_iovar_t *vi; + const char *lookup_name; + + /* skip any ':' delimited option prefixes */ + lookup_name = strrchr(name, ':'); + if (lookup_name != NULL) + lookup_name++; + else + lookup_name = name; + + ASSERT(table != NULL); + + for (vi = table; vi->name; vi++) { + if (!strcmp(vi->name, lookup_name)) + return vi; + } + /* ran to end of table */ + + return NULL; /* var name not found */ +} + +int +bcm_iovar_lencheck(const bcm_iovar_t *vi, void *arg, int len, bool set) +{ + int bcmerror = 0; + + /* length check on io buf */ + switch (vi->type) { + case IOVT_BOOL: + case IOVT_INT8: + case IOVT_INT16: + case IOVT_INT32: + case IOVT_UINT8: + case IOVT_UINT16: + case IOVT_UINT32: + /* all integers are int32 sized args at the ioctl interface */ + if (len < (int)sizeof(int)) { + bcmerror = BCME_BUFTOOSHORT; + } + break; + + case IOVT_BUFFER: + /* buffer must meet minimum length requirement */ + if (len < vi->minlen) { + bcmerror = BCME_BUFTOOSHORT; + } + break; + + case IOVT_VOID: + if (!set) { + /* Cannot return nil... */ + bcmerror = BCME_UNSUPPORTED; + } else if (len) { + /* Set is an action w/o parameters */ + bcmerror = BCME_BUFTOOLONG; + } + break; + + default: + /* unknown type for length check in iovar info */ + ASSERT(0); + bcmerror = BCME_UNSUPPORTED; + } + + return bcmerror; +} + +#endif /* BCMDRIVER */ + + +/******************************************************************************* + * crc8 + * + * Computes a crc8 over the input data using the polynomial: + * + * x^8 + x^7 +x^6 + x^4 + x^2 + 1 + * + * The caller provides the initial value (either CRC8_INIT_VALUE + * or the previous returned value) to allow for processing of + * discontiguous blocks of data. When generating the CRC the + * caller is responsible for complementing the final return value + * and inserting it into the byte stream. When checking, a final + * return value of CRC8_GOOD_VALUE indicates a valid CRC. + * + * Reference: Dallas Semiconductor Application Note 27 + * Williams, Ross N., "A Painless Guide to CRC Error Detection Algorithms", + * ver 3, Aug 1993, ross@guest.adelaide.edu.au, Rocksoft Pty Ltd., + * ftp://ftp.rocksoft.com/clients/rocksoft/papers/crc_v3.txt + * + * **************************************************************************** + */ + +static const uint8 crc8_table[256] = { + 0x00, 0xF7, 0xB9, 0x4E, 0x25, 0xD2, 0x9C, 0x6B, + 0x4A, 0xBD, 0xF3, 0x04, 0x6F, 0x98, 0xD6, 0x21, + 0x94, 0x63, 0x2D, 0xDA, 0xB1, 0x46, 0x08, 0xFF, + 0xDE, 0x29, 0x67, 0x90, 0xFB, 0x0C, 0x42, 0xB5, + 0x7F, 0x88, 0xC6, 0x31, 0x5A, 0xAD, 0xE3, 0x14, + 0x35, 0xC2, 0x8C, 0x7B, 0x10, 0xE7, 0xA9, 0x5E, + 0xEB, 0x1C, 0x52, 0xA5, 0xCE, 0x39, 0x77, 0x80, + 0xA1, 0x56, 0x18, 0xEF, 0x84, 0x73, 0x3D, 0xCA, + 0xFE, 0x09, 0x47, 0xB0, 0xDB, 0x2C, 0x62, 0x95, + 0xB4, 0x43, 0x0D, 0xFA, 0x91, 0x66, 0x28, 0xDF, + 0x6A, 0x9D, 0xD3, 0x24, 0x4F, 0xB8, 0xF6, 0x01, + 0x20, 0xD7, 0x99, 0x6E, 0x05, 0xF2, 0xBC, 0x4B, + 0x81, 0x76, 0x38, 0xCF, 0xA4, 0x53, 0x1D, 0xEA, + 0xCB, 0x3C, 0x72, 0x85, 0xEE, 0x19, 0x57, 0xA0, + 0x15, 0xE2, 0xAC, 0x5B, 0x30, 0xC7, 0x89, 0x7E, + 0x5F, 0xA8, 0xE6, 0x11, 0x7A, 0x8D, 0xC3, 0x34, + 0xAB, 0x5C, 0x12, 0xE5, 0x8E, 0x79, 0x37, 0xC0, + 0xE1, 0x16, 0x58, 0xAF, 0xC4, 0x33, 0x7D, 0x8A, + 0x3F, 0xC8, 0x86, 0x71, 0x1A, 0xED, 0xA3, 0x54, + 0x75, 0x82, 0xCC, 0x3B, 0x50, 0xA7, 0xE9, 0x1E, + 0xD4, 0x23, 0x6D, 0x9A, 0xF1, 0x06, 0x48, 0xBF, + 0x9E, 0x69, 0x27, 0xD0, 0xBB, 0x4C, 0x02, 0xF5, + 0x40, 0xB7, 0xF9, 0x0E, 0x65, 0x92, 0xDC, 0x2B, + 0x0A, 0xFD, 0xB3, 0x44, 0x2F, 0xD8, 0x96, 0x61, + 0x55, 0xA2, 0xEC, 0x1B, 0x70, 0x87, 0xC9, 0x3E, + 0x1F, 0xE8, 0xA6, 0x51, 0x3A, 0xCD, 0x83, 0x74, + 0xC1, 0x36, 0x78, 0x8F, 0xE4, 0x13, 0x5D, 0xAA, + 0x8B, 0x7C, 0x32, 0xC5, 0xAE, 0x59, 0x17, 0xE0, + 0x2A, 0xDD, 0x93, 0x64, 0x0F, 0xF8, 0xB6, 0x41, + 0x60, 0x97, 0xD9, 0x2E, 0x45, 0xB2, 0xFC, 0x0B, + 0xBE, 0x49, 0x07, 0xF0, 0x9B, 0x6C, 0x22, 0xD5, + 0xF4, 0x03, 0x4D, 0xBA, 0xD1, 0x26, 0x68, 0x9F +}; + +#define CRC_INNER_LOOP(n, c, x) \ + (c) = ((c) >> 8) ^ crc##n##_table[((c) ^ (x)) & 0xff] + +uint8 +BCMROMFN(hndcrc8)( + uint8 *pdata, /* pointer to array of data to process */ + uint nbytes, /* number of input data bytes to process */ + uint8 crc /* either CRC8_INIT_VALUE or previous return value */ +) +{ + /* hard code the crc loop instead of using CRC_INNER_LOOP macro + * to avoid the undefined and unnecessary (uint8 >> 8) operation. + */ + while (nbytes-- > 0) + crc = crc8_table[(crc ^ *pdata++) & 0xff]; + + return crc; +} + +/******************************************************************************* + * crc16 + * + * Computes a crc16 over the input data using the polynomial: + * + * x^16 + x^12 +x^5 + 1 + * + * The caller provides the initial value (either CRC16_INIT_VALUE + * or the previous returned value) to allow for processing of + * discontiguous blocks of data. When generating the CRC the + * caller is responsible for complementing the final return value + * and inserting it into the byte stream. When checking, a final + * return value of CRC16_GOOD_VALUE indicates a valid CRC. + * + * Reference: Dallas Semiconductor Application Note 27 + * Williams, Ross N., "A Painless Guide to CRC Error Detection Algorithms", + * ver 3, Aug 1993, ross@guest.adelaide.edu.au, Rocksoft Pty Ltd., + * ftp://ftp.rocksoft.com/clients/rocksoft/papers/crc_v3.txt + * + * **************************************************************************** + */ + +static const uint16 crc16_table[256] = { + 0x0000, 0x1189, 0x2312, 0x329B, 0x4624, 0x57AD, 0x6536, 0x74BF, + 0x8C48, 0x9DC1, 0xAF5A, 0xBED3, 0xCA6C, 0xDBE5, 0xE97E, 0xF8F7, + 0x1081, 0x0108, 0x3393, 0x221A, 0x56A5, 0x472C, 0x75B7, 0x643E, + 0x9CC9, 0x8D40, 0xBFDB, 0xAE52, 0xDAED, 0xCB64, 0xF9FF, 0xE876, + 0x2102, 0x308B, 0x0210, 0x1399, 0x6726, 0x76AF, 0x4434, 0x55BD, + 0xAD4A, 0xBCC3, 0x8E58, 0x9FD1, 0xEB6E, 0xFAE7, 0xC87C, 0xD9F5, + 0x3183, 0x200A, 0x1291, 0x0318, 0x77A7, 0x662E, 0x54B5, 0x453C, + 0xBDCB, 0xAC42, 0x9ED9, 0x8F50, 0xFBEF, 0xEA66, 0xD8FD, 0xC974, + 0x4204, 0x538D, 0x6116, 0x709F, 0x0420, 0x15A9, 0x2732, 0x36BB, + 0xCE4C, 0xDFC5, 0xED5E, 0xFCD7, 0x8868, 0x99E1, 0xAB7A, 0xBAF3, + 0x5285, 0x430C, 0x7197, 0x601E, 0x14A1, 0x0528, 0x37B3, 0x263A, + 0xDECD, 0xCF44, 0xFDDF, 0xEC56, 0x98E9, 0x8960, 0xBBFB, 0xAA72, + 0x6306, 0x728F, 0x4014, 0x519D, 0x2522, 0x34AB, 0x0630, 0x17B9, + 0xEF4E, 0xFEC7, 0xCC5C, 0xDDD5, 0xA96A, 0xB8E3, 0x8A78, 0x9BF1, + 0x7387, 0x620E, 0x5095, 0x411C, 0x35A3, 0x242A, 0x16B1, 0x0738, + 0xFFCF, 0xEE46, 0xDCDD, 0xCD54, 0xB9EB, 0xA862, 0x9AF9, 0x8B70, + 0x8408, 0x9581, 0xA71A, 0xB693, 0xC22C, 0xD3A5, 0xE13E, 0xF0B7, + 0x0840, 0x19C9, 0x2B52, 0x3ADB, 0x4E64, 0x5FED, 0x6D76, 0x7CFF, + 0x9489, 0x8500, 0xB79B, 0xA612, 0xD2AD, 0xC324, 0xF1BF, 0xE036, + 0x18C1, 0x0948, 0x3BD3, 0x2A5A, 0x5EE5, 0x4F6C, 0x7DF7, 0x6C7E, + 0xA50A, 0xB483, 0x8618, 0x9791, 0xE32E, 0xF2A7, 0xC03C, 0xD1B5, + 0x2942, 0x38CB, 0x0A50, 0x1BD9, 0x6F66, 0x7EEF, 0x4C74, 0x5DFD, + 0xB58B, 0xA402, 0x9699, 0x8710, 0xF3AF, 0xE226, 0xD0BD, 0xC134, + 0x39C3, 0x284A, 0x1AD1, 0x0B58, 0x7FE7, 0x6E6E, 0x5CF5, 0x4D7C, + 0xC60C, 0xD785, 0xE51E, 0xF497, 0x8028, 0x91A1, 0xA33A, 0xB2B3, + 0x4A44, 0x5BCD, 0x6956, 0x78DF, 0x0C60, 0x1DE9, 0x2F72, 0x3EFB, + 0xD68D, 0xC704, 0xF59F, 0xE416, 0x90A9, 0x8120, 0xB3BB, 0xA232, + 0x5AC5, 0x4B4C, 0x79D7, 0x685E, 0x1CE1, 0x0D68, 0x3FF3, 0x2E7A, + 0xE70E, 0xF687, 0xC41C, 0xD595, 0xA12A, 0xB0A3, 0x8238, 0x93B1, + 0x6B46, 0x7ACF, 0x4854, 0x59DD, 0x2D62, 0x3CEB, 0x0E70, 0x1FF9, + 0xF78F, 0xE606, 0xD49D, 0xC514, 0xB1AB, 0xA022, 0x92B9, 0x8330, + 0x7BC7, 0x6A4E, 0x58D5, 0x495C, 0x3DE3, 0x2C6A, 0x1EF1, 0x0F78 +}; + +uint16 +BCMROMFN(hndcrc16)( + uint8 *pdata, /* pointer to array of data to process */ + uint nbytes, /* number of input data bytes to process */ + uint16 crc /* either CRC16_INIT_VALUE or previous return value */ +) +{ + while (nbytes-- > 0) + CRC_INNER_LOOP(16, crc, *pdata++); + return crc; +} + +static const uint32 crc32_table[256] = { + 0x00000000, 0x77073096, 0xEE0E612C, 0x990951BA, + 0x076DC419, 0x706AF48F, 0xE963A535, 0x9E6495A3, + 0x0EDB8832, 0x79DCB8A4, 0xE0D5E91E, 0x97D2D988, + 0x09B64C2B, 0x7EB17CBD, 0xE7B82D07, 0x90BF1D91, + 0x1DB71064, 0x6AB020F2, 0xF3B97148, 0x84BE41DE, + 0x1ADAD47D, 0x6DDDE4EB, 0xF4D4B551, 0x83D385C7, + 0x136C9856, 0x646BA8C0, 0xFD62F97A, 0x8A65C9EC, + 0x14015C4F, 0x63066CD9, 0xFA0F3D63, 0x8D080DF5, + 0x3B6E20C8, 0x4C69105E, 0xD56041E4, 0xA2677172, + 0x3C03E4D1, 0x4B04D447, 0xD20D85FD, 0xA50AB56B, + 0x35B5A8FA, 0x42B2986C, 0xDBBBC9D6, 0xACBCF940, + 0x32D86CE3, 0x45DF5C75, 0xDCD60DCF, 0xABD13D59, + 0x26D930AC, 0x51DE003A, 0xC8D75180, 0xBFD06116, + 0x21B4F4B5, 0x56B3C423, 0xCFBA9599, 0xB8BDA50F, + 0x2802B89E, 0x5F058808, 0xC60CD9B2, 0xB10BE924, + 0x2F6F7C87, 0x58684C11, 0xC1611DAB, 0xB6662D3D, + 0x76DC4190, 0x01DB7106, 0x98D220BC, 0xEFD5102A, + 0x71B18589, 0x06B6B51F, 0x9FBFE4A5, 0xE8B8D433, + 0x7807C9A2, 0x0F00F934, 0x9609A88E, 0xE10E9818, + 0x7F6A0DBB, 0x086D3D2D, 0x91646C97, 0xE6635C01, + 0x6B6B51F4, 0x1C6C6162, 0x856530D8, 0xF262004E, + 0x6C0695ED, 0x1B01A57B, 0x8208F4C1, 0xF50FC457, + 0x65B0D9C6, 0x12B7E950, 0x8BBEB8EA, 0xFCB9887C, + 0x62DD1DDF, 0x15DA2D49, 0x8CD37CF3, 0xFBD44C65, + 0x4DB26158, 0x3AB551CE, 0xA3BC0074, 0xD4BB30E2, + 0x4ADFA541, 0x3DD895D7, 0xA4D1C46D, 0xD3D6F4FB, + 0x4369E96A, 0x346ED9FC, 0xAD678846, 0xDA60B8D0, + 0x44042D73, 0x33031DE5, 0xAA0A4C5F, 0xDD0D7CC9, + 0x5005713C, 0x270241AA, 0xBE0B1010, 0xC90C2086, + 0x5768B525, 0x206F85B3, 0xB966D409, 0xCE61E49F, + 0x5EDEF90E, 0x29D9C998, 0xB0D09822, 0xC7D7A8B4, + 0x59B33D17, 0x2EB40D81, 0xB7BD5C3B, 0xC0BA6CAD, + 0xEDB88320, 0x9ABFB3B6, 0x03B6E20C, 0x74B1D29A, + 0xEAD54739, 0x9DD277AF, 0x04DB2615, 0x73DC1683, + 0xE3630B12, 0x94643B84, 0x0D6D6A3E, 0x7A6A5AA8, + 0xE40ECF0B, 0x9309FF9D, 0x0A00AE27, 0x7D079EB1, + 0xF00F9344, 0x8708A3D2, 0x1E01F268, 0x6906C2FE, + 0xF762575D, 0x806567CB, 0x196C3671, 0x6E6B06E7, + 0xFED41B76, 0x89D32BE0, 0x10DA7A5A, 0x67DD4ACC, + 0xF9B9DF6F, 0x8EBEEFF9, 0x17B7BE43, 0x60B08ED5, + 0xD6D6A3E8, 0xA1D1937E, 0x38D8C2C4, 0x4FDFF252, + 0xD1BB67F1, 0xA6BC5767, 0x3FB506DD, 0x48B2364B, + 0xD80D2BDA, 0xAF0A1B4C, 0x36034AF6, 0x41047A60, + 0xDF60EFC3, 0xA867DF55, 0x316E8EEF, 0x4669BE79, + 0xCB61B38C, 0xBC66831A, 0x256FD2A0, 0x5268E236, + 0xCC0C7795, 0xBB0B4703, 0x220216B9, 0x5505262F, + 0xC5BA3BBE, 0xB2BD0B28, 0x2BB45A92, 0x5CB36A04, + 0xC2D7FFA7, 0xB5D0CF31, 0x2CD99E8B, 0x5BDEAE1D, + 0x9B64C2B0, 0xEC63F226, 0x756AA39C, 0x026D930A, + 0x9C0906A9, 0xEB0E363F, 0x72076785, 0x05005713, + 0x95BF4A82, 0xE2B87A14, 0x7BB12BAE, 0x0CB61B38, + 0x92D28E9B, 0xE5D5BE0D, 0x7CDCEFB7, 0x0BDBDF21, + 0x86D3D2D4, 0xF1D4E242, 0x68DDB3F8, 0x1FDA836E, + 0x81BE16CD, 0xF6B9265B, 0x6FB077E1, 0x18B74777, + 0x88085AE6, 0xFF0F6A70, 0x66063BCA, 0x11010B5C, + 0x8F659EFF, 0xF862AE69, 0x616BFFD3, 0x166CCF45, + 0xA00AE278, 0xD70DD2EE, 0x4E048354, 0x3903B3C2, + 0xA7672661, 0xD06016F7, 0x4969474D, 0x3E6E77DB, + 0xAED16A4A, 0xD9D65ADC, 0x40DF0B66, 0x37D83BF0, + 0xA9BCAE53, 0xDEBB9EC5, 0x47B2CF7F, 0x30B5FFE9, + 0xBDBDF21C, 0xCABAC28A, 0x53B39330, 0x24B4A3A6, + 0xBAD03605, 0xCDD70693, 0x54DE5729, 0x23D967BF, + 0xB3667A2E, 0xC4614AB8, 0x5D681B02, 0x2A6F2B94, + 0xB40BBE37, 0xC30C8EA1, 0x5A05DF1B, 0x2D02EF8D +}; + +/* + * crc input is CRC32_INIT_VALUE for a fresh start, or previous return value if + * accumulating over multiple pieces. + */ +uint32 +BCMROMFN(hndcrc32)(uint8 *pdata, uint nbytes, uint32 crc) +{ + uint8 *pend; +#ifdef __mips__ + uint8 tmp[4]; + ulong *tptr = (ulong *)tmp; + + if (nbytes > 3) { + /* in case the beginning of the buffer isn't aligned */ + pend = (uint8 *)((uint)(pdata + 3) & ~0x3); + nbytes -= (pend - pdata); + while (pdata < pend) + CRC_INNER_LOOP(32, crc, *pdata++); + } + + if (nbytes > 3) { + /* handle bulk of data as 32-bit words */ + pend = pdata + (nbytes & ~0x3); + while (pdata < pend) { + *tptr = *(ulong *)pdata; + pdata += sizeof(ulong *); + CRC_INNER_LOOP(32, crc, tmp[0]); + CRC_INNER_LOOP(32, crc, tmp[1]); + CRC_INNER_LOOP(32, crc, tmp[2]); + CRC_INNER_LOOP(32, crc, tmp[3]); + } + } + + /* 1-3 bytes at end of buffer */ + pend = pdata + (nbytes & 0x03); + while (pdata < pend) + CRC_INNER_LOOP(32, crc, *pdata++); +#else + pend = pdata + nbytes; + while (pdata < pend) + CRC_INNER_LOOP(32, crc, *pdata++); +#endif /* __mips__ */ + + return crc; +} + +#ifdef notdef +#define CLEN 1499 /* CRC Length */ +#define CBUFSIZ (CLEN+4) +#define CNBUFS 5 /* # of bufs */ + +void +testcrc32(void) +{ + uint j, k, l; + uint8 *buf; + uint len[CNBUFS]; + uint32 crcr; + uint32 crc32tv[CNBUFS] = + {0xd2cb1faa, 0xd385c8fa, 0xf5b4f3f3, 0x55789e20, 0x00343110}; + + ASSERT((buf = MALLOC(CBUFSIZ*CNBUFS)) != NULL); + + /* step through all possible alignments */ + for (l = 0; l <= 4; l++) { + for (j = 0; j < CNBUFS; j++) { + len[j] = CLEN; + for (k = 0; k < len[j]; k++) + *(buf + j*CBUFSIZ + (k+l)) = (j+k) & 0xff; + } + + for (j = 0; j < CNBUFS; j++) { + crcr = crc32(buf + j*CBUFSIZ + l, len[j], CRC32_INIT_VALUE); + ASSERT(crcr == crc32tv[j]); + } + } + + MFREE(buf, CBUFSIZ*CNBUFS); + return; +} +#endif /* notdef */ + +/* + * Advance from the current 1-byte tag/1-byte length/variable-length value + * triple, to the next, returning a pointer to the next. + * If the current or next TLV is invalid (does not fit in given buffer length), + * NULL is returned. + * *buflen is not modified if the TLV elt parameter is invalid, or is decremented + * by the TLV parameter's length if it is valid. + */ +bcm_tlv_t * +BCMROMFN(bcm_next_tlv)(bcm_tlv_t *elt, int *buflen) +{ + int len; + + /* validate current elt */ + if (!bcm_valid_tlv(elt, *buflen)) + return NULL; + + /* advance to next elt */ + len = elt->len; + elt = (bcm_tlv_t*)(elt->data + len); + *buflen -= (TLV_HDR_LEN + len); + + /* validate next elt */ + if (!bcm_valid_tlv(elt, *buflen)) + return NULL; + + return elt; +} + +/* + * Traverse a string of 1-byte tag/1-byte length/variable-length value + * triples, returning a pointer to the substring whose first element + * matches tag + */ +bcm_tlv_t * +BCMROMFN(bcm_parse_tlvs)(void *buf, int buflen, uint key) +{ + bcm_tlv_t *elt; + int totlen; + + elt = (bcm_tlv_t*)buf; + totlen = buflen; + + /* find tagged parameter */ + while (totlen >= TLV_HDR_LEN) { + int len = elt->len; + + /* validate remaining totlen */ + if ((elt->id == key) && + (totlen >= (len + TLV_HDR_LEN))) + return (elt); + + elt = (bcm_tlv_t*)((uint8*)elt + (len + TLV_HDR_LEN)); + totlen -= (len + TLV_HDR_LEN); + } + + return NULL; +} + +/* + * Traverse a string of 1-byte tag/1-byte length/variable-length value + * triples, returning a pointer to the substring whose first element + * matches tag. Stop parsing when we see an element whose ID is greater + * than the target key. + */ +bcm_tlv_t * +BCMROMFN(bcm_parse_ordered_tlvs)(void *buf, int buflen, uint key) +{ + bcm_tlv_t *elt; + int totlen; + + elt = (bcm_tlv_t*)buf; + totlen = buflen; + + /* find tagged parameter */ + while (totlen >= TLV_HDR_LEN) { + uint id = elt->id; + int len = elt->len; + + /* Punt if we start seeing IDs > than target key */ + if (id > key) + return (NULL); + + /* validate remaining totlen */ + if ((id == key) && + (totlen >= (len + TLV_HDR_LEN))) + return (elt); + + elt = (bcm_tlv_t*)((uint8*)elt + (len + TLV_HDR_LEN)); + totlen -= (len + TLV_HDR_LEN); + } + return NULL; +} + +#if defined(BCMDBG) || defined(BCMDBG_ERR) || defined(WLMSG_PRHDRS) || \ + defined(WLMSG_PRPKT) || defined(WLMSG_ASSOC) || defined(BCMDBG_DUMP) || \ + defined(DHD_DEBUG) +int +bcm_format_field(const bcm_bit_desc_ex_t *bd, uint32 flags, char* buf, int len) +{ + int i, slen = 0; + uint32 bit, mask; + const char *name; + mask = bd->mask; + if (len < 2 || !buf) + return 0; + + buf[0] = '\0'; + + for (i = 0; (name = bd->bitfield[i].name) != NULL; i++) { + bit = bd->bitfield[i].bit; + if ((flags & mask) == bit) { + if (len > (int)strlen(name)) { + slen = strlen(name); + strncpy(buf, name, slen+1); + } + break; + } + } + return slen; +} + +int +bcm_format_flags(const bcm_bit_desc_t *bd, uint32 flags, char* buf, int len) +{ + int i; + char* p = buf; + char hexstr[16]; + int slen = 0, nlen = 0; + uint32 bit; + const char* name; + + if (len < 2 || !buf) + return 0; + + buf[0] = '\0'; + + for (i = 0; flags != 0; i++) { + bit = bd[i].bit; + name = bd[i].name; + if (bit == 0 && flags != 0) { + /* print any unnamed bits */ + snprintf(hexstr, 16, "0x%X", flags); + name = hexstr; + flags = 0; /* exit loop */ + } else if ((flags & bit) == 0) + continue; + flags &= ~bit; + nlen = strlen(name); + slen += nlen; + /* count btwn flag space */ + if (flags != 0) + slen += 1; + /* need NULL char as well */ + if (len <= slen) + break; + /* copy NULL char but don't count it */ + strncpy(p, name, nlen + 1); + p += nlen; + /* copy btwn flag space and NULL char */ + if (flags != 0) + p += snprintf(p, 2, " "); + } + + /* indicate the str was too short */ + if (flags != 0) { + if (len < 2) + p -= 2 - len; /* overwrite last char */ + p += snprintf(p, 2, ">"); + } + + return (int)(p - buf); +} + +/* print bytes formatted as hex to a string. return the resulting string length */ +int +bcm_format_hex(char *str, const void *bytes, int len) +{ + int i; + char *p = str; + const uint8 *src = (const uint8*)bytes; + + for (i = 0; i < len; i++) { + p += snprintf(p, 3, "%02X", *src); + src++; + } + return (int)(p - str); +} +#endif /* BCMDBG || WLMSG_PRHDRS || WLMSG_PRPKT || WLMSG_ASSOC || BCMDBG_DUMP || DHD_DEBUG */ + +/* pretty hex print a contiguous buffer */ +void +prhex(const char *msg, uchar *buf, uint nbytes) +{ + char line[128], *p; + int len = sizeof(line); + int nchar; + uint i; + + if (msg && (msg[0] != '\0')) + printf("%s:\n", msg); + + p = line; + for (i = 0; i < nbytes; i++) { + if (i % 16 == 0) { + nchar = snprintf(p, len, " %04d: ", i); /* line prefix */ + p += nchar; + len -= nchar; + } + if (len > 0) { + nchar = snprintf(p, len, "%02x ", buf[i]); + p += nchar; + len -= nchar; + } + + if (i % 16 == 15) { + printf("%s\n", line); /* flush line */ + p = line; + len = sizeof(line); + } + } + + /* flush last partial line */ + if (p != line) + printf("%s\n", line); +} + +static const char *crypto_algo_names[] = { + "NONE", + "WEP1", + "TKIP", + "WEP128", + "AES_CCM", + "AES_OCB_MSDU", + "AES_OCB_MPDU", +#ifdef BCMCCX + "CKIP", + "CKIP_MMH", + "WEP_MMH", + "NALG" +#else + "NALG" + "UNDEF", + "UNDEF", + "UNDEF", +#endif /* BCMCCX */ +#ifdef BCMWAPI_WPI + "WAPI", +#endif /* BCMWAPI_WPI */ + "UNDEF" +}; + +const char * +bcm_crypto_algo_name(uint algo) +{ + return (algo < ARRAYSIZE(crypto_algo_names)) ? crypto_algo_names[algo] : "ERR"; +} + +#ifdef BCMDBG +void +deadbeef(void *p, uint len) +{ + static uint8 meat[] = { 0xde, 0xad, 0xbe, 0xef }; + + while (len-- > 0) { + *(uint8*)p = meat[((uintptr)p) & 3]; + p = (uint8*)p + 1; + } +} +#endif /* BCMDBG */ + +char * +bcm_chipname(uint chipid, char *buf, uint len) +{ + const char *fmt; + + fmt = ((chipid > 0xa000) || (chipid < 0x4000)) ? "%d" : "%x"; + snprintf(buf, len, fmt, chipid); + return buf; +} + +/* Produce a human-readable string for boardrev */ +char * +bcm_brev_str(uint32 brev, char *buf) +{ + if (brev < 0x100) + snprintf(buf, 8, "%d.%d", (brev & 0xf0) >> 4, brev & 0xf); + else + snprintf(buf, 8, "%c%03x", ((brev & 0xf000) == 0x1000) ? 'P' : 'A', brev & 0xfff); + + return (buf); +} + +#define BUFSIZE_TODUMP_ATONCE 512 /* Buffer size */ + +/* dump large strings to console */ +void +printbig(char *buf) +{ + uint len, max_len; + char c; + + len = strlen(buf); + + max_len = BUFSIZE_TODUMP_ATONCE; + + while (len > max_len) { + c = buf[max_len]; + buf[max_len] = '\0'; + printf("%s", buf); + buf[max_len] = c; + + buf += max_len; + len -= max_len; + } + /* print the remaining string */ + printf("%s\n", buf); + return; +} + +/* routine to dump fields in a fileddesc structure */ +uint +bcmdumpfields(bcmutl_rdreg_rtn read_rtn, void *arg0, uint arg1, struct fielddesc *fielddesc_array, + char *buf, uint32 bufsize) +{ + uint filled_len; + int len; + struct fielddesc *cur_ptr; + + filled_len = 0; + cur_ptr = fielddesc_array; + + while (bufsize > 1) { + if (cur_ptr->nameandfmt == NULL) + break; + len = snprintf(buf, bufsize, cur_ptr->nameandfmt, + read_rtn(arg0, arg1, cur_ptr->offset)); + /* check for snprintf overflow or error */ + if (len < 0 || (uint32)len >= bufsize) + len = bufsize - 1; + buf += len; + bufsize -= len; + filled_len += len; + cur_ptr++; + } + return filled_len; +} + +uint +bcm_mkiovar(char *name, char *data, uint datalen, char *buf, uint buflen) +{ + uint len; + + len = strlen(name) + 1; + + if ((len + datalen) > buflen) + return 0; + + strncpy(buf, name, buflen); + + /* append data onto the end of the name string */ + memcpy(&buf[len], data, datalen); + len += datalen; + + return len; +} + +/* Quarter dBm units to mW + * Table starts at QDBM_OFFSET, so the first entry is mW for qdBm=153 + * Table is offset so the last entry is largest mW value that fits in + * a uint16. + */ + +#define QDBM_OFFSET 153 /* Offset for first entry */ +#define QDBM_TABLE_LEN 40 /* Table size */ + +/* Smallest mW value that will round up to the first table entry, QDBM_OFFSET. + * Value is ( mW(QDBM_OFFSET - 1) + mW(QDBM_OFFSET) ) / 2 + */ +#define QDBM_TABLE_LOW_BOUND 6493 /* Low bound */ + +/* Largest mW value that will round down to the last table entry, + * QDBM_OFFSET + QDBM_TABLE_LEN-1. + * Value is ( mW(QDBM_OFFSET + QDBM_TABLE_LEN - 1) + mW(QDBM_OFFSET + QDBM_TABLE_LEN) ) / 2. + */ +#define QDBM_TABLE_HIGH_BOUND 64938 /* High bound */ + +static const uint16 nqdBm_to_mW_map[QDBM_TABLE_LEN] = { +/* qdBm: +0 +1 +2 +3 +4 +5 +6 +7 */ +/* 153: */ 6683, 7079, 7499, 7943, 8414, 8913, 9441, 10000, +/* 161: */ 10593, 11220, 11885, 12589, 13335, 14125, 14962, 15849, +/* 169: */ 16788, 17783, 18836, 19953, 21135, 22387, 23714, 25119, +/* 177: */ 26607, 28184, 29854, 31623, 33497, 35481, 37584, 39811, +/* 185: */ 42170, 44668, 47315, 50119, 53088, 56234, 59566, 63096 +}; + +uint16 +BCMROMFN(bcm_qdbm_to_mw)(uint8 qdbm) +{ + uint factor = 1; + int idx = qdbm - QDBM_OFFSET; + + if (idx >= QDBM_TABLE_LEN) { + /* clamp to max uint16 mW value */ + return 0xFFFF; + } + + /* scale the qdBm index up to the range of the table 0-40 + * where an offset of 40 qdBm equals a factor of 10 mW. + */ + while (idx < 0) { + idx += 40; + factor *= 10; + } + + /* return the mW value scaled down to the correct factor of 10, + * adding in factor/2 to get proper rounding. + */ + return ((nqdBm_to_mW_map[idx] + factor/2) / factor); +} + +uint8 +BCMROMFN(bcm_mw_to_qdbm)(uint16 mw) +{ + uint8 qdbm; + int offset; + uint mw_uint = mw; + uint boundary; + + /* handle boundary case */ + if (mw_uint <= 1) + return 0; + + offset = QDBM_OFFSET; + + /* move mw into the range of the table */ + while (mw_uint < QDBM_TABLE_LOW_BOUND) { + mw_uint *= 10; + offset -= 40; + } + + for (qdbm = 0; qdbm < QDBM_TABLE_LEN-1; qdbm++) { + boundary = nqdBm_to_mW_map[qdbm] + (nqdBm_to_mW_map[qdbm+1] - + nqdBm_to_mW_map[qdbm])/2; + if (mw_uint < boundary) break; + } + + qdbm += (uint8)offset; + + return (qdbm); +} + + +uint +BCMROMFN(bcm_bitcount)(uint8 *bitmap, uint length) +{ + uint bitcount = 0, i; + uint8 tmp; + for (i = 0; i < length; i++) { + tmp = bitmap[i]; + while (tmp) { + bitcount++; + tmp &= (tmp - 1); + } + } + return bitcount; +} + +#ifdef BCMDRIVER + +/* Initialization of bcmstrbuf structure */ +void +bcm_binit(struct bcmstrbuf *b, char *buf, uint size) +{ + b->origsize = b->size = size; + b->origbuf = b->buf = buf; +} + +/* Buffer sprintf wrapper to guard against buffer overflow */ +int +bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...) +{ + va_list ap; + int r; + + va_start(ap, fmt); + + r = vsnprintf(b->buf, b->size, fmt, ap); + + /* Non Ansi C99 compliant returns -1, + * Ansi compliant return r >= b->size, + * bcmstdlib returns 0, handle all + */ + /* r == 0 is also the case when strlen(fmt) is zero. + * typically the case when "" is passed as argument. + */ + if ((r == -1) || (r >= (int)b->size)) { + b->size = 0; + } else { + b->size -= r; + b->buf += r; + } + + va_end(ap); + + return r; +} + +void +bcm_bprhex(struct bcmstrbuf *b, const char *msg, bool newline, uint8 *buf, int len) +{ + int i; + + if (msg != NULL && msg[0] != '\0') + bcm_bprintf(b, "%s", msg); + for (i = 0; i < len; i ++) + bcm_bprintf(b, "%02X", buf[i]); + if (newline) + bcm_bprintf(b, "\n"); +} + +void +bcm_inc_bytes(uchar *num, int num_bytes, uint8 amount) +{ + int i; + + for (i = 0; i < num_bytes; i++) { + num[i] += amount; + if (num[i] >= amount) + break; + amount = 1; + } +} + +int +bcm_cmp_bytes(const uchar *arg1, const uchar *arg2, uint8 nbytes) +{ + int i; + + for (i = nbytes - 1; i >= 0; i--) { + if (arg1[i] != arg2[i]) + return (arg1[i] - arg2[i]); + } + return 0; +} + +void +bcm_print_bytes(const char *name, const uchar *data, int len) +{ + int i; + int per_line = 0; + + printf("%s: %d \n", name ? name : "", len); + for (i = 0; i < len; i++) { + printf("%02x ", *data++); + per_line++; + if (per_line == 16) { + per_line = 0; + printf("\n"); + } + } + printf("\n"); +} +#if defined(WLTINYDUMP) || defined(BCMDBG) || defined(WLMSG_INFORM) || \ + defined(WLMSG_ASSOC) || defined(WLMSG_PRPKT) || defined(WLMSG_WSEC) +#define SSID_FMT_BUF_LEN ((4 * DOT11_MAX_SSID_LEN) + 1) + +int +bcm_format_ssid(char* buf, const uchar ssid[], uint ssid_len) +{ + uint i, c; + char *p = buf; + char *endp = buf + SSID_FMT_BUF_LEN; + + if (ssid_len > DOT11_MAX_SSID_LEN) ssid_len = DOT11_MAX_SSID_LEN; + + for (i = 0; i < ssid_len; i++) { + c = (uint)ssid[i]; + if (c == '\\') { + *p++ = '\\'; + *p++ = '\\'; + } else if (bcm_isprint((uchar)c)) { + *p++ = (char)c; + } else { + p += snprintf(p, (endp - p), "\\x%02X", c); + } + } + *p = '\0'; + ASSERT(p < endp); + + return (int)(p - buf); +} +#endif /* WLTINYDUMP || BCMDBG || WLMSG_INFORM || WLMSG_ASSOC || WLMSG_PRPKT */ + +#endif /* BCMDRIVER */ + +/* + * ProcessVars:Takes a buffer of "=\n" lines read from a file and ending in a NUL. + * also accepts nvram files which are already in the format of =\0\=\0 + * Removes carriage returns, empty lines, comment lines, and converts newlines to NULs. + * Shortens buffer as needed and pads with NULs. End of buffer is marked by two NULs. +*/ + +unsigned int +process_nvram_vars(char *varbuf, unsigned int len) +{ + char *dp; + bool findNewline; + int column; + unsigned int buf_len, n; + unsigned int pad = 0; + + dp = varbuf; + + findNewline = FALSE; + column = 0; + + for (n = 0; n < len; n++) { + if (varbuf[n] == '\r') + continue; + if (findNewline && varbuf[n] != '\n') + continue; + findNewline = FALSE; + if (varbuf[n] == '#') { + findNewline = TRUE; + continue; + } + if (varbuf[n] == '\n') { + if (column == 0) + continue; + *dp++ = 0; + column = 0; + continue; + } + *dp++ = varbuf[n]; + column++; + } + buf_len = (unsigned int)(dp - varbuf); + if (buf_len % 4) { + pad = 4 - buf_len % 4; + if (pad && (buf_len + pad <= len)) { + buf_len += pad; + } + } + + while (dp < varbuf + n) + *dp++ = 0; + + return buf_len; +} + +/* calculate a * b + c */ +void +bcm_uint64_multiple_add(uint32* r_high, uint32* r_low, uint32 a, uint32 b, uint32 c) +{ +#define FORMALIZE(var) {cc += (var & 0x80000000) ? 1 : 0; var &= 0x7fffffff;} + uint32 r1, r0; + uint32 a1, a0, b1, b0, t, cc = 0; + + a1 = a >> 16; + a0 = a & 0xffff; + b1 = b >> 16; + b0 = b & 0xffff; + + r0 = a0 * b0; + FORMALIZE(r0); + + t = (a1 * b0) << 16; + FORMALIZE(t); + + r0 += t; + FORMALIZE(r0); + + t = (a0 * b1) << 16; + FORMALIZE(t); + + r0 += t; + FORMALIZE(r0); + + FORMALIZE(c); + + r0 += c; + FORMALIZE(r0); + + r0 |= (cc % 2) ? 0x80000000 : 0; + r1 = a1 * b1 + ((a1 * b0) >> 16) + ((b1 * a0) >> 16) + (cc / 2); + + *r_high = r1; + *r_low = r0; +} + +/* calculate a / b */ +void +bcm_uint64_divide(uint32* r, uint32 a_high, uint32 a_low, uint32 b) +{ + uint32 a1 = a_high, a0 = a_low, r0 = 0; + + if (b < 2) + return; + + while (a1 != 0) { + r0 += (0xffffffff / b) * a1; + bcm_uint64_multiple_add(&a1, &a0, ((0xffffffff % b) + 1) % b, a1, a0); + } + + r0 += a0 / b; + *r = r0; +} + +/* calculate a >> b; and returns only lower 32 bits */ +void +bcm_uint64_right_shift(uint32* r, uint32 a_high, uint32 a_low, uint32 b) +{ + uint32 a1 = a_high, a0 = a_low, r0 = 0; + + if (b == 0) { + r0 = a_low; + *r = r0; + return; + } + + if (b < 32) { + a0 = a0 >> b; + a1 = a1 & ((1 << b) - 1); + a1 = a1 << (32 - b); + r0 = a0 | a1; + *r = r0; + return; + } else { + r0 = a1 >> (b - 32); + *r = r0; + return; + } + +} diff --git a/external/cache/sources/wl/shared/bcmwifi.c b/external/cache/sources/wl/shared/bcmwifi.c new file mode 100644 index 0000000..043cab5 --- /dev/null +++ b/external/cache/sources/wl/shared/bcmwifi.c @@ -0,0 +1,255 @@ +/* + * Misc utility routines used by kernel or app-level. + * Contents are wifi-specific, used by any kernel or app-level + * software that might want wifi things as it grows. + * + * $Copyright Open Broadcom Corporation$ + * $Id: bcmwifi.c 241182 2011-02-17 21:50:03Z gmo $ + */ + +#include + +#ifdef BCMDRIVER +#include +#include +#define strtoul(nptr, endptr, base) bcm_strtoul((nptr), (endptr), (base)) +#define tolower(c) (bcm_isupper((c)) ? ((c) + 'a' - 'A') : (c)) +#else +#include +#include +#include +#ifndef ASSERT +#define ASSERT(exp) +#endif +#endif +#include + +#if defined(WIN32) && (defined(BCMDLL) || defined(WLMDLL)) +#include +#endif + + + + + +char * +wf_chspec_ntoa(chanspec_t chspec, char *buf) +{ + const char *band, *bw, *sb; + uint channel; + + band = ""; + bw = ""; + sb = ""; + channel = CHSPEC_CHANNEL(chspec); + + if ((CHSPEC_IS2G(chspec) && channel > CH_MAX_2G_CHANNEL) || + (CHSPEC_IS5G(chspec) && channel <= CH_MAX_2G_CHANNEL)) + band = (CHSPEC_IS2G(chspec)) ? "b" : "a"; + if (CHSPEC_IS40(chspec)) { + if (CHSPEC_SB_UPPER(chspec)) { + sb = "u"; + channel += CH_10MHZ_APART; + } else { + sb = "l"; + channel -= CH_10MHZ_APART; + } + } else if (CHSPEC_IS10(chspec)) { + bw = "n"; + } + + + snprintf(buf, 6, "%d%s%s%s", channel, band, bw, sb); + return (buf); +} + + +chanspec_t +wf_chspec_aton(char *a) +{ + char *endp = NULL; + uint channel, band, bw, ctl_sb; + char c; + + channel = strtoul(a, &endp, 10); + + + if (endp == a) + return 0; + + if (channel > MAXCHANNEL) + return 0; + + band = ((channel <= CH_MAX_2G_CHANNEL) ? WL_CHANSPEC_BAND_2G : WL_CHANSPEC_BAND_5G); + bw = WL_CHANSPEC_BW_20; + ctl_sb = WL_CHANSPEC_CTL_SB_NONE; + + a = endp; + + c = tolower(a[0]); + if (c == '\0') + goto done; + + + if (c == 'a' || c == 'b') { + band = (c == 'a') ? WL_CHANSPEC_BAND_5G : WL_CHANSPEC_BAND_2G; + a++; + c = tolower(a[0]); + if (c == '\0') + goto done; + } + + + if (c == 'n') { + bw = WL_CHANSPEC_BW_10; + } else if (c == 'l') { + bw = WL_CHANSPEC_BW_40; + ctl_sb = WL_CHANSPEC_CTL_SB_LOWER; + + if (channel <= (MAXCHANNEL - CH_20MHZ_APART)) + channel += CH_10MHZ_APART; + else + return 0; + } else if (c == 'u') { + bw = WL_CHANSPEC_BW_40; + ctl_sb = WL_CHANSPEC_CTL_SB_UPPER; + + if (channel > CH_20MHZ_APART) + channel -= CH_10MHZ_APART; + else + return 0; + } else { + return 0; + } + +done: + return (channel | band | bw | ctl_sb); +} + + +bool +wf_chspec_malformed(chanspec_t chanspec) +{ + + if (!CHSPEC_IS5G(chanspec) && !CHSPEC_IS2G(chanspec)) + return TRUE; + + if (!CHSPEC_IS40(chanspec) && !CHSPEC_IS20(chanspec)) + return TRUE; + + + if (CHSPEC_IS20(chanspec)) { + if (!CHSPEC_SB_NONE(chanspec)) + return TRUE; + } else { + if (!CHSPEC_SB_UPPER(chanspec) && !CHSPEC_SB_LOWER(chanspec)) + return TRUE; + } + + return FALSE; +} + + +uint8 +wf_chspec_ctlchan(chanspec_t chspec) +{ + uint8 ctl_chan; + + + if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_NONE) { + return CHSPEC_CHANNEL(chspec); + } else { + + ASSERT(CHSPEC_BW(chspec) == WL_CHANSPEC_BW_40); + + if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_UPPER) { + + ctl_chan = UPPER_20_SB(CHSPEC_CHANNEL(chspec)); + } else { + ASSERT(CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_LOWER); + + ctl_chan = LOWER_20_SB(CHSPEC_CHANNEL(chspec)); + } + } + + return ctl_chan; +} + +chanspec_t +wf_chspec_ctlchspec(chanspec_t chspec) +{ + chanspec_t ctl_chspec = 0; + uint8 channel; + + ASSERT(!wf_chspec_malformed(chspec)); + + + if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_NONE) { + return chspec; + } else { + if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_UPPER) { + channel = UPPER_20_SB(CHSPEC_CHANNEL(chspec)); + } else { + channel = LOWER_20_SB(CHSPEC_CHANNEL(chspec)); + } + ctl_chspec = channel | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE; + ctl_chspec |= CHSPEC_BAND(chspec); + } + return ctl_chspec; +} + + +int +wf_mhz2channel(uint freq, uint start_factor) +{ + int ch = -1; + uint base; + int offset; + + + if (start_factor == 0) { + if (freq >= 2400 && freq <= 2500) + start_factor = WF_CHAN_FACTOR_2_4_G; + else if (freq >= 5000 && freq <= 6000) + start_factor = WF_CHAN_FACTOR_5_G; + } + + if (freq == 2484 && start_factor == WF_CHAN_FACTOR_2_4_G) + return 14; + + base = start_factor / 2; + + + if ((freq < base) || (freq > base + 1000)) + return -1; + + offset = freq - base; + ch = offset / 5; + + + if (offset != (ch * 5)) + return -1; + + + if (start_factor == WF_CHAN_FACTOR_2_4_G && (ch < 1 || ch > 13)) + return -1; + + return ch; +} + + +int +wf_channel2mhz(uint ch, uint start_factor) +{ + int freq; + + if ((start_factor == WF_CHAN_FACTOR_2_4_G && (ch < 1 || ch > 14)) || + (ch > 200)) + freq = -1; + else if ((start_factor == WF_CHAN_FACTOR_2_4_G) && (ch == 14)) + freq = 2484; + else + freq = ch * 5 + start_factor / 2; + + return freq; +} diff --git a/external/cache/sources/wl/shared/bcmwifi_channels.c b/external/cache/sources/wl/shared/bcmwifi_channels.c new file mode 100644 index 0000000..c306239 --- /dev/null +++ b/external/cache/sources/wl/shared/bcmwifi_channels.c @@ -0,0 +1,1175 @@ +/* + * Misc utility routines used by kernel or app-level. + * Contents are wifi-specific, used by any kernel or app-level + * software that might want wifi things as it grows. + * + * $Copyright Open Broadcom Corporation$ + * $Id: bcmwifi_channels.c 309193 2012-01-19 00:03:57Z stafford $ + */ + +#include +#include +#include + +#ifdef BCMDRIVER +#include +#define strtoul(nptr, endptr, base) bcm_strtoul((nptr), (endptr), (base)) +#define tolower(c) (bcm_isupper((c)) ? ((c) + 'a' - 'A') : (c)) +#elif defined(__IOPOS__) +#include +#define strtoul(nptr, endptr, base) bcm_strtoul((nptr), (endptr), (base)) +#define tolower(c) (bcm_tolower((c))) +/* XXX Why isn't ASSERT always available as part of a non BCMDRIVER build? + * It seems like there ought to be a non BCMDRIVER osl. + */ +#ifndef ASSERT +#define ASSERT(exp) +#endif +#else +#include +#include +#include +/* XXX Why isn't ASSERT always available as part of a non BCMDRIVER build? + * It seems like there ought to be a non BCMDRIVER osl. + */ +#ifndef ASSERT +#define ASSERT(exp) +#endif +#endif /* BCMDRIVER */ + +#ifdef _bcmwifi_c_ +/* temporary for transitional compatibility */ +#include +#else +#include +#endif + +#if defined(WIN32) && (defined(BCMDLL) || defined(WLMDLL)) +#include /* For wl/exe/GNUmakefile.brcm_wlu and GNUmakefile.wlm_dll */ +#endif + +#ifndef D11AC_IOTYPES + +/* Definitions for legacy Chanspec type */ + +/* Chanspec ASCII representation: + * + * digit [AB] [N] [UL] + * + * : channel number of the 10MHz or 20MHz channel, + * or control sideband channel of 40MHz channel. + * : A for 5GHz, B for 2.4GHz + * : N for 10MHz, nothing for 20MHz or 40MHz + * (ctl-sideband spec implies 40MHz) + * : U for upper, L for lower + * + * may be omitted on input, and will be assumed to be + * 2.4GHz if channel number <= 14. + * + * Examples: + * 8 -> 2.4GHz channel 8, 20MHz + * 8b -> 2.4GHz channel 8, 20MHz + * 8l -> 2.4GHz channel 8, 40MHz, lower ctl sideband + * 8a -> 5GHz channel 8 (low 5 GHz band), 20MHz + * 36 -> 5GHz channel 36, 20MHz + * 36l -> 5GHz channel 36, 40MHz, lower ctl sideband + * 40u -> 5GHz channel 40, 40MHz, upper ctl sideband + * 180n -> channel 180, 10MHz + */ + + +/* given a chanspec and a string buffer, format the chanspec as a + * string, and return the original pointer a. + * Min buffer length must be CHANSPEC_STR_LEN. + * On error return NULL + */ +char * +wf_chspec_ntoa(chanspec_t chspec, char *buf) +{ + const char *band, *bw, *sb; + uint channel; + + band = ""; + bw = ""; + sb = ""; + channel = CHSPEC_CHANNEL(chspec); + /* check for non-default band spec */ + if ((CHSPEC_IS2G(chspec) && channel > CH_MAX_2G_CHANNEL) || + (CHSPEC_IS5G(chspec) && channel <= CH_MAX_2G_CHANNEL)) + band = (CHSPEC_IS2G(chspec)) ? "b" : "a"; + if (CHSPEC_IS40(chspec)) { + if (CHSPEC_SB_UPPER(chspec)) { + sb = "u"; + channel += CH_10MHZ_APART; + } else { + sb = "l"; + channel -= CH_10MHZ_APART; + } + } else if (CHSPEC_IS10(chspec)) { + bw = "n"; + } + + /* Outputs a max of 6 chars including '\0' */ + snprintf(buf, 6, "%d%s%s%s", channel, band, bw, sb); + return (buf); +} + +/* given a chanspec string, convert to a chanspec. + * On error return 0 + */ +chanspec_t +wf_chspec_aton(const char *a) +{ + char *endp = NULL; + uint channel, band, bw, ctl_sb; + char c; + + channel = strtoul(a, &endp, 10); + + /* check for no digits parsed */ + if (endp == a) + return 0; + + if (channel > MAXCHANNEL) + return 0; + + band = ((channel <= CH_MAX_2G_CHANNEL) ? WL_CHANSPEC_BAND_2G : WL_CHANSPEC_BAND_5G); + bw = WL_CHANSPEC_BW_20; + ctl_sb = WL_CHANSPEC_CTL_SB_NONE; + + a = endp; + + c = tolower(a[0]); + if (c == '\0') + goto done; + + /* parse the optional ['A' | 'B'] band spec */ + if (c == 'a' || c == 'b') { + band = (c == 'a') ? WL_CHANSPEC_BAND_5G : WL_CHANSPEC_BAND_2G; + a++; + c = tolower(a[0]); + if (c == '\0') + goto done; + } + + /* parse bandwidth 'N' (10MHz) or 40MHz ctl sideband ['L' | 'U'] */ + if (c == 'n') { + bw = WL_CHANSPEC_BW_10; + } else if (c == 'l') { + bw = WL_CHANSPEC_BW_40; + ctl_sb = WL_CHANSPEC_CTL_SB_LOWER; + /* adjust channel to center of 40MHz band */ + if (channel <= (MAXCHANNEL - CH_20MHZ_APART)) + channel += CH_10MHZ_APART; + else + return 0; + } else if (c == 'u') { + bw = WL_CHANSPEC_BW_40; + ctl_sb = WL_CHANSPEC_CTL_SB_UPPER; + /* adjust channel to center of 40MHz band */ + if (channel > CH_20MHZ_APART) + channel -= CH_10MHZ_APART; + else + return 0; + } else { + return 0; + } + +done: + return (channel | band | bw | ctl_sb); +} + +/* + * Verify the chanspec is using a legal set of parameters, i.e. that the + * chanspec specified a band, bw, ctl_sb and channel and that the + * combination could be legal given any set of circumstances. + * RETURNS: TRUE is the chanspec is malformed, false if it looks good. + */ +bool +wf_chspec_malformed(chanspec_t chanspec) +{ + /* must be 2G or 5G band */ + if (!CHSPEC_IS5G(chanspec) && !CHSPEC_IS2G(chanspec)) + return TRUE; + /* must be 20 or 40 bandwidth */ + if (!CHSPEC_IS40(chanspec) && !CHSPEC_IS20(chanspec)) + return TRUE; + + /* 20MHZ b/w must have no ctl sb, 40 must have a ctl sb */ + if (CHSPEC_IS20(chanspec)) { + if (!CHSPEC_SB_NONE(chanspec)) + return TRUE; + } else { + if (!CHSPEC_SB_UPPER(chanspec) && !CHSPEC_SB_LOWER(chanspec)) + return TRUE; + } + + return FALSE; +} + +/* + * This function returns the channel number that control traffic is being sent on, for legacy + * channels this is just the channel number, for 40MHZ channels it is the upper or lower 20MHZ + * sideband depending on the chanspec selected + */ +uint8 +wf_chspec_ctlchan(chanspec_t chspec) +{ + uint8 ctl_chan; + + /* Is there a sideband ? */ + if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_NONE) { + return CHSPEC_CHANNEL(chspec); + } else { + /* we only support 40MHZ with sidebands */ + ASSERT(CHSPEC_BW(chspec) == WL_CHANSPEC_BW_40); + /* chanspec channel holds the centre frequency, use that and the + * side band information to reconstruct the control channel number + */ + if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_UPPER) { + /* control chan is the upper 20 MHZ SB of the 40MHZ channel */ + ctl_chan = UPPER_20_SB(CHSPEC_CHANNEL(chspec)); + } else { + ASSERT(CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_LOWER); + /* control chan is the lower 20 MHZ SB of the 40MHZ channel */ + ctl_chan = LOWER_20_SB(CHSPEC_CHANNEL(chspec)); + } + } + + return ctl_chan; +} + +chanspec_t +wf_chspec_ctlchspec(chanspec_t chspec) +{ + chanspec_t ctl_chspec = 0; + uint8 channel; + + ASSERT(!wf_chspec_malformed(chspec)); + + /* Is there a sideband ? */ + if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_NONE) { + return chspec; + } else { + if (CHSPEC_CTL_SB(chspec) == WL_CHANSPEC_CTL_SB_UPPER) { + channel = UPPER_20_SB(CHSPEC_CHANNEL(chspec)); + } else { + channel = LOWER_20_SB(CHSPEC_CHANNEL(chspec)); + } + ctl_chspec = channel | WL_CHANSPEC_BW_20 | WL_CHANSPEC_CTL_SB_NONE; + ctl_chspec |= CHSPEC_BAND(chspec); + } + return ctl_chspec; +} + +#else /* D11AC_IOTYPES */ + +/* Definitions for D11AC capable Chanspec type */ + +/* Chanspec ASCII representation with 802.11ac capability: + * [ 'g'] ['/' []['/'<1st80channel>'-'<2nd80channel>]] + * + * : + * (optional) 2, 3, 4, 5 for 2.4GHz, 3GHz, 4GHz, and 5GHz respectively. + * Default value is 2g if channel <= 14, otherwise 5g. + * : + * channel number of the 5MHz, 10MHz, 20MHz channel, + * or primary channel of 40MHz, 80MHz, 160MHz, or 80+80MHz channel. + * : + * (optional) 5, 10, 20, 40, 80, 160, or 80+80. Default value is 20. + * : + * (only for 2.4GHz band 40MHz) U for upper sideband primary, L for lower. + * + * For 2.4GHz band 40MHz channels, the same primary channel may be the + * upper sideband for one 40MHz channel, and the lower sideband for an + * overlapping 40MHz channel. The U/L disambiguates which 40MHz channel + * is being specified. + * + * For 40MHz in the 5GHz band and all channel bandwidths greater than + * 40MHz, the U/L specificaion is not allowed since the channels are + * non-overlapping and the primary sub-band is derived from its + * position in the wide bandwidth channel. + * + * <1st80Channel>: + * <2nd80Channel>: + * Required for 80+80, otherwise not allowed. + * Specifies the center channel of the first and second 80MHz band. + * + * In its simplest form, it is a 20MHz channel number, with the implied band + * of 2.4GHz if channel number <= 14, and 5GHz otherwise. + * + * To allow for backward compatibility with scripts, the old form for + * 40MHz channels is also allowed: + * + * : + * primary channel of 40MHz, channel <= 14 is 2GHz, otherwise 5GHz + * : + * "U" for upper, "L" for lower (or lower case "u" "l") + * + * 5 GHz Examples: + * Chanspec BW Center Ch Channel Range Primary Ch + * 5g8 20MHz 8 - - + * 52 20MHz 52 - - + * 52/40 40MHz 54 52-56 52 + * 56/40 40MHz 54 52-56 56 + * 52/80 80MHz 58 52-64 52 + * 56/80 80MHz 58 52-64 56 + * 60/80 80MHz 58 52-64 60 + * 64/80 80MHz 58 52-64 64 + * 52/160 160MHz 50 36-64 52 + * 36/160 160MGz 50 36-64 36 + * 36/80+80/42-106 80+80MHz 42,106 36-48,100-112 36 + * + * 2 GHz Examples: + * Chanspec BW Center Ch Channel Range Primary Ch + * 2g8 20MHz 8 - - + * 8 20MHz 8 - - + * 6 20MHz 6 - - + * 6/40l 40MHz 8 6-10 6 + * 6l 40MHz 8 6-10 6 + * 6/40u 40MHz 4 2-6 6 + * 6u 40MHz 4 2-6 6 + */ + +/* bandwidth ASCII string */ +static const char *wf_chspec_bw_str[] = +{ + "5", + "10", + "20", + "40", + "80", + "160", + "80+80", + "na" +}; + +static const uint8 wf_chspec_bw_mhz[] = +{5, 10, 20, 40, 80, 160, 160}; + +#define WF_NUM_BW \ + (sizeof(wf_chspec_bw_mhz)/sizeof(uint8)) + +/* 40MHz channels in 5GHz band */ +static const uint8 wf_5g_40m_chans[] = +{38, 46, 54, 62, 102, 110, 118, 126, 134, 142, 151, 159}; +#define WF_NUM_5G_40M_CHANS \ + (sizeof(wf_5g_40m_chans)/sizeof(uint8)) + +/* 80MHz channels in 5GHz band */ +static const uint8 wf_5g_80m_chans[] = +{42, 58, 106, 122, 138, 155}; +#define WF_NUM_5G_80M_CHANS \ + (sizeof(wf_5g_80m_chans)/sizeof(uint8)) + +/* 160MHz channels in 5GHz band */ +static const uint8 wf_5g_160m_chans[] = +{50, 114}; +#define WF_NUM_5G_160M_CHANS \ + (sizeof(wf_5g_160m_chans)/sizeof(uint8)) + + +/* convert bandwidth from chanspec to MHz */ +static uint +bw_chspec_to_mhz(chanspec_t chspec) +{ + uint bw; + + bw = (chspec & WL_CHANSPEC_BW_MASK) >> WL_CHANSPEC_BW_SHIFT; + return (bw >= WF_NUM_BW ? 0 : wf_chspec_bw_mhz[bw]); +} + +/* bw in MHz, return the channel count from the center channel to the + * the channel at the edge of the band + */ +static uint8 +center_chan_to_edge(uint bw) +{ + /* edge channels separated by BW - 10MHz on each side + * delta from cf to edge is half of that, + * MHz to channel num conversion is 5MHz/channel + */ + return (uint8)(((bw - 20) / 2) / 5); +} + +/* return channel number of the low edge of the band + * given the center channel and BW + */ +static uint8 +channel_low_edge(uint center_ch, uint bw) +{ + return (uint8)(center_ch - center_chan_to_edge(bw)); +} + +/* return side band number given center channel and control channel + * return -1 on error + */ +static int +channel_to_sb(uint center_ch, uint ctl_ch, uint bw) +{ + uint lowest = channel_low_edge(center_ch, bw); + uint sb; + + if ((ctl_ch - lowest) % 4) { + /* bad ctl channel, not mult 4 */ + return -1; + } + + sb = ((ctl_ch - lowest) / 4); + + /* sb must be a index to a 20MHz channel in range */ + if (sb >= (bw / 20)) { + /* ctl_ch must have been too high for the center_ch */ + return -1; + } + + return sb; +} + +/* return control channel given center channel and side band */ +static uint8 +channel_to_ctl_chan(uint center_ch, uint bw, uint sb) +{ + return (uint8)(channel_low_edge(center_ch, bw) + sb * 4); +} + +/* return index of 80MHz channel from channel number + * return -1 on error + */ +static int +channel_80mhz_to_id(uint ch) +{ + uint i; + for (i = 0; i < WF_NUM_5G_80M_CHANS; i ++) { + if (ch == wf_5g_80m_chans[i]) + return i; + } + + return -1; +} + +/* given a chanspec and a string buffer, format the chanspec as a + * string, and return the original pointer a. + * Min buffer length must be CHANSPEC_STR_LEN. + * On error return NULL + */ +char * +wf_chspec_ntoa(chanspec_t chspec, char *buf) +{ + const char *band; + uint ctl_chan; + + if (wf_chspec_malformed(chspec)) + return NULL; + + band = ""; + + /* check for non-default band spec */ + if ((CHSPEC_IS2G(chspec) && CHSPEC_CHANNEL(chspec) > CH_MAX_2G_CHANNEL) || + (CHSPEC_IS5G(chspec) && CHSPEC_CHANNEL(chspec) <= CH_MAX_2G_CHANNEL)) + band = (CHSPEC_IS2G(chspec)) ? "2g" : "5g"; + + /* ctl channel */ + ctl_chan = wf_chspec_ctlchan(chspec); + + /* bandwidth and ctl sideband */ + if (CHSPEC_IS20(chspec)) { + snprintf(buf, CHANSPEC_STR_LEN, "%s%d", band, ctl_chan); + } else if (!CHSPEC_IS8080(chspec)) { + const char *bw; + const char *sb = ""; + + bw = wf_chspec_bw_str[(chspec & WL_CHANSPEC_BW_MASK) >> WL_CHANSPEC_BW_SHIFT]; + +#ifdef CHANSPEC_NEW_40MHZ_FORMAT + /* ctl sideband string if needed for 2g 40MHz */ + if (CHSPEC_IS40(chspec) && CHSPEC_IS2G(chspec)) { + sb = CHSPEC_SB_UPPER(chspec) ? "u" : "l"; + } + + snprintf(buf, CHANSPEC_STR_LEN, "%s%d/%s%s", band, ctl_chan, bw, sb); +#else + /* ctl sideband string instead of BW for 40MHz */ + if (CHSPEC_IS40(chspec)) { + sb = CHSPEC_SB_UPPER(chspec) ? "u" : "l"; + snprintf(buf, CHANSPEC_STR_LEN, "%s%d%s", band, ctl_chan, sb); + } else { + snprintf(buf, CHANSPEC_STR_LEN, "%s%d/%s", band, ctl_chan, bw); + } +#endif /* CHANSPEC_NEW_40MHZ_FORMAT */ + + } else { + /* 80+80 */ + uint chan1 = (chspec & WL_CHANSPEC_CHAN1_MASK) >> WL_CHANSPEC_CHAN1_SHIFT; + uint chan2 = (chspec & WL_CHANSPEC_CHAN2_MASK) >> WL_CHANSPEC_CHAN2_SHIFT; + + /* convert to channel number */ + chan1 = (chan1 < WF_NUM_5G_80M_CHANS) ? wf_5g_80m_chans[chan1] : 0; + chan2 = (chan2 < WF_NUM_5G_80M_CHANS) ? wf_5g_80m_chans[chan2] : 0; + + /* Outputs a max of CHANSPEC_STR_LEN chars including '\0' */ + snprintf(buf, CHANSPEC_STR_LEN, "%d/80+80/%d-%d", ctl_chan, chan1, chan2); + } + + return (buf); +} + +static int +read_uint(const char **p, unsigned int *num) +{ + unsigned long val; + char *endp = NULL; + + val = strtoul(*p, &endp, 10); + /* if endp is the initial pointer value, then a number was not read */ + if (endp == *p) + return 0; + + /* advance the buffer pointer to the end of the integer string */ + *p = endp; + /* return the parsed integer */ + *num = (unsigned int)val; + + return 1; +} + +/* given a chanspec string, convert to a chanspec. + * On error return 0 + */ +chanspec_t +wf_chspec_aton(const char *a) +{ + chanspec_t chspec; + uint chspec_ch, chspec_band, bw, chspec_bw, chspec_sb; + uint num, ctl_ch; + uint ch1, ch2; + char c, sb_ul = '\0'; + int i; + + bw = 20; + chspec_sb = 0; + chspec_ch = ch1 = ch2 = 0; + + /* parse channel num or band */ + if (!read_uint(&a, &num)) + return 0; + + /* if we are looking at a 'g', then the first number was a band */ + c = tolower((int)a[0]); + if (c == 'g') { + a ++; /* consume the char */ + + /* band must be "2" or "5" */ + if (num == 2) + chspec_band = WL_CHANSPEC_BAND_2G; + else if (num == 5) + chspec_band = WL_CHANSPEC_BAND_5G; + else + return 0; + + /* read the channel number */ + if (!read_uint(&a, &ctl_ch)) + return 0; + + c = tolower((int)a[0]); + } + else { + /* first number is channel, use default for band */ + ctl_ch = num; + chspec_band = ((ctl_ch <= CH_MAX_2G_CHANNEL) ? + WL_CHANSPEC_BAND_2G : WL_CHANSPEC_BAND_5G); + } + + if (c == '\0') { + /* default BW of 20MHz */ + chspec_bw = WL_CHANSPEC_BW_20; + goto done_read; + } + + a ++; /* consume the 'u','l', or '/' */ + + /* check 'u'/'l' */ + if (c == 'u' || c == 'l') { + sb_ul = c; + chspec_bw = WL_CHANSPEC_BW_40; + goto done_read; + } + + /* next letter must be '/' */ + if (c != '/') + return 0; + + /* read bandwidth */ + if (!read_uint(&a, &bw)) + return 0; + + /* convert to chspec value */ + if (bw == 20) { + chspec_bw = WL_CHANSPEC_BW_20; + } else if (bw == 40) { + chspec_bw = WL_CHANSPEC_BW_40; + } else if (bw == 80) { + chspec_bw = WL_CHANSPEC_BW_80; + } else if (bw == 160) { + chspec_bw = WL_CHANSPEC_BW_160; + } else { + return 0; + } + + /* So far we have g/ + * Can now be followed by u/l if bw = 40, + * or '+80' if bw = 80, to make '80+80' bw. + */ + + c = tolower((int)a[0]); + + /* if we have a 2g/40 channel, we should have a l/u spec now */ + if (chspec_band == WL_CHANSPEC_BAND_2G && bw == 40) { + if (c == 'u' || c == 'l') { + a ++; /* consume the u/l char */ + sb_ul = c; + goto done_read; + } + } + + /* check for 80+80 */ + if (c == '+') { + /* 80+80 */ + static const char *plus80 = "80/"; + + /* must be looking at '+80/' + * check and consume this string. + */ + chspec_bw = WL_CHANSPEC_BW_8080; + + a ++; /* consume the char '+' */ + + /* consume the '80/' string */ + for (i = 0; i < 3; i++) { + if (*a++ != *plus80++) { + return 0; + } + } + + /* read primary 80MHz channel */ + if (!read_uint(&a, &ch1)) + return 0; + + /* must followed by '-' */ + if (a[0] != '-') + return 0; + a ++; /* consume the char */ + + /* read secondary 80MHz channel */ + if (!read_uint(&a, &ch2)) + return 0; + } + +done_read: + /* skip trailing white space */ + while (a[0] == ' ') { + a ++; + } + + /* must be end of string */ + if (a[0] != '\0') + return 0; + + /* Now have all the chanspec string parts read; + * chspec_band, ctl_ch, chspec_bw, sb_ul, ch1, ch2. + * chspec_band and chspec_bw are chanspec values. + * Need to convert ctl_ch, sb_ul, and ch1,ch2 into + * a center channel (or two) and sideband. + */ + + /* if a sb u/l string was given, just use that, + * guaranteed to be bw = 40 by sting parse. + */ + if (sb_ul != '\0') { + if (sb_ul == 'l') { + chspec_ch = UPPER_20_SB(ctl_ch); + chspec_sb = WL_CHANSPEC_CTL_SB_LLL; + } else if (sb_ul == 'u') { + chspec_ch = LOWER_20_SB(ctl_ch); + chspec_sb = WL_CHANSPEC_CTL_SB_LLU; + } + } + /* if the bw is 20, center and sideband are trivial */ + else if (chspec_bw == WL_CHANSPEC_BW_20) { + chspec_ch = ctl_ch; + chspec_sb = 0; + } + /* if the bw is 40/80/160, not 80+80, a single method + * can be used to to find the center and sideband + */ + else if (chspec_bw != WL_CHANSPEC_BW_8080) { + /* figure out ctl sideband based on ctl channel and bandwidth */ + const uint8 *center_ch = NULL; + int num_ch = 0; + int sb = -1; + + if (chspec_bw == WL_CHANSPEC_BW_40) { + center_ch = wf_5g_40m_chans; + num_ch = WF_NUM_5G_40M_CHANS; + } else if (chspec_bw == WL_CHANSPEC_BW_80) { + center_ch = wf_5g_80m_chans; + num_ch = WF_NUM_5G_80M_CHANS; + } else if (chspec_bw == WL_CHANSPEC_BW_160) { + center_ch = wf_5g_160m_chans; + num_ch = WF_NUM_5G_160M_CHANS; + } else { + return 0; + } + + for (i = 0; i < num_ch; i ++) { + sb = channel_to_sb(center_ch[i], ctl_ch, bw); + if (sb >= 0) { + chspec_ch = center_ch[i]; + chspec_sb = sb << WL_CHANSPEC_CTL_SB_SHIFT; + break; + } + } + + /* check for no matching sb/center */ + if (sb < 0) { + return 0; + } + } + /* Otherwise, bw is 80+80. Figure out channel pair and sb */ + else { + int ch1_id = 0, ch2_id = 0; + int sb; + + ch1_id = channel_80mhz_to_id(ch1); + ch2_id = channel_80mhz_to_id(ch2); + + /* validate channels */ + if (ch1 >= ch2 || ch1_id < 0 || ch2_id < 0) + return 0; + + /* combined channel in chspec */ + chspec_ch = (((uint16)ch1_id << WL_CHANSPEC_CHAN1_SHIFT) | + ((uint16)ch2_id << WL_CHANSPEC_CHAN2_SHIFT)); + + /* figure out ctl sideband */ + + /* does the primary channel fit with the 1st 80MHz channel ? */ + sb = channel_to_sb(ch1, ctl_ch, bw); + if (sb < 0) { + /* no, so does the primary channel fit with the 2nd 80MHz channel ? */ + sb = channel_to_sb(ch2, ctl_ch, bw); + if (sb < 0) { + /* no match for ctl_ch to either 80MHz center channel */ + return 0; + } + /* sb index is 0-3 for the low 80MHz channel, and 4-7 for + * the high 80MHz channel. Add 4 to to shift to high set. + */ + sb += 4; + } + + chspec_sb = sb << WL_CHANSPEC_CTL_SB_SHIFT; + } + + chspec = (chspec_ch | chspec_band | chspec_bw | chspec_sb); + + if (wf_chspec_malformed(chspec)) + return 0; + + return chspec; +} + +/* + * Verify the chanspec is using a legal set of parameters, i.e. that the + * chanspec specified a band, bw, ctl_sb and channel and that the + * combination could be legal given any set of circumstances. + * RETURNS: TRUE is the chanspec is malformed, false if it looks good. + */ +bool +wf_chspec_malformed(chanspec_t chanspec) +{ + uint chspec_bw = CHSPEC_BW(chanspec); + uint chspec_ch = CHSPEC_CHANNEL(chanspec); + + /* must be 2G or 5G band */ + if (CHSPEC_IS2G(chanspec)) { + /* must be valid bandwidth */ + if (chspec_bw != WL_CHANSPEC_BW_20 && + chspec_bw != WL_CHANSPEC_BW_40) { + return TRUE; + } + } else if (CHSPEC_IS5G(chanspec)) { + if (chspec_bw == WL_CHANSPEC_BW_8080) { + uint ch1_id, ch2_id; + + /* channel number in 80+80 must be in range */ + ch1_id = CHSPEC_CHAN1(chanspec); + ch2_id = CHSPEC_CHAN2(chanspec); + if (ch1_id >= WF_NUM_5G_80M_CHANS || ch2_id >= WF_NUM_5G_80M_CHANS) + return TRUE; + + /* ch2 must be above ch1 for the chanspec */ + if (ch2_id <= ch1_id) + return TRUE; + } else if (chspec_bw == WL_CHANSPEC_BW_20 || chspec_bw == WL_CHANSPEC_BW_40 || + chspec_bw == WL_CHANSPEC_BW_80 || chspec_bw == WL_CHANSPEC_BW_160) { + + if (chspec_ch > MAXCHANNEL) { + return TRUE; + } + } else { + /* invalid bandwidth */ + return TRUE; + } + } else { + /* must be 2G or 5G band */ + return TRUE; + } + + /* side band needs to be consistent with bandwidth */ + if (chspec_bw == WL_CHANSPEC_BW_20) { + if (CHSPEC_CTL_SB(chanspec) != WL_CHANSPEC_CTL_SB_LLL) + return TRUE; + } else if (chspec_bw == WL_CHANSPEC_BW_40) { + if (CHSPEC_CTL_SB(chanspec) > WL_CHANSPEC_CTL_SB_LLU) + return TRUE; + } else if (chspec_bw == WL_CHANSPEC_BW_80) { + if (CHSPEC_CTL_SB(chanspec) > WL_CHANSPEC_CTL_SB_LUU) + return TRUE; + } + + return FALSE; +} + +/* + * Verify the chanspec specifies a valid channel according to 802.11. + * RETURNS: TRUE if the chanspec is a valid 802.11 channel + */ +bool +wf_chspec_valid(chanspec_t chanspec) +{ + uint chspec_bw = CHSPEC_BW(chanspec); + uint chspec_ch = CHSPEC_CHANNEL(chanspec); + + if (wf_chspec_malformed(chanspec)) + return FALSE; + + if (CHSPEC_IS2G(chanspec)) { + /* must be valid bandwidth and channel range */ + if (chspec_bw == WL_CHANSPEC_BW_20) { + if (chspec_ch >= 1 && chspec_ch <= 14) + return TRUE; + } else if (chspec_bw == WL_CHANSPEC_BW_40) { + if (chspec_ch >= 3 && chspec_ch <= 11) + return TRUE; + } + } else if (CHSPEC_IS5G(chanspec)) { + if (chspec_bw == WL_CHANSPEC_BW_8080) { + uint16 ch1, ch2; + + ch1 = wf_5g_80m_chans[CHSPEC_CHAN1(chanspec)]; + ch2 = wf_5g_80m_chans[CHSPEC_CHAN2(chanspec)]; + + /* the two channels must be separated by more than 80MHz by VHT req, + * and ch2 above ch1 for the chanspec + */ + if (ch2 > ch1 + CH_80MHZ_APART) + return TRUE; + } else { + const uint8 *center_ch; + uint num_ch, i; + + if (chspec_bw == WL_CHANSPEC_BW_20 || chspec_bw == WL_CHANSPEC_BW_40) { + center_ch = wf_5g_40m_chans; + num_ch = WF_NUM_5G_40M_CHANS; + } else if (chspec_bw == WL_CHANSPEC_BW_80) { + center_ch = wf_5g_80m_chans; + num_ch = WF_NUM_5G_80M_CHANS; + } else if (chspec_bw == WL_CHANSPEC_BW_160) { + center_ch = wf_5g_160m_chans; + num_ch = WF_NUM_5G_160M_CHANS; + } else { + /* invalid bandwidth */ + return FALSE; + } + + /* check for a valid center channel */ + if (chspec_bw == WL_CHANSPEC_BW_20) { + /* We don't have an array of legal 20MHz 5G channels, but they are + * each side of the legal 40MHz channels. Check the chanspec + * channel against either side of the 40MHz channels. + */ + for (i = 0; i < num_ch; i ++) { + if (chspec_ch == (uint)LOWER_20_SB(center_ch[i]) || + chspec_ch == (uint)UPPER_20_SB(center_ch[i])) + break; /* match found */ + } + + if (i == num_ch) { + /* check for legacy JP channels on failure */ + if (chspec_ch == 34 || chspec_ch == 38 || + chspec_ch == 42 || chspec_ch == 46) + i = 0; + } + } else { + /* check the chanspec channel to each legal channel */ + for (i = 0; i < num_ch; i ++) { + if (chspec_ch == center_ch[i]) + break; /* match found */ + } + } + + if (i < num_ch) { + /* match found */ + return TRUE; + } + } + } + + return FALSE; +} + +/* + * This function returns the channel number that control traffic is being sent on, for 20MHz + * channels this is just the channel number, for 40MHZ, 80MHz, 160MHz channels it is the 20MHZ + * sideband depending on the chanspec selected + */ +uint8 +wf_chspec_ctlchan(chanspec_t chspec) +{ + uint center_chan; + uint bw_mhz; + uint sb; + + ASSERT(!wf_chspec_malformed(chspec)); + + /* Is there a sideband ? */ + if (CHSPEC_IS20(chspec)) { + return CHSPEC_CHANNEL(chspec); + } else { + sb = CHSPEC_CTL_SB(chspec) >> WL_CHANSPEC_CTL_SB_SHIFT; + + if (CHSPEC_IS8080(chspec)) { + bw_mhz = 80; + + if (sb < 4) { + center_chan = CHSPEC_CHAN1(chspec); + } + else { + center_chan = CHSPEC_CHAN2(chspec); + sb -= 4; + } + + /* convert from channel index to channel number */ + center_chan = wf_5g_80m_chans[center_chan]; + } + else { + bw_mhz = bw_chspec_to_mhz(chspec); + center_chan = CHSPEC_CHANNEL(chspec) >> WL_CHANSPEC_CHAN_SHIFT; + } + + return (channel_to_ctl_chan(center_chan, bw_mhz, sb)); + } +} + +/* + * This function returns the chanspec of the control channel of a given chanspec + */ +chanspec_t +wf_chspec_ctlchspec(chanspec_t chspec) +{ + chanspec_t ctl_chspec = chspec; + uint8 ctl_chan; + + ASSERT(!wf_chspec_malformed(chspec)); + + /* Is there a sideband ? */ + if (!CHSPEC_IS20(chspec)) { + ctl_chan = wf_chspec_ctlchan(chspec); + ctl_chspec = ctl_chan | WL_CHANSPEC_BW_20; + ctl_chspec |= CHSPEC_BAND(chspec); + } + return ctl_chspec; +} + +/* return chanspec given control channel and bandwidth + * return 0 on error + */ +uint16 +wf_channel2chspec(uint ctl_ch, uint bw) +{ + uint16 chspec; + const uint8 *center_ch = NULL; + int num_ch = 0; + int sb = -1; + int i = 0; + + chspec = ((ctl_ch <= CH_MAX_2G_CHANNEL) ? WL_CHANSPEC_BAND_2G : WL_CHANSPEC_BAND_5G); + + chspec |= bw; + + if (bw == WL_CHANSPEC_BW_40) { + center_ch = wf_5g_40m_chans; + num_ch = WF_NUM_5G_40M_CHANS; + bw = 40; + } else if (bw == WL_CHANSPEC_BW_80) { + center_ch = wf_5g_80m_chans; + num_ch = WF_NUM_5G_80M_CHANS; + bw = 80; + } else if (bw == WL_CHANSPEC_BW_160) { + center_ch = wf_5g_160m_chans; + num_ch = WF_NUM_5G_160M_CHANS; + bw = 160; + } else if (bw == WL_CHANSPEC_BW_20) { + chspec |= ctl_ch; + return chspec; + } else { + return 0; + } + + for (i = 0; i < num_ch; i ++) { + sb = channel_to_sb(center_ch[i], ctl_ch, bw); + if (sb >= 0) { + chspec |= center_ch[i]; + chspec |= (sb << WL_CHANSPEC_CTL_SB_SHIFT); + break; + } + } + + /* check for no matching sb/center */ + if (sb < 0) { + return 0; + } + + return chspec; +} + +#endif /* D11AC_IOTYPES */ + +/* + * This function returns the chanspec for the primary 40MHz of an 80MHz channel. + * The control sideband specifies the same 20MHz channel that the 80MHz channel is using + * as the primary 20MHz channel. + */ +extern chanspec_t wf_chspec_primary40_chspec(chanspec_t chspec) +{ + chanspec_t chspec40 = chspec; +#ifdef D11AC_IOTYPES + uint center_chan; + uint sb; + ASSERT(!wf_chspec_malformed(chspec)); + + if (CHSPEC_IS80(chspec)) { + center_chan = CHSPEC_CHANNEL(chspec); + sb = CHSPEC_CTL_SB(chspec); + + if (sb == WL_CHANSPEC_CTL_SB_UL) { + /* Primary 40MHz is on upper side */ + sb = WL_CHANSPEC_CTL_SB_L; + center_chan += CH_20MHZ_APART; + } else if (sb == WL_CHANSPEC_CTL_SB_UU) { + /* Primary 40MHz is on upper side */ + sb = WL_CHANSPEC_CTL_SB_U; + center_chan += CH_20MHZ_APART; + } else { + /* Primary 40MHz is on lower side */ + /* sideband bits are the same for LL/LU and L/U */ + center_chan -= CH_20MHZ_APART; + } + + /* Create primary 40MHz chanspec */ + chspec40 = (WL_CHANSPEC_BAND_5G | WL_CHANSPEC_BW_40 | + sb | center_chan); + } +#endif + return chspec40; +} + +/* + * Return the channel number for a given frequency and base frequency. + * The returned channel number is relative to the given base frequency. + * If the given base frequency is zero, a base frequency of 5 GHz is assumed for + * frequencies from 5 - 6 GHz, and 2.407 GHz is assumed for 2.4 - 2.5 GHz. + * + * Frequency is specified in MHz. + * The base frequency is specified as (start_factor * 500 kHz). + * Constants WF_CHAN_FACTOR_2_4_G, WF_CHAN_FACTOR_5_G are defined for + * 2.4 GHz and 5 GHz bands. + * + * The returned channel will be in the range [1, 14] in the 2.4 GHz band + * and [0, 200] otherwise. + * -1 is returned if the start_factor is WF_CHAN_FACTOR_2_4_G and the + * frequency is not a 2.4 GHz channel, or if the frequency is not and even + * multiple of 5 MHz from the base frequency to the base plus 1 GHz. + * + * Reference 802.11 REVma, section 17.3.8.3, and 802.11B section 18.4.6.2 + */ +int +wf_mhz2channel(uint freq, uint start_factor) +{ + int ch = -1; + uint base; + int offset; + + /* take the default channel start frequency */ + if (start_factor == 0) { + if (freq >= 2400 && freq <= 2500) + start_factor = WF_CHAN_FACTOR_2_4_G; + else if (freq >= 5000 && freq <= 6000) + start_factor = WF_CHAN_FACTOR_5_G; + } + + if (freq == 2484 && start_factor == WF_CHAN_FACTOR_2_4_G) + return 14; + + base = start_factor / 2; + + /* check that the frequency is in 1GHz range of the base */ + if ((freq < base) || (freq > base + 1000)) + return -1; + + offset = freq - base; + ch = offset / 5; + + /* check that frequency is a 5MHz multiple from the base */ + if (offset != (ch * 5)) + return -1; + + /* restricted channel range check for 2.4G */ + if (start_factor == WF_CHAN_FACTOR_2_4_G && (ch < 1 || ch > 13)) + return -1; + + return ch; +} + +/* + * Return the center frequency in MHz of the given channel and base frequency. + * The channel number is interpreted relative to the given base frequency. + * + * The valid channel range is [1, 14] in the 2.4 GHz band and [0, 200] otherwise. + * The base frequency is specified as (start_factor * 500 kHz). + * Constants WF_CHAN_FACTOR_2_4_G, WF_CHAN_FACTOR_4_G, and WF_CHAN_FACTOR_5_G + * are defined for 2.4 GHz, 4 GHz, and 5 GHz bands. + * The channel range of [1, 14] is only checked for a start_factor of + * WF_CHAN_FACTOR_2_4_G (4814 = 2407 * 2). + * Odd start_factors produce channels on .5 MHz boundaries, in which case + * the answer is rounded down to an integral MHz. + * -1 is returned for an out of range channel. + * + * Reference 802.11 REVma, section 17.3.8.3, and 802.11B section 18.4.6.2 + */ +int +wf_channel2mhz(uint ch, uint start_factor) +{ + int freq; + + if ((start_factor == WF_CHAN_FACTOR_2_4_G && (ch < 1 || ch > 14)) || + (ch > 200)) + freq = -1; + else if ((start_factor == WF_CHAN_FACTOR_2_4_G) && (ch == 14)) + freq = 2484; + else + freq = ch * 5 + start_factor / 2; + + return freq; +} diff --git a/external/cache/sources/wl/shared/build_kingston.sh b/external/cache/sources/wl/shared/build_kingston.sh new file mode 100644 index 0000000..baa26b2 --- /dev/null +++ b/external/cache/sources/wl/shared/build_kingston.sh @@ -0,0 +1 @@ +make -j2 CROSS_COMPILE=/home/terence/project/ampak/kingston/source/ti-sdk-am180x-evm/linux-devkit/bin/arm-arago-linux-gnueabi- diff --git a/external/cache/sources/wl/shared/miniopt.c b/external/cache/sources/wl/shared/miniopt.c new file mode 100644 index 0000000..ad11ef8 --- /dev/null +++ b/external/cache/sources/wl/shared/miniopt.c @@ -0,0 +1,151 @@ +/* + * Description. + * + * $Copyright Open Broadcom Corporation$ + * $Id: miniopt.c 401759 2013-05-13 16:08:08Z sudhirbs $ + */ + +/* ---- Include Files ---------------------------------------------------- */ + +#include +#include +#include +#include +#include + + +/* ---- Public Variables ------------------------------------------------- */ +/* ---- Private Constants and Types -------------------------------------- */ + +/* XXX FIXME: this should be moved to a common header file. */ +#if defined(_CFE_) + #define fprintf(stream, fmt, args...) xprintf(fmt , ## args) +#elif defined(__IOPOS__) + #define fprintf(file, fmt, arg...) jtag_printf(fmt , ## arg) +#endif + + +/* ---- Private Variables ------------------------------------------------ */ +/* ---- Private Function Prototypes -------------------------------------- */ +/* ---- Functions -------------------------------------------------------- */ + +/* ----------------------------------------------------------------------- */ +void +miniopt_init(miniopt_t *t, const char* name, const char* flags, bool longflags) +{ + static const char *null_flags = ""; + + memset(t, 0, sizeof(miniopt_t)); + t->name = name; + if (flags == NULL) + t->flags = null_flags; + else + t->flags = flags; + t->longflags = longflags; +} + + +/* ----------------------------------------------------------------------- */ +int +miniopt(miniopt_t *t, char **argv) +{ + int keylen; + char *p, *eq, *valstr, *endptr = NULL; + int err = 0; + + t->consumed = 0; + t->positional = FALSE; + memset(t->key, 0, MINIOPT_MAXKEY); + t->opt = '\0'; + t->valstr = NULL; + t->good_int = FALSE; + valstr = NULL; + + if (*argv == NULL) { + err = -1; + goto exit; + } + + p = *argv++; + t->consumed++; + + if (!t->opt_end && !strcmp(p, "--")) { + t->opt_end = TRUE; + if (*argv == NULL) { + err = -1; + goto exit; + } + p = *argv++; + t->consumed++; + } + + if (t->opt_end) { + t->positional = TRUE; + valstr = p; + } + else if (!strncmp(p, "--", 2)) { + eq = strchr(p, '='); + if (eq == NULL && !t->longflags) { + fprintf(stderr, + "%s: missing \" = \" in long param \"%s\"\n", t->name, p); + err = 1; + goto exit; + } + keylen = eq ? (eq - (p + 2)) : (int)strlen(p) - 2; + if (keylen > 63) keylen = 63; + memcpy(t->key, p + 2, keylen); + + if (eq) { + valstr = eq + 1; + if (*valstr == '\0') { + fprintf(stderr, + "%s: missing value after \" = \" in long param \"%s\"\n", + t->name, p); + err = 1; + goto exit; + } + } + } + else if (!strncmp(p, "-", 1)) { + t->opt = p[1]; + if (strlen(p) > 2) { + fprintf(stderr, + "%s: only single char options, error on param \"%s\"\n", + t->name, p); + err = 1; + goto exit; + } + if (strchr(t->flags, t->opt)) { + /* this is a flag option, no value expected */ + valstr = NULL; + } else { + if (*argv == NULL) { + fprintf(stderr, + "%s: missing value parameter after \"%s\"\n", t->name, p); + err = 1; + goto exit; + } + valstr = *argv; + argv++; + t->consumed++; + } + } else { + t->positional = TRUE; + valstr = p; + } + + /* parse valstr as int just in case */ + if (valstr) { + t->uval = (uint)strtoul(valstr, &endptr, 0); + t->val = (int)t->uval; + t->good_int = (*endptr == '\0'); + } + + t->valstr = valstr; + +exit: + if (err == 1) + t->opt = '?'; + + return err; +} diff --git a/external/cache/sources/wl/shared/wlu_client_shared.c b/external/cache/sources/wl/shared/wlu_client_shared.c new file mode 100644 index 0000000..441fd8f --- /dev/null +++ b/external/cache/sources/wl/shared/wlu_client_shared.c @@ -0,0 +1,1228 @@ +/* + * Common code for remotewl client + * + * $Copyright (C) 2008 Broadcom Corporation$ + * + * $Id: wlu_client_shared.c 385622 2013-02-16 03:40:23Z jwang $ + */ +#ifdef WIN32 +#define NEED_IR_TYPES + +#include +#include +#include +#include +#include +#include +#include +#else /* LINUX */ +#include +#include +#include +#include +#include +#include +#include +#endif /* WIN32 */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#ifndef UNDER_CE +#include +#endif +#if defined(RWL_WIFI) || defined(WIFI_REFLECTOR) +#include +#endif /* defined(RWL_WIFI) || defined(WIFI_REFLECTOR) */ +#include "wlu.h" +#include "wlu_remote.h" +#include "wlu_pipe.h" +#include "wlu_client_shared.h" + +char* remote_vista_cmds[] = {"join", "sup_wpa", "wsec", "set_pmk", "legacylink", "list", + "disassoc", "xlist", NULL}; +int vista_cmd_index; +#define SHELL_CMD_LEN (256) + +#ifdef RWL_SOCKET +extern int validate_server_address(); +static int rwl_socket_shellresp(void *wl, rem_ioctl_t *rem_ptr, uchar *input_buf); +#endif +static int rwl_dongle_shellresp(void *wl, rem_ioctl_t *rem_ptr, uchar *input_buf, int cmd); +#ifdef RWL_WIFI +static int rwl_wifi_shellresp(void *wl, rem_ioctl_t *rem_ptr, uchar *input_buf); +#endif +#if defined (WIN32) || defined (LINUX) +/* We don't want the server to allocate bigger buffers for some of the commands + * like scanresults. Server can still allocate 8K memory and send the response + * in fragments. This is used in case of Get commands only. + */ +#define SERVER_RESPONSE_MAX_BUF_LEN 8192 +#endif + +extern unsigned short g_rwl_servport; +extern char *g_rwl_servIP; +int g_child_pid; +#ifdef RWL_WIFI +/* dword align allocation */ +static union { + char bufdata[WLC_IOCTL_MAXLEN]; + uint32 alignme; +} bufstruct_wlu; +static char *g_rwl_aligned_buf = (char*) &bufstruct_wlu.bufdata; + +extern char *g_rwl_buf_mac; +#endif +#ifdef RWL_SOCKET +/* Make initial connection from client to server through sockets */ +static int +rwl_connect_socket_server(void) +{ + int SockDes = -1; + struct sockaddr_in servAddr; + int retries = 0; + int max_retries = 20; + int connected = 0; + + memset(&servAddr, 0, sizeof(servAddr)); + + while ((connected == 0) && (retries < max_retries)) { + DPRINT_DBG(OUTPUT, "rwl_connect_socket_server retry %d\n", retries); + if ((SockDes = (*(int *)rwl_open_pipe(remote_type, "\0", 0, 0))) == FAIL) { + retries++; + continue; + } + if (!validate_server_address()) { + retries++; + continue; + } + + DPRINT_DBG(OUTPUT, "ServerIP:%s,ServerPort:%d\n", g_rwl_servIP, g_rwl_servport); + servAddr.sin_family = AF_INET; + servAddr.sin_port = hton16(g_rwl_servport); + servAddr.sin_addr.s_addr = inet_addr(g_rwl_servIP); + + if (rwl_sockconnect(SockDes, (struct sockaddr *)&servAddr, sizeof(servAddr)) < 0) { + rwl_close_pipe(remote_type, (void*) &SockDes); + retries++; + continue; + } else + connected = 1; + } + return SockDes; +} + +/* This routine is used for both Get and Set Ioctls for the socket */ +static int +rwl_information_socket(void *wl, int cmd, void* input_buf, unsigned long *input_len, + unsigned long *tx_len, uint flags) +{ + int error, Sockfd; + rem_ioctl_t *rem_ptr = NULL; + + if ((Sockfd = rwl_connect_socket_server()) < 0) { + DPRINT_ERR(ERR, "Error in getting the Socket Descriptor\n"); + return FAIL; + } + wl = (void *)(&Sockfd); + + if (remote_CDC_tx(wl, cmd, input_buf, *input_len, + *tx_len, flags, 0) < 0) { + DPRINT_ERR(ERR, "query_info_fe: Send command failed\n"); + rwl_close_pipe(remote_type, wl); + return FAIL; + } + + if ((rem_ptr = remote_CDC_rx_hdr(wl, 0)) == NULL) { + DPRINT_ERR(ERR, "query_info_fe: Reading CDC header failed\n"); + rwl_close_pipe(remote_type, wl); + return FAIL; + } + rwl_swap_header(rem_ptr, NETWORK_TO_HOST); + + if (rem_ptr->msg.len > *input_len) { + DPRINT_ERR(ERR, "query_info_fe: needed size(%d) > " + "actual size(%ld)\n", rem_ptr->msg.len, *input_len); + rwl_close_pipe(remote_type, wl); + return FAIL; + } + + if (remote_CDC_rx(wl, rem_ptr, input_buf, *input_len, 0) == FAIL) { + DPRINT_ERR(ERR, "query_info_fe: No results!\n"); + rwl_close_pipe(remote_type, wl); + return FAIL; + } + + if (rem_ptr->msg.flags & REMOTE_REPLY) + error = rem_ptr->msg.cmd; + else + error = 0; + + rwl_close_pipe(remote_type, wl); + + return error; +} +#endif /* RWL_SOCKET */ +/* + * Receives the fragmented response from serial server. + * Called from rwl_queryinformation_fe front end function for dongle case only when + * the client expects data in chunks more than DATA_FRAME_LEN * (960) bytes. + */ +static int +rwl_serial_fragmented_response_fe(void *wl, rem_ioctl_t *rem_ptr, void* input_buf, +unsigned long *bytes_to_read) +{ + int error; + uint32 total_numread; + uchar *local_buf, *local_result; + uint frames_to_read, frame_count; + + DPRINT_DBG(OUTPUT, "rem_ptr->msg.len=%d \t rem_ptr->data_len=%d\n", + rem_ptr->msg.len, rem_ptr->data_len); + + /* Calculate the number of frames for the response */ + if (rem_ptr->data_len == 0) { + DPRINT_ERR(ERR, "data_len is:%d\n", rem_ptr->data_len); + return (FAIL); + } + frames_to_read = (*bytes_to_read)/rem_ptr->data_len; + if ((*bytes_to_read) % rem_ptr->data_len > 0) + frames_to_read += 1; + + DPRINT_DBG(OUTPUT, "No of frames=%d\n", frames_to_read); + + if ((local_result = (uchar*)malloc(rem_ptr->msg.len)) == NULL) { + DPRINT_ERR(ERR, "Malloc failed for serial fragmented frame" + "local result \n"); + return FAIL; + } + + /* Response will come in DATA_FRAME_LEN + REMOTE_SIZE (960+16) bytes + * packet with CDC header and then followed by response. + */ + total_numread = 0; + frame_count = 0; + while (total_numread != *bytes_to_read) { + local_buf = (uchar*)malloc(rem_ptr->data_len); + if (local_buf == NULL) { + free(local_result); + return FAIL; + } + + DPRINT_DBG(OUTPUT, "Total bytes=%d\n", total_numread); + DPRINT_DBG(OUTPUT, "Frame (Reverse):%d\n", frames_to_read); + + if (remote_CDC_rx(wl, rem_ptr, local_buf, rem_ptr->data_len, 0) == -1) { + free(local_buf); + free(local_result); + return FAIL; + } + + /* Concatenate the response to loc_res. */ + memcpy(&local_result[frame_count*DATA_FRAME_LEN], local_buf, + rem_ptr->data_len); + + total_numread += rem_ptr->data_len; + frame_count++; + frames_to_read--; + + DPRINT_DBG(OUTPUT, "Total bytes=%d\n", total_numread); + + if (frames_to_read == 0) { + /* When all the frames are received copy the data to original buf */ + memcpy(input_buf, local_result, total_numread); + if (rem_ptr->msg.flags & REMOTE_REPLY) { + error = rem_ptr->msg.cmd; + } + } + + if (total_numread != *bytes_to_read) { + /* Receive the next header */ + if ((rem_ptr = remote_CDC_rx_hdr(wl, 0)) == NULL) { + DPRINT_ERR(ERR, "query_info_fe: Reading CDC header failed"); + } + } + free(local_buf); + } + free(local_result); + return error; +} + +/* This routine is common to both set and Get Ioctls for the dongle case */ +static int +rwl_information_dongle(void *wl, int cmd, void* input_buf, unsigned long *input_len, + uint tx_len, uint flags) +{ + int error; + rem_ioctl_t *rem_ptr = NULL; + + if (remote_CDC_tx(wl, cmd, input_buf, *input_len, + tx_len, flags, 0) < 0) { + DPRINT_ERR(ERR, "query_info_fe: Send command failed\n"); + return FAIL; + } + + /* Get the header */ + if ((rem_ptr = remote_CDC_rx_hdr(wl, 0)) == NULL) { + DPRINT_ERR(ERR, "query_info_fe: Reading CDC header failed\n"); + return SERIAL_PORT_ERR; + } + + /* Make sure there is enough room */ + if (rem_ptr->msg.len > *input_len) { + DPRINT_DBG(OUTPUT, "query_info_fe: needed size(%d) > actual" + "size(%ld)\n", rem_ptr->msg.len, *input_len); + return FAIL; + } + + /* We can grab short frames all at once. Longer frames (> 960 bytes) + * come in fragments. + */ + if (rem_ptr->data_len < DATA_FRAME_LEN) { + if (remote_CDC_rx(wl, rem_ptr, input_buf, *input_len, 0) == FAIL) { + DPRINT_ERR(ERR, "query_info_fe: No results!\n"); + return FAIL; + } + if (rem_ptr->msg.flags & REMOTE_REPLY) + error = rem_ptr->msg.cmd; + else + error = 0; + } else { + /* rwl_serial_fragmented_response_fe returns either valid number or FAIL. + * In any case return the same value to caller + */ + error = rwl_serial_fragmented_response_fe(wl, rem_ptr, input_buf, input_len); + } + return error; +} +/* Handler to signal the reader thread that ctrl-C is pressed */ +#ifndef UNDER_CE +volatile sig_atomic_t g_sig_ctrlc = 1; +void ctrlc_handler(int num) +{ + UNUSED_PARAMETER(num); + g_sig_ctrlc = 0; +} +#else +int g_sig_ctrlc = 1; +#endif + +/* Issue shell commands independent of transport type and return result */ +static int +rwl_shell_information_fe(void *wl, int cmd, uchar* input_buf, unsigned long *input_len) +{ + int error = 0, remote_cmd; + uchar* resp_buf = NULL; + rem_ioctl_t *rem_ptr = NULL; + +#ifdef RWL_WIFI + char *cbuf, retry; + dot11_action_wifi_vendor_specific_t *list; +#endif + +#ifdef RWL_SOCKET + int Sockfd; +#endif + + remote_cmd = REMOTE_SHELL_CMD; + +#ifdef RWLASD + if (cmd == ASD_CMD) + remote_cmd = REMOTE_ASD_CMD; +#endif + if (cmd == VISTA_CMD) + remote_cmd = REMOTE_VISTA_CMD; + + switch (remote_type) { + case REMOTE_SOCKET: +#ifdef RWL_SOCKET + if ((Sockfd = rwl_connect_socket_server()) < 0) { + DPRINT_ERR(ERR, " Error in getting the SocDes\n"); + return BCME_ERROR; + } + + wl = (void *)(&Sockfd); + if (remote_CDC_tx(wl, cmd, input_buf, *input_len, *input_len, + remote_cmd, 0) < 0) { + DPRINT_ERR(ERR, "shell_info_fe: Send command failed\n"); + rwl_close_pipe(remote_type, wl); + return BCME_ERROR; + } + /* For backward compatibility for ASD, async and kill commands do the + * old way + */ + if (remote_cmd == REMOTE_SHELL_CMD && !strstr((char*)input_buf, "%") && + !strstr((char*)input_buf, "kill")) + error = rwl_socket_shellresp(wl, rem_ptr, input_buf); + else { + if ((rem_ptr = remote_CDC_rx_hdr(wl, 0)) == NULL) { + DPRINT_ERR(ERR, "shell_info_fe: Receiving CDC" + "header failed\n"); + rwl_close_pipe(remote_type, wl); + return FAIL; + } + + if ((resp_buf = malloc(rem_ptr->msg.len + 1)) == NULL) { + DPRINT_ERR(ERR, "Mem alloc fails\n"); + rwl_close_pipe(remote_type, wl); + return FAIL; + } + + if (remote_CDC_rx(wl, rem_ptr, resp_buf, + rem_ptr->msg.len, 0) == FAIL) { + DPRINT_ERR(ERR, "shell_info_fe: No results!\n"); + rwl_close_pipe(remote_type, wl); + free(resp_buf); + return FAIL; + } + + /* print the shell result */ + resp_buf[rem_ptr->msg.len] = '\0'; + /* The return value of the shell command + * will be stored in rem_ptr->msg.cmd + * Return that value to the client process + */ + if (rem_ptr->msg.flags & REMOTE_REPLY) + error = rem_ptr->msg.cmd; + fputs((char*)resp_buf, stdout); + } + rwl_close_pipe(remote_type, wl); +#endif /* RWL_SOCKET */ + break; + case REMOTE_DONGLE: + case REMOTE_SERIAL: + if (remote_CDC_tx(wl, cmd, input_buf, *input_len, *input_len, + remote_cmd, 0) < 0) { + DPRINT_ERR(ERR, "shell_info_fe: Send command failed\n"); + return FAIL; + } + + /* For backward compatibility for ASD, async and kill commands do the + * old way + */ + if (remote_cmd != REMOTE_ASD_CMD && !strstr((char*)input_buf, "%") && + !strstr((char*)input_buf, "kill")) + error = rwl_dongle_shellresp(wl, rem_ptr, input_buf, cmd); + else { + if ((rem_ptr = remote_CDC_rx_hdr(wl, 0)) == NULL) { + DPRINT_ERR(ERR, "shell_info_fe:" + "Receiving CDC header failed\n"); + return SERIAL_PORT_ERR; + } + rwl_swap_header(rem_ptr, NETWORK_TO_HOST); + /* In case of shell or ASD commands the response + * size is not known in advance + * Hence based on response from the server memory is allocated + */ + if ((resp_buf = malloc(rem_ptr->msg.len + 1)) == NULL) { + DPRINT_ERR(ERR, "Mem alloc fails for shell response buffer\n"); + return FAIL; + } + + if (rem_ptr->data_len < DATA_FRAME_LEN) { + /* Response comes in one shot not in fragments */ + if (remote_CDC_rx(wl, rem_ptr, resp_buf, + rem_ptr->msg.len, 0) == FAIL) { + DPRINT_ERR(ERR, "shell_info_fe: No results!\n"); + free(resp_buf); + return FAIL; + } + } else { + error = rwl_serial_fragmented_response_fe(wl, rem_ptr, + resp_buf, (unsigned long *)&(rem_ptr->msg.len)); + } + /* print the shell result */ + resp_buf[rem_ptr->msg.len] = '\0'; + /* The return value of the shell command will be stored in rem_ptr->msg.cmd + * Return that value to the client process + */ + if (rem_ptr->msg.flags & REMOTE_REPLY) + error = rem_ptr->msg.cmd; + fputs((char*)resp_buf, stdout); + } + break; + + case REMOTE_WIFI: +#ifdef RWL_WIFI + /* Unlike dongle or UART case the response for wi-fi comes in single frame. + * (CDC header + data). Hence the single read is called for header and data. + * If any error in reading then we sleep for some time before retrying. + */ + if ((list = (dot11_action_wifi_vendor_specific_t *) + malloc(RWL_WIFI_ACTION_FRAME_SIZE)) == NULL) { + return FAIL; + } + if ((rem_ptr = (rem_ioctl_t *)malloc(REMOTE_SIZE)) == NULL) { + free(list); + return FAIL; + } + + if ((cbuf = (char*) malloc(*input_len)) == NULL) { + DPRINT_ERR(ERR, "Malloc failed for shell response\n"); + free(rem_ptr); + free(list); + return FAIL; + } + + /* copy of the original buf is required for retry */ + memcpy(cbuf, (char*)input_buf, *input_len); + for (retry = 0; retry < RWL_WIFI_RETRY; retry++) { + + rwl_wifi_purge_actionframes(wl); + if (remote_CDC_tx(wl, cmd, input_buf, *input_len, *input_len, + remote_cmd, 0) < 0) { + DPRINT_DBG(OUTPUT, "rwl_shell_information_fe(wifi):" + "Send command failed\n"); + rwl_sleep(RWL_WIFI_RETRY_DELAY); + free(rem_ptr); + free(list); + return FAIL; + } + /* For backward compatibility for ASD, + * async and kill commands do the + * old way + */ + if (remote_cmd == REMOTE_SHELL_CMD && + !strstr((char*)input_buf, "%") && + !strstr((char*)input_buf, "kill")) { + error = rwl_wifi_shellresp(wl, rem_ptr, input_buf); + if (rem_ptr->msg.len == 0) + break; + } + else if (remote_cmd == REMOTE_VISTA_CMD) { + if ((error = remote_CDC_DATA_wifi_rx_frag(wl, rem_ptr, 0, + NULL, RWL_WIFI_SHELL_CMD)) < 0) { + DPRINT_DBG(OUTPUT, "rwl_shell_information_fe(wifi):" + "error in reading shell response\n"); + continue; + } + if (rem_ptr->msg.flags & REMOTE_REPLY) { + error = rem_ptr->msg.cmd; + break; + } else { + rwl_sleep(RWL_WIFI_RETRY_DELAY); + continue; + } + } + else { + /* ASD commands may take long time to give back + * the response (eg: file transfer) + */ + if (remote_cmd == REMOTE_ASD_CMD) { + for (;;) { + /* copy back the buffer to input buffer */ + memcpy((char*)input_buf, cbuf, *input_len); + + if ((error = remote_CDC_DATA_wifi_rx_frag( + wl, rem_ptr, 0, NULL, + RWL_WIFI_SHELL_CMD)) < 0) { + DPRINT_DBG(OUTPUT, + "rwl_shell_information_fe(wifi):" + "err in reading shell response\n"); + continue; + } + if (rem_ptr->msg.flags & REMOTE_REPLY) { + error = rem_ptr->msg.cmd; + retry = RWL_WIFI_RETRY; + break; + } else { + rwl_sleep(RWL_WIFI_RETRY_DELAY); + continue; + } + } + } + } + + } + free(rem_ptr); + free(list); + if (cbuf != NULL) + free(cbuf); +#endif /* RWL_WIFI */ + break; + + default: + break; + } /* End of switch (remote_type) */ + + if (resp_buf) + free(resp_buf); + + return error; +} + +/* Prepare to issue shell command */ +int +rwl_shell_cmd_proc(void *wl, char **argv, int cmd) +{ + uchar *buff; + unsigned long len = SHELL_CMD_LEN; + int err; + + if ((buff = malloc(SHELL_CMD_LEN)) == NULL) { + DPRINT_ERR(ERR, "\n Mem alloc fails for shell cmd buffer\n"); + return FAIL; + } + + memset(buff, 0, sizeof(SHELL_CMD_LEN)); + while (*argv) { + strcat((char*)buff, *argv); + argv++; + if (*argv) + strcat((char*)buff, " "); /* leave space between args */ + } + + err = rwl_shell_information_fe(wl, cmd, buff, &len); + free(buff); + return err; +} + +/* transport independent entry point for GET ioctls */ +int +rwl_queryinformation_fe(void *wl, int cmd, void* input_buf, + unsigned long *input_len, int debug, int rem_ioctl_select) { + int error = 0; + uint tx_len; +#if defined (RWL_SERIAL) || (RWL_WIFI) + rem_ioctl_t *rem_ptr = NULL; +#endif + +#ifdef RWL_WIFI + int retry; + char *cinput_buf; +#endif + + UNUSED_PARAMETER(debug); + + switch (remote_type) { + case REMOTE_SOCKET: +#ifdef RWL_SOCKET + /* We don't want the server to allocate bigger buffers + * for some of the commands + * like scanresults. Server can still allocate 8K memory + * and send the response + */ + if ((int)(*input_len) > SERVER_RESPONSE_MAX_BUF_LEN) + *input_len = SERVER_RESPONSE_MAX_BUF_LEN; + + error = rwl_information_socket(wl, cmd, input_buf, + input_len, input_len, rem_ioctl_select); +#endif /* RWL_SOCKET */ + break; + +#ifdef RWL_SERIAL + /* System serial transport is not supported in Linux. Only XP */ + case REMOTE_SERIAL: + tx_len = MIN(*input_len, SERVER_RESPONSE_MAX_BUF_LEN); + + if (remote_CDC_tx(wl, cmd, input_buf, tx_len, + tx_len, rem_ioctl_select, debug) < 0) { + DPRINT_ERR(ERR, "query_info_fe: Send command failed\n"); + return FAIL; + } + + if ((rem_ptr = remote_CDC_rx_hdr(wl, debug)) == NULL) { + DPRINT_ERR(ERR, "query_info_fe: Reading CDC header failed\n"); + return FAIL; + } + + if (rem_ptr->msg.flags != REMOTE_REPLY) { + DPRINT_ERR(ERR, "query_info_fe: response format error.\n"); + return FAIL; + } + if (rem_ptr->msg.len > *input_len) { + DPRINT_ERR(ERR, "query_info_fe: needed size(%d) greater than " + "actual size(%lu)\n", rem_ptr->msg.len, *input_len); + return FAIL; + } + + error = rem_ptr->msg.cmd; + if (error != 0) + DPRINT_ERR(ERR, "query_info_fe: remote cdc header return " + "error code %d\n", error); + if (remote_CDC_rx(wl, rem_ptr, input_buf, *input_len, debug) == -1) { + DPRINT_ERR(ERR, "query_info_fe: No results!\n"); + return FAIL; + } + if (rem_ptr->msg.flags & REMOTE_REPLY) + error = rem_ptr->msg.cmd; + break; + +#endif /* RWL_SERIAL */ + case REMOTE_DONGLE: + /* We don't want the server to allocate bigger buffers + * for some of the commands + * like scanresults. Server can still allocate 8K + *memory and send the response + * in fragments. + */ + if ((int)(*input_len) > SERVER_RESPONSE_MAX_BUF_LEN) + *input_len = SERVER_RESPONSE_MAX_BUF_LEN; + + /* Actual buffer to be sent should be max 256 bytes as + *UART input buffer + * is 512 bytes + */ + tx_len = MIN(*input_len, 256); + error = rwl_information_dongle(wl, cmd, input_buf, input_len, + tx_len, rem_ioctl_select); + + break; + + case REMOTE_WIFI: +#ifdef RWL_WIFI + /* We don't want the server to allocate bigger buffers + * for some of the commands + * like scanresults. Server can still allocate 8K memory + * and send the response + * in fragments. + */ + if ((int)(*input_len) > SERVER_RESPONSE_MAX_BUF_LEN) + *input_len = SERVER_RESPONSE_MAX_BUF_LEN; + + /* Actual buffer to be sent should be max 960 bytes + * as wifi max frame size if 960 + * and actual data for any command will not exceed 960 bytes + */ + tx_len = MIN(*input_len, RWL_WIFI_FRAG_DATA_SIZE); + + if ((rem_ptr = (rem_ioctl_t *)malloc(REMOTE_SIZE)) == NULL) { + return FAIL; + } + if ((cinput_buf = (char*)malloc(tx_len)) == NULL) { + DPRINT_ERR(ERR, "Malloc failed for query information fe" + "character buf \n"); + free(rem_ptr); + return FAIL; + } + + memcpy(cinput_buf, (char*)input_buf, tx_len); /* Keep a copy of input_buf */ + + for (retry = 0; retry < RWL_WIFI_RETRY; retry++) { + + rwl_wifi_purge_actionframes(wl); + + if (retry > 3) + DPRINT_INFO(OUTPUT, "ir_queryinformation_fe : retry %d" + "cmd %d\n", retry, cmd); + + /* copy back the buffer to input buffer */ + memcpy((char*)input_buf, cinput_buf, tx_len); + + /* Issue the command */ + if ((error = remote_CDC_wifi_tx(wl, cmd, input_buf, + *input_len, tx_len, rem_ioctl_select)) < 0) { + DPRINT_DBG(OUTPUT, "query_info_fe: Send command failed\n"); + rwl_sleep(RWL_WIFI_RETRY_DELAY); + continue; + } + + if ((error = remote_CDC_DATA_wifi_rx_frag(wl, rem_ptr, + *input_len, input_buf, RWL_WIFI_WL_CMD) < 0)) { + DPRINT_DBG(OUTPUT, "ir_queryinformation_fe :" + "Error in reading the frag bytes\n"); + rwl_sleep(RWL_WIFI_RETRY_DELAY); + continue; + } + + if (rem_ptr->msg.flags & REMOTE_REPLY) { + error = rem_ptr->msg.cmd; + break; + } else { + rwl_sleep(RWL_WIFI_RETRY_DELAY); + } + } + + free(rem_ptr); + if (cinput_buf) + free(cinput_buf); + break; +#endif /* RWL_WIFI */ + default: + DPRINT_ERR(ERR, "rwl_queryinformation_fe: Unknown" + "remote_type %d\n", remote_type); + break; + } + return error; +} + +/* +* This is the front end query function for Set Ioctls. This is used by clients +for executing Set Ioctls. +*/ +int +rwl_setinformation_fe(void *wl, int cmd, void* buf, + unsigned long *len, int debug, int rem_ioctl_select) { + int error = 0; + uint tx_len; +#if defined (RWL_SERIAL) || (RWL_WIFI) + rem_ioctl_t *rem_ptr = NULL; +#endif + +#ifdef RWL_WIFI + dot11_action_wifi_vendor_specific_t *list = NULL; + char *cbuf, retry; +#endif + + UNUSED_PARAMETER(debug); + + switch (remote_type) { + case REMOTE_SOCKET: +#ifdef RWL_SOCKET + error = rwl_information_socket(wl, cmd, buf, len, len, rem_ioctl_select); +#endif + break; +#ifdef RWL_SERIAL + case REMOTE_SERIAL: + if (remote_CDC_tx(wl, cmd, buf, *len, *len, rem_ioctl_select, debug) < 0) { + DPRINT_ERR(ERR, "set_info_fe: Send command failed\n"); + return FAIL; + } + + if ((rem_ptr = remote_CDC_rx_hdr(wl, debug)) == NULL) { + DPRINT_ERR(ERR, "set_info_fe: Reading CDC header failed\n"); + return FAIL; + } + + if (rem_ptr->msg.flags != REMOTE_REPLY) { + DPRINT_ERR(ERR, "set_info_fe: response format error.\n"); + return FAIL; + } + + if (rem_ptr->msg.len > *len) { + DPRINT_ERR(ERR, "set_info_fe: needed size (%d) greater than " + "actual size (%lu)\n", rem_ptr->msg.len, *len); + return FAIL; + } + + error = rem_ptr->msg.cmd; + if (error != 0) { + DPRINT_ERR(ERR, "set_info_fe: remote cdc header return " + "error code (%d)\n", error); + } + + if (remote_CDC_rx(wl, rem_ptr, buf, rem_ptr->msg.len, debug) == -1) { + DPRINT_ERR(ERR, "set_info_fe: fetching results failed\n"); + return FAIL; + } + + if (rem_ptr->msg.flags & REMOTE_REPLY) + error = rem_ptr->msg.cmd; + break; +#endif /* RWL_SERIAL */ + case REMOTE_DONGLE: + if ((int)(*len) > SERVER_RESPONSE_MAX_BUF_LEN) + *len = SERVER_RESPONSE_MAX_BUF_LEN; + + /* Actual buffer to be sent should be max 256 bytes as + *UART input buffer + * is 512 bytes + */ + tx_len = MIN(*len, 512); + error = rwl_information_dongle(wl, cmd, buf, len, tx_len, rem_ioctl_select); + break; + + case REMOTE_WIFI: +#ifdef RWL_WIFI + if ((int)(*len) > SERVER_RESPONSE_MAX_BUF_LEN) + *len = SERVER_RESPONSE_MAX_BUF_LEN; + + /* Actual buffer to be sent should be max 960 bytes + * as wifi max frame size if 960 + * and actual data for any command will not exceed 960 bytes + */ + tx_len = MIN(*len, RWL_WIFI_FRAG_DATA_SIZE); + + if ((cbuf = (char*) malloc(tx_len)) == NULL) { + DPRINT_ERR(ERR, "Malloc failed for set_info_fe character buf\n"); + return FAIL; + } + if ((list = (dot11_action_wifi_vendor_specific_t *) + malloc(RWL_WIFI_ACTION_FRAME_SIZE)) == NULL) { + free(cbuf); + return FAIL; + } + + if ((rem_ptr = (rem_ioctl_t *)malloc(sizeof(rem_ioctl_t))) == NULL) { + free(list); + free(cbuf); + return FAIL; + } + + memcpy(cbuf, (char*)buf, tx_len); + + for (retry = 0; retry < RWL_WIFI_RETRY; retry++) { + + rwl_wifi_purge_actionframes(wl); + /* copy back the buffer to input buffer */ + memcpy((char*)buf, (char*)cbuf, tx_len); + + if (retry > 3) + DPRINT_INFO(OUTPUT, "retry %d cmd %d\n", retry, cmd); + + if ((error = remote_CDC_wifi_tx(wl, cmd, buf, *len, + tx_len, rem_ioctl_select) < 0)) { + DPRINT_ERR(ERR, "ir_setinformation_fe: Send" + "command failed\n"); + rwl_sleep(RWL_WIFI_RETRY_DELAY); + continue; + } + + if ((char*)buf != NULL) { + /* In case cmd is findserver, response is not + * required from the server + */ + if (!strcmp((char*)buf, RWL_WIFI_FIND_SER_CMD)) { + break; + } + } + + /* Read the CDC header and data of for the sent cmd + * resposne + */ + if ((error = remote_CDC_DATA_wifi_rx((void*)wl, list) < 0)) { + DPRINT_ERR(ERR, "ir_setinformation_fe: failed to read" + "the response\n"); + rwl_sleep(RWL_WIFI_RETRY_DELAY); + continue; + } + + memcpy((char*)rem_ptr, + (char*)&list->data[RWL_WIFI_CDC_HEADER_OFFSET], + REMOTE_SIZE); + rwl_swap_header(rem_ptr, NETWORK_TO_HOST); + + memcpy((char*)buf, (char*)&list->data[REMOTE_SIZE], + rem_ptr->msg.len); + + if (rem_ptr->msg.flags & REMOTE_REPLY) { + error = rem_ptr->msg.cmd; + break; + } else { + rwl_sleep(RWL_WIFI_RETRY_DELAY); + } + } + free(rem_ptr); + free(list); + if (cbuf != NULL) + free(cbuf); + break; +#endif /* RWL_WIFI */ + default: + DPRINT_ERR(ERR, "rwl_setinformation_fe: Unknown remote_type:%d\n", + remote_type); + break; + } + + return error; +} + +#ifdef RWL_WIFI +int +rwl_var_getbuf(void *wl, const char *iovar, void *param, int param_len, void **bufptr) +{ + int len, error; + + memset((char*)g_rwl_aligned_buf, 0, WLC_IOCTL_MAXLEN); + strcpy(g_rwl_aligned_buf, iovar); + + /* include the null */ + len = strlen(iovar) + 1; + + if (param_len) + memcpy(&g_rwl_aligned_buf[len], param, param_len); + + *bufptr = g_rwl_aligned_buf; + /* When user wants to execute local CMD being in remote wifi mode, + * rwl_wifi_swap_remote_type fucntion is used to change the remote types. + */ + rwl_wifi_swap_remote_type(remote_type); + + error = wl_get(wl, WLC_GET_VAR, &g_rwl_aligned_buf[0], WLC_IOCTL_MAXLEN); + /* revert back to the old remote type */ + rwl_wifi_swap_remote_type(remote_type); + return error; +} + +int +rwl_var_setbuf(void *wl, const char *iovar, void *param, int param_len) +{ + int len, error; + + memset(g_rwl_aligned_buf, 0, WLC_IOCTL_MAXLEN); + strcpy(g_rwl_aligned_buf, iovar); + + /* include the null */ + len = strlen(iovar) + 1; + + if (param_len) + memcpy(&g_rwl_aligned_buf[len], param, param_len); + + len += param_len; + /* When user wants to execute local CMD being in remote wifi mode, + * rwl_wifi_swap_remote_type fucntion is used to change the remote types. + */ + rwl_wifi_swap_remote_type(remote_type); + error = wl_set(wl, WLC_SET_VAR, &g_rwl_aligned_buf[0], len); + /* revert back to the old type */ + rwl_wifi_swap_remote_type(remote_type); + return error; +} + +/* This function will send the buffer to the dongle driver */ +int +rwl_var_send_vs_actionframe(void* wl, const char* iovar, void* param, int param_len) +{ + int len, error; + + memset(g_rwl_aligned_buf, 0, WLC_IOCTL_MAXLEN); + strcpy(g_rwl_aligned_buf, iovar); + + /* include the null */ + len = strlen(iovar) + 1; + + if (param_len) + memcpy((void*)&g_rwl_aligned_buf[len+ OFFSETOF(wl_action_frame_t, data)], + param, + param_len); + + /* Set the PacketID (not used by remote WL */ + memset((void*)&g_rwl_aligned_buf[len + OFFSETOF(wl_action_frame_t, packetId)], 0, 4); + + /* Set the dest addr */ + memcpy((void*)&g_rwl_aligned_buf[len + OFFSETOF(wl_action_frame_t, da)], + (void*)g_rwl_buf_mac, + ETHER_ADDR_LEN); + + /* set the length */ + memcpy((void*)&g_rwl_aligned_buf[len + OFFSETOF(wl_action_frame_t, len)], + (void*) ¶m_len, + 2); + + len += param_len + ETHER_ADDR_LEN + 2 + 4; + + /* When user wants to execute local CMD being in remote wifi mode, + * rwl_wifi_swap_remote_type fucntion is used to change the remote types. + */ + rwl_wifi_swap_remote_type(remote_type); + + error = wl_set(wl, WLC_SET_VAR, &g_rwl_aligned_buf[0], len); + /* revert back to the old type */ + rwl_wifi_swap_remote_type(remote_type); + return error; +} +#endif /* RWL_WIFI */ +/* + * Function for printing the usage if user type invalid command line + * options(e.g wl --serial or --dongle or --socket or --wifi) + */ +void +rwl_usage(int remote_type) +{ + switch (remote_type) { + case REMOTE_SERIAL: + fprintf(stderr, " Usage: wl/dhd [--linuxdut/linux] [--debug]"); + fprintf(stderr, " [--serial port no]"); + fprintf(stderr, "[--ReadTimeout n] [--interactive] [--clientbatch] \n"); + fprintf(stderr, "\t--linuxdut/linux removes the WLC_OID_BASE"); + fprintf(stderr, "when sending the IOCTL command \n"); + fprintf(stderr, "\t--debug prints out tx packets sending down "); + fprintf(stderr, " the serial line, and other debug info \n"); + fprintf(stderr, "\t--serial enables the remoteWL serial port number\n"); + fprintf(stderr, "\t--interactive enables using WL in interactive mode\n"); + fprintf(stderr, "\t--clientbatch enables command batchinng on the client,"); + fprintf(stderr, " the default is batching on driver\n"); + break; + case REMOTE_DONGLE: + fprintf(stderr, " Usage: wl/dhd --dongle \n"); + fprintf(stderr, "\t COM1/COM2 (WinXP) or /dev/ttyS0" + " or /dev/ttyS1 (Linux)\n"); + fprintf(stderr, "\t - wl, shell or dhd command\n"); + fprintf(stderr, "\tDepending on the client you are using(wl or dhd)\n"); + fprintf(stderr, "\t\t shell command usage: sh \n"); + break; + case REMOTE_SOCKET: + fprintf(stderr, " Usage: wl/dhd --socket \n"); + fprintf(stderr, "\t IP address of server machine\n"); + fprintf(stderr, "\t Port no of server\n"); + fprintf(stderr, "\t - wl, shell or dhd command\n"); + fprintf(stderr, "\tDepending on the client you are using(wl or dhd)\n"); + fprintf(stderr, "\t\t shell command usage: sh \n"); + break; + case REMOTE_WIFI: + fprintf(stderr, " Usage: wl/dhd --wifi \n"); + fprintf(stderr, "\t MAC Address\n"); + fprintf(stderr, "\t - wl, shell or dhd command\n"); + fprintf(stderr, "\tDepending on the client you are using(wl or dhd)\n"); + fprintf(stderr, "\t\t shell command usage: sh \n"); + break; + default: + break; + } +} +#ifdef RWL_SOCKET +static int +rwl_socket_shellresp(void *wl, rem_ioctl_t *rem_ptr, uchar *input_buf) +{ + uchar* resp_buf = NULL; + int pid, msg_len, error; + g_sig_ctrlc = 1; + g_child_pid = pid = rwl_shell_createproc(wl); + if (pid == 0) { + while (g_sig_ctrlc); + remote_CDC_tx(wl, 0, input_buf, 0, 0, CTRLC_FLAG, 0); + exit(0); + } + + do { + if ((rem_ptr = remote_CDC_rx_hdr(wl, 0)) == NULL) { + DPRINT_ERR(ERR, "rwl_socket_shellresp: Receiving CDC" + "header failed\n"); + rwl_close_pipe(remote_type, wl); + return FAIL; + } + msg_len = rem_ptr->msg.len; + if ((resp_buf = malloc(rem_ptr->msg.len + 1)) == NULL) { + DPRINT_ERR(ERR, "rwl_socket_shellresp: Mem alloc fails\n"); + rwl_close_pipe(remote_type, wl); + return FAIL; + } + if (msg_len > 0) { + if (remote_CDC_rx(wl, rem_ptr, resp_buf, + rem_ptr->msg.len, 0) == FAIL) { + DPRINT_ERR(ERR, "rwl_socket_shellresp: No results!\n"); + rwl_close_pipe(remote_type, wl); + free(resp_buf); + return FAIL; + } + } + /* print the shell result */ + resp_buf[rem_ptr->msg.len] = '\0'; + /* The return value of the shell command + * will be stored in rem_ptr->msg.cmd + * Return that value to the client process + */ + if (rem_ptr->msg.flags & REMOTE_REPLY) + error = rem_ptr->msg.cmd; +#ifdef LINUX + write(1, resp_buf, msg_len); +#else + fputs((char*)resp_buf, stdout); +#endif + } while (msg_len); + rwl_shell_killproc(pid); + return error; +} +#endif /* RWL_SOCKET */ +/* For wifi shell responses read data until server stops sending */ +#ifdef RWL_WIFI +static int +rwl_wifi_shellresp(void *wl, rem_ioctl_t *rem_ptr, uchar *input_buf) +{ + int pid, msg_len, error; + g_sig_ctrlc = 1; + g_child_pid = pid = rwl_shell_createproc(wl); + if (pid == 0) + { + while (g_sig_ctrlc); + remote_CDC_tx(wl, 0, input_buf, 0, 0, CTRLC_FLAG, 0); + exit(0); + } + + do { + if ((error = remote_CDC_DATA_wifi_rx_frag(wl, rem_ptr, 0, + NULL, RWL_WIFI_SHELL_CMD)) < 0) { + DPRINT_DBG(OUTPUT, "rwl_shell_information_fe(wifi):" + "error in reading shell response\n"); + continue; + } + msg_len = rem_ptr->msg.len; + error = rem_ptr->msg.cmd; + } while (msg_len); + + rwl_shell_killproc(pid); + return error; +} +#endif /* RWL_WIFI */ + +/* For dongle or system serial shell responses read data until server stops sending */ +static int +rwl_dongle_shellresp(void *wl, rem_ioctl_t *rem_ptr, uchar *input_buf, int cmd) +{ + int pid, msg_len, error; + uchar *resp_buf; + + g_sig_ctrlc = 1; + g_child_pid = pid = rwl_shell_createproc(wl); + if (pid == 0) { + while (g_sig_ctrlc); + remote_CDC_tx(wl, cmd, input_buf, 0, 0, CTRLC_FLAG, 0); + exit(0); + } + + do { + if ((rem_ptr = remote_CDC_rx_hdr(wl, 0)) == NULL) { + DPRINT_ERR(ERR, "shell_info_fe: Receiving CDC header failed\n"); + return SERIAL_PORT_ERR; + } + /* In case of shell or ASD commands the response size is not known in advance + * Hence based on response from the server memory is allocated + */ + msg_len = rem_ptr->msg.len; + if ((resp_buf = malloc(rem_ptr->msg.len + 1)) == NULL) { + DPRINT_ERR(ERR, "Mem alloc fails for shell response buffer\n"); + return FAIL; + } + /* Response comes in one shot not in fragments */ + if (remote_CDC_rx(wl, rem_ptr, resp_buf, + rem_ptr->msg.len, 0) == FAIL) { + DPRINT_ERR(ERR, "shell_info_fe: No results!\n"); + free(resp_buf); + return FAIL; + } + /* print the shell result */ + resp_buf[rem_ptr->msg.len] = '\0'; + /* The return value of the shell command will be stored in rem_ptr->msg.cmd + * Return that value to the client process + */ + if (rem_ptr->msg.flags & REMOTE_REPLY) + error = rem_ptr->msg.cmd; +#ifdef LINUX + write(1, resp_buf, msg_len); +#else + fputs((char*)resp_buf, stdout); +#endif + } while (msg_len); + rwl_shell_killproc(pid); + return error; +} + +int rwl_detect(void *wl, bool debug, int* os_type_ptr) +{ + int error, buf = UNKNOWN_OS; + unsigned long len = sizeof(buf); + + error = rwl_queryinformation_fe(wl, + NEGOTIATE_GET_OS, &buf, &len, debug, REMOTE_NEGOTIATE_CMD); + if (!error) { + if (buf > UNKNOWN_OS && buf < INVALID_OS) { + *os_type_ptr = buf; + if (debug) + fprintf(stderr, "Autodetect: %d\n", *os_type_ptr); + return 0; + } + } + + fprintf(stderr, "Autodetect failed, rwl server is either " + "too old or unreachable. Use --nodetect to disable autodetect.\n"); + return FAIL; +} diff --git a/external/cache/sources/wl/shared/wlu_client_shared.h b/external/cache/sources/wl/shared/wlu_client_shared.h new file mode 100644 index 0000000..d2d8cce --- /dev/null +++ b/external/cache/sources/wl/shared/wlu_client_shared.h @@ -0,0 +1,33 @@ +/* + * OS independent client specific declarations + * + * $Copyright (C) 2008 Broadcom Corporation$ + * + * $Id: wlu_client_shared.h 295438 2011-11-10 14:27:25Z alwin $ + */ +#ifndef _wlu_client_shared_h +#define _wlu_client_shared_h + +/* Newly added wrappers from wlu_client_shared.c */ +extern int +rwl_shell_cmd_proc(void *wl, char **argv, int cmd); +extern int +rwl_queryinformation_fe(void *wl, int cmd, void* input_buf, unsigned long *input_len, +int debug, int rem_ioctl_select); +extern int +rwl_setinformation_fe(void *wl, int cmd, void* buf, unsigned long *len, int debug, +int rem_ioctl_select); +extern void +rwl_usage(int remote_type); +extern int +rwl_detect(void *wl, bool debug, int* os_type_ptr); + +extern int rwl_shell_createproc(void *wl); +extern void rwl_shell_killproc(int pid); +#ifndef UNDER_CE +/* declaring these as extern to be used in wlu_ndis.c and wlu_linux.c */ +extern volatile sig_atomic_t g_sig_ctrlc; +extern void ctrlc_handler(int num); +#endif /* Not UNDER_CE */ + +#endif /* _wlu_client_share_h */ diff --git a/external/cache/sources/wl/shared/wlu_common.c b/external/cache/sources/wl/shared/wlu_common.c new file mode 100644 index 0000000..c0e98fb --- /dev/null +++ b/external/cache/sources/wl/shared/wlu_common.c @@ -0,0 +1,307 @@ +/* + * Common code for wl routines + * + * $Copyright (C) 2002-2005 Broadcom Corporation$ + * + * $Id: wlu_common.c 288685 2011-10-08 00:50:34Z pgarg $ + */ + +#ifdef WIN32 +#include +#endif + +#include "wlu_common.h" +#include "wlu.h" +#include + +extern int wl_get(void *wl, int cmd, void *buf, int len); +extern int wl_set(void *wl, int cmd, void *buf, int len); + +wl_cmd_list_t cmd_list; +int cmd_pkt_list_num; +bool cmd_batching_mode; + +const char *wlu_av0; + +#ifdef SERDOWNLOAD +extern int debug; +#endif + +#ifdef ATE_BUILD +int wlu_iovar_get(void *wl, const char *iovar, void *outbuf, int len); +int wlu_get(void *wl, int cmd, void *cmdbuf, int len); +int wlu_set(void *wl, int cmd, void *cmdbuf, int len); +int add_one_batched_cmd(int cmd, void *cmdbuf, int len); +int wlu_iovar_setint(void *wl, const char *iovar, int val); +int wlu_iovar_set(void *wl, const char *iovar, void *param, int paramlen); +#endif /* ATE_BUILD */ + +/* + * format an iovar buffer + * iovar name is converted to lower case + */ +static uint +wl_iovar_mkbuf(const char *name, char *data, uint datalen, char *iovar_buf, uint buflen, int *perr) +{ + uint iovar_len; + char *p; + + iovar_len = strlen(name) + 1; + + /* check for overflow */ + if ((iovar_len + datalen) > buflen) { + *perr = BCME_BUFTOOSHORT; + return 0; + } + + /* copy data to the buffer past the end of the iovar name string */ + if (datalen > 0) + memmove(&iovar_buf[iovar_len], data, datalen); + + /* copy the name to the beginning of the buffer */ + strcpy(iovar_buf, name); + + /* wl command line automatically converts iovar names to lower case for + * ease of use + */ + p = iovar_buf; + while (*p != '\0') { + *p = tolower((int)*p); + p++; + } + + *perr = 0; + return (iovar_len + datalen); +} + +void +init_cmd_batchingmode(void) +{ + cmd_pkt_list_num = 0; + cmd_batching_mode = FALSE; +} + +void +clean_up_cmd_list(void) +{ + wl_seq_cmd_pkt_t *this_cmd, *next_cmd; + + this_cmd = cmd_list.head; + while (this_cmd != NULL) { + next_cmd = this_cmd->next; + if (this_cmd->data != NULL) { + free(this_cmd->data); + } + free(this_cmd); + this_cmd = next_cmd; + } + cmd_list.head = NULL; + cmd_list.tail = NULL; + cmd_pkt_list_num = 0; +} + +int +add_one_batched_cmd(int cmd, void *cmdbuf, int len) +{ + wl_seq_cmd_pkt_t *new_cmd; + + new_cmd = malloc(sizeof(wl_seq_cmd_pkt_t)); + + if (new_cmd == NULL) { + printf("malloc(%d) failed, free %d batched commands and exit batching mode\n", + (int)sizeof(wl_seq_cmd_pkt_t), cmd_pkt_list_num); + goto free_and_exit; + } else { +#ifdef SERDOWNLOAD + if (debug) +#endif /* SERDOWNLOAD */ + printf("batching %dth command %d\n", cmd_pkt_list_num+1, cmd); + + } + + new_cmd->cmd_header.cmd = cmd; + new_cmd->cmd_header.len = len; + new_cmd->next = NULL; + + new_cmd->data = malloc(len); + + if (new_cmd->data == NULL) { + printf("malloc(%d) failed, free %d batched commands and exit batching mode\n", + len, cmd_pkt_list_num); + free(new_cmd); + goto free_and_exit; + } + + memcpy(new_cmd->data, cmdbuf, len); + + if (cmd_list.tail != NULL) + cmd_list.tail->next = new_cmd; + else + cmd_list.head = new_cmd; + + cmd_list.tail = new_cmd; + + cmd_pkt_list_num ++; + return 0; + +free_and_exit: + + clean_up_cmd_list(); + + if (cmd_batching_mode) { + cmd_batching_mode = FALSE; + } + else { + printf("calling add_one_batched_cmd() at non-command-batching mode, weird\n"); + } + + return -1; +} + +#ifndef ATE_BUILD +int +wlu_get_req_buflen(int cmd, void *cmdbuf, int len) +{ + int modified_len = len; + char *cmdstr = (char *)cmdbuf; + + if (len == WLC_IOCTL_MAXLEN) { + if ((strcmp(cmdstr, "dump") == 0) || + (cmd == WLC_SCAN_RESULTS)) + modified_len = WLC_IOCTL_MAXLEN; + else + modified_len = WLC_IOCTL_MEDLEN; + } + return modified_len; +} +#endif /* !ATE_BUILD */ + +/* now IOCTL GET commands shall call wlu_get() instead of wl_get() so that the commands + * can be batched when needed + */ +int +wlu_get(void *wl, int cmd, void *cmdbuf, int len) +{ + if (cmd_batching_mode) { + if (!WL_SEQ_CMDS_GET_IOCTL_FILTER(cmd)) { + printf("IOCTL GET command %d is not supported in batching mode\n", cmd); + return IOCTL_ERROR; + } + } + + return wl_get(wl, cmd, cmdbuf, len); +} + +/* now IOCTL SET commands shall call wlu_set() instead of wl_set() so that the commands + * can be batched when needed + */ +int +wlu_set(void *wl, int cmd, void *cmdbuf, int len) +{ + if (cmd_batching_mode) { + return add_one_batched_cmd(cmd, cmdbuf, len); + } + else { + return wl_set(wl, cmd, cmdbuf, len); + } +} + +/* + * get named iovar providing both parameter and i/o buffers + * iovar name is converted to lower case + */ +int +wlu_iovar_getbuf(void* wl, const char *iovar, + void *param, int paramlen, void *bufptr, int buflen) +{ + int err; + + wl_iovar_mkbuf(iovar, param, paramlen, bufptr, buflen, &err); + if (err) + return err; + + return wlu_get(wl, WLC_GET_VAR, bufptr, buflen); +} + +/* + * set named iovar providing both parameter and i/o buffers + * iovar name is converted to lower case + */ +int +wlu_iovar_setbuf(void* wl, const char *iovar, + void *param, int paramlen, void *bufptr, int buflen) +{ + int err; + int iolen; + + iolen = wl_iovar_mkbuf(iovar, param, paramlen, bufptr, buflen, &err); + if (err) + return err; + + return wlu_set(wl, WLC_SET_VAR, bufptr, iolen); +} + +/* + * get named iovar without parameters into a given buffer + * iovar name is converted to lower case + */ +int +wlu_iovar_get(void *wl, const char *iovar, void *outbuf, int len) +{ + char smbuf[WLC_IOCTL_SMLEN]; + int err; + + /* use the return buffer if it is bigger than what we have on the stack */ + if (len > (int)sizeof(smbuf)) { + err = wlu_iovar_getbuf(wl, iovar, NULL, 0, outbuf, len); + } else { + memset(smbuf, 0, sizeof(smbuf)); + err = wlu_iovar_getbuf(wl, iovar, NULL, 0, smbuf, sizeof(smbuf)); + if (err == 0) + memcpy(outbuf, smbuf, len); + } + + return err; +} + +/* + * set named iovar given the parameter buffer + * iovar name is converted to lower case + */ +int +wlu_iovar_set(void *wl, const char *iovar, void *param, int paramlen) +{ + char smbuf[WLC_IOCTL_SMLEN*2]; + + memset(smbuf, 0, sizeof(smbuf)); + + return wlu_iovar_setbuf(wl, iovar, param, paramlen, smbuf, sizeof(smbuf)); +} + +/* + * get named iovar as an integer value + * iovar name is converted to lower case + */ +int +wlu_iovar_getint(void *wl, const char *iovar, int *pval) +{ + int ret; + + ret = wlu_iovar_get(wl, iovar, pval, sizeof(int)); + if (ret >= 0) + { + *pval = dtoh32(*pval); + } + return ret; +} + +/* + * set named iovar given an integer parameter + * iovar name is converted to lower case + */ +int +wlu_iovar_setint(void *wl, const char *iovar, int val) +{ + val = htod32(val); + return wlu_iovar_set(wl, iovar, &val, sizeof(int)); +} diff --git a/external/cache/sources/wl/shared/wlu_common.h b/external/cache/sources/wl/shared/wlu_common.h new file mode 100644 index 0000000..00b79a4 --- /dev/null +++ b/external/cache/sources/wl/shared/wlu_common.h @@ -0,0 +1,132 @@ +/* + * Common code for wl routines + * + * $Copyright (C) 2002-2005 Broadcom Corporation$ + * + * $Id: wlu_common.h 370210 2012-11-21 05:35:27Z nisar $ + */ +#include +#include +#if defined(_CFE_) +#include +#include +#include +#include +#include +#elif defined(__IOPOS__) +#include +#include +#include +#else +#include +#include +#include +#include +#include +#endif /* defined(_CFE_) */ +#if defined (__NetBSD__) || defined(linux) || defined(MACOSX) || defined(EFI) +#define stricmp strcasecmp +#define strnicmp strncasecmp +#elif defined(vxworks) || defined(__ECOS) +extern int stricmp(const char *s1, const char *s2); +extern int strnicmp(const char *s1, const char *s2, size_t len); +#elif defined(UNDER_CE) || defined(_CRT_SECURE_NO_DEPRECATE) +#define stricmp _stricmp +#define strnicmp _strnicmp +#elif defined(_HNDRTE_) +#define stricmp strcmp +#define strnicmp strncmp +#elif defined(_CFE_) +#include +#include +#define isalnum(c) bcm_isalnum(c) +#define isalpha(c) bcm_isalpha(c) +#define iscntrl(c) bcm_iscntrl(c) +#define isdigit(c) bcm_isdigit(c) +#define isgraph(c) bcm_isgraph(c) +#define islower(c) bcm_islower(c) +#define isprint(c) bcm_isprint(c) +#define ispunct(c) bcm_ispunct(c) +#define isspace(c) bcm_isspace(c) +#define isupper(c) bcm_isupper(c) +#define isxdigit(c) bcm_isxdigit(c) +#define stricmp(s1, s2) lib_strcmpi((s1), (s2)) +#define strtoul(nptr, endptr, base) bcm_strtoul((nptr), (endptr), (base)) +#define tolower(c) (bcm_isupper((c)) ? ((c) + 'a' - 'A') : (c)) +#define fprintf(stream, fmt, args...) xprintf(fmt, ##args) +#define fputs(s, stream) puts(s) +#define malloc(size) KMALLOC((size), 0) +#define free(ptr) KFREE(ptr) +/* XXX Buggy implementations */ +#define strnicmp(s1, s2, len) strncmp((s1), (s2), (len)) +#define strspn(s, accept) (0) +#define strtol(nptr, endptr, base) bcm_strtoul((nptr), (endptr), (base)) +#elif defined(__IOPOS__) +#define fprintf(file, fmt, arg...) jtag_printf(fmt, ##arg) +#define fputs(s, stream) jtag_puts(s) +#define printf jtag_printf +#define stricmp strcmp +#define strnicmp strncmp +#define strtol(nptr, endptr, base) ((long)strtoul((nptr), (endptr), (base))) +#define tolower(c) bcm_tolower(c) +#define toupper(c) bcm_toupper(c) +#define islower(c) bcm_islower(c) +#define isprint(c) bcm_isprint(c) +#define isspace(c) bcm_isspace(c) +#define isupper(c) bcm_isupper(c) +#define isxdigit(c) bcm_isxdigit(c) +#define isdigit(c) bcm_isdigit(c) +#elif defined(BWL_STRICMP) +#define stricmp bcmstricmp +#define strnicmp bcmstrnicmp +#endif /* __NetBSD__ */ + + +/* IOCTL swapping mode for Big Endian host with Little Endian dongle. Default to off */ +/* The below macros handle endian mis-matches between wl utility and wl driver. */ +static bool g_swap = FALSE; +#define htod64(i) (g_swap?bcmswap64(i):(uint64)(i)) +#define htod32(i) (g_swap?bcmswap32(i):(uint32)(i)) +#define htod16(i) (g_swap?bcmswap16(i):(uint16)(i)) +#define dtoh64(i) (g_swap?bcmswap64(i):(uint64)(i)) +#define dtoh32(i) (g_swap?bcmswap32(i):(uint32)(i)) +#define dtoh16(i) (g_swap?bcmswap16(i):(uint16)(i)) +#define htodchanspec(i) (g_swap?htod16(i):i) +#define dtohchanspec(i) (g_swap?dtoh16(i):i) +#define htodenum(i) (g_swap?((sizeof(i) == 4) ? htod32(i) : ((sizeof(i) == 2) ? htod16(i) : i)):i) +#define dtohenum(i) (g_swap?((sizeof(i) == 4) ? dtoh32(i) : ((sizeof(i) == 2) ? htod16(i) : i)):i) + +/* command batching data structure */ +typedef struct wl_seq_cmd_pkt { + struct wl_seq_cmd_pkt *next; + wl_seq_cmd_ioctl_t cmd_header; + char * data; /* user buffer */ +} wl_seq_cmd_pkt_t; + +typedef struct wl_cmd_list { + wl_seq_cmd_pkt_t *head; + wl_seq_cmd_pkt_t *tail; +} wl_cmd_list_t; + +extern wl_cmd_list_t cmd_list; +extern int cmd_pkt_list_num; +extern bool cmd_batching_mode; + +extern int wlu_iovar_getbuf(void* wl, const char *iovar, + void *param, int paramlen, void *bufptr, int buflen); +extern int wlu_iovar_setbuf(void* wl, const char *iovar, + void *param, int paramlen, void *bufptr, int buflen); +extern int wlu_var_setbuf(void *wl, const char *iovar, void *param, int param_len); +extern int wlu_iovar_getint(void *wl, const char *iovar, int *pval); +extern void init_cmd_batchingmode(void); +extern void clean_up_cmd_list(void); +extern int wl_check(void *wl); + +extern int add_one_batched_cmd(int cmd, void *cmdbuf, int len); +extern int wlu_get_req_buflen(int cmd, void *cmdbuf, int len); +extern int wlu_get(void *wl, int cmd, void *cmdbuf, int len); +extern int wlu_set(void *wl, int cmd, void *cmdbuf, int len); +extern int wlu_iovar_get(void *wl, const char *iovar, void *outbuf, int len); +extern int wlu_iovar_set(void *wl, const char *iovar, void *param, int paramlen); +extern int wlu_iovar_getint(void *wl, const char *iovar, int *pval); +extern int wlu_iovar_setint(void *wl, const char *iovar, int val); diff --git a/external/cache/sources/wl/shared/wlu_pipe.c b/external/cache/sources/wl/shared/wlu_pipe.c new file mode 100644 index 0000000..59c56f0 --- /dev/null +++ b/external/cache/sources/wl/shared/wlu_pipe.c @@ -0,0 +1,1104 @@ +/* + * Common Functionality for pipe + * + * $Copyright (C) 2008 Broadcom Corporation$ + * + * $Id: wlu_pipe.c 385622 2013-02-16 03:40:23Z jwang $ + */ +#ifdef WIN32 +#define NEED_IR_TYPES + +#include +#ifdef UNDER_CE +/* Expected order for succesfull compliation */ +#include +#endif +#include +#include +#endif /* WIN32 */ + +#ifdef LINUX +#include +#include +#include +#include +#include +#include +#include +#include +#include +#endif + +#ifdef vxworks +#include "wlu_vx.h" +#include "inetLib.h" +#endif +#include +#include +#include +#include +#ifdef TARGETOS_symbian +#include +#include +#include +#else +#if !defined(TARGETOS_nucleus) && !defined (MACOSX) && !defined (vxworks) +#include +#endif +#endif /* TARGETOS_symbian */ +#include +#include + +#include +#include +#include +#include +#include +#if defined(RWL_WIFI) || defined(WIFI_REFLECTOR) +#include +#endif /* defined(RWL_WIFI) || defined(WIFI_REFLECTOR) */ +#include "wlu.h" +#include "wlu_remote.h" + +static rem_ioctl_t rem_cdc; +char *g_rwl_device_name_serial = ""; +bool g_rwl_swap = FALSE; +char g_rem_ifname[IFNAMSIZ] = "\0"; +int need_speedy_response; /* Indicate findserver is checking channels */ + +#ifdef LINUX + /* Linux 100 usec */ +#define SYNC_TIME 100 +#else + /* WinXP 1 sec */ +#define SYNC_TIME 1 +#endif + +#define UART_FIFO_LEN 64 +#define END_OF_PACK_SEP_LEN 2 +#define INIT_CMD_SLEEP 500 +#define dtoh32(i) i + +/* dword align allocation */ +union { + uchar bufdata[ETHER_ADDR_LEN]; + uint32 alignme; +} bufmac_wlu; +char *g_rwl_buf_mac = (char*) &bufmac_wlu.bufdata; + +#ifdef RWL_WIFI +/* dword align allocation */ +union { + uchar shelldata[WL_MAX_BUF_LEN]; + uint32 alignme; +} shell_wlu; +char *g_rwl_buf_shell = (char*) &shell_wlu.shelldata; +int rwl_find_remote_wifi_server(void *wl, char *id); +int wl_ioctl(void *wl, int cmd, void *buf, int len, bool set); + +/* + * This function runs a set of commands before running the wi-fi server + * This is avoids packet drops and improves performance. + * We run the following wl commands + * up, mpc 0, wsec 0, slow_timer 999999, fast_timer 999999, glacial_timer 999999 + * legacylink 1, monitor 1. + */ +void remote_wifi_ser_init_cmds(void *wl) +{ + int err; + char bigbuf[RWL_WIFI_BUF_LEN]; + uint len = 0, count; + /* The array stores command, length and then data format */ + remote_wifi_cmds_t wifi_cmds[] = { + {WLC_UP, NULL, 0x0}, + {WLC_SET_VAR, "mpc", 0}, + {WLC_SET_WSEC, NULL, 0x0}, + {WLC_SET_VAR, "slow_timer", 999999}, + {WLC_SET_VAR, "fast_timer", 999999}, + {WLC_SET_VAR, "glacial_timer", 999999}, + {WLC_SET_MONITOR, NULL, 0x1}, + {WLC_SET_PM, NULL, 0x0} + }; + + for (count = 0; count < ARRAYSIZE(wifi_cmds); count++) { + + if (wifi_cmds[count].data == NULL) + len = sizeof(int); + else + len = strlen(wifi_cmds[count].data) + 1 + sizeof(int); + + /* If the command length exceeds the buffer length continue + * executing the next command + */ + if (len > sizeof(bigbuf)) { + DPRINT_ERR(ERR, "Err: command len exceeds buf len. Check" + "initialization cmds\n"); + continue; + } + + if (wifi_cmds[count].data != NULL) { + strcpy(bigbuf, wifi_cmds[count].data); + memcpy(&bigbuf[strlen(wifi_cmds[count].data)+1], + (char*)&wifi_cmds[count].value, sizeof(int)); + } else { + memcpy(&bigbuf[0], (char*)&wifi_cmds[count].value, sizeof(int)); + } +#ifdef WIN32 + /* Add OID base for NDIS commands */ + + err = (int)ir_setinformation(wl, wifi_cmds[count].cmd + WL_OID_BASE, + bigbuf, &len); +#endif + +#if defined(LINUX) || defined(TARGETOS_symbian) || defined(MACOSX) + if (wifi_cmds[count].cmd == WLC_UP) + /* NULL needs to be passed to the driver if WL UP command needs to + * be executed Otherwise driver hangs + */ + err = wl_ioctl(wl, wifi_cmds[count].cmd, + NULL, 0, TRUE); + else + err = wl_ioctl(wl, wifi_cmds[count].cmd, + (void*)&bigbuf, len, TRUE); + +#elif vxworks + if (wifi_cmds[count].cmd == WLC_UP) { + /* NULL needs to be passed to the driver if WL UP command needs to + * be executed Otherwise driver hangs + */ + if ((err = wl_ioctl_vx(wl, wifi_cmds[count].cmd, + NULL, 0)) == FAIL) + DPRINT_ERR(ERR, "wifi_cmds: Error in wl_ioctl_vx\n"); + } + else { + if ((err = wl_ioctl_vx(wl, wifi_cmds[count].cmd, + (void*)&bigbuf, len)) == FAIL) + DPRINT_ERR(ERR, "remote_wifi_ser_init_cmds:Error in wl_ioctl_vx\n"); + } +#endif /* LINUX || TARGETOS_symbian || MACOSX */ + rwl_sleep(INIT_CMD_SLEEP); + } + BCM_REFERENCE(err); +} + +/* When user wants to execute local CMD being in remote wifi mode, this fucntion is used + * to change the remote types. + * This fucntion is called to swap the remote type to execute the cmd using the local + * driver interface. + * This is required for to call proper front end fucntions to achive the local set/get ioctl. + */ +void +rwl_wifi_swap_remote_type(int flag) +{ + static int remote_flag; + if (flag == REMOTE_WIFI) { + remote_type = NO_REMOTE; + remote_flag = flag; + } else if (remote_flag == REMOTE_WIFI) { + remote_type = remote_flag; + remote_flag = flag; + } + return; +} + +void +rwl_wifi_free_list(dot11_action_wifi_vendor_specific_t *list[]) +{ + int i; + for (i = 0; i < RWL_DEFAULT_WIFI_FRAG_COUNT; i++) { + if (list[i]) + free(list[i]); + } +} + +/* + * Configures local channel for finding server. + * Server call this fucntion for getting its current channel, + * client uses this fucntion for setting its channel to new channel. + */ +static int +rwl_wifi_config_channel(void *wl, int cmd, int *channel) +{ + int error; + channel_info_t ci; + error = -1; + /* Get functionality is used only by server */ + if (cmd == WLC_GET_CHANNEL) { + memset((char*)&ci, 0, sizeof(ci)); + if ((error = wl_get(wl, cmd, &ci, sizeof(channel_info_t))) < 0) + return error; + ci.hw_channel = dtoh32(ci.hw_channel); + ci.scan_channel = dtoh32(ci.scan_channel); + ci.target_channel = dtoh32(ci.target_channel); + if (ci.scan_channel) { + printf("Scan in progress.\n"); + } + *channel = ci.hw_channel; + } + + if (cmd == WLC_SET_CHANNEL) { + /* Set functionality is used by the client */ + ci.target_channel = *channel; + /* When user wants to execute local CMD being in remote wifi mode, + * rwl_wifi_swap_remote_type fucntion is used to change the remote types. + */ + rwl_wifi_swap_remote_type(remote_type); + error = wl_set(wl, cmd, &ci.target_channel, sizeof(int)); + /* rever it back to same old remote type */ + rwl_wifi_swap_remote_type(remote_type); + } + return error; +} +/* +allocate the memory for action frame and update with wifi tranport header. +*/ +dot11_action_wifi_vendor_specific_t * +rwl_wifi_allocate_actionframe() +{ + dot11_action_wifi_vendor_specific_t *action_frame; + + if ((action_frame = (dot11_action_wifi_vendor_specific_t *) + malloc(RWL_WIFI_ACTION_FRAME_SIZE)) == NULL) { + DPRINT_ERR(ERR, "rwl_wifi_allocate_actionframe: unable to allocate frame \n"); + return action_frame; + } + action_frame->category = RWL_ACTION_WIFI_CATEGORY; + action_frame->OUI[0] = RWL_WIFI_OUI_BYTE0; + action_frame->OUI[1] = RWL_WIFI_OUI_BYTE1; + action_frame->OUI[2] = RWL_WIFI_OUI_BYTE2; + action_frame->type = RWL_WIFI_DEFAULT_TYPE; + action_frame->subtype = RWL_WIFI_DEFAULT_SUBTYPE; + + return action_frame; +} +/* + * Send the valid action frame (CDC+DATA) through the REF driver interface. + * if the CMD is "findserver" then "findmypeer" frames are sent on the diffrent + * channels to reconnect + * to with server. Other wl cmd takes the normal path. + * parameter 3 , i.e. buf contains the cmd line arguments and buf_len is the actual + * length of the buf. data_len is the length of the actual data to be sent to remote server. + */ +int +remote_CDC_wifi_tx(void *wl, uint cmd, uchar *buf, uint buf_len, uint data_len, uint flags) +{ + rem_ioctl_t *rem_ptr = &rem_cdc; + int error, read_try; + dot11_action_wifi_vendor_specific_t *rem_wifi_send; + + /* prepare CDC header */ + rem_ptr->msg.cmd = cmd; + rem_ptr->msg.len = buf_len; + rem_ptr->msg.flags = flags; + rem_ptr->data_len = data_len; +#ifndef OLYMPIC_RWL + if (strlen(g_rem_ifname) != 0) + strncpy(rem_ptr->intf_name, g_rem_ifname, (int)IFNAMSIZ); + rwl_swap_header(rem_ptr, HOST_TO_NETWORK); +#endif + + if ((data_len > buf_len)) { + DPRINT_ERR(ERR, "remote_CDC_wifi_tx: data_len (%d) > buf_len (%d)\n", + data_len, buf_len); + return (FAIL); + } + /* client will not send data greater than RWL_WIFI_FRAG_DATA_SIZE to server, + * this condition should not be hit on client side, when sending the cmd + * to remote server + */ + if (data_len > RWL_WIFI_FRAG_DATA_SIZE) + DPRINT_DBG(OUTPUT, "data size exceeds data_len %d\n", rem_ptr->msg.len); + + if ((buf != NULL) && (strlen((char*)buf) >= (sizeof(RWL_WIFI_FIND_SER_CMD)-1)) && + (!strcmp((char*)buf, RWL_WIFI_FIND_SER_CMD))) { + /* This is special case for wifi, when user wants to findserver, + * client has to execute it locally.Find the channel on the on + * which DUT is operating and sync up with specified MAC address, + * retry if fails to find the server + */ + for (read_try = 0; read_try < RWL_WIFI_RETRY; read_try++) { + if (((error = rwl_find_remote_wifi_server(wl, + &g_rwl_buf_mac[0])) == 0)) { + break; + } + } + return error; + } + + if ((rem_wifi_send = rwl_wifi_allocate_actionframe()) == NULL) { + DPRINT_ERR(ERR, "remote_CDC_wifi_tx: Failed to allocate memory\n"); + return (FAIL); + } + /* only data length needs to be sent to remote server using this function + * This function is only meant for client to send data to server + * Copy the CDC header and data to action frame data feild + * Now we have encapsulated the CDC header and data completely to in the + * action frame. + */ + memcpy((void*)&rem_wifi_send->data[RWL_WIFI_CDC_HEADER_OFFSET], + (char*)rem_ptr, REMOTE_SIZE); + if (buf != NULL) { + memcpy((void*)&rem_wifi_send->data[REMOTE_SIZE], buf, data_len); + } + + /* Send the action frame to remote server using the rwl_var_setbuf fucntion, + * which will use the local driver interface to send this frame on the air + */ + if ((error = rwl_var_send_vs_actionframe(wl, RWL_WIFI_ACTION_CMD, rem_wifi_send, + RWL_WIFI_ACTION_FRAME_SIZE)) < 0) { + DPRINT_ERR(ERR, "Unable to read the action frame %d error\n", error); + } + free(rem_wifi_send); + return error; +} + +/* + * Read the valid action frame through the REF/DUT driver interface. + * Retry for no of times, wait for action frame for the specified time. + */ +int +remote_CDC_DATA_wifi_rx(void *wl, dot11_action_wifi_vendor_specific_t * rec_frame) +{ + int error, read_try; + void *ptr = NULL; + + + /* retry is to ensure to read late arrival action frame */ + for (read_try = 0; read_try < RWL_WIFI_RX_RETRY; read_try++) { + /* read the action frame queued in the local driver wifi queue */ + if ((error = rwl_var_getbuf(wl, RWL_WIFI_GET_ACTION_CMD, rec_frame, + RWL_WIFI_ACTION_FRAME_SIZE, &ptr)) < 0) { + DPRINT_ERR(ERR, "remote_CDC_DATA_wifi_rx: Error in reading the frame %d\n", + error); + return error; + } + /* copy the read action frame to the user frame and cjheck for the action category. + * If the action category matches with RWL_ACTION_WIFI_CATEGORY , + * then its the valid frame, otherwise ignore it. + */ + memcpy((char*)rec_frame, ptr, RWL_WIFI_ACTION_FRAME_SIZE); + + if (rec_frame->category == RWL_ACTION_WIFI_CATEGORY) { + break; + } else { + /* If we are executing findserver then sleep less */ + if (!need_speedy_response) + rwl_sleep(RWL_WIFI_RX_DELAY); + else + rwl_sleep(RWL_CHANNEL_RX_SCAN_DELAY); + } + } + /* If failed to get the valid frame , indicate the error */ + if (!(rec_frame->category == RWL_ACTION_WIFI_CATEGORY)) { + return (FAIL); + } + return error; +} +/* + * read data that has reached client in fragments. If the functtion is + * called from rwl_shell_information_fe then the flag will be set to 1. + * For shell response this function will output the response on the standard interface. + * Response will be coming in out of order , this fucntion will make it inorder. + * Duplicate action frames are ignored. + */ +int +remote_CDC_DATA_wifi_rx_frag(void *wl, rem_ioctl_t *rem_ptr, uint input_len, +void *input, bool shell) +{ + int error, totalfrag, seq_num, num_frags, remainingbytes; + dot11_action_wifi_vendor_specific_t *rec_frame; + uchar *input_buf = (uchar*)input; + /* An array of pointers to each recieved frag */ + dot11_action_wifi_vendor_specific_t *master_list[RWL_DEFAULT_WIFI_FRAG_COUNT]; + + UNUSED_PARAMETER(input_len); + remainingbytes = 0; + + memset(master_list, 0, sizeof(master_list)); + /* in case of shell cmd's receive size is unknown */ + if (shell) { + input_buf = (uchar*)g_rwl_buf_shell; + memset(input_buf, 0, WL_MAX_BUF_LEN); + } + + /* We don't yet know how many fragments we will need to read since the + length is contained in the first frgment of the message itself. Set + totalfrag to an arbitry large number and we will readjust it after we + successfully recieve the first frag. + */ + totalfrag = RWL_DEFAULT_WIFI_FRAG_COUNT; + + for (num_frags = 0; num_frags <= totalfrag; num_frags++) { + if ((rec_frame = rwl_wifi_allocate_actionframe()) == NULL) { + DPRINT_DBG(OUTPUT, "malloc failure\n"); + rwl_wifi_free_list(master_list); + return (FAIL); + } + if ((error = remote_CDC_DATA_wifi_rx((void*)wl, rec_frame)) < 0) { + free(rec_frame); + rwl_wifi_free_list(master_list); + return FAIL; + } + + if (rec_frame->subtype >= RWL_DEFAULT_WIFI_FRAG_COUNT) { + DPRINT_DBG(OUTPUT, " Read bogus subtype %d\n", rec_frame->subtype); + free(rec_frame); + continue; + } + /* Keep only originals and discard any dup frags */ + if (!master_list[rec_frame->subtype]) { + master_list[rec_frame->subtype] = rec_frame; + } else { + num_frags--; + free(rec_frame); + } + + /* Look for first frag so we can accurately calculate totalfrag */ + if (rec_frame->subtype == RWL_WIFI_DEFAULT_SUBTYPE) { + memcpy((char*)rem_ptr, + (char*)&master_list[rec_frame->subtype]-> + data[RWL_WIFI_CDC_HEADER_OFFSET], REMOTE_SIZE); + rwl_swap_header(rem_ptr, NETWORK_TO_HOST); + totalfrag = rem_ptr->msg.len / RWL_WIFI_FRAG_DATA_SIZE; + remainingbytes = rem_ptr->msg.len % RWL_WIFI_FRAG_DATA_SIZE; + } + } + + /* All frags are now read and there are no dups. Check for missing frags */ + for (seq_num = 0; seq_num < totalfrag; seq_num++) { + if (!master_list[seq_num]) { + DPRINT_DBG(OUTPUT, "Missing frag number %d\n", seq_num); + rwl_wifi_free_list(master_list); + return (FAIL); + } + } + /* + case 1: response in one frame i.e if (totalfrag==0) + case 2: response in multiple frame ( multiple of RWL_WIFI_FRAG_DATA_SIZE) + case 3: response in multiple frame and not in multiple of RWL_WIFI_FRAG_DATA_SIZE + */ + + /* case 1: Check for the response in single frame */ + if (totalfrag == 0) + memcpy((char*)&input_buf[0], + (char*)&master_list[0]->data[REMOTE_SIZE], rem_ptr->msg.len); + else /* case 2: Copy fragments into contiguous frame */ + memcpy((char*)&input_buf[0], + (char*)&master_list[0]->data[REMOTE_SIZE], RWL_WIFI_FRAG_DATA_SIZE); + + /* + * If all the frames are recieved , copy them to a contigues buffer + */ + for (seq_num = 1; seq_num < totalfrag; seq_num++) { + memcpy((char*)&input_buf[seq_num*RWL_WIFI_FRAG_DATA_SIZE], + (char*)&master_list[seq_num]->data, RWL_WIFI_FRAG_DATA_SIZE); + } + + /* case 3 : if response is in fragments and valid data in the last frame is less + * than RWL_WIFI_FRAG_DATA_SIZE + */ + if (remainingbytes && (totalfrag > 0)) + memcpy((char*)&input_buf[seq_num*RWL_WIFI_FRAG_DATA_SIZE], + (char*)&master_list[seq_num]->data, remainingbytes); + + if (shell) { +#ifdef LINUX + write(1, (char*)input_buf, strlen((char*)input_buf)); +#else + fputs((char*)input_buf, stdout); +#endif /* LINUX */ + } + + rwl_wifi_free_list(master_list); + return error; +} +/* + * read out all the action frame which are queued in the driver even + * before issuing any wl cmd. This is essential because due to late arrival of frame it can + * get queued after the read expires. + */ +void +rwl_wifi_purge_actionframes(void *wl) +{ + dot11_action_wifi_vendor_specific_t *rec_frame; + void *ptr = NULL; + + if ((rec_frame = (dot11_action_wifi_vendor_specific_t *) + malloc(RWL_WIFI_ACTION_FRAME_SIZE)) == NULL) { + DPRINT_DBG(OUTPUT, "Purge Error in reading the frame \n"); + return; + } + + for (;;) { + if (rwl_var_getbuf(wl, RWL_WIFI_GET_ACTION_CMD, rec_frame, + RWL_WIFI_ACTION_FRAME_SIZE, &ptr) < 0) { + DPRINT_DBG(OUTPUT, "rwl_wifi_purge_actionframes:" + "Purge Error in reading the frame \n"); + break; + } + memcpy((char*)rec_frame, ptr, RWL_WIFI_ACTION_FRAME_SIZE); + + if ((rec_frame->category != RWL_ACTION_WIFI_CATEGORY)) + break; + } + + free(rec_frame); + + return; +} +/* + * check for the channel of remote and respond if it matches with its current + * channel. Once the server gets the handshake cmd, it will check the channel + * number of the remote with its channel and if it matches , then it send out the + * ack to the remote client. This fucntion is used only by the server. + */ +void +rwl_wifi_find_server_response(void *wl, dot11_action_wifi_vendor_specific_t *rec_frame) +{ + int error, send, server_channel; + + if (rec_frame->type == RWL_WIFI_FIND_MY_PEER) { + + rec_frame->type = RWL_WIFI_FOUND_PEER; + /* read channel on of the SERVER */ + rwl_wifi_config_channel(wl, WLC_GET_CHANNEL, &server_channel); + /* overlapping channel not supported, + so server will only respond to client on the channel of the client + */ + if (rec_frame->data[RWL_WIFI_CLIENT_CHANNEL_OFFSET] == server_channel) { + /* send the response by updating server channel in the frame */ + rec_frame->data[RWL_WIFI_SERVER_CHANNEL_OFFSET] = server_channel; + /* change the TYPE feild for giving the ACK */ + for (send = 0; send < RWL_WIFI_SEND; send++) { + if ((error = rwl_var_send_vs_actionframe(wl, + RWL_WIFI_ACTION_CMD, + rec_frame, + RWL_WIFI_ACTION_FRAME_SIZE)) < 0) { + DPRINT_ERR(ERR, "rwl_wifi_find_server_response: Failed" + "to Send the Frame %d\n", error); + break; + } + rwl_sleep(RWL_WIFI_SEND_DELAY); + } + } + } + return; +} +/* + * This function is used by client only. Sends the finmypeer sync frame to remote + * server on diffrent channels and waits for the response. + */ +int +rwl_find_remote_wifi_server(void *wl, char *id) +{ + dot11_action_wifi_vendor_specific_t *rem_wifi_send, *rem_wifi_recv; + rem_ioctl_t *rem_ptr = &rem_cdc; + /* This list is generated considering valid channel and if this + * may requires updation or deletion. This needs to be identified. + * we have assumed that server band is not known and considered all band channels. + */ + int wifichannel[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, + 11, 36, 40, 44, 48, 149, 153, 157, 161, 165}; + int i, error, schannel, channel_count; + struct ether_addr * curr_macaddr; + int ret; + need_speedy_response = TRUE; + + if ((rem_wifi_send = rwl_wifi_allocate_actionframe()) == NULL) { + DPRINT_ERR(ERR, " rwl_find_remote_wifi_server : Failed to allocate \n"); + return FAIL; + } + if ((rem_wifi_recv = rwl_wifi_allocate_actionframe()) == NULL) { + DPRINT_ERR(ERR, " rwl_find_remote_wifi_server : Failed to allocate\n"); + free(rem_wifi_send); + return FAIL; + } + + channel_count = sizeof(wifichannel) / sizeof(int); + + /* make dummy read to make sure we don't read the already queued + * actionframes against the cmd we issue + */ + rwl_wifi_purge_actionframes(wl); + + /* update the client sync specifier */ + rem_wifi_send->type = RWL_WIFI_FIND_MY_PEER; + /* update the CDC flag to indicate it is handshake frame */ + rem_ptr->msg.cmd = 0; + /* cmd =0 ,this will be ignored when server receive frame + * with REMOTE_FINDSERVER_IOCTL flag + */ + rem_ptr->msg.len = RWL_WIFI_FRAG_DATA_SIZE; + rem_ptr->msg.flags = REMOTE_FINDSERVER_IOCTL; + rem_ptr->data_len = RWL_WIFI_FRAG_DATA_SIZE; + rwl_swap_header(rem_ptr, HOST_TO_NETWORK); + + memcpy((char*)&rem_wifi_send->data, (char*)rem_ptr, REMOTE_SIZE); + /* copy server mac to which ref driver needs to send unicast action frame */ + memcpy((char*)&rem_wifi_send->data[RWL_REF_MAC_ADDRESS_OFFSET], &id[0], ETHER_ADDR_LEN); + + if ((ret = rwl_var_getbuf(wl, "cur_etheraddr", NULL, 0, (void**) &curr_macaddr)) < 0) { + DPRINT_ERR(ERR, "Error getting current Mac addr \n"); + return FAIL; + } + + memcpy((char*)&rem_wifi_send->data[RWL_DUT_MAC_ADDRESS_OFFSET], (char*)curr_macaddr->octet, + ETHER_ADDR_LEN); + /* Start with the channel in the list and keep changing till the server + * responds or channels list ends + */ + for (i = 0; i < channel_count; i++) { + DPRINT_INFO(OUTPUT, "Scanning Channel: %d ...\n", wifichannel[i]); + if ((error = rwl_wifi_config_channel(wl, WLC_SET_CHANNEL, + &wifichannel[i])) < 0) { + DPRINT_ERR(ERR, " Failed to set the specified channel %d\n", + wifichannel[i]); + break; + } + /* send channel detail of client to server */ + rem_wifi_send->data[RWL_WIFI_CLIENT_CHANNEL_OFFSET] = wifichannel[i]; + + if ((error = rwl_var_send_vs_actionframe(wl, RWL_WIFI_ACTION_CMD, rem_wifi_send, + RWL_WIFI_ACTION_FRAME_SIZE)) < 0) { + DPRINT_DBG(OUTPUT, "Failed to Send the Frame %d\n", error); + break; + } + /* read the server response on the same channel */ + if ((error = remote_CDC_DATA_wifi_rx(wl, rem_wifi_recv)) < 0) { + rwl_sleep(RWL_CHANNEL_SCAN_WAIT); + continue; + } + /* Verify for the Type RWL_WIFI_FOUND_PEER */ + if (rem_wifi_recv->type == RWL_WIFI_FOUND_PEER) { + if (rem_wifi_recv->data[RWL_WIFI_SERVER_CHANNEL_OFFSET] == + rem_wifi_recv->data[RWL_WIFI_CLIENT_CHANNEL_OFFSET]) { + + DPRINT_INFO(OUTPUT, "Server is on channel # %d\n", + rem_wifi_recv->data[RWL_WIFI_SERVER_CHANNEL_OFFSET]); + + schannel = rem_wifi_recv->data[RWL_WIFI_SERVER_CHANNEL_OFFSET]; + /* Set the back to the channel on which REF was originally */ + if ((error = rwl_wifi_config_channel(wl, + WLC_SET_CHANNEL, &schannel) < 0)) { + DPRINT_ERR(ERR, "Failed to set the specified" + "channel %d\n", schannel); + } else { + DPRINT_ERR(ERR, "REF now moved to the" + "channel of server # %d\n", schannel); + } + need_speedy_response = FALSE; + /* we are done here, end the loop */ + break; + } else { + DPRINT_INFO(OUTPUT, "Server is operating on diffrent channel." + "continue scanning\n"); + } + } + /* before chaning the channel of client and sending sync frame + * wait for while and send + */ + rwl_sleep(RWL_CHANNEL_SCAN_WAIT); + } + need_speedy_response = FALSE; + + free(rem_wifi_send); + free(rem_wifi_recv); + return error; +} +#endif /* RWL_WIFI */ +#ifdef RWL_DONGLE +static int +remote_CDC_tx_dongle(void *wl, rem_ioctl_t *rem_ptr, uchar *buf) +{ + unsigned long numwritten; + char end_of_packet[END_OF_PACK_SEP_LEN] = "\n\n"; + uchar loc_buf[UART_FIFO_LEN]; + uint len = END_OF_PACK_SEP_LEN; + uint noframes, frame_count, rem_bytes; + uint n_bytes; + uint data_len; + + /* Converting the CDC header with keyword 'rwl ' in ascii format + * as dongle UART understands only ascii format. + * In dongle UART driver CDC structure is made from the ascii data + * it received. + */ + sprintf((char*)loc_buf, "rwl %d %d %d %d ", rem_ptr->msg.cmd, rem_ptr->msg.len, + rem_ptr->msg.flags, rem_ptr->data_len); + n_bytes = strlen((char*)loc_buf); + + data_len = ltoh32(rem_ptr->data_len); + DPRINT_DBG(OUTPUT, "rwl %x %d %d %d ", ltoh32(rem_ptr->msg.cmd), ltoh32(rem_ptr->msg.len), + ltoh32(rem_ptr->msg.flags), data_len); + DPRINT_DBG(OUTPUT, "CDC Header:No of bytes to be sent=%d\n", n_bytes); + DPRINT_DBG(OUTPUT, "Data:No of bytes to be sent=%d\n", data_len); + + /* Send the CDC Header */ + if (rwl_write_serial_port(wl, (char*)loc_buf, n_bytes, &numwritten) < 0) { + DPRINT_ERR(ERR, "CDC_Tx: Header: Write failed\n"); + DPRINT_ERR(ERR, "CDC_Tx: Header: numwritten %ld != n_bytes %d\n", + numwritten, n_bytes); + return (FAIL); + } + + /* Dongle UART FIFO len is 64 bytes and flow control is absent. + * While transmitting large chunk of data the data was getting lost + * at UART driver so for large chunk of data 64 bytes are sent at a time + * folowed by delay and then next set of 64 bytes and so on. + * For data which is less than 64 bytes it is sent in one shot + */ + + noframes = rem_ptr->data_len/UART_FIFO_LEN; + if (noframes == 0) { + /* Send the data now */ + if (rwl_write_serial_port(wl, (char*)buf, rem_ptr->data_len, &numwritten) < 0) { + DPRINT_ERR(ERR, "Data_Tx: Header: Write failed\n"); + DPRINT_ERR(ERR, "Data_Tx: Header: numwritten %ld != len %d\n", + numwritten, rem_ptr->data_len); + return (FAIL); + } + + } else { + if (rem_ptr->data_len % UART_FIFO_LEN == 0) { + rem_bytes = UART_FIFO_LEN; + } else { + rem_bytes = rem_ptr->data_len % UART_FIFO_LEN; + noframes += 1; + } + + for (frame_count = 0; frame_count < noframes; frame_count++) { + if (frame_count != noframes-1) { + memcpy(loc_buf, (char*)(&buf[frame_count*UART_FIFO_LEN]), + UART_FIFO_LEN); + /* Send the data now */ + if (rwl_write_serial_port(wl, (char*)loc_buf, UART_FIFO_LEN, + &numwritten) == -1) { + DPRINT_ERR(ERR, "Data_Tx: Header: Write failed\n"); + return (-1); + } + + } else { + memcpy(loc_buf, (char*)(&buf[frame_count*UART_FIFO_LEN]), + rem_bytes); + + if (rwl_write_serial_port(wl, (char*)loc_buf, rem_bytes, + &numwritten) == -1) { + DPRINT_ERR(ERR, "Data_Tx: Header: Write failed\n"); + return (-1); + } + + } + rwl_sleep(SYNC_TIME); + } + } + + /* Send end of packet now */ + if (rwl_write_serial_port(wl, end_of_packet, len, &numwritten) == -1) { + DPRINT_ERR(ERR, "CDC_Tx: Header: Write failed\n"); + DPRINT_ERR(ERR, "CDC_Tx: Header: numwritten %ld != len %d\n", + numwritten, len); + return (FAIL); + } + + DPRINT_DBG(OUTPUT, "Packet sent!\n"); + + /* Return size of actual buffer to satisfy accounting going on above this level */ + return (ltoh32(rem_ptr->msg.len)); +} +#endif /* RWL_DONGLE */ + +#if defined (RWL_SERIAL) || defined (RWL_DONGLE)|| defined (RWL_SOCKET) +void * +rwl_open_pipe(int remote_type, char *port, int ReadTotalTimeout, int debug) +{ + return rwl_open_transport(remote_type, port, ReadTotalTimeout, debug); +} + +int +rwl_close_pipe(int remote_type, void* handle) +{ + return rwl_close_transport(remote_type, handle); +} +#endif + +int +remote_CDC_tx(void *wl, uint cmd, uchar *buf, uint buf_len, uint data_len, uint flags, int debug) +{ +#ifdef RWL_SERIAL + unsigned long numwritten = 0; +#endif + rem_ioctl_t *rem_ptr = &rem_cdc; +#ifdef RWL_WIFI + int error; + uint totalframes, tx_count; + dot11_action_wifi_vendor_specific_t *rem_wifi_send; +#endif + UNUSED_PARAMETER(debug); + UNUSED_PARAMETER(buf); + UNUSED_PARAMETER(wl); + + memset(rem_ptr, 0, sizeof(rem_ioctl_t)); + rem_ptr->msg.cmd = cmd; + rem_ptr->msg.len = buf_len; + rem_ptr->msg.flags = flags; + rem_ptr->data_len = data_len; +#ifndef OLYMPIC_RWL + if (strlen(g_rem_ifname) != 0) + strncpy(rem_ptr->intf_name, g_rem_ifname, (int)IFNAMSIZ); + rwl_swap_header(rem_ptr, HOST_TO_NETWORK); +#endif + if (data_len > buf_len) { + DPRINT_ERR(ERR, "remote_CDC_tx: data_len (%d) > buf_len (%d)\n", data_len, buf_len); + return (FAIL); + } +#ifdef RWL_SERIAL + if (remote_type == REMOTE_SERIAL) { + int ret; + /* Send CDC header first */ + if ((ret = rwl_write_serial_port(wl, (char *)rem_ptr, + REMOTE_SIZE, &numwritten)) == -1) { + DPRINT_ERR(ERR, "CDC_Tx: Data: Write failed \n"); + return (FAIL); + } + numwritten = ret; + + /* Send data second */ + if ((ret = rwl_write_serial_port(wl, (char*)buf, + data_len, &numwritten)) == -1) { + DPRINT_ERR(ERR, "CDC_Tx: Data: Write failed \n"); + return (FAIL); + } + numwritten = ret; + + return (buf_len); + } +#endif /* RWL_SERIAL */ +#ifdef RWL_DONGLE + if (remote_type == REMOTE_DONGLE) { + return (remote_CDC_tx_dongle(wl, rem_ptr, buf)); + } +#endif /* RWL_DONGLE */ +#ifdef RWL_SOCKET + if (remote_type == REMOTE_SOCKET) { + int ret; + + /* Send CDC header first */ + if ((ret = rwl_send_to_streamsocket(*(int*)wl, (char *)rem_ptr, + REMOTE_SIZE, 0)) == -1) { + DPRINT_ERR(ERR, "CDC_Tx: Data: Write failed \n"); + return (FAIL); + } + + /* Send data second */ + if ((ret = rwl_send_to_streamsocket(*(int*)wl, (const char*)buf, + data_len, 0)) == -1) { + DPRINT_ERR(ERR, "CDC_Tx: Data: Write failed \n"); + return (FAIL); + } + + return (buf_len); + } +#endif /* RWL_SOCKET */ + +#ifdef RWL_WIFI + /* + * wifi action frame is formed based on the CDC header and data. + * If the data is bigger than RWL_WIFI_FRAG_DATA_SIZE size, number of fragments are + * calculated and sent + * similar number of action frames with subtype incremented with sequence. + * Frames are sent with delay to avoid the outof order at receving end + */ + if (remote_type == REMOTE_WIFI) { + if ((rem_wifi_send = rwl_wifi_allocate_actionframe()) == NULL) { + DPRINT_ERR(ERR, "remote_CDC_tx: Failed to get allocated buffer\n"); + return (FAIL); + } + + if (buf_len > RWL_WIFI_FRAG_DATA_SIZE) { + /* response needs to be sent in fragments */ + totalframes = buf_len / RWL_WIFI_FRAG_DATA_SIZE; + memcpy((char*)&rem_wifi_send->data[RWL_WIFI_CDC_HEADER_OFFSET], + (char*)rem_ptr, REMOTE_SIZE); + memcpy((char*)&rem_wifi_send->data[REMOTE_SIZE], &buf[0], + RWL_WIFI_FRAG_DATA_SIZE); + /* update type feild to inform receiver it's frammeted response frame + */ + rem_wifi_send->type = RWL_ACTION_WIFI_FRAG_TYPE; + rem_wifi_send->subtype = RWL_WIFI_DEFAULT_SUBTYPE; + + if ((error = rwl_var_send_vs_actionframe(wl, RWL_WIFI_ACTION_CMD, + rem_wifi_send, RWL_WIFI_ACTION_FRAME_SIZE)) < 0) { + DPRINT_DBG(OUTPUT, "Failed to Send the Frame %d\n", error); + free(rem_wifi_send); + return error; + } + /* Send remaining bytes in fragments */ + for (tx_count = 1; tx_count < totalframes; tx_count++) { + rem_wifi_send->type = RWL_ACTION_WIFI_FRAG_TYPE; + rem_wifi_send->subtype = tx_count; + /* First frame onwards , buf contains only data */ + memcpy((char*)&rem_wifi_send->data, + &buf[tx_count*RWL_WIFI_FRAG_DATA_SIZE], RWL_WIFI_FRAG_DATA_SIZE); + if ((error = rwl_var_send_vs_actionframe(wl, RWL_WIFI_ACTION_CMD, + rem_wifi_send, RWL_WIFI_ACTION_FRAME_SIZE)) < 0) { + free(rem_wifi_send); + return error; + } + rwl_sleep(RWL_WIFI_SEND_DELAY); + } + + /* Check for remaing bytes to send */ + if ((totalframes*RWL_WIFI_FRAG_DATA_SIZE) != buf_len) { + rem_wifi_send->type = RWL_ACTION_WIFI_FRAG_TYPE; + rem_wifi_send->subtype = tx_count; + memcpy((char*)&rem_wifi_send->data, + &buf[tx_count*RWL_WIFI_FRAG_DATA_SIZE], + (buf_len - (tx_count*RWL_WIFI_FRAG_DATA_SIZE))); + if ((error = rwl_var_send_vs_actionframe(wl, RWL_WIFI_ACTION_CMD, + rem_wifi_send, RWL_WIFI_ACTION_FRAME_SIZE)) < 0) { + free(rem_wifi_send); + return error; + } + } + } else { + /* response fits to single frame */ + memcpy((char*)&rem_wifi_send->data[RWL_WIFI_CDC_HEADER_OFFSET], + (char*)rem_ptr, REMOTE_SIZE); + /* when data_len is 0 , buf will be NULL */ + if (buf != NULL) { + memcpy((char*)&rem_wifi_send->data[REMOTE_SIZE], + &buf[0], data_len); + } + error = rwl_var_send_vs_actionframe(wl, RWL_WIFI_ACTION_CMD, rem_wifi_send, + RWL_WIFI_ACTION_FRAME_SIZE); + free(rem_wifi_send); + return error; + } + } +#endif /* RWL_WIFI */ + return (0); +} + + +rem_ioctl_t * +remote_CDC_rx_hdr(void *remote, int debug) +{ +#ifdef RWL_SOCKET + int ret; +#endif /* RWL_SOCKET */ + +#if defined(RWL_SERIAL) || defined (RWL_DONGLE) || defined (RWL_SOCKET) + uint numread = 0; +#endif + rem_ioctl_t *rem_ptr = &rem_cdc; + memset(rem_ptr, 0, sizeof(rem_ioctl_t)); + + UNUSED_PARAMETER(remote); + UNUSED_PARAMETER(debug); + + switch (remote_type) { +#if defined(RWL_SERIAL) || defined (RWL_DONGLE) + case REMOTE_SERIAL: + case REMOTE_DONGLE: + if (rwl_read_serial_port(remote, (char *)rem_ptr, sizeof(rem_ioctl_t), + &numread) < 0) { + DPRINT_ERR(ERR, "remote_CDC_rx_hdr: Header Read failed \n"); + return (NULL); + } + break; +#endif /* RWL_SERIAL | RWL_DONGLE */ + + +#ifdef RWL_SOCKET + case REMOTE_SOCKET: + ret = rwl_receive_from_streamsocket(*(int*)remote, (char *)rem_ptr, + sizeof(rem_ioctl_t), 0); + numread = ret; + if (ret == -1) { + DPRINT_ERR(ERR, "remote_CDC_rx_hdr: numread:%d", numread); + return (NULL); + } + if (numread == 0) { + DPRINT_DBG(OUTPUT, "\n remote_CDC_rx_hdr:No data to receive\n"); + return NULL; + } + break; +#endif + default: + DPRINT_ERR(ERR, "\n Unknown Transport Type\n"); + break; + } + + return (rem_ptr); +} + +/* Return a CDC type buffer */ +int +remote_CDC_rx(void *wl, rem_ioctl_t *rem_ptr, uchar *readbuf, uint buflen, int debug) +{ + uint numread = 0; + +#ifdef RWL_SOCKET + int ret; +#endif + +#ifdef RWL_WIFI + UNUSED_PARAMETER(numread); +#endif /* RWL_WIFI */ + UNUSED_PARAMETER(wl); + UNUSED_PARAMETER(readbuf); + UNUSED_PARAMETER(buflen); + UNUSED_PARAMETER(debug); + UNUSED_PARAMETER(numread); + + if (rem_ptr->data_len > rem_ptr->msg.len) { + DPRINT_ERR(ERR, "remote_CDC_rx: remote data len (%d) > msg len (%d)\n", + rem_ptr->data_len, rem_ptr->msg.len); + return (FAIL); + } + + +#if defined (RWL_DONGLE) || defined (RWL_SERIAL) + if ((remote_type == REMOTE_DONGLE) || (remote_type == REMOTE_SERIAL)) { + if (rwl_read_serial_port(wl, (char*)readbuf, rem_ptr->data_len, + &numread) < 0) { + DPRINT_ERR(ERR, "remote_CDC_rx_hdr: Data Receivefailed \n"); + return (FAIL); + } + } +#endif /* RWL_DONGLE || RWL_SERIAL */ + +#ifdef RWL_SOCKET + if (remote_type == REMOTE_SOCKET) { + if (((ret = rwl_receive_from_streamsocket(*(int*)wl, (char*)readbuf, + rem_ptr->data_len, 0)) == -1)) { + DPRINT_ERR(ERR, "remote_CDC_rx:Data Receive failed\n"); + return (FAIL); + } + } +#endif /* RWL_SOCKET */ + return (SUCCESS); +} +#ifdef RWL_SOCKET +int +rwl_sockconnect(int SockDes, struct sockaddr *servAddr, int size) +{ + DPRINT_DBG(OUTPUT, "sockconnet SockDes=%d\n", SockDes); + if (rwl_connectsocket(SockDes, servAddr, size) < 0) { + DPRINT_ERR(ERR, "\n rwl_socketconnect failed\n"); + return FAIL; + } + return SUCCESS; +} +#endif /* RWL_SOCKET */ +void +rwl_swap_header(rem_ioctl_t *rem_ptr, bool host_to_network) +{ + rem_ptr->msg.cmd = host_to_network?(htol32(rem_ptr->msg.cmd)):(ltoh32(rem_ptr->msg.cmd)); + rem_ptr->msg.len = host_to_network?(htol32(rem_ptr->msg.len)):(ltoh32(rem_ptr->msg.len)); + rem_ptr->msg.flags = host_to_network?(htol32(rem_ptr->msg.flags)): + (ltoh32(rem_ptr->msg.flags)); + rem_ptr->msg.status = host_to_network?(htol32(rem_ptr->msg.status)): + (ltoh32(rem_ptr->msg.status)); + rem_ptr->data_len = host_to_network?(htol32(rem_ptr->data_len)):(ltoh32(rem_ptr->data_len)); +} diff --git a/external/cache/sources/wl/shared/wlu_pipe.h b/external/cache/sources/wl/shared/wlu_pipe.h new file mode 100644 index 0000000..e36fd9b --- /dev/null +++ b/external/cache/sources/wl/shared/wlu_pipe.h @@ -0,0 +1,42 @@ +/* + * OS independent declarations + * + * $Copyright (C) 2008 Broadcom Corporation$ + * + * $Id: wlu_pipe.h 287128 2011-09-30 04:27:53Z estucki $ + */ +#ifndef _wlu_pipe_h +#define _wlu_pipe_h + +/* Function prototypes defined in wlu_pipe.c */ + +/* Macros to access globals */ +extern char *g_rwl_device_name_serial; +#define rwl_get_serial_port_name() (g_rwl_device_name_serial) +#define rwl_set_serial_port_name(name) (g_rwl_device_name_serial = name) +extern char *g_rwl_buf_mac; +#define rwl_get_wifi_mac() (g_rwl_buf_mac) + +extern int remote_CDC_tx(void *wl, uint cmd, uchar *buf, uint buf_len, +uint data_len, uint flags, int debug); +extern rem_ioctl_t *remote_CDC_rx_hdr(void *remote, int debug); +extern int remote_CDC_rx(void *wl, rem_ioctl_t *rem_ptr, uchar *readbuf, uint buflen, int debug); + +extern void* rwl_open_pipe(int remote_type, char *port, int ReadTotalTimeout, int debug); +extern int rwl_close_pipe(int remote_type, void* hndle); + +#ifdef RWL_SOCKET +extern int rwl_sockconnect(int SockDes, struct sockaddr *servAddr, int size); +#endif /* RWL_SOCKET */ + +extern int remote_CDC_DATA_wifi_rx_frag(void *wl, rem_ioctl_t *rem_ptr, uint input_len, +void *input, bool shell); +extern int remote_CDC_DATA_wifi_rx(void *wl, struct dot11_action_wifi_vendor_specific *rec_frame); +extern int +remote_CDC_wifi_tx(void *wl, uint cmd, uchar *buf, uint buf_len, uint data_len, uint flags); +extern void rwl_wifi_server_response(void *wl, struct dot11_action_wifi_vendor_specific *rec_frame); +extern int rwl_find_remote_wifi_server(void *wl, char *id); +extern void rwl_wifi_purge_actionframes(void *wl); +extern void rwl_wifi_swap_remote_type(int flag); +extern void remote_wifi_ser_init_cmds(void *wl); +#endif /* _wlu_pipe_h */ diff --git a/external/cache/sources/wl/shared/wlu_pipe_linux.c b/external/cache/sources/wl/shared/wlu_pipe_linux.c new file mode 100644 index 0000000..30f003d --- /dev/null +++ b/external/cache/sources/wl/shared/wlu_pipe_linux.c @@ -0,0 +1,572 @@ +/* + * linux version of remote Wl transport mechanisms (pipes). + * + * $Copyright (C) 2008 Broadcom Corporation$ + * + * $Id: wlu_pipe_linux.c 281542 2011-09-02 17:31:19Z hharte $ + */ + +/* Revision History: Linux version of remote Wl transport mechanisms (pipes). + * + * Date Author Description + * + * 27-Dec-2007 Suganthi Version 0.0 + * +*/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#if defined(MACOSX) +#include +#endif +#include +#include "wlu_remote.h" +#include +#if defined(RWL_DONGLE) || defined(RWL_SERIAL) +#define READ_DELAY 500000 +#define BAUD_RATE_115200 115200 +#define VMIN_VAL 16 +#define VTIME_VAL 50 +#define LINUX_SYNC_DELAY 200 +extern char *g_rwl_device_name_serial; +#endif + +#define MICRO_SEC_CONVERTER_VAL 1000 +int g_irh; +int g_shellsync_pid; + +#ifdef RWL_SOCKET +#define MAX_INTERFACE_NAME 32 + +static int +rwl_opensocket(int AddrFamily, int Type, int Protocol) +{ + int SockDes; + + if ((SockDes = socket(AddrFamily, Type, Protocol)) == -1) { + perror("rwl_opensocket Fails:"); + DPRINT_ERR(ERR, "\nerrno:%d\n", errno); + return FAIL; + } + return SockDes; +} + +static int +rwl_set_socket_option(int SocketDes, int Level, int OptName, int Val) +{ + if (setsockopt(SocketDes, Level, OptName, &Val, sizeof(int)) == -1) { + perror("Error at SetTCPSocketOpt()"); + DPRINT_ERR(ERR, "\n errno:%d\n", errno); + return FAIL; + } + return SUCCESS; +} + +/* Function to connect with the server waiting in the same port */ +int +rwl_connectsocket(int SocketDes, struct sockaddr* SerAddr, int SizeOfAddr) +{ + if (connect(SocketDes, SerAddr, SizeOfAddr) == -1) { + perror("Failed to connect() to server"); + DPRINT_ERR(ERR, "\n errno:%d\n", errno); + return FAIL; + } + return SUCCESS; +} + +/* + * Function for associating a local address with a socket. + */ +int +rwl_bindsocket(int SocketDes, struct sockaddr * MyAddr, int SizeOfAddr) +{ + if (bind(SocketDes, MyAddr, SizeOfAddr) == -1) { + perror("Error at rwl_bindSocket()"); + DPRINT_ERR(ERR, "\n errno:%d\n", errno); + return FAIL; + } + return SUCCESS; +} + +/* + * Function for making the socket to listen for incoming connection. + */ +int +rwl_listensocket(int SocketDes, int BackLog) +{ + if (listen(SocketDes, BackLog) == -1) { + perror("Error at rwl_listensocket()"); + DPRINT_ERR(ERR, "\n errno:%d\n", errno); + return FAIL; + } + return SUCCESS; +} + +/* + * Function for permitting an incoming connection attempt on a socket + * Function called by server + */ +int +rwl_acceptconnection(int SocketDes, struct sockaddr* ClientAddr, int *SizeOfAddr) +{ + int NewSockDes; + + if ((NewSockDes = accept(SocketDes, ClientAddr, (socklen_t*)SizeOfAddr)) == -1) { + perror("Error at rwl_acceptConnection()"); + DPRINT_ERR(ERR, "\n errno:%d\n", errno); + return FAIL; + } + return NewSockDes; +} + +static int +rwl_closesocket(int SocketDes) +{ + if (close(SocketDes) == -1) { + perror("Error at rwl_closeSocket()"); + DPRINT_ERR(ERR, "\n errno:%d\n", errno); + return FAIL; + } + return SUCCESS; +} + +/* Transmit the response in the opened TCP stream socket */ +int +rwl_send_to_streamsocket(int SocketDes, const char* SendBuff, int data_size, int Flag) +{ + int total_numwritten = 0, numwritten = 0; + while (total_numwritten < data_size) { + if ((numwritten = send(SocketDes, SendBuff, + data_size - total_numwritten, Flag)) == -1) { + perror("Failed to send()"); + DPRINT_ERR(ERR, "\n errno:%d\n", errno); + return (FAIL); + } + + /* Sent successfully at first attempt no more retries */ + if (numwritten == data_size) { + total_numwritten = numwritten; + break; + } + + /* If socket is busy we may hit this condition */ + if (numwritten != data_size - total_numwritten) { + DPRINT_DBG(OUTPUT, "wanted to send %d bytes sent only %d bytes\n", + data_size - total_numwritten, numwritten); + } + + /* Now send the remaining buffer */ + total_numwritten += numwritten; + SendBuff += numwritten; + } + + return total_numwritten; +} + +/* Receive the response from the opened TCP stream socket */ +int +rwl_receive_from_streamsocket(int SocketDes, char* RecvBuff, int data_size, int Flag) +{ + int numread; + int total_numread = 0; + + while (total_numread < data_size) { + if ((numread = recv(SocketDes, RecvBuff, data_size - total_numread, Flag)) == -1) { + perror("Failed to Receive()"); + DPRINT_ERR(ERR, "\n errno:%d\n", errno); + return FAIL; + } + + if (numread != data_size - total_numread) { + DPRINT_DBG(OUTPUT, "asked %d bytes got %d bytes\n", + data_size - total_numread, numread); + } + + if (numread == 0) + break; + + total_numread += numread; + RecvBuff += numread; + } + + return numread; +} + + +int +rwl_init_server_socket_setup(int argc, char** argv, uint remote_type) +{ + char netif[MAX_INTERFACE_NAME]; + unsigned short servPort; + struct sockaddr_in ServerAddress; + int err, SockDes, val; + + /* Default option */ + servPort = DEFAULT_SERVER_PORT; + +#ifdef MACOSX + strcpy(netif, "en0"); +#else + strcpy(netif, "eth0"); +#endif + + /* User option can override default arguments */ + if (argc == 3) { + argv++; + + if (isalpha(**argv) == FALSE) { + DPRINT_ERR(ERR, "USAGE ERROR:Incorrect network interface\n"); + return FAIL; + } + strcpy(netif, *argv); + argv++; + + if (isdigit(**argv) == FALSE) { + DPRINT_ERR(ERR, "USAGE ERROR:Incorrect port\n"); + return FAIL; + } + servPort = atoi(*argv); + } + + if (argc == 2) { + argv++; + + if (isalpha(**argv) == FALSE) { + if (isdigit(**argv) == FALSE) { + DPRINT_ERR(ERR, "USAGE ERROR\n"); + return FAIL; + } + else + servPort = atoi(*argv); + } + else + strcpy(netif, *argv); + } + + DPRINT_INFO(OUTPUT, "INFO: Network Interface:%s, Port:%d\n", + netif, servPort); + + if ((SockDes = (*(int *)rwl_open_transport(remote_type, NULL, 0, 0))) == FAIL) + return FAIL; + + val = 1; + if ((rwl_set_socket_option(SockDes, SOL_SOCKET, SO_REUSEADDR, val)) == FAIL) + return FAIL; + + memset(&ServerAddress, 0, sizeof(ServerAddress)); + + rwl_GetifAddr(netif, &ServerAddress); + ServerAddress.sin_family = AF_INET; /* host byte order */ + ServerAddress.sin_port = hton16(servPort); /* short, network byte order */ + + if (((err = rwl_bindsocket(SockDes, (struct sockaddr *)&ServerAddress, + sizeof(ServerAddress))) == FAIL)) + return err; + if ((err = rwl_listensocket(SockDes, BACKLOG)) == FAIL) + return err; + + DPRINT_DBG(OUTPUT, "Waiting for client to connect...\n"); + + return SockDes; +} + +int rwl_GetifAddr(char *ifname, struct sockaddr_in *sa) +{ + struct ifreq ifr; + int fd = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP); + + if (fd < 0) + { + DPRINT_ERR(ERR, "socket open error\n"); + return FAIL; + } + + strcpy(ifr.ifr_name, ifname); + ifr.ifr_addr.sa_family = AF_INET; + if (ioctl(fd, SIOCGIFADDR, &ifr) == 0) + { + memcpy(sa, (struct sockaddr_in *)&ifr.ifr_addr, sizeof(struct sockaddr_in)); + } + else + { + return FAIL; + } + close(fd); + return FAIL; +} +#endif /* RWL_SOCKET */ + +#if defined (RWL_SERIAL) || defined (RWL_DONGLE) +static int +rwl_open_serial(int remote_type, char *port) +{ + struct termios tio; + int fCom; + int speed; + long BAUD, DATABITS, STOPBITS, PARITYON; + speed_t baud_rate; + + DPRINT_DBG(OUTPUT, "\n rwl_open_serial:%s\n", port); + if (remote_type == REMOTE_DONGLE) + fCom = open(port, O_RDWR | O_NOCTTY | O_NDELAY); + else + fCom = open(port, O_RDWR | O_NOCTTY | O_NDELAY | O_SYNC); + if (fCom < 0) { + DPRINT_ERR(ERR, "open COM failed with error %d.\n", errno); + return fCom; + } else { + /* To make the read as a blocking operation */ + fcntl(fCom, F_SETFL, 0); + } + + bzero(&tio, sizeof(tio)); + /* Get the current option for the port... */ + tcgetattr(fCom, &tio); + /* Set the baud rate */ + cfsetispeed(&tio, B115200); + cfsetospeed(&tio, B115200); + if (remote_type == REMOTE_DONGLE) { + if (tcsetattr(fCom, TCSANOW, &tio) < 0) { + perror("tcsetattr:setspeed"); + return FAIL; + } + + baud_rate = cfgetospeed(&tio); + if (baud_rate == B115200) + speed = BAUD_RATE_115200; + DPRINT_DBG(OUTPUT, "Baud_rate set is:%d\n", speed); + + BAUD = B115200; + DATABITS = CS8; + STOPBITS = 1; + PARITYON = 0; + + tio.c_cflag = BAUD | DATABITS | STOPBITS | PARITYON | CLOCAL | CREAD; + tio.c_iflag = IGNPAR; + tio.c_oflag = 0; + tio.c_lflag = 0; + tio.c_cc[VMIN] = VMIN_VAL; + tio.c_cc[VTIME] = VTIME_VAL; + + tcflush(fCom, TCIOFLUSH); + if (tcsetattr(fCom, TCSANOW, &tio) < 0) { + perror("tcsetattr:"); + return FAIL; + } + + if (tcgetattr(fCom, &tio) < 0) { + perror("tcgetattr:"); + return FAIL; + } + + DPRINT_DBG(OUTPUT, "tcgetattr:VMIN is:%d\n", tio.c_cc[VMIN]); + DPRINT_DBG(OUTPUT, "tcgetattr:VTIME is:%d\n", tio.c_cc[VTIME]); + tcflush(fCom, TCIOFLUSH); + } + else { + UNUSED_PARAMETER(PARITYON); + UNUSED_PARAMETER(STOPBITS); + UNUSED_PARAMETER(DATABITS); + UNUSED_PARAMETER(BAUD); + UNUSED_PARAMETER(baud_rate); + UNUSED_PARAMETER(speed); + + /* Enable the receiver and set local mode */ + tio.c_cflag |= (CLOCAL | CREAD); + + tio.c_cflag &= ~PARENB; + tio.c_cflag &= ~CSTOPB; + tio.c_cflag &= ~CSIZE; + tio.c_cflag |= CS8; + tio.c_cc[VTIME] = 255; + tio.c_cc[VMIN] = 1; + + tio.c_iflag = 0; + tio.c_iflag |= IGNBRK; + + tio.c_oflag &= ~OPOST; + tio.c_oflag &= ~OLCUC; + tio.c_oflag &= ~ONLCR; + tio.c_oflag &= ~OCRNL; + tio.c_oflag &= ~ONOCR; + tio.c_oflag &= ~ONLRET; + tio.c_oflag &= ~OFILL; + + tio.c_lflag &= ~ICANON; + tio.c_lflag &= ~ISIG; + tio.c_lflag &= ~XCASE; + tio.c_lflag &= ~ECHO; + tio.c_lflag &= ~FLUSHO; + tio.c_lflag &= ~IEXTEN; + tio.c_lflag |= NOFLSH; + /* Set the new tio for the port... */ + tcsetattr(fCom, TCSANOW, &tio); + tcflush(fCom, TCIOFLUSH); + } + return (fCom); +} +int +rwl_write_serial_port(void* hndle, char* write_buf, unsigned long size, unsigned long *numwritten) +{ + int ret; + + ret = write((*(int *)hndle), (const void*)write_buf, size); + *numwritten = ret; + if (ret == -1) { + perror("WriteToPort Failed"); + DPRINT_ERR(ERR, "Errno:%d\n", errno); + return FAIL; + } + if (*numwritten != size) { + DPRINT_ERR(ERR, "rwl_write_serial_port failed numwritten %ld != len %ld\n", + *numwritten, size); + return FAIL; + } + return SUCCESS; +} + +int +rwl_read_serial_port(void* hndle, char* read_buf, uint data_size, uint *numread) +{ + int ret; + uint total_numread = 0; + while (total_numread < data_size) { + ret = read(*(int *)hndle, read_buf, data_size - total_numread); + *numread = ret; + if (ret == -1) { + + perror("ReadFromPort Failed"); + DPRINT_ERR(ERR, "Errno:%d\n", errno); + return FAIL; + } + if (*numread != data_size - total_numread) { + DPRINT_DBG(OUTPUT, "asked for %d bytes got %d bytes\n", + data_size - total_numread, *numread); + } + if (*numread == 0) + break; + + total_numread += *numread; + read_buf += *numread; + } + return SUCCESS; +} + +void +rwl_sync_delay(uint noframes) +{ + if (noframes > 1) { + rwl_sleep(LINUX_SYNC_DELAY); + } +} + +#endif /* RWL_DONGLE ||RWL_SERIAL */ + +#if defined (RWL_DONGLE) || defined (RWL_SOCKET) || defined(RWL_SERIAL) +void* +rwl_open_transport(int remote_type, char *port, int ReadTotalTimeout, int debug) +{ + void* hndle; + + UNUSED_PARAMETER(port); + UNUSED_PARAMETER(ReadTotalTimeout); + UNUSED_PARAMETER(debug); + + switch (remote_type) { +#if defined(RWL_DONGLE) || defined(RWL_SERIAL) + case REMOTE_SERIAL: +#ifdef RWL_SERIAL + g_rwl_device_name_serial = port; +#endif + case REMOTE_DONGLE: + if ((g_irh = rwl_open_serial(remote_type, g_rwl_device_name_serial)) + == FAIL) { + /* Initial port opening settings failed in reboot. + * So retry opening the serial port + */ + if ((g_irh = rwl_open_serial(remote_type, g_rwl_device_name_serial)) + == FAIL) { + DPRINT_ERR(ERR, "Can't open serial port\n"); + return NULL; + } + } + break; +#endif /* RWL_DONGLE || RWL_SERIAL */ + +#ifdef RWL_SOCKET + case REMOTE_SOCKET: + if ((g_irh = rwl_opensocket(AF_INET, SOCK_STREAM, IPPROTO_TCP)) == FAIL) { + DPRINT_ERR(ERR, "\nCan't open socket \n"); + return NULL; + } + + break; +#endif /* RWL_SOCKET */ + + default: + DPRINT_ERR(ERR, "rwl_open_transport: Unknown remote_type %d\n", remote_type); + return NULL; + break; + } /* end - switch case */ + + hndle = (void*) &g_irh; + return hndle; +} + +int +rwl_close_transport(int remote_type, void* Des) +{ + switch (remote_type) { +#ifdef RWL_SOCKET + case REMOTE_SOCKET: + if (rwl_closesocket(*(int *)Des) == FAIL) + return FAIL; + break; +#endif /* RWL_SOCKET */ + +#if defined(RWL_DONGLE) || defined(RWL_SERIAL) + case REMOTE_DONGLE: + case REMOTE_SERIAL: + if (close(*(int *)Des) == -1) + return FAIL; + break; +#endif /* RWL_DONGLE || RWL_SERIAL */ + + default: + DPRINT_ERR(ERR, "close_pipe: Unknown remote_type %d\n", remote_type); + break; + } + return SUCCESS; +} +#endif /* #if defined (RWL_DONGLE) || defined (RWL_SOCKET) */ + +void +rwl_sleep(int delay) +{ + usleep(delay * MICRO_SEC_CONVERTER_VAL); +} + +#if defined(WLMSO) +int +rwl_init_socket(void) +{ + return 0; +} +#endif diff --git a/external/cache/sources/wl/shared/wlu_remote.h b/external/cache/sources/wl/shared/wlu_remote.h new file mode 100644 index 0000000..bfa17c6 --- /dev/null +++ b/external/cache/sources/wl/shared/wlu_remote.h @@ -0,0 +1,255 @@ +/* + * OS independent remote wl declarations + * + * $Copyright (C) 2008 Broadcom Corporation$ + * + * $Id: wlu_remote.h 401759 2013-05-13 16:08:08Z sudhirbs $ + */ +#ifndef _wlu_remote_h +#define _wlu_remote_h +#include +/* Remote wl declararions */ +#define NO_REMOTE 0 +#define REMOTE_SERIAL 1 +#define REMOTE_SOCKET 2 +#define REMOTE_WIFI 3 +#define REMOTE_DONGLE 4 +#define SHELL_CMD -1 /* Invalid cmd id for shell */ +#define ASD_CMD -2 /* Cmd id for ASD command */ +#define SERVER_RESPONSE_MAX_BUF_LEN 8192 +#define SHELL_RESP_SIZE 1024 +#define CTRLC_PACKET 0xDEADBEAF +#define CTRLC_FLAG -4 +#define VISTA_CMD -3 /* cmd id for remote vista */ + +/* For cross OS support */ +/* For autonegotiation to work, these defines should be + * the same for client and server. + */ +#define UNKNOWN_OS 0 +#define LINUX_OS 1 +#define WIN32_OS 2 +#define MAC_OSX 3 +#define BACKLOG 4 +#define WINVISTA_OS 5 +#define INDONGLE 6 +#define INVALID_OS 7 /* Should be last */ + +/* Used in cdc_ioctl_t.flags field */ +#define REMOTE_SET_IOCTL 1 +#define REMOTE_GET_IOCTL 2 +#define REMOTE_REPLY 4 +#define REMOTE_SHELL_CMD 8 +#define REMOTE_FINDSERVER_IOCTL 16 /* Find remote server */ +#define REMOTE_ASD_CMD 32 /* ASD integration */ +#define RDHD_SET_IOCTL 64 +#define RDHD_GET_IOCTL 128 +#define REMOTE_VISTA_CMD 256 /* for remote vista specific commands */ +#define REMOTE_NEGOTIATE_CMD 512 /* for RWL negotiation */ +#define NEGOTIATE_GET_OS 0 /* detect remote OS */ +#define RWL_WIFI_DEFAULT_TYPE 0x00 +#define RWL_WIFI_DEFAULT_SUBTYPE 0x00 +#define RWL_ACTION_FRAME_DATA_SIZE 1024 /* fixed size for the wifi frame data */ +#define RWL_WIFI_CDC_HEADER_OFFSET 0 +#define RWL_WIFI_FRAG_DATA_SIZE 960 /* max size of the frag data */ +#define RWL_DEFAULT_WIFI_FRAG_COUNT 127 /* maximum fragment count */ +#define RWL_WIFI_RETRY 5 /* CMD retry count for wifi */ +#define RWL_WIFI_RX_RETRY 20 /* WIFI response rerty count */ +#define RWL_WIFI_SEND 5 /* WIFI frame sent count */ +#define RWL_WIFI_RETRY_DELAY 1000 /* wifi specific retry delay */ +#define RWL_WIFI_SEND_DELAY 100 /* delay between two frames */ +#define RWL_WIFI_RX_DELAY 250 /* wait between send and receive */ +#define RWL_WIFI_RX_SHELL_DELAY 1000 /* delay added for shell cmd response read */ +#define RWL_CHANNEL_RX_SCAN_DELAY 10 /* Delay between findserver rx calls */ +#define RWL_CHANNEL_SCAN_WAIT 250 /* Sleep time in between the channel scans */ +#define RWL_WIFI_BUF_LEN 64 +#define RWL_WIFI_SHELL_CMD 1 +#define RWL_WIFI_WL_CMD 0 +#define RWL_WIFI_FIND_SER_CMD "findserver" +#define RWL_WIFI_ACTION_CMD "wifiaction" +#define RWL_WIFI_GET_ACTION_CMD "rwlwifivsaction" +#define RWL_DONGLE_SET_CMD "dongleset" +#define DATA_FRAME_LEN 960 +/* wl & shell cmd work fine for 960 (512+256+128+64) */ + + +/* + * Information about the action frame data fields in the + * dot11_action_wifi_vendor_specific + * cdc struct (1 to 16. This does not include status flag. Since this + * is not directly visible to the driver code we cant use sizeof struct + * cdc_ioctl_t. Hence Ref MAC address offset starts from byte 17. + * REF MAC ADDR (6 bytes (MAC Address len) from byte 17 to 22) + * DUT MAC ADDR (6 bytes after the REF MAC Address byte 23 to 28) + * unused (byte 29 to 49) + * REF/Client Channel offset (50) + * DUT/Server channel offset (51) + * --------------------------------------------------------------------------------------- + * cdc struct|REF MAC ADDR|DUT_MAC_ADDR|un used|REF Channel|DUT channel|Action frame Data| + * 1---------17-----------23-------------------50----------51----------52----------------1040 + * REF MAC addr after CDC struct without status flag (status flag not used by wifi) + */ +#define RWL_ACTION_WIFI_CATEGORY 127 /* Vendor Specific category value for wifi */ +#define RWL_REF_MAC_ADDRESS_OFFSET 17 +#define RWL_DUT_MAC_ADDRESS_OFFSET 23 +#define RWL_WIFI_CLIENT_CHANNEL_OFFSET 50 +#define RWL_WIFI_SERVER_CHANNEL_OFFSET 51 + +#define SUCCESS 1 +#define FAIL -1 +#define NO_PACKET -2 +#define SERIAL_PORT_ERR -3 + +#define DEFAULT_SERVER_PORT 8000 + +#define WL_MAX_BUF_LEN (127 * 1024) +#define MAX_VISTA_ARGC 10 +#define HOST_TO_NETWORK TRUE +#define NETWORK_TO_HOST FALSE + +#ifndef IFNAMSIZ +#define IFNAMSIZ 16 +#endif + +#if defined (WIN32) || defined (LINUX) +/* We don't want the server to allocate bigger buffers for some of the commands + * like scanresults. Server can still allocate 8K memory and send the response + * in fragments. This is used in case of Get commands only. + */ +#define SERVER_RESPONSE_MAX_BUF_LEN 8192 +#endif +/* Used to set the cmds for wifi specific init */ +typedef struct remote_wifi_cmds { + uint32 cmd; /* common ioctl definition */ + char *data; /* max size of the data length */ + int value; +} remote_wifi_cmds_t; + +/* Added for debug utility support */ +#define ERR stderr +#define OUTPUT stdout + +#define DEBUG_DEFAULT 0x0001 +#define DEBUG_ERR 0x0001 +#define DEBUG_INFO 0x0002 +#define DEBUG_DBG 0x0004 + +/* #ifdef TARGETOS_symbian */ +#if 0 +/* There is some side-defect when SymbianPrintf is used + * Error in Com Port Recv + */ +extern void SymbianPrintf(void *fd, char *format, ...); +#define DPRINT_ERR if (defined_debug & DEBUG_ERR) \ + SymbianPrintf +#define DPRINT_INFO if (defined_debug & DEBUG_INFO) \ + SymbianPrintf +#define DPRINT_DBG if (defined_debug & DEBUG_DBG) \ + SymbianPrintf +#else +#define DPRINT_ERR if (defined_debug & DEBUG_ERR) \ + fprintf +#define DPRINT_INFO if (defined_debug & DEBUG_INFO) \ + fprintf +#define DPRINT_DBG if (defined_debug & DEBUG_DBG) \ + fprintf +#endif /* TARGETOS_symbian */ +extern unsigned short defined_debug; +#ifdef WIN32 +#if 0 +#define IPV4_ADDR_LEN 4 +/* IPV4 packet formats */ +struct ipv4_addr { + uint8 addr[IPV4_ADDR_LEN]; +} PACKED; +#endif +/* Function defined in wlu.c for client and wlu_server_ce.c for server */ +extern int wl_atoip(const char *a, struct ipv4_addr *n); +#endif /* WIN32 */ +/* Function defined to do host to network and network to host conversions */ +void rwl_swap_header(rem_ioctl_t *rem_ptr, bool host_to_network); + +/* Macros to access remote type */ +extern int remote_type; +#define rwl_get_remote_type() (remote_type) +#define rwl_set_remote_type(type) (remote_type = type) + +/* Macros to access server IP and port globals */ +extern char *g_rwl_servIP; +#define rwl_get_server_ip() (g_rwl_servIP) +#define rwl_set_server_ip(ip) (g_rwl_servIP = ip) +extern unsigned short g_rwl_servport; +#define rwl_get_server_port() (g_rwl_servport) +#define rwl_set_server_port(port) (g_rwl_servport = port) + +/* Wrapper functions defined in wlu_pipe_xxx.c where xxx is OS specific */ +extern int rwl_read_serial_port(void* hndle, char* read_buf, uint data_size, uint *numread); +extern int rwl_write_serial_port(void* hndle, char* write_buf, unsigned long size, +unsigned long *numwritten); +extern void rwl_sleep(int delay); +extern void* rwl_open_transport(int remote_type, char *port, int ReadTotalTimeout, int debug); +extern int rwl_close_transport(int remote_type, void * handle); +extern int rwl_poll_serial_buffer(void *hndle); +extern int rwl_serial_handle_timeout(void); +extern void rwl_sync_delay(uint noframes); + +#ifdef RWL_SOCKET +extern int rwl_connectsocket(int SocketDes, struct sockaddr* SerAddr, int SizeOfAddr); +extern int rwl_acceptconnection(int SocketDes, struct sockaddr *ClientAddr, int *SizeOfAddr); +extern int rwl_send_to_streamsocket(int SocketDes, const char* SendBuff, int data_size, int Flag); +extern int rwl_receive_from_streamsocket(int SocketDes, char* RecvBuff, int data_size, int Flag); +extern int rwl_init_server_socket_setup(int argc, char** argv, uint remote_type); +#ifdef vxworks +extern int rwl_GetifAddr(char *ifname, char *ifaddr); +#else +extern int rwl_GetifAddr(char *ifname, struct sockaddr_in* sa); +#endif /* vxworks */ +#endif /* RWL_SOCKET */ + +#if defined(vxworks) || defined(LINUX) +extern int set_interface(void *wl, char *intf_name); +#endif /* defined(vxworks) || defined(LINUX) */ + +/* Win32 specific function wlu_pipe_win32.c */ +extern int rwl_init_ws2_32dll(void); +extern int rwl_terminate_ws2_32dll(void); + +/* Function definitions for wlu_client_shared.c and wlu_server_shared.c */ +extern int rwl_var_getbuf(void *wl, const char *iovar, void *param, int param_len, void **bufptr); +extern int rwl_var_setbuf(void *wl, const char *iovar, void *param, int param_len); +extern int rwl_var_send_vs_actionframe(void* wl, const char* iovar, void* param, int param_len); + +/* Function definitions for wlu_ndis.c/wlu_linux.c and wlu_server_ce.c/wlu_server_linux.c */ +extern int wl_get(void *wl, int cmd, void *buf, int len); +extern int wl_set(void *wl, int cmd, void *buf, int len); +#ifdef RWLASD +typedef unsigned char BYTE; +extern void wfa_dut_init(BYTE **tBuf, BYTE **rBuf, BYTE **paBuf, BYTE **cBuf, struct timeval **); +extern int remote_asd_exec(unsigned char* command, int* cmd_len); +void wfa_dut_deinit(void); +#endif +extern int get_ctrlc_header(void *wl); +extern int remote_tx_response(void *wl, void *buf_ptr, int cmd); +extern rem_ioctl_t *g_rem_ptr; +extern int g_rwl_hndle; +#if defined (LINUX) || defined (MACOSX) +/* Variable to indiate if the server child has completed execution */ +extern volatile sig_atomic_t g_sig_chld; +#endif + +/* + * Separate paths are defined for android and linux machines + * / filesystem on android is read only memory + */ +#ifndef WIN32 +#ifdef TARGETENV_android +#define SH_PATH "/data/busybox/sh" +#define SHELL_RESP_PATH "/data/local/RWL/" /* Default path for storing files for shell response */ +#define TEMPLATE "/data/local/RWL/SyncXXXXXX" +#else +#define SHELL_RESP_PATH "/tmp/RWL/" /* Default path for storing files for shell response */ +#define TEMPLATE "/tmp/RWL/SyncXXXXXX" +#define SH_PATH "/bin/sh" +#endif +#endif /* !WIN32 */ +#endif /* _wlu_remote_h */ diff --git a/external/cache/sources/wl/wl/Android.mk b/external/cache/sources/wl/wl/Android.mk new file mode 100644 index 0000000..b40c02c --- /dev/null +++ b/external/cache/sources/wl/wl/Android.mk @@ -0,0 +1,28 @@ +LOCAL_PATH:= $(call my-dir) + +OBJS_c := wlu.c \ + wlu_common.c \ + wlu_linux.c \ + wlu_cmd.c \ + wlu_iov.c \ + wlu_pipe.c \ + wlu_pipe_linux.c \ + wlu_client_shared.c \ + wlc_ppr.c \ + wlu_rates_matrix.c + +INCLUDES := $(LOCAL_PATH)/../include +INCLUDES += $(LOCAL_PATH)/../shared +L_CFLAGS := -DBCMWPA2 -DWLCNT -DWLBTAMP -Wextra -DWLPFN -DWLPFN_AUTO_CONNECT -DLINUX -DRWLASD -DRWL_SOCKET -DRWL_DONGLE -DRWL_WIFI +L_CFLAGS += -DSDTEST -DTARGETENV_android -Dlinux -DLINUX -DD11AC_IOTYPES + +include $(CLEAR_VARS) +LOCAL_MODULE := wl +LOCAL_MODULE_TAGS := debug tests +LOCAL_MODULE_PATH := $(TARGET_OUT_OPTIONAL_EXECUTABLES) +LOCAL_SHARED_LIBRARIES := libcutils +LOCAL_STATIC_LIBRARIES := libshared +LOCAL_CFLAGS = $(L_CFLAGS) +LOCAL_SRC_FILES := $(OBJS_c) +LOCAL_C_INCLUDES := $(INCLUDES) +include $(BUILD_EXECUTABLE) diff --git a/external/cache/sources/wl/wl/Makefile b/external/cache/sources/wl/wl/Makefile new file mode 100644 index 0000000..404ceca --- /dev/null +++ b/external/cache/sources/wl/wl/Makefile @@ -0,0 +1,52 @@ +CC = $(CROSS_COMPILE)gcc + +#IFLAGS := -I../include -I../shared -g -Wall -static +IFLAGS := -I../include -I../shared -g -Wall +DFLAGS := -DBCMWPA2 -DWLCNT -DWLBTAMP -Wextra -DWLPFN -DWLPFN_AUTO_CONNECT -DLINUX -DRWLASD -DRWL_SOCKET -DRWL_DONGLE -DRWL_WIFI +#IFLAGS += -DIL_BIGENDIAN +IFLAGS += -DSDTEST -DTARGETENV_android -Dlinux -DLINUX -DD11AC_IOTYPES +#IFLAGS += -DSDTEST -Dlinux -DLINUX -DD11AC_IOTYPES + +obj-wl = wlu.o \ + wlu_common.o \ + wlu_linux.o \ + wlu_cmd.o \ + wlu_iov.o \ + wlu_pipe.o \ + wlu_pipe_linux.o \ + wlu_client_shared.o \ + wlc_ppr.o \ + wlu_rates_matrix.o + +WL = wl +ALL = all +LIBLINK := ../shared/libshared.a +LIBWL = libwl.a + +CFLAGS += $(IFLAGS) $(DFLAGS) +ifeq ($(LIB),y) +CFLAGS += -DLIB +endif + +all: $(ALL) + +$(ALL): + make clean + make $(WL) + mv wl wl.back + make clean + make $(LIBWL) LIB=y + mv wl.back wl + +$(WL): $(obj-wl) + $(CC) -o $@ $(obj-wl) $(LIBLINK) + +$(LIBWL): $(obj-wl) + ar rscv $(LIBWL) $(obj-wl) $(LIBLINK) +# $(CC) $(obj-wl) -shared -o $(LIBWL) $(LIBLINK) + +# for sequance +# $(CC) -Wl,-elf2flt -o $@ $(obj-wl) + +clean: + -rm -f $(WL) *.o *.so *.a diff --git a/external/cache/sources/wl/wl/shellproc_linux.c b/external/cache/sources/wl/wl/shellproc_linux.c new file mode 100644 index 0000000..2e26324 --- /dev/null +++ b/external/cache/sources/wl/wl/shellproc_linux.c @@ -0,0 +1,708 @@ +/* + * Remote shell command execution (common for all transports) for linux + * + * Copyright (C) 2013, Broadcom Corporation + * All Rights Reserved. + * + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation; + * the contents of this file may not be disclosed to third parties, copied + * or duplicated in any form, in whole or in part, without the prior + * written permission of Broadcom Corporation. + * + * $Id: shellproc_linux.c 281542 2011-09-02 17:31:19Z $ + */ + +/* Linux remote shell command execution + * + */ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include "wlu_remote.h" +#include +#include +#include +#include +#define ASYNC_RESP 0 +#define MAX_SHELL_ASYNC_RESP 128 /* Support for maximum 5 async process */ +#define MAX_ASYNC_FILE_LENGTH 50 +#define MAX_PID_CMD_LENGTH 20 +#define MAX_PID_RESP_LENTH 50 +#define MAX_SHELL_CMD_LENTH 256 +#define PID_TOKEN_SIZE 50 +#define PID_SEARCH_CMD_SIZE 100 +#define ASYNC_SHELL_CHAR "%" /* Async process identifier from the client */ +#define FILE_PERMISSION 777 + +#define DEFAULT_SHELL_TIMEOUT 0 /* Default TimeOut Value for synchronous shell commands */ +#define SHELL_RETURNVALUE_SIZE 2 /* Size of Return Value of the shell command */ +#define SHELL_ASYNCCMD_ID 1 /* To identify if it is an async command */ +#define REBOOT_MSG "Rebooting AP ...\n" + +/* Function prototypes */ + +static int rwl_get_file_size(char *file_name); +static int remote_shell_async_exec(char *buf_ptr); +static int remote_shell_sync_exec(char *cmd_buf_ptr, void *wl); + + +/* Data structure to hold async shell information */ +typedef struct remote_shell_async { + pid_t PID; + char file_name[MAX_ASYNC_FILE_LENGTH]; +} remote_shell_async_t; + +remote_shell_async_t g_async_resp[MAX_SHELL_ASYNC_RESP]; + +extern int g_shellsync_pid; + +extern unsigned char g_return_stat; +extern void rwl_chld_handler(int num); +extern int set_ctrlc; +extern void handle_ctrlc(int unused); + +/* Global variable to store the timeout value for the shell commands */ +static int g_shellsync_timeout = DEFAULT_SHELL_TIMEOUT; +char globalbuffer[MAX_SHELL_CMD_LENTH]; + +/* Wait for process termination. + * This function returns immediately if the child has + * already exited (zombie process) + */ +static void +sigchld_handler(int s) +{ + UNUSED_PARAMETER(s); + + while (waitpid(-1, NULL, WNOHANG) > 0); +} + +/* Create a main directory \tmp\RWL\ for the shell response files */ +int +rwl_create_dir(void) +{ + if (mkdir(SHELL_RESP_PATH, FILE_PERMISSION) < 0) { + if (errno != EEXIST) + return BCME_ERROR; + } + + return SUCCESS; +} + +/* Main function for shell command execution */ +int +remote_shell_execute(char* buf_ptr, void *wl) +{ + char *async_cmd_flag; + int msg_len; + + /* Check for the "%" token in the buffer from client + * If "%" token is present, execute asynchronous process + * else, execute synchronous shell process + */ + async_cmd_flag = strstr((char*)buf_ptr, ASYNC_SHELL_CHAR); + + if ((async_cmd_flag != NULL) && (!strcmp(async_cmd_flag, ASYNC_SHELL_CHAR))) { + g_shellsync_pid = SHELL_ASYNCCMD_ID; + msg_len = remote_shell_async_exec(buf_ptr); + } + else { + msg_len = remote_shell_sync_exec(buf_ptr, wl); + strcpy(buf_ptr, globalbuffer); + } + return msg_len; +} + +/* Function to get the shell response from the file */ +int +remote_shell_async_get_resp(char* shell_fname, char* buf_ptr, int msg_len) +{ + int sts = 0; + FILE *shell_fpt; + + shell_fpt = fopen(shell_fname, "rb"); + + if (shell_fpt == NULL) { + DPRINT_ERR(ERR, "\nShell Cmd:File open error\n"); + return sts; + } + + /* If there is any response from the shell, Read the file and + * update the buffer for the shell response + * else Just send the return value of the command executed + */ + if (g_shellsync_pid != SHELL_ASYNCCMD_ID) { + if (msg_len) + sts = fread(buf_ptr, sizeof(char), msg_len, shell_fpt); + fscanf(shell_fpt, "%2x", &sts); + } + else + sts = fread(buf_ptr, sizeof(char), MAX_SHELL_CMD_LENTH, shell_fpt); + + fclose(shell_fpt); + + remove(shell_fname); + + DPRINT_DBG(OUTPUT, "\n Resp buff from shell cmdis %s\n", buf_ptr); + + return sts; +} + +/* + * Function to get the shell response length + * by opening the file containing the shell response + * and get the total file size. + * For a given input file name it returns File size. + */ +static int +rwl_get_file_size(char *file_name) +{ + FILE *shell_fpt; + int filesize = 0; + + shell_fpt = fopen(file_name, "rb"); + + if (shell_fpt == NULL) { + DPRINT_DBG(OUTPUT, "\nShell Cmd:File open error\n"); + return filesize; + } + + /* obtain file size */ + if (fseek(shell_fpt, 0, SEEK_END) < 0) + return filesize; + + filesize = ftell(shell_fpt); + fclose(shell_fpt); + + return filesize; +} + +/* + * Function for executing asynchronous shell comamnd + * Stores the results in async temp file and returns the PID + */ +static int +remote_shell_async_exec(char *buf_ptr) +{ + int PID_val, val, msg_len, sts; + FILE *fpt; + int async_count = 0; /* counter needs to be initialized */ + struct sigaction sa; + char pid_search_cmd[MAX_PID_CMD_LENGTH]; + char pid_resp_buf[MAX_PID_RESP_LENTH]; + char temp_async_file_name[MAX_ASYNC_FILE_LENGTH]; + pid_t pid; + char *pid_token, next_pid[PID_TOKEN_SIZE][PID_TOKEN_SIZE]; + struct utsname name; + + /* Call the signal handler for reaping defunct or zombie process */ + sa.sa_handler = sigchld_handler; + sigemptyset(&sa.sa_mask); + sa.sa_flags = SA_RESTART; + if (sigaction(SIGCHLD, &sa, NULL) == -1) { + perror("sigaction:"); + } + + /* Store the async file name if that async process is not killed. + * Async file name: async_temp_0...5 + */ + for (val = 0; val < MAX_SHELL_ASYNC_RESP; val++) { + if (g_async_resp[val].PID > 0) { + async_count++; + } else { + sprintf(g_async_resp[val].file_name, "%s%d", "async_temp_", val); + break; + } + } + sprintf(temp_async_file_name, "%s%s", SHELL_RESP_PATH, + g_async_resp[val].file_name); + + DPRINT_DBG(OUTPUT, "\nasync_count:%d\n", async_count); + if (async_count >= MAX_SHELL_ASYNC_RESP) { + sprintf(buf_ptr, "\n%s\n", "Exceeded max async process forking"); + return BCME_ERROR; + } + + /* Open a child process. The fork will return the PID of the child process + * (i.e) defunct process PID in parent's thread of execution. Zero is returned + * for child's thread of execution. + */ + if ((pid = fork()) == 0) { + /* Redirect the async process output to the async file + * Then after the client executes the kill command for that + * async process, the file will give the status of async process + */ + strtok(buf_ptr, ASYNC_SHELL_CHAR); /* Remove % character from the command buf */ + uname(&name); + /* + * Checking for mips architecture + * different command for mips and x86 + */ + if (strncmp(name.machine, "mips", sizeof(name.machine)) != 0) { + strcat(buf_ptr, "&> "); /* buf_ptr is now "ping 127.0.0.1&> " */ + strcat(buf_ptr, temp_async_file_name); /* Add path \tmp\RWL\async_temp_* */ + } + else { + strcat(buf_ptr, " > "); /* buf_ptr is now "ping 127.0.0.1> " */ + strcat(buf_ptr, temp_async_file_name); /* Add path \tmp\RWL\async_temp_* */ + strcat(buf_ptr, " 2>&1 &"); + } + if ((sts = execl(SH_PATH, "sh", "-c", buf_ptr, NULL)) == -1) { + sprintf(buf_ptr, "%s\n", "Not able to execute shell cmd"); + return BCME_ERROR; + } + exit(0); + } /* end of fork */ + + if (pid < 0) { + perror("\nFork error:"); + sprintf(buf_ptr, "%s\n", "Forking async process failed"); + return BCME_ERROR; + } + + /* Find the PID of the running process (for ex: ping) + * pidof -s options returns latest PID of the command. + */ + strtok(buf_ptr, " "); + + uname(&name); + /* Checking for mips architecture */ + if (strncmp(name.machine, "mips", sizeof(name.machine)) != 0) + sprintf(pid_search_cmd, "pidof -s %s", buf_ptr); + else + sprintf(pid_search_cmd, "pidof %s", buf_ptr); + + sleep(1); + + /* Execute the command e.g "pidof ping" */ + if ((fpt = popen(pid_search_cmd, "r")) == NULL) { + sprintf(buf_ptr, "%s\n", "Can't return PID"); + return BCME_ERROR; + } + + /* Get the PID and copy the PID in buf_ptr to send to the client */ + fgets(pid_resp_buf, sizeof(pid_resp_buf), fpt); + + /* Checking for mips architecture */ + if (strncmp(name.machine, "mips", sizeof(name.machine)) != 0) { + PID_val = atoi(pid_resp_buf); + } + else { + /* code to extract the correct PID */ + pid_token = strtok_r(pid_resp_buf, " ", (char **)next_pid); + if (pid_token != NULL) { + while (pid_token != NULL) { + /* the pid buffer will terminate with a '\n' + * It will affect the string tokenizing logic + * To avoid this we're using the if case + */ + if (strncmp(pid_token, "\n", sizeof(pid_token)) == 0) + break; + PID_val = atoi(pid_token); + pid_token = strtok_r(NULL, " ", (char **)next_pid); + } + } + else + PID_val = atoi(pid_token); + } + if (PID_val == 0) { + msg_len = rwl_get_file_size(temp_async_file_name); + remote_shell_async_get_resp(temp_async_file_name, buf_ptr, msg_len); + + } else { + g_async_resp[val].PID = PID_val; + /* Update PID value in buffer to send it to client */ + sprintf(buf_ptr, "%d", PID_val); + msg_len = strlen(buf_ptr); + } + + pclose(fpt); + /* In async case, the PID value will be copied to the input buffer only + * and there is no need of getting the response from the file. So return + * value can be -1. + */ + return msg_len; +} + +/* Process for 'kill' command. + * Kill command can also be used from the client to get the + * result of asynchronous command and actually kill the mentioned process + */ +static int +remote_kill_cmd_exec(char *cmd_buf_ptr) +{ + char file_name[MAX_ASYNC_FILE_LENGTH]; + int PID_val, val, msg_len; + FILE *fpt; + char *pid_token, next_pid[PID_TOKEN_SIZE][PID_TOKEN_SIZE]; + + system(cmd_buf_ptr); + + /* Parse the PID val from the kill command. + */ + pid_token = strtok_r(cmd_buf_ptr, " ", (char **)next_pid); + while (pid_token != NULL) { + /* to extract the PID from the kill command */ + if (strncmp(pid_token, "\n", sizeof(pid_token)) == 0) + break; + PID_val = atoi(pid_token); + pid_token = strtok_r(NULL, " ", (char **)next_pid); + } + + /* Check for the matching PID from the async structure and + * give the last 256 bytes statistics of the async process + * that was running + */ + for (val = 0; val < MAX_SHELL_ASYNC_RESP; ++val) { + if (g_async_resp[val].PID == PID_val) { + /* We found a match here. Hence get the response now from the + * corresponding async response file + */ + sprintf(file_name, "%s%s", SHELL_RESP_PATH, g_async_resp[val].file_name); + msg_len = rwl_get_file_size(file_name); + if (msg_len > 0) { + if ((fpt = fopen(file_name, "rb")) == NULL) { + DPRINT_DBG(OUTPUT, "\nShell Cmd:File open error\n"); + return BCME_ERROR; + } + + if (fseek(fpt, 0, SEEK_SET) < 0) { + fclose(fpt); + return BCME_ERROR; + } + + if (fread(cmd_buf_ptr, sizeof(char), MAX_SHELL_CMD_LENTH, + fpt) <= 0) { + sprintf(cmd_buf_ptr, "%s\n", "Shell Resp:Reading error"); + fclose(fpt); + return BCME_ERROR; + } + + fclose(fpt); + } + else + sprintf(cmd_buf_ptr, "ed %d: No Response\n", PID_val); + remove(g_async_resp[val].file_name); + + g_async_resp[val].PID = 0; + break; + } + } + return MAX_SHELL_CMD_LENTH; +} + +/* Handle --timeout command line option for linux servers */ +int +shell_timeout_cmd(char *cmd_buf_ptr, char *sync_file_name) +{ + char *token1, *token2, *nexttoken; + FILE* fp; + int msg_len; + + token1 = strtok_r(cmd_buf_ptr, "--timeout ", &nexttoken); + if (token1) + token2 = strtok_r(NULL, token1, &nexttoken); + if (token1 == NULL || atoi(token1) <= 0 || token2 == NULL) { + fp = fopen(sync_file_name, "w+"); + fprintf(fp, "Usage: ./wl -- sh" + "--timeout \n"); + fprintf(fp, "Eg: ./wl --socket 172.22.65.226 sh --timeout 15 ls\n"); + fflush(fp); + msg_len = rwl_get_file_size(sync_file_name); + strcpy(cmd_buf_ptr, sync_file_name); + fclose(fp); + strcpy(globalbuffer, sync_file_name); + printf("Fix timeout problem in socket!!!!!\n"); + return msg_len; + } + else + g_shellsync_timeout = atoi(token1); + return BCME_OK; +} + +/* Handle synchronous shell commands here */ +static int +remote_shell_sync_exec(char *cmd_buf_ptr, void *wl) +{ + char *kill_cmd_token; + char sync_file_name[] = TEMPLATE; + int fd, msg_len; + char cmd[(strlen(cmd_buf_ptr) + 1)]; + int pid, status, pid_final; + char buf[SHELL_RESP_SIZE], cmd_find_lastpid[PID_SEARCH_CMD_SIZE]; + int nbytes = 0; + int child_status; + static int sent_once = 0; + struct utsname name; + FILE *fpt; + + /* Default Size of Return Value of the shell command is 2bytes */ + + kill_cmd_token = strstr(cmd_buf_ptr, "kill"); + + /* Synchronous Kill command processing is handled separately */ + if (kill_cmd_token != NULL) { + msg_len = remote_kill_cmd_exec(cmd_buf_ptr); + remote_tx_response(wl, cmd_buf_ptr, msg_len); + return 0; + } + + + /* Process synchronous command other than kill command */ + if ((fd = mkstemp(sync_file_name)) < 0) { + perror("mkstemp failed"); + DPRINT_ERR(ERR, "\n errno:%d\n", errno); + sprintf(cmd_buf_ptr, "%s\n", "mkstemp failed"); + return BCME_ERROR; + } + + close(fd); + + strcpy(cmd, cmd_buf_ptr); + /* Synchronous timeout command processing is handled separately */ + if (strstr(cmd_buf_ptr, "--timeout") != NULL) { + if ((msg_len = shell_timeout_cmd (cmd, sync_file_name) > 0)) { + /* Signal end of command output */ + g_rem_ptr->msg.len = 0; + g_rem_ptr->msg.cmd = g_return_stat; + remote_tx_response(wl, NULL, 0); + return msg_len; + } else { + /* Parse out --timeout since command is successful + * point buffer to the shell command + */ + strcpy(cmd, cmd_buf_ptr); + strtok_r(cmd, " ", &cmd_buf_ptr); + strcpy(cmd, cmd_buf_ptr); + strtok_r(cmd, " ", &cmd_buf_ptr); + } + } + + /* Schedule an ALARM in case of timeout value of SHELL_TIMEOUT seconds */ + /* Defalut time out only in case of Non socket transport */ + alarm(g_shellsync_timeout); + /* registering the relevant signals to handle end of child process, + * the ctrl+c event on the server side and the kill command on the + * server process + */ + signal(SIGCHLD, rwl_chld_handler); + signal(SIGINT, handle_ctrlc); + signal(SIGTERM, handle_ctrlc); + + /* Set g_sig_chld before forking */ + g_sig_chld = 1; + + if (strcmp("reboot", cmd_buf_ptr) == 0) { /* reboot command */ + memset(buf, 0, sizeof(buf)); + strncpy(buf, REBOOT_MSG, sizeof(REBOOT_MSG)); + remote_tx_response(wl, buf, 0); + + /* Signal end of command output */ + g_rem_ptr->msg.len = 0; + g_rem_ptr->msg.cmd = 0; + remote_tx_response(wl, NULL, 0); + sleep(1); + + /* Clean up the temp file */ + remove(sync_file_name); + } + + if ((pid = fork()) == 0) { + close(STDOUT_FILENO); + fd = open(sync_file_name, O_WRONLY|O_SYNC); + /* Redirect stdin to dev/null. This handles un usual commands like + * sh cat from the client side + */ + close(STDIN_FILENO); + open("/dev/null", O_RDONLY); + close(STDERR_FILENO); + fcntl(fd, F_DUPFD, STDERR_FILENO); + if ((status = execl(SH_PATH, "sh", "-c", cmd_buf_ptr, NULL)) == -1) { + perror("Exec error"); + + } + } /* end of fork */ + + g_shellsync_pid = pid; + /* The g_return_stat is being set for short commands */ + waitpid(g_shellsync_pid, &child_status, WNOHANG); + if (WIFEXITED(child_status)) + g_return_stat = WEXITSTATUS(child_status); + else + g_return_stat = 1; + + /* Read file in the interim from a temp file and send back the results */ + fd = open(sync_file_name, O_RDONLY|O_SYNC); + + while (1) { + /* read file in the interim and send back the results */ + nbytes = read(fd, buf, SHELL_RESP_SIZE); + g_rem_ptr->msg.len = nbytes; + if (nbytes > 0) { + remote_tx_response(wl, buf, 0); +#ifdef RWL_SERIAL + /* usleep introduced for flooding of data over serial port */ + usleep(1); +#endif + } + if (get_ctrlc_header(wl) >= 0) { + if (g_rem_ptr->msg.flags == (unsigned)CTRLC_FLAG) { + uname(&name); + /* Checking for mips architecture + * The mips machine responds differently to + * execl command. so the pid is incremented + * to kill the right command. + */ + if (strncmp(name.machine, "mips", sizeof(name.machine)) == 0) + pid++; + if (strncmp(name.machine, "armv5tel", sizeof(name.machine)) == 0) { + snprintf(cmd_find_lastpid, sizeof(cmd_find_lastpid), + "ps | awk \'PRINT $1\' | tail -n 1"); + if ((fpt = popen(cmd_find_lastpid, "r")) == NULL) { + sprintf(buf, "%s\n", "Can't return PID"); + return BCME_ERROR; + } + fgets(cmd_find_lastpid, sizeof(cmd_find_lastpid), fpt); + pid_final = atoi(cmd_find_lastpid); + while (pid <= pid_final) { + kill(pid, SIGKILL); + pid++; + } + pclose(fpt); + } + else { + kill(pid, SIGKILL); + } + break; + } + } + if (get_ctrlc_header(wl) >= 0) { + if (g_rem_ptr->msg.flags == (unsigned)CTRLC_FLAG) { + uname(&name); + /* Checking for mips architecture + * The mips machine responds differently to + * execl command. so the pid is incremented + * to kill the right command. + */ + if (strncmp(name.machine, "mips", sizeof(name.machine)) == 0) { + pid++; + kill(pid, SIGKILL); + } + /* Checking for arm architecture + * The multiple commands would not work + * for ctrl+C. So we kill the processes + * spawned after the parent. This method has + * its own limitations but the busybox in pxa + * doesnot have many options to implement it better + */ + else { + if (strncmp(name.machine, "armv5tel", + sizeof(name.machine)) == 0) { + /* The command below is used to get the + * PIDs and they are killed + */ + snprintf(cmd_find_lastpid, + sizeof(cmd_find_lastpid), + "ps | awk \'PRINT $1\' | tail -n 1"); + if ((fpt = popen(cmd_find_lastpid, "r")) == NULL) { + sprintf(buf, "%s\n", "Can't return PID"); + return BCME_ERROR; + } + fgets(cmd_find_lastpid, sizeof(cmd_find_lastpid), + fpt); + pid_final = atoi(cmd_find_lastpid); + while (pid <= pid_final) { + kill(pid, SIGKILL); + pid++; + } + pclose(fpt); + } + /* In the case of x86, on receiving ctrl+C + * the child PIDs are obtained by searching + * the parent PID to obtain the PIDs of the + * and kill them + */ + else { + while (pid != 0) { + /* The commad below is used to get the + * child PIDs by using their parent PID + */ + snprintf(cmd_find_lastpid, + sizeof(cmd_find_lastpid), + "ps al | awk \"{ if (\\$4 == %d)" + " {print \\$3}}\"| head -n 1", + g_shellsync_pid); + if ((fpt = popen(cmd_find_lastpid, "r")) + == NULL) { + sprintf(buf, "%s\n", + "Can't return PID"); + return BCME_ERROR; + } + fgets(cmd_find_lastpid, + sizeof(cmd_find_lastpid), + fpt); + pid = atoi(cmd_find_lastpid); + if (pid == 0) + kill(g_shellsync_pid, SIGKILL); + else + kill(pid, SIGKILL); + pclose(fpt); + } + } + } + break; + } + } + if (set_ctrlc == 1) { + g_rem_ptr->msg.len = 0; + g_rem_ptr->msg.cmd = g_return_stat; + remote_tx_response(wl, NULL, g_return_stat); + unlink(sync_file_name); + kill(0, SIGKILL); + } + /* It is possible that the child would have exited + * However we did not get a chance to read the file + * In this case go once again and check the file + */ + if (!sent_once && !g_sig_chld) { + sent_once = 1; + continue; + } + + if (!(g_sig_chld || nbytes)) + break; + } + wait(NULL); + close(fd); + + /* Signal end of command output */ + g_rem_ptr->msg.len = 0; + g_rem_ptr->msg.cmd = g_return_stat; + + remote_tx_response(wl, NULL, g_return_stat); + /* Cancel the time out alarm if any */ + alarm(0); + sent_once = 0; + /* Clean up the temp file */ + unlink(sync_file_name); + g_shellsync_timeout = DEFAULT_SHELL_TIMEOUT; + signal(SIGINT, SIG_DFL); + signal(SIGTERM, SIG_DFL); + + return BCME_OK; +} diff --git a/external/cache/sources/wl/wl/wl.tgz b/external/cache/sources/wl/wl/wl.tgz new file mode 100644 index 0000000..ec2430e Binary files /dev/null and b/external/cache/sources/wl/wl/wl.tgz differ diff --git a/external/cache/sources/wl/wl/wlc_ppr.c b/external/cache/sources/wl/wl/wlc_ppr.c new file mode 100644 index 0000000..7d77ad6 --- /dev/null +++ b/external/cache/sources/wl/wl/wlc_ppr.c @@ -0,0 +1,2288 @@ +/* + * PHY module Power-per-rate API. Provides interface functions and definitions for + * ppr structure for use containing regulatory and board limits and tx power targets. + * + * $ Copyright Broadcom Corporation $ + * + * $Id: $ + */ + +#if defined(__NetBSD__) || defined(__FreeBSD__) +#if defined(_KERNEL) +/* XXX: Define wlc_cfg.h to be the first header file included as some builds + * get their feature flags thru this file. + */ +#include +#endif /* defined(_KERNEL) */ +#endif /* defined(__NetBSD__) || defined(__FreeBSD__) */ + +#include +#include +#include +#include + +#ifndef BCMDRIVER + +#ifndef WL_BEAMFORMING +#define WL_BEAMFORMING /* enable TxBF definitions for utility code */ +#endif + +#ifndef bcopy +#include +#include +#define bcopy(src, dst, len) memcpy((dst), (src), (len)) +#endif + +#ifndef ASSERT +#define ASSERT(exp) do {} while (0) +#endif +#endif /* BCMDRIVER */ + +/* ppr local TXBF_ENAB() macro because wlc->pub struct is not accessible */ +#ifdef WL_BEAMFORMING +#if defined(WLTXBF_DISABLED) +#define PPR_TXBF_ENAB() (0) +#else +#define PPR_TXBF_ENAB() (1) +#endif +#else +#define PPR_TXBF_ENAB() (0) +#endif /* WL_BEAMFORMING */ + +/* This marks the start of a packed structure section. */ +#include + +#define PPR_SERIALIZATION_VER 1 + +/* ppr deserialization header */ +typedef BWL_PRE_PACKED_STRUCT struct ppr_deser_header { + uint8 version; + uint8 bw; + uint16 per_band_size; + uint32 flags; +} BWL_POST_PACKED_STRUCT ppr_deser_header_t; + + +typedef BWL_PRE_PACKED_STRUCT struct ppr_ser_mem_flag { + uint32 magic_word; + uint32 flag; +} BWL_POST_PACKED_STRUCT ppr_ser_mem_flag_t; + + +#define WLC_TXPWR_DB_FACTOR 4 /* conversion for phy txpwr cacluations that use .25 dB units */ + + +/* QDB() macro takes a dB value and converts to a quarter dB value */ +#ifdef QDB +#undef QDB +#endif +#define QDB(n) ((n) * WLC_TXPWR_DB_FACTOR) + + +/* Flag bits in serialization/deserialization */ +#define PPR_MAX_TX_CHAIN_MASK 0x00000003 /* mask of Tx chains */ +#define PPR_BEAMFORMING 0x00000004 /* bit indicates BF is on */ +#define PPR_SER_MEM_WORD 0xBEEFC0FF /* magic word indicates serialization start */ + + +/* size of serialization header */ +#define SER_HDR_LEN sizeof(ppr_deser_header_t) + + +/* Per band tx powers */ +typedef BWL_PRE_PACKED_STRUCT struct pprpb { + /* start of 20MHz tx power limits */ + int8 p_1x1dsss[WL_RATESET_SZ_DSSS]; /* Legacy CCK/DSSS */ + int8 p_1x1ofdm[WL_RATESET_SZ_OFDM]; /* 20 MHz Legacy OFDM transmission */ + int8 p_1x1vhtss1[WL_RATESET_SZ_VHT_MCS]; /* 8HT/10VHT pwrs starting at 1x1mcs0 */ +#if (PPR_MAX_TX_CHAINS > 1) + int8 p_1x2dsss[WL_RATESET_SZ_DSSS]; /* Legacy CCK/DSSS */ + int8 p_1x2cdd_ofdm[WL_RATESET_SZ_OFDM]; /* 20 MHz Legacy OFDM CDD transmission */ + int8 p_1x2cdd_vhtss1[WL_RATESET_SZ_VHT_MCS]; /* 8HT/10VHT pwrs starting at 1x2cdd_mcs0 */ + int8 p_2x2stbc_vhtss1[WL_RATESET_SZ_VHT_MCS]; /* 8HT/10VHT pwrs starting at 2x2stbc_mcs0 */ + int8 p_2x2vhtss2[WL_RATESET_SZ_VHT_MCS]; /* 8HT/10VHT pwrs starting at 2x2sdm_mcs8 */ +#if (PPR_MAX_TX_CHAINS > 2) + int8 p_1x3dsss[WL_RATESET_SZ_DSSS]; /* Legacy CCK/DSSS */ + int8 p_1x3cdd_ofdm[WL_RATESET_SZ_OFDM]; /* 20 MHz Legacy OFDM CDD transmission */ + int8 p_1x3cdd_vhtss1[WL_RATESET_SZ_VHT_MCS]; /* 8HT/10VHT pwrs starting at 1x3cdd_mcs0 */ + int8 p_2x3stbc_vhtss1[WL_RATESET_SZ_VHT_MCS]; /* 8HT/10VHT pwrs starting at 2x3stbc_mcs0 */ + int8 p_2x3vhtss2[WL_RATESET_SZ_VHT_MCS]; /* 8HT/10VHT pwrs starting at 2x3sdm_mcs8 spexp1 */ + int8 p_3x3vhtss3[WL_RATESET_SZ_VHT_MCS]; /* 8HT/10VHT pwrs starting at 3x3sdm_mcs16 */ +#endif + +#ifdef WL_BEAMFORMING + int8 p_1x2txbf_ofdm[WL_RATESET_SZ_OFDM]; /* 20 MHz Legacy OFDM TXBF transmission */ + int8 p_1x2txbf_vhtss1[WL_RATESET_SZ_VHT_MCS]; /* 8HT/10VHT pwrs starting at 1x2txbf_mcs0 */ + int8 p_2x2txbf_vhtss2[WL_RATESET_SZ_VHT_MCS]; /* 8HT/10VHT pwrs starting at 2x2txbf_mcs8 */ +#if (PPR_MAX_TX_CHAINS > 2) + int8 p_1x3txbf_ofdm[WL_RATESET_SZ_OFDM]; /* 20 MHz Legacy OFDM TXBF transmission */ + int8 p_1x3txbf_vhtss1[WL_RATESET_SZ_VHT_MCS]; /* 8HT/10VHT pwrs starting at 1x3txbf_mcs0 */ + int8 p_2x3txbf_vhtss2[WL_RATESET_SZ_VHT_MCS]; /* 8HT/10VHT pwrs starting at 2x3txbf_mcs8 */ + int8 p_3x3txbf_vhtss3[WL_RATESET_SZ_VHT_MCS]; /* 8HT/10VHT pwrs starting at 3x3txbf_mcs16 */ +#endif +#endif /* WL_BEAMFORMING */ +#endif /* PPR_MAX_TX_CHAINS > 1 */ +} BWL_POST_PACKED_STRUCT pprpbw_t; + + +#define PPR_CHAIN1_FIRST OFFSETOF(pprpbw_t, p_1x1dsss) +#define PPR_CHAIN1_END (OFFSETOF(pprpbw_t, p_1x1vhtss1) + sizeof(((pprpbw_t *)0)->p_1x1vhtss1)) +#define PPR_CHAIN1_SIZE PPR_CHAIN1_END +#if (PPR_MAX_TX_CHAINS > 1) +#define PPR_CHAIN2_FIRST OFFSETOF(pprpbw_t, p_1x2dsss) +#define PPR_CHAIN2_END (OFFSETOF(pprpbw_t, p_2x2vhtss2) + sizeof(((pprpbw_t *)0)->p_2x2vhtss2)) +#define PPR_CHAIN2_SIZE (PPR_CHAIN2_END - PPR_CHAIN2_FIRST) +#if (PPR_MAX_TX_CHAINS > 2) +#define PPR_CHAIN3_FIRST OFFSETOF(pprpbw_t, p_1x3dsss) +#define PPR_CHAIN3_END (OFFSETOF(pprpbw_t, p_3x3vhtss3) + sizeof(((pprpbw_t *)0)->p_3x3vhtss3)) +#define PPR_CHAIN3_SIZE (PPR_CHAIN3_END - PPR_CHAIN3_FIRST) +#endif + +#ifdef WL_BEAMFORMING +#define PPR_BF_CHAIN2_FIRST OFFSETOF(pprpbw_t, p_1x2txbf_ofdm) +#define PPR_BF_CHAIN2_END (OFFSETOF(pprpbw_t, p_2x2txbf_vhtss2) + \ + sizeof(((pprpbw_t *)0)->p_2x2txbf_vhtss2)) +#define PPR_BF_CHAIN2_SIZE (PPR_BF_CHAIN2_END - PPR_BF_CHAIN2_FIRST) +#if (PPR_MAX_TX_CHAINS > 2) +#define PPR_BF_CHAIN3_FIRST OFFSETOF(pprpbw_t, p_1x3txbf_ofdm) +#define PPR_BF_CHAIN3_END (OFFSETOF(pprpbw_t, p_3x3txbf_vhtss3) + \ + sizeof(((pprpbw_t *)0)->p_3x3txbf_vhtss3)) +#define PPR_BF_CHAIN3_SIZE (PPR_BF_CHAIN3_END - PPR_BF_CHAIN3_FIRST) +#endif + +#endif /* WL_BEAMFORMING */ +#endif /* PPR_MAX_TX_CHAINS > 1 */ + + +#define PPR_BW_MAX WL_TX_BW_80 /* Maximum supported bandwidth */ + +/* Structure to contain ppr values for a 20MHz channel */ +typedef BWL_PRE_PACKED_STRUCT struct ppr_bw_20 { + /* 20MHz tx power limits */ + pprpbw_t b20; +} BWL_POST_PACKED_STRUCT ppr_bw_20_t; + + +/* Structure to contain ppr values for a 40MHz channel */ +typedef BWL_PRE_PACKED_STRUCT struct ppr_bw_40 { + /* 40MHz tx power limits */ + pprpbw_t b40; + /* 20in40MHz tx power limits */ + pprpbw_t b20in40; +} BWL_POST_PACKED_STRUCT ppr_bw_40_t; + + +/* Structure to contain ppr values for an 80MHz channel */ +typedef BWL_PRE_PACKED_STRUCT struct ppr_bw_80 { + /* 80MHz tx power limits */ + pprpbw_t b80; + /* 20in80MHz tx power limits */ + pprpbw_t b20in80; + /* 40in80MHz tx power limits */ + pprpbw_t b40in80; +} BWL_POST_PACKED_STRUCT ppr_bw_80_t; + + +/* + * This is the initial implementation of the structure we're hiding. It is sized to contain only + * the set of powers it requires, so the union is not necessarily the size of the largest member. + */ + +BWL_PRE_PACKED_STRUCT struct ppr { + wl_tx_bw_t ch_bw; + + BWL_PRE_PACKED_STRUCT union { + ppr_bw_20_t ch20; + ppr_bw_40_t ch40; + ppr_bw_80_t ch80; + } ppr_bw; +} BWL_POST_PACKED_STRUCT; + +/* This marks the end of a packed structure section. */ +#include + + +/* Returns a flag of ppr conditions (chains, txbf etc.) */ +static uint32 ppr_get_flag(void) +{ + uint32 flag = 0; + flag |= PPR_MAX_TX_CHAINS & PPR_MAX_TX_CHAIN_MASK; +#if PPR_MAX_TX_CHAINS > 1 + if (PPR_TXBF_ENAB()) { + flag |= PPR_BEAMFORMING; + } +#endif + return flag; +} + +static uint16 ppr_ser_size_per_band(uint32 flags) +{ + uint16 ret = PPR_CHAIN1_SIZE; /* at least 1 chain rates should be there */ + uint8 chain = flags & PPR_MAX_TX_CHAIN_MASK; + bool bf = (flags & PPR_BEAMFORMING) != 0; + BCM_REFERENCE(chain); + BCM_REFERENCE(bf); +#if (PPR_MAX_TX_CHAINS > 1) + if (chain > 1) { + ret += PPR_CHAIN2_SIZE; + } +#if (PPR_MAX_TX_CHAINS > 2) + if (chain > 2) { + ret += PPR_CHAIN3_SIZE; + } +#endif + +#ifdef WL_BEAMFORMING + if (bf) { + ret += PPR_BF_CHAIN2_SIZE; + } +#if (PPR_MAX_TX_CHAINS > 2) + if (bf && chain > 2) { + ret += PPR_BF_CHAIN3_SIZE; + } +#endif +#endif /* WL_BEAMFORMING */ +#endif /* PPR_MAX_TX_CHAINS > 1 */ + return ret; +} + +/* Return the required serialization size based on the flag field. */ +static uint ppr_ser_size_by_flag(uint32 flag, wl_tx_bw_t bw) +{ + uint ret = ppr_ser_size_per_band(flag); + switch (bw) { + case WL_TX_BW_20: + break; + case WL_TX_BW_40: + ret *= sizeof(ppr_bw_40_t)/sizeof(pprpbw_t); + break; + case WL_TX_BW_80: + ret *= sizeof(ppr_bw_80_t)/sizeof(pprpbw_t); + break; + default: + ASSERT(0); + } + return ret; +} + +#define COPY_PPR_TOBUF(x, y) do { bcopy(&pprbuf[x], *buf, y); \ + *buf += y; ret += y; } while (0); + + +/* Serialize ppr data of a bandwidth into the given buffer */ +static uint ppr_serialize_block(const uint8* pprbuf, uint8** buf, uint32 serflag) +{ + uint ret = 0; +#if (PPR_MAX_TX_CHAINS > 1) + uint chain = serflag & PPR_MAX_TX_CHAIN_MASK; /* chain number in serialized block */ + bool bf = (serflag & PPR_BEAMFORMING) != 0; +#endif + + COPY_PPR_TOBUF(PPR_CHAIN1_FIRST, PPR_CHAIN1_SIZE); +#if (PPR_MAX_TX_CHAINS > 1) + BCM_REFERENCE(bf); + if (chain > 1) { + COPY_PPR_TOBUF(PPR_CHAIN2_FIRST, PPR_CHAIN2_SIZE); + } +#if (PPR_MAX_TX_CHAINS > 2) + if (chain > 2) { + COPY_PPR_TOBUF(PPR_CHAIN3_FIRST, PPR_CHAIN3_SIZE); + } +#endif +#ifdef WL_BEAMFORMING + if (PPR_TXBF_ENAB() && bf) { + COPY_PPR_TOBUF(PPR_BF_CHAIN2_FIRST, PPR_BF_CHAIN2_SIZE); + } +#if (PPR_MAX_TX_CHAINS > 2) + if (PPR_TXBF_ENAB() && bf && chain > 2) { + COPY_PPR_TOBUF(PPR_BF_CHAIN3_FIRST, PPR_BF_CHAIN3_SIZE); + } +#endif +#endif /* WL_BEAMFORMING */ +#endif /* (PPR_MAX_TX_CHAINS > 1) */ + return ret; +} + + +/* Serialize ppr data of each bandwidth into the given buffer, returns bytes copied */ +static uint ppr_serialize_data(const ppr_t *pprptr, uint8* buf, uint32 serflag) +{ + uint ret = sizeof(ppr_deser_header_t); + ppr_deser_header_t* header = (ppr_deser_header_t*)buf; + ASSERT(pprptr && buf); + header->version = PPR_SERIALIZATION_VER; + header->bw = (uint8)pprptr->ch_bw; + header->flags = HTON32(ppr_get_flag()); + header->per_band_size = HTON16(ppr_ser_size_per_band(serflag)); + + buf += sizeof(*header); + switch (header->bw) { + case WL_TX_BW_20: + { + const uint8* pprbuf = (const uint8*)&pprptr->ppr_bw.ch20.b20; + ret += ppr_serialize_block(pprbuf, &buf, serflag); + } + break; + case WL_TX_BW_40: + { + const uint8* pprbuf = (const uint8*)&pprptr->ppr_bw.ch40.b40; + ret += ppr_serialize_block(pprbuf, &buf, serflag); + pprbuf = (const uint8*)&pprptr->ppr_bw.ch40.b20in40; + ret += ppr_serialize_block(pprbuf, &buf, serflag); + } + break; + case WL_TX_BW_80: + { + const uint8* pprbuf = (const uint8*)&pprptr->ppr_bw.ch80.b80; + ret += ppr_serialize_block(pprbuf, &buf, serflag); + pprbuf = (const uint8*)&pprptr->ppr_bw.ch80.b20in80; + ret += ppr_serialize_block(pprbuf, &buf, serflag); + pprbuf = (const uint8*)&pprptr->ppr_bw.ch80.b40in80; + ret += ppr_serialize_block(pprbuf, &buf, serflag); + } + break; + default: + ASSERT(0); + } + return ret; +} + + +/* Copy serialized ppr data of a bandwidth */ +static void ppr_copy_serdata(uint8* pobuf, const uint8** inbuf, uint32 flag, uint16 per_band_size) +{ + uint chain = flag & PPR_MAX_TX_CHAIN_MASK; + bool bf = (flag & PPR_BEAMFORMING) != 0; + uint16 len = PPR_CHAIN1_SIZE; + BCM_REFERENCE(chain); + BCM_REFERENCE(bf); + bcopy(*inbuf, pobuf, PPR_CHAIN1_SIZE); + *inbuf += PPR_CHAIN1_SIZE; +#if (PPR_MAX_TX_CHAINS > 1) + if (chain > 1) { + bcopy(*inbuf, &pobuf[PPR_CHAIN2_FIRST], PPR_CHAIN2_SIZE); + *inbuf += PPR_CHAIN2_SIZE; + len += PPR_CHAIN2_SIZE; + } +#if (PPR_MAX_TX_CHAINS > 2) + if (chain > 2) { + bcopy(*inbuf, &pobuf[PPR_CHAIN3_FIRST], PPR_CHAIN3_SIZE); + *inbuf += PPR_CHAIN3_SIZE; + len += PPR_CHAIN3_SIZE; + } +#endif + +#ifdef WL_BEAMFORMING + if (PPR_TXBF_ENAB() && bf) { + bcopy(*inbuf, &pobuf[PPR_BF_CHAIN2_FIRST], PPR_BF_CHAIN2_SIZE); + *inbuf += PPR_BF_CHAIN2_SIZE; + len += PPR_BF_CHAIN2_SIZE; + } +#if (PPR_MAX_TX_CHAINS > 2) + if (PPR_TXBF_ENAB() && bf && chain > 2) { + bcopy(*inbuf, &pobuf[PPR_BF_CHAIN3_FIRST], PPR_BF_CHAIN3_SIZE); + *inbuf += PPR_BF_CHAIN3_SIZE; + len += PPR_BF_CHAIN3_SIZE; + } +#endif +#endif /* WL_BEAMFORMING */ +#endif /* (PPR_MAX_TX_CHAINS > 1) */ + if (len < per_band_size) { + *inbuf += (per_band_size - len); + } +} + + +/* Deserialize data into a ppr_t structure */ +static void +ppr_deser_cpy(ppr_t* pptr, const uint8* inbuf, uint32 flag, wl_tx_bw_t bw, uint16 per_band_size) +{ + pptr->ch_bw = bw; + switch (bw) { + case WL_TX_BW_20: + { + uint8* pobuf = (uint8*)&pptr->ppr_bw.ch20; + ppr_copy_serdata(pobuf, &inbuf, flag, per_band_size); + } + break; + case WL_TX_BW_40: + { + uint8* pobuf = (uint8*)&pptr->ppr_bw.ch40.b40; + ppr_copy_serdata(pobuf, &inbuf, flag, per_band_size); + pobuf = (uint8*)&pptr->ppr_bw.ch40.b20in40; + ppr_copy_serdata(pobuf, &inbuf, flag, per_band_size); + } + break; + case WL_TX_BW_80: + { + uint8* pobuf = (uint8*)&pptr->ppr_bw.ch80.b80; + ppr_copy_serdata(pobuf, &inbuf, flag, per_band_size); + pobuf = (uint8*)&pptr->ppr_bw.ch80.b20in80; + ppr_copy_serdata(pobuf, &inbuf, flag, per_band_size); + pobuf = (uint8*)&pptr->ppr_bw.ch80.b40in80; + ppr_copy_serdata(pobuf, &inbuf, flag, per_band_size); + } + break; + default: + ASSERT(0); + } +} + + +/* Get a pointer to the power values for a given channel bandwidth */ +static pprpbw_t* ppr_get_bw_powers_20(ppr_t* p, wl_tx_bw_t bw) +{ + pprpbw_t* pwrs = NULL; + + if (bw == WL_TX_BW_20) + pwrs = &p->ppr_bw.ch20.b20; + /* XXX wlc_phy_txpower_limit_set() asks for 40MHz powers irrespective of the channel bw */ + /* else */ + /* ASSERT(0); */ + return pwrs; +} + + +/* Get a pointer to the power values for a given channel bandwidth */ +static pprpbw_t* ppr_get_bw_powers_40(ppr_t* p, wl_tx_bw_t bw) +{ + pprpbw_t* pwrs = NULL; + + switch (bw) { + case WL_TX_BW_40: + pwrs = &p->ppr_bw.ch40.b40; + break; + /* XXX Should we do this? */ + case WL_TX_BW_20: + + case WL_TX_BW_20IN40: + pwrs = &p->ppr_bw.ch40.b20in40; + break; + default: + /* ASSERT(0); */ + break; + } + return pwrs; +} + + +/* Get a pointer to the power values for a given channel bandwidth */ +static pprpbw_t* ppr_get_bw_powers_80(ppr_t* p, wl_tx_bw_t bw) +{ + pprpbw_t* pwrs = NULL; + + switch (bw) { + case WL_TX_BW_80: + pwrs = &p->ppr_bw.ch80.b80; + break; + /* XXX Should we do this? */ + case WL_TX_BW_20: + case WL_TX_BW_20IN40: + case WL_TX_BW_20IN80: + pwrs = &p->ppr_bw.ch80.b20in80; + break; + case WL_TX_BW_40: + case WL_TX_BW_40IN80: + pwrs = &p->ppr_bw.ch80.b40in80; + break; + default: + /* ASSERT(0); */ + break; + } + return pwrs; +} + + +typedef pprpbw_t* (*wlc_ppr_get_bw_pwrs_fn_t)(ppr_t* p, wl_tx_bw_t bw); + +typedef struct { + wl_tx_bw_t ch_bw; /* Bandwidth of the channel for which powers are stored */ + /* Function to retrieve the powers for the requested bandwidth */ + wlc_ppr_get_bw_pwrs_fn_t fn; +} wlc_ppr_get_bw_pwrs_pair_t; + + +static const wlc_ppr_get_bw_pwrs_pair_t ppr_get_bw_pwrs_fn[] = { + {WL_TX_BW_20, ppr_get_bw_powers_20}, + {WL_TX_BW_40, ppr_get_bw_powers_40}, + {WL_TX_BW_80, ppr_get_bw_powers_80} +}; + + +/* Get a pointer to the power values for a given channel bandwidth */ +static pprpbw_t* ppr_get_bw_powers(ppr_t* p, wl_tx_bw_t bw) +{ + uint32 i; + + if (p == NULL) { + return NULL; + } + + for (i = 0; i < (int)ARRAYSIZE(ppr_get_bw_pwrs_fn); i++) { + if (ppr_get_bw_pwrs_fn[i].ch_bw == p->ch_bw) + return ppr_get_bw_pwrs_fn[i].fn(p, bw); + } + + ASSERT(0); + return NULL; +} + + +/* + * Rate group power finder functions: ppr_get_xxx_group() + * To preserve the opacity of the PPR struct, even inside the API we try to limit knowledge of + * its details. Almost all API functions work on the powers for individual rate groups, rather than + * directly accessing the struct. Once the section of the structure corresponding to the bandwidth + * has been identified using ppr_get_bw_powers(), the ppr_get_xxx_group() functions use knowledge + * of the number of spatial streams, the number of tx chains, and the expansion mode to return a + * pointer to the required group of power values. + */ + +/* Get a pointer to the power values for the given dsss rate group for a given channel bandwidth */ +static int8* ppr_get_dsss_group(pprpbw_t* bw_pwrs, wl_tx_chains_t tx_chains) +{ + int8* group_pwrs = NULL; + + switch (tx_chains) { +#if (PPR_MAX_TX_CHAINS > 1) +#if (PPR_MAX_TX_CHAINS > 2) + case WL_TX_CHAINS_3: + group_pwrs = bw_pwrs->p_1x3dsss; + break; +#endif + case WL_TX_CHAINS_2: + group_pwrs = bw_pwrs->p_1x2dsss; + break; +#endif /* PPR_MAX_TX_CHAINS > 1 */ + case WL_TX_CHAINS_1: + group_pwrs = bw_pwrs->p_1x1dsss; + break; + default: + ASSERT(0); + break; + } + return group_pwrs; +} + + +/* Get a pointer to the power values for the given ofdm rate group for a given channel bandwidth */ +static int8* ppr_get_ofdm_group(pprpbw_t* bw_pwrs, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains) +{ + int8* group_pwrs = NULL; + BCM_REFERENCE(mode); + switch (tx_chains) { +#if (PPR_MAX_TX_CHAINS > 1) +#if (PPR_MAX_TX_CHAINS > 2) + case WL_TX_CHAINS_3: +#ifdef WL_BEAMFORMING + if (mode == WL_TX_MODE_TXBF) + group_pwrs = bw_pwrs->p_1x3txbf_ofdm; + else +#endif + group_pwrs = bw_pwrs->p_1x3cdd_ofdm; + break; +#endif /* PPR_MAX_TX_CHAINS > 2 */ + case WL_TX_CHAINS_2: +#ifdef WL_BEAMFORMING + if (mode == WL_TX_MODE_TXBF) + group_pwrs = bw_pwrs->p_1x2txbf_ofdm; + else +#endif + group_pwrs = bw_pwrs->p_1x2cdd_ofdm; + break; +#endif /* PPR_MAX_TX_CHAINS > 1 */ + case WL_TX_CHAINS_1: + group_pwrs = bw_pwrs->p_1x1ofdm; + break; + default: + ASSERT(0); + break; + } + return group_pwrs; +} + + +/* + * Tables to provide access to HT/VHT rate group powers. This avoids an ugly nested switch with + * messy conditional compilation. + * + * Access to a given table entry is via table[chains - Nss][mode], except for the Nss3 table, which + * only has one row, so it can be indexed directly by table[mode]. + * + * Separate tables are provided for each of Nss1, Nss2 and Nss3 because they are all different + * sizes. A combined table would be very sparse, and this arrangement also simplifies the + * conditional compilation. + * + * Each row represents a given number of chains, so there's no need for a zero row. Because + * chains >= Nss is always true, there is no one-chain row for Nss2 and there are no one- or + * two-chain rows for Nss3. With the tables correctly sized, we can index the rows + * using [chains - Nss]. + * + * Then, inside each row, we index by mode: + * WL_TX_MODE_NONE, WL_TX_MODE_STBC, WL_TX_MODE_CDD, WL_TX_MODE_TXBF. + */ + +#define OFFSNONE (-1) + +static const int mcs_groups_nss1[PPR_MAX_TX_CHAINS][WL_NUM_TX_MODES] = { + /* WL_TX_MODE_NONE + WL_TX_MODE_STBC + WL_TX_MODE_CDD + WL_TX_MODE_TXBF + */ + /* 1 chain */ + {OFFSETOF(pprpbw_t, p_1x1vhtss1), + OFFSNONE, + OFFSNONE, + OFFSNONE}, +#if (PPR_MAX_TX_CHAINS > 1) + /* 2 chain */ + {OFFSNONE, + OFFSNONE, + OFFSETOF(pprpbw_t, p_1x2cdd_vhtss1), + OFFSNONE}, +#if (PPR_MAX_TX_CHAINS > 2) + /* 3 chain */ + {OFFSNONE, + OFFSNONE, + OFFSETOF(pprpbw_t, p_1x3cdd_vhtss1), + OFFSNONE} +#endif +#endif /* PPR_MAX_TX_CHAINS > 1 */ +}; + +#ifdef WL_BEAMFORMING +/* mcs group with TXBF data */ +static const int mcs_groups_nss1_txbf[PPR_MAX_TX_CHAINS][WL_NUM_TX_MODES] = { + /* WL_TX_MODE_NONE + WL_TX_MODE_STBC + WL_TX_MODE_CDD + WL_TX_MODE_TXBF + */ + /* 1 chain */ + {OFFSETOF(pprpbw_t, p_1x1vhtss1), + OFFSNONE, + OFFSNONE, + OFFSNONE}, +#if (PPR_MAX_TX_CHAINS > 1) + /* 2 chain */ + {OFFSNONE, + OFFSNONE, + OFFSETOF(pprpbw_t, p_1x2cdd_vhtss1), + OFFSETOF(pprpbw_t, p_1x2txbf_vhtss1)}, +#if (PPR_MAX_TX_CHAINS > 2) + /* 3 chain */ + {OFFSNONE, + OFFSNONE, + OFFSETOF(pprpbw_t, p_1x3cdd_vhtss1), + OFFSETOF(pprpbw_t, p_1x3txbf_vhtss1)} +#endif +#endif /* PPR_MAX_TX_CHAINS > 1 */ +}; +#endif /* WL_BEAMFORMING */ + +#if (PPR_MAX_TX_CHAINS > 1) +static const int mcs_groups_nss2[PPR_MAX_TX_CHAINS - 1][WL_NUM_TX_MODES] = { + /* 2 chain */ + {OFFSETOF(pprpbw_t, p_2x2vhtss2), + OFFSETOF(pprpbw_t, p_2x2stbc_vhtss1), + OFFSNONE, + OFFSNONE}, +#if (PPR_MAX_TX_CHAINS > 2) + /* 3 chain */ + {OFFSETOF(pprpbw_t, p_2x3vhtss2), + OFFSETOF(pprpbw_t, p_2x3stbc_vhtss1), + OFFSNONE, + OFFSNONE} +#endif +}; + +#ifdef WL_BEAMFORMING +/* mcs group with TXBF data */ +static const int mcs_groups_nss2_txbf[PPR_MAX_TX_CHAINS - 1][WL_NUM_TX_MODES] = { + /* 2 chain */ + {OFFSETOF(pprpbw_t, p_2x2vhtss2), + OFFSETOF(pprpbw_t, p_2x2stbc_vhtss1), + OFFSNONE, + OFFSETOF(pprpbw_t, p_2x2txbf_vhtss2)}, +#if (PPR_MAX_TX_CHAINS > 2) + /* 3 chain */ + {OFFSETOF(pprpbw_t, p_2x3vhtss2), + OFFSETOF(pprpbw_t, p_2x3stbc_vhtss1), + OFFSNONE, + OFFSETOF(pprpbw_t, p_2x3txbf_vhtss2)} +#endif +}; +#endif /* WL_BEAMFORMING */ + +#if (PPR_MAX_TX_CHAINS > 2) +static const int mcs_groups_nss3[WL_NUM_TX_MODES] = { +/* 3 chains only */ + OFFSETOF(pprpbw_t, p_3x3vhtss3), + OFFSNONE, + OFFSNONE, + OFFSNONE, +}; + +#ifdef WL_BEAMFORMING +/* mcs group with TXBF data */ +static const int mcs_groups_nss3_txbf[WL_NUM_TX_MODES] = { +/* 3 chains only */ + OFFSETOF(pprpbw_t, p_3x3vhtss3), + OFFSNONE, + OFFSNONE, + OFFSETOF(pprpbw_t, p_3x3txbf_vhtss3) +}; +#endif /* WL_BEAMFORMING */ +#endif /* PPR_MAX_TX_CHAINS > 2 */ +#endif /* PPR_MAX_TX_CHAINS > 1 */ + +/* Get a pointer to the power values for the given rate group for a given channel bandwidth */ +static int8* ppr_get_mcs_group(pprpbw_t* bw_pwrs, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains) +{ + int8* group_pwrs = NULL; + int offset; + + switch (Nss) { +#if (PPR_MAX_TX_CHAINS > 1) +#if (PPR_MAX_TX_CHAINS > 2) + case WL_TX_NSS_3: + if (tx_chains == WL_TX_CHAINS_3) { +#ifdef WL_BEAMFORMING + if (PPR_TXBF_ENAB()) { + offset = mcs_groups_nss3_txbf[mode]; + } else +#endif /* WL_BEAMFORMING */ + { + offset = mcs_groups_nss3[mode]; + } + if (offset != OFFSNONE) { + group_pwrs = (int8*)bw_pwrs + offset; + } + } + else + ASSERT(0); + break; +#endif /* PPR_MAX_TX_CHAINS > 2 */ + case WL_TX_NSS_2: + if ((tx_chains >= WL_TX_CHAINS_2) && (tx_chains <= PPR_MAX_TX_CHAINS)) { +#ifdef WL_BEAMFORMING + if (PPR_TXBF_ENAB()) { + offset = mcs_groups_nss2_txbf[tx_chains - Nss][mode]; + } else +#endif /* WL_BEAMFORMING */ + { + offset = mcs_groups_nss2[tx_chains - Nss][mode]; + } + if (offset != OFFSNONE) { + group_pwrs = (int8*)bw_pwrs + offset; + } + } + else + ASSERT(0); + break; +#endif /* PPR_MAX_TX_CHAINS > 1 */ + case WL_TX_NSS_1: + if (tx_chains <= PPR_MAX_TX_CHAINS) { +#ifdef WL_BEAMFORMING + if (PPR_TXBF_ENAB()) { + offset = mcs_groups_nss1_txbf[tx_chains - Nss][mode]; + } else +#endif /* WL_BEAMFORMING */ + { + offset = mcs_groups_nss1[tx_chains - Nss][mode]; + } + if (offset != OFFSNONE) { + group_pwrs = (int8*)bw_pwrs + offset; + } + } + else + ASSERT(0); + break; + default: + ASSERT(0); + break; + } + return group_pwrs; +} + +/* Size routine for user alloc/dealloc */ +static uint32 ppr_pwrs_size(wl_tx_bw_t bw) +{ + uint32 size; + + switch (bw) { + case WL_TX_BW_20: + size = sizeof(ppr_bw_20_t); + break; + case WL_TX_BW_40: + size = sizeof(ppr_bw_40_t); + break; + case WL_TX_BW_80: + size = sizeof(ppr_bw_80_t); + break; + default: + ASSERT(0); + size = 0; + break; + } + return size; +} + + +/* Initialization routine */ +void ppr_init(ppr_t* pprptr, wl_tx_bw_t bw) +{ + memset(pprptr, (int8)WL_RATE_DISABLED, ppr_size(bw)); + pprptr->ch_bw = bw; +} + + +/* Reinitialization routine for opaque PPR struct */ +void ppr_clear(ppr_t* pprptr) +{ + memset((uchar*)&pprptr->ppr_bw, (int8)WL_RATE_DISABLED, ppr_pwrs_size(pprptr->ch_bw)); +} + + +/* Size routine for user alloc/dealloc */ +uint32 ppr_size(wl_tx_bw_t bw) +{ + return ppr_pwrs_size(bw) + sizeof(wl_tx_bw_t); +} + + +/* Size routine for user serialization alloc */ +uint32 ppr_ser_size(const ppr_t* pprptr) +{ + return ppr_pwrs_size(pprptr->ch_bw) + SER_HDR_LEN; /* struct size plus headers */ +} + + +/* Size routine for user serialization alloc */ +uint32 ppr_ser_size_by_bw(wl_tx_bw_t bw) +{ + return ppr_pwrs_size(bw) + SER_HDR_LEN; /* struct size plus headers */ +} + + +/* Constructor routine for opaque PPR struct */ +ppr_t* ppr_create(osl_t *osh, wl_tx_bw_t bw) +{ + ppr_t* pprptr; + + ASSERT((bw == WL_TX_BW_20) || (bw == WL_TX_BW_40) || (bw == WL_TX_BW_80)); +#ifndef BCMDRIVER + BCM_REFERENCE(osh); + if ((pprptr = (ppr_t*)malloc((uint)ppr_size(bw))) != NULL) { +#else + if ((pprptr = (ppr_t*)MALLOC(osh, (uint)ppr_size(bw))) != NULL) { +#endif + ppr_init(pprptr, bw); + } + return pprptr; +} + + +/* Init flags in the memory block for serialization, the serializer will check + * the flag to decide which ppr to be copied + */ +int ppr_init_ser_mem_by_bw(uint8* pbuf, wl_tx_bw_t bw, uint32 len) +{ + ppr_ser_mem_flag_t *pmflag; + + if (pbuf == NULL || ppr_ser_size_by_bw(bw) > len) + return BCME_BADARG; + + pmflag = (ppr_ser_mem_flag_t *)pbuf; + pmflag->magic_word = HTON32(PPR_SER_MEM_WORD); + pmflag->flag = HTON32(ppr_get_flag()); + + /* init the memory */ + memset(pbuf + sizeof(*pmflag), (uint8)WL_RATE_DISABLED, len-sizeof(*pmflag)); + return BCME_OK; +} + + +int ppr_init_ser_mem(uint8* pbuf, ppr_t * ppr, uint32 len) +{ + return ppr_init_ser_mem_by_bw(pbuf, ppr->ch_bw, len); +} + + +/* Destructor routine for opaque PPR struct */ +void ppr_delete(osl_t *osh, ppr_t* pprptr) +{ + ASSERT((pprptr->ch_bw == WL_TX_BW_20) || (pprptr->ch_bw == WL_TX_BW_40) || + (pprptr->ch_bw == WL_TX_BW_80)); +#ifndef BCMDRIVER + BCM_REFERENCE(osh); + free(pprptr); +#else + MFREE(osh, pprptr, (uint)ppr_size(pprptr->ch_bw)); +#endif +} + + +/* Type routine for inferring opaque structure size */ +wl_tx_bw_t ppr_get_ch_bw(const ppr_t* pprptr) +{ + return pprptr->ch_bw; +} + + +/* Type routine to get ppr supported maximum bw */ +wl_tx_bw_t ppr_get_max_bw(void) +{ + return PPR_BW_MAX; +} + + +/* Get the dsss values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_get_dsss(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_chains_t tx_chains, + ppr_dsss_rateset_t* dsss) +{ + pprpbw_t* bw_pwrs; + const int8* powers; + int cnt = 0; + + ASSERT(pprptr); + bw_pwrs = ppr_get_bw_powers(pprptr, bw); + if (bw_pwrs != NULL) { + powers = ppr_get_dsss_group(bw_pwrs, tx_chains); + if (powers != NULL) { + bcopy(powers, dsss->pwr, sizeof(*dsss)); + cnt = sizeof(*dsss); + } + } + if (cnt == 0) { + memset(dsss->pwr, (int8)WL_RATE_DISABLED, sizeof(*dsss)); + } + return cnt; +} + + +/* Get the ofdm values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_get_ofdm(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_mode_t mode, wl_tx_chains_t tx_chains, + ppr_ofdm_rateset_t* ofdm) +{ + pprpbw_t* bw_pwrs; + const int8* powers; + int cnt = 0; + + ASSERT(pprptr); + bw_pwrs = ppr_get_bw_powers(pprptr, bw); + if (bw_pwrs != NULL) { + powers = ppr_get_ofdm_group(bw_pwrs, mode, tx_chains); + if (powers != NULL) { + bcopy(powers, ofdm->pwr, sizeof(*ofdm)); + cnt = sizeof(*ofdm); + } + } + if (cnt == 0) { + memset(ofdm->pwr, (int8)WL_RATE_DISABLED, sizeof(*ofdm)); + } + return cnt; +} + + +/* Get the HT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_get_ht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, ppr_ht_mcs_rateset_t* mcs) +{ + pprpbw_t* bw_pwrs; + const int8* powers; + int cnt = 0; + + ASSERT(pprptr); + bw_pwrs = ppr_get_bw_powers(pprptr, bw); + if (bw_pwrs != NULL) { + powers = ppr_get_mcs_group(bw_pwrs, Nss, mode, tx_chains); + if (powers != NULL) { + bcopy(powers, mcs->pwr, sizeof(*mcs)); + cnt = sizeof(*mcs); + } + } + if (cnt == 0) { + memset(mcs->pwr, (int8)WL_RATE_DISABLED, sizeof(*mcs)); + } + + return cnt; +} + + +/* Get the VHT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_get_vht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, ppr_vht_mcs_rateset_t* mcs) +{ + pprpbw_t* bw_pwrs; + const int8* powers; + int cnt = 0; + + ASSERT(pprptr); + bw_pwrs = ppr_get_bw_powers(pprptr, bw); + if (bw_pwrs != NULL) { + powers = ppr_get_mcs_group(bw_pwrs, Nss, mode, tx_chains); + if (powers != NULL) { + bcopy(powers, mcs->pwr, sizeof(*mcs)); + cnt = sizeof(*mcs); + } + } + if (cnt == 0) { + memset(mcs->pwr, (int8)WL_RATE_DISABLED, sizeof(*mcs)); + } + return cnt; +} + + +/* Routines to set target powers per rate in a group */ + +/* Set the dsss values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_set_dsss(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_chains_t tx_chains, + const ppr_dsss_rateset_t* dsss) +{ + pprpbw_t* bw_pwrs; + int8* powers; + int cnt = 0; + + bw_pwrs = ppr_get_bw_powers(pprptr, bw); + if (bw_pwrs != NULL) { + powers = (int8*)ppr_get_dsss_group(bw_pwrs, tx_chains); + if (powers != NULL) { + bcopy(dsss->pwr, powers, sizeof(*dsss)); + cnt = sizeof(*dsss); + } + } + return cnt; +} + + +/* Set the ofdm values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_set_ofdm(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_mode_t mode, wl_tx_chains_t tx_chains, + const ppr_ofdm_rateset_t* ofdm) +{ + pprpbw_t* bw_pwrs; + int8* powers; + int cnt = 0; + + bw_pwrs = ppr_get_bw_powers(pprptr, bw); + if (bw_pwrs != NULL) { + powers = (int8*)ppr_get_ofdm_group(bw_pwrs, mode, tx_chains); + if (powers != NULL) { + bcopy(ofdm->pwr, powers, sizeof(*ofdm)); + cnt = sizeof(*ofdm); + } + } + return cnt; +} + + +/* Set the HT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_set_ht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, const ppr_ht_mcs_rateset_t* mcs) +{ + pprpbw_t* bw_pwrs; + int8* powers; + int cnt = 0; + + bw_pwrs = ppr_get_bw_powers(pprptr, bw); + if (bw_pwrs != NULL) { + powers = (int8*)ppr_get_mcs_group(bw_pwrs, Nss, mode, tx_chains); + if (powers != NULL) { + bcopy(mcs->pwr, powers, sizeof(*mcs)); + cnt = sizeof(*mcs); + } + } + return cnt; +} + + +/* Set the VHT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_set_vht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, const ppr_vht_mcs_rateset_t* mcs) +{ + pprpbw_t* bw_pwrs; + int8* powers; + int cnt = 0; + + bw_pwrs = ppr_get_bw_powers(pprptr, bw); + if (bw_pwrs != NULL) { + powers = (int8*)ppr_get_mcs_group(bw_pwrs, Nss, mode, tx_chains); + if (powers != NULL) { + bcopy(mcs->pwr, powers, sizeof(*mcs)); + cnt = sizeof(*mcs); + } + } + return cnt; +} + + +/* Routines to set rate groups to a single target value */ + +/* Set the dsss values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_set_same_dsss(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_chains_t tx_chains, const int8 power) +{ + pprpbw_t* bw_pwrs; + int8* dest_group; + int cnt = 0; + int i; + + bw_pwrs = ppr_get_bw_powers(pprptr, bw); + if (bw_pwrs != NULL) { + dest_group = (int8*)ppr_get_dsss_group(bw_pwrs, tx_chains); + if (dest_group != NULL) { + cnt = sizeof(ppr_dsss_rateset_t); + for (i = 0; i < cnt; i++) + *dest_group++ = power; + } + } + return cnt; +} + + +/* Set the ofdm values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_set_same_ofdm(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_mode_t mode, wl_tx_chains_t tx_chains, + const int8 power) +{ + pprpbw_t* bw_pwrs; + int8* dest_group; + int cnt = 0; + int i; + + bw_pwrs = ppr_get_bw_powers(pprptr, bw); + if (bw_pwrs != NULL) { + dest_group = (int8*)ppr_get_ofdm_group(bw_pwrs, mode, tx_chains); + if (dest_group != NULL) { + cnt = sizeof(ppr_ofdm_rateset_t); + for (i = 0; i < cnt; i++) + *dest_group++ = power; + } + } + return cnt; +} + + +/* Set the HT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_set_same_ht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, const int8 power) +{ + pprpbw_t* bw_pwrs; + int8* dest_group; + int cnt = 0; + int i; + + bw_pwrs = ppr_get_bw_powers(pprptr, bw); + if (bw_pwrs != NULL) { + dest_group = (int8*)ppr_get_mcs_group(bw_pwrs, Nss, mode, tx_chains); + if (dest_group != NULL) { + cnt = sizeof(ppr_ht_mcs_rateset_t); + for (i = 0; i < cnt; i++) + *dest_group++ = power; + } + } + return cnt; +} + + +/* Set the HT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_set_same_vht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, const int8 power) +{ + pprpbw_t* bw_pwrs; + int8* dest_group; + int cnt = 0; + int i; + + bw_pwrs = ppr_get_bw_powers(pprptr, bw); + if (bw_pwrs != NULL) { + dest_group = (int8*)ppr_get_mcs_group(bw_pwrs, Nss, mode, tx_chains); + if (dest_group != NULL) { + cnt = sizeof(ppr_vht_mcs_rateset_t); + for (i = 0; i < cnt; i++) + *dest_group++ = power; + } + } + return cnt; +} + + +/* Helper routines to operate on the entire ppr set */ + +/* Ensure no rate limit is greater than the cap */ +uint ppr_apply_max(ppr_t* pprptr, int8 maxval) +{ + uint i; + int8* rptr = (int8*)&pprptr->ppr_bw; + + for (i = 0; i < ppr_pwrs_size(pprptr->ch_bw); i++, rptr++) { + *rptr = MIN(*rptr, maxval); + } + return i; +} + +#if (PPR_MAX_TX_CHAINS > 1) +#define APPLY_CONSTRAINT(x, y, max) do { \ + ret += (y - x); \ + for (i = x; i < y; i++) \ + pprbuf[i] = MIN(pprbuf[i], max); \ + } while (0); + + +/* Apply appropriate single-, two- and three-chain constraints across the appropriate ppr block */ +static uint ppr_apply_constraint_to_block(int8* pprbuf, int8 constraint) +{ + uint ret = 0; + uint i = 0; + int8 constraint_2chain = constraint - QDB(3); +#if (PPR_MAX_TX_CHAINS > 2) + int8 constraint_3chain = constraint - (QDB(4) + 3); /* - 4.75dBm */ +#endif + + APPLY_CONSTRAINT(PPR_CHAIN1_FIRST, PPR_CHAIN1_END, constraint); + APPLY_CONSTRAINT(PPR_CHAIN2_FIRST, PPR_CHAIN2_END, constraint_2chain); +#if (PPR_MAX_TX_CHAINS > 2) + APPLY_CONSTRAINT(PPR_CHAIN3_FIRST, PPR_CHAIN3_END, constraint_3chain); +#endif +#ifdef WL_BEAMFORMING + APPLY_CONSTRAINT(PPR_BF_CHAIN2_FIRST, PPR_BF_CHAIN2_END, constraint_2chain); +#if (PPR_MAX_TX_CHAINS > 2) + APPLY_CONSTRAINT(PPR_BF_CHAIN3_FIRST, PPR_BF_CHAIN3_END, constraint_3chain); +#endif +#endif /* WL_BEAMFORMING */ + return ret; +} +#endif /* (PPR_MAX_TX_CHAINS > 1) */ + + +/* + * Reduce total transmitted power to level of constraint. + * For two chain rates, the per-antenna power must be halved. + * For three chain rates, it must be a third of the constraint. + */ +uint ppr_apply_constraint_total_tx(ppr_t* pprptr, int8 constraint) +{ + uint ret = 0; + +#if (PPR_MAX_TX_CHAINS > 1) + int8* pprbuf; + ASSERT(pprptr); + + switch (pprptr->ch_bw) { + case WL_TX_BW_20: + { + pprbuf = (int8*)&pprptr->ppr_bw.ch20.b20; + ret += ppr_apply_constraint_to_block(pprbuf, constraint); + } + break; + case WL_TX_BW_40: + { + pprbuf = (int8*)&pprptr->ppr_bw.ch40.b40; + ret += ppr_apply_constraint_to_block(pprbuf, constraint); + pprbuf = (int8*)&pprptr->ppr_bw.ch40.b20in40; + ret += ppr_apply_constraint_to_block(pprbuf, constraint); + } + break; + case WL_TX_BW_80: + { + pprbuf = (int8*)&pprptr->ppr_bw.ch80.b80; + ret += ppr_apply_constraint_to_block(pprbuf, constraint); + pprbuf = (int8*)&pprptr->ppr_bw.ch80.b20in80; + ret += ppr_apply_constraint_to_block(pprbuf, constraint); + pprbuf = (int8*)&pprptr->ppr_bw.ch80.b40in80; + ret += ppr_apply_constraint_to_block(pprbuf, constraint); + } + break; + default: + ASSERT(0); + } + +#else + ASSERT(pprptr); + ret = ppr_apply_max(pprptr, constraint); +#endif /* PPR_MAX_TX_CHAINS > 1 */ + return ret; +} + + +/* Ensure no rate limit is lower than the specified minimum */ +uint ppr_apply_min(ppr_t* pprptr, int8 minval) +{ + uint i; + int8* rptr = (int8*)&pprptr->ppr_bw; + + for (i = 0; i < ppr_pwrs_size(pprptr->ch_bw); i++, rptr++) { + *rptr = MAX(*rptr, minval); + } + return i; +} + + +/* Ensure no rate limit in this ppr set is greater than the corresponding limit in ppr_cap */ +uint ppr_apply_vector_ceiling(ppr_t* pprptr, const ppr_t* ppr_cap) +{ + uint i = 0; + int8* rptr = (int8*)&pprptr->ppr_bw; + const int8* capptr = (const int8*)&ppr_cap->ppr_bw; + + if (pprptr->ch_bw == ppr_cap->ch_bw) { + for (i = 0; i < ppr_pwrs_size(pprptr->ch_bw); i++, rptr++, capptr++) { + *rptr = MIN(*rptr, *capptr); + } + } + return i; +} + + +/* Ensure no rate limit in this ppr set is lower than the corresponding limit in ppr_min */ +uint ppr_apply_vector_floor(ppr_t* pprptr, const ppr_t* ppr_min) +{ + uint i = 0; + int8* rptr = (int8*)&pprptr->ppr_bw; + const int8* minptr = (const int8*)&ppr_min->ppr_bw; + + if (pprptr->ch_bw == ppr_min->ch_bw) { + for (i = 0; i < ppr_pwrs_size(pprptr->ch_bw); i++, rptr++, minptr++) { + *rptr = MAX((uint8)*rptr, (uint8)*minptr); + } + } + return i; +} + + +/* Get the maximum power in the ppr set */ +int8 ppr_get_max(ppr_t* pprptr) +{ + uint i; + int8* rptr = (int8*)&pprptr->ppr_bw; + int8 maxval = *rptr++; + + for (i = 1; i < ppr_pwrs_size(pprptr->ch_bw); i++, rptr++) { + maxval = MAX(maxval, *rptr); + } + return maxval; +} + + +/* + * Get the minimum power in the ppr set, excluding disallowed + * rates and (possibly) powers set to the minimum for the phy + */ +int8 ppr_get_min(ppr_t* pprptr, int8 floor) +{ + uint i; + int8* rptr = (int8*)&pprptr->ppr_bw; + int8 minval = WL_RATE_DISABLED; + + for (i = 0; (i < ppr_pwrs_size(pprptr->ch_bw)) && ((minval == WL_RATE_DISABLED) || + (minval == floor)); i++, rptr++) { + minval = *rptr; + } + for (; i < ppr_pwrs_size(pprptr->ch_bw); i++, rptr++) { + if ((*rptr != WL_RATE_DISABLED) && (*rptr != floor)) + minval = MIN(minval, *rptr); + } + return minval; +} + + +/* Get the maximum power for a given bandwidth in the ppr set */ +int8 ppr_get_max_for_bw(ppr_t* pprptr, wl_tx_bw_t bw) +{ + uint i; + const pprpbw_t* bw_pwrs; + const int8* rptr; + int8 maxval; + + bw_pwrs = ppr_get_bw_powers(pprptr, bw); + if (bw_pwrs != NULL) { + rptr = (const int8*)bw_pwrs; + maxval = *rptr++; + + for (i = 1; i < sizeof(*bw_pwrs); i++, rptr++) { + maxval = MAX(maxval, *rptr); + } + } else { + maxval = WL_RATE_DISABLED; + } + return maxval; +} + + +/* Get the minimum power for a given bandwidth in the ppr set */ +int8 ppr_get_min_for_bw(ppr_t* pprptr, wl_tx_bw_t bw) +{ + uint i; + const pprpbw_t* bw_pwrs; + const int8* rptr; + int8 minval; + + bw_pwrs = ppr_get_bw_powers(pprptr, bw); + if (bw_pwrs != NULL) { + rptr = (const int8*)bw_pwrs; + minval = *rptr++; + + for (i = 1; i < sizeof(*bw_pwrs); i++, rptr++) { + minval = MIN(minval, *rptr); + } + } else + minval = WL_RATE_DISABLED; + return minval; +} + + +/* Map the given function with its context value over the two power vectors */ +void +ppr_map_vec_dsss(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, ppr_t* pprptr2, + wl_tx_bw_t bw, wl_tx_chains_t tx_chains) +{ + pprpbw_t* bw_pwrs1; + pprpbw_t* bw_pwrs2; + int8* powers1; + int8* powers2; + uint i; + + ASSERT(pprptr1); + ASSERT(pprptr2); + + bw_pwrs1 = ppr_get_bw_powers(pprptr1, bw); + bw_pwrs2 = ppr_get_bw_powers(pprptr2, bw); + if ((bw_pwrs1 != NULL) && (bw_pwrs2 != NULL)) { + powers1 = (int8*)ppr_get_dsss_group(bw_pwrs1, tx_chains); + powers2 = (int8*)ppr_get_dsss_group(bw_pwrs2, tx_chains); + if ((powers1 != NULL) && (powers2 != NULL)) { + for (i = 0; i < WL_RATESET_SZ_DSSS; i++) + (fn)(context, (uint8*)powers1++, (uint8*)powers2++); + } + } +} + + +/* Map the given function with its context value over the two power vectors */ +void +ppr_map_vec_ofdm(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, ppr_t* pprptr2, + wl_tx_bw_t bw, wl_tx_mode_t mode, wl_tx_chains_t tx_chains) +{ + pprpbw_t* bw_pwrs1; + pprpbw_t* bw_pwrs2; + int8* powers1; + int8* powers2; + uint i; + + bw_pwrs1 = ppr_get_bw_powers(pprptr1, bw); + bw_pwrs2 = ppr_get_bw_powers(pprptr2, bw); + if ((bw_pwrs1 != NULL) && (bw_pwrs2 != NULL)) { + powers1 = (int8*)ppr_get_ofdm_group(bw_pwrs1, mode, tx_chains); + powers2 = (int8*)ppr_get_ofdm_group(bw_pwrs2, mode, tx_chains); + if ((powers1 != NULL) && (powers2 != NULL)) { + for (i = 0; i < WL_RATESET_SZ_OFDM; i++) + (fn)(context, (uint8*)powers1++, (uint8*)powers2++); + } + } +} + + +/* Map the given function with its context value over the two power vectors */ +void +ppr_map_vec_ht_mcs(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, + ppr_t* pprptr2, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains) +{ + pprpbw_t* bw_pwrs1; + pprpbw_t* bw_pwrs2; + int8* powers1; + int8* powers2; + uint i; + + bw_pwrs1 = ppr_get_bw_powers(pprptr1, bw); + bw_pwrs2 = ppr_get_bw_powers(pprptr2, bw); + if ((bw_pwrs1 != NULL) && (bw_pwrs2 != NULL)) { + powers1 = (int8*)ppr_get_mcs_group(bw_pwrs1, Nss, mode, tx_chains); + powers2 = (int8*)ppr_get_mcs_group(bw_pwrs2, Nss, mode, tx_chains); + if ((powers1 != NULL) && (powers2 != NULL)) { + for (i = 0; i < WL_RATESET_SZ_HT_MCS; i++) + (fn)(context, (uint8*)powers1++, (uint8*)powers2++); + } + } +} + + +/* Map the given function with its context value over the two power vectors */ +void +ppr_map_vec_vht_mcs(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, + ppr_t* pprptr2, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, wl_tx_chains_t + tx_chains) +{ + pprpbw_t* bw_pwrs1; + pprpbw_t* bw_pwrs2; + int8* powers1; + int8* powers2; + uint i; + + bw_pwrs1 = ppr_get_bw_powers(pprptr1, bw); + bw_pwrs2 = ppr_get_bw_powers(pprptr2, bw); + if ((bw_pwrs1 != NULL) && (bw_pwrs2 != NULL)) { + powers1 = (int8*)ppr_get_mcs_group(bw_pwrs1, Nss, mode, tx_chains); + powers2 = (int8*)ppr_get_mcs_group(bw_pwrs2, Nss, mode, tx_chains); + if ((powers1 != NULL) && (powers2 != NULL)) { + for (i = 0; i < WL_RATESET_SZ_VHT_MCS; i++) + (fn)(context, (uint8*)powers1++, (uint8*)powers2++); + } + } +} + + +/* Map the given function with its context value over the two power vectors */ + +void +ppr_map_vec_all(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, ppr_t* pprptr2) +{ + uint i; + pprpbw_t* bw_pwrs1; + pprpbw_t* bw_pwrs2; + int8* rptr1 = (int8*)&pprptr1->ppr_bw; + int8* rptr2 = (int8*)&pprptr2->ppr_bw; + + bw_pwrs1 = ppr_get_bw_powers(pprptr1, WL_TX_BW_20); + bw_pwrs2 = ppr_get_bw_powers(pprptr2, WL_TX_BW_20); + if ((bw_pwrs1 != NULL) && (bw_pwrs2 != NULL)) { + rptr1 = (int8*)bw_pwrs1; + rptr2 = (int8*)bw_pwrs2; + for (i = 0; i < sizeof(pprpbw_t); i++, rptr1++, rptr2++) { + (fn)(context, (uint8*)rptr1, (uint8*)rptr2); + } + } + + bw_pwrs1 = ppr_get_bw_powers(pprptr1, WL_TX_BW_40); + bw_pwrs2 = ppr_get_bw_powers(pprptr2, WL_TX_BW_40); + + if ((bw_pwrs1 != NULL) && (bw_pwrs2 != NULL)) { + rptr1 = (int8*)bw_pwrs1; + rptr2 = (int8*)bw_pwrs2; + for (i = 0; i < sizeof(pprpbw_t); i++, rptr1++, rptr2++) { + (fn)(context, (uint8*)rptr1, (uint8*)rptr2); + } + + bw_pwrs1 = ppr_get_bw_powers(pprptr1, WL_TX_BW_20IN40); + bw_pwrs2 = ppr_get_bw_powers(pprptr2, WL_TX_BW_20IN40); + if ((bw_pwrs1 != NULL) && (bw_pwrs2 != NULL)) { + rptr1 = (int8*)bw_pwrs1; + rptr2 = (int8*)bw_pwrs2; + for (i = 0; i < sizeof(pprpbw_t); i++, rptr1++, rptr2++) { + (fn)(context, (uint8*)rptr1, (uint8*)rptr2); + } + } + } + + bw_pwrs1 = ppr_get_bw_powers(pprptr1, WL_TX_BW_80); + bw_pwrs2 = ppr_get_bw_powers(pprptr2, WL_TX_BW_80); + if ((bw_pwrs1 != NULL) && (bw_pwrs2 != NULL)) { + rptr1 = (int8*)bw_pwrs1; + rptr2 = (int8*)bw_pwrs2; + for (i = 0; i < sizeof(pprpbw_t); i++, rptr1++, rptr2++) { + (fn)(context, (uint8*)rptr1, (uint8*)rptr2); + } + + bw_pwrs1 = ppr_get_bw_powers(pprptr1, WL_TX_BW_20IN80); + bw_pwrs2 = ppr_get_bw_powers(pprptr2, WL_TX_BW_20IN80); + if ((bw_pwrs1 != NULL) && (bw_pwrs2 != NULL)) { + rptr1 = (int8*)bw_pwrs1; + rptr2 = (int8*)bw_pwrs2; + for (i = 0; i < sizeof(pprpbw_t); i++, rptr1++, rptr2++) { + (fn)(context, (uint8*)rptr1, (uint8*)rptr2); + } + } + + bw_pwrs1 = ppr_get_bw_powers(pprptr1, WL_TX_BW_40IN80); + bw_pwrs2 = ppr_get_bw_powers(pprptr2, WL_TX_BW_40IN80); + if ((bw_pwrs1 != NULL) && (bw_pwrs2 != NULL)) { + rptr1 = (int8*)bw_pwrs1; + rptr2 = (int8*)bw_pwrs2; + for (i = 0; i < sizeof(pprpbw_t); i++, rptr1++, rptr2++) { + (fn)(context, (uint8*)rptr1, (uint8*)rptr2); + } + } + } +} + + +/* Set PPR struct to a certain power level */ +void +ppr_set_cmn_val(ppr_t* pprptr, int8 val) +{ + memset((uchar*)&pprptr->ppr_bw, val, ppr_pwrs_size(pprptr->ch_bw)); +} + + +/* Make an identical copy of a ppr structure (for ppr_bw==all case) */ +void +ppr_copy_struct(ppr_t* pprptr_s, ppr_t* pprptr_d) +{ + int8* rptr_s = (int8*)&pprptr_s->ppr_bw; + int8* rptr_d = (int8*)&pprptr_d->ppr_bw; + /* ASSERT(ppr_pwrs_size(pprptr_d->ch_bw) >= ppr_pwrs_size(pprptr_s->ch_bw)); */ + + if (pprptr_s->ch_bw == pprptr_d->ch_bw) + bcopy(rptr_s, rptr_d, ppr_pwrs_size(pprptr_s->ch_bw)); + else { + const pprpbw_t* src_bw_pwrs; + pprpbw_t* dest_bw_pwrs; + + src_bw_pwrs = ppr_get_bw_powers(pprptr_s, WL_TX_BW_20); + dest_bw_pwrs = ppr_get_bw_powers(pprptr_d, WL_TX_BW_20); + if (src_bw_pwrs && dest_bw_pwrs) + bcopy((const uint8*)src_bw_pwrs, (uint8*)dest_bw_pwrs, + sizeof(*src_bw_pwrs)); + + src_bw_pwrs = ppr_get_bw_powers(pprptr_s, WL_TX_BW_40); + dest_bw_pwrs = ppr_get_bw_powers(pprptr_d, WL_TX_BW_40); + if (src_bw_pwrs && dest_bw_pwrs) + bcopy((const uint8*)src_bw_pwrs, (uint8*)dest_bw_pwrs, + sizeof(*src_bw_pwrs)); + + src_bw_pwrs = ppr_get_bw_powers(pprptr_s, WL_TX_BW_20IN40); + dest_bw_pwrs = ppr_get_bw_powers(pprptr_d, WL_TX_BW_20IN40); + if (src_bw_pwrs && dest_bw_pwrs) + bcopy((const uint8*)src_bw_pwrs, (uint8*)dest_bw_pwrs, + sizeof(*src_bw_pwrs)); + + src_bw_pwrs = ppr_get_bw_powers(pprptr_s, WL_TX_BW_80); + dest_bw_pwrs = ppr_get_bw_powers(pprptr_d, WL_TX_BW_80); + if (src_bw_pwrs && dest_bw_pwrs) + bcopy((const uint8*)src_bw_pwrs, (uint8*)dest_bw_pwrs, + sizeof(*src_bw_pwrs)); + + src_bw_pwrs = ppr_get_bw_powers(pprptr_s, WL_TX_BW_20IN80); + dest_bw_pwrs = ppr_get_bw_powers(pprptr_d, WL_TX_BW_20IN80); + if (src_bw_pwrs && dest_bw_pwrs) + bcopy((const uint8*)src_bw_pwrs, (uint8*)dest_bw_pwrs, + sizeof(*src_bw_pwrs)); + + src_bw_pwrs = ppr_get_bw_powers(pprptr_s, WL_TX_BW_40IN80); + dest_bw_pwrs = ppr_get_bw_powers(pprptr_d, WL_TX_BW_40IN80); + if (src_bw_pwrs && dest_bw_pwrs) + bcopy((const uint8*)src_bw_pwrs, (uint8*)dest_bw_pwrs, + sizeof(*src_bw_pwrs)); + } +} + + +/* Subtract each power from a common value and re-store */ +void +ppr_cmn_val_minus(ppr_t* pprptr, int8 val) +{ + uint i; + int8* rptr = (int8*)&pprptr->ppr_bw; + + for (i = 0; i < ppr_pwrs_size(pprptr->ch_bw); i++, rptr++) { + if (*rptr != (int8)WL_RATE_DISABLED) + *rptr = val - *rptr; + } + +} + + +/* Subtract a common value from each power and re-store */ +void +ppr_minus_cmn_val(ppr_t* pprptr, int8 val) +{ + uint i; + int8* rptr = (int8*)&pprptr->ppr_bw; + + for (i = 0; i < ppr_pwrs_size(pprptr->ch_bw); i++, rptr++) { + if (*rptr != (int8)WL_RATE_DISABLED) + *rptr = (*rptr > val) ? (*rptr - val) : 0; + } + +} + + +/* Add a common value to each power and re-store */ +void +ppr_plus_cmn_val(ppr_t* pprptr, int8 val) +{ + uint i; + int8* rptr = (int8*)&pprptr->ppr_bw; + + for (i = 0; i < ppr_pwrs_size(pprptr->ch_bw); i++, rptr++) { + if (*rptr != (int8)WL_RATE_DISABLED) + *rptr += val; + } + +} + + +/* Multiply by a percentage */ +void +ppr_multiply_percentage(ppr_t* pprptr, uint8 val) +{ + uint i; + int8* rptr = (int8*)&pprptr->ppr_bw; + + for (i = 0; i < ppr_pwrs_size(pprptr->ch_bw); i++, rptr++) { + if (*rptr != (int8)WL_RATE_DISABLED) + *rptr = (*rptr * val) / 100; + } + +} + + +/* Compare two ppr variables p1 and p2, save the min value of each + * contents to variable p1 + */ +void +ppr_compare_min(ppr_t* p1, ppr_t* p2) +{ + uint i; + int8* rptr1 = NULL; + int8* rptr2 = NULL; + uint32 pprsize = 0; + + if (p1->ch_bw == p2->ch_bw) { + rptr1 = (int8*)&p1->ppr_bw; + rptr2 = (int8*)&p2->ppr_bw; + pprsize = ppr_pwrs_size(p1->ch_bw); + } + + for (i = 0; i < pprsize; i++, rptr1++, rptr2++) { + *rptr1 = MIN(*rptr1, *rptr2); + } +} + + +/* Compare two ppr variables p1 and p2, save the max. value of each + * contents to variable p1 + */ +void +ppr_compare_max(ppr_t* p1, ppr_t* p2) +{ + uint i; + int8* rptr1 = NULL; + int8* rptr2 = NULL; + uint32 pprsize = 0; + + if (p1->ch_bw == p2->ch_bw) { + rptr1 = (int8*)&p1->ppr_bw; + rptr2 = (int8*)&p2->ppr_bw; + pprsize = ppr_pwrs_size(p1->ch_bw); + } + + for (i = 0; i < pprsize; i++, rptr1++, rptr2++) { + *rptr1 = MAX(*rptr1, *rptr2); + } +} + + +/* Serialize the contents of the opaque ppr struct. + * Writes number of bytes copied, zero on error. + * Returns error code, BCME_OK if successful. + */ +int +ppr_serialize(const ppr_t* pprptr, uint8* buf, uint buflen, uint* bytes_copied) +{ + int err = BCME_OK; + if (buflen <= sizeof(ppr_ser_mem_flag_t)) { + err = BCME_BUFTOOSHORT; + } else { + ppr_ser_mem_flag_t *smem_flag = (ppr_ser_mem_flag_t *)buf; + uint32 flag = NTOH32(smem_flag->flag); + + /* check if memory contains a valid flag, if not, use current + * condition (num of chains, txbf etc.) to serialize data. + */ + if (NTOH32(smem_flag->magic_word) != PPR_SER_MEM_WORD) { + flag = ppr_get_flag(); + } + + if (buflen >= ppr_ser_size_by_flag(flag, pprptr->ch_bw)) { + *bytes_copied = ppr_serialize_data(pprptr, buf, flag); + } else { + err = BCME_BUFTOOSHORT; + } + } + return err; +} + + +/* Deserialize the contents of a buffer into an opaque ppr struct. + * Creates an opaque structure referenced by *pptrptr, NULL on error. + * Returns error code, BCME_OK if successful. + */ +int +ppr_deserialize_create(osl_t *osh, const uint8* buf, uint buflen, ppr_t** pprptr) +{ + const uint8* bptr = buf; + int err = BCME_OK; + ppr_t* lpprptr = NULL; + + if ((buflen > SER_HDR_LEN) && (bptr != NULL) && (*bptr == PPR_SERIALIZATION_VER)) { + const ppr_deser_header_t * ser_head = (const ppr_deser_header_t *)bptr; + wl_tx_bw_t ch_bw = ser_head->bw; + /* struct size plus header */ + uint32 ser_size = ppr_pwrs_size(ch_bw) + SER_HDR_LEN; + + if ((lpprptr = ppr_create(osh, ch_bw)) != NULL) { + uint32 flags = NTOH32(ser_head->flags); + uint16 per_band_size = NTOH16(ser_head->per_band_size); + /* set the data with default value before deserialize */ + ppr_set_cmn_val(lpprptr, WL_RATE_DISABLED); + + ppr_deser_cpy(lpprptr, bptr + sizeof(*ser_head), flags, ch_bw, + per_band_size); + } else if (buflen < ser_size) { + err = BCME_BUFTOOSHORT; + } else { + err = BCME_NOMEM; + } + } else if (buflen <= SER_HDR_LEN) { + err = BCME_BUFTOOSHORT; + } else if (bptr == NULL) { + err = BCME_BADARG; + } else { + err = BCME_VERSION; + } + *pprptr = lpprptr; + return err; +} + + +/* Deserialize the contents of a buffer into an opaque ppr struct. + * Creates an opaque structure referenced by *pptrptr, NULL on error. + * Returns error code, BCME_OK if successful. + */ +int +ppr_deserialize(ppr_t* pprptr, const uint8* buf, uint buflen) +{ + const uint8* bptr = buf; + int err = BCME_OK; + ASSERT(pprptr); + if ((buflen > SER_HDR_LEN) && (bptr != NULL) && (*bptr == PPR_SERIALIZATION_VER)) { + const ppr_deser_header_t * ser_head = (const ppr_deser_header_t *)bptr; + wl_tx_bw_t ch_bw = ser_head->bw; + + if (ch_bw == pprptr->ch_bw) { + uint32 flags = NTOH32(ser_head->flags); + uint16 per_band_size = NTOH16(ser_head->per_band_size); + ppr_set_cmn_val(pprptr, WL_RATE_DISABLED); + ppr_deser_cpy(pprptr, bptr + sizeof(*ser_head), flags, ch_bw, + per_band_size); + } else { + err = BCME_BADARG; + } + } else if (buflen <= SER_HDR_LEN) { + err = BCME_BUFTOOSHORT; + } else if (bptr == NULL) { + err = BCME_BADARG; + } else { + err = BCME_VERSION; + } + return err; +} + + +#ifdef WLTXPWR_CACHE + +#define MAX_TXPWR_CACHE_ENTRIES 2 +#define TXPWR_ALL_INVALID 0xff + +#define TXPWR_CACHE_TXPWR_MAX 0x7f /* WLC_TXPWR_MAX; */ + +/* transmit power cache */ +typedef struct txpwr_cache_entry { + chanspec_t chanspec; + ppr_t* cache_pwrs[TXPWR_CACHE_NUM_TYPES]; + uint8 tx_pwr_max[PPR_MAX_TX_CHAINS]; + uint8 tx_pwr_min[PPR_MAX_TX_CHAINS]; + int8 txchain_offsets[PPR_MAX_TX_CHAINS]; + uint8 data_invalid_flags; +#if !defined(WLC_LOW) || !defined(WLC_HIGH) + int stf_tx_target_pwr_min; +#endif +} txpwr_cache_entry_t; + +txpwr_cache_entry_t txpwr_cache[MAX_TXPWR_CACHE_ENTRIES] = {{0}, {0}}; + + +static txpwr_cache_entry_t* wlc_phy_txpwr_cache_get_entry(chanspec_t chanspec); +static txpwr_cache_entry_t* wlc_phy_txpwr_cache_get_diff_entry(chanspec_t chanspec); +static void wlc_phy_txpwr_cache_clear_entry(osl_t *osh, txpwr_cache_entry_t* entryptr); + + +/* Find a cache entry for the specified chanspec. */ +static txpwr_cache_entry_t* wlc_phy_txpwr_cache_get_entry(chanspec_t chanspec) +{ + uint i; + txpwr_cache_entry_t* entryptr = NULL; + + for (i = 0; i < (MAX_TXPWR_CACHE_ENTRIES) && (entryptr == NULL); i++) { + if (txpwr_cache[i].chanspec == chanspec) { + entryptr = &txpwr_cache[i]; + } + } + return entryptr; +} + + +/* Find a cache entry that's NOT for the specified chanspec. */ +static txpwr_cache_entry_t* wlc_phy_txpwr_cache_get_diff_entry(chanspec_t chanspec) +{ + uint i; + txpwr_cache_entry_t* entryptr = NULL; + + for (i = 0; i < (MAX_TXPWR_CACHE_ENTRIES) && (entryptr == NULL); i++) { + if (txpwr_cache[i].chanspec != chanspec) { + entryptr = &txpwr_cache[i]; + } + } + return entryptr; +} + + +/* Clear a specific cache entry. Delete any ppr_t structs and clear the pointers. */ +static void wlc_phy_txpwr_cache_clear_entry(osl_t *osh, txpwr_cache_entry_t* entryptr) +{ + uint i; + + entryptr->chanspec = 0; + + ASSERT(entryptr != NULL); + for (i = 0; i < TXPWR_CACHE_NUM_TYPES; i++) { + if (entryptr->cache_pwrs[i] != NULL) { + ppr_delete(osh, entryptr->cache_pwrs[i]); + entryptr->cache_pwrs[i] = NULL; + } + } + /* + * Don't bother with max, min and txchain_offsets, as they need to be + * initialised when the entry is setup for a new chanspec + */ +} + + +/* + * Get a ppr_t struct of a given type from the cache for the specified chanspec. + * Don't return the pointer if the cached data is invalid. + */ +ppr_t* wlc_phy_get_cached_pwr(chanspec_t chanspec, uint pwr_type) +{ + ppr_t* pwrptr = NULL; + + if (pwr_type < TXPWR_CACHE_NUM_TYPES) { + txpwr_cache_entry_t* entryptr = wlc_phy_txpwr_cache_get_entry(chanspec); + + if ((entryptr != NULL) && + ((entryptr->data_invalid_flags & (0x01 << pwr_type)) == 0)) + pwrptr = entryptr->cache_pwrs[pwr_type]; + } + + return pwrptr; +} + + +/* Add a ppr_t struct of a given type to the cache for the specified chanspec. */ +int wlc_phy_set_cached_pwr(osl_t *osh, chanspec_t chanspec, uint pwr_type, ppr_t* pwrptr) +{ + int result = BCME_NOTFOUND; + + if (pwr_type < TXPWR_CACHE_NUM_TYPES) { + txpwr_cache_entry_t* entryptr = wlc_phy_txpwr_cache_get_entry(chanspec); + + if (entryptr != NULL) { + if ((entryptr->cache_pwrs[pwr_type] != NULL) && + (entryptr->cache_pwrs[pwr_type] != pwrptr)) { + ppr_delete(osh, entryptr->cache_pwrs[pwr_type]); + } + entryptr->cache_pwrs[pwr_type] = pwrptr; + entryptr->data_invalid_flags &= ~(0x01 << pwr_type); /* now valid */ + result = BCME_OK; + } + } + return result; +} + +/* Indicate if we have cached a particular ppr_t struct for any chanspec. */ +bool wlc_phy_is_pwr_cached(uint pwr_type, ppr_t* pwrptr) +{ + bool result = FALSE; + uint i; + + if (pwr_type < TXPWR_CACHE_NUM_TYPES) { + for (i = 0; (i < MAX_TXPWR_CACHE_ENTRIES) && (result == FALSE); i++) { + if (txpwr_cache[i].cache_pwrs[pwr_type] == pwrptr) { + result = TRUE; + } + } + } + return result; +} + +#if !defined(WLC_LOW) || !defined(WLC_HIGH) +/* Get the minimum target power for all cores for the chanspec. */ +int wlc_phy_get_cached_stf_target_pwr_min(chanspec_t chanspec) +{ + int min_pwr = TXPWR_CACHE_TXPWR_MAX; + + txpwr_cache_entry_t* entryptr = wlc_phy_txpwr_cache_get_entry(chanspec); + + if ((entryptr != NULL) && + ((entryptr->data_invalid_flags & (TXPWR_STF_TARGET_PWR_MIN_INVALID)) == 0)) + min_pwr = entryptr->stf_tx_target_pwr_min; + + return min_pwr; +} + + +/* set the minimum target power for all cores for the chanspec. */ +int wlc_phy_set_cached_stf_target_pwr_min(chanspec_t chanspec, int min_pwr) +{ + int result = BCME_NOTFOUND; + + txpwr_cache_entry_t* entryptr = wlc_phy_txpwr_cache_get_entry(chanspec); + + if (entryptr != NULL) { + entryptr->stf_tx_target_pwr_min = min_pwr; + entryptr->data_invalid_flags &= ~TXPWR_STF_TARGET_PWR_MIN_INVALID; /* now valid */ + result = BCME_OK; + } + return result; +} +#endif /* !WLC_HIGH || !WLC_LOW */ + +/* Get the maximum power for the specified core and chanspec. */ +uint8 wlc_phy_get_cached_pwr_max(chanspec_t chanspec, uint core) +{ + uint8 max_pwr = WL_RATE_DISABLED; + + if (core < PPR_MAX_TX_CHAINS) { + txpwr_cache_entry_t* entryptr = wlc_phy_txpwr_cache_get_entry(chanspec); + + if (entryptr != NULL) + max_pwr = entryptr->tx_pwr_max[core]; + } + + return max_pwr; +} + + +/* Set the maximum power for the specified core and chanspec. */ +int wlc_phy_set_cached_pwr_max(chanspec_t chanspec, uint core, uint8 max_pwr) +{ + int result = BCME_NOTFOUND; + + if (core < PPR_MAX_TX_CHAINS) { + txpwr_cache_entry_t* entryptr = wlc_phy_txpwr_cache_get_entry(chanspec); + + if (entryptr != NULL) { + entryptr->tx_pwr_max[core] = max_pwr; + result = BCME_OK; + } + } + return result; +} + + +/* Get the minimum power for the specified core and chanspec. */ +uint8 wlc_phy_get_cached_pwr_min(chanspec_t chanspec, uint core) +{ + uint8 min_pwr = WL_RATE_DISABLED; + + if (core < PPR_MAX_TX_CHAINS) { + txpwr_cache_entry_t* entryptr = wlc_phy_txpwr_cache_get_entry(chanspec); + + if (entryptr != NULL) + min_pwr = entryptr->tx_pwr_min[core]; + } + + return min_pwr; +} + + +/* Set the minimum power for the specified core and chanspec. */ +int wlc_phy_set_cached_pwr_min(chanspec_t chanspec, uint core, uint8 min_pwr) +{ + int result = BCME_NOTFOUND; + + if (core < PPR_MAX_TX_CHAINS) { + txpwr_cache_entry_t* entryptr = wlc_phy_txpwr_cache_get_entry(chanspec); + + if (entryptr != NULL) { + entryptr->tx_pwr_min[core] = min_pwr; + result = BCME_OK; + } + } + return result; +} + + +/* Get the txchain offsets for the specified chanspec. */ +int8 wlc_phy_get_cached_txchain_offsets(chanspec_t chanspec, uint core) +{ + uint8 offset = WL_RATE_DISABLED; + + if (core < PPR_MAX_TX_CHAINS) { + txpwr_cache_entry_t* entryptr = wlc_phy_txpwr_cache_get_entry(chanspec); + + if (entryptr != NULL) + offset = entryptr->txchain_offsets[core]; + } + + return offset; +} + + +/* Set the txchain offsets for the specified chanspec. */ +int wlc_phy_set_cached_txchain_offsets(chanspec_t chanspec, uint core, int8 offset) +{ + int result = BCME_NOTFOUND; + + if (core < PPR_MAX_TX_CHAINS) { + txpwr_cache_entry_t* entryptr = wlc_phy_txpwr_cache_get_entry(chanspec); + + if (entryptr != NULL) { + entryptr->txchain_offsets[core] = offset; + result = BCME_OK; + } + } + return result; +} + + +/* Indicate if we have a cache entry for the specified chanspec. */ +bool wlc_phy_txpwr_cache_is_cached(chanspec_t chanspec) +{ + bool result = FALSE; + + if (wlc_phy_txpwr_cache_get_entry(chanspec)) { + result = TRUE; + } + return result; +} + + +/* Find a cache entry that's NOT for the specified chanspec. Return the chanspec. */ +chanspec_t wlc_phy_txpwr_cache_find_other_cached_chanspec(chanspec_t chanspec) +{ + chanspec_t chan = 0; + + txpwr_cache_entry_t* entryptr = wlc_phy_txpwr_cache_get_diff_entry(chanspec); + if (entryptr != NULL) { + chan = entryptr->chanspec; + } + return chan; +} + + +/* Find a specific cache entry and clear it. */ +void wlc_phy_txpwr_cache_clear(osl_t *osh, chanspec_t chanspec) +{ + txpwr_cache_entry_t* entryptr = wlc_phy_txpwr_cache_get_entry(chanspec); + if (entryptr != NULL) { + wlc_phy_txpwr_cache_clear_entry(osh, entryptr); + } +} + + +/* Invalidate all cached data. */ +void wlc_phy_txpwr_cache_invalidate(void) +{ + uint j; + + for (j = 0; j < MAX_TXPWR_CACHE_ENTRIES; j++) { + txpwr_cache_entry_t* entryptr = &txpwr_cache[j]; + if (entryptr->chanspec != 0) { + uint i; + entryptr->data_invalid_flags = TXPWR_ALL_INVALID; + for (i = 0; i < PPR_MAX_TX_CHAINS; i++) { + entryptr->tx_pwr_min[i] = TXPWR_CACHE_TXPWR_MAX; + entryptr->tx_pwr_max[i] = WL_RATE_DISABLED; + entryptr->txchain_offsets[i] = WL_RATE_DISABLED; + } +#if !defined(WLC_LOW) || !defined(WLC_HIGH) + entryptr->stf_tx_target_pwr_min = TXPWR_CACHE_TXPWR_MAX; +#endif + } + } +} + + +/* Clear all cache entries. */ +void wlc_phy_txpwr_cache_close(osl_t *osh) +{ + uint i; + + for (i = 0; i < MAX_TXPWR_CACHE_ENTRIES; i++) { + txpwr_cache_entry_t* entryptr = &txpwr_cache[i]; + if (entryptr->chanspec != 0) { + wlc_phy_txpwr_cache_clear_entry(osh, entryptr); + } + } +} + + +/* Find an empty cache entry and initialise it. */ +int wlc_phy_txpwr_setup_entry(chanspec_t chanspec) +{ + int result = BCME_NOTFOUND; + /* find an empty entry */ + txpwr_cache_entry_t* entryptr = wlc_phy_txpwr_cache_get_entry(0); + if (entryptr != NULL) { + uint i; + + entryptr->chanspec = chanspec; + for (i = 0; i < PPR_MAX_TX_CHAINS; i++) { + entryptr->tx_pwr_min[i] = TXPWR_CACHE_TXPWR_MAX; /* WLC_TXPWR_MAX; */ + entryptr->tx_pwr_max[i] = WL_RATE_DISABLED; + entryptr->txchain_offsets[i] = WL_RATE_DISABLED; + } +#if !defined(WLC_LOW) || !defined(WLC_HIGH) + entryptr->stf_tx_target_pwr_min = TXPWR_CACHE_TXPWR_MAX; +#endif +#if !defined(WLC_HIGH) + entryptr->data_invalid_flags |= TXPWR_STF_TARGET_PWR_NOT_CACHED; +#endif + result = BCME_OK; + } + return result; +} + +#ifndef WLC_LOW +/* Drop any reference to a particular ppr_t struct from the cache. */ +void wlc_phy_uncache_pwr(uint pwr_type, ppr_t* pwrptr) +{ + bool result = FALSE; + uint i; + + if (pwr_type < TXPWR_CACHE_NUM_TYPES) { + for (i = 0; (i < MAX_TXPWR_CACHE_ENTRIES) && (result == FALSE); i++) { + if (txpwr_cache[i].cache_pwrs[pwr_type] == pwrptr) { + txpwr_cache[i].cache_pwrs[pwr_type] = NULL; + } + } + } +} +#endif + +#if !defined(WLC_HIGH) +bool wlc_phy_get_stf_ppr_cached(chanspec_t chanspec) +{ + bool ret = FALSE; + txpwr_cache_entry_t *entryptr = wlc_phy_txpwr_cache_get_entry(chanspec); + if (entryptr != NULL) + ret = !(entryptr->data_invalid_flags & TXPWR_STF_TARGET_PWR_NOT_CACHED); + return ret; +} + +void wlc_phy_set_stf_ppr_cached(chanspec_t chanspec, bool bcached) +{ + txpwr_cache_entry_t *entryptr = wlc_phy_txpwr_cache_get_entry(chanspec); + if (entryptr != NULL) { + if (bcached) + entryptr->data_invalid_flags &= ~TXPWR_STF_TARGET_PWR_NOT_CACHED; + else + entryptr->data_invalid_flags |= TXPWR_STF_TARGET_PWR_NOT_CACHED; + } +} +#endif /* !defined(WLC_HIGH) */ + +#endif /* WLTXPWR_CACHE */ diff --git a/external/cache/sources/wl/wl/wlc_ppr.h b/external/cache/sources/wl/wl/wlc_ppr.h new file mode 100644 index 0000000..cd7db85 --- /dev/null +++ b/external/cache/sources/wl/wl/wlc_ppr.h @@ -0,0 +1,340 @@ +/* + * PHY module Power-per-rate API. Provides interface functions and definitions for opaque + * ppr structure for use containing regulatory and board limits and tx power targets. + * + * $ Copyright Broadcom Corporation $ + * + * $Id: $ + */ + +#ifndef _wlc_ppr_h_ +#define _wlc_ppr_h_ + +#include +#include +#ifdef BCMDRIVER +#include +#else +#define osl_t void +#endif + +/* Helper macro */ +#define PPR_CHSPEC_BW(x) (CHSPEC_IS80(x) ? WL_TX_BW_80 : \ + (CHSPEC_IS40(x) ? WL_TX_BW_40 : WL_TX_BW_20)) + +#ifndef BCMPHYCORENUM +#define PPR_MAX_TX_CHAINS 3 +#else +#if (BCMPHYCORENUM < 1) || (BCMPHYCORENUM > 3) +#error Invalid number of PHY cores +#endif /* BCMPHYCORENUM < 1 || BCMPHYCORENUM > 3 */ +#define PPR_MAX_TX_CHAINS (BCMPHYCORENUM) +#endif /* !defined(BCMPHYCORENUM) */ + +/* Opaque PPR data - it keeps its structure to itself */ +typedef struct ppr ppr_t; + + +/* Power values for DSSS 1, 2, 5.5, 11 */ +typedef struct ppr_dsss_rateset { int8 pwr[WL_RATESET_SZ_DSSS]; } ppr_dsss_rateset_t; + +/* Power values for OFDM 6, 9, 12... 54 */ +typedef struct ppr_ofdm_rateset { int8 pwr[WL_RATESET_SZ_OFDM]; } ppr_ofdm_rateset_t; + +/* Power values one set of 8 HT MCS values (0-7, 8-15, etc) */ +typedef struct ppr_ht_mcs_rateset { int8 pwr[WL_RATESET_SZ_HT_MCS]; } ppr_ht_mcs_rateset_t; + +/* Power values one set of 10 VHT MCS values (0-9) */ +typedef struct ppr_vht_mcs_rateset { int8 pwr[WL_RATESET_SZ_VHT_MCS]; } ppr_vht_mcs_rateset_t; + + +/* API Routines */ + +/* Initialization routine for opaque PPR struct */ +void ppr_init(ppr_t* pprptr, wl_tx_bw_t bw); + +/* Reinitialization routine for opaque PPR struct */ +void ppr_clear(ppr_t* pprptr); + + +/* Size routine for user alloc/dealloc */ +uint32 ppr_size(wl_tx_bw_t bw); + +/* Size routine for user serialization alloc */ +uint32 ppr_ser_size(const ppr_t* pprptr); + +/* Size routine for user serialization alloc for a given bw */ +uint32 ppr_ser_size_by_bw(wl_tx_bw_t bw); + +/* Init allocated memory with a ppr serialization head + * This function must be called if serialization side has different + * compilation conditions (e.g PPR_MAX_TX_CHAINS, WL_BEAMFORMING etc.) + */ +int ppr_init_ser_mem_by_bw(uint8* pbuf, wl_tx_bw_t bw, uint32 len); + +/* Init allocated memory with a ppr serialization head for the given ppr pointer + * This function must be called if serialization side has different + * compilation conditions (e.g PPR_MAX_TX_CHAINS, WL_BEAMFORMING etc.) + */ +int ppr_init_ser_mem(uint8* pbuf, ppr_t * ppr, uint32 len); + +/* Constructor routine for opaque PPR struct */ +ppr_t* ppr_create(osl_t *osh, wl_tx_bw_t bw); + +/* Destructor routine for opaque PPR struct */ +void ppr_delete(osl_t *osh, ppr_t* pprptr); + +/* Type routine for inferring opaque structure size */ +wl_tx_bw_t ppr_get_ch_bw(const ppr_t* pprptr); + +/* Type routine to get ppr supported maximum bw */ +wl_tx_bw_t ppr_get_max_bw(void); + +/* Get the DSSS values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_get_dsss(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_chains_t tx_chains, + ppr_dsss_rateset_t* dsss); + +/* Get the OFDM values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_get_ofdm(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_mode_t mode, wl_tx_chains_t tx_chains, + ppr_ofdm_rateset_t* ofdm); + +/* Get the HT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_get_ht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, ppr_ht_mcs_rateset_t* mcs); + +/* Get the VHT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_get_vht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, ppr_vht_mcs_rateset_t* mcs); + + +/* Routines to set target powers per rate for a whole rate set */ + +/* Set the DSSS values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_set_dsss(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_chains_t tx_chains, + const ppr_dsss_rateset_t* dsss); + +/* Set the OFDM values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_set_ofdm(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_mode_t mode, wl_tx_chains_t tx_chains, + const ppr_ofdm_rateset_t* ofdm); + +/* Set the HT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_set_ht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, const ppr_ht_mcs_rateset_t* mcs); + +/* Set the VHT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_set_vht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, const ppr_vht_mcs_rateset_t* mcs); + + +/* Routines to set a whole rate set to a single target value */ + +/* Set the DSSS values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_set_same_dsss(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_chains_t tx_chains, const int8 power); + +/* Set the OFDM values for the given number of tx_chains and 20, 20in40, etc. */ +int ppr_set_same_ofdm(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_mode_t mode, wl_tx_chains_t tx_chains, + const int8 power); + +/* Set the HT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_set_same_ht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, const int8 power); + + +/* Set the HT MCS values for the group specified by Nss, with the given bw and tx chains */ +int ppr_set_same_vht_mcs(ppr_t* pprptr, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains, const int8 power); + + +/* Helper routines to operate on the entire ppr set */ + +/* Ensure no rate limit is greater than the specified maximum */ +uint ppr_apply_max(ppr_t* pprptr, int8 max); + +/* + * Reduce total transmitted power to level of constraint. + * For two chain rates, the per-antenna power must be halved. + * For three chain rates, it must be a third of the constraint. + */ +uint ppr_apply_constraint_total_tx(ppr_t* pprptr, int8 constraint); + +/* Ensure no rate limit is lower than the specified minimum */ +uint ppr_apply_min(ppr_t* pprptr, int8 min); + + +/* Ensure no rate limit in this ppr set is greater than the corresponding limit in ppr_cap */ +uint ppr_apply_vector_ceiling(ppr_t* pprptr, const ppr_t* ppr_cap); + +/* Ensure no rate limit in this ppr set is lower than the corresponding limit in ppr_min */ +uint ppr_apply_vector_floor(ppr_t* pprptr, const ppr_t* ppr_min); + + +/* Get the maximum power in the ppr set */ +int8 ppr_get_max(ppr_t* pprptr); + +/* + * Get the minimum power in the ppr set excluding disallowed + * rates and powers set to the minimum for the phy + */ +int8 ppr_get_min(ppr_t* pprptr, int8 floor); + + +/* Get the maximum power for a given bandwidth in the ppr set */ +int8 ppr_get_max_for_bw(ppr_t* pprptr, wl_tx_bw_t bw); + +/* Get the minimum power for a given bandwidth in the ppr set */ +int8 ppr_get_min_for_bw(ppr_t* pprptr, wl_tx_bw_t bw); + + +typedef void (*ppr_mapfn_t)(void *context, uint8 *a, uint8 *b); + +/* Map the given function with its context value over the two power vectors */ +void ppr_map_vec_dsss(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, + ppr_t* pprptr2, wl_tx_bw_t bw, wl_tx_chains_t tx_chains); + +/* Map the given function with its context value over the two power vectors */ +void ppr_map_vec_ofdm(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, + ppr_t* pprptr2, wl_tx_bw_t bw, wl_tx_mode_t mode, wl_tx_chains_t tx_chains); + +/* Map the given function with its context value over the two power vectors */ +void ppr_map_vec_ht_mcs(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, + ppr_t* pprptr2, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains); + +/* Map the given function with its context value over the two power vectors */ +void ppr_map_vec_vht_mcs(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, + ppr_t* pprptr2, wl_tx_bw_t bw, wl_tx_nss_t Nss, wl_tx_mode_t mode, + wl_tx_chains_t tx_chains); + +/* Map the given function with its context value over the two power vectors */ +void ppr_map_vec_all(ppr_mapfn_t fn, void* context, ppr_t* pprptr1, ppr_t* pprptr2); + +/* Get the first index that is larger than a given power level */ +int16 ppr_get_idx(ppr_t* pprptr, int8 pwr); + +/* Set PPR struct to a certain power level */ +void ppr_set_cmn_val(ppr_t* pprptr, int8 val); + +/* Make an identical copy of a ppr structure (for ppr_bw==all case) */ +void ppr_copy_struct(ppr_t* pprptr_s, ppr_t* pprptr_d); + +/* Subtract each power from a common value and re-store */ +void ppr_cmn_val_minus(ppr_t* pprptr, int8 val); + +/* Compare two ppr variables p1 and p2, save the min. value of each + * contents to variable p1 + */ +void ppr_compare_min(ppr_t* p1, ppr_t* p2); + +/* compare two ppr variables p1 and p2, save the max. value of each + * contents to variable p1 + */ +void ppr_compare_max(ppr_t* p1, ppr_t* p2); + +/* Serialize the contents of the opaque ppr struct. + * Writes number of bytes copied, zero on error. + * Returns error code, BCME_OK if successful. + */ +int ppr_serialize(const ppr_t* pprptr, uint8* buf, uint buflen, uint* bytes_copied); + +/* Deserialize the contents of a buffer into an existing opaque ppr struct. + * The ppr struct *must* be of the same type as the one that was serialized. + * Returns error code, BCME_OK if successful. + */ +int ppr_deserialize(ppr_t* pprptr, const uint8* buf, uint buflen); + +/* Deserialize the contents of a buffer into a new opaque ppr struct. + * Creates an opaque structure referenced by *pptrptr, NULL on error. + * Returns error code, BCME_OK if successful. + */ +int ppr_deserialize_create(osl_t *osh, const uint8* buf, uint buflen, ppr_t** pprptr); + +/* Subtract a common value from each power and re-store */ +void ppr_minus_cmn_val(ppr_t* pprptr, int8 val); + +/* Add a common value to the given bw struct components */ +void ppr_plus_cmn_val(ppr_t* pprptr, int8 val); + +/* Multiply a percentage */ +void ppr_multiply_percentage(ppr_t* pprptr, uint8 val); + + +#ifdef WLTXPWR_CACHE + +/** + * Usage of the WLTXPWR_CACHE API: + * 1. Reserve one or more entries in the cache for a specific chanspec: + * wlc_phy_txpwr_setup_entry(chanspec1); + * wlc_phy_txpwr_setup_entry(chanspec2); + * 2. Use any of the getter/setter functions. Note that they may return an error on a chanspec + * that was not reserved. For setter functions, for pointer type arguments (e.g. ppr_t), the + * cache maintains a reference to the caller provided object rather than copying it. + * 3. Use wlc_phy_txpwr_cache_clear() or wlc_phy_txpwr_cache_invalidate() to get rid of cache + * entries. Note that this clears, amongst others, ppr_t structs. + * + * For non-BMAC builds, only the cache is allowed to delete the ppr_t object, and the driver code is + * not allowed to reuse it for another channel as it can when the cache is not being used. + * + * For BMAC builds, the cache has to be made to release the stf offsets object to avoid some nasty + * race conditions. + * + * Mike thinks when this is reimplemented for trunk he would consider having a reference count + * associated with each object to make this cleaner. + * + * Note that the functions start with wlc_phy_* despite not residing in the PHY code. This is + * probably for historical reasons. + */ + +enum txpwr_cache_info_type { + TXPWR_CACHE_STF_OFFSETS, /* PPR offsets for stf */ + TXPWR_CACHE_POWER_OFFSETS, /* PPR offsets for phy */ + TXPWR_CACHE_NUM_TYPES, /* How many types of pwr info */ +}; + +#define TXPWR_STF_PWR_MIN_INVALID 0x80 +#define TXPWR_STF_TARGET_PWR_MIN_INVALID 0x40 +#define TXPWR_STF_TARGET_PWR_NOT_CACHED 0x20 + +extern ppr_t* wlc_phy_get_cached_pwr(chanspec_t chanspec, uint pwr_type); + +extern int wlc_phy_set_cached_pwr(osl_t *osh, chanspec_t chanspec, uint pwr_type, ppr_t* pwrptr); + +extern uint8 wlc_phy_get_cached_pwr_max(chanspec_t chanspec, uint core); + +extern int wlc_phy_set_cached_pwr_max(chanspec_t chanspec, uint core, uint8 max_pwr); + +extern uint8 wlc_phy_get_cached_pwr_min(chanspec_t chanspec, uint core); + +extern int wlc_phy_set_cached_pwr_min(chanspec_t chanspec, uint core, uint8 min_pwr); + +extern int wlc_phy_get_cached_stf_target_pwr_min(chanspec_t chanspec); + +extern int wlc_phy_set_cached_stf_target_pwr_min(chanspec_t chanspec, int min_pwr); + +extern int8 wlc_phy_get_cached_txchain_offsets(chanspec_t chanspec, uint core); + +extern int wlc_phy_set_cached_txchain_offsets(chanspec_t chanspec, uint core, int8 offset); + +extern bool wlc_phy_txpwr_cache_is_cached(chanspec_t chanspec); + +extern bool wlc_phy_is_pwr_cached(uint pwr_type, ppr_t* pwrptr); + +extern void wlc_phy_uncache_pwr(uint pwr_type, ppr_t* pwrptr); + +extern void wlc_phy_uncache_pwr(uint pwr_type, ppr_t* pwrptr); + +extern chanspec_t wlc_phy_txpwr_cache_find_other_cached_chanspec(chanspec_t chanspec); + +extern void wlc_phy_txpwr_cache_clear(osl_t *osh, chanspec_t chanspec); + +extern void wlc_phy_txpwr_cache_invalidate(void); + +extern void wlc_phy_txpwr_cache_close(osl_t *osh); + +extern int wlc_phy_txpwr_setup_entry(chanspec_t chanspec); + +extern bool wlc_phy_get_stf_ppr_cached(chanspec_t chanspec); + +extern void wlc_phy_set_stf_ppr_cached(chanspec_t chanspec, bool bcached); +#endif /* WLTXPWR_CACHE */ + +#endif /* _wlc_ppr_h_ */ diff --git a/external/cache/sources/wl/wl/wlm.c b/external/cache/sources/wl/wl/wlm.c new file mode 100644 index 0000000..9ee03c9 --- /dev/null +++ b/external/cache/sources/wl/wl/wlm.c @@ -0,0 +1,3357 @@ +/* + * Wlm (Wireless LAN Manufacturing) test library. + * + * Copyright (C) 2013, Broadcom Corporation + * All Rights Reserved. + * + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation; + * the contents of this file may not be disclosed to third parties, copied + * or duplicated in any form, in whole or in part, without the prior + * written permission of Broadcom Corporation. + * + * $Id: wlm.c 387222 2013-02-25 01:44:48Z $ + */ + +#if defined(WIN32) +#include +#endif +#include +#include +#include + +#include // cdc_ioctl_t used in wlu_remote.h +#if defined(WIN32) +#include +#endif +#include +#include // ARRAYSIZE, bcmerrorstr() +#include // SROM4_WORDS +#include // pavars_t +#include +#if defined(WIN32) +#include // ADAPTER +#endif +#include // ETHER_ADDR_LEN + +#include +#include // ipv4_addr +#include // struct sockaddr_in +#include +#include + +#include +#include "wlu_remote.h" // wl remote type defines (ex: NO_REMOTE) +#include "wlu_pipe.h" // rwl_open_pipe() +#include "wlu.h" // wl_ether_atoe() +#include "wlm.h" +#include "wlc_ppr.h" + +/* IOCTL swapping mode for Big Endian host with Little Endian dongle. Default to off */ +#define htod32(i) i +#define htod16(i) i +#define dtoh32(i) i +#define dtoh16(i) i +#define htodchanspec(i) i +#define dtohchanspec(i) i +#define htodenum(i) i +#define dtohenum(i) i + +#if defined(WIN32) +static HANDLE irh; +int adapter; +#else +static void * irh; +#define HANDLE void * +#endif + +#define MAX_INTERFACE_NAME_LENGTH 128 +static char interfaceName[MAX_INTERFACE_NAME_LENGTH + 1] = {0}; +static WLM_BAND curBand = WLM_BAND_AUTO; +static int ioctl_version; + +extern int wl_os_type_get_rwl(void); +extern void wl_os_type_set_rwl(int os_type); +extern int wl_ir_init_rwl(HANDLE *irh); +extern int wl_ir_init_adapter_rwl(HANDLE *irh, int adapter); +extern void wl_close_rwl(int remote_type, HANDLE irh); +extern int rwl_init_socket(void); + +extern int wlu_get(void *wl, int cmd, void *buf, int len); +extern int wlu_set(void *wl, int cmd, void *buf, int len); + +extern int wlu_iovar_get(void *wl, const char *iovar, void *outbuf, int len); +extern int wlu_iovar_set(void *wl, const char *iovar, void *param, int paramlen); +extern int wlu_iovar_getint(void *wl, const char *iovar, int *pval); +extern int wlu_iovar_setint(void *wl, const char *iovar, int val); +extern int wlu_iovar_getbuf(void *wl, const char *iovar, void *param, int paramlen, + void *bufptr, int buflen); +extern int wlu_iovar_setbuf(void *wl, const char *iovar, void *param, int paramlen, + void *bufptr, int buflen); + +extern int wlu_var_getbuf(void *wl, const char *iovar, void *param, int param_len, void **bufptr); +extern int wlu_var_setbuf(void *wl, const char *iovar, void *param, int param_len); +extern int wlu_var_getbuf_med(void *wl, const char *iovar, void *param, int parmlen, void **bufptr); +extern int wlu_var_setbuf_med(void *wl, const char *iovar, void *param, int param_len); +extern int wlu_var_getbuf_sm(void *wl, const char *iovar, void *param, int parmlen, void **bufptr); +extern int wlu_var_setbuf_sm(void *wl, const char *iovar, void *param, int param_len); + +extern int wl_seq_batch_in_client(bool enable); +extern int wl_seq_start(void *wl, cmd_t *cmd, char **argv); +extern int wl_seq_stop(void *wl, cmd_t *cmd, char **argv); + +extern char *ver2str(unsigned int vms, unsigned int vls); +static int wlmPhyTypeGet(void); +extern chanspec_t wl_chspec_to_legacy(chanspec_t chspec); + +#if defined(WIN32) +static void wlm_dump_bss_info(wl_bss_info_t *bi, char *scan_dump_buf, int *len); +static int wlm_format_ssid(char* buf, uint8* ssid, int ssid_len); +static char* wlm_ether_etoa(const struct ether_addr *n); +static const char* wlm_capmode2str(uint16 capability); +static char* wlm_wf_chspec_ntoa(chanspec_t chspec, char *buf); + +static int wlm_buf_to_args(char *line, char *new_argv[]); +static int wlm_process_args(void *wl, char **argv); +static cmd_t *wlm_find_cmd(char *name, int ap_mode, int remote_os_type); +#define WLM_NUM_ARGS 32 +#define MAX_COMMAND_RESULT_BUF_LEN 8192 +static const char *outf = "output.txt"; +#endif +static char errorString[256]; +static const char * +wlmLastError(void) +{ + static const char *bcmerrorstrtable[] = BCMERRSTRINGTABLE; + static char errorString[256]; + int bcmerror; + + memset(errorString, 0, sizeof(errorString)); + + if (wlu_iovar_getint(irh, "bcmerror", &bcmerror)) { + sprintf(errorString, "%s", "Failed to retrieve error"); + return errorString; + } + + if (bcmerror > 0 || bcmerror < BCME_LAST) { + sprintf(errorString, "%s", "Undefined error"); + return errorString; + } + + sprintf(errorString, "%s (%d)", bcmerrorstrtable[-bcmerror], bcmerror); + + return errorString; +} + +const char * +wlmGetLastError(void) +{ + return errorString; +} + +int wlmWLMVersionGet(const char **buffer) +{ + *buffer = WLM_VERSION_STR; + return TRUE; +} + +int wlmApiInit(void) +{ + curBand = WLM_BAND_AUTO; + return TRUE; +} + +int wlmApiCleanup(void) +{ + wl_close_rwl(rwl_get_remote_type(), irh); + irh = 0; + return TRUE; +} + +int wlmSelectInterface(WLM_DUT_INTERFACE ifType, char *ifName, + WLM_DUT_SERVER_PORT dutServerPort, WLM_DUT_OS dutOs) +{ + int val; + + /* close previous handle */ + if (irh != NULL) { + wlmApiCleanup(); + } + + switch (ifType) { + case WLM_DUT_LOCAL: + rwl_set_remote_type(NO_REMOTE); + break; + case WLM_DUT_SERIAL: + rwl_set_remote_type(REMOTE_SERIAL); + break; + case WLM_DUT_SOCKET: + rwl_set_remote_type(REMOTE_SOCKET); + break; + case WLM_DUT_WIFI: + rwl_set_remote_type(REMOTE_WIFI); + break; + case WLM_DUT_DONGLE: + rwl_set_remote_type(REMOTE_DONGLE); + break; + default: + /* ERROR! Unknown interface! */ + return FALSE; + } + + if (ifName) { + strncpy(interfaceName, ifName, MAX_INTERFACE_NAME_LENGTH); + interfaceName[MAX_INTERFACE_NAME_LENGTH] = 0; + } + + switch (dutOs) { + case WLM_DUT_OS_LINUX: + wl_os_type_set_rwl(LINUX_OS); + break; + case WLM_DUT_OS_WIN32: + wl_os_type_set_rwl(WIN32_OS); + break; + default: + /* ERROR! Unknown OS! */ + return FALSE; + } + + switch (rwl_get_remote_type()) { + struct ipv4_addr temp; + case REMOTE_SOCKET: + if (!wl_atoip(interfaceName, &temp)) { + printf("wlmSelectInterface: IP address invalid\n"); + return FALSE; + } + rwl_set_server_ip(interfaceName); + rwl_set_server_port(dutServerPort); + rwl_init_socket(); + break; + case REMOTE_SERIAL: + rwl_set_serial_port_name(interfaceName); /* x (port number) or /dev/ttySx */ + if ((irh = rwl_open_pipe(rwl_get_remote_type(), + rwl_get_serial_port_name(), 0, 0)) == NULL) { + printf("wlmSelectInterface: rwl_open_pipe failed\n"); + return FALSE; + } + break; + case REMOTE_DONGLE: + rwl_set_serial_port_name(interfaceName); /* COMx or /dev/ttySx */ + if ((irh = rwl_open_pipe(rwl_get_remote_type(), "\0", 0, 0)) == NULL) { + printf("wlmSelectInterface: rwl_open_pipe failed\n"); + return FALSE; + } + break; + case REMOTE_WIFI: + if (!wl_ether_atoe(interfaceName, + (struct ether_addr *)rwl_get_wifi_mac())) { + printf("wlmSelectInterface: ethernet MAC address invalid\n"); + return FALSE; + } + /* intentionally no break here to pass through to NO_REMOTE case */ + case NO_REMOTE: +#if defined(WIN32) + adapter = atoi(interfaceName); + if (adapter == 0) + adapter = -1; + + if (wl_ir_init_adapter_rwl(&irh, adapter) != 0) { + printf("wlmSelectInterface: Adapter %d init failed\n", adapter); + return FALSE; + } +#else + if (wl_ir_init_rwl(&irh) != 0) { + printf("wlmSelectInterface: initialize failed\n"); + return FALSE; + } +#endif + break; + default: + /* ERROR! Invalid interface! + * NOTE: API should not allow code to come here. + */ + return FALSE; + } + + /* Query the IOCTL API version */ + if (wlu_get(irh, WLC_GET_VERSION, &val, sizeof(int)) < 0) { + printf("wlmSelectInterface: IOCTL Version query failed\n"); + return FALSE; + } + + ioctl_version = dtoh32(val); + if (ioctl_version != WLC_IOCTL_VERSION && + ioctl_version != 1) { + printf("wlmSelectInterface: Version mismatch, please upgrade." + "Got %d, expected %d or 1\n", + ioctl_version, WLC_IOCTL_VERSION); + return FALSE; + } + + + return TRUE; +} + +int wlmVersionGet(char *buf, int len) +{ + char fwVersionStr[256]; + int n = 0; + + if (buf == 0) { + printf("wlmVersionGet: buffer invalid\n"); + return FALSE; + } + + memset(buf, 0, sizeof(buf)); + + n += sprintf(buf, "wlm: "); + n += sprintf(buf + n, "%s", + ver2str(((EPI_MAJOR_VERSION) << 16) | + EPI_MINOR_VERSION, (EPI_RC_NUMBER << 16) | + EPI_INCREMENTAL_NUMBER)); + n += sprintf(buf + n, " "); + + /* query for 'ver' to get version info */ + if (wlu_iovar_get(irh, "ver", fwVersionStr, + (len < WLC_IOCTL_SMLEN) ? len : WLC_IOCTL_SMLEN)) { + printf("wlmVersionGet: %s\n", wlmLastError()); + return FALSE; + } + + n += sprintf(buf + n, "%s", fwVersionStr); + return TRUE; +} + +int wlmEnableAdapterUp(int enable) +{ + /* Enable/disable adapter */ + if (enable) + { + if (wlu_set(irh, WLC_UP, NULL, 0)) { + printf("wlmEnableAdapterUp: %s\n", wlmLastError()); + return FALSE; + } + } + else { + if (wlu_set(irh, WLC_DOWN, NULL, 0)) { + printf("wlmEnableAdapterUp: %s\n", wlmLastError()); + return FALSE; + } + } + + return TRUE; +} + +int wlmIsAdapterUp(int *up) +{ + /* Get 'isup' - check if adapter is up */ + up = dtoh32(up); + if (wlu_get(irh, WLC_GET_UP, up, sizeof(int))) { + printf("wlmIsAdapterUp: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmMinPowerConsumption(int enable) +{ + if (wlu_iovar_setint(irh, "mpc", enable)) { + printf("wlmMinPowerConsumption: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmMimoPreambleGet(int* type) +{ + if (wlu_iovar_getint(irh, "mimo_preamble", type)) { + printf("wlmMimoPreambleGet(): %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmMimoPreambleSet(int type) +{ + if (wlu_iovar_setint(irh, "mimo_preamble", type)) { + printf("wlmMimoPreambleSet(): %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmChannelSet(int channel) +{ + + /* Check band lock first before set channel */ + if ((channel <= 14) && (curBand != WLM_BAND_2G)) { + curBand = WLM_BAND_2G; + } else if ((channel > 14) && (curBand != WLM_BAND_5G)) { + curBand = WLM_BAND_5G; + } + + /* Set 'channel' */ + channel = htod32(channel); + if (wlu_set(irh, WLC_SET_CHANNEL, &channel, sizeof(channel))) { + printf("wlmChannelSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmRateSet(WLM_RATE rate) +{ + char aname[] = "a_rate"; + char bgname[] = "bg_rate"; + char *name; + + switch (curBand) { + case WLM_BAND_AUTO : + printf("wlmRateSet: must set channel or band lock first \n"); + return FALSE; + case WLM_BAND_DUAL : + printf("wlmRateSet: must set channel or band lock first\n"); + return FALSE; + case WLM_BAND_5G : + name = (char *)aname; + break; + case WLM_BAND_2G : + name = (char *)bgname; + break; + default : + return FALSE; + } + + rate = htod32(rate); + if (wlu_iovar_setint(irh, name, rate)) { + printf("wlmRateSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmLegacyRateSet(WLM_RATE rate) +{ + uint32 nrate = 0; + + if (ioctl_version == 1) { + nrate |= (rate & OLD_NRATE_RATE_MASK); + nrate |= (OLD_NRATE_STF_SISO << OLD_NRATE_STF_SHIFT) & OLD_NRATE_STF_MASK; + } else { + nrate = WL_RSPEC_ENCODE_RATE; /* 11abg */ + nrate |= (rate & WL_RSPEC_RATE_MASK); + } + + if (wlu_iovar_setint(irh, "nrate", (int)nrate)) { + printf("wlmMcsRateSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmMcsRateSet(WLM_MCS_RATE mcs_rate, WLM_STF_MODE stf_mode) +{ + uint32 nrate = 0; + uint stf; + + if (mcs_rate > 32) { + printf("wlmMcsRateSet: MCS %d out of range\n", mcs_rate); + return FALSE; + } + + if (ioctl_version == 1) { + nrate |= mcs_rate; + nrate |= OLD_NRATE_MCS_INUSE; + + if (!stf_mode) { + stf = 0; + if (mcs_rate <= HIGHEST_SINGLE_STREAM_MCS || + mcs_rate == 32) + stf = OLD_NRATE_STF_SISO; /* SISO */ + else + stf = OLD_NRATE_STF_SDM; /* SDM */ + } else + stf = stf_mode; + + nrate |= (stf << OLD_NRATE_STF_SHIFT) & OLD_NRATE_STF_MASK; + } else { + nrate = WL_RSPEC_ENCODE_HT; /* 11n HT */ + nrate |= mcs_rate; + + /* decode WLM stf value into tx expansion and STBC */ + if (stf_mode == WLM_STF_MODE_CDD) { + nrate |= (1 << WL_RSPEC_TXEXP_SHIFT); + } else if (stf_mode == WLM_STF_MODE_STBC) { + nrate |= WL_RSPEC_STBC; + } + } + + if (wlu_iovar_setint(irh, "nrate", (int)nrate)) { + printf("wlmMcsRateSet: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmHTRateSet(WLM_MCS_RATE mcs_rate, int stbc, int ldpc, int sgi, int tx_exp, int bw) +{ + uint32 rspec = 0; + char iov_2g[] = "2g_rate"; + char iov_5g[] = "5g_rate"; + char *name; + + switch (curBand) { + case WLM_BAND_AUTO : + printf("wlmHTRateSet: must set channel or band lock first \n"); + return FALSE; + case WLM_BAND_DUAL : + printf("wlmHTRateSet: must set channel or band lock first\n"); + return FALSE; + case WLM_BAND_5G : + name = (char *)iov_5g; + break; + case WLM_BAND_2G : + name = (char *)iov_2g; + break; + default : + printf("wlmHTRateSet: band setting unknow\n"); + return FALSE; + } + + /* set rate to auto ??? */ + if (mcs_rate < 0) + rspec = 0; + + /* 11n HT rate */ + rspec = WL_RSPEC_ENCODE_HT; + rspec |= mcs_rate; + + /* set bandwidth */ + if (bw == 20) { + bw = WL_RSPEC_BW_20MHZ; + } else if (bw == 40) { + bw = WL_RSPEC_BW_40MHZ; + } else if (bw == 80) { + bw = WL_RSPEC_BW_80MHZ; + } else if (bw == 160) { + bw = WL_RSPEC_BW_160MHZ; + } else { + printf("wlmHTRateSet: unexpected bandwidth specified \"%d\", " + "expected 20, 40, 80, or 160\n", bw); + return FALSE; + } + + if (tx_exp < 0 || tx_exp > 3) { + printf("wlmHTRataSet: tx expansion %d out of range [0-3]\n", tx_exp); + return FALSE; + } + /* set the other rspec fields */ + rspec |= (tx_exp << WL_RSPEC_TXEXP_SHIFT); + rspec |= bw; + rspec |= (stbc ? WL_RSPEC_STBC : 0); + rspec |= (ldpc ? WL_RSPEC_LDPC : 0); + rspec |= (sgi ? WL_RSPEC_SGI : 0); + + + if (wlu_iovar_setint(irh, name, rspec)) { + printf("wlmHTRateSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmVHTRateSet(WLM_MCS_RATE mcs_rate, int nss, int stbc, int ldpc, int sgi, int tx_exp, int bw) +{ + uint32 rspec = 0; + char iov_2g[] = "2g_rate"; + char iov_5g[] = "5g_rate"; + char *name; + + switch (curBand) { + case WLM_BAND_AUTO : + printf("wlmVHTRateSet: must set channel or band lock first \n"); + return FALSE; + case WLM_BAND_DUAL : + printf("wlmVHTRateSet: must set channel or band lock first\n"); + return FALSE; + case WLM_BAND_5G : + name = (char *)iov_5g; + break; + case WLM_BAND_2G : + name = (char *)iov_2g; + break; + default : + printf("wlmVHTRateSet: band setting unknow\n"); + return FALSE; + } + + /* set rate to auto */ + if (mcs_rate < 0) + rspec = 0; + + /* 11n VHT rate */ + rspec = WL_RSPEC_ENCODE_VHT; + + /* default NSS = 1 */ + if (nss == 0) + nss = 1; + + rspec |= (nss << WL_RSPEC_VHT_NSS_SHIFT) | mcs_rate; + + /* set bandwidth */ + if (bw == 20) { + bw = WL_RSPEC_BW_20MHZ; + } else if (bw == 40) { + bw = WL_RSPEC_BW_40MHZ; + } else if (bw == 80) { + bw = WL_RSPEC_BW_80MHZ; + } else if (bw == 160) { + bw = WL_RSPEC_BW_160MHZ; + } else { + printf("wlmHTRateSet: unexpected bandwidth specified \"%d\", " + "expected 20, 40, 80, or 160\n", bw); + return FALSE; + } + + if (tx_exp < 0 || tx_exp > 3) { + printf("wlmVHTRataSet: tx expansion %d out of range [0-3]\n", tx_exp); + return FALSE; + } + + /* set the other rspec fields */ + rspec |= tx_exp << WL_RSPEC_TXEXP_SHIFT; + rspec |= bw; + rspec |= (stbc ? WL_RSPEC_STBC : 0); + rspec |= (ldpc ? WL_RSPEC_LDPC : 0); + rspec |= (sgi ? WL_RSPEC_SGI : 0); + + if (wlu_iovar_setint(irh, name, rspec)) { + printf("wlmVHTRateSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmPreambleSet(WLM_PREAMBLE preamble) +{ + preamble = htod32(preamble); + + if (wlu_set(irh, WLC_SET_PLCPHDR, &preamble, sizeof(preamble))) { + printf("wlmPreambleSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmBandSet(WLM_BAND band) +{ + band = htod32(band); + + if (wlu_set(irh, WLC_SET_BAND, (void *)&band, sizeof(band))) { + printf("wlmBandSet: %s\n", wlmLastError()); + return FALSE; + } + + curBand = band; + + return TRUE; +} + +int wlmBandGet(WLM_BAND *band) +{ + if (wlu_get(irh, WLC_GET_BAND, band, sizeof(band))) { + printf("wlmBandGet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmGetBandList(WLM_BAND * bands) +{ + unsigned int list[3]; + unsigned int i; + + if (wlu_get(irh, WLC_GET_BANDLIST, list, sizeof(list))) { + printf("wlmGetBandList: %s\n", wlmLastError()); + return FALSE; + } + + list[0] = dtoh32(list[0]); + list[1] = dtoh32(list[1]); + list[2] = dtoh32(list[2]); + + /* list[0] is count, followed by 'count' bands */ + + if (list[0] > 2) + list[0] = 2; + + for (i = 1, *bands = (WLM_BAND)0; i <= list[0]; i++) + *bands |= list[i]; + + return TRUE; +} + +int wlmGmodeSet(WLM_GMODE gmode) +{ + /* Set 'gmode' - select mode in 2.4G band */ + gmode = htod32(gmode); + + if (wlu_set(irh, WLC_SET_GMODE, (void *)&gmode, sizeof(gmode))) { + printf("wlmGmodeSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmRxAntSet(int antenna) +{ + /* Set 'antdiv' - select receive antenna */ + antenna = htod32(antenna); + + if (wlu_set(irh, WLC_SET_ANTDIV, &antenna, sizeof(antenna))) { + printf("wlmRxAntSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmTxAntSet(int antenna) +{ + /* Set 'txant' - select transmit antenna */ + antenna = htod32(antenna); + + if (wlu_set(irh, WLC_SET_TXANT, &antenna, sizeof(antenna))) { + printf("wlmTxAntSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmEstimatedPowerGet(int *estPower, int chain) +{ + int mimo; + int is2g; + + size_t pprsize = ppr_ser_size_by_bw(ppr_get_max_bw()); + tx_pwr_rpt_t *ppr_wl = (tx_pwr_rpt_t *)malloc(sizeof(tx_pwr_rpt_t) + pprsize*3); + uint8 *ppr_ser; + if (ppr_wl == NULL) + return FALSE; + + ppr_ser = ppr_wl->pprdata; + memset(ppr_wl, 0, sizeof(tx_pwr_rpt_t) + pprsize*3); + ppr_wl->board_limit_len = pprsize; + ppr_wl->target_len = pprsize; + ppr_wl->version = TX_POWER_T_VERSION; + /* init allocated mem for serialisation */ + ppr_init_ser_mem_by_bw(ppr_ser, ppr_get_max_bw(), ppr_wl->board_limit_len); + ppr_ser += ppr_wl->board_limit_len; + ppr_init_ser_mem_by_bw(ppr_ser, ppr_get_max_bw(), ppr_wl->target_len); + + + if (wlu_get(irh, WLC_CURRENT_PWR, ppr_wl, sizeof(tx_pwr_rpt_t) + pprsize*3) < 0) { + printf("wlmEstimatedPowerGet: %s\n", wlmLastError()); + free(ppr_wl); + return FALSE; + } + ppr_wl->flags = dtoh32(ppr_wl->flags); + ppr_wl->chanspec = dtohchanspec(ppr_wl->chanspec); + mimo = (ppr_wl->flags & WL_TX_POWER_F_MIMO); + + /* value returned is in units of quarter dBm, need to multiply by 250 to get milli-dBm */ + if (mimo) { + *estPower = ppr_wl->est_Pout[chain] * 250; + } else { + *estPower = ppr_wl->est_Pout[0] * 250; + } + + if (ioctl_version == 1) { + is2g = LCHSPEC_IS2G(ppr_wl->chanspec); + } else { + is2g = CHSPEC_IS2G(ppr_wl->chanspec); + } + + if (!mimo && is2g) { + *estPower = ppr_wl->est_Pout_cck * 250; + } + + free(ppr_wl); + return TRUE; +} + +int wlmTxPowerGet(int *power) +{ + int val; + + if ((wlu_iovar_getint(irh, "qtxpower", &val)) < 0) { + printf("wlmTxPowerGet: %s\n", wlmLastError()); + return FALSE; + } + + val &= ~WL_TXPWR_OVERRIDE; + + /* value returned is in units of quarter dBm, need to multiply by 250 to get milli-dBm */ + *power = val * 250; + return TRUE; +} + +int wlmTxPowerSet(int powerValue) +{ + int newValue = 0; + + if (powerValue == -1) { + newValue = 127; /* Max val of 127 qdbm */ + } else { + /* expected to be in units of quarter dBm */ + newValue = powerValue / 250; + newValue |= WL_TXPWR_OVERRIDE; + } + + if (wlu_iovar_setint(irh, "qtxpower", newValue)) { + printf("wlmTxPowerSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +static int wlmPhyTypeGet(void) +{ + + int phytype = PHY_TYPE_NULL; + + if (wlu_get(irh, WLC_GET_PHYTYPE, &phytype, sizeof(int)) < 0) { + printf("wlmPhyTypeGet: %s\n", wlmLastError()); + return FALSE; + } + + return phytype; +} + +int wlmPaParametersGet(WLM_BANDRANGE bandrange, + unsigned int *a1, unsigned int *b0, unsigned int *b1) +{ + uint16 inpa[WL_PHY_PAVARS_LEN]; + void *ptr = NULL; + uint16 *outpa; + int i = 0; + int phytype = PHY_TYPE_NULL; + + *a1 = 0; + *b0 = 0; + *b1 = 0; + + /* Do not rely on user to have knowledge of phytype */ + phytype = wlmPhyTypeGet(); + if (phytype != PHY_TYPE_NULL) { + inpa[i++] = phytype; + inpa[i++] = bandrange; + inpa[i++] = 0; /* Fix me: default with chain 0 for all SISO system */ + } else { + printf("wlmPaParametersGet: unknow Phy type\n"); + return FALSE; + } + + if (wlu_var_getbuf_sm(irh, "pavars", inpa, WL_PHY_PAVARS_LEN * sizeof(uint16), &ptr)) { + printf("wlmPaParametersGet: %s\n", wlmLastError()); + return FALSE; + } + + outpa = (uint16 *)ptr; + *b0 = outpa[i++]; + *b1 = outpa[i++]; + *a1 = outpa[i++]; + + return TRUE; +} + +int wlmPaParametersSet(WLM_BANDRANGE bandrange, + unsigned int a1, unsigned int b0, unsigned int b1) +{ + uint16 inpa[WL_PHY_PAVARS_LEN]; + int i = 0; + int phytype = PHY_TYPE_NULL; + + /* Do not rely on user to have knowledge of phy type */ + phytype = wlmPhyTypeGet(); + if (phytype != PHY_TYPE_NULL) { + inpa[i++] = phytype; + inpa[i++] = bandrange; + inpa[i++] = 0; /* Fix me: default with chain 0 for all SISO system */ + } else { + printf("wlmPaParametersSet: unknow Phy type\n"); + return FALSE; + } + + inpa[i++] = b0; + inpa[i++] = b1; + inpa[i++] = a1; + + if (wlu_var_setbuf_sm(irh, "pavars", inpa, WL_PHY_PAVARS_LEN * sizeof(uint16))) { + printf("wlmPaParametersSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + + +int wlmMIMOPaParametersGet(WLM_BANDRANGE bandrange, int chain, + unsigned int *a1, unsigned int *b0, unsigned int *b1) +{ + uint16 inpa[WL_PHY_PAVARS_LEN]; + void *ptr = NULL; + uint16 *outpa; + int i = 0; + int phytype = PHY_TYPE_NULL; + + /* Do not rely on user to have knowledge of phytype */ + phytype = wlmPhyTypeGet(); + if (phytype != PHY_TYPE_NULL) { + inpa[i++] = phytype; + inpa[i++] = bandrange; + inpa[i++] = chain; + } else { + printf("wlmMIMOPaParametersGet: unknow Phy type\n"); + return FALSE; + } + + if (wlu_var_getbuf_sm(irh, "pavars", inpa, WL_PHY_PAVARS_LEN * sizeof(uint16), &ptr)) { + printf("wlmMIMOPaParametersGet: %s\n", wlmLastError()); + return FALSE; + } + + outpa = (uint16 *)ptr; + *a1 = outpa[i++]; + *b0 = outpa[i++]; + *b1 = outpa[i++]; + + return TRUE; +} + +int wlmMIMOPaParametersSet(WLM_BANDRANGE bandrange, int chain, + unsigned int a1, unsigned int b0, unsigned int b1) +{ + uint16 inpa[WL_PHY_PAVARS_LEN]; + int i = 0; + int phytype = PHY_TYPE_NULL; + + /* Do not rely on user to have knowledge of phy type */ + phytype = wlmPhyTypeGet(); + if (phytype != PHY_TYPE_NULL) { + inpa[i++] = phytype; + inpa[i++] = bandrange; + inpa[i++] = chain; + } else { + printf("wlmMIMOPaParametersSet: unknow Phy type\n"); + return FALSE; + } + + inpa[i++] = a1; + inpa[i++] = b0; + inpa[i++] = b1; + + if (wlu_var_setbuf_sm(irh, "pavars", inpa, WL_PHY_PAVARS_LEN * sizeof(uint16))) { + printf("wlmMIMOPaParametersSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmACPaParametersGet(WLM_BANDRANGE bandrange, int modetype, + unsigned int *a1, unsigned int *b0, unsigned int *b1) +{ + uint16 inpa[WL_PHY_PAVARS_LEN] = {0}; + void *ptr = NULL; + uint16 *outpa; + int i = 0; + int phytype = PHY_TYPE_NULL; + + /* Do not rely on user to have knowledge of phytype */ + phytype = wlmPhyTypeGet(); + if (phytype != PHY_TYPE_AC) { + printf("wlmACPaParametersGet: Wrong PHY type\n"); + return FALSE; + } + inpa[i++] = phytype; + + if (bandrange == WL_CHAN_FREQ_RANGE_2G) { + inpa[i++] = WL_CHAN_FREQ_RANGE_2G; + } else if ((bandrange > WL_CHAN_FREQ_RANGE_2G) && + (bandrange < WL_CHAN_FREQ_RANGE_5G_4BAND)) { + inpa[i++] = WL_CHAN_FREQ_RANGE_5G_4BAND; + } else { + printf("wlmACPaParametersGet: Wrong bandrange [0-4]\n"); + return FALSE; + } + + if (modetype > 2) { + printf("wlmACPaParametersGet: Wrong modetype number [0-2]\n"); + return FALSE; + } + inpa[i++] = modetype; + + if (wlu_var_getbuf_sm(irh, "pavars", inpa, WL_PHY_PAVARS_LEN * sizeof(uint16), &ptr)) { + printf("wlmACPaParametersGet: %s\n", wlmLastError()); + return FALSE; + } + + outpa = (uint16 *)ptr; + + if (bandrange > 0) + i += (bandrange - WL_CHAN_FREQ_RANGE_5G_BAND0) * 3; + /* + printf("0x%x\n", outpa[i++]); + printf("0x%x\n", outpa[i++]); + printf("0x%x\n", outpa[i++]); + */ + *a1 = outpa[i++]; + *b0 = outpa[i++]; + *b1 = outpa[i++]; + + return TRUE; +} + +int wlmACPaParametersSet(WLM_BANDRANGE bandrange, int modetype, + unsigned int a1, unsigned int b0, unsigned int b1) +{ + uint16 inpa[WL_PHY_PAVARS_LEN] = {0}; + int i = 0; + int phytype = PHY_TYPE_NULL; + void *ptr = NULL; + uint16 *outpa; + int pnum = 0, n = 0; + + /* Do not rely on user to have knowledge of phy type */ + phytype = wlmPhyTypeGet(); + if (phytype != PHY_TYPE_AC) { + printf("wlmACPaParametersSet: Wrong PHY type\n"); + return FALSE; + } + inpa[i++] = phytype; + + if (bandrange == WL_CHAN_FREQ_RANGE_2G) { + pnum = 3; + inpa[i++] = WL_CHAN_FREQ_RANGE_2G; + } else if ((bandrange > WL_CHAN_FREQ_RANGE_2G) && + (bandrange < WL_CHAN_FREQ_RANGE_5G_4BAND)) { + pnum = 12; + inpa[i++] = WL_CHAN_FREQ_RANGE_5G_4BAND; + } else { + printf("wlmACPaParametersSet: Wrong bandrange [0-4]\n"); + return FALSE; + } + + if (modetype > 2) { + printf("wlmACPaParametersSet: Wrong modetype number [0-2] \n"); + return FALSE; + } + inpa[i++] = modetype; + + if (wlu_var_getbuf_sm(irh, "pavars", inpa, WL_PHY_PAVARS_LEN * sizeof(uint16), &ptr)) { + printf("wlmACPaParametersSet: %s\n", wlmLastError()); + return FALSE; + } + + outpa = (uint16 *) ptr; + + for (n = 0; n < pnum + 3; n++) { + if ((bandrange > 0) && (n == 3 +((bandrange - WL_CHAN_FREQ_RANGE_5G_BAND0) * 3))) { + inpa[n++] = a1; + /* printf("n: %d 0x%hx 0x%hx\n", n -1, inpa[n - 1], outpa[n - 1]); */ + inpa[n++] = b0; + /* printf("n: %d 0x%hx 0x%hx\n", n - 1, inpa[n -1], outpa[n - 1]); */ + inpa[n] = b1; + /* printf("n: %d 0x%hx 0x%hx\n", n, inpa[n], outpa[n]); */ + } else if ((bandrange == WL_CHAN_FREQ_RANGE_2G) && (n > 2)) { + inpa[n++] = a1; + /* printf("n: %d 0x%hx 0x%hx\n", n - 1, inpa[n -1], outpa[n - 1]); */ + inpa[n++] = b0; + /* printf("n: %d 0x%hx 0x%hx\n", n - 1, inpa[n - 1], outpa[n - 1]); */ + inpa[n] = b1; + /* printf("n: %d 0x%hx 0x%hx\n", n, inpa[n], outpa[n]); */ + } else { + inpa[n] = outpa[n]; + /* printf("n: %d 0x%hx 0x%hx\n", n, inpa[n], outpa[n]); */ + } + } + + + if (wlu_var_setbuf_sm(irh, "pavars", inpa, WL_PHY_PAVARS_LEN * sizeof(uint16))) { + printf("wlmACPaParametersSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmMacAddrGet(char *macAddr, int length) +{ + struct ether_addr ea = {{0, 0, 0, 0, 0, 0}}; + + /* query for 'cur_etheraddr' to get MAC address */ + if (wlu_iovar_get(irh, "cur_etheraddr", &ea, ETHER_ADDR_LEN) < 0) { + printf("wlmMacAddrGet: %s\n", wlmLastError()); + return FALSE; + } + + strncpy(macAddr, wl_ether_etoa(&ea), length); + + return TRUE; +} + +int wlmMacAddrSet(const char* macAddr) +{ + struct ether_addr ea; + + if (!wl_ether_atoe(macAddr, &ea)) { + printf("wlmMacAddrSet: MAC address invalid: %s\n", macAddr); + return FALSE; + } + + /* Set 'cur_etheraddr' to set MAC address */ + if (wlu_iovar_set(irh, "cur_etheraddr", (void *)&ea, ETHER_ADDR_LEN)) { + printf("wlmMacAddrSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmEnableCarrierTone(int enable, int channel) +{ + int val = channel; + + if (!enable) { + val = 0; + } + else { + wlmEnableAdapterUp(1); + if (wlu_set(irh, WLC_OUT, NULL, 0) < 0) { + printf("wlmEnableCarrierTone: %s\n", wlmLastError()); + return FALSE; + } + } + val = htod32(val); + if (wlu_set(irh, WLC_FREQ_ACCURACY, &val, sizeof(int)) < 0) { + printf("wlmEnableCarrierTone: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmEnableEVMTest(int enable, WLM_RATE rate, int channel) +{ + int val[3] = {0}; + val[1] = WLM_RATE_1M; /* default value */ + if (enable) { + val[0] = htod32(channel); + val[1] = htod32(rate); + wlmEnableAdapterUp(1); + if (wlu_set(irh, WLC_OUT, NULL, 0) < 0) { + printf("wlmEnableEVMTest: %s\n", wlmLastError()); + return FALSE; + } + } + if (wlu_set(irh, WLC_EVM, val, sizeof(val)) < 0) { + printf("wlmEnableEVMTest: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmTxPacketStart(unsigned int interPacketDelay, + unsigned int numPackets, unsigned int packetLength, + const char* destMac, int withAck, int syncMode) +{ + wl_pkteng_t pkteng; + + if (!wl_ether_atoe(destMac, (struct ether_addr *)&pkteng.dest)) { + printf("wlmTxPacketStart: destMac invalid\n"); + return FALSE; + } + + pkteng.flags = withAck ? WL_PKTENG_PER_TX_WITH_ACK_START : WL_PKTENG_PER_TX_START; + + if (syncMode) + pkteng.flags |= WL_PKTENG_SYNCHRONOUS; + else + pkteng.flags &= ~WL_PKTENG_SYNCHRONOUS; + + pkteng.delay = interPacketDelay; + pkteng.length = packetLength; + pkteng.nframes = numPackets; + + pkteng.seqno = 0; /* not used */ + pkteng.src = ether_null; /* implies current ether addr */ + + if (wlu_var_setbuf_sm(irh, "pkteng", &pkteng, sizeof(pkteng))) { + printf("wlmTxPacketStart: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmTxPacketStop(void) +{ + wl_pkteng_t pkteng; + + memset(&pkteng, 0, sizeof(pkteng)); + pkteng.flags = WL_PKTENG_PER_TX_STOP; + + if (wlu_var_setbuf_sm(irh, "pkteng", &pkteng, sizeof(pkteng)) < 0) { + printf("wlmTxPacketStop: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmRxPacketStart(const char* srcMac, int withAck, + int syncMode, unsigned int numPackets, unsigned int timeout) +{ + wl_pkteng_t pkteng; + + if (!wl_ether_atoe(srcMac, (struct ether_addr *)&pkteng.dest)) { + printf("wlmRxPacketStart: srcMac invalid\n"); + return FALSE; + } + + pkteng.flags = withAck ? WL_PKTENG_PER_RX_WITH_ACK_START : WL_PKTENG_PER_RX_START; + + if (syncMode) { + pkteng.flags |= WL_PKTENG_SYNCHRONOUS; + pkteng.nframes = numPackets; + pkteng.delay = timeout; + } + else + pkteng.flags &= ~WL_PKTENG_SYNCHRONOUS; + + pkteng.length = 0; + + if (wlu_var_setbuf_sm(irh, "pkteng", &pkteng, sizeof(pkteng))) { + printf("wlmRxPacketStart: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmRxPacketStop(void) +{ + wl_pkteng_t pkteng; + + memset(&pkteng, 0, sizeof(pkteng)); + pkteng.flags = WL_PKTENG_PER_RX_STOP; + + if (wlu_var_setbuf_sm(irh, "pkteng", &pkteng, sizeof(pkteng)) < 0) { + printf("wlmRxPacketStop: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmTxGetAckedPackets(unsigned int *count) +{ + wl_cnt_t *cnt; + + if (wlu_var_getbuf_med(irh, "counters", NULL, 0, (void **)&cnt)) { + printf("wlmTxGetAckedPackets: %s\n", wlmLastError()); + return FALSE; + } + + *count = dtoh32(cnt->rxackucast); + + return TRUE; +} + +int wlmRxGetReceivedPackets(unsigned int *count) +{ + wl_cnt_t *cnt; + + if (wlu_var_getbuf_med(irh, "counters", NULL, 0, (void **)&cnt)) { + printf("wlmRxGetReceivedPackets: %s\n", wlmLastError()); + return FALSE; + } + + cnt->version = dtoh16(cnt->version); + cnt->length = dtoh16(cnt->version); + + /* current wl_cnt_t version is 7 */ + if (cnt->version == WL_CNT_T_VERSION) { + *count = dtoh32(cnt->pktengrxducast); + } else { + *count = dtoh32(cnt->rxdfrmucastmbss); + } + + return TRUE; +} + +int wlmRssiGet(int *rssi) +{ + wl_pkteng_stats_t *cnt; + + if (wlu_var_getbuf_sm(irh, "pkteng_stats", NULL, 0, (void **)&cnt)) { + printf("wlmRssiGet: %s\n", wlmLastError()); + return FALSE; + } + + *rssi = dtoh32(cnt->rssi); + return TRUE; +} + +int wlmUnmodRssiGet(int* rssi) +{ + if (wlu_iovar_getint(irh, "unmod_rssi", rssi)) { + printf("wlmUnmodRssiGet: %s\n", wlmLastError()); + return FALSE; + } + *rssi = dtoh32(*rssi); + + return TRUE; +} + + + +int wlmSequenceStart(int clientBatching) +{ + if (wl_seq_batch_in_client((bool)clientBatching)) { + printf("wlmSequenceStart: %s\n", wlmLastError()); + return FALSE; + } + + if (wl_seq_start(irh, 0, 0)) { + printf("wlmSequenceStart: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmSequenceStop(void) +{ + if (wl_seq_stop(irh, 0, 0)) { + printf("wlmSequenceStop: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmSequenceDelay(int msec) +{ + if (wlu_iovar_setint(irh, "seq_delay", msec)) { + printf("wlmSequenceDelay: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmSequenceErrorIndex(int *index) +{ + if (wlu_iovar_getint(irh, "seq_error_index", index)) { + printf("wlmSequenceErrorIndex: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmDeviceImageWrite(const char* byteStream, int length, WLM_IMAGE_TYPE imageType) +{ + srom_rw_t *srt; + char buffer[WLC_IOCTL_MAXLEN] = {0}; + + char *bufp; + char *cisp, *cisdata; + cis_rw_t cish; + + if (byteStream == NULL) { + printf("wlmDeviceImageWrite: Buffer is invalid!\n"); + return FALSE; + } + if (length > SROM_MAX+1) { + printf("wlmDeviceImageWrite: Data length should be less than %d bytes\n", SROM_MAX); + return FALSE; + } + + switch (imageType) { + case WLM_TYPE_SROM: + srt = (srom_rw_t *)buffer; + memcpy(srt->buf, byteStream, length); + + if (length == SROM4_WORDS * 2) { + if ((srt->buf[SROM4_SIGN] != SROM4_SIGNATURE) && + (srt->buf[SROM8_SIGN] != SROM4_SIGNATURE)) { + printf("wlmDeviceImageWrite: Data lacks a REV4 signature!\n"); + return FALSE; + } + } else if ((length != SROM_WORDS * 2) && (length != SROM_MAX)) { + printf("wlmDeviceImageWrite: Data length is invalid!\n"); + return FALSE; + } + + srt->nbytes = length; + if (wlu_set(irh, WLC_SET_SROM, buffer, length + 8)) { + printf("wlmDeviceImageWrite: %s\n", wlmLastError()); + return FALSE; + } + + + break; + case WLM_TYPE_OTP: + bufp = buffer; + strcpy(bufp, "ciswrite"); + bufp += strlen("ciswrite") + 1; + cisp = bufp; + cisdata = cisp + sizeof(cish); + cish.source = htod32(0); + memcpy(cisdata, byteStream, length); + + cish.byteoff = htod32(0); + cish.nbytes = htod32(length); + memcpy(cisp, (char*)&cish, sizeof(cish)); + + if (wl_set(irh, WLC_SET_VAR, buffer, (cisp - buffer) + sizeof(cish) + length) < 0) { + printf("wlmDeviceImageWrite: %s\n", wlmLastError()); + return FALSE; + } + break; + case WLM_TYPE_AUTO: + if (!wlmDeviceImageWrite(byteStream, length, WLM_TYPE_SROM) && + !wlmDeviceImageWrite(byteStream, length, WLM_TYPE_OTP)) { + printf("wlmDeviceImageWrite: %s\n", wlmLastError()); + return FALSE; + } + break; + default: + printf("wlmDeviceImageWrite: Invalid image type!\n"); + return FALSE; + } + return TRUE; +} + +int wlmDeviceImageRead(char* byteStream, unsigned int len, WLM_IMAGE_TYPE imageType) +{ + srom_rw_t *srt; + cis_rw_t *cish; + char buf[WLC_IOCTL_MAXLEN] = {0}; + unsigned int numRead = 0; + + if (byteStream == NULL) { + printf("wlmDeviceImageRead: Buffer is invalid!\n"); + return FALSE; + } + + if (len > SROM_MAX) { + printf("wlmDeviceImageRead: byteStream should be less than %d bytes!\n", SROM_MAX); + return FALSE; + } + + if (len & 1) { + printf("wlmDeviceImageRead: Invalid byte count %d, must be even\n", len); + return FALSE; + } + + switch (imageType) { + case WLM_TYPE_SROM: + if (len < 2*SROM4_WORDS) { + printf("wlmDeviceImageRead: Buffer not large enough!\n"); + return FALSE; + } + + srt = (srom_rw_t *)buf; + srt->byteoff = 0; + srt->nbytes = htod32(2 * SROM4_WORDS); + /* strlen("cisdump ") = 9 */ + if (wlu_get(irh, WLC_GET_SROM, buf, 9 + (len < SROM_MAX ? len : SROM_MAX)) < 0) { + printf("wlmDeviceImageRead: %s\n", wlmLastError()); + return FALSE; + } + memcpy(byteStream, buf + 8, srt->nbytes); + numRead = srt->nbytes; + break; + case WLM_TYPE_OTP: + strcpy(buf, "cisdump"); + /* strlen("cisdump ") = 9 */ + if (wl_get(irh, WLC_GET_VAR, buf, 9 + (len < SROM_MAX ? len : SROM_MAX)) < 0) { + printf("wlmDeviceImageRead: %s\n", wlmLastError()); + return FALSE; + } + + cish = (cis_rw_t *)buf; + cish->source = dtoh32(cish->source); + cish->byteoff = dtoh32(cish->byteoff); + cish->nbytes = dtoh32(cish->nbytes); + + if (len < cish->nbytes) { + printf("wlmDeviceImageRead: Buffer not large enough!\n"); + return FALSE; + } + memcpy(byteStream, buf + sizeof(cis_rw_t), cish->nbytes); + numRead = cish->nbytes; + break; + case WLM_TYPE_AUTO: + numRead = wlmDeviceImageRead(byteStream, len, WLM_TYPE_SROM); + if (!numRead) { + numRead = wlmDeviceImageRead(byteStream, len, WLM_TYPE_OTP); + printf("wlmDeviceImageRead: %s\n", wlmLastError()); + return FALSE; + } + break; + default: + printf("wlmDeviceImageRead: Invalid image type!\n"); + return FALSE; + } + return numRead; +} + +int wlmSecuritySet(WLM_AUTH_TYPE authType, WLM_AUTH_MODE authMode, + WLM_ENCRYPTION encryption, const char *key) +{ + int length = 0; + int wpa_auth; + int sup_wpa; + int primary_key = 0; + wl_wsec_key_t wepKey[4]; + wsec_pmk_t psk; + int wsec; + + if (encryption != WLM_ENCRYPT_NONE && key == 0) { + printf("wlmSecuritySet: invalid key\n"); + return FALSE; + } + + if (key) { + length = strlen(key); + } + + switch (encryption) { + + case WLM_ENCRYPT_NONE: + wpa_auth = WPA_AUTH_DISABLED; + sup_wpa = 0; + break; + + case WLM_ENCRYPT_WEP: { + int i; + int len = length / 4; + + wpa_auth = WPA_AUTH_DISABLED; + sup_wpa = 0; + + if (!(length == 40 || length == 104 || length == 128 || length == 256)) { + printf("wlmSecuritySet: invalid WEP key length %d" + " - expect 40, 104, 128, or 256" + " (i.e. 10, 26, 32, or 64 for each of 4 keys)\n", length); + return FALSE; + } + + /* convert hex key string to 4 binary keys */ + for (i = 0; i < 4; i++) { + wl_wsec_key_t *k = &wepKey[i]; + const char *data = &key[i * len]; + unsigned int j; + + memset(k, 0, sizeof(*k)); + k->index = i; + k->len = len / 2; + + for (j = 0; j < k->len; j++) { + char hex[] = "XX"; + char *end = NULL; + strncpy(hex, &data[j * 2], 2); + k->data[j] = (char)strtoul(hex, &end, 16); + if (*end != 0) { + printf("wlmSecuritySet: invalid WEP key" + " - expect hex values\n"); + return FALSE; + } + } + + switch (k->len) { + case 5: + k->algo = CRYPTO_ALGO_WEP1; + break; + case 13: + k->algo = CRYPTO_ALGO_WEP128; + break; + case 16: + k->algo = CRYPTO_ALGO_AES_CCM; + break; + case 32: + k->algo = CRYPTO_ALGO_TKIP; + break; + default: + /* invalid */ + return FALSE; + } + + k->flags |= WL_PRIMARY_KEY; + } + + break; + } + + case WLM_ENCRYPT_TKIP: + case WLM_ENCRYPT_AES: { + + if (authMode != WLM_WPA_AUTH_PSK && authMode != WLM_WPA2_AUTH_PSK) { + printf("wlmSecuritySet: authentication mode must be WPA PSK or WPA2 PSK\n"); + return FALSE; + } + + wpa_auth = authMode; + sup_wpa = 1; + + if (length < WSEC_MIN_PSK_LEN || length > WSEC_MAX_PSK_LEN) { + printf("wlmSecuritySet: passphrase must be between %d and %d characters\n", + WSEC_MIN_PSK_LEN, WSEC_MAX_PSK_LEN); + return FALSE; + } + + psk.key_len = length; + psk.flags = WSEC_PASSPHRASE; + memcpy(psk.key, key, length); + + break; + } + + case WLM_ENCRYPT_WSEC: + case WLM_ENCRYPT_FIPS: + default: + printf("wlmSecuritySet: encryption not supported\n"); + return FALSE; + } + + if (wlu_iovar_setint(irh, "auth", authType)) { + printf("wlmSecuritySet: %s\n", wlmLastError()); + return FALSE; + } + + if (wlu_iovar_setint(irh, "wpa_auth", wpa_auth)) { + printf("wlmSecuritySet: %s\n", wlmLastError()); + return FALSE; + } + + if (wlu_iovar_setint(irh, "sup_wpa", sup_wpa)) { + printf("wlmSecuritySet: %s\n", wlmLastError()); + return FALSE; + } + + if (encryption == WLM_ENCRYPT_WEP) { + int i; + for (i = 0; i < 4; i++) { + wl_wsec_key_t *k = &wepKey[i]; + k->index = htod32(k->index); + k->len = htod32(k->len); + k->algo = htod32(k->algo); + k->flags = htod32(k->flags); + + if (wlu_set(irh, WLC_SET_KEY, k, sizeof(*k))) { + printf("wlmSecuritySet: %s\n", wlmLastError()); + return FALSE; + } + } + + primary_key = htod32(primary_key); + if (wlu_set(irh, WLC_SET_KEY_PRIMARY, &primary_key, sizeof(primary_key)) < 0) { + printf("wlmSecuritySet: %s\n", wlmLastError()); + return FALSE; + } + } + else if (encryption == WLM_ENCRYPT_TKIP || encryption == WLM_ENCRYPT_AES) { + psk.key_len = htod16(psk.key_len); + psk.flags = htod16(psk.flags); + + if (wlu_set(irh, WLC_SET_WSEC_PMK, &psk, sizeof(psk))) { + printf("wlmSecuritySet: %s\n", wlmLastError()); + return FALSE; + } + } + + wsec = htod32(encryption); + if (wlu_set(irh, WLC_SET_WSEC, &wsec, sizeof(wsec)) < 0) { + printf("wlmSecuritySet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmJoinNetwork(const char* ssid, WLM_JOIN_MODE mode) +{ + wlc_ssid_t wlcSsid; + int infra = htod32(mode); + if (wlu_set(irh, WLC_SET_INFRA, &infra, sizeof(int)) < 0) { + printf("wlmJoinNetwork: %s\n", wlmLastError()); + return FALSE; + } + + wlcSsid.SSID_len = htod32(strlen(ssid)); + memcpy(wlcSsid.SSID, ssid, wlcSsid.SSID_len); + + if (wlu_set(irh, WLC_SET_SSID, &wlcSsid, sizeof(wlc_ssid_t)) < 0) { + printf("wlmJoinNetwork: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmDisassociateNetwork(void) +{ + if (wlu_set(irh, WLC_DISASSOC, NULL, 0) < 0) { + printf("wlmDisassociateNetwork: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmSsidGet(char *ssid, int length) +{ + wlc_ssid_t wlc_ssid; + + if (length < SSID_FMT_BUF_LEN) { + printf("wlmSsidGet: Ssid buffer too short - %d bytes at least\n", + SSID_FMT_BUF_LEN); + return FALSE; + } + + /* query for 'ssid' */ + if (wlu_get(irh, WLC_GET_SSID, &wlc_ssid, sizeof(wlc_ssid_t))) { + printf("wlmSsidGet: %s\n", wlmLastError()); + return FALSE; + } + + wl_format_ssid(ssid, wlc_ssid.SSID, dtoh32(wlc_ssid.SSID_len)); + + return TRUE; +} + +int wlmBssidGet(char *bssid, int length) +{ + struct ether_addr ea; + + if (length != ETHER_ADDR_LEN) { + printf("wlmBssiGet: bssid requires %d bytes", ETHER_ADDR_LEN); + return FALSE; + } + + if (wlu_get(irh, WLC_GET_BSSID, &ea, ETHER_ADDR_LEN) == 0) { + /* associated - format and return bssid */ + strncpy(bssid, wl_ether_etoa(&ea), length); + } + else { + /* not associated - return empty string */ + memset(bssid, 0, length); + } + + return TRUE; +} + + +int wlmGlacialTimerSet(int val) +{ + if (wlu_iovar_setint(irh, "glacial_timer", val)) { + printf("wlmGlacialTimerSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmFastTimerSet(int val) +{ + if (wlu_iovar_setint(irh, "fast_timer", val)) { + printf("wlmFastTimerSet: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmSlowTimerSet(int val) +{ + if (wlu_iovar_setint(irh, "slow_timer", val)) { + printf("wlmGlacialTimerSet: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + + +int wlmScanSuppress(int on) +{ + int val; + if (on) + val = 1; + else + val = 0; + + if (wlu_set(irh, WLC_SET_SCANSUPPRESS, &val, sizeof(int))) { + printf("wlmSetScansuppress: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmCountryCodeSet(const char * country_name) +{ + wl_country_t cspec; + int err; + + memset(&cspec, 0, sizeof(cspec)); + cspec.rev = -1; + + /* arg matched a country name */ + memcpy(cspec.country_abbrev, country_name, WLC_CNTRY_BUF_SZ); + err = 0; + + /* first try the country iovar */ + if (cspec.rev == -1 && cspec.ccode[0] == '\0') + err = wlu_iovar_set(irh, "country", &cspec, WLC_CNTRY_BUF_SZ); + else + err = wlu_iovar_set(irh, "country", &cspec, sizeof(cspec)); + + if (err == 0) + return TRUE; + return FALSE; +} + +int wlmFullCal(void) +{ + if (wlu_var_setbuf_sm(irh, "lpphy_fullcal", NULL, 0)) { + printf("wlmLPPY_FULLCAL: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmIoctlGet(int cmd, void *buf, int len) +{ + if (wlu_get(irh, cmd, buf, len)) { + printf("wlmIoctlGet: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmIoctlSet(int cmd, void *buf, int len) +{ + if (wlu_set(irh, cmd, buf, len)) { + printf("wlmIoctlSet: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmIovarGet(const char *iovar, void *buf, int len) +{ + if (wlu_iovar_get(irh, iovar, buf, len)) { + printf("wlmIovarGet: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmIovarSet(const char *iovar, void *buf, int len) +{ + if (wlu_iovar_set(irh, iovar, buf, len)) { + printf("wlmIovarSet: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmIovarIntegerGet(const char *iovar, int *val) +{ + if (wlu_iovar_getint(irh, iovar, val)) { + printf("wlmIovarIntegerGet: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmIovarIntegerSet(const char *iovar, int val) +{ + if (wlu_iovar_setint(irh, iovar, val)) { + printf("wlmIovarIntegerSet: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmIovarBufferGet(const char *iovar, void *param, int param_len, void **bufptr) +{ + if (wlu_var_getbuf(irh, iovar, param, param_len, bufptr)) { + printf("wlmIovarBufferGet: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmIovarBufferSet(const char *iovar, void *param, int param_len) +{ + if (wlu_var_setbuf(irh, iovar, param, param_len)) { + printf("wlmIovarBufferSet: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmCga5gOffsetsSet(char* values, int len) +{ + if (len != CGA_5G_OFFSETS_LEN) { + printf("wlmCga5gOffsetsSet() requires a %d-value array as a parameter\n", + CGA_5G_OFFSETS_LEN); + return FALSE; + } + + if ((wlu_var_setbuf(irh, "sslpnphy_cga_5g", values, + CGA_5G_OFFSETS_LEN * sizeof(int8))) < 0) { + printf("wlmCga5gOffsetsSet(): Error setting offset values (%s)\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmCga5gOffsetsGet(char* buf, int len) +{ + if (len != CGA_5G_OFFSETS_LEN) { + printf("wlmCga5gOffsetsGet() requires a %d-value array as a parameter\n", + CGA_5G_OFFSETS_LEN); + return FALSE; + } + + if ((wlu_iovar_get(irh, "sslpnphy_cga_5g", buf, CGA_5G_OFFSETS_LEN * sizeof(int8))) < 0) { + printf("wlmCga5gOffsetsGet(): Error setting offset values (%s)\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmCga2gOffsetsSet(char* values, int len) +{ + if (len != CGA_2G_OFFSETS_LEN) { + printf("wlmCga2gOffsetsSet(): requires a %d-value array as a parameter\n", + CGA_2G_OFFSETS_LEN); + return FALSE; + } + + if ((wlu_var_setbuf(irh, "sslpnphy_cga_2g", values, + CGA_2G_OFFSETS_LEN * sizeof(int8))) < 0) { + printf("wlmCga2gOffsetsSet(): Error setting offset values (%s)\n", wlmLastError()); + return FALSE; + } + + return TRUE; + +} + +int wlmCga2gOffsetsGet(char* buf, int len) +{ + if (len != CGA_2G_OFFSETS_LEN) { + printf("wlmCga2gOffsetsGet(): requires a %d-value array as a parameter\n", + CGA_2G_OFFSETS_LEN); + return FALSE; + } + + if ((wlu_iovar_get(irh, "sslpnphy_cga_2g", buf, CGA_2G_OFFSETS_LEN * sizeof(int8))) < 0) { + printf("wlmCga2gOffsetsGet(): Error setting offset values (%s)\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmNvramVarGet(const char *varname, char *buffer, int len) +{ + strcpy(buffer, varname); + if (wlu_get(irh, WLC_NVRAM_GET, buffer, len) < 0) { + printf("wlmNvramVarGet: Error getting \"%s\" value(%s)\n", + varname, wlmLastError()); + return FALSE; + } + return TRUE; +} + +int wlmRadioOn(void) +{ + int val; + + /* val = WL_RADIO_SW_DISABLE << 16; */ + val = (1<<0) << 16; + + if (wlu_set(irh, WLC_SET_RADIO, &val, sizeof(int)) < 0) { + printf("wlmRadioOn: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmRadioOff(void) +{ + int val; + + /* val = WL_RADIO_SW_DISABLE << 16 | WL_RADIO_SW_DISABLE; */ + val = (1<<0) << 16 | (1<<0); + + if (wlu_set(irh, WLC_SET_RADIO, &val, sizeof(int)) < 0) { + printf("wlmRadioOff: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmPMmode(int val) +{ + if (val < 0 || val > 2) { + printf("wlmPMmode: setting for PM mode out of range [0,2].\n"); + /* 0: CAM constant awake mode */ + /* 1: PS (Power save) mode */ + /* 2: Fast PS mode */ + } + + if (wlu_set(irh, WLC_SET_PM, &val, sizeof(int)) < 0) { + printf("wlmPMmode: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmRoamingOn(void) +{ + if (wlu_iovar_setint(irh, "roam_off", 0) < 0) { + printf("wlmRoamingOn: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmRoamingOff(void) +{ + if (wlu_iovar_setint(irh, "roam_off", 1) < 0) { + printf("wlmRoamingOff: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmRoamTriggerLevelGet(int *val, WLM_BAND band) +{ + struct { + int val; + int band; + } x; + + x.band = htod32(band); + x.val = -1; + + if (wlu_get(irh, WLC_GET_ROAM_TRIGGER, &x, sizeof(x)) < 0) { + printf("wlmRoamTriggerLevelGet: %s\n", wlmLastError()); + return FALSE; + } + + *val = htod32(x.val); + + return TRUE; +} + +int wlmRoamTriggerLevelSet(int val, WLM_BAND band) +{ + struct { + int val; + int band; + } x; + + x.band = htod32(band); + x.val = htod32(val); + + if (wlu_set(irh, WLC_SET_ROAM_TRIGGER, &x, sizeof(x)) < 0) { + printf("wlmRoamTriggerLevelSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmFrameBurstOn(void) +{ + int val = 1; + + if (wlu_set(irh, WLC_SET_FAKEFRAG, &val, sizeof(int)) < 0) { + printf("wlmFrameBurstOn: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmFrameBurstOff(void) +{ + int val = 0; + + if (wlu_set(irh, WLC_SET_FAKEFRAG, &val, sizeof(int)) < 0) { + printf("wlmFrameBurstOff: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + + +int wlmBeaconIntervalSet(int val) +{ + val = htod32(val); + if (wlu_set(irh, WLC_SET_BCNPRD, &val, sizeof(int)) < 0) { + printf("wlmBeaconIntervalSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmAMPDUModeSet(int val) +{ + val = htod32(val); + if (wlu_iovar_setint(irh, "ampdu", val) < 0) { + printf("wlmAMPDUModeSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmMIMOBandwidthCapabilitySet(int val) +{ + val = htod32(val); + + if (wlu_iovar_setint(irh, "mimo_bw_cap", val) < 0) { + printf("wlmMIMOBandwidthCapabilitySet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmInterferenceSet(int val) +{ + val = htod32(val); + + if (val < 0 || val > 4) { + printf("wlmInterferenceSet: interference setting out of range [0, 4]\n"); + return FALSE; + } + + if (wlu_set(irh, WLC_SET_INTERFERENCE_MODE, &val, sizeof(int)) < 0) { + printf("wlmInterferenceSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmInterferenceOverrideSet(int val) +{ + val = htod32(val); + + if (val < 0 || val > 4) { + printf("wlmInterferenceOverrideSet: interference setting out of range [0, 4]\n"); + return FALSE; + } + + if (wlu_set(irh, WLC_SET_INTERFERENCE_OVERRIDE_MODE, &val, sizeof(int)) < 0) { + printf("wlmInterferenceOverrideSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmTransmitBandwidthSet(int val) +{ + val = htod32(val); + + if (wlu_iovar_setint(irh, "mimo_txbw", val) < 0) { + printf("wlmTransmitBadnwidthSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmShortGuardIntervalSet(int val) +{ + val = htod32(val); + + if (wlu_iovar_setint(irh, "sgi_tx", val) < 0) { + printf("wlmShortGuardIntervalSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmShortGuardIntervalRxSet(int val) +{ + val = htod32(val); + + if (wlu_iovar_setint(irh, "sgi_rx", val) < 0) { + printf("wlmShortGuardIntervalRxSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmObssCoexSet(int val) +{ + val = htod32(val); + + if (wlu_iovar_setint(irh, "obss_coex", val) < 0) { + printf("wlmObssCoexSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmPHYPeriodicalCalSet(void) +{ + if (wlu_iovar_setint(irh, "phy_percal", 0) < 0) { + printf("wlmPHYPeriodicalCalSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmPHYForceCalSet(void) +{ + if (wlu_iovar_setint(irh, "phy_forcecal", 0) < 0) { + printf("wlmPHYForceCalSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmPHYScramblerUpdateDisable(void) +{ + if (wlu_iovar_setint(irh, "phy_scraminit", 0x7f) < 0) { + printf("wlmPHYScramblerUpdateDisable: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmPHYScramblerUpdateEnable(void) +{ + if (wlu_iovar_setint(irh, "phy_scraminit", -1) < 0) { + printf("wlmPHYScramblerUpdateEnable: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmPHYWatchdogSet(int val) +{ + val = htod32(val); + + if (wlu_iovar_setint(irh, "phy_watchdog", val) < 0) { + printf("wlmPHYWatchdogSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmTemperatureSensorDisable(void) +{ + int val = 1; /* 0 = temp sensor enabled; 1 = temp sensor disabled */ + if (wlu_iovar_setint(irh, "tempsense_disable", val) < 0) { + printf("wlmTempSensorDisable %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmTemperatureSensorEnable(void) +{ + int val = 0; /* 0 = temp sensor enabled; 1 = temp sensor disabled */ + if (wlu_iovar_setint(irh, "tempsense_disable", val) < 0) { + printf("wlmTempSensorEnable %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmTransmitCoreSet(int val) +{ val = htod32(val); + + if (wlu_iovar_setint(irh, "txcore", val) < 0) { + printf("wlmTransmitCoreSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmPhyTempSenseGet(int *val) +{ + if (wlu_iovar_getint(irh, "phy_tempsense", val) < 0) { + printf("wlmPhyTempSense: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmOtpFabidGet(int *val) +{ + if (wlu_iovar_getint(irh, "otp_fabid", val)) { + printf("wlmOtpFabid: %s\n", wlmLastError()); + return FALSE; + } + return TRUE; +} + + +/* Defined located in src/wl/bcmwifi/src/bcmwifi_channels.c */ +/* 40MHz channels in 5GHz band */ +static const uint8 wf_5g_40m_chans[] = + {38, 46, 54, 62, 102, 110, 118, 126, 134, 142, 151, 159}; +#define WF_NUM_5G_40M_CHANS \ + (sizeof(wf_5g_40m_chans)/sizeof(uint8)) + +/* 80MHz channels in 5GHz band */ +static const uint8 wf_5g_80m_chans[] = + {42, 58, 106, 122, 138, 155}; +#define WF_NUM_5G_80M_CHANS \ + (sizeof(wf_5g_80m_chans)/sizeof(uint8)) + +/* 160MHz channels in 5GHz band */ +static const uint8 wf_5g_160m_chans[] = + {50, 114}; +#define WF_NUM_5G_160M_CHANS \ + (sizeof(wf_5g_160m_chans)/sizeof(uint8)) + +static uint8 +center_chan_to_edge(uint bw) +{ + /* edge channels separated by BW - 10MHz on each side + * delta from cf to edge is half of that, + * MHz to channel num conversion is 5MHz/channel + */ + return (uint8)(((bw - 20) / 2) / 5); +} + +/* return channel number of the low edge of the band + * given the center channel and BW + */ +static uint8 +channel_low_edge(uint center_ch, uint bw) +{ + return (uint8)(center_ch - center_chan_to_edge(bw)); +} + +/* return side band number given center channel and control channel + * return -1 on error + */ +static int +channel_to_sb(uint center_ch, uint ctl_ch, uint bw) +{ + uint lowest = channel_low_edge(center_ch, bw); + uint sb; + + if ((ctl_ch - lowest) % 4) { + /* bad ctl channel, not mult 4 */ + return -1; + } + + sb = ((ctl_ch - lowest) / 4); + + /* sb must be a index to a 20MHz channel in range */ + if (sb >= (bw / 20)) { + /* ctl_ch must have been too high for the center_ch */ + return -1; + } + + return sb; +} + +int +wlmChannelSpecSet(int channel, int bandwidth, int sideband) +{ + chanspec_t chanspec = 0; + uint chspec_ch, chspec_band, chspec_bw, chspec_sb; + uint ctl_ch; + + /* Set control channel */ + if (channel > MAXCHANNEL) { + printf("wlmChannelSpecSet: %d ivalid channel exceed %d\n", + channel, MAXCHANNEL); + return FALSE; + } + + ctl_ch = channel; + + /* Set band */ + if (channel > CH_MAX_2G_CHANNEL) + chspec_band = WL_CHANSPEC_BAND_5G; + else + chspec_band = WL_CHANSPEC_BAND_2G; + + /* Set bandwidth */ + if (bandwidth == 10) + chspec_bw = WL_CHANSPEC_BW_10; + else if (bandwidth == 20) + chspec_bw = WL_CHANSPEC_BW_20; + else if (bandwidth == 40) + chspec_bw = WL_CHANSPEC_BW_40; + else if (bandwidth == 80) + chspec_bw = WL_CHANSPEC_BW_80; + else if (bandwidth == 160) + chspec_bw = WL_CHANSPEC_BW_160; + else if (bandwidth == 8080) + chspec_bw = WL_CHANSPEC_BW_8080; + else { + printf("wlmChannelSpecSet: %d is invalid channel bandwith," + "must be 10, 20, 40, 80, 160 or 8080\n", bandwidth); + return FALSE; + } + + /* Set side band */ + /* Sideband 1 or -1, gurantee 40Mhz channel */ + if ((bandwidth == 20) || (bandwidth == 10)) { + chspec_sb = 0; + chspec_ch = ctl_ch; + } + else if ((bandwidth == 40) && (sideband == -1)) { + chspec_sb = WL_CHANSPEC_CTL_SB_LLL; + chspec_ch = UPPER_20_SB(ctl_ch); + } + else if ((bandwidth == 40) && (sideband == 1)) { + chspec_sb = WL_CHANSPEC_CTL_SB_LLU; + chspec_ch = LOWER_20_SB(ctl_ch); + } + else if ((bandwidth == 80) || (bandwidth == 160)) { + /* figure out ctl sideband based on ctl channel and bandwidth */ + const uint8 *center_ch = NULL; + int num_ch = 0; + int sb = -1; + int i; + + if (chspec_bw == WL_CHANSPEC_BW_80) { + center_ch = wf_5g_80m_chans; + num_ch = WF_NUM_5G_80M_CHANS; + } + else if (chspec_bw == WL_CHANSPEC_BW_160) { + center_ch = wf_5g_160m_chans; + num_ch = WF_NUM_5G_160M_CHANS; + } else { + printf("wlmChannelSpecSet: unsupported channel bandwidth %d\n", bandwidth); + return FALSE; + } + + for (i = 0; i < num_ch; i++) { + sb = channel_to_sb(center_ch[i], channel, bandwidth); + if (sb > 0) { + chspec_ch = center_ch[i]; + chspec_sb = sb << WL_CHANSPEC_CTL_SB_SHIFT; + break; + } + } + + if (sb < 0) { + printf("wlmChannelSpecSet:" + "Can't find valid side band for channel %d\n", channel); + return FALSE; + } + } + else { + /* Otherwise, 80+80 */ + printf("wlmChannelSpecSet: Wrong bandwdith." + "For 80+80 chanspec, call wlm80Plus80ChannelSpecSet() instead.\n"); + return FALSE; + } + + /* Set channel */ + chanspec = chspec_band | chspec_ch |chspec_bw | chspec_sb; + + if (ioctl_version == 1) { + chanspec = wl_chspec_to_legacy(chanspec); + if (chanspec == INVCHANSPEC) { + printf("wlmChannelSpecSet: Invalid chanspec 0x%4x\n", chanspec); + return FALSE; + } + } + + if (wlu_iovar_setint(irh, "chanspec", (int) chanspec) < 0) { + printf("wlmChannelSpecSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +static int +channel_80mhz_to_id(uint ch) +{ + uint i; + for (i = 0; i < WF_NUM_5G_80M_CHANS; i ++) { + if (ch == wf_5g_80m_chans[i]) + return i; + } + + return -1; +} + + +int +wlm80Plus80ChannelSpecSet(int ch1, int ch2) +{ + chanspec_t chanspec = 0; + uint chspec_ch, chspec_band, chspec_bw, chspec_sb, ctl_ch; + int ch1_id = 0, ch2_id = 0; + int bw, sb; + + if ((ch1 < ch2) && (ch1 > CH_MAX_2G_CHANNEL)) + chspec_band = WL_CHANSPEC_BAND_5G; + else { + printf("wlm80Plus80ChannelSpecSet: Invalid channels." + "Both channels must be on 5G band" + "and first channel should be lower than second channel\n"); + return FALSE; + } + + ch1_id = channel_80mhz_to_id(ch1); + ch2_id = channel_80mhz_to_id(ch2); + ctl_ch = ch1; /* first channel is control channel? */ + + /* validate channels */ + if (ch1 >= ch2 || ch1_id < 0 || ch2_id < 0) { + printf("wlm80Plus80ChannelSpecSet: Invalid channels.\n"); + return FALSE; + } + + /* combined channel in chspec */ + chspec_ch = (((uint16)ch1_id << WL_CHANSPEC_CHAN1_SHIFT) | + ((uint16)ch2_id << WL_CHANSPEC_CHAN2_SHIFT)); + + /* set channel bandwidth */ + bw = 80; + chspec_bw = WL_CHANSPEC_BW_8080; + + /* does the primary channel fit with the 1st 80MHz channel ? */ + sb = channel_to_sb(ch1, ctl_ch, bw); + if (sb < 0) { + /* no, so does the primary channel fit with the 2nd 80MHz channel ? */ + sb = channel_to_sb(ch2, ctl_ch, bw); + if (sb < 0) { + /* no match for ctl_ch to either 80MHz center channel */ + return 0; + } + /* sb index is 0-3 for the low 80MHz channel, and 4-7 for + * the high 80MHz channel. Add 4 to to shift to high set. + */ + sb += 4; + } + + chspec_sb = sb << WL_CHANSPEC_CTL_SB_SHIFT; + chanspec = chspec_band | chspec_ch |chspec_bw | chspec_sb; + + if (wlu_iovar_setint(irh, "chanspec", (int) chanspec) < 0) { + printf("wlmChannelSpecSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmRtsThresholdOverride(int val) +{ + val = htod32(val); + + if (wlu_iovar_setint(irh, "rtsthresh", val) < 0) { + printf("wlmRtsThresholdOverride: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + + +int wlmSTBCTxSet(int val) +{ + val = htod32(val); + + if (wlu_iovar_setint(irh, "stbc_tx", val) < 0) { + printf("wlmSTBCTxSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + + +int wlmSTBCRxSet(int val) +{ + val = htod32(val); + + if (wlu_iovar_setint(irh, "stbc_rx", val) < 0) { + printf("wlmSTBCRxSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + + +int wlmTxChainSet(int val) +{ + val = htod32(val); + + if (wlu_iovar_setint(irh, "txchain", val) < 0) { + printf("wlmTxChainSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +int wlmRxChainSet(int val) +{ + val = htod32(val); + + if (wlu_iovar_setint(irh, "rxchain", val) < 0) { + printf("wlmRxChainSet: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + + +int wlmRxIQEstGet(float *val, int sampleCount, int ant) +{ + uint32 rxiq; + int sample_count = sampleCount; /* [0, 16], default: maximum 15 sample counts */ + int antenna = ant ; /* [0, 3], default: antenna 0 */ + uint8 resolution = 1; /* resolution default to 0.25dB */ + uint8 lpf_hpc = 1; + uint8 gain_correct = 0; + float x, y; + /* DEFAULT: + * gain_correct = 0 (disable gain correction), + * lpf_hpc = 1 (sets lpf hpc to lowest value), + * resolution = 0 (coarse), + * samples = 1024 (2^10) and antenna = 3 + * antenna = 0; + */ + antenna = 0; /* for signle core chip, core # should always be 0 */ + + rxiq = (gain_correct << 24) | (lpf_hpc << 20) | (resolution << 16) | (10 << 8) | 3; + if (gain_correct > 1) { + printf("wlmRxIQGet: invalid gain-correction select [0|1]\n"); + return FALSE; + } else { + gain_correct = gain_correct & 0xf; + rxiq = ((gain_correct << 24) | (rxiq & 0xffffff)); + } + + if (lpf_hpc > 1) { + printf("wlmRXIQGet: invalid lpf-hpc override select [0|1].\n"); + return FALSE; + } else { + lpf_hpc = lpf_hpc & 0xf; + rxiq = ((lpf_hpc << 20) | (rxiq & 0xf0fffff)); + } + + if (resolution > 1) { + printf("wlmRxIQGet: invalid resolution [0|1].\n"); + return FALSE; + } else { + resolution = resolution & 0xf; + rxiq = ((resolution << 16) | (rxiq & 0xff0ffff)); + } + + if ((sample_count < 0) || (sample_count > 16)) { + printf("wlmRxIQGet: SampleCount out of range of [0, 15].\n"); + return FALSE; + } else { + /* change for 4330 */ + rxiq = (((sample_count & 0xff) << 8) | (rxiq & 0xfff00ff)); + } + + if ((antenna < 0) || (antenna > 3)) { + printf("wlmRxIQGet: Antenna out of range of [0, 3].\n"); + return FALSE; + } else { + rxiq = ((rxiq & 0xfffff00) | (antenna & 0xff)); + } + + /* + printf("wlmRxIQGet: rxiq = 0x%x before wlu_iovar_setint().\n", rxiq); + */ + if ((wlu_iovar_setint(irh, "phy_rxiqest", (int) rxiq) < 0)) { + printf("wlmRxIQGet: %s\n", wlmLastError()); + return FALSE; + } + + if ((wlu_iovar_getint(irh, "phy_rxiqest", (int*)&rxiq) < 0)) { + printf("wlmRxIQGet: %s\n", wlmLastError()); + return FALSE; + } + /* + printf("wlmRxIQGet: rxiq = 0x%x after wlu_iovar_getint\n.", rxiq); + */ + if (resolution == 1) { + /* fine resolutin power reporting (0.25dB resolution) */ + uint8 core; + int16 tmp; + /* + printf("wlmRxIQGet: inside resulution == 1 block, rxiq = 0x%x\n", rxiq); + */ + if (rxiq >> 20) { + /* Three chains: return the core matches the antenna number */ + for (core = 0; core < 3; core++) { + if (core == antenna) { + tmp = (rxiq >>(10*core)) & 0x3ff; + tmp = ((int16)(tmp << 6)) >>6; /* sign extension */ + break; + } + } + } else if (rxiq >> 10) { + /* Two chains: return the core matches the antenna number */ + for (core = 0; core < 2; core++) { + if (core == antenna) { + tmp = (rxiq >>(10*core)) & 0x3ff; + tmp = ((int16)(tmp << 6)) >> 6; /* sign extension */ + break; + } + } + } else { + /* 1-chain specific */ + int16 tmp; + tmp = (rxiq & 0x3ff); + tmp = ((int16)(tmp << 6)) >> 6; /* signed extension */ + /* + printf("wlmRxIQGet: single core, tmp 0x%x\n", tmp); + printf("wlmRxIQGet: tmp before processing 0x%x\n", tmp); + */ + if (tmp < 0) { + tmp = -1 * tmp; + } + x = (float) (tmp >> 2); + y = (float) (tmp & 0x3); + *val = (float)(x + (y * 25) /100) * (-1); + } + } else { + /* return the core matches the antenna number */ + *val = (float)((rxiq >> (8 *antenna)) & 0xff); + } + + return TRUE; +} +int wlmPHYTxPowerIndexGet(unsigned int *val, const char *chipid) +{ + uint32 power_index = (uint32)-1; + uint32 txpwridx[4] = {0}; + int chip = atoi(chipid); + + switch (chip) { + case 4329: + case 43291: + if (wlu_iovar_getint(irh, "sslpnphy_txpwrindex", (int*)&power_index) < 0) { + printf("wlmPHYTxPowerIndexGet: %s\n", wlmLastError()); + return FALSE; + } + *val = power_index; + break; + case 4325: + if (wlu_iovar_getint(irh, "lppphy_txpwrindex", (int*)&power_index) < 0) { + printf("wlmPHYTxPowerIndexGet: %s\n", wlmLastError()); + return FALSE; + } + *val = power_index; + break; + default: + if (wlu_iovar_getint(irh, "phy_txpwrindex", (int*)&txpwridx[0]) < 0) { + printf("wlmPHYTxPowerIndexGet: %s\n", wlmLastError()); + return FALSE; + } + txpwridx[0] = dtoh32(txpwridx[0]); + *val = txpwridx[0]; + break; + } + + return TRUE; +} + +int wlmPHYTxPowerIndexSet(unsigned int val, const char *chipid) +{ + uint32 power_index; + uint32 txpwridx[4] = {0}; + int chip = atoi(chipid); + + power_index = dtoh32(val); + switch (chip) { + case 4329: + case 43291: + if (wlu_iovar_setint(irh, "sslpnphy_txpwrindex", (int)power_index) < 0) { + printf("wlmPHYTxPowerIndexSet: %s\n", wlmLastError()); + return FALSE; + } + break; + case 4325: + if (wlu_iovar_setint(irh, "lppphy_txpwrindex", (int)power_index) < 0) { + printf("wlmPHYTxPowerIndexSet: %s\n", wlmLastError()); + return FALSE; + } + break; + default: + txpwridx[0] = (int8) (power_index & 0xff); + txpwridx[1] = (int8) ((power_index >> 8) & 0xff); + txpwridx[2] = (int8) ((power_index >> 16) & 0xff); + txpwridx[3] = (int8) ((power_index >> 24) & 0xff); + + if (wlu_var_setbuf_sm(irh, + "phy_txpwrindex", txpwridx, 4*sizeof(uint32)) < 0) { + printf("wlmPHYTxPowerIndexSet: %s\n", wlmLastError()); + return FALSE; + } + break; + } + + return TRUE; +} + +int wlmRIFSEnable(int enable) +{ + int val, rifs; + + val = rifs = htod32(enable); + if (rifs != 0 && rifs != 1) { + printf("wlmRIFSEnable: Usage: input must be 0 or 1\n"); + return FALSE; + } + + if (wlu_set(irh, WLC_SET_FAKEFRAG, &val, sizeof(int)) < 0) { + printf("wlmRIFSEnable: %s\n", wlmLastError()); + return FALSE; + } + + if (wlu_iovar_setint(irh, "rifs", (int)rifs) < 0) { + printf("wlmRIFSEnable: %s\n", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +#if defined(WIN32) +#define WLM_SCAN_PARAMS_SSID_MAX 10 +#define WLM_DUMP_BUF_LEN (127 * 1024) +#define WLM_SCAN_PARAMS_FIXED_SIZE WL_SCAN_PARAMS_FIXED_SIZE /* 64 */ +#define WLM_NUMCHANNELS WL_NUMCHANNELS +#define WLM_SCANNETWORK_DELAY 5000 /* ms */ +#define TEMP_BUF_LEN 2048 +int wlmScanNetworks(char* results_buf, int len) +{ + wl_scan_params_t *params; + int params_size = WLM_SCAN_PARAMS_FIXED_SIZE + WLM_NUMCHANNELS * sizeof(uint16); + wlc_ssid_t ssids[WLM_SCAN_PARAMS_SSID_MAX]; + char *dump_buf, *dump_buf_orig; + int err, i; + wl_scan_results_t *results; + wl_bss_info_t *bi; + bool pass = TRUE; + uint offset; + int n; + char temp_buf[TEMP_BUF_LEN]; + if (len > WLM_DUMP_BUF_LEN) { + printf("wlmScanNetwork: requested len %d exceeded maximum %d bytes.\n", + len, WLM_DUMP_BUF_LEN); + return FALSE; + } + params_size += WLM_SCAN_PARAMS_SSID_MAX * sizeof(wlc_ssid_t); + params = (wl_scan_params_t*)malloc(params_size); + if (params == NULL) { + printf("wlmScanNetwork: Error alloating %d bytes for scan params\n", params_size); + return FALSE; + } + memset(params, 0, params_size); + memcpy(¶ms->bssid, ðer_bcast, ETHER_ADDR_LEN); + params->bss_type = DOT11_BSSTYPE_ANY; + params->scan_type = 0; /* active scan */ + params->nprobes = -1; + params->active_time = -1; + params->passive_time = -1; + params->home_time = -1; + params->channel_num = 0; + memset(ssids, 0, WLM_SCAN_PARAMS_SSID_MAX * sizeof(wlc_ssid_t)); + err = wlu_set(irh, WLC_SCAN, params, params_size); + free(params); + if (err < 0) { + printf("wlmScanNetwork: Failed sending scan request\n"); + return FALSE; + } + Sleep(WLM_SCANNETWORK_DELAY); + dump_buf = dump_buf_orig = (char*) malloc(WLM_DUMP_BUF_LEN); + if (dump_buf == NULL) { + printf("wlmScanNetwork: Error alloating %d bytes for dump_buf\n", WLM_DUMP_BUF_LEN); + return FALSE; + } + results = (wl_scan_results_t*)dump_buf; + results->buflen = WLM_DUMP_BUF_LEN; + err = wlu_get(irh, WLC_SCAN_RESULTS, dump_buf, WLM_DUMP_BUF_LEN); + if (err == 0) { + if (results->count == 0) { + printf("wlmScanNetwork: no network has been found.\n"); + pass = FALSE; + } else if (results->version != WL_BSS_INFO_VERSION && + results->version != LEGACY2_WL_BSS_INFO_VERSION && + results->version != LEGACY_WL_BSS_INFO_VERSION) { + printf("wlmScanNetwork: driver has bss_info_version %d " + "but this program supports only version %d.\n", + results->version, WL_BSS_INFO_VERSION); + pass = FALSE; + } else { + bi = results->bss_info; + offset = 0; + for (i = 0; i < (int)results->count; i++) { + n = 0; + memset(temp_buf, 0, TEMP_BUF_LEN); + wlm_dump_bss_info(bi, &temp_buf[0], &n); + offset += snprintf(results_buf + offset, n, "%s", &temp_buf[0]); + bi = (wl_bss_info_t*)((int8*)bi + dtoh32(bi->length)); + } + } + } else { + printf("wlmScanNetwork: failed to get scan results.\n"); + pass = FALSE; + } + free(dump_buf); + return pass; +} + +static void +wlm_dump_bss_info(wl_bss_info_t *bi, char *scan_dump_buf, int *len) +{ + char ssidbuf[SSID_FMT_BUF_LEN]; + char chspec_str[CHANSPEC_STR_LEN]; + wl_bss_info_107_t *old_bi; + int offset = 0; + int n; + *len = 0; + if (dtoh32(bi->version) == LEGACY_WL_BSS_INFO_VERSION) { + old_bi = (wl_bss_info_107_t *)bi; + bi->chanspec = CH20MHZ_CHSPEC(old_bi->channel); + bi->ie_length = old_bi->ie_length; + bi->ie_offset = sizeof(wl_bss_info_107_t); + } + n = wlm_format_ssid(ssidbuf, bi->SSID, bi->SSID_len); + offset += sprintf(scan_dump_buf, "SSID: \"%s\"\n", ssidbuf); + offset += sprintf(scan_dump_buf + offset, + "Mode: %s\t", wlm_capmode2str(dtoh16(bi->capability))); + offset += sprintf(scan_dump_buf + offset, "RSSI: %d dBm\t", (int16)(dtoh16(bi->RSSI))); + if (dtoh32(bi->version) == WL_BSS_INFO_VERSION) { + offset += sprintf(scan_dump_buf + offset, + "SNR: %d dB\t", (int16)(dtoh16(bi->SNR))); + } + offset += sprintf(scan_dump_buf + offset, "noise: %d dBm\t", bi->phy_noise); + offset += sprintf(scan_dump_buf + offset, + "Channel: %s\n", wlm_wf_chspec_ntoa(bi->chanspec, chspec_str)); + offset += sprintf(scan_dump_buf + offset, + "BSSID: %s\t", wlm_ether_etoa(&bi->BSSID)); + offset += sprintf(scan_dump_buf + offset, "Capability: "); + bi->capability = dtoh16(bi->capability); + if (bi->capability & DOT11_CAP_ESS) + offset += sprintf(scan_dump_buf + offset, "ESS "); + if (bi->capability & DOT11_CAP_IBSS) + offset += sprintf(scan_dump_buf + offset, "IBSS "); + if (bi->capability & DOT11_CAP_POLLABLE) + offset += sprintf(scan_dump_buf + offset, "Pollable "); + if (bi->capability & DOT11_CAP_POLL_RQ) + offset += sprintf(scan_dump_buf + offset, "PollReq "); + if (bi->capability & DOT11_CAP_PRIVACY) + offset += sprintf(scan_dump_buf + offset, "WEP "); + if (bi->capability & DOT11_CAP_SHORT) + offset += sprintf(scan_dump_buf + offset, "ShortPre "); + if (bi->capability & DOT11_CAP_PBCC) + offset += sprintf(scan_dump_buf + offset, "PBCC "); + if (bi->capability & DOT11_CAP_AGILITY) + offset += sprintf(scan_dump_buf + offset, "Agility "); + if (bi->capability & DOT11_CAP_SHORTSLOT) + offset += sprintf(scan_dump_buf + offset, "ShortSlot "); + if (bi->capability & DOT11_CAP_CCK_OFDM) + offset += sprintf(scan_dump_buf + offset, "CCK-OFDM "); + offset += sprintf(scan_dump_buf + offset, "\n\n"); + *len = offset; +} +int wlm_format_ssid(char* buf, uint8* ssid, int ssid_len) +{ + int i; + uint8 c; + char *p = buf; + for (i = 0; i < ssid_len; i++) { + c = ssid[i]; + if (c == '\\') { + *p++ = '\\'; + *p++ = '\\'; + } else if (isprint((uchar)c)) { + *p++ = (char)c; + } else { + p += sprintf(p, "\\x%0x2X", c); + } + } + *p = '\0'; + return p - buf; +} +static char nwm_etoa_buf[ETHER_ADDR_LEN *3]; +static char * +wlm_ether_etoa(const struct ether_addr *n) +{ + char *c = nwm_etoa_buf; + int i; + for (i = 0; i < ETHER_ADDR_LEN; i++) { + if (i) + *c++ = ':'; + c += sprintf(c, "%02X", n->octet[i] & 0xff); + } + return nwm_etoa_buf; +} +static const char * +wlm_capmode2str(uint16 capability) +{ + capability &= (DOT11_CAP_ESS | DOT11_CAP_IBSS); + if (capability == DOT11_CAP_ESS) + return "Managed"; + else if (capability == DOT11_CAP_IBSS) + return "Ad Hoc"; + else + return ""; +} +static char * +wlm_wf_chspec_ntoa(chanspec_t chspec, char *buf) +{ + const char *band, *bw, *sb; + uint channel; + band = ""; + bw = ""; + sb = ""; + channel = CHSPEC_CHANNEL(chspec); + if ((CHSPEC_IS2G(chspec) && channel > CH_MAX_2G_CHANNEL) || + (CHSPEC_IS5G(chspec) && channel <= CH_MAX_2G_CHANNEL)) + band = (CHSPEC_IS2G(chspec)) ? "b" : "a"; + if (CHSPEC_IS40(chspec)) { + if (CHSPEC_SB_UPPER(chspec)) { + sb = "u"; + channel += CH_10MHZ_APART; + } else { + sb = "l"; + channel -= CH_10MHZ_APART; + } + } else if (CHSPEC_IS10(chspec)) { + bw = "n"; + } + snprintf(buf, 6, "%d%s%s%s", channel, band, bw, sb); + return (buf); +} +#endif /* WIN32 */ + +int +wlmCisUpdate(int off, char* bufp) +{ + int ret = 0; + int preview = 0; + uint32 len; + uint32 updatelen; + uint32 i; + char hexstr[3]; + char bytes[SROM_MAX]; + char buf[WLC_IOCTL_MAXLEN] = {0}; + cis_rw_t cish; + char *cisp; + updatelen = strlen(bufp); + if (updatelen % 2) { + printf("wlmCisUpdate: cisupdate hex string must contain even number of digits\n"); + return FALSE; + } + updatelen /= 2; + for (i = 0; i < updatelen; i++) { + hexstr[0] = *bufp; + hexstr[1] = *(bufp + 1); + if (!isxdigit((int)hexstr[0]) || !isxdigit((int)hexstr[1])) { + printf("wlmCisUpdate: cisupdate invalid hex digit(s) in %s\n", bufp); + return FALSE; + } + hexstr[2] = '\0'; + bytes[i] = (char) strtol(hexstr, NULL, 16); + bufp += 2; + } + cish.source = 0; + cish.byteoff = 0; + cish.nbytes = 0; + memset(buf, 0, WLC_IOCTL_MAXLEN); + strcpy(buf + 9, "cisdump"); + bufp = buf + strlen("cisdump") + 1 + 9; + memcpy(bufp, (char*)&cish, sizeof(cish)); + bufp += sizeof(cish); + ret = wl_get(irh, WLC_GET_VAR, buf + 9, (bufp - (buf + 9)) + SROM_MAX); + if (ret < 0) { + printf("wlmCisUpdate, cisupdate failed to read cis: %d\n", ret); + return FALSE; + } + bufp = buf + 9; + memcpy((char*)&cish, bufp, sizeof(cish)); + len = dtoh32(cish.nbytes); + if ((off + updatelen) > len) { + printf("wlmCisUpdate, cisupdate offset %d plus update len %d exceeds CIS len %d\n", + off, updatelen, len); + return FALSE; + } + bufp += sizeof(cish); + if (cish.source == WLC_CIS_SROM) { + for (i = 0; i < updatelen; ++i) + bufp[off + i] = bytes[i] & 0xff; + } else { + for (i = 0; i < updatelen; ++i) { + if (~bytes[i] & bufp[off + i]) { + printf("wlmCisUpdate: OTP update incompatible:" + " update[%d](0x%02x)->cis[%d](0x%02x)\n", + i, bytes[i], off + i, bufp[off + i]); + return FALSE; + } + bufp[off + i] |= bytes[i]; + } + } + bufp = buf; + strcpy(bufp, "ciswrite"); + bufp += strlen("ciswrite") + 1; + cisp = bufp; + cish.source = 0; + cish.byteoff = 0; + cish.nbytes = htod32(len); + memcpy(cisp, (char*)&cish, sizeof(cish)); + if (preview) { + printf("wlmCisUpdate: offset %d data %s cislen %d\n", off, bufp, len); + bufp += sizeof(cish); + for (i = 0; i < len; i++) { + if ((i % 8) == 0) + printf("\nByte %3d: ", i); + printf("0x%02x ", (uint8)bufp[i]); + } + printf("\n"); + } else { + ret = wl_set(irh, WLC_SET_VAR, buf, (cisp - buf) + sizeof(cish) + len); + if (ret < 0) { + printf("wlmCisUpdate: cisupdate cis write failed: %d\n", ret); + return FALSE; + } + } + return TRUE; +} + +#if defined(WIN32) +wlmCommandPassThrough(char *cmd_line, char *result_buf, int *len) +{ + char *tmp_argv[WLM_NUM_ARGS]; + char **argv = tmp_argv; + int argc; + FILE *pf; + char *buf; + int ret = 0; + *len = 0; + + + buf = (char *)malloc(MAX_COMMAND_RESULT_BUF_LEN); + if (buf == NULL) { + printf("wlmCommandPassThrough: failed allocate memory\n"); + return FALSE; + } + memset(buf, 0, MAX_COMMAND_RESULT_BUF_LEN); + + argc = wlm_buf_to_args(cmd_line, argv); + if (argc < 1) { + printf("wlmCommandPassThrough: failed to convert string to argv\n"); + return FALSE; + } + + ret = wlm_process_args(irh, argv); + /* restore stdout */ + freopen("CON", "w", stdout); + + /* read from output file and copy to return buf */ + pf = fopen(outf, "r"); + if (pf == NULL) { + printf("wlmCommandPassThrough: failed to open %s\n", outf); + ret = -1; + goto done; + } + + *len = fread(buf, 1, MAX_COMMAND_RESULT_BUF_LEN, pf); + strncpy(result_buf, buf, *len); + +done: + free(buf); + if (pf) + fclose(pf); + + if (ret < 0) { + printf("wlmCommandPassThrough: %s", wlmLastError()); + return FALSE; + } + + return TRUE; +} + +static int +wlm_buf_to_args(char *tmp, char *new_args[]) +{ + char line[512]; + char *token; + int argc = 0; + + strcpy(line, tmp); + while ((argc < (WLM_NUM_ARGS - 1)) && + ((token = strtok(argc ? NULL : line, " \t")) != NULL)) { + + /* Specifically make sure empty arguments (like SSID) are empty */ + if (token[0] == '"' && token[1] == '"') { + token[0] = '\0'; + } + + new_args[argc] = malloc(strlen(token)+1); + strncpy(new_args[argc], token, strlen(token)+1); + argc++; + } + new_args[argc] = NULL; + return argc; +} + + +static int +wlm_process_args(HANDLE irh, char **argv) +{ + char *ifname = NULL; + int help = 0; + int init_err = FALSE; + int status = 0; + int err = 0; + cmd_t *cmd = NULL; + FILE *pf; + + /* redirect stdout to a file */ + pf = freopen(outf, "w", stdout); + if (pf == NULL) { + printf("wlm_process_args: failed to open %s\n", outf); + return FALSE; + } + + if (*argv) { + cmd = wlm_find_cmd(*argv, 0, rwl_get_remote_type()); + + /* defaults to using the set_var and get_var commands */ + if (!cmd) + cmd = &wl_varcmd; + + /* do command */ + if (cmd->name) + err = (*cmd->func)((void *) irh, cmd, argv); + } + + /* restore stdout */ + freopen("CON", "w", stdout); + flushall(); + + if (pf) + fclose(pf); + + if (err < 0) + return FALSE; + + return TRUE; +} + +static cmd_t * +wlm_find_cmd(char *name, int ap_mode, int remote_os_type) +{ + cmd_t *cmd = NULL; + cmd_t *ndis_cmd = NULL; + cmd_t *base_cmd = NULL; + + /* search the wl_cmds */ + for (cmd = wl_cmds; cmd->name && strcmp(cmd->name, name); cmd++); + + if (cmd->name != NULL) + base_cmd = cmd; + + if (remote_os_type == LINUX_OS || remote_os_type == WINVISTA_OS) { + /* prefer a wl cmd always */ + cmd = (base_cmd)?base_cmd:ndis_cmd; + } else { + /* if in ap mode, prefer a base wl_cmd over an ndis cmd, + * if in sta mode, prefer the ndis cmds + */ + if (ap_mode) + cmd = (base_cmd)?base_cmd:ndis_cmd; + else + cmd = (ndis_cmd)?ndis_cmd:base_cmd; + } + + return cmd; +} +#endif /* defined(WIN32) */ + +int wlmGpioOut(unsigned int mask, unsigned int val) +{ + uint32 *int_ptr; + char buf[32] = "\0"; + + mask = htod32(mask); + + val = htod32(val); + + if ((~mask & val) != 0) { + printf("wlmGpioOut: mask and val don't matcch"); + return FALSE; + } + + int_ptr = (uint32 *)buf; + memcpy(int_ptr, (const void *)&mask, sizeof(mask)); + int_ptr++; + memcpy(int_ptr, (const void *)&val, sizeof(val)); + + if (wlu_iovar_set(irh, "gpioout", buf, sizeof(uint32) *2) < 0) { + printf("wlmGpioOut: failed toggle gpio %d to %d\n", mask, val); + return FALSE; + } else + return TRUE; +} diff --git a/external/cache/sources/wl/wl/wlm.h b/external/cache/sources/wl/wl/wlm.h new file mode 100644 index 0000000..d5c5265 --- /dev/null +++ b/external/cache/sources/wl/wl/wlm.h @@ -0,0 +1,1241 @@ +/* + * Common (OS-independent) portion of + * WLM (Wireless LAN Manufacturing) test library. + * + * Copyright (C) 2013, Broadcom Corporation + * All Rights Reserved. + * + * This is UNPUBLISHED PROPRIETARY SOURCE CODE of Broadcom Corporation; + * the contents of this file may not be disclosed to third parties, copied + * or duplicated in any form, in whole or in part, without the prior + * written permission of Broadcom Corporation. + * + * $Id: wlm.h 377264 2013-01-05 04:05:33Z $ + */ + +#ifndef _wlm_h +#define _wlm_h + +#ifdef __cplusplus +extern "C" { +#endif + +/** +\mainpage mfgtest_api.h + +Overview: + +The MFG API DLL allows a user to talk to a DUT by providing functions +that abstract out the lower level details of the driver. + +The goal of this API is to make testing easier by providing enough +functionality for the user to perform various tasks without +requiring the user to know anything about the driver internals and, +in addition, any differences there may be between drivers. + +*/ + +#ifndef TRUE +#define TRUE 1 +#endif +#ifndef FALSE +#define FALSE 0 +#endif + +#ifndef NULL +#define NULL 0 +#endif + +#define WLM_MAX_FILENAME_LEN 256 + +#if defined(WIN32) +#define WLM_FUNCTION __declspec(dllexport) +#else +#define WLM_FUNCTION +#endif /* WIN32 */ + +#define WLM_VERSION_STR "wlm version: 10.07.0 (support 4330, 4334, 43236, 4360, 432x and more)" + +/* Supported DUT interfaces. */ +/* Values are used to select the interface used to talk to the DUT. */ +enum { + WLM_DUT_LOCAL = 0, /* client and DUT on same device */ + WLM_DUT_SERIAL = 1, /* client to DUT via serial */ + WLM_DUT_SOCKET = 2, /* client to DUT via Ethernet */ + WLM_DUT_WIFI = 3, /* client to DUT via WLAN */ + WLM_DUT_DONGLE = 4 /* client to DUT dongle via serial */ +}; +typedef int WLM_DUT_INTERFACE; + +/* Supported server ports. */ +/* Values are used to configure server port (for WLM_DUT_SOCKET only). */ +enum { + WLM_DEFAULT_DUT_SERVER_PORT = 8000 /* default */ +}; +typedef int WLM_DUT_SERVER_PORT; + +/* Supported DUT OS. */ +/* Values are used to select the OS of the DUT. */ +enum { + WLM_DUT_OS_LINUX = 1, /* Linux DUT */ + WLM_DUT_OS_WIN32 = 2 /* Win32 DUT */ +}; +typedef int WLM_DUT_OS; + +/* Supported join modes. */ +/* Values are used to select the mode used to join a network. */ +enum { + WLM_MODE_IBSS = 0, /* IBSS Mode. (Adhoc) */ + WLM_MODE_BSS = 1, /* BSS Mode. */ + WLM_MODE_AUTO = 2 /* Auto. */ +}; +typedef int WLM_JOIN_MODE; + +/* Supported bands. */ +/* Values are used to select the band used for testing. */ +enum { + WLM_BAND_AUTO = 0, /* auto select */ + WLM_BAND_5G = 1, /* 5G Band. */ + WLM_BAND_2G = 2, /* 2G Band. */ + WLM_BAND_DUAL = WLM_BAND_2G | WLM_BAND_5G /* Dual Band. */ +}; +typedef int WLM_BAND; + +/* Supported gmode. */ +/* Values are used to select gmode used for testing. */ +enum { + WLM_GMODE_LEGACYB = 0, + WLM_GMODE_AUTO = 1, + WLM_GMODE_GONLY = 2, + WLM_GMODE_BDEFERED = 3, + WLM_GMODE_PERFORMANCE = 4, + WLM_GMODE_LRS = 5 +}; +typedef int WLM_GMODE; + +/* Supported legacy rates. */ +/* Values are used to select the rate used for testing. */ +enum { + WLM_RATE_AUTO = 0, + WLM_RATE_1M = 2, + WLM_RATE_2M = 4, + WLM_RATE_5M5 = 11, + WLM_RATE_6M = 12, + WLM_RATE_9M = 18, + WLM_RATE_11M = 22, + WLM_RATE_12M = 24, + WLM_RATE_18M = 36, + WLM_RATE_24M = 48, + WLM_RATE_36M = 72, + WLM_RATE_48M = 96, + WLM_RATE_54M = 108 +}; +typedef int WLM_RATE; + +/* Supported MCS rates */ +enum { + WLM_MCS_RATE_0 = 0, + WLM_MCS_RATE_1 = 1, + WLM_MCS_RATE_2 = 2, + WLM_MCS_RATE_3 = 3, + WLM_MCS_RATE_4 = 4, + WLM_MCS_RATE_5 = 5, + WLM_MCS_RATE_6 = 6, + WLM_MCS_RATE_7 = 7, + WLM_MCS_RATE_8 = 8, + WLM_MCS_RATE_9 = 9, + WLM_MCS_RATE_10 = 10, + WLM_MCS_RATE_11 = 11, + WLM_MCS_RATE_12 = 12, + WLM_MCS_RATE_13 = 13, + WLM_MCS_RATE_14 = 14, + WLM_MCS_RATE_15 = 15, + WLM_MCS_RATE_16 = 16, + WLM_MCS_RATE_17 = 17, + WLM_MCS_RATE_18 = 18, + WLM_MCS_RATE_19 = 19, + WLM_MCS_RATE_20 = 20, + WLM_MCS_RATE_21 = 21, + WLM_MCS_RATE_22 = 22, + WLM_MCS_RATE_23 = 23, + WLM_MCS_RATE_24 = 24, + WLM_MCS_RATE_25 = 25, + WLM_MCS_RATE_26 = 26, + WLM_MCS_RATE_27 = 27, + WLM_MCS_RATE_28 = 28, + WLM_MCS_RATE_29 = 29, + WLM_MCS_RATE_30 = 30, + WLM_MCS_RATE_31 = 31, + WLM_MCS_RATE_32 = 32 +}; + +typedef int WLM_MCS_RATE; + +/* Supported STF mode */ +enum { + WLM_STF_MODE_SISO = 0, /* stf mode SISO */ + WLM_STF_MODE_CDD = 1, /* stf mode CDD */ + WLM_STF_MODE_STBC = 2, /* stf mode STBC */ + WLM_STF_MODE_SDM = 3 /* stf mode SDM */ +}; +typedef int WLM_STF_MODE; + + +/* Supported PLCP preambles. */ +/* Values are used to select the preamble used for testing. */ +enum { + WLM_PREAMBLE_AUTO = -1, + WLM_PREAMBLE_SHORT = 0, + WLM_PREAMBLE_LONG = 1 +}; +typedef int WLM_PREAMBLE; + +/* Supported MIMO preamble types */ +enum { + WLM_MIMO_MIXEDMODE = 0, + WLM_MIMO_GREENFIELD = 1 +}; +typedef int WLM_MIMO_PREAMBLE; + +enum { + WLM_CHAN_FREQ_RANGE_2G = 0, + WLM_CHAN_FREQ_RANGE_5GL = 1, + WLM_CHAN_FREQ_RANGE_5GM = 2, + WLM_CHAN_FREQ_RANGE_5GH = 3, + WLM_CHAN_FREQ_RANGE_5GLL_5BAND = 4, + WLM_CHAN_FREQ_RANGE_5GLH_5BAND = 5, + WLM_CHAN_FREQ_RANGE_5GML_5BAND = 6, + WLM_CHAN_FREQ_RANGE_5GMH_5BAND = 7, + WLM_CHAN_FREQ_RANGE_5GH_5BAND = 8, + WLM_CHAN_FREQ_RANGE_5G_BAND0 = 1, /* AC 5G sub band */ + WLM_CHAN_FREQ_RANGE_5G_BAND1 = 2, /* AC 5G sub band */ + WLM_CHAN_FREQ_RANGE_5G_BAND2 = 3, /* AC 5G sub band */ + WLM_CHAN_FREQ_RANGE_5G_BAND3 = 4, /* AC 5G sub band */ + WLM_CHAN_FREQ_RANGE_5G_4BAND = 5 +}; +typedef int WLM_BANDRANGE; + +/* Supported image formats modes. */ +/* Values are used to select the type of image to read/write. */ +enum { + WLM_TYPE_AUTO = 0, /* Auto mode. */ + WLM_TYPE_SROM = 1, /* SROM. */ + WLM_TYPE_OTP = 2 /* OTP. */ +}; +typedef int WLM_IMAGE_TYPE; + +/* Supported authentication type. */ +/* Values are used to select the authentication type used to join a network. */ +enum { + WLM_TYPE_OPEN = 0, /* Open */ + WLM_TYPE_SHARED = 1 /* Shared */ +}; +typedef int WLM_AUTH_TYPE; + +/* Supported authentication mode. */ +/* Values are used to select the authentication mode used to join a network. */ +enum { + WLM_WPA_AUTH_DISABLED = 0x0000, /* Legacy (i.e., non-WPA) */ + WLM_WPA_AUTH_NONE = 0x0001, /* none (IBSS) */ + WLM_WPA_AUTH_PSK = 0x0004, /* Pre-shared key */ + WLM_WPA2_AUTH_PSK = 0x0080 /* Pre-shared key */ +}; +typedef int WLM_AUTH_MODE; + +/* WLAN Security Encryption. */ +/* Values are used to select the type of encryption used for testing. */ +enum { + WLM_ENCRYPT_NONE = 0, /* No encryption. */ + WLM_ENCRYPT_WEP = 1, /* WEP encryption. */ + WLM_ENCRYPT_TKIP = 2, /* TKIP encryption. */ + WLM_ENCRYPT_AES = 4, /* AES encryption. */ + WLM_ENCRYPT_WSEC = 8, /* Software WSEC encryption. */ + WLM_ENCRYPT_FIPS = 0x80 /* FIPS encryption. */ +}; +typedef int WLM_ENCRYPTION; + +/* Country abbreviative code */ +#define WLM_COUNTRY_ALL "ALL" /* Default country code */ +#define WLM_COUNTRY_JAPAN "JP" /* Japan country code */ +#define WLM_COUNTRY_KOREA "KR" /* Korea country code */ + +/* number of 5G channel offsets */ +#define CGA_5G_OFFSETS_LEN 24 + +/* number of 2G channel offsets */ +#define CGA_2G_OFFSETS_LEN 14 + +/* Initialization related functions */ + +/* Get the WLM version. + * param[out] buffer version string for current wlm (dll, lib and dylib) + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmWLMVersionGet(const char **buffer); + +/* Performs any initialization required internally by the DLL. + * NOTE: This method needs to be called before any other API function. + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmApiInit(void); + +/* Performs any cleanup required internally by the DLL. + * NOTE: This method needs to be called by the user at the end of the application. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmApiCleanup(void); + +/* Selects the interface to use for talking to the DUT + * + * param[in] ifType The desired interface. + * param[in] ifName Expected value depends on ifType: + * For ifType = WLM_DUT_DONGLE, ifName is the COM port to use (ex: "COM1"). + * For ifType = WLM_DUT_SOCKET, ifName is the IP address to use + * (ex: "192.168.1.1" or "localhost"). + * param[in] dutServerPort Server port of DUT (used only for WLM_DUT_SOCKET). + * param[in] dutOs Operating system of DUT. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmSelectInterface(WLM_DUT_INTERFACE ifType, char *ifName, + WLM_DUT_SERVER_PORT dutServerPort, WLM_DUT_OS dutOs); + +/* Gets the WLAN driver version. + * + * param[in] buffer Buffer for the version string. + * param[in] length Maximum length of buffer. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmVersionGet(char *buffer, int length); + +/* Enables or disables wireless adapter. + * + * param[in] enable Set to true to bring adapter up, false to bring down. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmEnableAdapterUp(int enable); + +/* Check if adapter is currently up. + * + * param[in] up Return the up/down state of adapter. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmIsAdapterUp(int *up); + +/* Enables or disables Minimum Power Consumption (MPC). + * MPC will automatically turn off the radio if not associated to a network. + * + * param[in] enable Set to true to enable MPC, false to disable MPC. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmMinPowerConsumption(int enable); + +/* Sets the operating channel of the DUT. + * + * param[in] channel Desired channel. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmChannelSet(int channel); + +/* Sets the operating legacy rate (bg_rate or a_rate) for the DUT. + * + * param[in] rate Desired rate. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmRateSet(WLM_RATE rate); + +/* Sets the operating legacy rate (nrate) of the DUT. + * + * param[in] rate Desired rate. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmLegacyRateSet(WLM_RATE rate); + + +/* Sets the operating mcs rate and STF of the DUT + * param[in] Desired mcs rate [0, 7] for SISO (single-in-single-out) device. + * param[in] Stf mode, 0=SISO, 1= CDD, 2=STBC, 3=SDM + * return - True for sucess, false for failure. +*/ +WLM_FUNCTION +int wlmMcsRateSet(WLM_MCS_RATE mcs_rate, WLM_STF_MODE stf_mode); + +/* Sets the operating HT rate + * param[in] Desired mcs rate [0, 23] + * param[in] 1 = Use STBC extention; 0 = Don't use STBC extention + * param[in] 1 = Uses LDPC encoding; 0 = don't use LDPC encoding + * param[in] 1 = Use Short Guard Interval; 0 = don't use Short Guard Interval + * param[in] Number of tx chains beyond the minimum required for Space-Time-Streams + * param[in] transmition bandwidth in MHz; 20, 40, 80 + * return - True for sucess, false for failure. +*/ +WLM_FUNCTION +int wlmHTRateSet(WLM_MCS_RATE mcs_rate, int stbc, int ldpc, int sgi, int tx_exp, int bw); + +/* Sets the operating VHT rate + * param[in] Desired mcs rate [0, 9] + * param[in] Number of Spacial Stream + * param[in] 1 = Use STBC extention; 0 = Don't use STBC extention + * param[in] 1 = Uses LDPC encoding; 0 = don't use LDPC encoding + * param[in] 1 = Use Short Guard Interval; 0 = don't use Short Guard Interval + * param[in] Number of tx chains beyond the minimum required for Space-Time-Streams + * param[in] transmition bandwidth in MHz; 20, 40, 80 + * return - True for sucess, false for failure. +*/ +WLM_FUNCTION +int wlmVHTRateSet(WLM_MCS_RATE mcs_rate, int NSS, int stbc, int ldpc, int sgi, int tx_exp, int bw); + +/* Sets the PLCP preamble. + * + * param[in] preamble Desired preamble. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmPreambleSet(WLM_PREAMBLE preamble); + +/* Set the band. + * + * param[in] The Desired band. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmBandSet(WLM_BAND band); + +/* Get current band. + * + * param[out] The current band. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmBandGet(WLM_BAND *band); + +/* Get available bands. + * + * param[in] Available bands returned in the form of WLM_BANDs added. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmGetBandList(WLM_BAND * bands); + +/* Set gmode. + * + * param[in] The desired gmode. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmGmodeSet(WLM_GMODE gmode); + +/* Sets the receive antenna. + * + * param[in] antenna Desired antenna. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmRxAntSet(int antenna); + +/* Sets the transmit antenna. + * + * param[in] antenna Desired antenna. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmTxAntSet(int antenna); + +/* Retrieves the current estimated power in milli-dBm. + * + * param[out] estPower Power value returned. + * param[in] chain For MIMO device, specifies which chain to retrieve power value from. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmEstimatedPowerGet(int *estPower, int chain); + +/* Retrieves the current TX power in milli-dB. + * + * param[in] power Power value returned. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmTxPowerGet(int *power); + +/* Sets the current TX power. + * + * param[in] powerValue Desired power value. Expected to be in milli-dB. Use -1 to restore default. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmTxPowerSet(int powerValue); + +/* Retrieves the tx power control parameters for SISO system. + * + * param[in] bandrange. The desired band range for getting PA parameters. + * param[out] a1 PA parameter returned. + * param[out] b0 PA parameter returned. + * param[out] b1 PA parameter returned. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmPaParametersGet(WLM_BANDRANGE bandrange, + unsigned int *a1, unsigned int *b0, unsigned int *b1); + +/* Sets tx power control parameters for SISO system. + * + * param[in] bandrange. The desired band range for getting PA parameters. + * param[in] a1 PA parameter. + * param[in] b0 PA parameter. + * param[in] b1 PA parameter. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmPaParametersSet(WLM_BANDRANGE bandrange, + unsigned int a1, unsigned int b0, unsigned int b1); + +/* Retrieves the tx power control parameters for MIMO system. + * + * param[in] bandrange The desired band range for getting PA parameters. + * param[in] chain. The desired tx chain for getting PA parameters + * param[out] a1 PA parameter returned. + * param[out] b0 PA parameter returned. + * param[out] b1 PA parameter returned. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmMIMOPaParametersGet(WLM_BANDRANGE bandrange, int chain, + unsigned int *a1, unsigned int *b0, unsigned int *b1); + +/* Sets tx power control parameters for MIMO system. + * + * param[in] bandrange. The desired band range for getting PA parameters. + * param[in] chain. The desired tx chain for getting PA parameters. + * param[in] a1 PA parameter. + * param[in] b0 PA parameter. + * param[in] b1 PA parameter. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmMIMOPaParametersSet(WLM_BANDRANGE bandrange, int chain, + unsigned int a1, unsigned int b0, unsigned int b1); + +/* Retrieves the tx power control parameters for AC system. + * + * param[in] bandrange. The desired band range for getting PA parameters. + * WLM_CHAN_FREQ_RANGE_2G 0 + * WLM_CHAN_FREQ_RANGE_5G_BAND0 1 + * WLM_CHAN_FREQ_RANGE_5G_BAND1 2 + * WLM_CHAN_FREQ_RANGE_5G_BAND2 3 + * WLM_CHAN_FREQ_RANGE_5G_BAND3 4 + * param[in] modetype. The desired modulation or bw mode. Eg. 4335 + * pa2g-ofdm-20mh 0 + * pa2g-cck-20mhz 1 + * pa2g-reserved 2 + * pa5g-20mhz 0 + * pa5g-40mhz 1 + * pa5g-80mhz 2 + * param[in] chain. The desired tx chain for getting PA parameters + * param[out] a1 PA parameter returned. + * param[out] b0 PA parameter returned. + * param[out] b1 PA parameter returned. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmACPaParametersGet(WLM_BANDRANGE bandrange, int modetype, + unsigned int *a1, unsigned int *b0, unsigned int *b1); + +/* Sets tx power control parameters for AC system. + * + * param[in] bandrange. The desired band range for getting PA parameters. + * WLM_CHAN_FREQ_RANGE_2G 0 + * WLM_CHAN_FREQ_RANGE_5G_BAND0 1 + * WLM_CHAN_FREQ_RANGE_5G_BAND1 2 + * WLM_CHAN_FREQ_RANGE_5G_BAND2 3 + * WLM_CHAN_FREQ_RANGE_5G_BAND3 4 + * param[in] modetype. The desired modulation or bw mode. Eg. 4335 + * pa2g-ofdm-20mh 0 + * pa2g-cck-20mhz 1 + * pa2g-reserved 2 + * pa5g-20mhz 0 + * pa5g-40mhz 1 + * pa5g-80mhz 2 + * param[in] a1 PA parameter. + * param[in] b0 PA parameter. + * param[in] b1 PA parameter. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmACPaParametersSet(WLM_BANDRANGE bandrange, int modetype, + unsigned int a1, unsigned int b0, unsigned int b1); + +/* Retrieves the current MAC address of the device. + * + * param[in] macAddr MAC address returned. + * param[in] length Length of macAddr buffer. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmMacAddrGet(char *macAddr, int length); + +/* Sets the MAC address of the device. + * + * param[in] macAddr The desired MAC address. Expected format is "XX:XX:XX:XX:XX:XX". + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmMacAddrSet(const char* macAddr); + +/* Enables or disables output of a carrier tone. + * + * param[in] enable Set to true to enable carrier tone, false to disable. + * param[in] channel Desired channel. Ignored if enable is false. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmEnableCarrierTone(int enable, int channel); + +/* Enables or disables an EVM test. + * + * param[in] enable Set to true to enable EVM test, false to disable. + * param[in] channel Desired channel. Ignored if enable is false. + * param[in] rate Desired rate. Ignored if enable is false. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmEnableEVMTest(int enable, WLM_RATE rate, int channel); + +/* RX/TX related functions */ + +/* Starts sending packets with supplied parameters. + * + * param[in] shortPreamble Set to true to use a short preamble, false for a long preamble. + * param[in] interPacketDelay Delay between each packet. + * param[in] numPackets The number of packets transmitted. + * param[in] packetLength Length of packet transmitted. + * param[in] destMac The MAC address of the destination. + * param[in] withAck Ack response expected for transmitted packet. + * param[in] syncMode Enable synchronous mode to transmit packets before returning. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmTxPacketStart(unsigned int interPacketDelay, + unsigned int numPackets, unsigned int packetLength, + const char* destMac, int withAck, int syncMode); + +/* Stops sending packets. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmTxPacketStop(void); + +/* Starts receiving packets with supplied parameters. + * + * param[in] srcMac The MAC address of the packet source.. + * param[in] withAck Ack response expected for received packet. + * param[in] syncMode Enable synchronous mode to receive packets before returning or timeout. + * param[in] numPackets Number of receive packets before returning (sync mode only). + * param[in] timeout Maximum timeout in msec (sync mode only). + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmRxPacketStart(const char* srcMac, int withAck, + int syncMode, unsigned int numPackets, unsigned int timeout); + +/* Stops receiving packets. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmRxPacketStop(void); + +/* Returns number of packets that were ACKed successfully. + * + * param[in] count Packet count returned. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmTxGetAckedPackets(unsigned int *count); + +/* Returns number of packets received successfully. + * + * param[in] count Packet count returned. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmRxGetReceivedPackets(unsigned int *count); + +/* Returns Receive Signal Strength Indicator (RSSI). + * + * param[in] rssi RSSI returned. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmRssiGet(int *rssi); + +/* Sequence related functions */ + +/* Initiates a command batch sequence. + * Any commands issued after calling this function will be queued + * instead of being executed. Call sequenceStop() to run queued commands. + * + * param[in] clientBatching Set to true to batch on client, false to batch on server/DUT. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmSequenceStart(int clientBatching); + +/* Signals the end of a command batch sequence. + * Requires a previous call to sequenceStart(). Any commands + * issued after previously calling sequenceStart() will be run. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmSequenceStop(void); + +/* Sets a delay between commands, in ms. + * Requires a previous call to sequenceStart(). Once sequenceStart() is called, + * calling sequenceDelay() after a command will insert a delay after the + * previous command is complete. + * + * param[in] msec Amount of time to wait after previous command has complete. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmSequenceDelay(int msec); + +/* If a command sequence fails at a particular command, the remaining + * commands will be aborted. Calling this function, will return the index + * of which command failed. NOTE: Index starts at 1. + * + * param[in] index Failed command index returned. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmSequenceErrorIndex(int *index); + +/* Image access (SROM/OTP) functions: */ + +/* Programs the device with a supplied image. Used to program the SROM/OTP. + * + * param[in] byteStream A stream of bytes loaded from an image file. + * param[in] length The number of bytes to write. + * param[in] imageType Use this to force a specific image type (ex: SROM, OTP, etc). + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmDeviceImageWrite(const char* byteStream, int length, WLM_IMAGE_TYPE imageType); + +/* Dumps the image from the device. Used to read the SROM/OTP. + * + * param[out] byteStream A user supplied buffer. + * param[in] length The size of the buffer supplied by byteStream. + * param[in] imageType Use this to force a specific image type (ex: SROM, OTP, etc). + * + * return - Size of image in bytes. -1 if size of image is larger than supplied buffer. + */ +WLM_FUNCTION +int wlmDeviceImageRead(char* byteStream, unsigned int length, WLM_IMAGE_TYPE imageType); + +/* Network related functions */ + +/* Set the current wireless security. + * + * param[in] authType Desired authentication type. + * param[in] authMode Desired authentication mode. + * param[in] encryption The desired encryption method. + * param[in] key The encryption key string (null terminated). + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmSecuritySet(WLM_AUTH_TYPE authType, WLM_AUTH_MODE authMode, + WLM_ENCRYPTION encryption, const char *key); + +/* Joins a network. + * + * param[in] ssid The SSID of the network to join. + * param[in] mode The mode used for the join. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmJoinNetwork(const char* ssid, WLM_JOIN_MODE mode); + +/* Disassociates from a currently joined network. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmDisassociateNetwork(void); + +/* Retrieves the current SSID of the AP. + * + * param[in] ssid SSID returned. SSID may be returned if not associated + * (i.e. attempting to associate, roaming). + * param[in] length Length of ssid buffer. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmSsidGet(char *ssid, int length); + +/* Retrieves the current BSSID of the AP. + * + * param[in] bssid BSSID returned. If the device is not associated, empty string returned. + * param[in] length Length of bssid buffer. + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmBssidGet(char *ssid, int length); + +/* Set/Get the MIMO Preamble mode + * Valid options are: + * WLC_N_PREAMBLE_MIXEDMODE 0 + * WLC_N_PREAMBLE_GF 1 + */ + +WLM_FUNCTION +int wlmMimoPreambleSet(int type); + +WLM_FUNCTION +int wlmMimoPreambleGet(int* type); + +/* Set/Get the CGA coefficients in the 2.4G/5G band + * requires an array of 24 uint8s to be set + * and a specified length of 24 to get + * All of these CGA value query functions only applies to 4329 solution + */ + +WLM_FUNCTION +int wlmCga5gOffsetsSet(char* values, int len); + +WLM_FUNCTION +int wlmCga5gOffsetsGet(char* buffer, int len); + +WLM_FUNCTION +int wlmCga2gOffsetsSet(char* values, int len); + +WLM_FUNCTION +int wlmCga2gOffsetsGet(char* buffer, int len); + +/* Set Glacial Timer + * param[in] timer duration in msec + * + * return - True for success, false for failure. +*/ +WLM_FUNCTION +int wlmGlacialTimerSet(int val); + +/* Set Fast Timer + * param[in] timer duration in msec + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmFastTimerSet(int val); + +/* Set Slow Timer + * param[in] timer duration in msec + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmSlowTimerSet(int val); + +/* Enable/Disable Scansuppress + * param[in] set to TRUE enables scansuppress, set to false disable scansuppress + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmScanSuppress(int val); + +/* Set Country Code + * param[in] country code abbrv. Default use WLM_COUNTRY_CODE_ABBRV_ALL + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmCountryCodeSet(const char *country_name); + +/* Set fullcal + * Trigger lpphy fullcal + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmFullCal(void); + +/* Get Receiver IQ Estimation + * param[out] estimated rxiq power in dBm at 0.25dBm resolution + * param[in] sampel count, 0 to 15 + * param[in] antenna, 0 to 3 + * return - True for success, false for failure. +*/ +WLM_FUNCTION +int wlmRxIQEstGet(float *val, int sampleCount, int ant); + +/* Get PHY txpwrindex + * param[out] txpwrindex + * param[in] chip id: 4325, 4329, 43291, 4330, 4336 and 43236 + */ +WLM_FUNCTION +int wlmPHYTxPowerIndexGet(unsigned int *val, const char *chipid); + +/* Set PHY txpwrindex + * param[in] txpwrindex + * param[in] chip id: 4325, 4329, 43291, 4330, 4336 and 43236 + */ +WLM_FUNCTION +int wlmPHYTxPowerIndexSet(unsigned int val, const char *chipid); + +/* Enable/Disable RIFS + * param[in] Set RIFS mode. 1 = enable ; 0 = disable + */ +WLM_FUNCTION +int wlmRIFSEnable(int enable); + +/* Get/Set IOCTL + * param[in] cmd IOCTL command. + * param[in] buf Get data returned or set data input. + * param[in] len Length of buf. + * return - True for success, false for failure. + */ +WLM_FUNCTION int wlmIoctlGet(int cmd, void *buf, int len); +WLM_FUNCTION int wlmIoctlSet(int cmd, void *buf, int len); + +/* Get/Set IOVAR + * param[in] iovar IOVAR command. + * param[in] buf Get data returned or set data input. + * param[in] len Length of buf. + * return - True for success, false for failure. + */ +WLM_FUNCTION int wlmIovarGet(const char *iovar, void *buf, int len); +WLM_FUNCTION int wlmIovarSet(const char *iovar, void *buf, int len); + +/* Get/Set IOVAR integer. + * param[in] iovar IOVAR integer command. + * param[out/in] val Get integer returned or set integer input. + * return - True for success, false for failure. + */ +WLM_FUNCTION int wlmIovarIntegerGet(const char *iovar, int *val); +WLM_FUNCTION int wlmIovarIntegerSet(const char *iovar, int val); + +/* Get/Set IOVAR using internal buffer. + * param[in] iovar IOVAR command. + * param[in] param Input parameters. + * param[in] param_len Length of parameters. + * param[out] bufptr Buffer returning get data. + * return - True for success, false for failure. + */ +WLM_FUNCTION int wlmIovarBufferGet(const char *iovar, void *param, int param_len, void **bufptr); +WLM_FUNCTION int wlmIovarBufferSet(const char *iovar, void *param, int param_len); + + + +/* Enables radio + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmRadioOn(void); + +/* Disable radio . + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmRadioOff(void); + +/* Set Power Saving Mode + * param[in] 0 = CAM, 1 =Power Save, 2 = Fast PS Mode + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmPMmode(int val); + +/* Enable roaming + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmRoamingOff(void); + +/* Disable roaming + * + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmRoamingOn(void); + +/* Get roaming trigger level + * param[out] roaming trigger level in dBm returned + * param[in] frequency band + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmRoamTriggerLevelGet(int *val, WLM_BAND band); + +/* Set roaming trigger level + * param[in] roaming trigger level in dBm + * param[in] frequence band + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmRoamTriggerLevelSet(int val, WLM_BAND band); + +/* Set framburst mode on + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmFrameBurstOn(void); + +/* Set framburst mode off + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmFrameBurstOff(void); + +/* Set beacon interval + * param[in] beacon interval in ms + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmBeaconIntervalSet(int val); + +/* Set AMPDU mode on/off + * param[in] on = 1, off = 0 + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmAMPDUModeSet(int val); + +/* Set MIMO bandwidth capability + * param[in] mimo bandwidth capability. 0 = 20Mhz, 1 =40Mhz + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmMIMOBandwidthCapabilitySet(int val); + +/* Set interference on/off + * param[in] on = 1, 0ff = 0 + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmInterferenceSet(int val); + +/* Set interferenceoverride on/off + * param[in] on = 1, 0ff = 0 + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmInterferenceOverrideSet(int val); + +/* Set MIMO transmit banddwith + * param[in] auto = -1, 2 = 20Mhz, 3 = 20Mhz upper , 4 =40 Mhz, 5 =40dup (mcs32 only) + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmTransmitBandwidthSet(int val); + +/* Set MIMO short guard intervaltransmit banddwith for tx stream + * param[in] auto = -1, 1 = on, 0 = off + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmShortGuardIntervalSet(int val); + +/* Set MIMO short guard intervaltransmit banddwith for rx stream + * param[in] auto = -1, 1 = on, 0 = off + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmShortGuardIntervalRxSet(int val); + +/* Set MIMO OBSS coex set + * param[in] auto = -1, 1 = on, 0 = off + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmObssCoexSet(int val); + +/* Set PHY Periodical call + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmPHYPeriodicalCalSet(void); + +/* Set PHY Force call + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmPHYForceCalSet(void); + +/* Disable scrambler update + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmPHYScramblerUpdateDisable(void); + +/* Enable scrambler update + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmPHYScramblerUpdateEnable(void); + +/* Turn PHY watchdog on/off + * param[in] on = 1, off = 0 + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmPHYWatchdogSet(int val); + +/* Disable temperature sensore + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmTemperatureSensorDisable(void); + +/* Enable temperature sensore + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmTemperatureSensorEnable(void); + +/* Set transmit core + * param[in] + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmTransmitCoreSet(int val); + +/* Get temperation sensor read + * param[out] chip core temperature in F + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmPhyTempSenseGet(int *val); + +/* Get chip OTP Fab ID + * param[out] chip fab id + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmOtpFabidGet(int *val); + +/* Set mimo channnel specifications + * param[in] channel + * param[in] bandwidth 20 = 20Mhz, 40 = 40Mhz, 80Mhz and 160Mhz + * param[in] sideband 1 = upper, -1 = lower, 0 = none + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmChannelSpecSet(int channel, int bandwidth, int sideband); + +/* Set channnel specifications + * param[in] ch1 = Primary 80MHz channel + * param[in] ch2 = Sedonary 80MHz channel + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlm80Plus80ChannelSpecSet(int ch1, int ch); + +/* Set rts threshold + * param[in] rts threshold value + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmRtsThresholdOverride(int val); + +/* Turn STBC Tx mode on/off + * param[in] on = 1, off = 0 + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmSTBCTxSet(int val); + +/* Turn STBC Rx mode on/off + * param[in] on = 1, off = 0 + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmSTBCRxSet(int val); + +/* MIMO single stream tx chain selection + * param[in] chain 1 = 1, chain 2 = 2 + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmTxChainSet(int val); + +/* MIMO single stream rx chain selection + * param[in] chain 1 = 1, chain 2 = 2 + * return - True for success, false for failure. + */ +WLM_FUNCTION +int wlmRxChainSet(int val); + +WLM_FUNCTION +int wlmScanNetworks(char* results_buf, int len); + +WLM_FUNCTION +int wlmCommandPassThrough(char *cmd_line, char *result_buf, int *len); + +/* Toggle GPIO control + * param[in] mask to gpio control bits, eg 0x0040 for gpio_6 + * param[in] bit control value. 1 = enable/high, 0 = disable/low + */ +WLM_FUNCTION +int wlmGpioOut(unsigned int mask, unsigned int value); + +WLM_FUNCTION +const char* wlmGetLastError(void); + +#ifdef __cplusplus +} +#endif + +#endif /* _wlm_h */ diff --git a/external/cache/sources/wl/wl/wlu.c b/external/cache/sources/wl/wl/wlu.c new file mode 100644 index 0000000..0f0ca10 --- /dev/null +++ b/external/cache/sources/wl/wl/wlu.c @@ -0,0 +1,37927 @@ +/* + * Common code for wl command-line swiss-army-knife utility + * + * $Copyright (C) 2002-2005 Broadcom Corporation$ + * + * $Id: wlu.c 404565 2013-05-28 08:08:21Z cylee $ + */ + +#ifdef BCMINTERNAL +/* + * Policy notes: + * This source file generates both the "wl" command and the + * more restricted "wl-tool" manufacturing test command (-DWL_TOOL). + * - wl driver wlc_ioctl() commands which are enclosed within #ifdef BCMINTERNAL + * should be enclosed within #ifdef BCMINTERNAL in wlu.c . + * - exposing any new commands in wl-tool requires an "ok" from romanb. + */ +#endif /* BCMINTERNAL */ + +#ifdef WIN32 +#include +#endif + +#if !defined(WLNINTENDO) && !defined(TARGETOS_nucleus) +#define CLMDOWNLOAD +#endif + +#if defined(_HNDRTE_) +#include +#include +#endif + +#if defined(__NetBSD__) +#include +#endif + +/* Because IL_BIGENDIAN was removed there are few warnings that need + * to be fixed. Windows was not compiled earlier with IL_BIGENDIAN. + * Hence these warnings were not seen earlier. + * For now ignore the following warnings + */ +#ifdef WIN32 +#pragma warning(push) +#pragma warning(disable : 4244) +#pragma warning(disable : 4761) +#endif + +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include "wlu_rates_matrix.h" + +#ifdef BCMCCX +#include +#endif +#ifdef WLBTAMP +#include +#endif +#ifdef BCMSDIO +#include +#endif +#include +#include +#include +#include +#include +#include "wlu_common.h" +#include "wlu.h" +#include +#if defined(WLPFN) && defined(linux) +#ifndef TARGETENV_android +#include +#endif +#include +#include +#include +#include +#include +#include +#include +#include +#endif /* WLPFN */ + +#ifdef WLEXTLOG +#include +#endif + +#ifdef LINUX +#include +#endif +#include +#include + +#if defined SERDOWNLOAD || defined CLMDOWNLOAD +#include +#include +#ifdef SERDOWNLOAD +#include +#endif +#include +#include + +#ifndef WIN32 +#include +#endif /* WIN32 */ +#endif /* SERDOWNLOAD || defined CLMDOWNLOAD */ + +/* XXX HACK!! Should read this from target */ +#if LCNCONF || SSLPNCONF +#define MAX_CHUNK_LEN 1456 /* 8 * 7 * 26 */ +#else +#define MAX_CHUNK_LEN 1408 /* 8 * 8 * 22 */ +#endif + + +#include +#include +#include + +/* For backwards compatibility, the absense of the define 'NO_FILESYSTEM_SUPPORT' + * implies that a filesystem is supported. + */ +#if !defined(BWL_NO_FILESYSTEM_SUPPORT) +#define BWL_FILESYSTEM_SUPPORT +#endif + + +cmd_func_t wl_int; + +const ofdm_rates_t ofdm_rates[] = { /* 6b, 9, 12b, 18, 24b, 36, 48, 54 Mbps */ + 0x8c, 0x12, 0x98, 0x24, 0xb0, 0x48, 0x60, 0x6c }; + +#ifdef ATE_BUILD +/* These are the only functions being used from this file by the ATE firmware */ +static cmd_func_t wl_channel, wl_version, wl_void, wl_rate_mrate, wl_nrate; +static cmd_func_t wl_pkteng, wl_pkteng_stats, wl_phy_txpwrindex, wl_reg, wl_band; +int wl_seq_batch_in_client(bool enable); +int wlu_get(void *wl, int cmd, void *buf, int len); +int wlu_set(void *wl, int cmd, void *buf, int len); +static void wl_printrate(int val); +static int rate_string2int(char *s); +static char *rate_int2string(char *buf, int val); +int wlu_var_getbuf(void *wl, const char *iovar, void *param, int param_len, void **bufptr); +int wlu_var_getbuf_sm(void *wl, const char *iovar, void *param, int param_len, void **bufptr); +int wlu_var_getbuf_med(void *wl, const char *iovar, void *param, int param_len, void **bufptr); +int wlu_var_setbuf(void *wl, const char *iovar, void *param, int param_len); +int wlu_iovar_get(void *wl, const char *iovar, void *outbuf, int len); +int wlu_iovar_set(void *wl, const char *iovar, void *param, int paramlen); +int wlu_iovar_getint(void *wl, const char *iovar, int *pval); +int wlu_iovar_setint(void *wl, const char *iovar, int val); +static cmd_func_t wl_gpioout; + +#else /* ATE_BUILD */ + +static cmd_func_t wl_print_deprecate; +static cmd_func_t wl_void, wl_rssi, wl_rssi_event, wl_phy_rssi_ant, wl_gmode; +static cmd_func_t wlu_dump, wlu_mempool, wlu_srdump, wlu_srwrite, wlu_srvar, wl_nvsource; +static cmd_func_t wlu_ciswrite, wlu_cisupdate, wlu_cisdump, wlu_offloads_stats; +#ifdef D11AC_IOTYPES +static cmd_func_t wl_rate, wl_rate_mrate, wl_phy_rate, wl_bss_max; +#else +static cmd_func_t wl_rate_mrate, wl_phy_rate, wl_bss_max; +#endif + +static cmd_func_t wl_channel, wl_chanspec, wl_chanim_state, wl_chanim_mode; +static cmd_func_t wl_radio, wl_version, wl_list, wl_band, wl_bandlist, wl_phylist; +static cmd_func_t wl_join, wl_tssi, wl_txpwr, wl_atten, wl_evm, wl_country; +static cmd_func_t wl_out, wl_txpwr1, wl_country_ie_override; +static cmd_func_t wl_maclist, wl_get_pktcnt, wl_upgrade; +static cmd_func_t wl_maclist_1; +static cmd_func_t wl_rateset, wl_txbf_rateset, wl_interfere, wl_interfere_override; +static cmd_func_t wl_radar_args, wl_radar_thrs, wl_dfs_status; +static cmd_func_t wl_radar_status, wl_clear_radar_status; +static cmd_func_t wl_get_txpwr_limit, wl_get_current_power, wl_get_instant_power; +static cmd_func_t wl_get_current_txppr; +static cmd_func_t wl_var_get, wl_var_getint, wl_var_getinthex, wl_var_getandprintstr; +static cmd_func_t wl_var_setint, wl_addwep, wl_rmwep; +static cmd_func_t wl_nvdump, wl_nvget, wl_nvset, wl_sta_info, wl_chan_info; +static cmd_func_t wl_wme_ac_req, wl_add_ie, wl_del_ie, _wl_list_ie; +static cmd_func_t wl_wme_apsd_sta, wl_wme_dp, wl_lifetime; +static cmd_func_t wl_rand, wl_otpw, wl_otpraw, wl_counters, wl_delta_stats; +static cmd_func_t wl_assoc_info, wl_wme_counters, wl_devpath; +static cmd_func_t wl_management_info; +static cmd_func_t wl_event_bitvec, wl_diag, wl_var_void; +static cmd_func_t wl_auto_channel_sel; +static cmd_func_t wl_bsscfg_int, wl_bsscfg_enable, wl_ap_bsscfg; +static cmd_func_t wl_msglevel, wl_plcphdr, wl_reg, wl_macreg, wl_band_elm; +static cmd_func_t wl_phymsglevel; +static cmd_func_t wl_rateparam, wl_wepstatus, wl_status, wl_spect; +static cmd_func_t wl_sup_rateset, wl_scan, wl_send_csa, wl_iscan, wl_escan, wl_scanol; +#ifdef BCMINTERNAL +static cmd_func_t wl_sendprb; +#endif /* BCMINTERNAL */ +#ifdef EXTENDED_SCAN +static cmd_func_t wl_extdscan; +#endif +static cmd_func_t wl_dump_chanlist, wl_primary_key, wl_measure_req, wl_send_quiet; +static cmd_func_t wl_dump_chanspecs, wl_cur_mcsset; +static cmd_func_t wl_wsec, wl_keys, wl_wsec_test; +static cmd_func_t wl_channels_in_country; +static cmd_func_t wl_wpa_auth, wl_tsc, wl_deauth_rc, wl_ssid, wl_bssid, wl_smfstats; +static cmd_func_t wl_wds_wpa_role_old, wl_wds_wpa_role, wl_set_pmk; +static cmd_func_t wl_rm_request, wl_rm_report; +static cmd_func_t wl_join_pref, wl_assoc_pref; +static cmd_func_t wl_dump_networks, wl_mac, wl_revinfo, wl_iov_mac, wl_iov_mac_params; +static cmd_func_t wl_cac, wl_tslist, wl_tspec, wl_tslist_ea, wl_tspec_ea, wl_cac_delts_ea; +static cmd_func_t wl_varstr, wl_var_setintandprintstr; +#if defined(BCMINTERNAL) || defined(BCMDBG) +static cmd_func_t wl_phy_debug_cmd; +#endif +static cmd_func_t wl_rifs; +static cmd_func_t wl_rifs_advert; +static cmd_func_t wl_test_tssi, wl_test_tssi_offs, wl_phy_rssiant, wl_rxiq; +static cmd_func_t wl_obss_scan, wl_obss_coex_action; +static cmd_func_t wl_dump_lq; +static cmd_func_t wl_monitor_lq; +static cmd_func_t wl_test_idletssi; + +#ifdef WLPFN +static cmd_func_t wl_pfn_set; +static cmd_func_t wl_pfn_add; +static cmd_func_t wl_pfn_add_bssid; +static cmd_func_t wl_pfn_cfg; +static cmd_func_t wl_pfn; +static cmd_func_t wl_pfnbest; +static cmd_func_t wl_pfn_suspend; +#if defined(linux) +static cmd_func_t wl_pfn_event_check; +static cmd_func_t wl_escan_event_check; +static cmd_func_t wl_escanresults; +#endif /* linux */ +static cmd_func_t wl_event_filter; +#endif /* WLPFN */ + +#ifdef WLP2PO +static cmd_func_t wl_p2po_listen; +static cmd_func_t wl_p2po_addsvc; +static cmd_func_t wl_p2po_delsvc; +static cmd_func_t wl_p2po_sd_reqresp; +static cmd_func_t wl_p2po_listen_channel; +static cmd_func_t wl_p2po_stop; +#if defined(linux) +static cmd_func_t wl_p2po_results; +#endif /* linux */ + +#endif /* WLP2PO */ + +#ifdef WLANQPO +static cmd_func_t wl_anqpo_set; +static cmd_func_t wl_anqpo_stop_query; +static cmd_func_t wl_anqpo_start_query; +static cmd_func_t wl_anqpo_ignore_ssid_list; +static cmd_func_t wl_anqpo_ignore_bssid_list; +#if defined(linux) +static cmd_func_t wl_anqpo_results; +#endif /* linux */ +#endif /* WLANQPO */ +static cmd_func_t wl_hs20_ie; + +static cmd_func_t wl_wowl_pattern, wl_wowl_wakeind, wl_wowl_pkt, wl_wowl_status; +static cmd_func_t wl_wowl_wake_reason, wl_wowl_extended_magic; +static cmd_func_t wl_reassoc; + +#ifdef BCMSDIO +static cmd_func_t wl_sd_reg, wl_sd_msglevel, wl_sd_blocksize, wl_sd_mode; +#endif + +static cmd_func_t wl_overlay; +static cmd_func_t wl_pmkid_info; + +#ifdef BCMCCX +static cmd_func_t wl_leap; +#endif + +static void wl_rate_histo_print(wl_mac_ratehisto_res_t *rate_histo_res); +static cmd_func_t wl_rate_histo; +static cmd_func_t wl_mac_rate_histo; +static cmd_func_t wl_sample_collect; +static cmd_func_t wlu_reg3args; + +#ifdef BCMINTERNAL +static cmd_func_t wlu_reg1or3args; +static cmd_func_t wl_coma; +static cmd_func_t wl_aci_args; +static cmd_func_t wlu_ratedump, wlu_fixrate; +static cmd_func_t wlu_ccreg; +static cmd_func_t wl_send_wpa_m1; +#endif +static cmd_func_t wl_tpc_lm; +#if defined(BCMINTERNAL) +static cmd_func_t wl_tpc_rpt_override; +#endif /* BCMINTERNAL */ +static cmd_func_t wlu_reg2args; +static cmd_func_t wme_tx_params; +static cmd_func_t wme_maxbw_params; +static cmd_func_t wl_ampdu_tid, wl_ampdu_activate_test; +static cmd_func_t wl_ampdu_retry_limit_tid; +static cmd_func_t wl_ampdu_rr_retry_limit_tid; +static cmd_func_t wl_ampdu_send_addba; +static cmd_func_t wl_ampdu_send_delba; + +static cmd_func_t wl_dpt_deny; +static cmd_func_t wl_dpt_endpoint; +static cmd_func_t wl_dpt_pmk; +static cmd_func_t wl_dpt_fname; +static cmd_func_t wl_dpt_list; +#ifdef WLTDLS +static cmd_func_t wl_tdls_endpoint; +static cmd_func_t wl_tdls_wfd_ie; +#endif /* WLTDLS */ +#ifdef WLBTAMP +static cmd_func_t wl_HCI_cmd; +static cmd_func_t wl_HCI_ACL_data; +static cmd_func_t wl_get_btamp_log; +#endif +static cmd_func_t wl_actframe; + +static cmd_func_t wl_gpioout; + +static cmd_func_t wl_bw_cap; +static cmd_func_t wl_nrate, wl_antsel, wl_txcore; +static cmd_func_t wl_txcore_pwr_offset; +static cmd_func_t wl_txfifo_sz; +static cmd_func_t wl_pkteng, wl_pkteng_stats; + +static cmd_func_t wl_offload_cmpnt; +static cmd_func_t wl_hostip, wl_arp_stats, wl_toe_stats, wl_nshostip; +static cmd_func_t wl_mcast_ackmac, wl_mcast_status; +#ifdef WLOFFLD +static cmd_func_t wl_ol_notify_bcn_ie; +#endif + +#if defined(WLNDOE) || defined(WLOFFLD) +static cmd_func_t wl_hostipv6; +#endif +#ifdef WLNDOE +static cmd_func_t wl_ndstatus, wl_solicitipv6, wl_remoteipv6; +#endif +static cmd_func_t wl_phy_papdepstbl; + +int wl_seq_batch_in_client(bool enable); +cmd_func_t wl_seq_start; +cmd_func_t wl_seq_stop; + +static cmd_func_t wl_phy_txiqcc, wl_phy_txlocc; +static cmd_func_t wl_phytable, wl_phy_pavars, wl_phy_povars; +static cmd_func_t wl_phy_fem, wl_phy_maxpower, wl_antgain, wl_phy_txpwrindex; +static cmd_func_t wl_keep_alive; +static cmd_func_t wl_mkeep_alive; +static cmd_func_t wl_srchmem; +static cmd_func_t wl_phy_rpcalvars; +static cmd_func_t wl_wake_inf; + +#ifdef WLAWDL +static cmd_func_t wl_awdl_sync_params; +static cmd_func_t wl_awdl_af_hdr; +static cmd_func_t wl_awdl_opmode; +static cmd_func_t wl_awdl_ext_counts; +static cmd_func_t wl_bsscfg_awdl_enable; +static cmd_func_t wl_awdl_mon_bssid; +static cmd_func_t wl_awdl_advertisers; +static cmd_func_t wl_awdl_election; +static cmd_func_t wl_awdl_election_tree; +static cmd_func_t wl_awdl_payload; +static cmd_func_t wl_awdl_long_payload; +static cmd_func_t wl_awdl_chan_seq; +static cmd_func_t wl_awdl_peer_op; +static cmd_func_t wl_awdl_oob_af; +static cmd_func_t wl_awdl_aw_ap_align; +static cmd_func_t wl_awdl_uct_test; +static cmd_func_t wl_awdl_counters; +static cmd_func_t wl_awdl_uct_counters; +#ifdef WLAWDL_LATENCY_SUPPORT +static cmd_func_t wl_awdl_tx_latency_clr; +#endif +#endif /* WLAWDL */ +static cmd_func_t wl_pkt_filter_add; +static cmd_func_t wl_pkt_filter_enable; +static cmd_func_t wl_pkt_filter_list; +static cmd_func_t wl_pkt_filter_stats; +static cmd_func_t wl_tcp_keep_conn_set; +static cmd_func_t wl_tcp_keep_timers_set; + +#ifdef TRAFFIC_MGMT +static cmd_func_t wl_trf_mgmt_config; +static cmd_func_t wl_trf_mgmt_filters_add; +static cmd_func_t wl_trf_mgmt_filters_addex; +static cmd_func_t wl_trf_mgmt_filters_remove; +static cmd_func_t wl_trf_mgmt_filters_removeex; +static cmd_func_t wl_trf_mgmt_filters_list; +static cmd_func_t wl_trf_mgmt_filters_clear; +static cmd_func_t wl_trf_mgmt_bandwidth; +static cmd_func_t wl_trf_mgmt_flags; +static cmd_func_t wl_trf_mgmt_stats; +static cmd_func_t wl_trf_mgmt_stats_clear; +static cmd_func_t wl_trf_mgmt_shaping_info; +#endif /* TRAFFIC_MGMT */ + +#ifdef CLMDOWNLOAD +static cmd_func_t wl_clmload; +#endif /* CLMDOWNLOAD */ +static cmd_func_t wl_ledbh; + +#ifdef RWL_WIFI +/* Function added to support RWL_WIFI Transport */ +static cmd_func_t wl_wifiserver; +#endif + +static cmd_func_t wl_led_blink_sync; +static cmd_func_t wl_cca_get_stats; +static cmd_func_t wl_itfr_get_stats; +static cmd_func_t wl_rrm; +static cmd_func_t wl_rrm_nbr_req; +static cmd_func_t wl_rrm_bcn_req; +static cmd_func_t wl_rrm_chload_req; +static cmd_func_t wl_rrm_noise_req; +static cmd_func_t wl_rrm_frame_req; +static cmd_func_t wl_rrm_stat_req; +static cmd_func_t wl_rrm_lm_req; +static cmd_func_t wl_rrm_nbr_list; +static cmd_func_t wl_rrm_nbr_del_nbr; +static cmd_func_t wl_rrm_nbr_add_nbr; +static cmd_func_t wl_wnm; +static cmd_func_t wl_wnm_bsstq; +static cmd_func_t wl_tclas_add; +static cmd_func_t wl_tclas_del; +static cmd_func_t wl_tclas_list; +static cmd_func_t wl_wnm_tfs_set; +static cmd_func_t wl_wnm_tfs_status; +static cmd_func_t wl_wnm_tfs_term; +static cmd_func_t wl_wnm_dms_set; +static cmd_func_t wl_wnm_dms_status; +static cmd_func_t wl_wnm_dms_term; +static cmd_func_t wl_wnm_service_term; +static cmd_func_t wl_wnm_timbc_offset; +static cmd_func_t wl_wnm_timbc_set; +static cmd_func_t wl_wnm_timbc_status; +static cmd_func_t wl_wnm_maxidle; +static cmd_func_t wl_wnm_bsstrans_req; +static cmd_func_t wl_chanim_acs_record; +static cmd_func_t wl_chanim_stats; +static cmd_func_t wl_txdelay_params; +static cmd_func_t wl_intfer_params; + +#if defined(BCMINTERNAL) || defined(WLTEST) +static cmd_func_t wl_sslpnphy_papd_debug; +static cmd_func_t wl_sslpnphy_debug; +static cmd_func_t wl_sslpnphy_spbdump; +static cmd_func_t wl_sslpnphy_percal_debug; +static cmd_func_t wl_phy_spbrange; +static cmd_func_t wl_phy_sslpnphy_cga_2g; +static cmd_func_t wl_phy_sslpnphy_cga_5g; +static cmd_func_t wl_sslpnphy_tx_iqcc; +static cmd_func_t wl_sslpnphy_tx_locc; +#endif /* BCMINTERNAL || WLTEST */ + +#ifdef WLP2P +static cmd_func_t wl_p2p_state; +static cmd_func_t wl_p2p_scan; +static cmd_func_t wl_p2p_ifadd; +static cmd_func_t wl_p2p_ifdel; +static cmd_func_t wl_p2p_ifupd; +static cmd_func_t wl_p2p_if; +static cmd_func_t wl_p2p_ops; +static cmd_func_t wl_p2p_noa; +#endif + +static cmd_func_t wl_rpmt; +static cmd_func_t wl_spatial_policy, wl_ratetbl_ppr; +static cmd_func_t wl_sarlimit; + +static cmd_func_t wl_ie; +static cmd_func_t wl_wnm_url; + +#if defined(BCMINTERNAL) +static cmd_func_t wl_nwoe_ifconfig; +#endif /* BCMINTERNAL */ + +#ifdef SERDOWNLOAD +static cmd_func_t dhd_upload; +int debug = 0; +#endif + +#if defined(WL_PROXDETECT) +static cmd_func_t wl_proxd; +static cmd_func_t wl_proxd_params; +static cmd_func_t wl_proxd_status; +static cmd_func_t wl_proxd_payload; +#define WL_PROXD_PAYLOAD_LEN 1026 +#endif + +#if defined(DWDS) +static cmd_func_t wl_dwds_config; +#endif + +static cmd_func_t wl_staprio; + +static void wl_txppr_print(ppr_t *ppr, int cck, uint flags); +static void wl_txppr_print_bw(ppr_t *ppr, int cck, uint flags, wl_tx_bw_t bw); +static void wl_txpwr_print_row(const char *label, uint8 chains, int8 pwr20, + int8 pwr20in40, int8 pwr40, int8 pwr80, int8 pwr20in80, int8 pwr40in80, + int8 unsupported_rate, int8 channel_bandwidth, bool verbose); +#ifdef D11AC_IOTYPES +static int8 wl_ppr_get_pwr(ppr_t* pprptr, reg_rate_index_t rate_idx, wl_tx_bw_t bw); +static void wl_txpwr_array_row_print(ppr_t* pprptr, int8 channel_bandwidth, + reg_rate_index_t rate_idx); +#endif +static void wl_txpwr_array_print(ppr_t* pprptr, int8 channel_bandwidth, bool verbose); +static void wl_txpwr_ppr_print(ppr_t* pprptr, int vb, ppr_rate_type_t type, + clm_rate_group_id_t gid, int8 bw, reg_rate_index_t *rate_index); +#ifdef D11AC_IOTYPES +static void wl_txpwr_regulatory_array_row_print(int8 *powers, int8 *powers_subchan1, + int8 *powers_subchan2, int8 channel_bandwidth, reg_rate_index_t rate_index); +#endif +static void wl_txpwr_regulatory_array_print(int8 *powers, int8 *powers_subchan1, + int8 *powers_subchan2, int8 channel_bandwidth, bool verbose); +static int wl_array_uniform(uint8 *pwr, int start, int count); +static int wl_array_check_val(int8 *pwr, uint count, int8 val); +static int wl_parse_rateset(void *wl, wl_rateset_args_t* rs, char **argv); +static int wl_parse_txbf_rateset(wl_txbf_rateset_t *rs, char **argv); +static void wl_print_mcsset(char *mcsset); +static void wl_print_vhtmcsset(uint16 *mcsset); +static void wl_print_txbf_mcsset(char *mcsset, char *prefix); +static void wl_print_txbf_vhtmcsset(uint16 *mcsset, char *prefix); + +static void dump_networks(char *buf); +void dump_bss_info(wl_bss_info_t *bi); +static void wl_dump_wpa_rsn_ies(uint8* cp, uint len); +static void wl_rsn_ie_dump(bcm_tlv_t *ie); +static cmd_func_t wl_lpc_params; + +int wlu_get(void *wl, int cmd, void *buf, int len); +int wlu_set(void *wl, int cmd, void *buf, int len); + +static int _wl_dump_lq(void *wl); + +/* 802.11i/WPA RSN IE parsing utilities */ +typedef struct { + uint16 version; + wpa_suite_mcast_t *mcast; + wpa_suite_ucast_t *ucast; + wpa_suite_auth_key_mgmt_t *akm; + uint8 *capabilities; +} rsn_parse_info_t; + +static int wl_rsn_ie_parse_info(uint8* buf, uint len, rsn_parse_info_t *rsn); +static uint wl_rsn_ie_decode_cntrs(uint cntr_field); + +static int wl_parse_assoc_params(char **argv, wl_assoc_params_t *params, bool *prescanned); +static int wl_join_prescanned(void *wl, wl_join_params_t *join_params, uint *join_params_size); +#define wl_parse_reassoc_params(argv, params) wl_parse_assoc_params(argv, \ + (wl_assoc_params_t *)(params), NULL) + +static int wl_parse_channel_list(char* list_str, uint16* channel_list, int channel_num); +static int wl_parse_chanspec_list(char* list_str, chanspec_t *chanspec_list, int chanspec_num); +static chanspec_t wl_chspec_to_driver(chanspec_t chanspec); +static uint32 wl_chspec32_to_driver(chanspec_t chanspec); +static chanspec_t wl_chspec_from_driver(chanspec_t chanspec); +static chanspec_t wl_chspec32_from_driver(uint32 chanspec); + +#ifdef EXTENDED_SCAN +static int wl_parse_extdchannel_list(char* list_str, + chan_scandata_t* channel_list, int channel_num); +#endif + +static uint16 wl_qdbm_to_mw(uint8 qdbm); +static uint8 wl_mw_to_qdbm(uint16 mw); + +static int wl_cfg_option(char **argv, const char *fn_name, int *bsscfg_idx, int *consumed); +static int get_oui_bytes(uchar *oui_str, uchar *oui); +static int get_ie_data(uchar *data_str, uchar *ie_data, int len); +static void wl_printrate(int val); +static int rate_string2int(char *s); +static char *rate_int2string(char *buf, int val); + +static int wl_get_iscan(void *wl, char *buf, uint buf_len); +int wlu_var_getbuf(void *wl, const char *iovar, void *param, int param_len, void **bufptr); +int wlu_var_getbuf_sm(void *wl, const char *iovar, void *param, int param_len, void **bufptr); +int wlu_var_getbuf_med(void *wl, const char *iovar, void *param, int param_len, void **bufptr); +int wlu_var_setbuf(void *wl, const char *iovar, void *param, int param_len); + +int wlu_iovar_get(void *wl, const char *iovar, void *outbuf, int len); +int wlu_iovar_set(void *wl, const char *iovar, void *param, int paramlen); +int wlu_iovar_getint(void *wl, const char *iovar, int *pval); +int wlu_iovar_setint(void *wl, const char *iovar, int val); + +static int wl_bssiovar_mkbuf(const char *iovar, int bssidx, void *param, + int paramlen, void *bufptr, int buflen, int *perr); +int wlu_bssiovar_setbuf(void* wl, const char *iovar, int bssidx, + void *param, int paramlen, void *bufptr, int buflen); +static int wl_bssiovar_getbuf(void* wl, const char *iovar, int bssidx, + void *param, int paramlen, void *bufptr, int buflen); +static int wl_bssiovar_set(void *wl, const char *iovar, int bssidx, void *param, int paramlen); +int wlu_bssiovar_get(void *wl, const char *iovar, int bssidx, void *outbuf, int len); +static int wl_bssiovar_setint(void *wl, const char *iovar, int bssidx, int val); +static int wl_bssiovar_getint(void *wl, const char *iovar, int bssidx, int *pval); + +static int wl_vndr_ie(void *wl, const char *command, uint32 pktflag_ok, char **argv); +static void wl_dump_ie_buf(vndr_ie_buf_t *ie_getbuf); +static int hexstrtobitvec(const char *cp, uchar *bitvec, int veclen); +static void wl_join_pref_print_ie(bcm_tlv_t *ie); +static void wl_join_pref_print_akm(uint8* suite); +static void wl_join_pref_print_cipher_suite(uint8* suite); +static void wl_print_tspec(tspec_arg_t *ts); +static void wl_cac_addts_usage(void); +static void wl_cac_delts_usage(void); + +static cmd_func_t wl_txmcsset; +static cmd_func_t wl_rxmcsset; + +static int wl_mimo_stf(void *wl, cmd_t *cmd, char **argv); + +#ifdef WLEXTLOG +static int wl_extlog(void *wl, cmd_t *cmd, char **argv); +static int wl_extlog_cfg(void *wl, cmd_t *cmd, char **argv); +#endif + +static int wl_assertlog(void *wl, cmd_t *cmd, char **argv); +static int wl_tsf(void *wl, cmd_t *cmd, char **argv); +static int wl_mfp_config(void *wl, cmd_t *cmd, char **argv); +static int wl_mfp_sha256(void *wl, cmd_t *cmd, char **argv); +static int wl_mfp_sa_query(void *wl, cmd_t *cmd, char **argv); +static int wl_mfp_disassoc(void *wl, cmd_t *cmd, char **argv); +static int wl_mfp_deauth(void *wl, cmd_t *cmd, char **argv); +static int wl_mfp_assoc(void *wl, cmd_t *cmd, char **argv); +static int wl_mfp_auth(void *wl, cmd_t *cmd, char **argv); +static int wl_mfp_reassoc(void *wl, cmd_t *cmd, char **argv); +#ifdef BCMINTERNAL +static int wl_mfp_bip_test(void *wl, cmd_t *cmd, char **argv); +#endif +static void wl_tclas_dump(wl_tclas_t *elem); +static int wl_tclas_list_parse(wl_tclas_list_t *list); +static cmd_func_t wl_patrim; +#endif /* ATE_BUILD */ + +static int wl_sleep_ret_ext(void *wl, cmd_t *cmd, char **argv); + +char *ver2str(unsigned int vms, unsigned int vls); + + +/* some OSes (FC4) have trouble allocating (kmalloc) 128KB worth of memory, + * hence keeping WL_DUMP_BUF_LEN below that + */ +#if defined(BWL_SMALL_WLU_DUMP_BUF) || defined(__IOPOS__) +#define WL_DUMP_BUF_LEN (4 * 1024) +#else +#define WL_DUMP_BUF_LEN (127 * 1024) +#endif /* __IOPOS__ */ + +#define OUI_STR_SIZE 8 /* OUI string size */ +#define MAX_OUI_SIZE 3 /* MAX OUI size */ +#define MAX_BYTE_CHARS 2 /* MAX num chars */ +#define MAX_DATA_COLS 16 /* MAX data cols */ +#define DIV_QUO(num, div) ((num)/div) /* Return the quotient of division to avoid floats */ +#define DIV_REM(num, div) (((num%div) * 100)/div) /* Return the remainder of division */ + +#define RADIO_CORE_SYN (0x0 << 12) +#define RADIO_CORE_TX0 (0x2 << 12) +#define RADIO_CORE_TX1 (0x3 << 12) +#define RADIO_CORE_RX0 (0x6 << 12) +#define RADIO_CORE_RX1 (0x7 << 12) + +#define RADIO_CORE_CR0 (0x0 << 10) +#define RADIO_CORE_CR1 (0x1 << 10) +#define RADIO_CORE_CR2 (0x2 << 10) +#define RADIO_CORE_ALL (0x3 << 10) + +#define RADIO_2069_CORE_CR0 (0x0 << 9) +#define RADIO_2069_CORE_CR1 (0x1 << 9) +#define RADIO_2069_CORE_CR2 (0x2 << 9) +#define RADIO_2069_CORE_ALL (0x3 << 9) +#define RADIO_2069_CORE_PLL (0x4 << 9) + +/* IOCtl version read from targeted driver */ +static int ioctl_version; + +/* dword align allocation */ +static union { + char bufdata[WLC_IOCTL_MAXLEN]; + uint32 alignme; +} bufstruct_wlu; +static char *buf = (char*) &bufstruct_wlu.bufdata; + +/* integer output format, default to signed integer */ +static uint8 int_fmt; + +#ifndef ATE_BUILD +/* + * Country names and abbreviations from ISO 3166 + */ +typedef struct { + const char *name; /* Long name */ + const char *abbrev; /* Abbreviation */ +} cntry_name_t; +cntry_name_t cntry_names[]; /* At end of this file */ +#endif /* !ATE_BUILD */ + +typedef struct { + uint value; + const char *string; +} dbg_msg_t; + +typedef struct { + uint value; + const char *string; +} phy_msg_t; + +#define WL_SCAN_PARAMS_SSID_MAX 10 +#define SCAN_USAGE "" \ +"\tDefault to an active scan across all channels for any SSID.\n" \ +"\tOptional arg: SSIDs, list of [up to 10] SSIDs to scan (comma or space separated).\n" \ +"\tOptions:\n" \ +"\t-s S, --ssid=S\t\tSSIDs to scan\n" \ +"\t-t ST, --scan_type=ST\t[active|passive|prohibit] scan type\n" \ +"\t--bss_type=BT\t\t[bss/infra|ibss/adhoc] bss type to scan\n" \ +"\t-b MAC, --bssid=MAC\tparticular BSSID MAC address to scan, xx:xx:xx:xx:xx:xx\n" \ +"\t-n N, --nprobes=N\tnumber of probes per scanned channel\n" \ +"\t-a N, --active=N\tdwell time per channel for active scanning\n" \ +"\t-p N, --passive=N\tdwell time per channel for passive scanning\n" \ +"\t-h N, --home=N\t\tdwell time for the home channel between channel scans\n" \ +"\t-c L, --channels=L\tcomma or space separated list of channels to scan" \ + +#define OLSCAN_PARAM_USAGE "" \ +"\tDefault to an active scan across all channels for any SSID.\n" \ +"\tOptional arg: SSIDs, list of [up to 10] SSIDs to scan (comma or space separated).\n" \ +"\tOptions:\n" \ +"\t-f F, --flag=\t Flags bits, enable/disable, active_mode/passive_mode\n" \ +"\t-a T, --active=\t active scan time\n" \ +"\t-p T, --passive=\t passive scan time\n" \ +"\t-r T, --scirt=\t Scan Cycle Idle Rest Time\n" \ +"\t-m N, --scirtm=N\t Scan Cycle Idle Rest Time Multiplier\n" \ +"\t-R T, --scart=\t Scan Cycle Active Rest Time\n" \ +"\t-M N, --scartm=N\t Scan Cycle Active Rest Time Multiplier\n" \ +"\t-x T, --mrt=