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86cc9b8633bea3bc6fbda145424f871ea553af9e
opensbi/firmware/fw_base.S
Xiang Wang 05602e2bf4 firmware: Add a barrier instruction for wait for boot hart 
Multi-core communication via memory requires the addition of a barrier
instructions to ensure cache coherency.

Signed-off-by: Xiang Wang <wxjstz@126.com>
2019-03-05 09:09:40 +05:30

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