firmware: fw_base.S: fix multi-core boot bug.

In a multi-core startup scenario, if both _try_lottery and
_wait_for_boot_hart use the data in the _boot_status address, when
a CPU enters OpenSBI later than boot hart set the _boot_status to
BOOT_STATUS_BOOT_HART_DONE, the CPU will modify _boot_status to 1
by amoswap.w and will never be awakened in _wait_for_boot_hart.
So let _try_lottery and _boot_status use data from two addresses.

Signed-off-by: dong.yang <dong.yang@sophgo.com>

.editorconfig

@@ -1,21 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-# See here for more information about the format and editor support:
-# https://editorconfig.org/
-
-root = true
-
-[{*.{c,dts,h,lds,ldS,mk,s,S},Kconfig,Makefile,Makefile.*}]
-charset = utf-8
-end_of_line = lf
-trim_trailing_whitespace = true
-insert_final_newline = true
-indent_style = tab
-indent_size = 8
-
-[*.py]
-charset = utf-8
-end_of_line = lf
-trim_trailing_whitespace = true
-insert_final_newline = true
-indent_style = space
-indent_size = 4

.github/workflows/repo-lockdown.yml

@@ -0,0 +1,26 @@
+#name: 'Repo Lockdown'
+#
+#on:
+#  pull_request_target:
+#    types: opened
+#
+#permissions:
+#  pull-requests: write
+#
+#jobs:
+#  action:
+#    runs-on: ubuntu-latest
+#    steps:
+#      - uses: dessant/repo-lockdown@v4
+#        with:
+#          pr-comment: |
+#            We have mailing list based patch review so it would be great if you can send these patchs to OpenSBI mailing list.
+#
+#            You need to join OpenSBI mailing list using following link
+#            http://lists.infradead.org/mailman/listinfo/opensbi
+#
+#            Make sure you use "git send-email" to send the patches.
+#
+#            Thanks for your contribution to OpenSBI project.
+#          lock-pr: true
+#          close-pr: true

.gitignore

@@ -5,7 +5,6 @@
 !.clang-format
 !.gitignore
 !.github
-!.editorconfig
 
 # Object files
 *.o
@@ -19,4 +18,3 @@ install/
 # Development friendly files
 tags
 cscope*
-*~

Makefile

@@ -91,29 +91,14 @@ endif
 # Find library version
 OPENSBI_VERSION_MAJOR=`grep "define OPENSBI_VERSION_MAJOR" $(include_dir)/sbi/sbi_version.h | sed 's/.*MAJOR.*\([0-9][0-9]*\)/\1/'`
 OPENSBI_VERSION_MINOR=`grep "define OPENSBI_VERSION_MINOR" $(include_dir)/sbi/sbi_version.h | sed 's/.*MINOR.*\([0-9][0-9]*\)/\1/'`
-OPENSBI_VERSION_GIT=
-
-# Detect 'git' presence before issuing 'git' commands
-GIT_AVAIL := $(shell command -v git 2> /dev/null)
-ifneq ($(GIT_AVAIL),)
-GIT_DIR := $(shell git rev-parse --git-dir 2> /dev/null)
-ifneq ($(GIT_DIR),)
-OPENSBI_VERSION_GIT := $(shell if [ -d $(GIT_DIR) ]; then git describe 2> /dev/null; fi)
-endif
-endif
+OPENSBI_VERSION_GIT=$(shell if [ -d $(src_dir)/.git ]; then git describe 2> /dev/null; fi)
 
 # Setup compilation commands
 ifneq ($(LLVM),)
-ifneq ($(filter %/,$(LLVM)),)
-LLVM_PREFIX := $(LLVM)
-else ifneq ($(filter -%,$(LLVM)),)
-LLVM_SUFFIX := $(LLVM)
-endif
-
-CC		=	$(LLVM_PREFIX)clang$(LLVM_SUFFIX)
-AR		=	$(LLVM_PREFIX)llvm-ar$(LLVM_SUFFIX)
-LD		=	$(LLVM_PREFIX)ld.lld$(LLVM_SUFFIX)
-OBJCOPY		=	$(LLVM_PREFIX)llvm-objcopy$(LLVM_SUFFIX)
+CC		=	clang
+AR		=	llvm-ar
+LD		=	ld.lld
+OBJCOPY		=	llvm-objcopy
 else
 ifdef CROSS_COMPILE
 CC		=	$(CROSS_COMPILE)gcc
@@ -180,11 +165,6 @@ else
 USE_LD_FLAG	=	-fuse-ld=bfd
 endif
 
-REPRODUCIBLE ?= n
-ifeq ($(REPRODUCIBLE),y)
-REPRODUCIBLE_FLAGS		+=	-ffile-prefix-map=$(src_dir)=
-endif
-
 # Check whether the linker supports creating PIEs
 OPENSBI_LD_PIE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) $(USE_LD_FLAG) -fPIE -nostdlib -Wl,-pie -x c /dev/null -o /dev/null >/dev/null 2>&1 && echo y || echo n)
 
@@ -195,13 +175,10 @@ OPENSBI_LD_EXCLUDE_LIBS := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) $(USE_LD_
 CC_SUPPORT_SAVE_RESTORE := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -mno-save-restore -x c /dev/null -o /dev/null 2>&1 | grep -e "-save-restore" >/dev/null && echo n || echo y)
 
 # Check whether the compiler supports -m(no-)strict-align
-CC_SUPPORT_STRICT_ALIGN := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -mstrict-align -x c /dev/null -o /dev/null 2>&1 | grep -e "-mstrict-align" -e "-mno-unaligned-access" >/dev/null && echo n || echo y)
+CC_SUPPORT_STRICT_ALIGN := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -mstrict-align -x c /dev/null -o /dev/null 2>&1 | grep -e "-mstrict-align\|-mno-unaligned-access" >/dev/null && echo n || echo y)
 
 # Check whether the assembler and the compiler support the Zicsr and Zifencei extensions
-CC_SUPPORT_ZICSR_ZIFENCEI := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -march=rv$(OPENSBI_CC_XLEN)imafd_zicsr_zifencei -x c /dev/null -o /dev/null 2>&1 | grep -e "zicsr" -e "zifencei" > /dev/null && echo n || echo y)
-
-# Check whether the assembler and the compiler support the Vector extension
-CC_SUPPORT_VECTOR := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -march=rv$(OPENSBI_CC_XLEN)gv -dM -E -x c /dev/null 2>&1 | grep -q riscv.*vector && echo y || echo n)
+CC_SUPPORT_ZICSR_ZIFENCEI := $(shell $(CC) $(CLANG_TARGET) $(RELAX_FLAG) -nostdlib -march=rv$(OPENSBI_CC_XLEN)imafd_zicsr_zifencei -x c /dev/null -o /dev/null 2>&1 | grep "zicsr\|zifencei" > /dev/null && echo n || echo y)
 
 ifneq ($(OPENSBI_LD_PIE),y)
 $(error Your linker does not support creating PIEs, opensbi requires this.)
@@ -213,18 +190,16 @@ endif
 BUILD_INFO ?= n
 ifeq ($(BUILD_INFO),y)
 OPENSBI_BUILD_DATE_FMT = +%Y-%m-%d %H:%M:%S %z
-ifndef OPENSBI_BUILD_TIME_STAMP
 ifdef SOURCE_DATE_EPOCH
-	OPENSBI_BUILD_TIME_STAMP := $(shell date -u -d "@$(SOURCE_DATE_EPOCH)" \
+	OPENSBI_BUILD_TIME_STAMP ?= $(shell date -u -d "@$(SOURCE_DATE_EPOCH)" \
 		"$(OPENSBI_BUILD_DATE_FMT)" 2>/dev/null || \
 		date -u -r "$(SOURCE_DATE_EPOCH)" \
 		"$(OPENSBI_BUILD_DATE_FMT)" 2>/dev/null || \
 		date -u "$(OPENSBI_BUILD_DATE_FMT)")
 else
-	OPENSBI_BUILD_TIME_STAMP := $(shell date "$(OPENSBI_BUILD_DATE_FMT)")
+	OPENSBI_BUILD_TIME_STAMP ?= $(shell date "$(OPENSBI_BUILD_DATE_FMT)")
 endif
-endif
-OPENSBI_BUILD_COMPILER_VERSION := $(shell $(CC) -v 2>&1 | grep ' version ' | \
+OPENSBI_BUILD_COMPILER_VERSION=$(shell $(CC) -v 2>&1 | grep ' version ' | \
 	sed 's/[[:space:]]*$$//')
 endif
 
@@ -310,9 +285,10 @@ ifndef PLATFORM_RISCV_ABI
 endif
 ifndef PLATFORM_RISCV_ISA
   ifneq ($(PLATFORM_RISCV_TOOLCHAIN_DEFAULT), 1)
-    PLATFORM_RISCV_ISA := rv$(PLATFORM_RISCV_XLEN)imafdc
     ifeq ($(CC_SUPPORT_ZICSR_ZIFENCEI), y)
-      PLATFORM_RISCV_ISA := $(PLATFORM_RISCV_ISA)_zicsr_zifencei
+      PLATFORM_RISCV_ISA = rv$(PLATFORM_RISCV_XLEN)imafdc_zicsr_zifencei
+    else
+      PLATFORM_RISCV_ISA = rv$(PLATFORM_RISCV_XLEN)imafdc
     endif
   else
     PLATFORM_RISCV_ISA = $(OPENSBI_CC_ISA)
@@ -363,7 +339,6 @@ ifeq ($(BUILD_INFO),y)
 GENFLAGS	+=	-DOPENSBI_BUILD_TIME_STAMP="\"$(OPENSBI_BUILD_TIME_STAMP)\""
 GENFLAGS	+=	-DOPENSBI_BUILD_COMPILER_VERSION="\"$(OPENSBI_BUILD_COMPILER_VERSION)\""
 endif
-GENFLAGS	+=	-include $(include_dir)/sbi/sbi_visibility.h
 ifdef PLATFORM
 GENFLAGS	+=	-include $(KCONFIG_AUTOHEADER)
 endif
@@ -371,14 +346,14 @@ GENFLAGS	+=	$(libsbiutils-genflags-y)
 GENFLAGS	+=	$(platform-genflags-y)
 GENFLAGS	+=	$(firmware-genflags-y)
 
-CFLAGS		=	-g -Wall -Werror -ffreestanding -nostdlib -fno-stack-protector -fno-strict-aliasing -ffunction-sections -fdata-sections
-CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
-CFLAGS		+=	-fno-asynchronous-unwind-tables -fno-unwind-tables
-CFLAGS		+=	$(REPRODUCIBLE_FLAGS)
-# Optionally supported flags
-ifeq ($(CC_SUPPORT_VECTOR),y)
-CFLAGS		+=	-DOPENSBI_CC_SUPPORT_VECTOR
+CFLAGS		=	-g -Wall -Werror -ffreestanding -nostdlib -fno-stack-protector -fno-strict-aliasing
+ifneq ($(DEBUG),)
+CFLAGS		+=	-O0
+else
+CFLAGS		+=	-O2
 endif
+CFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
+# Optionally supported flags
 ifeq ($(CC_SUPPORT_SAVE_RESTORE),y)
 CFLAGS		+=	-mno-save-restore
 endif
@@ -400,7 +375,6 @@ CPPFLAGS	+=	$(firmware-cppflags-y)
 ASFLAGS		=	-g -Wall -nostdlib
 ASFLAGS		+=	-fno-omit-frame-pointer -fno-optimize-sibling-calls
 ASFLAGS		+=	-fPIE
-ASFLAGS		+=	$(REPRODUCIBLE_FLAGS)
 # Optionally supported flags
 ifeq ($(CC_SUPPORT_SAVE_RESTORE),y)
 ASFLAGS		+=	-mno-save-restore
@@ -423,7 +397,6 @@ ASFLAGS		+=	$(firmware-asflags-y)
 ARFLAGS		=	rcs
 
 ELFFLAGS	+=	$(USE_LD_FLAG)
-ELFFLAGS	+=	-Wl,--gc-sections
 ifeq ($(OPENSBI_LD_EXCLUDE_LIBS),y)
 ELFFLAGS	+=	-Wl,--exclude-libs,ALL
 endif
@@ -442,13 +415,6 @@ MERGEFLAGS	+=	-m elf$(PLATFORM_RISCV_XLEN)lriscv
 
 DTSCPPFLAGS	=	$(CPPFLAGS) -nostdinc -nostdlib -fno-builtin -D__DTS__ -x assembler-with-cpp
 
-ifneq ($(DEBUG),)
-CFLAGS		+=	-O0
-ELFFLAGS	+=	-Wl,--print-gc-sections
-else
-CFLAGS		+=	-O2
-endif
-
 # Setup functions for compilation
 define dynamic_flags
 -I$(shell dirname $(2)) -D__OBJNAME__=$(subst -,_,$(shell basename $(1) .o))
@@ -524,7 +490,7 @@ compile_d2c = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 compile_carray = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " CARRAY    $(subst $(build_dir)/,,$(1))"; \
 	     $(eval CARRAY_VAR_LIST := $(carray-$(subst .carray.c,,$(shell basename $(1)))-y)) \
-	     $(src_dir)/scripts/carray.sh -i $(2) -l "$(CARRAY_VAR_LIST)" > $(1) || rm $(1)
+	     $(src_dir)/scripts/carray.sh -i $(2) -l "$(CARRAY_VAR_LIST)" > $(1)
 compile_gen_dep = $(CMD_PREFIX)mkdir -p `dirname $(1)`; \
 	     echo " GEN-DEP   $(subst $(build_dir)/,,$(1))"; \
 	     echo "$(1:.dep=$(2)): $(3)" >> $(1)
@@ -553,7 +519,7 @@ $(build_dir)/%.dep: $(src_dir)/%.carray $(KCONFIG_AUTOHEADER)
 	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_AUTOHEADER))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
-$(build_dir)/%.carray.c: $(src_dir)/%.carray $(src_dir)/scripts/carray.sh
+$(build_dir)/%.carray.c: $(src_dir)/%.carray
 	$(call compile_carray,$@,$<)
 
 $(build_dir)/%.dep: $(src_dir)/%.c $(KCONFIG_AUTOHEADER)
@@ -581,7 +547,7 @@ $(platform_build_dir)/%.dep: $(platform_src_dir)/%.carray $(KCONFIG_AUTOHEADER)
 	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_AUTOHEADER))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
-$(platform_build_dir)/%.carray.c: $(platform_src_dir)/%.carray $(src_dir)/scripts/carray.sh
+$(platform_build_dir)/%.carray.c: $(platform_src_dir)/%.carray
 	$(call compile_carray,$@,$<)
 
 $(platform_build_dir)/%.dep: $(platform_src_dir)/%.c $(KCONFIG_AUTOHEADER)
@@ -624,7 +590,7 @@ $(platform_build_dir)/%.dep: $(src_dir)/%.carray $(KCONFIG_AUTOHEADER)
 	$(call compile_gen_dep,$@,.c,$< $(KCONFIG_AUTOHEADER))
 	$(call compile_gen_dep,$@,.o,$(@:.dep=.c))
 
-$(platform_build_dir)/%.carray.c: $(src_dir)/%.carray $(src_dir)/scripts/carray.sh
+$(platform_build_dir)/%.carray.c: $(src_dir)/%.carray
 	$(call compile_carray,$@,$<)
 
 $(platform_build_dir)/%.dep: $(src_dir)/%.c $(KCONFIG_AUTOHEADER)

README.md

@@ -99,7 +99,7 @@ capable enough to bring up all other non-booting harts using HSM extension.
 Required Toolchain and Packages
 -------------------------------
 
-OpenSBI can be compiled natively or cross-compiled on a host machine. For
+OpenSBI can be compiled natively or cross-compiled on a x86 host. For
 cross-compilation, you can build your own toolchain, download a prebuilt one
 from the [Bootlin toolchain repository] or install a distribution-provided
 toolchain; if you opt to use LLVM/Clang, most distribution toolchains will
@@ -108,12 +108,16 @@ LLVM/Clang toolchain due to LLVM's ability to support multiple backends in the
 same binary, so is often an easy way to obtain a working cross-compilation
 toolchain.
 
-Toolchains with Position Independent Executable (PIE) support like
-*riscv64-linux-gnu-gcc*, *riscv64-unknown-freebsd-gcc*, or *Clang/LLVM* are
-required in order to generate PIE firmware images that can run at arbitrary
-address with appropriate alignment. Bare-metal GNU toolchains (e.g.
-*riscv64-unknown-elf-gcc*) cannot be used. *Clang/LLVM* can still generate PIE
-images if a bare-metal triple is used (e.g. *-target riscv64-unknown-elf*).
+Basically, we prefer toolchains with Position Independent Executable (PIE)
+support like *riscv64-linux-gnu-gcc*, *riscv64-unknown-freebsd-gcc*, or
+*Clang/LLVM* as they generate PIE firmware images that can run at arbitrary
+address with appropriate alignment. If a bare-metal GNU toolchain (e.g.
+*riscv64-unknown-elf-gcc*) is used, static linked firmware images are
+generated instead. *Clang/LLVM* can still generate PIE images if a bare-metal
+triple is used (e.g. *-target riscv64-unknown-elf*).
+
+Please note that only a 64-bit version of the toolchain is available in
+the Bootlin toolchain repository for now.
 
 In addition to a toolchain, OpenSBI also requires the following packages on
 the host:
@@ -252,18 +256,6 @@ option with:
 make LLVM=1
 ```
 
-To build with a specific version of LLVM, a path to a directory containing the
-LLVM tools can be provided:
-```
-make LLVM=/path/to/llvm/
-```
-
-If you have versioned llvm tools you would like to use, such as `clang-17`, the LLVM variable can
-be set as:
-```
-make LLVM=-17
-```
-
 When using Clang, *CROSS_COMPILE* often does not need to be defined unless
 using GNU binutils with prefixed binary names. *PLATFORM_RISCV_XLEN* will be
 used to infer a default triple to pass to Clang, so if *PLATFORM_RISCV_XLEN*

docs/contributing.md

@@ -1,15 +1,17 @@
 OpenSBI Contribution Guideline
 ==============================
 
-All contributions to OpenSBI must be sent via email patches to the OpenSBI
-mailing list at `opensbi@lists.infradead.org`
+All contributions to OpenSBI can be sent in the following ways:
+1. Email patches to the OpenSBI mailing list at `opensbi@lists.infradead.org`
+2. GitHub Pull Requests (PRs) to the [OpenSBI main repository]
 
 To join the OpenSBI mailing list, please visit the [OpenSBI infradead page].
 
-The mailing list based patch approach is preferred over github PRs so that they
-are visible to a wider audience. All accepted patches on the OpenSBI mailing
-list will be taken by one of the OpenSBI maintainers and merged into the
-[OpenSBI main repository].
+The OpenSBI maintainers prefer patches via the OpenSBI mailing list
+(option 1 above) so that they are visible to a wider audience. All
+accepted patches on the OpenSBI mailing list will be taken by any of
+the OpenSBI maintainers and merged into the [OpenSBI main repository]
+using GitHub PRs.
 
 All contributed work must follow the following rules:
 1. OpenSBI code should be written in accordance to the [Linux coding style].
@@ -31,6 +33,9 @@ riscv/opensbi repository. Instead, prefer using a fork of the riscv/opensbi main
 repository and branches within that fork to create pull requests.
 7. A maintainer cannot merge his own pull requests in the riscv/opensbi main
 repository.
+8. A pull request must get at least one review from a maintainer.
+9. A pull request must spend at least 24 hours in review to allow for other
+developers to review.
 
 -----------------------------------------------------------------------
 

docs/domain_support.md

@@ -41,6 +41,7 @@ has following details:
 * **name** - Name of this domain
 * **assigned_harts** - HARTs assigned to this domain
 * **possible_harts** - HARTs possible in this domain
+* **hartindex_to_context_table** - Contexts corresponding to possible HARTs
 * **regions** - Array of memory regions terminated by a memory region
   with order zero
 * **boot_hartid** - HART id of the HART booting this domain. The domain
@@ -80,6 +81,7 @@ following manner:
   platform support
 * **possible_harts** - All valid HARTs of a RISC-V platform are possible
   HARTs of the ROOT domain
+* **hartindex_to_context_table** - Contexts corresponding to ROOT domain's possible HARTs
 * **regions** - Two memory regions available to the ROOT domain:
   **A)** A memory region to protect OpenSBI firmware from S-mode and U-mode
   **B)** A memory region of **order=__riscv_xlen** allowing S-mode and

docs/opensbi_config.md

@@ -23,9 +23,6 @@ The DT properties of a domain configuration DT node are as follows:
   set of harts is permitted to perform a cold boot. Otherwise, all
   harts are allowed to cold boot.
 
-* **heap-size** (Optional) - When present, the specified value is used
-  as the size of the heap in bytes.
-
 * **system-suspend-test** (Optional) - When present, enable a system
   suspend test implementation which simply waits five seconds and issues a WFI.
 
@@ -39,7 +36,6 @@ The OpenSBI Configuration Node will be deleted at the end of cold boot
         opensbi-config {
             compatible = "opensbi,config";
             cold-boot-harts = <&cpu1 &cpu2 &cpu3 &cpu4>;
-            heap-size = <0x400000>;
             system-suspend-test;
         };
     };

docs/platform/qemu_virt.md

@@ -56,14 +56,7 @@ qemu-system-riscv64 -M virt -m 256M -nographic \
 **Linux Kernel Payload**
 
 Note: We assume that the Linux kernel is compiled using
-*arch/riscv/configs/defconfig*. The kernel must be a flattened image (a file
-called `Image`) rather than an ELF (`vmlinux`).
-
-Example of building a Linux kernel:
-```
-make ARCH=riscv CROSS_COMPILE=riscv64-linux- defconfig
-make ARCH=riscv CROSS_COMPILE=riscv64-linux- Image
-```
+*arch/riscv/configs/defconfig*.
 
 Build:
 ```

docs/platform_requirements.md

@@ -19,10 +19,6 @@ Base Platform Requirements
 The base RISC-V platform requirements for OpenSBI are as follows:
 
 1. At least rv32ima_zicsr or rv64ima_zicsr required on all HARTs
-
-     * Users may restrict the usage of atomic instructions to lr/sc
-       via rv32im_zalrsc_zicsr or rv64im_zalrsc_zicsr if preferred
-
 2. At least one HART should have S-mode support because:
 
      * SBI calls are meant for RISC-V S-mode (Supervisor mode)

docs/pmu_support.md

@@ -74,10 +74,10 @@ pmu {
 						  <0x10000 0x10033 0x000ff000>;
 					/* For event ID 0x0002 */
 	riscv,raw-event-to-mhpmcounters = <0x0000 0x0002 0xffffffff 0xffffffff 0x00000f8>,
-					/* For event ID 0-15 */
+					/* For event ID 0-4 */
 					<0x0 0x0 0xffffffff 0xfffffff0 0x00000ff0>,
 					/* For event ID 0xffffffff0000000f - 0xffffffff000000ff */
-					<0xffffffff 0xf 0xffffffff 0xffffff0f 0x00000ff0>;
+					<0xffffffff 0x0 0xffffffff 0xffffff0f 0x00000ff0>;
 };
 ```
 

firmware/fw_base.S

@@ -14,8 +14,8 @@
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_trap.h>
 
-#define BOOT_LOTTERY_ACQUIRED		1
-#define BOOT_STATUS_BOOT_HART_DONE	1
+#define BOOT_STATUS_LOTTERY_DONE	1
+#define BOOT_STATUS_BOOT_HART_DONE	2
 
 .macro	MOV_3R __d0, __s0, __d1, __s1, __d2, __s2
 	add	\__d0, \__s0, zero
@@ -31,16 +31,6 @@
 	add	\__d4, \__s4, zero
 .endm
 
-.macro CLEAR_MDT tmp
-#if __riscv_xlen == 32
-	li 	\tmp, MSTATUSH_MDT
-	csrc	CSR_MSTATUSH, \tmp
-#else
-	li 	\tmp, MSTATUS_MDT
-	csrc	CSR_MSTATUS, \tmp
-#endif
-.endm
-
 	.section .entry, "ax", %progbits
 	.align 3
 	.globl _start
@@ -57,20 +47,10 @@ _start:
 	bne	a0, a6, _wait_for_boot_hart
 _try_lottery:
 	/* Jump to relocation wait loop if we don't get relocation lottery */
-	lla	a6, _boot_lottery
-	li	a7, BOOT_LOTTERY_ACQUIRED
-#ifdef __riscv_atomic
+	lla	a6, _relocate_lottery
+	li	a7, BOOT_STATUS_LOTTERY_DONE
 	amoswap.w a6, a7, (a6)
 	bnez	a6, _wait_for_boot_hart
-#elif __riscv_zalrsc
-_sc_fail:
-	lr.w	t0, (a6)
-	sc.w	t1, a7, (a6)
-	bnez	t1, _sc_fail
-	bnez	t0, _wait_for_boot_hart
-#else
-#error "need a or zalrsc"
-#endif
 
 	/* relocate the global table content */
 	li	t0, FW_TEXT_START	/* link start */
@@ -111,14 +91,6 @@ _bss_zero:
 	lla	s4, _start_hang
 	csrw	CSR_MTVEC, s4
 
-	/*
-	 * While at this point, trap handling is rudimentary, if a trap happens,
-	 * it will end up in _start_hang which is enough to hook up a GDB. Clear
-	 * MDT to avoid generating a double trap and thus entering a
-	 * critical-error state.
-	 */
-	CLEAR_MDT t0
-
 	/* Setup temporary stack */
 	lla	s4, _fw_end
 	li	s5, (SBI_SCRATCH_SIZE * 2)
@@ -246,8 +218,6 @@ _scratch_init:
 #endif
 	REG_S	a0, SBI_SCRATCH_OPTIONS_OFFSET(tp)
 	MOV_3R	a0, s0, a1, s1, a2, s2
-	/* Store hart index in scratch space */
-	REG_S	t1, SBI_SCRATCH_HARTINDEX_OFFSET(tp)
 	/* Move to next scratch space */
 	add	t1, t1, t2
 	blt	t1, s7, _scratch_init
@@ -272,14 +242,30 @@ _scratch_init:
 	beq	t1, a1, _fdt_reloc_done
 	/* t0 = source FDT start address */
 	add	t0, a1, zero
-	/* t2 = source FDT size (convert from big-endian) */
-	lbu	t2, 7(t0)
-	lbu	t3, 6(t0)
-	lbu	t4, 5(t0)
-	lbu	t5, 4(t0)
+	/* t2 = source FDT size in big-endian */
+#if __riscv_xlen > 32
+	lwu	t2, 4(t0)
+#else
+	lw	t2, 4(t0)
+#endif
+	/* t3 = bit[15:8] of FDT size */
+	add	t3, t2, zero
+	srli	t3, t3, 16
+	and	t3, t3, a4
 	slli	t3, t3, 8
+	/* t4 = bit[23:16] of FDT size */
+	add	t4, t2, zero
+	srli	t4, t4, 8
+	and	t4, t4, a4
 	slli	t4, t4, 16
+	/* t5 = bit[31:24] of FDT size */
+	add	t5, t2, zero
+	and	t5, t5, a4
 	slli	t5, t5, 24
+	/* t2 = bit[7:0] of FDT size */
+	srli	t2, t2, 24
+	and	t2, t2, a4
+	/* t2 = FDT size in little-endian */
 	or	t2, t2, t3
 	or	t2, t2, t4
 	or	t2, t2, t5
@@ -302,7 +288,7 @@ _fdt_reloc_done:
 	REG_S	t0, 0(t1)
 	j	_start_warm
 
-	/* waiting for boot hart to be done (_boot_status == BOOT_STATUS_BOOT_HART_DONE) */
+	/* waiting for boot hart to be done (_boot_status == 2) */
 _wait_for_boot_hart:
 	li	t0, BOOT_STATUS_BOOT_HART_DONE
 	lla	t1, _boot_status
@@ -376,9 +362,6 @@ _start_warm:
 _skip_trap_handler_hyp:
 	csrw	CSR_MTVEC, a4
 
-	/* Clear MDT here again for all harts */
-	CLEAR_MDT t0
-
 	/* Initialize SBI runtime */
 	csrr	a0, CSR_MSCRATCH
 	call	sbi_init
@@ -388,8 +371,8 @@ _skip_trap_handler_hyp:
 
 	.data
 	.align 3
-_boot_lottery:
-	RISCV_PTR	0
+_relocate_lottery:
+	RISCV_PTR   0
 _boot_status:
 	RISCV_PTR	0
 
@@ -576,9 +559,6 @@ memcmp:
 	li	t0, 0
 .endif
 	REG_S	t0, (SBI_TRAP_REGS_SIZE + SBI_TRAP_INFO_OFFSET(gva))(sp)
-
-	/* We are ready to take another trap, clear MDT */
-	CLEAR_MDT t0
 .endm
 
 .macro	TRAP_CALL_C_ROUTINE
@@ -621,18 +601,15 @@ memcmp:
 .endm
 
 .macro	TRAP_RESTORE_MEPC_MSTATUS have_mstatush
-	/*
-	 * Restore MSTATUS and MEPC CSRs starting with MSTATUS/H to set MDT
-	 * flags since we can not take a trap now or MEPC would be cloberred
-	 */
+	/* Restore MEPC and MSTATUS CSRs */
+	REG_L	t0, SBI_TRAP_REGS_OFFSET(mepc)(a0)
+	csrw	CSR_MEPC, t0
+	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatus)(a0)
+	csrw	CSR_MSTATUS, t0
 	.if \have_mstatush
 	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatusH)(a0)
 	csrw	CSR_MSTATUSH, t0
 	.endif
-	REG_L	t0, SBI_TRAP_REGS_OFFSET(mstatus)(a0)
-	csrw	CSR_MSTATUS, t0
-	REG_L	t0, SBI_TRAP_REGS_OFFSET(mepc)(a0)
-	csrw	CSR_MEPC, t0
 .endm
 
 .macro TRAP_RESTORE_A0_T0

firmware/fw_base.ldS

@@ -20,7 +20,6 @@
 		PROVIDE(_text_start = .);
 		*(.entry)
 		*(.text)
-		*(.text.*)
 		. = ALIGN(8);
 		PROVIDE(_text_end = .);
 	}

firmware/payloads/test_head.S

@@ -30,18 +30,7 @@ _start:
 	/* Pick one hart to run the main boot sequence */
 	lla	a3, _hart_lottery
 	li	a2, 1
-#ifdef __riscv_atomic
 	amoadd.w a3, a2, (a3)
-#elif __riscv_zalrsc
-_sc_fail:
-	lr.w	t0, (a3)
-	addw	t1, t0, a2
-	sc.w	t1, t1, (a3)
-	bnez	t1, _sc_fail
-	move	a3, t0
-#else
-#error "need a or zalrsc"
-#endif
 	bnez	a3, _start_hang
 
 	/* Save a0 and a1 */

include/sbi/fw_dynamic.h

@@ -79,12 +79,36 @@ struct fw_dynamic_info {
  * Prevent modification of struct fw_dynamic_info from affecting
  * FW_DYNAMIC_INFO_xxx_OFFSET
  */
-assert_member_offset(struct fw_dynamic_info, magic, FW_DYNAMIC_INFO_MAGIC_OFFSET);
-assert_member_offset(struct fw_dynamic_info, version, FW_DYNAMIC_INFO_VERSION_OFFSET);
-assert_member_offset(struct fw_dynamic_info, next_addr, FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET);
-assert_member_offset(struct fw_dynamic_info, next_mode, FW_DYNAMIC_INFO_NEXT_MODE_OFFSET);
-assert_member_offset(struct fw_dynamic_info, options, FW_DYNAMIC_INFO_OPTIONS_OFFSET);
-assert_member_offset(struct fw_dynamic_info, boot_hart, FW_DYNAMIC_INFO_BOOT_HART_OFFSET);
+_Static_assert(
+	offsetof(struct fw_dynamic_info, magic)
+		== FW_DYNAMIC_INFO_MAGIC_OFFSET,
+	"struct fw_dynamic_info definition has changed, please redefine "
+	"FW_DYNAMIC_INFO_MAGIC_OFFSET");
+_Static_assert(
+	offsetof(struct fw_dynamic_info, version)
+		== FW_DYNAMIC_INFO_VERSION_OFFSET,
+	"struct fw_dynamic_info definition has changed, please redefine "
+	"FW_DYNAMIC_INFO_VERSION_OFFSET");
+_Static_assert(
+	offsetof(struct fw_dynamic_info, next_addr)
+		== FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET,
+	"struct fw_dynamic_info definition has changed, please redefine "
+	"FW_DYNAMIC_INFO_NEXT_ADDR_OFFSET");
+_Static_assert(
+	offsetof(struct fw_dynamic_info, next_mode)
+		== FW_DYNAMIC_INFO_NEXT_MODE_OFFSET,
+	"struct fw_dynamic_info definition has changed, please redefine "
+	"FW_DYNAMIC_INFO_NEXT_MODE_OFFSET");
+_Static_assert(
+	offsetof(struct fw_dynamic_info, options)
+		== FW_DYNAMIC_INFO_OPTIONS_OFFSET,
+	"struct fw_dynamic_info definition has changed, please redefine "
+	"FW_DYNAMIC_INFO_OPTIONS_OFFSET");
+_Static_assert(
+	offsetof(struct fw_dynamic_info, boot_hart)
+		== FW_DYNAMIC_INFO_BOOT_HART_OFFSET,
+	"struct fw_dynamic_info definition has changed, please redefine "
+	"FW_DYNAMIC_INFO_BOOT_HART_OFFSET");
 
 #endif
 

include/sbi/riscv_asm.h

@@ -101,14 +101,6 @@
 		__v;                                            \
 	})
 
-/* Variant of csr_read() that allows the compiler to cache the value. */
-#define csr_read_relaxed(csr)                                     \
-	({                                                        \
-		register unsigned long __v;                       \
-		__asm__ ("csrr %0, " __ASM_STR(csr) : "=r"(__v)); \
-		__v;                                              \
-	})
-
 #define csr_write(csr, val)                                        \
 	({                                                         \
 		unsigned long __v = (unsigned long)(val);          \
@@ -156,26 +148,6 @@
 				     : "memory");                  \
 	})
 
-#if __riscv_xlen == 64
-#define __csrrw64(op, csr, csrh, val) (true ? op(csr, val) : (uint64_t)csrh)
-#define __csrr64( op, csr, csrh)      (true ? op(csr)      : (uint64_t)csrh)
-#define __csrw64( op, csr, csrh, val) (true ? op(csr, val) : (uint64_t)csrh)
-#elif __riscv_xlen == 32
-#define __csrrw64(op, csr, csrh, val) (  op(csr, val) | (uint64_t)op(csrh, val >> 32) << 32)
-#define __csrr64( op, csr, csrh)      (  op(csr)      | (uint64_t)op(csrh)            << 32)
-#define __csrw64( op, csr, csrh, val) ({ op(csr, val);            op(csrh, val >> 32);    })
-#endif
-
-#define csr_swap64(        csr, val) __csrrw64(csr_swap,         csr, csr ## H, val)
-#define csr_read64(        csr)      __csrr64 (csr_read,         csr, csr ## H)
-#define csr_read_relaxed64(csr)      __csrr64 (csr_read_relaxed, csr, csr ## H)
-#define csr_write64(       csr, val) __csrw64 (csr_write,        csr, csr ## H, val)
-#define csr_read_set64(    csr, val) __csrrw64(csr_read_set,     csr, csr ## H, val)
-#define csr_set64(         csr, val) __csrw64 (csr_set,          csr, csr ## H, val)
-#define csr_clear64(       csr, val) __csrw64 (csr_clear,        csr, csr ## H, val)
-#define csr_read_clear64(  csr, val) __csrrw64(csr_read_clear,   csr, csr ## H, val)
-#define csr_clear64(       csr, val) __csrw64 (csr_clear,        csr, csr ## H, val)
-
 unsigned long csr_read_num(int csr_num);
 
 void csr_write_num(int csr_num, unsigned long val);
@@ -191,7 +163,7 @@ void csr_write_num(int csr_num, unsigned long val);
 	} while (0)
 
 /* Get current HART id */
-#define current_hartid()	((unsigned int)csr_read_relaxed(CSR_MHARTID))
+#define current_hartid()	((unsigned int)csr_read(CSR_MHARTID))
 
 /* determine CPU extension, return non-zero support */
 int misa_extension_imp(char ext);

include/sbi/riscv_encoding.h

@@ -32,8 +32,6 @@
 #define MSTATUS_TVM			_UL(0x00100000)
 #define MSTATUS_TW			_UL(0x00200000)
 #define MSTATUS_TSR			_UL(0x00400000)
-#define MSTATUS_SPELP			_UL(0x00800000)
-#define MSTATUS_SDT			_UL(0x01000000)
 #define MSTATUS32_SD			_UL(0x80000000)
 #if __riscv_xlen == 64
 #define MSTATUS_UXL			_ULL(0x0000000300000000)
@@ -43,16 +41,12 @@
 #define MSTATUS_GVA			_ULL(0x0000004000000000)
 #define MSTATUS_GVA_SHIFT		38
 #define MSTATUS_MPV			_ULL(0x0000008000000000)
-#define MSTATUS_MPELP			_ULL(0x0000020000000000)
-#define MSTATUS_MDT			_ULL(0x0000040000000000)
 #else
 #define MSTATUSH_SBE			_UL(0x00000010)
 #define MSTATUSH_MBE			_UL(0x00000020)
 #define MSTATUSH_GVA			_UL(0x00000040)
 #define MSTATUSH_GVA_SHIFT		6
 #define MSTATUSH_MPV			_UL(0x00000080)
-#define MSTATUSH_MPELP			_UL(0x00000200)
-#define MSTATUSH_MDT			_UL(0x00000400)
 #endif
 #define MSTATUS32_SD			_UL(0x80000000)
 #define MSTATUS64_SD			_ULL(0x8000000000000000)
@@ -86,8 +80,6 @@
 #define HSTATUS_GVA			_UL(0x00000040)
 #define HSTATUS_VSBE			_UL(0x00000020)
 
-#define MTVEC_MODE			_UL(0x00000003)
-
 #define MCAUSE_IRQ_MASK			(_UL(1) << (__riscv_xlen - 1))
 
 #define IRQ_S_SOFT			1
@@ -219,15 +211,8 @@
 
 #define ENVCFG_STCE			(_ULL(1) << 63)
 #define ENVCFG_PBMTE			(_ULL(1) << 62)
-#define ENVCFG_ADUE_SHIFT		61
-#define ENVCFG_ADUE			(_ULL(1) << ENVCFG_ADUE_SHIFT)
+#define ENVCFG_ADUE			(_ULL(1) << 61)
 #define ENVCFG_CDE			(_ULL(1) << 60)
-#define ENVCFG_DTE_SHIFT		59
-#define ENVCFG_DTE			(_ULL(1) << ENVCFG_DTE_SHIFT)
-#define ENVCFG_PMM			(_ULL(0x3) << 32)
-#define ENVCFG_PMM_PMLEN_0		(_ULL(0x0) << 32)
-#define ENVCFG_PMM_PMLEN_7		(_ULL(0x2) << 32)
-#define ENVCFG_PMM_PMLEN_16		(_ULL(0x3) << 32)
 #define ENVCFG_CBZE			(_UL(1) << 7)
 #define ENVCFG_CBCFE			(_UL(1) << 6)
 #define ENVCFG_CBIE_SHIFT		4
@@ -235,10 +220,6 @@
 #define ENVCFG_CBIE_ILL			_UL(0x0)
 #define ENVCFG_CBIE_FLUSH		_UL(0x1)
 #define ENVCFG_CBIE_INV			_UL(0x3)
-#define ENVCFG_SSE_SHIFT		3
-#define ENVCFG_SSE			(_UL(1) << ENVCFG_SSE_SHIFT)
-#define ENVCFG_LPE_SHIFT		2
-#define ENVCFG_LPE			(_UL(1) << ENVCFG_LPE_SHIFT)
 #define ENVCFG_FIOM			_UL(0x1)
 
 /* ===== User-level CSRs ===== */
@@ -247,7 +228,6 @@
 #define CSR_USTATUS			0x000
 #define CSR_UIE				0x004
 #define CSR_UTVEC			0x005
-#define CSR_SSP				0x011
 
 /* User Trap Handling (N-extension) */
 #define CSR_USCRATCH			0x040
@@ -378,17 +358,6 @@
 #define CSR_SSTATEEN2			0x10E
 #define CSR_SSTATEEN3			0x10F
 
-/* Machine-Level Control transfer records CSRs */
-#define CSR_MCTRCTL                     0x34e
-
-/* Supervisor-Level Control transfer records CSRs */
-#define CSR_SCTRCTL                     0x14e
-#define CSR_SCTRSTATUS                  0x14f
-#define CSR_SCTRDEPTH                   0x15f
-
-/* VS-Level Control transfer records CSRs */
-#define CSR_VSCTRCTL                    0x24e
-
 /* ===== Hypervisor-level CSRs ===== */
 
 /* Hypervisor Trap Setup (H-extension) */
@@ -777,12 +746,6 @@
 #define CSR_MVIPH			0x319
 #define CSR_MIPH			0x354
 
-/* Vector extension registers */
-#define CSR_VSTART			0x8
-#define CSR_VL				0xc20
-#define CSR_VTYPE			0xc21
-#define CSR_VLENB			0xc22
-
 /* ===== Trap/Exception Causes ===== */
 
 #define CAUSE_MISALIGNED_FETCH		0x0
@@ -800,8 +763,6 @@
 #define CAUSE_FETCH_PAGE_FAULT		0xc
 #define CAUSE_LOAD_PAGE_FAULT		0xd
 #define CAUSE_STORE_PAGE_FAULT		0xf
-#define CAUSE_DOUBLE_TRAP		0x10
-#define CAUSE_SW_CHECK_EXCP		0x12
 #define CAUSE_FETCH_GUEST_PAGE_FAULT	0x14
 #define CAUSE_LOAD_GUEST_PAGE_FAULT	0x15
 #define CAUSE_VIRTUAL_INST_FAULT	0x16
@@ -813,8 +774,6 @@
 #define SMSTATEEN0_CS			(_ULL(1) << SMSTATEEN0_CS_SHIFT)
 #define SMSTATEEN0_FCSR_SHIFT		1
 #define SMSTATEEN0_FCSR			(_ULL(1) << SMSTATEEN0_FCSR_SHIFT)
-#define SMSTATEEN0_CTR_SHIFT		54
-#define SMSTATEEN0_CTR			(_ULL(1) << SMSTATEEN0_CTR_SHIFT)
 #define SMSTATEEN0_CONTEXT_SHIFT	57
 #define SMSTATEEN0_CONTEXT		(_ULL(1) << SMSTATEEN0_CONTEXT_SHIFT)
 #define SMSTATEEN0_IMSIC_SHIFT		58
@@ -913,365 +872,11 @@
 #define INSN_MASK_FENCE_TSO		0xffffffff
 #define INSN_MATCH_FENCE_TSO		0x8330000f
 
-#define INSN_MASK_VECTOR_UNIT_STRIDE		0xfdf0707f
-#define INSN_MASK_VECTOR_FAULT_ONLY_FIRST	0xfdf0707f
-#define INSN_MASK_VECTOR_STRIDE			0xfc00707f
-#define INSN_MASK_VECTOR_WHOLE_REG		0xfff0707f
-#define INSN_MASK_VECTOR_INDEXED		0xfc00707f
-
-#define INSN_MATCH_VLUXSEG(n, bits) ((((n) - 1) << 29) | 0x04000007 | \
-		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
-#define INSN_MATCH_VSUXSEG(n, bits) ((((n) - 1) << 29) | 0x04000027 | \
-		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
-#define INSN_MATCH_VLOXSEG(n, bits) ((((n) - 1) << 29) | 0x0c000007 | \
-		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
-#define INSN_MATCH_VSOXSEG(n, bits) ((((n) - 1) << 29) | 0x0c000027 | \
-		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
-#define INSN_MATCH_VLSSEG(n, bits)  ((((n) - 1) << 29) | 0x08000007 | \
-		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
-#define INSN_MATCH_VSSSEG(n, bits)  ((((n) - 1) << 29) | 0x08000027 | \
-		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
-#define INSN_MATCH_VSSEG(n, bits)   ((((n) - 1) << 29) | 0x00004027 | \
-		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
-#define INSN_MATCH_VLSEG(n, bits)   ((((n) - 1) << 29) | 0x00004007 | \
-		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
-#define INSN_MATCH_VLSEGFF(n, bits) ((((n) - 1) << 29) | 0x1000007 | \
-		((bits) == 16 ? 5 : (bits) == 32 ? 6 : 7) << 12)
-
-#define INSN_MATCH_VLE16V		0x00005007
-#define INSN_MATCH_VLE32V		0x00006007
-#define INSN_MATCH_VLE64V		0x00007007
-#define INSN_MATCH_VSE16V		0x00005027
-#define INSN_MATCH_VSE32V		0x00006027
-#define INSN_MATCH_VSE64V		0x00007027
-#define INSN_MATCH_VLSE16V		0x08005007
-#define INSN_MATCH_VLSE32V		0x08006007
-#define INSN_MATCH_VLSE64V		0x08007007
-#define INSN_MATCH_VSSE16V		0x08005027
-#define INSN_MATCH_VSSE32V		0x08006027
-#define INSN_MATCH_VSSE64V		0x08007027
-#define INSN_MATCH_VLOXEI16V		0x0c005007
-#define INSN_MATCH_VLOXEI32V		0x0c006007
-#define INSN_MATCH_VLOXEI64V		0x0c007007
-#define INSN_MATCH_VSOXEI16V		0x0c005027
-#define INSN_MATCH_VSOXEI32V		0x0c006027
-#define INSN_MATCH_VSOXEI64V		0x0c007027
-#define INSN_MATCH_VLUXEI16V		0x04005007
-#define INSN_MATCH_VLUXEI32V		0x04006007
-#define INSN_MATCH_VLUXEI64V		0x04007007
-#define INSN_MATCH_VSUXEI16V		0x04005027
-#define INSN_MATCH_VSUXEI32V		0x04006027
-#define INSN_MATCH_VSUXEI64V		0x04007027
-#define INSN_MATCH_VLE16FFV		0x01005007
-#define INSN_MATCH_VLE32FFV		0x01006007
-#define INSN_MATCH_VLE64FFV		0x01007007
-#define INSN_MATCH_VL1RE8V		0x02800007
-#define INSN_MATCH_VL1RE16V		0x02805007
-#define INSN_MATCH_VL1RE32V		0x02806007
-#define INSN_MATCH_VL1RE64V		0x02807007
-#define INSN_MATCH_VL2RE8V		0x22800007
-#define INSN_MATCH_VL2RE16V		0x22805007
-#define INSN_MATCH_VL2RE32V		0x22806007
-#define INSN_MATCH_VL2RE64V		0x22807007
-#define INSN_MATCH_VL4RE8V		0x62800007
-#define INSN_MATCH_VL4RE16V		0x62805007
-#define INSN_MATCH_VL4RE32V		0x62806007
-#define INSN_MATCH_VL4RE64V		0x62807007
-#define INSN_MATCH_VL8RE8V		0xe2800007
-#define INSN_MATCH_VL8RE16V		0xe2805007
-#define INSN_MATCH_VL8RE32V		0xe2806007
-#define INSN_MATCH_VL8RE64V		0xe2807007
-#define INSN_MATCH_VS1RV		0x02800027
-#define INSN_MATCH_VS2RV		0x22800027
-#define INSN_MATCH_VS4RV		0x62800027
-#define INSN_MATCH_VS8RV		0xe2800027
-
-#define INSN_OPCODE_MASK		0x7f
-#define INSN_OPCODE_VECTOR_LOAD		0x07
-#define INSN_OPCODE_VECTOR_STORE	0x27
-#define INSN_OPCODE_AMO			0x2f
-
-#define IS_VECTOR_LOAD_STORE(insn) \
-	((((insn) & INSN_OPCODE_MASK) == INSN_OPCODE_VECTOR_LOAD) || \
-	(((insn) & INSN_OPCODE_MASK) == INSN_OPCODE_VECTOR_STORE))
-
-#define IS_VECTOR_INSN_MATCH(insn, match, mask) \
-	(((insn) & (mask)) == ((match) & (mask)))
-
-#define IS_UNIT_STRIDE_MATCH(insn, match) \
-	IS_VECTOR_INSN_MATCH(insn, match, INSN_MASK_VECTOR_UNIT_STRIDE)
-
-#define IS_STRIDE_MATCH(insn, match) \
-	IS_VECTOR_INSN_MATCH(insn, match, INSN_MASK_VECTOR_STRIDE)
-
-#define IS_INDEXED_MATCH(insn, match) \
-	IS_VECTOR_INSN_MATCH(insn, match, INSN_MASK_VECTOR_INDEXED)
-
-#define IS_FAULT_ONLY_FIRST_MATCH(insn, match) \
-	IS_VECTOR_INSN_MATCH(insn, match, INSN_MASK_VECTOR_FAULT_ONLY_FIRST)
-
-#define IS_WHOLE_REG_MATCH(insn, match) \
-	IS_VECTOR_INSN_MATCH(insn, match, INSN_MASK_VECTOR_WHOLE_REG)
-
-#define IS_UNIT_STRIDE_LOAD(insn) ( \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLE16V) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLE32V) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLE64V) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(2, 16)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(3, 16)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(4, 16)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(5, 16)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(6, 16)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(7, 16)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(8, 16)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(2, 32)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(3, 32)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(4, 32)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(5, 32)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(6, 32)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(7, 32)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(8, 32)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(2, 64)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(3, 64)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(4, 64)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(5, 64)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(6, 64)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(7, 64)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VLSEG(8, 64)))
-
-#define IS_UNIT_STRIDE_STORE(insn) ( \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSE16V) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSE32V) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSE64V) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(2, 16)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(3, 16)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(4, 16)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(5, 16)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(6, 16)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(7, 16)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(8, 16)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(2, 32)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(3, 32)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(4, 32)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(5, 32)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(6, 32)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(7, 32)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(8, 32)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(2, 64)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(3, 64)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(4, 64)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(5, 64)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(6, 64)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(7, 64)) || \
-	IS_UNIT_STRIDE_MATCH(insn, INSN_MATCH_VSSEG(8, 64)))
-
-#define IS_STRIDE_LOAD(insn) ( \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSE16V) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSE32V) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSE64V) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(2, 16)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(3, 16)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(4, 16)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(5, 16)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(6, 16)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(7, 16)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(8, 16)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(2, 32)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(3, 32)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(4, 32)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(5, 32)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(6, 32)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(7, 32)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(8, 32)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(2, 64)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(3, 64)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(4, 64)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(5, 64)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(6, 64)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(7, 64)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VLSSEG(8, 64)))
-
-#define IS_STRIDE_STORE(insn) ( \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSE16V) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSE32V) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSE64V) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(2, 16)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(3, 16)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(4, 16)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(5, 16)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(6, 16)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(7, 16)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(8, 16)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(2, 32)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(3, 32)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(4, 32)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(5, 32)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(6, 32)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(7, 32)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(8, 32)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(2, 64)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(3, 64)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(4, 64)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(5, 64)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(6, 64)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(7, 64)) || \
-	IS_STRIDE_MATCH(insn, INSN_MATCH_VSSSEG(8, 64)))
-
-#define IS_INDEXED_LOAD(insn) ( \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXEI16V) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXEI32V) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXEI64V) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXEI16V) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXEI32V) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXEI64V) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(2, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(3, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(4, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(5, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(6, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(7, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(8, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(2, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(3, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(4, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(5, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(6, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(7, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(8, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(2, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(3, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(4, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(5, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(6, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(7, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLUXSEG(8, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(2, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(3, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(4, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(5, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(6, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(7, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(8, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(2, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(3, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(4, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(5, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(6, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(7, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(8, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(2, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(3, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(4, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(5, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(6, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(7, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VLOXSEG(8, 64)))
-
-#define IS_INDEXED_STORE(insn) ( \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXEI16V) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXEI32V) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXEI64V) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXEI16V) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXEI32V) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXEI64V) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(2, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(3, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(4, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(5, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(6, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(7, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(8, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(2, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(3, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(4, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(5, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(6, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(7, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(8, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(2, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(3, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(4, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(5, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(6, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(7, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSUXSEG(8, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(2, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(3, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(4, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(5, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(6, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(7, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(8, 16)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(2, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(3, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(4, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(5, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(6, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(7, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(8, 32)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(2, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(3, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(4, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(5, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(6, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(7, 64)) || \
-	IS_INDEXED_MATCH(insn, INSN_MATCH_VSOXSEG(8, 64)))
-
-#define IS_FAULT_ONLY_FIRST_LOAD(insn) ( \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLE16FFV) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLE32FFV) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLE64FFV) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(2, 16)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(3, 16)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(4, 16)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(5, 16)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(6, 16)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(7, 16)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(8, 16)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(2, 32)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(3, 32)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(4, 32)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(5, 32)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(6, 32)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(7, 32)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(8, 32)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(2, 64)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(3, 64)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(4, 64)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(5, 64)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(6, 64)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(7, 64)) || \
-	IS_FAULT_ONLY_FIRST_MATCH(insn, INSN_MATCH_VLSEGFF(8, 64)))
-
-	#define IS_WHOLE_REG_LOAD(insn) ( \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL1RE8V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL1RE16V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL1RE32V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL1RE64V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL2RE8V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL2RE16V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL2RE32V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL2RE64V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL4RE8V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL4RE16V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL4RE32V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL4RE64V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL8RE8V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL8RE16V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL8RE32V) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VL8RE64V))
-
-#define IS_WHOLE_REG_STORE(insn) ( \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VS1RV) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VS2RV) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VS4RV) || \
-	IS_WHOLE_REG_MATCH(insn, INSN_MATCH_VS8RV))
-
-
 #if __riscv_xlen == 64
 
 /* 64-bit read for VS-stage address translation (RV64) */
 #define INSN_PSEUDO_VS_LOAD		0x00003000
+
 /* 64-bit write for VS-stage address translation (RV64) */
 #define INSN_PSEUDO_VS_STORE	0x00003020
 
@@ -1287,23 +892,6 @@
 #error "Unexpected __riscv_xlen"
 #endif
 
-#define MASK_FUNCT3			0x7000
-#define SHIFT_FUNCT3			12
-
-#define MASK_RS1			0xf8000
-
-#define MASK_CSR			0xfff00000
-#define SHIFT_CSR			20
-
-#define MASK_AQRL			0x06000000
-#define SHIFT_AQRL			25
-
-#define VM_MASK				0x1
-#define VIEW_MASK				0x3
-#define VSEW_MASK				0x3
-#define VLMUL_MASK				0x7
-#define VD_MASK				0x1f
-#define VS2_MASK				0x1f
 #define INSN_16BIT_MASK			0x3
 #define INSN_32BIT_MASK			0x1c
 
@@ -1322,12 +910,6 @@
 #endif
 #define REGBYTES			(1 << LOG_REGBYTES)
 
-#define SH_VSEW			3
-#define SH_VIEW			12
-#define SH_VD				7
-#define SH_VS2				20
-#define SH_VM				25
-#define SH_MEW				28
 #define SH_RD				7
 #define SH_RS1				15
 #define SH_RS2				20
@@ -1365,11 +947,10 @@
 #define REG_PTR(insn, pos, regs)	\
 	(ulong *)((ulong)(regs) + REG_OFFSET(insn, pos))
 
-#define GET_FUNC3(insn)			((insn & MASK_FUNCT3) >> SHIFT_FUNCT3)
-#define GET_RM(insn)			GET_FUNC3(insn)
+#define GET_RM(insn)			((insn & MASK_FUNCT3) >> SHIFT_FUNCT3)
+
 #define GET_RS1_NUM(insn)		((insn & MASK_RS1) >> 15)
 #define GET_CSR_NUM(insn)		((insn & MASK_CSR) >> SHIFT_CSR)
-#define GET_AQRL(insn)			((insn & MASK_AQRL) >> SHIFT_AQRL)
 
 #define GET_RS1(insn, regs)		(*REG_PTR(insn, SH_RS1, regs))
 #define GET_RS2(insn, regs)		(*REG_PTR(insn, SH_RS2, regs))
@@ -1382,17 +963,12 @@
 #define IMM_S(insn)			(((s32)(insn) >> 25 << 5) | \
 					 (s32)(((insn) >> 7) & 0x1f))
 
-#define IS_MASKED(insn)		(((insn >> SH_VM) & VM_MASK) == 0)
-#define GET_VD(insn)			((insn >> SH_VD) & VD_MASK)
-#define GET_VS2(insn)			((insn >> SH_VS2) & VS2_MASK)
-#define GET_VIEW(insn)			(((insn) >> SH_VIEW) & VIEW_MASK)
-#define GET_MEW(insn)			(((insn) >> SH_MEW) & 1)
-#define GET_VSEW(vtype)		(((vtype) >> SH_VSEW) & VSEW_MASK)
-#define GET_VLMUL(vtype)		((vtype) & VLMUL_MASK)
-#define GET_LEN(view)			(1UL << (view))
-#define GET_NF(insn)			(1 + ((insn >> 29) & 7))
-#define GET_VEMUL(vlmul, view, vsew)	((vlmul + view - vsew) & 7)
-#define GET_EMUL(vemul)		(1UL << ((vemul) >= 4 ? 0 : (vemul)))
+#define MASK_FUNCT3			0x7000
+#define MASK_RS1			0xf8000
+#define MASK_CSR			0xfff00000
+
+#define SHIFT_FUNCT3			12
+#define SHIFT_CSR			20
 
 #define CSRRW 1
 #define CSRRS 2

include/sbi/sbi_bitmap.h

@@ -130,17 +130,4 @@ static inline void bitmap_xor(unsigned long *dst, const unsigned long *src1,
 		__bitmap_xor(dst, src1, src2, nbits);
 }
 
-static inline int bitmap_weight(const unsigned long *src, int nbits)
-{
-	int i, res = 0;
-
-	for (i = 0; i < nbits / BITS_PER_LONG; i++)
-		res += sbi_popcount(src[i]);
-
-	if (nbits % BITS_PER_LONG)
-		res += sbi_popcount(src[i] & BITMAP_LAST_WORD_MASK(nbits));
-
-	return res;
-}
-
 #endif

include/sbi/sbi_bitops.h

@@ -14,8 +14,6 @@
 
 #define BITS_PER_LONG		(8 * __SIZEOF_LONG__)
 
-#define BITS_PER_LONG_LONG	64
-
 #define EXTRACT_FIELD(val, which) \
 	(((val) & (which)) / ((which) & ~((which)-1)))
 #define INSERT_FIELD(val, which, fieldval) \
@@ -30,13 +28,9 @@
 #define BIT_WORD_OFFSET(bit)	((bit) & (BITS_PER_LONG - 1))
 #define BIT_ALIGN(bit, align)	(((bit) + ((align) - 1)) & ~((align) - 1))
 
-#define BIT_ULL(nr)		(1ULL << (nr))
-
 #define GENMASK(h, l) \
 	(((~0UL) - (1UL << (l)) + 1) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
 
-#define GENMASK_ULL(h, l) \
-	(((~0ULL) - (1ULL << (l)) + 1) & (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
 /**
  * sbi_ffs - find first (less-significant) set bit in a long word.
  * @word: The word to search
@@ -125,22 +119,14 @@ static inline unsigned long sbi_fls(unsigned long word)
  */
 static inline unsigned long sbi_popcount(unsigned long word)
 {
-	unsigned long count;
+	unsigned long count = 0;
 
-#if BITS_PER_LONG == 64
-	count = word - ((word >> 1) & 0x5555555555555555ul);
-	count = (count & 0x3333333333333333ul) + ((count >> 2) & 0x3333333333333333ul);
-	count = (count + (count >> 4)) & 0x0F0F0F0F0F0F0F0Ful;
-	count = count + (count >> 8);
-	count = count + (count >> 16);
-	return (count + (count >> 32)) & 0x00000000000000FFul;
-#else
-	count = word - ((word >> 1) & 0x55555555);
-	count = (count & 0x33333333) + ((count >> 2) & 0x33333333);
-	count = (count + (count >> 4)) & 0x0F0F0F0F;
-	count = count + (count >> 8);
-	return (count + (count >> 16)) & 0x000000FF;
-#endif
+	while (word) {
+		word &= word - 1;
+		count++;
+	}
+
+	return count;
 }
 
 #define for_each_set_bit(bit, addr, size) \

include/sbi/sbi_dbtr.h

@@ -90,7 +90,7 @@ struct sbi_dbtr_hart_triggers_state {
 	}while (0);
 
 /** SBI shared mem messages layout */
-union sbi_dbtr_shmem_entry {
+struct sbi_dbtr_shmem_entry {
 	struct sbi_dbtr_data_msg data;
 	struct sbi_dbtr_id_msg id;
 };
@@ -115,7 +115,8 @@ int sbi_dbtr_uninstall_trig(unsigned long trig_idx_base,
 int sbi_dbtr_enable_trig(unsigned long trig_idx_base,
 			 unsigned long trig_idx_mask);
 int sbi_dbtr_update_trig(unsigned long smode,
-			 unsigned long trig_count);
+			 unsigned long trig_idx_base,
+			 unsigned long trig_idx_mask);
 int sbi_dbtr_disable_trig(unsigned long trig_idx_base,
 			  unsigned long trig_idx_mask);
 

include/sbi/sbi_domain.h

@@ -11,11 +11,9 @@
 #define __SBI_DOMAIN_H__
 
 #include <sbi/riscv_locks.h>
-#include <sbi/sbi_list.h>
 #include <sbi/sbi_types.h>
 #include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_domain_context.h>
-#include <sbi/sbi_domain_data.h>
 
 struct sbi_scratch;
 
@@ -160,15 +158,21 @@ struct sbi_domain_memregion {
 	unsigned long flags;
 };
 
+/** Maximum number of domains */
+#define SBI_DOMAIN_MAX_INDEX			32
+
 /** Representation of OpenSBI domain */
 struct sbi_domain {
-	/** Node in linked list of domains */
-	struct sbi_dlist node;
-	/** Internal state of per-domain data */
-	struct sbi_domain_data_priv data_priv;
-	/** Logical index of this domain */
+	/**
+	 * Logical index of this domain
+	 * Note: This set by sbi_domain_finalize() in the coldboot path
+	 */
 	u32 index;
-	/** HARTs assigned to this domain */
+	/**
+	 * HARTs assigned to this domain
+	 * Note: This set by sbi_domain_init() and sbi_domain_finalize()
+	 * in the coldboot path
+	 */
 	struct sbi_hartmask assigned_harts;
 	/** Spinlock for accessing assigned_harts */
 	spinlock_t assigned_harts_lock;
@@ -176,6 +180,8 @@ struct sbi_domain {
 	char name[64];
 	/** Possible HARTs in this domain */
 	const struct sbi_hartmask *possible_harts;
+	/** Contexts for possible HARTs indexed by hartindex */
+	struct sbi_context *hartindex_to_context_table[SBI_HARTMASK_MAX_BITS];
 	/** Array of memory regions terminated by a region with order zero */
 	struct sbi_domain_memregion *regions;
 	/** HART id of the HART booting this domain */
@@ -205,14 +211,18 @@ void sbi_update_hartindex_to_domain(u32 hartindex, struct sbi_domain *dom);
 
 /** Get pointer to sbi_domain for current HART */
 #define sbi_domain_thishart_ptr() \
-	sbi_hartindex_to_domain(current_hartindex())
+	sbi_hartindex_to_domain(sbi_hartid_to_hartindex(current_hartid()))
 
-/** Head of linked list of domains */
-extern struct sbi_dlist domain_list;
+/** Index to domain table */
+extern struct sbi_domain *domidx_to_domain_table[];
+
+/** Get pointer to sbi_domain from index */
+#define sbi_index_to_domain(__index) \
+	domidx_to_domain_table[__index]
 
 /** Iterate over each domain */
-#define sbi_domain_for_each(__d) \
-	sbi_list_for_each_entry(__d, &domain_list, node)
+#define sbi_domain_for_each(__i, __d) \
+	for ((__i) = 0; ((__d) = sbi_index_to_domain(__i)); (__i)++)
 
 /** Iterate over each memory region of a domain */
 #define sbi_domain_for_each_memregion(__d, __r) \
@@ -221,19 +231,20 @@ extern struct sbi_dlist domain_list;
 /**
  * Check whether given HART is assigned to specified domain
  * @param dom pointer to domain
- * @param hartindex the HART index
+ * @param hartid the HART ID
  * @return true if HART is assigned to domain otherwise false
  */
-bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartindex);
+bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid);
 
 /**
- * Get the assigned HART mask for given domain
+ * Get ulong assigned HART mask for given domain and HART base ID
  * @param dom pointer to domain
- * @param mask the output hartmask to fill
- * @return 0 on success and SBI_Exxx (< 0) on failure
+ * @param hbase the HART base ID
+ * @return ulong possible HART mask
+ * Note: the return ulong mask will be set to zero on failure.
  */
-int sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
-				     struct sbi_hartmask *mask);
+ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
+				       ulong hbase);
 
 /**
  * Initialize a domain memory region based on it's physical
@@ -293,6 +304,16 @@ void sbi_domain_dump_all(const char *suffix);
 int sbi_domain_register(struct sbi_domain *dom,
 			const struct sbi_hartmask *assign_mask);
 
+/**
+ * Add a memory region to the root domain
+ * @param reg pointer to the memory region to be added
+ *
+ * @return 0 on success
+ * @return SBI_EALREADY if memory region conflicts with the existing one
+ * @return SBI_EINVAL otherwise
+ */
+int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg);
+
 /**
  * Add a memory range with its flags to the root domain
  * @param addr start physical address of memory range
@@ -307,11 +328,8 @@ int sbi_domain_register(struct sbi_domain *dom,
 int sbi_domain_root_add_memrange(unsigned long addr, unsigned long size,
 			   unsigned long align, unsigned long region_flags);
 
-/** Startup non-root domains */
-int sbi_domain_startup(struct sbi_scratch *scratch, u32 cold_hartid);
-
-/** Finalize domain tables */
-int sbi_domain_finalize(struct sbi_scratch *scratch);
+/** Finalize domain tables and startup non-root domains */
+int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid);
 
 /** Initialize domains */
 int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid);

include/sbi/sbi_domain_context.h

@@ -8,8 +8,54 @@
 #define __SBI_DOMAIN_CONTEXT_H__
 
 #include <sbi/sbi_types.h>
+#include <sbi/sbi_trap.h>
+#include <sbi/sbi_domain.h>
 
-struct sbi_domain;
+/** Context representation for a hart within a domain */
+struct sbi_context {
+	/** Trap-related states such as GPRs, mepc, and mstatus */
+	struct sbi_trap_context trap_ctx;
+
+	/** Supervisor status register */
+	unsigned long sstatus;
+	/** Supervisor interrupt enable register */
+	unsigned long sie;
+	/** Supervisor trap vector base address register */
+	unsigned long stvec;
+	/** Supervisor scratch register for temporary storage */
+	unsigned long sscratch;
+	/** Supervisor exception program counter register */
+	unsigned long sepc;
+	/** Supervisor cause register */
+	unsigned long scause;
+	/** Supervisor trap value register */
+	unsigned long stval;
+	/** Supervisor interrupt pending register */
+	unsigned long sip;
+	/** Supervisor address translation and protection register */
+	unsigned long satp;
+	/** Counter-enable register */
+	unsigned long scounteren;
+	/** Supervisor environment configuration register */
+	unsigned long senvcfg;
+
+	/** Reference to the owning domain */
+	struct sbi_domain *dom;
+	/** Previous context (caller) to jump to during context exits */
+	struct sbi_context *prev_ctx;
+	/** Is context initialized and runnable */
+	bool initialized;
+};
+
+/** Get the context pointer for a given hart index and domain */
+#define sbi_hartindex_to_domain_context(__hartindex, __d) \
+	(__d)->hartindex_to_context_table[__hartindex]
+
+/** Macro to obtain the current hart's context pointer */
+#define sbi_domain_context_thishart_ptr()                  \
+	sbi_hartindex_to_domain_context(                   \
+		sbi_hartid_to_hartindex(current_hartid()), \
+		sbi_domain_thishart_ptr())
 
 /**
  * Enter a specific domain context synchronously
@@ -28,14 +74,4 @@ int sbi_domain_context_enter(struct sbi_domain *dom);
  */
 int sbi_domain_context_exit(void);
 
-/**
- * Initialize domain context support
- *
- * @return 0 on success and negative error code on failure
- */
-int sbi_domain_context_init(void);
-
-/* Deinitialize domain context support */
-void sbi_domain_context_deinit(void);
-
 #endif // __SBI_DOMAIN_CONTEXT_H__

include/sbi/sbi_domain_data.h

@@ -1,93 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2024 Ventana Micro Systems Inc.
- */
-
-#ifndef __SBI_DOMAIN_DATA_H__
-#define __SBI_DOMAIN_DATA_H__
-
-#include <sbi/sbi_types.h>
-#include <sbi/sbi_list.h>
-
-struct sbi_domain;
-
-/** Maximum domain data per-domain */
-#define SBI_DOMAIN_MAX_DATA_PTRS		32
-
-/** Representation of per-domain data */
-struct sbi_domain_data_priv {
-	/** Array of domain data pointers indexed by domain data identifier */
-	void *idx_to_data_ptr[SBI_DOMAIN_MAX_DATA_PTRS];
-};
-
-/** Representation of a domain data */
-struct sbi_domain_data {
-	/**
-	 * Head is used for maintaining data list
-	 *
-	 * Note: initialized by domain framework
-	 */
-	struct sbi_dlist head;
-	/**
-	 * Identifier which used to locate per-domain data
-	 *
-	 * Note: initialized by domain framework
-	 */
-	unsigned long data_idx;
-	/** Size of per-domain data */
-	unsigned long data_size;
-	/** Optional callback to setup domain data */
-	int (*data_setup)(struct sbi_domain *dom,
-			  struct sbi_domain_data *data, void *data_ptr);
-	/** Optional callback to cleanup domain data */
-	void (*data_cleanup)(struct sbi_domain *dom,
-			     struct sbi_domain_data *data, void *data_ptr);
-};
-
-/**
- * Get per-domain data pointer for a given domain
- * @param dom pointer to domain
- * @param data pointer to domain data
- *
- * @return per-domain data pointer
- */
-void *sbi_domain_data_ptr(struct sbi_domain *dom, struct sbi_domain_data *data);
-
-/**
- * Setup all domain data for a domain
- * @param dom pointer to domain
- *
- * @return 0 on success and negative error code on failure
- *
- * Note: This function is used internally within domain framework.
- */
-int sbi_domain_setup_data(struct sbi_domain *dom);
-
-/**
- * Cleanup all domain data for a domain
- * @param dom pointer to domain
- *
- * Note: This function is used internally within domain framework.
- */
-void sbi_domain_cleanup_data(struct sbi_domain *dom);
-
-/**
- * Register a domain data
- * @param hndl pointer to domain data
- *
- * @return 0 on success and negative error code on failure
- *
- * Note: This function must be used only in cold boot path.
- */
-int sbi_domain_register_data(struct sbi_domain_data *data);
-
-/**
- * Unregister a domain data
- * @param hndl pointer to domain data
- *
- * Note: This function must be used only in cold boot path.
- */
-void sbi_domain_unregister_data(struct sbi_domain_data *data);
-
-#endif

include/sbi/sbi_double_trap.h

@@ -1,20 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2025 Rivos Inc.
- *
- * Authors:
- *   Clément Léger <cleger@rivosinc.com>
- */
-
-#ifndef __SBI_DOUBLE_TRAP_H__
-#define __SBI_DOUBLE_TRAP_H__
-
-#include <sbi/sbi_types.h>
-#include <sbi/sbi_trap.h>
-
-int sbi_double_trap_handler(struct sbi_trap_context *tcntx);
-
-void sbi_double_trap_init(struct sbi_scratch *scratch);
-
-#endif

include/sbi/sbi_ecall.h

@@ -13,7 +13,7 @@
 #include <sbi/sbi_types.h>
 #include <sbi/sbi_list.h>
 
-#define SBI_ECALL_VERSION_MAJOR		3
+#define SBI_ECALL_VERSION_MAJOR		2
 #define SBI_ECALL_VERSION_MINOR		0
 #define SBI_OPENSBI_IMPID		1
 
@@ -30,8 +30,6 @@ struct sbi_ecall_return {
 struct sbi_ecall_extension {
 	/* head is used by the extension list */
 	struct sbi_dlist head;
-	/* short name of the extension */
-	char name[8];
 	/*
 	 * extid_start and extid_end specify the range for this extension. As
 	 * the initial range may be wider than the valid runtime range, the
@@ -40,8 +38,6 @@ struct sbi_ecall_extension {
 	 */
 	unsigned long extid_start;
 	unsigned long extid_end;
-	/* flag showing whether given extension is experimental or not */
-	bool experimental;
 	/*
 	 * register_extensions
 	 *
@@ -87,8 +83,6 @@ void sbi_ecall_set_impid(unsigned long impid);
 
 struct sbi_ecall_extension *sbi_ecall_find_extension(unsigned long extid);
 
-void sbi_ecall_get_extensions_str(char *exts_str, int exts_str_size, bool experimental);
-
 int sbi_ecall_register_extension(struct sbi_ecall_extension *ext);
 
 void sbi_ecall_unregister_extension(struct sbi_ecall_extension *ext);

include/sbi/sbi_ecall_interface.h

@@ -12,8 +12,6 @@
 
 /* clang-format off */
 
-#include <sbi/sbi_types.h>
-
 /* SBI Extension IDs */
 #define SBI_EXT_0_1_SET_TIMER			0x0
 #define SBI_EXT_0_1_CONSOLE_PUTCHAR		0x1
@@ -37,7 +35,6 @@
 #define SBI_EXT_DBTR				0x44425452
 #define SBI_EXT_SSE				0x535345
 #define SBI_EXT_FWFT				0x46574654
-#define SBI_EXT_MPXY				0x4D505859
 
 /* SBI function IDs for BASE extension*/
 #define SBI_EXT_BASE_GET_SPEC_VERSION		0x0
@@ -110,7 +107,6 @@
 #define SBI_EXT_PMU_COUNTER_FW_READ	0x5
 #define SBI_EXT_PMU_COUNTER_FW_READ_HI	0x6
 #define SBI_EXT_PMU_SNAPSHOT_SET_SHMEM	0x7
-#define SBI_EXT_PMU_EVENT_GET_INFO		0x8
 
 /* SBI function IDs for DBTR extension */
 #define SBI_EXT_DBTR_NUM_TRIGGERS	0x0
@@ -132,8 +128,7 @@ enum sbi_fwft_feature_t {
 	SBI_FWFT_SHADOW_STACK			= 0x2,
 	SBI_FWFT_DOUBLE_TRAP			= 0x3,
 	SBI_FWFT_PTE_AD_HW_UPDATING		= 0x4,
-	SBI_FWFT_POINTER_MASKING_PMLEN		= 0x5,
-	SBI_FWFT_LOCAL_RESERVED_START		= 0x6,
+	SBI_FWFT_LOCAL_RESERVED_START		= 0x5,
 	SBI_FWFT_LOCAL_RESERVED_END		= 0x3fffffff,
 	SBI_FWFT_LOCAL_PLATFORM_START		= 0x40000000,
 	SBI_FWFT_LOCAL_PLATFORM_END		= 0x7fffffff,
@@ -249,7 +244,6 @@ enum sbi_pmu_event_type_id {
 	SBI_PMU_EVENT_TYPE_HW				= 0x0,
 	SBI_PMU_EVENT_TYPE_HW_CACHE			= 0x1,
 	SBI_PMU_EVENT_TYPE_HW_RAW			= 0x2,
-	SBI_PMU_EVENT_TYPE_HW_RAW_V2			= 0x3,
 	SBI_PMU_EVENT_TYPE_FW				= 0xf,
 	SBI_PMU_EVENT_TYPE_MAX,
 };
@@ -260,19 +254,12 @@ enum sbi_pmu_ctr_type {
 	SBI_PMU_CTR_TYPE_FW,
 };
 
-struct sbi_pmu_event_info {
-	uint32_t event_idx;
-	uint32_t output;
-	uint64_t event_data;
-};
-
 /* Helper macros to decode event idx */
 #define SBI_PMU_EVENT_IDX_MASK 0xFFFFF
 #define SBI_PMU_EVENT_IDX_TYPE_OFFSET 16
 #define SBI_PMU_EVENT_IDX_TYPE_MASK (0xF << SBI_PMU_EVENT_IDX_TYPE_OFFSET)
 #define SBI_PMU_EVENT_IDX_CODE_MASK 0xFFFF
 #define SBI_PMU_EVENT_RAW_IDX 0x20000
-#define SBI_PMU_EVENT_RAW_V2_IDX 0x30000
 
 #define SBI_PMU_EVENT_IDX_INVALID 0xFFFFFFFF
 
@@ -354,8 +341,6 @@ enum sbi_cppc_reg_id {
 #define SBI_EXT_SSE_DISABLE		0x00000005
 #define SBI_EXT_SSE_COMPLETE		0x00000006
 #define SBI_EXT_SSE_INJECT		0x00000007
-#define SBI_EXT_SSE_HART_UNMASK		0x00000008
-#define SBI_EXT_SSE_HART_MASK		0x00000009
 
 /* SBI SSE Event Attributes. */
 enum sbi_sse_attr_id {
@@ -380,12 +365,10 @@ enum sbi_sse_attr_id {
 
 #define SBI_SSE_ATTR_CONFIG_ONESHOT	(1 << 0)
 
-#define SBI_SSE_ATTR_INTERRUPTED_FLAGS_SSTATUS_SPP	BIT(0)
-#define SBI_SSE_ATTR_INTERRUPTED_FLAGS_SSTATUS_SPIE	BIT(1)
+#define SBI_SSE_ATTR_INTERRUPTED_FLAGS_STATUS_SPP	BIT(0)
+#define SBI_SSE_ATTR_INTERRUPTED_FLAGS_STATUS_SPIE	BIT(1)
 #define SBI_SSE_ATTR_INTERRUPTED_FLAGS_HSTATUS_SPV	BIT(2)
 #define SBI_SSE_ATTR_INTERRUPTED_FLAGS_HSTATUS_SPVP	BIT(3)
-#define SBI_SSE_ATTR_INTERRUPTED_FLAGS_SSTATUS_SPELP	BIT(4)
-#define SBI_SSE_ATTR_INTERRUPTED_FLAGS_SSTATUS_SDT	BIT(5)
 
 enum sbi_sse_state {
 	SBI_SSE_STATE_UNUSED		= 0,
@@ -395,77 +378,38 @@ enum sbi_sse_state {
 };
 
 /* SBI SSE Event IDs. */
-/* Range 0x00000000 - 0x0000ffff */
-#define SBI_SSE_EVENT_LOCAL_HIGH_PRIO_RAS	0x00000000
-#define SBI_SSE_EVENT_LOCAL_DOUBLE_TRAP		0x00000001
-#define SBI_SSE_EVENT_LOCAL_RESERVED_0_START	0x00000002
-#define SBI_SSE_EVENT_LOCAL_RESERVED_0_END	0x00003fff
+#define SBI_SSE_EVENT_LOCAL_RAS			0x00000000
 #define SBI_SSE_EVENT_LOCAL_PLAT_0_START	0x00004000
 #define SBI_SSE_EVENT_LOCAL_PLAT_0_END		0x00007fff
+#define SBI_SSE_EVENT_GLOBAL_RAS		0x00008000
+#define SBI_SSE_EVENT_GLOBAL_PLAT_0_START	0x00004000
+#define SBI_SSE_EVENT_GLOBAL_PLAT_0_END		0x00007fff
 
-#define SBI_SSE_EVENT_GLOBAL_HIGH_PRIO_RAS	0x00008000
-#define SBI_SSE_EVENT_GLOBAL_RESERVED_0_START	0x00008001
-#define SBI_SSE_EVENT_GLOBAL_RESERVED_0_END	0x0000bfff
-#define SBI_SSE_EVENT_GLOBAL_PLAT_0_START	0x0000c000
-#define SBI_SSE_EVENT_GLOBAL_PLAT_0_END		0x0000ffff
-
-/* Range 0x00010000 - 0x0001ffff */
-#define SBI_SSE_EVENT_LOCAL_PMU_OVERFLOW	0x00010000
-#define SBI_SSE_EVENT_LOCAL_RESERVED_1_START	0x00010001
-#define SBI_SSE_EVENT_LOCAL_RESERVED_1_END	0x00013fff
+#define SBI_SSE_EVENT_LOCAL_PMU			0x00010000
 #define SBI_SSE_EVENT_LOCAL_PLAT_1_START	0x00014000
 #define SBI_SSE_EVENT_LOCAL_PLAT_1_END		0x00017fff
-
-#define SBI_SSE_EVENT_GLOBAL_RESERVED_1_START	0x00018000
-#define SBI_SSE_EVENT_GLOBAL_RESERVED_1_END	0x0001bfff
 #define SBI_SSE_EVENT_GLOBAL_PLAT_1_START	0x0001c000
 #define SBI_SSE_EVENT_GLOBAL_PLAT_1_END		0x0001ffff
 
-/* Range 0x00100000 - 0x0010ffff */
-#define SBI_SSE_EVENT_LOCAL_LOW_PRIO_RAS	0x00100000
-#define SBI_SSE_EVENT_LOCAL_RESERVED_2_START	0x00100001
-#define SBI_SSE_EVENT_LOCAL_RESERVED_2_END	0x00103fff
-#define SBI_SSE_EVENT_LOCAL_PLAT_2_START	0x00104000
-#define SBI_SSE_EVENT_LOCAL_PLAT_2_END		0x00107fff
+#define SBI_SSE_EVENT_LOCAL_PLAT_2_START	0x00024000
+#define SBI_SSE_EVENT_LOCAL_PLAT_2_END		0x00027fff
+#define SBI_SSE_EVENT_GLOBAL_PLAT_2_START	0x0002c000
+#define SBI_SSE_EVENT_GLOBAL_PLAT_2_END		0x0002ffff
 
-#define SBI_SSE_EVENT_GLOBAL_LOW_PRIO_RAS	0x00108000
-#define SBI_SSE_EVENT_GLOBAL_RESERVED_2_START	0x00108001
-#define SBI_SSE_EVENT_GLOBAL_RESERVED_2_END	0x0010bfff
-#define SBI_SSE_EVENT_GLOBAL_PLAT_2_START	0x0010c000
-#define SBI_SSE_EVENT_GLOBAL_PLAT_2_END		0x0010ffff
-
-/* Range 0xffff0000 - 0xffffffff */
 #define SBI_SSE_EVENT_LOCAL_SOFTWARE		0xffff0000
-#define SBI_SSE_EVENT_LOCAL_RESERVED_3_START	0xffff0001
-#define SBI_SSE_EVENT_LOCAL_RESERVED_3_END	0xffff3fff
 #define SBI_SSE_EVENT_LOCAL_PLAT_3_START	0xffff4000
 #define SBI_SSE_EVENT_LOCAL_PLAT_3_END		0xffff7fff
-
 #define SBI_SSE_EVENT_GLOBAL_SOFTWARE		0xffff8000
-#define SBI_SSE_EVENT_GLOBAL_RESERVED_3_START	0xffff8001
-#define SBI_SSE_EVENT_GLOBAL_RESERVED_3_END	0xffffbfff
 #define SBI_SSE_EVENT_GLOBAL_PLAT_3_START	0xffffc000
 #define SBI_SSE_EVENT_GLOBAL_PLAT_3_END		0xffffffff
 
-#define SBI_SSE_EVENT_GLOBAL_BIT		BIT(15)
-#define SBI_SSE_EVENT_PLATFORM_BIT		BIT(14)
-
-/* SBI function IDs for MPXY extension */
-#define SBI_EXT_MPXY_GET_SHMEM_SIZE		0x0
-#define SBI_EXT_MPXY_SET_SHMEM			0x1
-#define SBI_EXT_MPXY_GET_CHANNEL_IDS		0x2
-#define SBI_EXT_MPXY_READ_ATTRS			0x3
-#define SBI_EXT_MPXY_WRITE_ATTRS		0x4
-#define SBI_EXT_MPXY_SEND_MSG_WITH_RESP		0x5
-#define SBI_EXT_MPXY_SEND_MSG_WITHOUT_RESP	0x6
-#define SBI_EXT_MPXY_GET_NOTIFICATION_EVENTS	0x7
+#define SBI_SSE_EVENT_GLOBAL_BIT		(1 << 15)
+#define SBI_SSE_EVENT_PLATFORM_BIT		(1 << 14)
 
 /* SBI base specification related macros */
 #define SBI_SPEC_VERSION_MAJOR_OFFSET		24
 #define SBI_SPEC_VERSION_MAJOR_MASK		0x7f
 #define SBI_SPEC_VERSION_MINOR_MASK		0xffffff
-#define SBI_EXT_EXPERIMENTAL_START		0x08000000
-#define SBI_EXT_EXPERIMENTAL_END		0x08FFFFFF
 #define SBI_EXT_VENDOR_START			0x09000000
 #define SBI_EXT_VENDOR_END			0x09FFFFFF
 #define SBI_EXT_FIRMWARE_START			0x0A000000
@@ -484,11 +428,8 @@ enum sbi_sse_state {
 #define SBI_ERR_NO_SHMEM			-9
 #define SBI_ERR_INVALID_STATE			-10
 #define SBI_ERR_BAD_RANGE			-11
-#define SBI_ERR_TIMEOUT				-12
-#define SBI_ERR_IO				-13
-#define SBI_ERR_DENIED_LOCKED			-14
 
-#define SBI_LAST_ERR				SBI_ERR_DENIED_LOCKED
+#define SBI_LAST_ERR				SBI_ERR_BAD_RANGE
 
 /* clang-format on */
 

include/sbi/sbi_error.h

@@ -26,18 +26,16 @@
 #define SBI_ENO_SHMEM		SBI_ERR_NO_SHMEM
 #define SBI_EINVALID_STATE	SBI_ERR_INVALID_STATE
 #define SBI_EBAD_RANGE		SBI_ERR_BAD_RANGE
-#define SBI_ETIMEOUT		SBI_ERR_TIMEOUT
-#define SBI_ETIMEDOUT		SBI_ERR_TIMEOUT
-#define SBI_EIO			SBI_ERR_IO
-#define SBI_EDENIED_LOCKED	SBI_ERR_DENIED_LOCKED
 
 #define SBI_ENODEV		-1000
 #define SBI_ENOSYS		-1001
-#define SBI_EILL		-1002
-#define SBI_ENOSPC		-1003
-#define SBI_ENOMEM		-1004
-#define SBI_EUNKNOWN		-1005
-#define SBI_ENOENT		-1006
+#define SBI_ETIMEDOUT		-1002
+#define SBI_EIO			-1003
+#define SBI_EILL		-1004
+#define SBI_ENOSPC		-1005
+#define SBI_ENOMEM		-1006
+#define SBI_EUNKNOWN		-1007
+#define SBI_ENOENT		-1008
 
 /* clang-format on */
 

include/sbi/sbi_hart.h

@@ -31,7 +31,7 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_SMAIA = 0,
 	/** HART has Smepmp */
 	SBI_HART_EXT_SMEPMP,
-	/** HART has Smstateen extension **/
+	/** HART has Smstateen CSR **/
 	SBI_HART_EXT_SMSTATEEN,
 	/** Hart has Sscofpmt extension */
 	SBI_HART_EXT_SSCOFPMF,
@@ -67,20 +67,6 @@ enum sbi_hart_extensions {
 	SBI_HART_EXT_SVADE,
 	/** Hart has Svadu extension */
 	SBI_HART_EXT_SVADU,
-	/** Hart has Smnpm extension */
-	SBI_HART_EXT_SMNPM,
-	/** HART has zicfilp extension */
-	SBI_HART_EXT_ZICFILP,
-	/** HART has zicfiss extension */
-	SBI_HART_EXT_ZICFISS,
-	/** Hart has Ssdbltrp extension */
-	SBI_HART_EXT_SSDBLTRP,
-	/** HART has CTR M-mode CSRs */
-	SBI_HART_EXT_SMCTR,
-	/** HART has CTR S-mode CSRs */
-	SBI_HART_EXT_SSCTR,
-	/** HART has Ssstateen extension **/
-	SBI_HART_EXT_SSSTATEEN,
 
 	/** Maximum index of Hart extension */
 	SBI_HART_EXT_MAX,
@@ -93,14 +79,6 @@ struct sbi_hart_ext_data {
 
 extern const struct sbi_hart_ext_data sbi_hart_ext[];
 
-/** CSRs should be detected by access and trapping */
-enum sbi_hart_csrs {
-	SBI_HART_CSR_CYCLE = 0,
-	SBI_HART_CSR_TIME,
-	SBI_HART_CSR_INSTRET,
-	SBI_HART_CSR_MAX,
-};
-
 /*
  * Smepmp enforces access boundaries between M-mode and
  * S/U-mode. When it is enabled, the PMPs are programmed
@@ -120,7 +98,6 @@ struct sbi_hart_features {
 	bool detected;
 	int priv_version;
 	unsigned long extensions[BITS_TO_LONGS(SBI_HART_EXT_MAX)];
-	unsigned long csrs[BITS_TO_LONGS(SBI_HART_CSR_MAX)];
 	unsigned int pmp_count;
 	unsigned int pmp_addr_bits;
 	unsigned int pmp_log2gran;
@@ -159,7 +136,6 @@ bool sbi_hart_has_extension(struct sbi_scratch *scratch,
 			    enum sbi_hart_extensions ext);
 void sbi_hart_get_extensions_str(struct sbi_scratch *scratch,
 				 char *extension_str, int nestr);
-bool sbi_hart_has_csr(struct sbi_scratch *scratch, enum sbi_hart_csrs csr);
 
 void __attribute__((noreturn)) sbi_hart_hang(void);
 

include/sbi/sbi_hartmask.h

@@ -127,18 +127,6 @@ static inline void sbi_hartmask_clear_all(struct sbi_hartmask *dstp)
 	bitmap_zero(sbi_hartmask_bits(dstp), SBI_HARTMASK_MAX_BITS);
 }
 
-/**
- * *dstp = *srcp
- * @param dstp the hartmask destination
- * @param srcp the hartmask source
- */
-static inline void sbi_hartmask_copy(struct sbi_hartmask *dstp,
-				     const struct sbi_hartmask *srcp)
-{
-	bitmap_copy(sbi_hartmask_bits(dstp), sbi_hartmask_bits(srcp),
-		    SBI_HARTMASK_MAX_BITS);
-}
-
 /**
  * *dstp = *src1p & *src2p
  * @param dstp the hartmask result
@@ -181,17 +169,6 @@ static inline void sbi_hartmask_xor(struct sbi_hartmask *dstp,
 		   sbi_hartmask_bits(src2p), SBI_HARTMASK_MAX_BITS);
 }
 
-/**
- * Count of bits in *srcp
- * @param srcp the hartmask to count bits in
- *
- * Return: count of bits set in *srcp
- */
-static inline int sbi_hartmask_weight(const struct sbi_hartmask *srcp)
-{
-	return bitmap_weight(sbi_hartmask_bits(srcp), SBI_HARTMASK_MAX_BITS);
-}
-
 /**
  * Iterate over each HART index in hartmask
  * __i hart index

include/sbi/sbi_hsm.h

@@ -10,7 +10,6 @@
 #ifndef __SBI_HSM_H__
 #define __SBI_HSM_H__
 
-#include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_types.h>
 
 /** Hart state managment device */
@@ -40,12 +39,8 @@ struct sbi_hsm_device {
 	 *
 	 * For successful non-retentive suspend, the hart will resume from
 	 * the warm boot entry point.
-	 *
-	 * NOTE: mmode_resume_addr(resume address) is optional hence it
-	 * may or may not be honored by the platform. If its not honored
-	 * then platform must ensure to resume from the warmboot address.
 	 */
-	int (*hart_suspend)(u32 suspend_type, ulong mmode_resume_addr);
+	int (*hart_suspend)(u32 suspend_type);
 
 	/**
 	 * Perform platform-specific actions to resume from a suspended state.
@@ -63,7 +58,7 @@ const struct sbi_hsm_device *sbi_hsm_get_device(void);
 
 void sbi_hsm_set_device(const struct sbi_hsm_device *dev);
 
-int sbi_hsm_init(struct sbi_scratch *scratch, bool cold_boot);
+int sbi_hsm_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
 void __noreturn sbi_hsm_exit(struct sbi_scratch *scratch);
 
 int sbi_hsm_hart_start(struct sbi_scratch *scratch,
@@ -77,10 +72,10 @@ int sbi_hsm_hart_suspend(struct sbi_scratch *scratch, u32 suspend_type,
 			 ulong raddr, ulong rmode, ulong arg1);
 bool sbi_hsm_hart_change_state(struct sbi_scratch *scratch, long oldstate,
 			       long newstate);
-int __sbi_hsm_hart_get_state(u32 hartindex);
+int __sbi_hsm_hart_get_state(u32 hartid);
 int sbi_hsm_hart_get_state(const struct sbi_domain *dom, u32 hartid);
 int sbi_hsm_hart_interruptible_mask(const struct sbi_domain *dom,
-				    struct sbi_hartmask *mask);
+				    ulong hbase, ulong *out_hmask);
 void __sbi_hsm_suspend_non_ret_save(struct sbi_scratch *scratch);
 void __noreturn sbi_hsm_hart_start_finish(struct sbi_scratch *scratch,
 					  u32 hartid);

include/sbi/sbi_illegal_atomic.h

@@ -1,17 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2025 MIPS
- *
- */
-
-#ifndef __SBI_ILLEGAL_ATOMIC_H__
-#define __SBI_ILLEGAL_ATOMIC_H__
-
-#include <sbi/sbi_types.h>
-
-struct sbi_trap_regs;
-
-int sbi_illegal_atomic(ulong insn, struct sbi_trap_regs *regs);
-
-#endif

include/sbi/sbi_illegal_insn.h

@@ -14,10 +14,6 @@
 
 struct sbi_trap_context;
 
-typedef int (*illegal_insn_func)(ulong insn, struct sbi_trap_regs *regs);
-
-int truly_illegal_insn(ulong insn, struct sbi_trap_regs *regs);
-
 int sbi_illegal_insn_handler(struct sbi_trap_context *tcntx);
 
 #endif

include/sbi/sbi_init.h

@@ -16,11 +16,9 @@ struct sbi_scratch;
 
 void __noreturn sbi_init(struct sbi_scratch *scratch);
 
-void sbi_revert_entry_count(struct sbi_scratch *scratch);
+unsigned long sbi_entry_count(u32 hartid);
 
-unsigned long sbi_entry_count(u32 hartindex);
-
-unsigned long sbi_init_count(u32 hartindex);
+unsigned long sbi_init_count(u32 hartid);
 
 void __noreturn sbi_exit(struct sbi_scratch *scratch);
 

include/sbi/sbi_ipi.h

@@ -26,8 +26,8 @@ struct sbi_ipi_device {
 	/** Send IPI to a target HART index */
 	void (*ipi_send)(u32 hart_index);
 
-	/** Clear IPI for the current hart */
-	void (*ipi_clear)(void);
+	/** Clear IPI for a target HART index */
+	void (*ipi_clear)(u32 hart_index);
 };
 
 enum sbi_ipi_update_type {
@@ -87,7 +87,7 @@ void sbi_ipi_process(void);
 
 int sbi_ipi_raw_send(u32 hartindex);
 
-void sbi_ipi_raw_clear(void);
+void sbi_ipi_raw_clear(u32 hartindex);
 
 const struct sbi_ipi_device *sbi_ipi_get_device(void);
 

include/sbi/sbi_irqchip.h

@@ -10,22 +10,19 @@
 #ifndef __SBI_IRQCHIP_H__
 #define __SBI_IRQCHIP_H__
 
-#include <sbi/sbi_list.h>
 #include <sbi/sbi_types.h>
 
 struct sbi_scratch;
 
-/** irqchip hardware device */
-struct sbi_irqchip_device {
-	/** Node in the list of irqchip devices */
-	struct sbi_dlist node;
-
-	/** Initialize per-hart state for the current hart */
-	int (*warm_init)(struct sbi_irqchip_device *dev);
-
-	/** Handle an IRQ from this irqchip */
-	int (*irq_handle)(void);
-};
+/**
+ * Set external interrupt handling function
+ *
+ * This function is called by OpenSBI platform code to set a handler for
+ * external interrupts
+ *
+ * @param fn function pointer for handling external irqs
+ */
+void sbi_irqchip_set_irqfn(int (*fn)(void));
 
 /**
  * Process external interrupts
@@ -37,9 +34,6 @@ struct sbi_irqchip_device {
  */
 int sbi_irqchip_process(void);
 
-/** Register an irqchip device to receive callbacks */
-void sbi_irqchip_add_device(struct sbi_irqchip_device *dev);
-
 /** Initialize interrupt controllers */
 int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot);
 

include/sbi/sbi_mpxy.h

@@ -1,185 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2024 Ventana Micro Systems Inc.
- *
- * Authors:
- *   Rahul Pathak <rpathak@ventanamicro.com>
- */
-
-#ifndef __SBI_MPXY_H__
-#define __SBI_MPXY_H__
-
-#include <sbi/sbi_list.h>
-
-struct sbi_scratch;
-
-#define SBI_MPXY_MSGPROTO_VERSION(Major, Minor) ((Major << 16) | Minor)
-
-enum sbi_mpxy_attr_id {
-	/* Standard channel attributes managed by MPXY framework */
-	SBI_MPXY_ATTR_MSG_PROT_ID		= 0x00000000,
-	SBI_MPXY_ATTR_MSG_PROT_VER		= 0x00000001,
-	SBI_MPXY_ATTR_MSG_MAX_LEN		= 0x00000002,
-	SBI_MPXY_ATTR_MSG_SEND_TIMEOUT		= 0x00000003,
-	SBI_MPXY_ATTR_MSG_COMPLETION_TIMEOUT	= 0x00000004,
-	SBI_MPXY_ATTR_CHANNEL_CAPABILITY	= 0x00000005,
-	SBI_MPXY_ATTR_SSE_EVENT_ID		= 0x00000006,
-	SBI_MPXY_ATTR_MSI_CONTROL		= 0x00000007,
-	SBI_MPXY_ATTR_MSI_ADDR_LO		= 0x00000008,
-	SBI_MPXY_ATTR_MSI_ADDR_HI		= 0x00000009,
-	SBI_MPXY_ATTR_MSI_DATA			= 0x0000000A,
-	SBI_MPXY_ATTR_EVENTS_STATE_CONTROL	= 0x0000000B,
-	SBI_MPXY_ATTR_STD_ATTR_MAX_IDX,
-	/* Message protocol specific attributes, managed by
-	 * message protocol driver */
-	SBI_MPXY_ATTR_MSGPROTO_ATTR_START	= 0x80000000,
-	SBI_MPXY_ATTR_MSGPROTO_ATTR_END		= 0xffffffff
-};
-
-/**
- * SBI MPXY Message Protocol IDs
- */
-enum sbi_mpxy_msgproto_id {
-	SBI_MPXY_MSGPROTO_RPMI_ID = 0x00000000,
-	SBI_MPXY_MSGPROTO_MAX_IDX,
-	/** Vendor specific message protocol IDs */
-	SBI_MPXY_MSGPROTO_VENDOR_START	= 0x80000000,
-	SBI_MPXY_MSGPROTO_VENDOR_END	= 0xffffffff
-};
-
-enum SBI_EXT_MPXY_SHMEM_FLAGS {
-	SBI_EXT_MPXY_SHMEM_FLAG_OVERWRITE		= 0b00,
-	SBI_EXT_MPXY_SHMEM_FLAG_OVERWRITE_RETURN	= 0b01,
-	SBI_EXT_MPXY_SHMEM_FLAG_MAX_IDX
-};
-
-struct sbi_mpxy_msi_info {
-	/* MSI target address low 32-bit */
-	u32 msi_addr_lo;
-	/* MSI target address high 32-bit */
-	u32 msi_addr_hi;
-	/* MSI data */
-	u32 msi_data;
-};
-
-/**
- * Channel attributes.
- * NOTE: The sequence of attribute fields are as per the
- * defined sequence in the attribute table in spec(or as
- * per the enum sbi_mpxy_attr_id).
- */
-struct sbi_mpxy_channel_attrs {
-	/* Message protocol ID */
-	u32 msg_proto_id;
-	/* Message protocol Version */
-	u32 msg_proto_version;
-	/* Message protocol maximum message data length(bytes) */
-	u32 msg_data_maxlen;
-	/* Message protocol message send timeout
-	 * in microseconds */
-	u32 msg_send_timeout;
-	/* Message protocol message response timeout in
-	 * microseconds. Its the aggregate of msg_send_timeout
-	 * and the timeout in receiving the response */
-	u32 msg_completion_timeout;
-	/* Bit array for channel capabilities */
-	u32 capability;
-	u32 sse_event_id;
-	u32 msi_control;
-	struct sbi_mpxy_msi_info msi_info;
-	/* Events State Control */
-	u32 eventsstate_ctrl;
-};
-
-/** A Message proxy channel accessible through SBI interface */
-struct sbi_mpxy_channel {
-	/** List head to a set of channels */
-	struct sbi_dlist head;
-	u32 channel_id;
-	struct sbi_mpxy_channel_attrs attrs;
-
-	/**
-	 * Read message protocol attributes
-	 * NOTE: inmem requires little-endian byte-ordering
-	 */
-	int (*read_attributes)(struct sbi_mpxy_channel *channel,
-				u32 *outmem,
-				u32 base_attr_id,
-				u32 attr_count);
-
-	/**
-	 * Write message protocol attributes
-	 * NOTE: outmem requires little-endian byte-ordering
-	 */
-	int (*write_attributes)(struct sbi_mpxy_channel *channel,
-				u32 *inmem,
-				u32 base_attr_id,
-				u32 attr_count);
-	/**
-	 * Send a message and wait for response
-	 * NOTE: msgbuf requires little-endian byte-ordering
-	 */
-	int (*send_message_with_response)(struct sbi_mpxy_channel *channel,
-			    u32 msg_id, void *msgbuf, u32 msg_len,
-			    void *respbuf, u32 resp_max_len,
-			    unsigned long *resp_len);
-
-	/** Send message without response */
-	int (*send_message_without_response)(struct sbi_mpxy_channel *channel,
-			    u32 msg_id, void *msgbuf, u32 msg_len);
-
-	/**
-	 * Get notifications events if supported on a channel
-	 * NOTE: eventsbuf requires little-endian byte-ordering
-	 */
-	int (*get_notification_events)(struct sbi_mpxy_channel *channel,
-					void *eventsbuf, u32 bufsize,
-					unsigned long *events_len);
-
-	/**
-	 * Callback to enable the events state reporting
-	 * in the message protocol implementation
-	 */
-	void (*switch_eventsstate)(u32 enable);
-};
-
-/** Register a Message proxy channel */
-int sbi_mpxy_register_channel(struct sbi_mpxy_channel *channel);
-
-/** Initialize Message proxy subsystem */
-int sbi_mpxy_init(struct sbi_scratch *scratch);
-
-/** Check if some Message proxy channel is available */
-bool sbi_mpxy_channel_available(void);
-
-/** Get message proxy shared memory size */
-unsigned long sbi_mpxy_get_shmem_size(void);
-
-/** Set message proxy shared memory on the calling HART */
-int sbi_mpxy_set_shmem(unsigned long shmem_phys_lo,
-		       unsigned long shmem_phys_hi,
-		       unsigned long flags);
-
-/** Get channel IDs list */
-int sbi_mpxy_get_channel_ids(u32 start_index);
-
-/** Read MPXY channel attributes */
-int sbi_mpxy_read_attrs(u32 channel_id, u32 base_attr_id, u32 attr_count);
-
-/** Write MPXY channel attributes */
-int sbi_mpxy_write_attrs(u32 channel_id, u32 base_attr_id, u32 attr_count);
-
-/**
- * Send a message over a MPXY channel.
- * In case if response is not expected, resp_data_len will be NULL.
- */
-int sbi_mpxy_send_message(u32 channel_id, u8 msg_id,
-					unsigned long msg_data_len,
-					unsigned long *resp_data_len);
-
-/** Get Message proxy notification events */
-int sbi_mpxy_get_notification_events(u32 channel_id,
-					unsigned long *events_len);
-
-#endif

include/sbi/sbi_platform.h

@@ -39,8 +39,6 @@
 #define SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET (0x60 + __SIZEOF_POINTER__)
 /** Offset of hart_index2id in struct sbi_platform */
 #define SBI_PLATFORM_HART_INDEX2ID_OFFSET (0x60 + (__SIZEOF_POINTER__ * 2))
-/** Offset of cbom_block_size in struct sbi_platform */
-#define SBI_PLATFORM_CBOM_BLOCK_SIZE_OFFSET (0x60 + (__SIZEOF_POINTER__ * 3))
 
 #define SBI_PLATFORM_TLB_RANGE_FLUSH_LIMIT_DEFAULT		(1UL << 12)
 
@@ -113,11 +111,15 @@ struct sbi_platform_operations {
 	/** Get platform specific mhpmevent value */
 	uint64_t (*pmu_xlate_to_mhpmevent)(uint32_t event_idx, uint64_t data);
 
-	/** Initialize the platform interrupt controller during cold boot */
-	int (*irqchip_init)(void);
+	/** Initialize the platform interrupt controller for current HART */
+	int (*irqchip_init)(bool cold_boot);
+	/** Exit the platform interrupt controller for current HART */
+	void (*irqchip_exit)(void);
 
-	/** Initialize IPI during cold boot */
-	int (*ipi_init)(void);
+	/** Initialize IPI for current HART */
+	int (*ipi_init)(bool cold_boot);
+	/** Exit IPI for current HART */
+	void (*ipi_exit)(void);
 
 	/** Get tlb flush limit value **/
 	u64 (*get_tlbr_flush_limit)(void);
@@ -125,12 +127,13 @@ struct sbi_platform_operations {
 	/** Get tlb fifo num entries*/
 	u32 (*get_tlb_num_entries)(void);
 
-	/** Initialize platform timer during cold boot */
-	int (*timer_init)(void);
-
-	/** Initialize the platform Message Proxy(MPXY) driver */
-	int (*mpxy_init)(void);
+	/** Initialize platform timer for current HART */
+	int (*timer_init)(bool cold_boot);
+	/** Exit platform timer for current HART */
+	void (*timer_exit)(void);
 
+	/** Check if SBI vendor extension is implemented or not */
+	bool (*vendor_ext_check)(void);
 	/** platform specific SBI extension implementation provider */
 	int (*vendor_ext_provider)(long funcid,
 				   struct sbi_trap_regs *regs,
@@ -142,13 +145,6 @@ struct sbi_platform_operations {
 	/** platform specific handler to fixup store fault */
 	int (*emulate_store)(int wlen, unsigned long addr,
 			     union sbi_ldst_data in_val);
-
-	/** platform specific pmp setup on current HART */
-	void (*pmp_set)(unsigned int n, unsigned long flags,
-			unsigned long prot, unsigned long addr,
-			unsigned long log2len);
-	/** platform specific pmp disable on current HART */
-	void (*pmp_disable)(unsigned int n);
 };
 
 /** Platform default per-HART stack size for exception/interrupt handling */
@@ -176,7 +172,7 @@ struct sbi_platform {
 	char name[64];
 	/** Supported features */
 	u64 features;
-	/** Total number of HARTs (at most SBI_HARTMASK_MAX_BITS) */
+	/** Total number of HARTs */
 	u32 hart_count;
 	/** Per-HART stack size for exception/interrupt handling */
 	u32 hart_stack_size;
@@ -191,34 +187,70 @@ struct sbi_platform {
 	/**
 	 * HART index to HART id table
 	 *
-	 * If hart_index2id != NULL then the table must contain a mapping
-	 * for each HART index 0 <= <abc> < hart_count:
+	 * For used HART index <abc>:
 	 *     hart_index2id[<abc>] = some HART id
+	 * For unused HART index <abc>:
+	 *     hart_index2id[<abc>] = -1U
 	 *
 	 * If hart_index2id == NULL then we assume identity mapping
 	 *     hart_index2id[<abc>] = <abc>
+	 *
+	 * We have only two restrictions:
+	 * 1. HART index < sbi_platform hart_count
+	 * 2. HART id < SBI_HARTMASK_MAX_BITS
 	 */
 	const u32 *hart_index2id;
-	/** Allocation alignment for Scratch */
-	unsigned long cbom_block_size;
 };
 
 /**
  * Prevent modification of struct sbi_platform from affecting
  * SBI_PLATFORM_xxx_OFFSET
  */
-assert_member_offset(struct sbi_platform, opensbi_version, SBI_PLATFORM_OPENSBI_VERSION_OFFSET);
-assert_member_offset(struct sbi_platform, platform_version, SBI_PLATFORM_VERSION_OFFSET);
-assert_member_offset(struct sbi_platform, name, SBI_PLATFORM_NAME_OFFSET);
-assert_member_offset(struct sbi_platform, features, SBI_PLATFORM_FEATURES_OFFSET);
-assert_member_offset(struct sbi_platform, hart_count, SBI_PLATFORM_HART_COUNT_OFFSET);
-assert_member_offset(struct sbi_platform, hart_stack_size, SBI_PLATFORM_HART_STACK_SIZE_OFFSET);
-assert_member_offset(struct sbi_platform, heap_size, SBI_PLATFORM_HEAP_SIZE_OFFSET);
-assert_member_offset(struct sbi_platform, reserved, SBI_PLATFORM_RESERVED_OFFSET);
-assert_member_offset(struct sbi_platform, platform_ops_addr, SBI_PLATFORM_OPS_OFFSET);
-assert_member_offset(struct sbi_platform, firmware_context, SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET);
-assert_member_offset(struct sbi_platform, hart_index2id, SBI_PLATFORM_HART_INDEX2ID_OFFSET);
-assert_member_offset(struct sbi_platform, cbom_block_size, SBI_PLATFORM_CBOM_BLOCK_SIZE_OFFSET);
+_Static_assert(
+	offsetof(struct sbi_platform, opensbi_version)
+		== SBI_PLATFORM_OPENSBI_VERSION_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_OPENSBI_VERSION_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, platform_version)
+		== SBI_PLATFORM_VERSION_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_VERSION_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, name)
+		== SBI_PLATFORM_NAME_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_NAME_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, features)
+		== SBI_PLATFORM_FEATURES_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_FEATURES_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, hart_count)
+		== SBI_PLATFORM_HART_COUNT_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_HART_COUNT_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, hart_stack_size)
+		== SBI_PLATFORM_HART_STACK_SIZE_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_HART_STACK_SIZE_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, platform_ops_addr)
+		== SBI_PLATFORM_OPS_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_OPS_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, firmware_context)
+		== SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_FIRMWARE_CONTEXT_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_platform, hart_index2id)
+		== SBI_PLATFORM_HART_INDEX2ID_OFFSET,
+	"struct sbi_platform definition has changed, please redefine "
+	"SBI_PLATFORM_HART_INDEX2ID_OFFSET");
 
 /** Get pointer to sbi_platform for sbi_scratch pointer */
 #define sbi_platform_ptr(__s) \
@@ -302,7 +334,7 @@ static inline u32 sbi_platform_tlb_fifo_num_entries(const struct sbi_platform *p
 {
 	if (plat && sbi_platform_ops(plat)->get_tlb_num_entries)
 		return sbi_platform_ops(plat)->get_tlb_num_entries();
-	return sbi_hart_count();
+	return sbi_scratch_last_hartindex() + 1;
 }
 
 /**
@@ -515,59 +547,84 @@ static inline uint64_t sbi_platform_pmu_xlate_to_mhpmevent(const struct sbi_plat
 }
 
 /**
- * Initialize the platform interrupt controller during cold boot
+ * Initialize the platform interrupt controller for current HART
  *
  * @param plat pointer to struct sbi_platform
+ * @param cold_boot whether cold boot (true) or warm_boot (false)
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_irqchip_init(const struct sbi_platform *plat)
+static inline int sbi_platform_irqchip_init(const struct sbi_platform *plat,
+					    bool cold_boot)
 {
 	if (plat && sbi_platform_ops(plat)->irqchip_init)
-		return sbi_platform_ops(plat)->irqchip_init();
+		return sbi_platform_ops(plat)->irqchip_init(cold_boot);
 	return 0;
 }
 
 /**
- * Initialize the platform IPI support during cold boot
+ * Exit the platform interrupt controller for current HART
  *
  * @param plat pointer to struct sbi_platform
+ */
+static inline void sbi_platform_irqchip_exit(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->irqchip_exit)
+		sbi_platform_ops(plat)->irqchip_exit();
+}
+
+/**
+ * Initialize the platform IPI support for current HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param cold_boot whether cold boot (true) or warm_boot (false)
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_ipi_init(const struct sbi_platform *plat)
+static inline int sbi_platform_ipi_init(const struct sbi_platform *plat,
+					bool cold_boot)
 {
 	if (plat && sbi_platform_ops(plat)->ipi_init)
-		return sbi_platform_ops(plat)->ipi_init();
+		return sbi_platform_ops(plat)->ipi_init(cold_boot);
 	return 0;
 }
 
 /**
- * Initialize the platform timer during cold boot
+ * Exit the platform IPI support for current HART
  *
  * @param plat pointer to struct sbi_platform
+ */
+static inline void sbi_platform_ipi_exit(const struct sbi_platform *plat)
+{
+	if (plat && sbi_platform_ops(plat)->ipi_exit)
+		sbi_platform_ops(plat)->ipi_exit();
+}
+
+/**
+ * Initialize the platform timer for current HART
+ *
+ * @param plat pointer to struct sbi_platform
+ * @param cold_boot whether cold boot (true) or warm_boot (false)
  *
  * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_timer_init(const struct sbi_platform *plat)
+static inline int sbi_platform_timer_init(const struct sbi_platform *plat,
+					  bool cold_boot)
 {
 	if (plat && sbi_platform_ops(plat)->timer_init)
-		return sbi_platform_ops(plat)->timer_init();
+		return sbi_platform_ops(plat)->timer_init(cold_boot);
 	return 0;
 }
 
 /**
- * Initialize the platform Message Proxy drivers
+ * Exit the platform timer for current HART
  *
  * @param plat pointer to struct sbi_platform
- *
- * @return 0 on success and negative error code on failure
  */
-static inline int sbi_platform_mpxy_init(const struct sbi_platform *plat)
+static inline void sbi_platform_timer_exit(const struct sbi_platform *plat)
 {
-	if (plat && sbi_platform_ops(plat)->mpxy_init)
-		return sbi_platform_ops(plat)->mpxy_init();
-	return 0;
+	if (plat && sbi_platform_ops(plat)->timer_exit)
+		sbi_platform_ops(plat)->timer_exit();
 }
 
 /**
@@ -580,7 +637,10 @@ static inline int sbi_platform_mpxy_init(const struct sbi_platform *plat)
 static inline bool sbi_platform_vendor_ext_check(
 					const struct sbi_platform *plat)
 {
-	return plat && sbi_platform_ops(plat)->vendor_ext_provider;
+	if (plat && sbi_platform_ops(plat)->vendor_ext_check)
+		return sbi_platform_ops(plat)->vendor_ext_check();
+
+	return false;
 }
 
 /**
@@ -651,38 +711,6 @@ static inline int sbi_platform_emulate_store(const struct sbi_platform *plat,
 	return SBI_ENOTSUPP;
 }
 
-/**
- * Platform specific PMP setup on current HART
- *
- * @param plat pointer to struct sbi_platform
- * @param n index of the pmp entry
- * @param flags domain memregion flags
- * @param prot attribute of the pmp entry
- * @param addr address of the pmp entry
- * @param log2len size of the pmp entry as power-of-2
- */
-static inline void sbi_platform_pmp_set(const struct sbi_platform *plat,
-					unsigned int n, unsigned long flags,
-					unsigned long prot, unsigned long addr,
-					unsigned long log2len)
-{
-	if (plat && sbi_platform_ops(plat)->pmp_set)
-		sbi_platform_ops(plat)->pmp_set(n, flags, prot, addr, log2len);
-}
-
-/**
- * Platform specific PMP disable on current HART
- *
- * @param plat pointer to struct sbi_platform
- * @param n index of the pmp entry
- */
-static inline void sbi_platform_pmp_disable(const struct sbi_platform *plat,
-					    unsigned int n)
-{
-	if (plat && sbi_platform_ops(plat)->pmp_disable)
-		sbi_platform_ops(plat)->pmp_disable(n);
-}
-
 #endif
 
 #endif

include/sbi/sbi_pmu.h

@@ -114,9 +114,6 @@ void sbi_pmu_exit(struct sbi_scratch *scratch);
 /** Return the pmu irq bit depending on extension existence */
 int sbi_pmu_irq_bit(void);
 
-/** Return the pmu irq mask or 0 if the pmu overflow irq is not supported */
-unsigned long sbi_pmu_irq_mask(void);
-
 /**
  * Add the hardware event to counter mapping information. This should be called
  * from the platform code to update the mapping table.
@@ -145,8 +142,6 @@ int sbi_pmu_ctr_start(unsigned long cidx_base, unsigned long cidx_mask,
 		      unsigned long flags, uint64_t ival);
 
 int sbi_pmu_ctr_get_info(uint32_t cidx, unsigned long *ctr_info);
-int sbi_pmu_event_get_info(unsigned long shmem_lo, unsigned long shmem_high,
-						   unsigned long num_events, unsigned long flags);
 
 unsigned long sbi_pmu_num_ctr(void);
 

include/sbi/sbi_scratch.h

@@ -22,7 +22,7 @@
 #define SBI_SCRATCH_FW_RW_OFFSET		(2 * __SIZEOF_POINTER__)
 /** Offset of fw_heap_offset member in sbi_scratch */
 #define SBI_SCRATCH_FW_HEAP_OFFSET		(3 * __SIZEOF_POINTER__)
-/** Offset of fw_heap_size member in sbi_scratch */
+/** Offset of fw_heap_size_offset member in sbi_scratch */
 #define SBI_SCRATCH_FW_HEAP_SIZE_OFFSET		(4 * __SIZEOF_POINTER__)
 /** Offset of next_arg1 member in sbi_scratch */
 #define SBI_SCRATCH_NEXT_ARG1_OFFSET		(5 * __SIZEOF_POINTER__)
@@ -42,10 +42,8 @@
 #define SBI_SCRATCH_TMP0_OFFSET			(12 * __SIZEOF_POINTER__)
 /** Offset of options member in sbi_scratch */
 #define SBI_SCRATCH_OPTIONS_OFFSET		(13 * __SIZEOF_POINTER__)
-/** Offset of hartindex member in sbi_scratch */
-#define SBI_SCRATCH_HARTINDEX_OFFSET		(14 * __SIZEOF_POINTER__)
 /** Offset of extra space in sbi_scratch */
-#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(15 * __SIZEOF_POINTER__)
+#define SBI_SCRATCH_EXTRA_SPACE_OFFSET		(14 * __SIZEOF_POINTER__)
 /** Maximum size of sbi_scratch (4KB) */
 #define SBI_SCRATCH_SIZE			(0x1000)
 
@@ -85,29 +83,67 @@ struct sbi_scratch {
 	unsigned long tmp0;
 	/** Options for OpenSBI library */
 	unsigned long options;
-	/** Index of the hart */
-	unsigned long hartindex;
 };
 
 /**
  * Prevent modification of struct sbi_scratch from affecting
  * SBI_SCRATCH_xxx_OFFSET
  */
-assert_member_offset(struct sbi_scratch, fw_start, SBI_SCRATCH_FW_START_OFFSET);
-assert_member_offset(struct sbi_scratch, fw_size, SBI_SCRATCH_FW_SIZE_OFFSET);
-assert_member_offset(struct sbi_scratch, fw_rw_offset, SBI_SCRATCH_FW_RW_OFFSET);
-assert_member_offset(struct sbi_scratch, fw_heap_offset, SBI_SCRATCH_FW_HEAP_OFFSET);
-assert_member_offset(struct sbi_scratch, fw_heap_size, SBI_SCRATCH_FW_HEAP_SIZE_OFFSET);
-assert_member_offset(struct sbi_scratch, next_arg1, SBI_SCRATCH_NEXT_ARG1_OFFSET);
-assert_member_offset(struct sbi_scratch, next_addr, SBI_SCRATCH_NEXT_ADDR_OFFSET);
-assert_member_offset(struct sbi_scratch, next_mode, SBI_SCRATCH_NEXT_MODE_OFFSET);
-assert_member_offset(struct sbi_scratch, warmboot_addr, SBI_SCRATCH_WARMBOOT_ADDR_OFFSET);
-assert_member_offset(struct sbi_scratch, platform_addr, SBI_SCRATCH_PLATFORM_ADDR_OFFSET);
-assert_member_offset(struct sbi_scratch, hartid_to_scratch, SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET);
-assert_member_offset(struct sbi_scratch, trap_context, SBI_SCRATCH_TRAP_CONTEXT_OFFSET);
-assert_member_offset(struct sbi_scratch, tmp0, SBI_SCRATCH_TMP0_OFFSET);
-assert_member_offset(struct sbi_scratch, options, SBI_SCRATCH_OPTIONS_OFFSET);
-assert_member_offset(struct sbi_scratch, hartindex, SBI_SCRATCH_HARTINDEX_OFFSET);
+_Static_assert(
+	offsetof(struct sbi_scratch, fw_start)
+		== SBI_SCRATCH_FW_START_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_FW_START_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, fw_size)
+		== SBI_SCRATCH_FW_SIZE_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_FW_SIZE_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, next_arg1)
+		== SBI_SCRATCH_NEXT_ARG1_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_NEXT_ARG1_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, next_addr)
+		== SBI_SCRATCH_NEXT_ADDR_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_NEXT_ADDR_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, next_mode)
+		== SBI_SCRATCH_NEXT_MODE_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_NEXT_MODE_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, warmboot_addr)
+		== SBI_SCRATCH_WARMBOOT_ADDR_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_WARMBOOT_ADDR_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, platform_addr)
+		== SBI_SCRATCH_PLATFORM_ADDR_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_PLATFORM_ADDR_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, hartid_to_scratch)
+		== SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_HARTID_TO_SCRATCH_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, trap_context)
+		== SBI_SCRATCH_TRAP_CONTEXT_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_TRAP_CONTEXT_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, tmp0)
+		== SBI_SCRATCH_TMP0_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_TMP0_OFFSET");
+_Static_assert(
+	offsetof(struct sbi_scratch, options)
+		== SBI_SCRATCH_OPTIONS_OFFSET,
+	"struct sbi_scratch definition has changed, please redefine "
+	"SBI_SCRATCH_OPTIONS_OFFSET");
 
 /** Possible options for OpenSBI library */
 enum sbi_scratch_options {
@@ -119,7 +155,7 @@ enum sbi_scratch_options {
 
 /** Get pointer to sbi_scratch for current HART */
 #define sbi_scratch_thishart_ptr() \
-	((struct sbi_scratch *)csr_read_relaxed(CSR_MSCRATCH))
+	((struct sbi_scratch *)csr_read(CSR_MSCRATCH))
 
 /** Get Arg1 of next booting stage for current HART */
 #define sbi_scratch_thishart_arg1_ptr() \
@@ -166,22 +202,15 @@ do {									\
 					= (__type)(__ptr);		\
 } while (0)
 
-/** Get the hart index of the current hart */
-#define current_hartindex() \
-	(sbi_scratch_thishart_ptr()->hartindex)
+/** Last HART index having a sbi_scratch pointer */
+extern u32 last_hartindex_having_scratch;
 
-/** Number of harts managed by this OpenSBI instance */
-extern u32 sbi_scratch_hart_count;
-
-/** Get the number of harts managed by this OpenSBI instance */
-#define sbi_hart_count() sbi_scratch_hart_count
-
-/** Iterate over the harts managed by this OpenSBI instance */
-#define sbi_for_each_hartindex(__var) \
-	for (u32 __var = 0; __var < sbi_hart_count(); ++__var)
+/** Get last HART index having a sbi_scratch pointer */
+#define sbi_scratch_last_hartindex()	last_hartindex_having_scratch
 
 /** Check whether a particular HART index is valid or not */
-#define sbi_hartindex_valid(__hartindex) ((__hartindex) < sbi_hart_count())
+#define sbi_hartindex_valid(__hartindex) \
+(((__hartindex) <= sbi_scratch_last_hartindex()) ? true : false)
 
 /** HART index to HART id table */
 extern u32 hartindex_to_hartid_table[];
@@ -189,7 +218,7 @@ extern u32 hartindex_to_hartid_table[];
 /** Get sbi_scratch from HART index */
 #define sbi_hartindex_to_hartid(__hartindex)		\
 ({							\
-	((__hartindex) < SBI_HARTMASK_MAX_BITS) ?	\
+	((__hartindex) <= sbi_scratch_last_hartindex()) ?\
 	hartindex_to_hartid_table[__hartindex] : -1U;	\
 })
 
@@ -199,8 +228,8 @@ extern struct sbi_scratch *hartindex_to_scratch_table[];
 /** Get sbi_scratch from HART index */
 #define sbi_hartindex_to_scratch(__hartindex)		\
 ({							\
-	((__hartindex) < SBI_HARTMASK_MAX_BITS) ?	\
-	hartindex_to_scratch_table[__hartindex] : NULL;	\
+	((__hartindex) <= sbi_scratch_last_hartindex()) ?\
+	hartindex_to_scratch_table[__hartindex] : NULL;\
 })
 
 /**

include/sbi/sbi_slist.h

@@ -1,33 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Simple simply-linked list library.
- *
- * Copyright (c) 2025 Rivos Inc.
- *
- * Authors:
- *   Clément Léger <cleger@rivosinc.com>
- */
-
-#ifndef __SBI_SLIST_H__
-#define __SBI_SLIST_H__
-
-#include <sbi/sbi_types.h>
-
-#define SBI_SLIST_HEAD_INIT(_ptr)	(_ptr)
-#define SBI_SLIST_HEAD(_lname, _stype) struct _stype *_lname
-#define SBI_SLIST_NODE(_stype) SBI_SLIST_HEAD(next, _stype)
-#define SBI_SLIST_NODE_INIT(_ptr) .next = _ptr
-
-#define SBI_INIT_SLIST_HEAD(_head) (_head) = NULL
-
-#define SBI_SLIST_ADD(_ptr, _head) \
-do { \
-	(_ptr)->next = _head; \
-	(_head) = _ptr; \
-} while (0)
-
-#define SBI_SLIST_FOR_EACH_ENTRY(_ptr, _head) \
-	for (_ptr = _head; _ptr; _ptr = _ptr->next)
-
-#endif

include/sbi/sbi_sse.h

@@ -54,12 +54,12 @@ struct sbi_sse_cb_ops {
 	void (*disable_cb)(uint32_t event_id);
 };
 
-/* Add a supported event with associated callback operations
- * @param event_id Event identifier (SBI_SSE_EVENT_* or a custom platform one)
- * @param cb_ops Callback operations (Can be NULL if any)
+/* Set the callback operations for an event
+ * @param event_id Event identifier (SBI_SSE_EVENT_*)
+ * @param cb_ops Callback operations
  * @return 0 on success, error otherwise
  */
-int sbi_sse_add_event(uint32_t event_id, const struct sbi_sse_cb_ops *cb_ops);
+int sbi_sse_set_cb_ops(uint32_t event_id, const struct sbi_sse_cb_ops *cb_ops);
 
 /* Inject an event to the current hard
  * @param event_id Event identifier (SBI_SSE_EVENT_*)
@@ -78,8 +78,6 @@ void sbi_sse_exit(struct sbi_scratch *scratch);
 int sbi_sse_register(uint32_t event_id, unsigned long handler_entry_pc,
 		     unsigned long handler_entry_arg);
 int sbi_sse_unregister(uint32_t event_id);
-int sbi_sse_hart_mask(void);
-int sbi_sse_hart_unmask(void);
 int sbi_sse_enable(uint32_t event_id);
 int sbi_sse_disable(uint32_t event_id);
 int sbi_sse_complete(struct sbi_trap_regs *regs, struct sbi_ecall_return *out);

include/sbi/sbi_timer.h

@@ -28,9 +28,6 @@ struct sbi_timer_device {
 
 	/** Stop timer event for current HART */
 	void (*timer_event_stop)(void);
-
-	/** Initialize timer device for current HART */
-	int (*warm_init)(void);
 };
 
 struct sbi_scratch;
@@ -81,10 +78,8 @@ u64 sbi_timer_get_delta(void);
 /** Set timer delta value for current HART */
 void sbi_timer_set_delta(ulong delta);
 
-#if __riscv_xlen == 32
 /** Set upper 32-bits of timer delta value for current HART */
 void sbi_timer_set_delta_upper(ulong delta_upper);
-#endif
 
 /** Start timer event for current HART */
 void sbi_timer_event_start(u64 next_event);

include/sbi/sbi_trap.h

@@ -112,13 +112,10 @@
 /** Size (in bytes) of sbi_trap_info */
 #define SBI_TRAP_INFO_SIZE SBI_TRAP_INFO_OFFSET(last)
 
-#define STACK_BOUNDARY 16
-#define ALIGN_TO_BOUNDARY(x, a) (((x) + (a) - 1) & ~((a) - 1))
-
 /** Size (in bytes) of sbi_trap_context */
-#define SBI_TRAP_CONTEXT_SIZE ALIGN_TO_BOUNDARY((SBI_TRAP_REGS_SIZE + \
+#define SBI_TRAP_CONTEXT_SIZE (SBI_TRAP_REGS_SIZE + \
 			       SBI_TRAP_INFO_SIZE + \
-			       __SIZEOF_POINTER__), STACK_BOUNDARY)
+			       __SIZEOF_POINTER__)
 
 #ifndef __ASSEMBLER__
 
@@ -239,20 +236,6 @@ static inline unsigned long sbi_regs_gva(const struct sbi_trap_regs *regs)
 #endif
 }
 
-static inline bool sbi_regs_from_virt(const struct sbi_trap_regs *regs)
-{
-#if __riscv_xlen == 32
-	return (regs->mstatusH & MSTATUSH_MPV) ? true : false;
-#else
-	return (regs->mstatus & MSTATUS_MPV) ? true : false;
-#endif
-}
-
-static inline int sbi_mstatus_prev_mode(unsigned long mstatus)
-{
-	return (mstatus & MSTATUS_MPP) >> MSTATUS_MPP_SHIFT;
-}
-
 int sbi_trap_redirect(struct sbi_trap_regs *regs,
 		      const struct sbi_trap_info *trap);
 

include/sbi/sbi_trap_ldst.h

@@ -28,13 +28,4 @@ int sbi_load_access_handler(struct sbi_trap_context *tcntx);
 
 int sbi_store_access_handler(struct sbi_trap_context *tcntx);
 
-ulong sbi_misaligned_tinst_fixup(ulong orig_tinst, ulong new_tinst,
-				 ulong addr_offset);
-
-int sbi_misaligned_v_ld_emulator(int rlen, union sbi_ldst_data *out_val,
-				 struct sbi_trap_context *tcntx);
-
-int sbi_misaligned_v_st_emulator(int wlen, union sbi_ldst_data in_val,
-				 struct sbi_trap_context *tcntx);
-
 #endif

include/sbi/sbi_types.h

@@ -44,12 +44,7 @@ typedef unsigned long long	uint64_t;
 #error "Unexpected __riscv_xlen"
 #endif
 
-#if __STDC_VERSION__ < 202000L
-typedef _Bool			bool;
-#define true			1
-#define false			0
-#endif
-
+typedef int			bool;
 typedef unsigned long		ulong;
 typedef unsigned long		uintptr_t;
 typedef unsigned long		size_t;
@@ -66,15 +61,15 @@ typedef uint32_t		be32_t;
 typedef uint64_t		le64_t;
 typedef uint64_t		be64_t;
 
+#define true			1
+#define false			0
+
 #define NULL			((void *)0)
 
 #define __packed		__attribute__((packed))
 #define __noreturn		__attribute__((noreturn))
 #define __aligned(x)		__attribute__((aligned(x)))
-
-#ifndef __always_inline
 #define __always_inline	inline __attribute__((always_inline))
-#endif
 
 #define likely(x) __builtin_expect((x), 1)
 #define unlikely(x) __builtin_expect((x), 0)
@@ -96,13 +91,6 @@ typedef uint64_t		be64_t;
 	const typeof(((type *)0)->member) * __mptr = (ptr);	\
 	(type *)((char *)__mptr - offsetof(type, member)); })
 
-
-#define assert_member_offset(type, member, offset)			\
-	_Static_assert(							\
-		(offsetof(type, member)) == (offset ),			\
-		"The offset " #offset " of " #member " in " #type	\
-		"is not correct, please redefine it.")
-
 #define array_size(x) 	(sizeof(x) / sizeof((x)[0]))
 
 #define MAX(a, b) ((a) > (b) ? (a) : (b))

include/sbi/sbi_version.h

@@ -11,7 +11,7 @@
 #define __SBI_VERSION_H__
 
 #define OPENSBI_VERSION_MAJOR 1
-#define OPENSBI_VERSION_MINOR 7
+#define OPENSBI_VERSION_MINOR 5
 
 /**
  * OpenSBI 32-bit version with:

include/sbi/sbi_visibility.h

@@ -1,16 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2025 SiFive
- */
-
-#ifndef __SBI_VISIBILITY_H__
-#define __SBI_VISIBILITY_H__
-
-/*
- * Declare all global objects with hidden visibility so access is PC-relative
- * instead of going through the GOT.
- */
-#pragma GCC visibility push(hidden)
-
-#endif

include/sbi_utils/fdt/fdt_domain.h

@@ -70,12 +70,12 @@ void fdt_domain_fixup(void *fdt);
  *
  * @return 0 on success and negative error code on failure
  */
-int fdt_domains_populate(const void *fdt);
+int fdt_domains_populate(void *fdt);
 
 #else
 
 static inline void fdt_domain_fixup(void *fdt) { }
-static inline int fdt_domains_populate(const void *fdt) { return 0; }
+static inline int fdt_domains_populate(void *fdt) { return 0; }
 
 #endif
 

include/sbi_utils/fdt/fdt_driver.h

@@ -1,63 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * fdt_driver.h - Generic support for initializing drivers from DT nodes.
- *
- * Copyright (c) 2024 SiFive
- */
-
-#ifndef __FDT_DRIVER_H__
-#define __FDT_DRIVER_H__
-
-#include <sbi_utils/fdt/fdt_helper.h>
-
-struct fdt_driver {
-	const struct fdt_match *match_table;
-	int (*init)(const void *fdt, int nodeoff,
-		    const struct fdt_match *match);
-	bool experimental;
-};
-
-/* List of early FDT drivers generated at compile time */
-extern const struct fdt_driver *const fdt_early_drivers[];
-
-/**
- * Initialize a driver instance for a specific DT node
- *
- * @param fdt devicetree blob
- * @param nodeoff offset of a node in the devicetree blob
- * @param drivers NULL-terminated array of drivers to match against this node
- *
- * @return 0 if a driver was matched and successfully initialized or a negative
- * error code on failure
- */
-int fdt_driver_init_by_offset(const void *fdt, int nodeoff,
-			      const struct fdt_driver *const *drivers);
-
-/**
- * Initialize a driver instance for each DT node that matches any of the
- * provided drivers
- *
- * @param fdt devicetree blob
- * @param drivers NULL-terminated array of drivers to match against each node
- *
- * @return 0 if drivers for all matches (if any) were successfully initialized
- * or a negative error code on failure
- */
-int fdt_driver_init_all(const void *fdt,
-			const struct fdt_driver *const *drivers);
-
-/**
- * Initialize a driver instance for the first DT node that matches any of the
- * provided drivers
- *
- * @param fdt devicetree blob
- * @param drivers NULL-terminated array of drivers to match against each node
- *
- * @return 0 if a driver was matched and successfully initialized or a negative
- * error code on failure
- */
-int fdt_driver_init_one(const void *fdt,
-			const struct fdt_driver *const *drivers);
-
-#endif /* __FDT_DRIVER_H__ */

include/sbi_utils/fdt/fdt_fixup.h

@@ -9,8 +9,6 @@
 #ifndef __FDT_FIXUP_H__
 #define __FDT_FIXUP_H__
 
-#include <sbi/sbi_list.h>
-
 struct sbi_cpu_idle_state {
 	const char *name;
 	uint32_t suspend_param;
@@ -32,7 +30,7 @@ struct sbi_cpu_idle_state {
  * @param states: array of idle state descriptions, ending with empty element
  * @return zero on success and -ve on failure
  */
-int fdt_add_cpu_idle_states(void *fdt, const struct sbi_cpu_idle_state *state);
+int fdt_add_cpu_idle_states(void *dtb, const struct sbi_cpu_idle_state *state);
 
 /**
  * Fix up the CPU node in the device tree
@@ -95,19 +93,6 @@ void fdt_plic_fixup(void *fdt);
  */
 int fdt_reserved_memory_fixup(void *fdt);
 
-/** Representation of a general fixup */
-struct fdt_general_fixup {
-	struct sbi_dlist head;
-	const char *name;
-	void (*do_fixup)(struct fdt_general_fixup *f, void *fdt);
-};
-
-/** Register a general fixup */
-int fdt_register_general_fixup(struct fdt_general_fixup *fixup);
-
-/** UnRegister a general fixup */
-void fdt_unregister_general_fixup(struct fdt_general_fixup *fixup);
-
 /**
  * General device tree fix-up
  *

include/sbi_utils/fdt/fdt_helper.h

@@ -34,87 +34,87 @@ struct platform_uart_data {
 	unsigned long reg_offset;
 };
 
-int fdt_parse_phandle_with_args(const void *fdt, int nodeoff,
+const struct fdt_match *fdt_match_node(void *fdt, int nodeoff,
+				       const struct fdt_match *match_table);
+
+int fdt_find_match(void *fdt, int startoff,
+		   const struct fdt_match *match_table,
+		   const struct fdt_match **out_match);
+
+int fdt_parse_phandle_with_args(void *fdt, int nodeoff,
 				const char *prop, const char *cells_prop,
 				int index, struct fdt_phandle_args *out_args);
 
-int fdt_get_node_addr_size(const void *fdt, int node, int index,
+int fdt_get_node_addr_size(void *fdt, int node, int index,
 			   uint64_t *addr, uint64_t *size);
 
-int fdt_get_node_addr_size_by_name(const void *fdt, int node, const char *name,
+int fdt_get_node_addr_size_by_name(void *fdt, int node, const char *name,
 				   uint64_t *addr, uint64_t *size);
 
-bool fdt_node_is_enabled(const void *fdt, int nodeoff);
+bool fdt_node_is_enabled(void *fdt, int nodeoff);
 
-int fdt_parse_hart_id(const void *fdt, int cpu_offset, u32 *hartid);
+int fdt_parse_hart_id(void *fdt, int cpu_offset, u32 *hartid);
 
-int fdt_parse_max_enabled_hart_id(const void *fdt, u32 *max_hartid);
+int fdt_parse_max_enabled_hart_id(void *fdt, u32 *max_hartid);
 
-int fdt_parse_cbom_block_size(const void *fdt, int cpu_offset, unsigned long  *cbom_block_size);
+int fdt_parse_timebase_frequency(void *fdt, unsigned long *freq);
 
-int fdt_parse_timebase_frequency(const void *fdt, unsigned long *freq);
-
-int fdt_parse_isa_extensions(const void *fdt, unsigned int hartid,
+int fdt_parse_isa_extensions(void *fdt, unsigned int hard_id,
 			     unsigned long *extensions);
 
-int fdt_parse_gaisler_uart_node(const void *fdt, int nodeoffset,
+int fdt_parse_gaisler_uart_node(void *fdt, int nodeoffset,
 				struct platform_uart_data *uart);
 
-int fdt_parse_renesas_scif_node(const void *fdt, int nodeoffset,
+int fdt_parse_renesas_scif_node(void *fdt, int nodeoffset,
 				struct platform_uart_data *uart);
 
-int fdt_parse_shakti_uart_node(const void *fdt, int nodeoffset,
+int fdt_parse_shakti_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart);
 
-int fdt_parse_sifive_uart_node(const void *fdt, int nodeoffset,
+int fdt_parse_sifive_uart_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart);
 
-int fdt_parse_uart_node(const void *fdt, int nodeoffset,
+int fdt_parse_uart_node(void *fdt, int nodeoffset,
 			struct platform_uart_data *uart);
 
-int fdt_parse_uart8250(const void *fdt, struct platform_uart_data *uart,
+int fdt_parse_uart8250(void *fdt, struct platform_uart_data *uart,
 		       const char *compatible);
 
-int fdt_parse_xlnx_uartlite_node(const void *fdt, int nodeoffset,
+int fdt_parse_xlnx_uartlite_node(void *fdt, int nodeoffset,
 			       struct platform_uart_data *uart);
 
 struct aplic_data;
 
-int fdt_parse_aplic_node(const void *fdt, int nodeoff, struct aplic_data *aplic);
+int fdt_parse_aplic_node(void *fdt, int nodeoff, struct aplic_data *aplic);
 
 struct imsic_data;
 
-bool fdt_check_imsic_mlevel(const void *fdt);
+bool fdt_check_imsic_mlevel(void *fdt);
 
-int fdt_parse_imsic_node(const void *fdt, int nodeoff, struct imsic_data *imsic);
+int fdt_parse_imsic_node(void *fdt, int nodeoff, struct imsic_data *imsic);
 
 struct plic_data;
 
-int fdt_parse_plic_node(const void *fdt, int nodeoffset, struct plic_data *plic);
+int fdt_parse_plic_node(void *fdt, int nodeoffset, struct plic_data *plic);
 
-int fdt_parse_plic(const void *fdt, struct plic_data *plic, const char *compat);
+int fdt_parse_plic(void *fdt, struct plic_data *plic, const char *compat);
 
-int fdt_parse_aclint_node(const void *fdt, int nodeoffset,
+int fdt_parse_aclint_node(void *fdt, int nodeoffset,
 			  bool for_timer, bool allow_regname,
 			  unsigned long *out_addr1, unsigned long *out_size1,
 			  unsigned long *out_addr2, unsigned long *out_size2,
 			  u32 *out_first_hartid, u32 *out_hart_count);
 
-int fdt_parse_plmt_node(const void *fdt, int nodeoffset, unsigned long *plmt_base,
-			unsigned long *plmt_size, u32 *hart_count);
+int fdt_parse_plmt_node(void *fdt, int nodeoffset, unsigned long *plmt_base,
+			  unsigned long *plmt_size, u32 *hart_count);
 
-int fdt_parse_plicsw_node(const void *fdt, int nodeoffset, unsigned long *plicsw_base,
+int fdt_parse_plicsw_node(void *fdt, int nodeoffset, unsigned long *plicsw_base,
 			  unsigned long *size, u32 *hart_count);
 
-int fdt_parse_compat_addr(const void *fdt, uint64_t *addr,
+int fdt_parse_compat_addr(void *fdt, uint64_t *addr,
 			  const char *compatible);
 
-static inline const void *fdt_get_address(void)
-{
-	return (const void *)root.next_arg1;
-}
-
-static inline void *fdt_get_address_rw(void)
+static inline void *fdt_get_address(void)
 {
 	return (void *)root.next_arg1;
 }

include/sbi_utils/fdt/fdt_pmu.h

@@ -52,7 +52,7 @@ int fdt_pmu_fixup(void *fdt);
  *
  * @return 0 on success and negative error code on failure
  */
-int fdt_pmu_setup(const void *fdt);
+int fdt_pmu_setup(void *fdt);
 
 /**
  * Get the mhpmevent select value read from DT for a given event
@@ -62,10 +62,15 @@ int fdt_pmu_setup(const void *fdt);
  */
 uint64_t fdt_pmu_get_select_value(uint32_t event_idx);
 
+/** The event index to selector value table instance */
+extern struct fdt_pmu_hw_event_select_map fdt_pmu_evt_select[];
+/** The number of valid entries in fdt_pmu_evt_select[] */
+extern uint32_t hw_event_count;
+
 #else
 
 static inline void fdt_pmu_fixup(void *fdt) { }
-static inline int fdt_pmu_setup(const void *fdt) { return 0; }
+static inline int fdt_pmu_setup(void *fdt) { return 0; }
 static inline uint64_t fdt_pmu_get_select_value(uint32_t event_idx) { return 0; }
 
 #endif

include/sbi_utils/gpio/fdt_gpio.h

@@ -10,21 +10,22 @@
 #ifndef __FDT_GPIO_H__
 #define __FDT_GPIO_H__
 
-#include <sbi_utils/fdt/fdt_driver.h>
 #include <sbi_utils/gpio/gpio.h>
 
 struct fdt_phandle_args;
 
 /** FDT based GPIO driver */
 struct fdt_gpio {
-	struct fdt_driver driver;
+	const struct fdt_match *match_table;
 	int (*xlate)(struct gpio_chip *chip,
 		     const struct fdt_phandle_args *pargs,
 		     struct gpio_pin *out_pin);
+	int (*init)(void *fdt, int nodeoff, u32 phandle,
+		    const struct fdt_match *match);
 };
 
 /** Get a GPIO pin using "gpios" DT property of client DT node */
-int fdt_gpio_pin_get(const void *fdt, int nodeoff, int index,
+int fdt_gpio_pin_get(void *fdt, int nodeoff, int index,
 		     struct gpio_pin *out_pin);
 
 /** Simple xlate function to convert two GPIO FDT cells into GPIO pin */

include/sbi_utils/gpio/gpio.h

@@ -40,7 +40,7 @@ struct gpio_pin {
 /** Representation of a GPIO chip */
 struct gpio_chip {
 	/** Pointer to GPIO driver owning this GPIO chip */
-	const void *driver;
+	void *driver;
 	/** Uniquie ID of the GPIO chip assigned by the driver */
 	unsigned int id;
 	/** Number of GPIOs supported by the GPIO chip */

include/sbi_utils/i2c/fdt_i2c.h

@@ -10,11 +10,17 @@
 #ifndef __FDT_I2C_H__
 #define __FDT_I2C_H__
 
-#include <sbi_utils/fdt/fdt_driver.h>
 #include <sbi_utils/i2c/i2c.h>
 
+/** FDT based I2C adapter driver */
+struct fdt_i2c_adapter {
+	const struct fdt_match *match_table;
+	int (*init)(void *fdt, int nodeoff,
+		    const struct fdt_match *match);
+};
+
 /** Get I2C adapter identified by nodeoff */
-int fdt_i2c_adapter_get(const void *fdt, int nodeoff,
+int fdt_i2c_adapter_get(void *fdt, int nodeoff,
 			struct i2c_adapter **out_adapter);
 
 #endif

include/sbi_utils/ipi/aclint_mswi.h

@@ -26,6 +26,8 @@ struct aclint_mswi_data {
 	u32 hart_count;
 };
 
+int aclint_mswi_warm_init(void);
+
 int aclint_mswi_cold_init(struct aclint_mswi_data *mswi);
 
 #endif

include/sbi_utils/ipi/andes_plicsw.h

@@ -32,6 +32,8 @@ struct plicsw_data {
 	uint32_t hart_count;
 };
 
+int plicsw_warm_ipi_init(void);
+
 int plicsw_cold_ipi_init(struct plicsw_data *plicsw);
 
 #endif /* _IPI_ANDES_PLICSW_H_ */

include/sbi_utils/ipi/fdt_ipi.h

@@ -11,15 +11,24 @@
 #define __FDT_IPI_H__
 
 #include <sbi/sbi_types.h>
-#include <sbi_utils/fdt/fdt_driver.h>
 
 #ifdef CONFIG_FDT_IPI
 
-int fdt_ipi_init(void);
+struct fdt_ipi {
+	const struct fdt_match *match_table;
+	int (*cold_init)(void *fdt, int nodeoff, const struct fdt_match *match);
+	int (*warm_init)(void);
+	void (*exit)(void);
+};
+
+void fdt_ipi_exit(void);
+
+int fdt_ipi_init(bool cold_boot);
 
 #else
 
-static inline int fdt_ipi_init(void) { return 0; }
+static inline void fdt_ipi_exit(void) { }
+static inline int fdt_ipi_init(bool cold_boot) { return 0; }
 
 #endif
 

include/sbi_utils/irqchip/aplic.h

@@ -12,7 +12,6 @@
 #define __IRQCHIP_APLIC_H__
 
 #include <sbi/sbi_types.h>
-#include <sbi/sbi_irqchip.h>
 
 #define APLIC_MAX_DELEGATE	16
 
@@ -31,9 +30,6 @@ struct aplic_delegate_data {
 };
 
 struct aplic_data {
-	/* Private members */
-	struct sbi_irqchip_device irqchip;
-	/* Public members */
 	unsigned long addr;
 	unsigned long size;
 	unsigned long num_idc;

include/sbi_utils/irqchip/fdt_irqchip.h

@@ -11,15 +11,25 @@
 #define __FDT_IRQCHIP_H__
 
 #include <sbi/sbi_types.h>
-#include <sbi_utils/fdt/fdt_driver.h>
 
 #ifdef CONFIG_FDT_IRQCHIP
 
-int fdt_irqchip_init(void);
+struct fdt_irqchip {
+	const struct fdt_match *match_table;
+	int (*cold_init)(void *fdt, int nodeoff, const struct fdt_match *match);
+	int (*warm_init)(void);
+	void (*exit)(void);
+};
+
+void fdt_irqchip_exit(void);
+
+int fdt_irqchip_init(bool cold_boot);
 
 #else
 
-static inline int fdt_irqchip_init(void) { return 0; }
+static inline void fdt_irqchip_exit(void) { }
+
+static inline int fdt_irqchip_init(bool cold_boot) { return 0; }
 
 #endif
 

include/sbi_utils/irqchip/fdt_irqchip_plic.h

@@ -0,0 +1,33 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2022 Samuel Holland <samuel@sholland.org>
+ */
+
+#ifndef __IRQCHIP_FDT_IRQCHIP_PLIC_H__
+#define __IRQCHIP_FDT_IRQCHIP_PLIC_H__
+
+#include <sbi/sbi_types.h>
+
+/**
+ * Save the PLIC priority state
+ * @param priority pointer to the memory region for the saved priority
+ * @param num size of the memory region including interrupt source 0
+ */
+void fdt_plic_priority_save(u8 *priority, u32 num);
+
+/**
+ * Restore the PLIC priority state
+ * @param priority pointer to the memory region for the saved priority
+ * @param num size of the memory region including interrupt source 0
+ */
+void fdt_plic_priority_restore(const u8 *priority, u32 num);
+
+void fdt_plic_context_save(bool smode, u32 *enable, u32 *threshold, u32 num);
+
+void fdt_plic_context_restore(bool smode, const u32 *enable, u32 threshold,
+			      u32 num);
+
+void thead_plic_restore(void);
+
+#endif

include/sbi_utils/irqchip/imsic.h

@@ -37,12 +37,14 @@ struct imsic_data {
 
 int imsic_map_hartid_to_data(u32 hartid, struct imsic_data *imsic, int file);
 
-struct imsic_data *imsic_get_data(u32 hartindex);
+struct imsic_data *imsic_get_data(u32 hartid);
 
-int imsic_get_target_file(u32 hartindex);
+int imsic_get_target_file(u32 hartid);
 
 void imsic_local_irqchip_init(void);
 
+int imsic_warm_irqchip_init(void);
+
 int imsic_data_check(struct imsic_data *imsic);
 
 int imsic_cold_irqchip_init(struct imsic_data *imsic);

include/sbi_utils/irqchip/plic.h

@@ -11,41 +11,31 @@
 #define __IRQCHIP_PLIC_H__
 
 #include <sbi/sbi_types.h>
-#include <sbi/sbi_irqchip.h>
 
 struct plic_data {
-	/* Private members */
-	struct sbi_irqchip_device irqchip;
-	/* Public members */
 	unsigned long addr;
 	unsigned long size;
 	unsigned long num_src;
-	unsigned long flags;
-	void *pm_data;
-	s16 context_map[][2];
 };
 
-/** Work around a bug on Ariane that requires enabling interrupts at boot */
-#define PLIC_FLAG_ARIANE_BUG		BIT(0)
-/** PLIC must be delegated to S-mode like T-HEAD C906 and C910 */
-#define PLIC_FLAG_THEAD_DELEGATION	BIT(1)
-/** Allocate space for power management save/restore operations */
-#define PLIC_FLAG_ENABLE_PM		BIT(2)
+/* So far, priorities on all consumers of these functions fit in 8 bits. */
+void plic_priority_save(const struct plic_data *plic, u8 *priority, u32 num);
 
-#define PLIC_M_CONTEXT			0
-#define PLIC_S_CONTEXT			1
+void plic_priority_restore(const struct plic_data *plic, const u8 *priority,
+			   u32 num);
 
-#define PLIC_DATA_SIZE(__hart_count)	(sizeof(struct plic_data) + \
-					 (__hart_count) * 2 * sizeof(s16))
+void plic_context_save(const struct plic_data *plic, int context_id,
+		       u32 *enable, u32 *threshold, u32 num);
 
-#define PLIC_IE_WORDS(__p)		((__p)->num_src / 32 + 1)
+void plic_context_restore(const struct plic_data *plic, int context_id,
+			  const u32 *enable, u32 threshold, u32 num);
 
-struct plic_data *plic_get(void);
+int plic_context_init(const struct plic_data *plic, int context_id,
+		      bool enable, u32 threshold);
 
-void plic_suspend(void);
+int plic_warm_irqchip_init(const struct plic_data *plic,
+			   int m_cntx_id, int s_cntx_id);
 
-void plic_resume(void);
-
-int plic_cold_irqchip_init(struct plic_data *plic);
+int plic_cold_irqchip_init(const struct plic_data *plic);
 
 #endif

include/sbi_utils/mailbox/fdt_mailbox.h

@@ -1,35 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2024 Ventana Micro Systems Inc.
- *
- * Authors:
- *   Anup Patel <apatel@ventanamicro.com>
- */
-
-#ifndef __FDT_MAILBOX_H__
-#define __FDT_MAILBOX_H__
-
-#include <sbi_utils/fdt/fdt_driver.h>
-#include <sbi_utils/mailbox/mailbox.h>
-
-struct fdt_phandle_args;
-
-/** FDT based mailbox driver */
-struct fdt_mailbox {
-	struct fdt_driver driver;
-	int (*xlate)(struct mbox_controller *mbox,
-		     const struct fdt_phandle_args *pargs,
-		     u32 *out_chan_args);
-};
-
-/** Request a mailbox channel using "mboxes" DT property of client DT node */
-int fdt_mailbox_request_chan(const void *fdt, int nodeoff, int index,
-			     struct mbox_chan **out_chan);
-
-/** Simple xlate function to convert one mailbox FDT cell into channel args */
-int fdt_mailbox_simple_xlate(struct mbox_controller *mbox,
-			     const struct fdt_phandle_args *pargs,
-			     u32 *out_chan_args);
-
-#endif

include/sbi_utils/mailbox/mailbox.h

@@ -1,180 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2024 Ventana Micro Systems Inc.
- *
- * Authors:
- *   Anup Patel <apatel@ventanamicro.com>
- */
-
-#ifndef __MAILBOX_H__
-#define __MAILBOX_H__
-
-#include <sbi/sbi_types.h>
-#include <sbi/sbi_list.h>
-#include <sbi/riscv_atomic.h>
-
-/** Representation of a mailbox channel */
-struct mbox_chan {
-	/** List head */
-	struct sbi_dlist node;
-	/** Pointer to the mailbox controller */
-	struct mbox_controller *mbox;
-	/**
-	 * Arguments (or parameters) to identify a mailbox channel
-	 * within a mailbox controller.
-	 */
-#define MBOX_CHAN_MAX_ARGS	2
-	u32 chan_args[MBOX_CHAN_MAX_ARGS];
-};
-
-#define to_mbox_chan(__node)	\
-	container_of((__node), struct mbox_chan, node)
-
-/**
- * Representation of a mailbox data transfer
- *
- * NOTE: If both "tx" and "rx" are non-NULL then Tx is done before Rx.
- */
-struct mbox_xfer {
-#define MBOX_XFER_SEQ			(1UL << 0)
-	/** Transfer flags */
-	unsigned long flags;
-	/** Transfer arguments (or parameters) */
-	void *args;
-	/**
-	 * Sequence number
-	 *
-	 * If MBOX_XFER_SEQ is not set in flags then mbox_chan_xfer()
-	 * will generate a unique sequence number and update this field
-	 * else mbox_chan_xfer() will blindly use the sequence number
-	 * specified by this field.
-	 */
-	long seq;
-	/** Send data pointer */
-	void *tx;
-	/** Send data length (valid only if tx != NULL) */
-	unsigned long tx_len;
-	/**
-	 * Send timeout milliseconds (valid only if tx != NULL)
-	 *
-	 * If this field is non-zero along with tx != NULL then the
-	 * mailbox controller driver will wait specified milliseconds
-	 * for send data transfer to complete else the mailbox controller
-	 * driver will not wait.
-	 */
-	unsigned long tx_timeout;
-	/** Receive data pointer */
-	void *rx;
-	/** Receive data length (valid only if rx != NULL) */
-	unsigned long rx_len;
-	/**
-	 * Receive timeout milliseconds (valid only if rx != NULL)
-	 *
-	 * If this field is non-zero along with rx != NULL then the
-	 * mailbox controller driver will wait specified milliseconds
-	 * for receive data transfer to complete else the mailbox
-	 * controller driver will not wait.
-	 */
-	unsigned long rx_timeout;
-};
-
-#define mbox_xfer_init_tx(__p, __a, __t, __t_len, __t_tim)		\
-do {									\
-	(__p)->flags = 0;						\
-	(__p)->args = (__a);						\
-	(__p)->tx = (__t);						\
-	(__p)->tx_len = (__t_len);					\
-	(__p)->tx_timeout = (__t_tim);					\
-	(__p)->rx = NULL;						\
-	(__p)->rx_len = 0;						\
-	(__p)->rx_timeout = 0;						\
-} while (0)
-
-#define mbox_xfer_init_rx(__p, __a, __r, __r_len, __r_tim)		\
-do {									\
-	(__p)->flags = 0;						\
-	(__p)->args = (__a);						\
-	(__p)->tx = NULL;						\
-	(__p)->tx_len = 0;						\
-	(__p)->tx_timeout = 0;						\
-	(__p)->rx = (__r);						\
-	(__p)->rx_len = (__r_len);					\
-	(__p)->rx_timeout = (__r_tim);					\
-} while (0)
-
-#define mbox_xfer_init_txrx(__p, __a, __t, __t_len, __t_tim, __r, __r_len, __r_tim)\
-do {									\
-	(__p)->flags = 0;						\
-	(__p)->args = (__a);						\
-	(__p)->tx = (__t);						\
-	(__p)->tx_len = (__t_len);					\
-	(__p)->tx_timeout = (__t_tim);					\
-	(__p)->rx = (__r);						\
-	(__p)->rx_len = (__r_len);					\
-	(__p)->rx_timeout = (__r_tim);					\
-} while (0)
-
-#define mbox_xfer_set_sequence(__p, __seq)				\
-do {									\
-	(__p)->flags |= MBOX_XFER_SEQ;					\
-	(__p)->seq = (__seq);						\
-} while (0)
-
-/** Representation of a mailbox controller */
-struct mbox_controller {
-	/** List head */
-	struct sbi_dlist node;
-	/** Next sequence atomic counter */
-	atomic_t xfer_next_seq;
-	/* List of mailbox channels */
-	struct sbi_dlist chan_list;
-	/** Unique ID of the mailbox controller assigned by the driver */
-	unsigned int id;
-	/** Maximum length of transfer supported by the mailbox controller */
-	unsigned int max_xfer_len;
-	/** Pointer to mailbox driver owning this mailbox controller */
-	void *driver;
-	/** Request a mailbox channel from the mailbox controller */
-	struct mbox_chan *(*request_chan)(struct mbox_controller *mbox,
-					  u32 *chan_args);
-	/** Free a mailbox channel from the mailbox controller */
-	void (*free_chan)(struct mbox_controller *mbox,
-			  struct mbox_chan *chan);
-	/** Transfer data over mailbox channel */
-	int (*xfer)(struct mbox_chan *chan, struct mbox_xfer *xfer);
-	/** Get an attribute of mailbox channel */
-	int (*get_attribute)(struct mbox_chan *chan, int attr_id, void *out_value);
-	/** Set an attribute of mailbox channel */
-	int (*set_attribute)(struct mbox_chan *chan, int attr_id, void *new_value);
-};
-
-#define to_mbox_controller(__node)	\
-	container_of((__node), struct mbox_controller, node)
-
-/** Find a registered mailbox controller */
-struct mbox_controller *mbox_controller_find(unsigned int id);
-
-/** Register mailbox controller */
-int mbox_controller_add(struct mbox_controller *mbox);
-
-/** Un-register mailbox controller */
-void mbox_controller_remove(struct mbox_controller *mbox);
-
-/** Request a mailbox channel */
-struct mbox_chan *mbox_controller_request_chan(struct mbox_controller *mbox,
-					       u32 *chan_args);
-
-/** Free a mailbox channel */
-void mbox_controller_free_chan(struct mbox_chan *chan);
-
-/** Data transfer over mailbox channel */
-int mbox_chan_xfer(struct mbox_chan *chan, struct mbox_xfer *xfer);
-
-/** Get an attribute of mailbox channel */
-int mbox_chan_get_attribute(struct mbox_chan *chan, int attr_id, void *out_value);
-
-/** Set an attribute of mailbox channel */
-int mbox_chan_set_attribute(struct mbox_chan *chan, int attr_id, void *new_value);
-
-#endif

include/sbi_utils/mailbox/rpmi_mailbox.h

@@ -1,33 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2023 Ventana Micro Systems Inc.
- *
- * Authors:
- *   Anup Patel <apatel@ventanamicro.com>
- */
-
-#ifndef __RPMI_MAILBOX_H__
-#define __RPMI_MAILBOX_H__
-
-#include <sbi/sbi_error.h>
-#include <sbi_utils/mailbox/mailbox.h>
-#include <sbi_utils/mailbox/rpmi_msgprot.h>
-
-#define rpmi_u32_count(__var)	(sizeof(__var) / sizeof(u32))
-
-/** Convert RPMI error to SBI error */
-int rpmi_xlate_error(enum rpmi_error error);
-
-/** Typical RPMI normal request with at least status code in response */
-int rpmi_normal_request_with_status(
-			struct mbox_chan *chan, u32 service_id,
-			void *req, u32 req_words, u32 req_endian_words,
-			void *resp, u32 resp_words, u32 resp_endian_words);
-
-/* RPMI posted request which is without any response*/
-int rpmi_posted_request(
-		struct mbox_chan *chan, u32 service_id,
-		void *req, u32 req_words, u32 req_endian_words);
-
-#endif /* !__RPMI_MAILBOX_H__ */

include/sbi_utils/mailbox/rpmi_msgprot.h

@@ -1,706 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2023 Ventana Micro Systems Inc.
- *
- * Authors:
- *   Rahul Pathak <rpathak@ventanamicro.com>
- *   Subrahmanya Lingappa <slingappa@ventanamicro.com>
- */
-
-#ifndef __RPMI_MSGPROT_H__
-#define __RPMI_MSGPROT_H__
-
-#include <sbi/sbi_byteorder.h>
-#include <sbi/sbi_error.h>
-
-/*
- * 31                                            0
- * +---------------------+-----------------------+
- * | FLAGS | SERVICE_ID  |   SERVICEGROUP_ID     |
- * +---------------------+-----------------------+
- * |        TOKEN        |     DATA LENGTH       |
- * +---------------------+-----------------------+
- * |                 DATA/PAYLOAD                |
- * +---------------------------------------------+
- */
-
-/** Message Header byte offset */
-#define RPMI_MSG_HDR_OFFSET			(0x0)
-/** Message Header Size in bytes */
-#define RPMI_MSG_HDR_SIZE			(8)
-
-/** ServiceGroup ID field byte offset */
-#define RPMI_MSG_SERVICEGROUP_ID_OFFSET		(0x0)
-/** ServiceGroup ID field size in bytes */
-#define RPMI_MSG_SERVICEGROUP_ID_SIZE		(2)
-
-/** Service ID field byte offset */
-#define RPMI_MSG_SERVICE_ID_OFFSET		(0x2)
-/** Service ID field size in bytes */
-#define RPMI_MSG_SERVICE_ID_SIZE		(1)
-
-/** Flags field byte offset */
-#define RPMI_MSG_FLAGS_OFFSET			(0x3)
-/** Flags field size in bytes */
-#define RPMI_MSG_FLAGS_SIZE			(1)
-
-#define RPMI_MSG_FLAGS_TYPE_POS			(0U)
-#define RPMI_MSG_FLAGS_TYPE_MASK		0x7
-#define RPMI_MSG_FLAGS_TYPE			\
-	((0x7) << RPMI_MSG_FLAGS_TYPE_POS)
-
-#define RPMI_MSG_FLAGS_DOORBELL_POS		(3U)
-#define RPMI_MSG_FLAGS_DOORBELL_MASK		0x1
-#define RPMI_MSG_FLAGS_DOORBELL			\
-	((0x1) << RPMI_MSG_FLAGS_DOORBELL_POS)
-
-/** Data length field byte offset */
-#define RPMI_MSG_DATALEN_OFFSET			(0x4)
-/** Data length field size in bytes */
-#define RPMI_MSG_DATALEN_SIZE			(2)
-
-/** Token field byte offset */
-#define RPMI_MSG_TOKEN_OFFSET			(0x6)
-/** Token field size in bytes */
-#define RPMI_MSG_TOKEN_SIZE			(2)
-/** Token field mask */
-#define RPMI_MSG_TOKEN_MASK			(0xffffU)
-
-/** Data field byte offset */
-#define RPMI_MSG_DATA_OFFSET			(RPMI_MSG_HDR_SIZE)
-/** Data field size in bytes */
-#define RPMI_MSG_DATA_SIZE(__slot_size)		((__slot_size) - RPMI_MSG_HDR_SIZE)
-
-/** Minimum slot size in bytes */
-#define RPMI_SLOT_SIZE_MIN			(64)
-
-/** Name length of 16 characters */
-#define RPMI_NAME_CHARS_MAX			(16)
-
-/** Queue layout */
-#define RPMI_QUEUE_HEAD_SLOT		0
-#define RPMI_QUEUE_TAIL_SLOT		1
-#define RPMI_QUEUE_HEADER_SLOTS		2
-
-/** Default timeout values */
-#define RPMI_DEF_TX_TIMEOUT			20
-#define RPMI_DEF_RX_TIMEOUT			20
-
-/**
- * Common macro to generate composite version from major
- * and minor version numbers.
- *
- * RPMI has Specification version, Implementation version
- * Service group versions which follow the same versioning
- * encoding as below.
- */
-#define RPMI_VERSION(__major, __minor) (((__major) << 16) | (__minor))
-
-/** RPMI Message Header */
-struct rpmi_message_header {
-	le16_t servicegroup_id;
-	uint8_t service_id;
-	uint8_t flags;
-	le16_t datalen;
-	le16_t token;
-} __packed;
-
-/** RPMI Message */
-struct rpmi_message {
-	struct rpmi_message_header header;
-	u8 data[0];
-} __packed;
-
-/** RPMI Messages Types */
-enum rpmi_message_type {
-	/* Normal request backed with ack */
-	RPMI_MSG_NORMAL_REQUEST = 0x0,
-	/* Request without any ack */
-	RPMI_MSG_POSTED_REQUEST = 0x1,
-	/* Acknowledgment for normal request message */
-	RPMI_MSG_ACKNOWLDGEMENT = 0x2,
-	/* Notification message */
-	RPMI_MSG_NOTIFICATION = 0x3,
-};
-
-/** RPMI Error Types */
-enum rpmi_error {
-	/* Success */
-	RPMI_SUCCESS		= 0,
-	/* General failure  */
-	RPMI_ERR_FAILED		= -1,
-	/* Service or feature not supported */
-	RPMI_ERR_NOTSUPP	= -2,
-	/* Invalid Parameter  */
-	RPMI_ERR_INVALID_PARAM    = -3,
-	/*
-	 * Denied to insufficient permissions
-	 * or due to unmet prerequisite
-	 */
-	RPMI_ERR_DENIED		= -4,
-	/* Invalid address or offset */
-	RPMI_ERR_INVALID_ADDR	= -5,
-	/*
-	 * Operation failed as it was already in
-	 * progress or the state has changed already
-	 * for which the operation was carried out.
-	 */
-	RPMI_ERR_ALREADY	= -6,
-	/*
-	 * Error in implementation which violates
-	 * the specification version
-	 */
-	RPMI_ERR_EXTENSION	= -7,
-	/* Operation failed due to hardware issues */
-	RPMI_ERR_HW_FAULT	= -8,
-	/* System, device or resource is busy */
-	RPMI_ERR_BUSY		= -9,
-	/* System or device or resource in invalid state */
-	RPMI_ERR_INVALID_STATE	= -10,
-	/* Index, offset or address is out of range */
-	RPMI_ERR_BAD_RANGE	= -11,
-	/* Operation timed out */
-	RPMI_ERR_TIMEOUT	= -12,
-	/*
-	 * Error in input or output or
-	 * error in sending or receiving data
-	 * through communication medium
-	 */
-	RPMI_ERR_IO		= -13,
-	/* No data available */
-	RPMI_ERR_NO_DATA	= -14,
-	RPMI_ERR_RESERVED_START	= -15,
-	RPMI_ERR_RESERVED_END	= -127,
-	RPMI_ERR_VENDOR_START	= -128,
-};
-
-/** RPMI Mailbox Message Arguments */
-struct rpmi_message_args {
-	u32 flags;
-#define RPMI_MSG_FLAGS_NO_TX		(1U << 0)
-#define RPMI_MSG_FLAGS_NO_RX		(1U << 1)
-#define RPMI_MSG_FLAGS_NO_RX_TOKEN	(1U << 2)
-	enum rpmi_message_type type;
-	u8 service_id;
-	u32 tx_endian_words;
-	u32 rx_endian_words;
-	u16 rx_token;
-	u32 rx_data_len;
-};
-
-/** RPMI Mailbox Channel Attribute IDs */
-enum rpmi_channel_attribute_id {
-	RPMI_CHANNEL_ATTR_PROTOCOL_VERSION = 0,
-	RPMI_CHANNEL_ATTR_MAX_DATA_LEN,
-	RPMI_CHANNEL_ATTR_P2A_DOORBELL_SYSMSI_INDEX,
-	RPMI_CHANNEL_ATTR_TX_TIMEOUT,
-	RPMI_CHANNEL_ATTR_RX_TIMEOUT,
-	RPMI_CHANNEL_ATTR_SERVICEGROUP_ID,
-	RPMI_CHANNEL_ATTR_SERVICEGROUP_VERSION,
-	RPMI_CHANNEL_ATTR_IMPL_ID,
-	RPMI_CHANNEL_ATTR_IMPL_VERSION,
-	RPMI_CHANNEL_ATTR_MAX,
-};
-
-/*
- * RPMI SERVICEGROUPS AND SERVICES
- */
-
-/** RPMI ServiceGroups IDs */
-enum rpmi_servicegroup_id {
-	RPMI_SRVGRP_ID_MIN = 0,
-	RPMI_SRVGRP_BASE = 0x0001,
-	RPMI_SRVGRP_SYSTEM_MSI = 0x0002,
-	RPMI_SRVGRP_SYSTEM_RESET = 0x0003,
-	RPMI_SRVGRP_SYSTEM_SUSPEND = 0x0004,
-	RPMI_SRVGRP_HSM = 0x0005,
-	RPMI_SRVGRP_CPPC = 0x0006,
-	RPMI_SRVGRP_CLOCK = 0x0008,
-	RPMI_SRVGRP_ID_MAX_COUNT,
-
-	/* Reserved range for service groups */
-	RPMI_SRVGRP_RESERVE_START = RPMI_SRVGRP_ID_MAX_COUNT,
-	RPMI_SRVGRP_RESERVE_END = 0x7FFF,
-
-	/* Vendor/Implementation-specific service groups range */
-	RPMI_SRVGRP_VENDOR_START = 0x8000,
-	RPMI_SRVGRP_VENDOR_END = 0xFFFF,
-};
-
-/** RPMI enable notification request */
-struct rpmi_enable_notification_req {
-	u32 eventid;
-};
-
-/** RPMI enable notification response */
-struct rpmi_enable_notification_resp {
-	s32 status;
-};
-
-/** RPMI Base ServiceGroup Service IDs */
-enum rpmi_base_service_id {
-	RPMI_BASE_SRV_ENABLE_NOTIFICATION = 0x01,
-	RPMI_BASE_SRV_GET_IMPLEMENTATION_VERSION = 0x02,
-	RPMI_BASE_SRV_GET_IMPLEMENTATION_IDN = 0x03,
-	RPMI_BASE_SRV_GET_SPEC_VERSION = 0x04,
-	RPMI_BASE_SRV_GET_PLATFORM_INFO = 0x05,
-	RPMI_BASE_SRV_PROBE_SERVICE_GROUP = 0x06,
-	RPMI_BASE_SRV_GET_ATTRIBUTES = 0x07,
-};
-
-#define RPMI_BASE_FLAGS_F0_PRIVILEGE		(1U << 1)
-#define RPMI_BASE_FLAGS_F0_EV_NOTIFY		(1U << 0)
-
-enum rpmi_base_context_priv_level {
-	RPMI_BASE_CONTEXT_PRIV_S_MODE,
-	RPMI_BASE_CONTEXT_PRIV_M_MODE,
-};
-
-struct rpmi_base_get_attributes_resp {
-	s32 status_code;
-	u32 f0;
-	u32 f1;
-	u32 f2;
-	u32 f3;
-};
-
-struct rpmi_base_get_platform_info_resp {
-	s32 status;
-	u32 plat_info_len;
-	char plat_info[];
-};
-
-/** RPMI System MSI ServiceGroup Service IDs */
-enum rpmi_sysmsi_service_id {
-	RPMI_SYSMSI_SRV_ENABLE_NOTIFICATION = 0x01,
-	RPMI_SYSMSI_SRV_GET_ATTRIBUTES = 0x2,
-	RPMI_SYSMSI_SRV_GET_MSI_ATTRIBUTES = 0x3,
-	RPMI_SYSMSI_SRV_SET_MSI_STATE = 0x4,
-	RPMI_SYSMSI_SRV_GET_MSI_STATE = 0x5,
-	RPMI_SYSMSI_SRV_SET_MSI_TARGET = 0x6,
-	RPMI_SYSMSI_SRV_GET_MSI_TARGET = 0x7,
-	RPMI_SYSMSI_SRV_ID_MAX_COUNT,
-};
-
-/** Response for system MSI service group attributes */
-struct rpmi_sysmsi_get_attributes_resp {
-	s32 status;
-	u32 sys_num_msi;
-	u32 flag0;
-	u32 flag1;
-};
-
-/** Request for system MSI attributes */
-struct rpmi_sysmsi_get_msi_attributes_req {
-	u32 sys_msi_index;
-};
-
-/** Response for system MSI attributes */
-struct rpmi_sysmsi_get_msi_attributes_resp {
-	s32 status;
-	u32 flag0;
-	u32 flag1;
-	u8 name[16];
-};
-
-#define RPMI_SYSMSI_MSI_ATTRIBUTES_FLAG0_PREF_PRIV	(1U << 0)
-
-/** Request for system MSI set state */
-struct rpmi_sysmsi_set_msi_state_req {
-	u32 sys_msi_index;
-	u32 sys_msi_state;
-};
-
-#define RPMI_SYSMSI_MSI_STATE_ENABLE			(1U << 0)
-#define RPMI_SYSMSI_MSI_STATE_PENDING			(1U << 1)
-
-/** Response for system MSI set state */
-struct rpmi_sysmsi_set_msi_state_resp {
-	s32 status;
-};
-
-/** Request for system MSI get state */
-struct rpmi_sysmsi_get_msi_state_req {
-	u32 sys_msi_index;
-};
-
-/** Response for system MSI get state */
-struct rpmi_sysmsi_get_msi_state_resp {
-	s32 status;
-	u32 sys_msi_state;
-};
-
-/** Request for system MSI set target */
-struct rpmi_sysmsi_set_msi_target_req {
-	u32 sys_msi_index;
-	u32 sys_msi_address_low;
-	u32 sys_msi_address_high;
-	u32 sys_msi_data;
-};
-
-/** Response for system MSI set target */
-struct rpmi_sysmsi_set_msi_target_resp {
-	s32 status;
-};
-
-/** Request for system MSI get target */
-struct rpmi_sysmsi_get_msi_target_req {
-	u32 sys_msi_index;
-};
-
-/** Response for system MSI get target */
-struct rpmi_sysmsi_get_msi_target_resp {
-	s32 status;
-	u32 sys_msi_address_low;
-	u32 sys_msi_address_high;
-	u32 sys_msi_data;
-};
-
-/** RPMI System Reset ServiceGroup Service IDs */
-enum rpmi_system_reset_service_id {
-	RPMI_SYSRST_SRV_ENABLE_NOTIFICATION = 0x01,
-	RPMI_SYSRST_SRV_GET_ATTRIBUTES = 0x02,
-	RPMI_SYSRST_SRV_SYSTEM_RESET = 0x03,
-	RPMI_SYSRST_SRV_ID_MAX_COUNT,
-};
-
-/** RPMI System Reset types */
-enum rpmi_sysrst_reset_type {
-	RPMI_SYSRST_TYPE_SHUTDOWN = 0x0,
-	RPMI_SYSRST_TYPE_COLD_REBOOT = 0x1,
-	RPMI_SYSRST_TYPE_WARM_REBOOT = 0x2,
-	RPMI_SYSRST_TYPE_MAX,
-};
-
-#define RPMI_SYSRST_ATTRS_FLAGS_RESETTYPE_POS		(1)
-#define RPMI_SYSRST_ATTRS_FLAGS_RESETTYPE_MASK		\
-			(1U << RPMI_SYSRST_ATTRS_FLAGS_RESETTYPE_POS)
-
-/** Response for system reset attributes */
-struct rpmi_sysrst_get_reset_attributes_resp {
-	s32 status;
-	u32 flags;
-};
-
-/** RPMI System Suspend ServiceGroup Service IDs */
-enum rpmi_system_suspend_service_id {
-	RPMI_SYSSUSP_SRV_ENABLE_NOTIFICATION = 0x01,
-	RPMI_SYSSUSP_SRV_GET_ATTRIBUTES = 0x02,
-	RPMI_SYSSUSP_SRV_SYSTEM_SUSPEND = 0x03,
-	RPMI_SYSSUSP_SRV_ID_MAX_COUNT,
-};
-
-/** Request for system suspend attributes */
-struct rpmi_syssusp_get_attr_req {
-	u32 susp_type;
-};
-
-#define RPMI_SYSSUSP_ATTRS_FLAGS_RESUMEADDR	(1U << 1)
-#define RPMI_SYSSUSP_ATTRS_FLAGS_SUSPENDTYPE	1U
-
-/** Response for system suspend attributes */
-struct rpmi_syssusp_get_attr_resp {
-	s32 status;
-	u32 flags;
-};
-
-struct rpmi_syssusp_suspend_req {
-	u32 hartid;
-	u32 suspend_type;
-	u32 resume_addr_lo;
-	u32 resume_addr_hi;
-};
-
-struct rpmi_syssusp_suspend_resp {
-	s32 status;
-};
-
-/** RPMI HSM State Management ServiceGroup Service IDs */
-enum rpmi_hsm_service_id {
-	RPMI_HSM_SRV_ENABLE_NOTIFICATION = 0x01,
-	RPMI_HSM_SRV_GET_HART_STATUS = 0x02,
-	RPMI_HSM_SRV_GET_HART_LIST = 0x03,
-	RPMI_HSM_SRV_GET_SUSPEND_TYPES = 0x04,
-	RPMI_HSM_SRV_GET_SUSPEND_INFO = 0x05,
-	RPMI_HSM_SRV_HART_START = 0x06,
-	RPMI_HSM_SRV_HART_STOP = 0x07,
-	RPMI_HSM_SRV_HART_SUSPEND = 0x08,
-	RPMI_HSM_SRV_ID_MAX = 0x09,
-};
-
-/* HSM service group request and response structs */
-struct rpmi_hsm_hart_start_req {
-	u32 hartid;
-	u32 start_addr_lo;
-	u32 start_addr_hi;
-};
-
-struct rpmi_hsm_hart_start_resp {
-	s32 status;
-};
-
-struct rpmi_hsm_hart_stop_req {
-	u32 hartid;
-};
-
-struct rpmi_hsm_hart_stop_resp {
-	s32 status;
-};
-
-struct rpmi_hsm_hart_susp_req {
-	u32 hartid;
-	u32 suspend_type;
-	u32 resume_addr_lo;
-	u32 resume_addr_hi;
-};
-
-struct rpmi_hsm_hart_susp_resp {
-	s32 status;
-};
-
-struct rpmi_hsm_get_hart_status_req {
-	u32 hartid;
-};
-
-struct rpmi_hsm_get_hart_status_resp {
-	s32 status;
-	u32 hart_status;
-};
-
-struct rpmi_hsm_get_hart_list_req {
-	u32 start_index;
-};
-
-struct rpmi_hsm_get_hart_list_resp {
-	s32 status;
-	u32 remaining;
-	u32 returned;
-	/* remaining space need to be adjusted for the above 3 u32's */
-	u32 hartid[(RPMI_MSG_DATA_SIZE(RPMI_SLOT_SIZE_MIN) - (sizeof(u32) * 3)) / sizeof(u32)];
-};
-
-struct rpmi_hsm_get_susp_types_req {
-	u32 start_index;
-};
-
-struct rpmi_hsm_get_susp_types_resp {
-	s32 status;
-	u32 remaining;
-	u32 returned;
-	/* remaining space need to be adjusted for the above 3 u32's */
-	u32 types[(RPMI_MSG_DATA_SIZE(RPMI_SLOT_SIZE_MIN) - (sizeof(u32) * 3)) / sizeof(u32)];
-};
-
-struct rpmi_hsm_get_susp_info_req {
-	u32 suspend_type;
-};
-
-#define RPMI_HSM_SUSPEND_INFO_FLAGS_TIMER_STOP		1U
-
-struct rpmi_hsm_get_susp_info_resp {
-	s32 status;
-	u32 flags;
-	u32 entry_latency_us;
-	u32 exit_latency_us;
-	u32 wakeup_latency_us;
-	u32 min_residency_us;
-};
-
-/** RPMI CPPC ServiceGroup Service IDs */
-enum rpmi_cppc_service_id {
-	RPMI_CPPC_SRV_ENABLE_NOTIFICATION = 0x01,
-	RPMI_CPPC_SRV_PROBE_REG = 0x02,
-	RPMI_CPPC_SRV_READ_REG = 0x03,
-	RPMI_CPPC_SRV_WRITE_REG = 0x04,
-	RPMI_CPPC_SRV_GET_FAST_CHANNEL_REGION = 0x05,
-	RPMI_CPPC_SRV_GET_FAST_CHANNEL_OFFSET = 0x06,
-	RPMI_CPPC_SRV_GET_HART_LIST = 0x07,
-	RPMI_CPPC_SRV_MAX_COUNT,
-};
-
-struct rpmi_cppc_probe_req {
-	u32 hart_id;
-	u32 reg_id;
-};
-
-struct rpmi_cppc_probe_resp {
-	s32 status;
-	u32 reg_len;
-};
-
-struct rpmi_cppc_read_reg_req {
-	u32 hart_id;
-	u32 reg_id;
-};
-
-struct rpmi_cppc_read_reg_resp {
-	s32 status;
-	u32 data_lo;
-	u32 data_hi;
-};
-
-struct rpmi_cppc_write_reg_req {
-	u32 hart_id;
-	u32 reg_id;
-	u32 data_lo;
-	u32 data_hi;
-};
-
-struct rpmi_cppc_write_reg_resp {
-	s32 status;
-};
-
-struct rpmi_cppc_get_fastchan_offset_req {
-	u32 hart_id;
-};
-
-struct rpmi_cppc_get_fastchan_offset_resp {
-	s32 status;
-	u32 fc_perf_request_offset_lo;
-	u32 fc_perf_request_offset_hi;
-	u32 fc_perf_feedback_offset_lo;
-	u32 fc_perf_feedback_offset_hi;
-};
-
-#define RPMI_CPPC_FAST_CHANNEL_CPPC_MODE_POS		3
-#define RPMI_CPPC_FAST_CHANNEL_CPPC_MODE_MASK		\
-			(3U << RPMI_CPPC_FAST_CHANNEL_CPPC_MODE_POS)
-#define RPMI_CPPC_FAST_CHANNEL_FLAGS_DB_WIDTH_POS	1
-#define RPMI_CPPC_FAST_CHANNEL_FLAGS_DB_WIDTH_MASK	\
-			(3U << RPMI_CPPC_FAST_CHANNEL_FLAGS_DB_WIDTH_POS)
-#define RPMI_CPPC_FAST_CHANNEL_FLAGS_DB_SUPPORTED	(1U << 0)
-
-struct rpmi_cppc_get_fastchan_region_resp {
-	s32 status;
-	u32 flags;
-	u32 region_addr_lo;
-	u32 region_addr_hi;
-	u32 region_size_lo;
-	u32 region_size_hi;
-	u32 db_addr_lo;
-	u32 db_addr_hi;
-	u32 db_setmask_lo;
-	u32 db_setmask_hi;
-	u32 db_preservemask_lo;
-	u32 db_preservemask_hi;
-};
-
-enum rpmi_cppc_fast_channel_db_width {
-	RPMI_CPPC_FAST_CHANNEL_DB_WIDTH_8 = 0x0,
-	RPMI_CPPC_FAST_CHANNEL_DB_WIDTH_16 = 0x1,
-	RPMI_CPPC_FAST_CHANNEL_DB_WIDTH_32 = 0x2,
-	RPMI_CPPC_FAST_CHANNEL_DB_WIDTH_64 = 0x3,
-};
-
-enum rpmi_cppc_fast_channel_cppc_mode {
-	RPMI_CPPC_FAST_CHANNEL_CPPC_MODE_PASSIVE = 0x0,
-	RPMI_CPPC_FAST_CHANNEL_CPPC_MODE_ACTIVE = 0x1,
-	RPMI_CPPC_FAST_CHANNEL_CPPC_MODE_MAX_IDX,
-};
-
-struct rpmi_cppc_hart_list_req {
-	u32 start_index;
-};
-
-struct rpmi_cppc_hart_list_resp {
-	s32 status;
-	u32 remaining;
-	u32 returned;
-	/* remaining space need to be adjusted for the above 3 u32's */
-	u32 hartid[(RPMI_MSG_DATA_SIZE(RPMI_SLOT_SIZE_MIN) - (sizeof(u32) * 3)) / sizeof(u32)];
-};
-
-/** RPMI Clock ServiceGroup Service IDs */
-enum rpmi_clock_service_id {
-	RPMI_CLOCK_SRV_ENABLE_NOTIFICATION = 0x01,
-	RPMI_CLOCK_SRV_GET_NUM_CLOCKS = 0x02,
-	RPMI_CLOCK_SRV_GET_ATTRIBUTES = 0x03,
-	RPMI_CLOCK_SRV_GET_SUPPORTED_RATES = 0x04,
-	RPMI_CLOCK_SRV_SET_CONFIG = 0x05,
-	RPMI_CLOCK_SRV_GET_CONFIG = 0x06,
-	RPMI_CLOCK_SRV_SET_RATE = 0x07,
-	RPMI_CLOCK_SRV_GET_RATE = 0x08,
-	RPMI_CLOCK_SRV_MAX_COUNT,
-};
-
-struct rpmi_clock_get_num_clocks_resp {
-	s32 status;
-	u32 num_clocks;
-};
-
-struct rpmi_clock_get_attributes_req {
-	u32 clock_id;
-};
-
-struct rpmi_clock_get_attributes_resp {
-	s32 status;
-#define RPMI_CLOCK_FLAGS_FORMAT_POS		30
-#define RPMI_CLOCK_FLAGS_FORMAT_MASK		\
-			(3U << RPMI_CLOCK_FLAGS_CLOCK_FORMAT_POS)
-#define RPMI_CLOCK_FLAGS_FORMAT_DISCRETE	0
-#define RPMI_CLOCK_FLAGS_FORMAT_LINEAR		1
-	u32 flags;
-	u32 num_rates;
-	u32 transition_latency;
-	u8 name[16];
-};
-
-struct rpmi_clock_get_supported_rates_req {
-	u32 clock_id;
-	u32 clock_rate_index;
-};
-
-struct rpmi_clock_get_supported_rates_resp {
-	s32 status;
-	u32 flags;
-	u32 remaining;
-	u32 returned;
-	u32 clock_rate[0];
-};
-
-struct rpmi_clock_set_config_req {
-	u32 clock_id;
-#define RPMI_CLOCK_CONFIG_ENABLE		(1U << 0)
-	u32 config;
-};
-
-struct rpmi_clock_set_config_resp {
-	s32 status;
-};
-
-struct rpmi_clock_get_config_req {
-	u32 clock_id;
-};
-
-struct rpmi_clock_get_config_resp {
-	s32 status;
-	u32 config;
-};
-
-struct rpmi_clock_set_rate_req {
-	u32 clock_id;
-#define RPMI_CLOCK_SET_RATE_FLAGS_MASK		(3U << 0)
-#define RPMI_CLOCK_SET_RATE_FLAGS_ROUND_DOWN	0
-#define RPMI_CLOCK_SET_RATE_FLAGS_ROUND_UP	1
-#define RPMI_CLOCK_SET_RATE_FLAGS_ROUND_PLAT	2
-	u32 flags;
-	u32 clock_rate_low;
-	u32 clock_rate_high;
-};
-
-struct rpmi_clock_set_rate_resp {
-	s32 status;
-};
-
-struct rpmi_clock_get_rate_req {
-	u32 clock_id;
-};
-
-struct rpmi_clock_get_rate_resp {
-	s32 status;
-	u32 clock_rate_low;
-	u32 clock_rate_high;
-};
-
-#endif /* !__RPMI_MSGPROT_H__ */

include/sbi_utils/mpxy/fdt_mpxy.h

@@ -1,26 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2024 Ventana Micro Systems Inc.
- *
- * Authors:
- *   Anup Patel <apatel@ventanamicro.com>
- */
-
-#ifndef __FDT_MPXY_H__
-#define __FDT_MPXY_H__
-
-#include <sbi/sbi_types.h>
-#include <sbi_utils/fdt/fdt_driver.h>
-
-#ifdef CONFIG_FDT_MPXY
-
-int fdt_mpxy_init(const void *fdt);
-
-#else
-
-static inline int fdt_mpxy_init(const void *fdt) { return 0; }
-
-#endif
-
-#endif

include/sbi_utils/mpxy/fdt_mpxy_rpmi_mbox.h

@@ -1,85 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2024 Ventana Micro Systems Inc.
- *
- * Authors:
- *   Anup Patel <apatel@ventanamicro.com>
- */
-
-#ifndef __FDT_MPXY_RPMI_MBOX_H__
-#define __FDT_MPXY_RPMI_MBOX_H__
-
-#include <sbi/sbi_types.h>
-#include <sbi/sbi_mpxy.h>
-#include <sbi_utils/mailbox/fdt_mailbox.h>
-#include <sbi_utils/mailbox/rpmi_msgprot.h>
-#include <sbi_utils/mpxy/fdt_mpxy.h>
-
-/** Convert the mpxy attribute ID to attribute array index */
-#define attr_id2index(attr_id)	(attr_id - SBI_MPXY_ATTR_MSGPROTO_ATTR_START)
-
-enum mpxy_msgprot_rpmi_attr_id {
-	MPXY_MSGPROT_RPMI_ATTR_SERVICEGROUP_ID = SBI_MPXY_ATTR_MSGPROTO_ATTR_START,
-	MPXY_MSGPROT_RPMI_ATTR_SERVICEGROUP_VERSION,
-	MPXY_MSGPROT_RPMI_ATTR_IMPL_ID,
-	MPXY_MSGPROT_RPMI_ATTR_IMPL_VERSION,
-	MPXY_MSGPROT_RPMI_ATTR_MAX_ID
-};
-
-/**
- * MPXY message protocol attributes for RPMI
- * Order of attribute fields must follow the
- * attribute IDs in `enum mpxy_msgprot_rpmi_attr_id`
- */
-struct mpxy_rpmi_channel_attrs {
-	u32 servicegrp_id;
-	u32 servicegrp_ver;
-	u32 impl_id;
-	u32 impl_ver;
-};
-
-/** Make sure all attributes are packed for direct memcpy */
-#define assert_field_offset(field, attr_offset)				\
-	_Static_assert(							\
-		((offsetof(struct mpxy_rpmi_channel_attrs, field)) /	\
-		 sizeof(u32)) == (attr_offset - SBI_MPXY_ATTR_MSGPROTO_ATTR_START),\
-		"field " #field						\
-		" from struct mpxy_rpmi_channel_attrs invalid offset, expected " #attr_offset)
-
-assert_field_offset(servicegrp_id, MPXY_MSGPROT_RPMI_ATTR_SERVICEGROUP_ID);
-assert_field_offset(servicegrp_ver, MPXY_MSGPROT_RPMI_ATTR_SERVICEGROUP_VERSION);
-assert_field_offset(impl_id, MPXY_MSGPROT_RPMI_ATTR_IMPL_ID);
-assert_field_offset(impl_ver, MPXY_MSGPROT_RPMI_ATTR_IMPL_VERSION);
-
-/** MPXY RPMI service data for each service group */
-struct mpxy_rpmi_service_data {
-	u8 id;
-	u32 min_tx_len;
-	u32 max_tx_len;
-	u32 min_rx_len;
-	u32 max_rx_len;
-};
-
-/** MPXY RPMI mbox data for each service group */
-struct mpxy_rpmi_mbox_data {
-	u32 servicegrp_id;
-	u32 num_services;
-	struct mpxy_rpmi_service_data *service_data;
-
-	/** Transfer RPMI service group message */
-	int (*xfer_group)(void *context, struct mbox_chan *chan,
-			  struct mbox_xfer *xfer);
-
-	/** Setup RPMI service group context for MPXY */
-	int (*setup_group)(void **context, struct mbox_chan *chan,
-			   const struct mpxy_rpmi_mbox_data *data);
-
-	/** Cleanup RPMI service group context for MPXY */
-	void (*cleanup_group)(void *context);
-};
-
-/** Common probe function for MPXY RPMI drivers */
-int mpxy_rpmi_mbox_init(const void *fdt, int nodeoff, const struct fdt_match *match);
-
-#endif

include/sbi_utils/regmap/fdt_regmap.h

@@ -10,16 +10,22 @@
 #ifndef __FDT_REGMAP_H__
 #define __FDT_REGMAP_H__
 
-#include <sbi_utils/fdt/fdt_driver.h>
 #include <sbi_utils/regmap/regmap.h>
 
 struct fdt_phandle_args;
 
+/** FDT based regmap driver */
+struct fdt_regmap {
+	const struct fdt_match *match_table;
+	int (*init)(void *fdt, int nodeoff, u32 phandle,
+		    const struct fdt_match *match);
+};
+
 /** Get regmap instance based on phandle */
-int fdt_regmap_get_by_phandle(const void *fdt, u32 phandle,
+int fdt_regmap_get_by_phandle(void *fdt, u32 phandle,
 			      struct regmap **out_rmap);
 
-/** Get regmap instance based on "regmap" property of the specified DT node */
-int fdt_regmap_get(const void *fdt, int nodeoff, struct regmap **out_rmap);
+/** Get regmap instance based on "regmap' property of the specified DT node */
+int fdt_regmap_get(void *fdt, int nodeoff, struct regmap **out_rmap);
 
 #endif

include/sbi_utils/reset/fdt_reset.h

@@ -0,0 +1,44 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c) 2020 Western Digital Corporation or its affiliates.
+ *
+ * Authors:
+ *   Anup Patel <anup.patel@wdc.com>
+ */
+
+#ifndef __FDT_RESET_H__
+#define __FDT_RESET_H__
+
+#include <sbi/sbi_types.h>
+
+struct fdt_reset {
+	const struct fdt_match *match_table;
+	int (*init)(void *fdt, int nodeoff, const struct fdt_match *match);
+};
+
+#ifdef CONFIG_FDT_RESET
+
+/**
+ * fdt_reset_driver_init() - initialize reset driver based on the device-tree
+ */
+int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv);
+
+/**
+ * fdt_reset_init() - initialize reset drivers based on the device-tree
+ *
+ * This function shall be invoked in final init.
+ */
+void fdt_reset_init(void);
+
+#else
+
+static inline int fdt_reset_driver_init(void *fdt, struct fdt_reset *drv)
+{
+	return 0;
+}
+static inline void fdt_reset_init(void) { }
+
+#endif
+
+#endif

include/sbi_utils/serial/fdt_serial.h

@@ -11,15 +11,19 @@
 #define __FDT_SERIAL_H__
 
 #include <sbi/sbi_types.h>
-#include <sbi_utils/fdt/fdt_driver.h>
 
 #ifdef CONFIG_FDT_SERIAL
 
-int fdt_serial_init(const void *fdt);
+struct fdt_serial {
+	const struct fdt_match *match_table;
+	int (*init)(void *fdt, int nodeoff, const struct fdt_match *match);
+};
+
+int fdt_serial_init(void);
 
 #else
 
-static inline int fdt_serial_init(const void *fdt) { return 0; }
+static inline int fdt_serial_init(void) { return 0; }
 
 #endif
 

include/sbi_utils/serial/semihosting.h

@@ -38,10 +38,10 @@ enum semihosting_open_mode {
 
 #ifdef CONFIG_SERIAL_SEMIHOSTING
 int semihosting_init(void);
-bool semihosting_enabled(void);
+int semihosting_enabled(void);
 #else
 static inline int semihosting_init(void) { return SBI_ENODEV; }
-static inline bool semihosting_enabled(void) { return false; }
+static inline int semihosting_enabled(void) { return 0; }
 #endif
 
 #endif

include/sbi_utils/serial/uart8250.h

@@ -12,9 +12,7 @@
 
 #include <sbi/sbi_types.h>
 
-#define UART_CAP_UUE	BIT(0)	/* Check UUE capability for XScale PXA UARTs */
-
 int uart8250_init(unsigned long base, u32 in_freq, u32 baudrate, u32 reg_shift,
-		  u32 reg_width, u32 reg_offset, u32 caps);
+		  u32 reg_width, u32 reg_offset);
 
 #endif

include/sbi_utils/timer/aclint_mtimer.h

@@ -47,6 +47,8 @@ void aclint_mtimer_sync(struct aclint_mtimer_data *mt);
 void aclint_mtimer_set_reference(struct aclint_mtimer_data *mt,
 				 struct aclint_mtimer_data *ref);
 
+int aclint_mtimer_warm_init(void);
+
 int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
 			    struct aclint_mtimer_data *reference);
 

include/sbi_utils/timer/andes_plmt.h

@@ -24,5 +24,6 @@ struct plmt_data {
 };
 
 int plmt_cold_timer_init(struct plmt_data *plmt);
+int plmt_warm_timer_init(void);
 
 #endif /* __TIMER_ANDES_PLMT_H__ */

include/sbi_utils/timer/fdt_timer.h

@@ -11,15 +11,24 @@
 #define __FDT_TIMER_H__
 
 #include <sbi/sbi_types.h>
-#include <sbi_utils/fdt/fdt_driver.h>
 
 #ifdef CONFIG_FDT_TIMER
 
-int fdt_timer_init(void);
+struct fdt_timer {
+	const struct fdt_match *match_table;
+	int (*cold_init)(void *fdt, int nodeoff, const struct fdt_match *match);
+	int (*warm_init)(void);
+	void (*exit)(void);
+};
+
+void fdt_timer_exit(void);
+
+int fdt_timer_init(bool cold_boot);
 
 #else
 
-static inline int fdt_timer_init(void) { return 0; }
+static inline void fdt_timer_exit(void) { }
+static inline int fdt_timer_init(bool cold_boot) { return 0; }
 
 #endif
 

lib/sbi/Kconfig

@@ -66,7 +66,4 @@ config SBI_ECALL_SSE
 	bool "SSE extension"
 	default y
 
-config SBI_ECALL_MPXY
-	bool "MPXY extension"
-	default y
 endmenu

lib/sbi/objects.mk

@@ -61,16 +61,11 @@ libsbi-objs-$(CONFIG_SBI_ECALL_DBTR) += sbi_ecall_dbtr.o
 carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_SSE) += ecall_sse
 libsbi-objs-$(CONFIG_SBI_ECALL_SSE) += sbi_ecall_sse.o
 
-carray-sbi_ecall_exts-$(CONFIG_SBI_ECALL_MPXY) += ecall_mpxy
-libsbi-objs-$(CONFIG_SBI_ECALL_MPXY) += sbi_ecall_mpxy.o
-
 libsbi-objs-y += sbi_bitmap.o
 libsbi-objs-y += sbi_bitops.o
 libsbi-objs-y += sbi_console.o
 libsbi-objs-y += sbi_domain_context.o
-libsbi-objs-y += sbi_domain_data.o
 libsbi-objs-y += sbi_domain.o
-libsbi-objs-y += sbi_double_trap.o
 libsbi-objs-y += sbi_emulate_csr.o
 libsbi-objs-y += sbi_fifo.o
 libsbi-objs-y += sbi_fwft.o
@@ -79,7 +74,6 @@ libsbi-objs-y += sbi_heap.o
 libsbi-objs-y += sbi_math.o
 libsbi-objs-y += sbi_hfence.o
 libsbi-objs-y += sbi_hsm.o
-libsbi-objs-y += sbi_illegal_atomic.o
 libsbi-objs-y += sbi_illegal_insn.o
 libsbi-objs-y += sbi_init.o
 libsbi-objs-y += sbi_ipi.o
@@ -87,7 +81,6 @@ libsbi-objs-y += sbi_irqchip.o
 libsbi-objs-y += sbi_platform.o
 libsbi-objs-y += sbi_pmu.o
 libsbi-objs-y += sbi_dbtr.o
-libsbi-objs-y += sbi_mpxy.o
 libsbi-objs-y += sbi_scratch.o
 libsbi-objs-y += sbi_sse.o
 libsbi-objs-y += sbi_string.o
@@ -96,7 +89,6 @@ libsbi-objs-y += sbi_timer.o
 libsbi-objs-y += sbi_tlb.o
 libsbi-objs-y += sbi_trap.o
 libsbi-objs-y += sbi_trap_ldst.o
-libsbi-objs-y += sbi_trap_v_ldst.o
 libsbi-objs-y += sbi_unpriv.o
 libsbi-objs-y += sbi_expected_trap.o
 libsbi-objs-y += sbi_cppc.o

lib/sbi/riscv_atomic.c

@@ -12,7 +12,7 @@
 #include <sbi/riscv_atomic.h>
 #include <sbi/riscv_barrier.h>
 
-#if !defined(__riscv_atomic) && !defined(__riscv_zalrsc)
+#ifndef __riscv_atomic
 #error "opensbi strongly relies on the A extension of RISC-V"
 #endif
 
@@ -31,7 +31,6 @@ void atomic_write(atomic_t *atom, long value)
 
 long atomic_add_return(atomic_t *atom, long value)
 {
-#ifdef __riscv_atomic
 	long ret;
 #if __SIZEOF_LONG__ == 4
 	__asm__ __volatile__("	amoadd.w.aqrl  %1, %2, %0"
@@ -44,29 +43,6 @@ long atomic_add_return(atomic_t *atom, long value)
 			     : "r"(value)
 			     : "memory");
 #endif
-#elif __riscv_zalrsc
-	long ret, temp;
-#if __SIZEOF_LONG__ == 4
-	__asm__ __volatile__("1:lr.w.aqrl	%1,%0\n"
-			     "  addw	%2,%1,%3\n"
-			     "  sc.w.aqrl	%2,%2,%0\n"
-			     "  bnez	%2,1b"
-			     : "+A"(atom->counter), "=&r"(ret), "=&r"(temp)
-			     : "r"(value)
-			     : "memory");
-#elif __SIZEOF_LONG__ == 8
-	__asm__ __volatile__("1:lr.d.aqrl	%1,%0\n"
-			     "  add	%2,%1,%3\n"
-			     "  sc.d.aqrl	%2,%2,%0\n"
-			     "  bnez	%2,1b"
-			     : "+A"(atom->counter), "=&r"(ret), "=&r"(temp)
-			     : "r"(value)
-			     : "memory");
-#endif
-#else
-#error "need a or zalrsc"
-#endif
-
 	return ret + value;
 }
 
@@ -75,7 +51,6 @@ long atomic_sub_return(atomic_t *atom, long value)
 	return atomic_add_return(atom, -value);
 }
 
-#ifdef __riscv_atomic
 #define __axchg(ptr, new, size)							\
 	({									\
 		__typeof__(ptr) __ptr = (ptr);					\
@@ -101,39 +76,6 @@ long atomic_sub_return(atomic_t *atom, long value)
 		}								\
 		__ret;								\
 	})
-#elif __riscv_zalrsc
-#define __axchg(ptr, new, size)							\
-	({									\
-		__typeof__(ptr) __ptr = (ptr);					\
-		__typeof__(new) __new = (new);					\
-		__typeof__(*(ptr)) __ret, __temp;					\
-		switch (size) {							\
-		case 4:								\
-			__asm__ __volatile__ (					\
-				"1:	lr.w.aqrl %0, %1\n"			\
-				"	sc.w.aqrl %2, %3, %1\n"			\
-				"	bnez	  %2, 1b\n"			\
-				: "=&r" (__ret), "+A" (*__ptr), "=&r" (__temp)	\
-				: "r" (__new)					\
-				: "memory");					\
-			break;							\
-		case 8:								\
-			__asm__ __volatile__ (					\
-				"1:	lr.d.aqrl %0, %1\n"			\
-				"	sc.d.aqrl %2, %3, %1\n"			\
-				"	bnez	  %2, 1b\n"			\
-				: "=&r" (__ret), "+A" (*__ptr), "=&r" (__temp)	\
-				: "r" (__new)					\
-				: "memory");					\
-			break;							\
-		default:							\
-			break;							\
-		}								\
-		__ret;								\
-	})
-#else
-#error "need a or zalrsc"
-#endif
 
 #define axchg(ptr, x)								\
 	({									\

lib/sbi/riscv_locks.c

@@ -53,16 +53,7 @@ void spin_lock(spinlock_t *lock)
 
 	__asm__ __volatile__(
 		/* Atomically increment the next ticket. */
-#ifdef __riscv_atomic
 		"	amoadd.w.aqrl	%0, %4, %3\n"
-#elif __riscv_zalrsc
-		"3:	lr.w.aqrl	%0, %3\n"
-		"	addw	%1, %0, %4\n"
-		"	sc.w.aqrl	%1, %1, %3\n"
-		"	bnez	%1, 3b\n"
-#else
-#error "need a or zalrsc"
-#endif
 
 		/* Did we get the lock? */
 		"	srli	%1, %0, %6\n"

lib/sbi/sbi_dbtr.c

@@ -167,11 +167,11 @@ int sbi_dbtr_init(struct sbi_scratch *scratch, bool coldboot)
 		goto _probed;
 
 	for (i = 0; i < RV_MAX_TRIGGERS; i++) {
-		csr_write_allowed(CSR_TSELECT, &trap, i);
+		csr_write_allowed(CSR_TSELECT, (ulong)&trap, i);
 		if (trap.cause)
 			break;
 
-		val = csr_read_allowed(CSR_TSELECT, &trap);
+		val = csr_read_allowed(CSR_TSELECT, (ulong)&trap);
 		if (trap.cause)
 			break;
 
@@ -182,7 +182,7 @@ int sbi_dbtr_init(struct sbi_scratch *scratch, bool coldboot)
 		if (val != i)
 			break;
 
-		val = csr_read_allowed(CSR_TINFO, &trap);
+		val = csr_read_allowed(CSR_TINFO, (ulong)&trap);
 		if (trap.cause) {
 			/*
 			 * If reading tinfo caused an exception, the
@@ -190,7 +190,7 @@ int sbi_dbtr_init(struct sbi_scratch *scratch, bool coldboot)
 			 * type.
 			 */
 			tdata1 = csr_read_allowed(CSR_TDATA1,
-						  &trap);
+						  (ulong)&trap);
 			if (trap.cause)
 				break;
 
@@ -243,9 +243,10 @@ int sbi_dbtr_setup_shmem(const struct sbi_domain *dom, unsigned long smode,
 			 unsigned long shmem_phys_lo,
 			 unsigned long shmem_phys_hi)
 {
+	u32 hartid = current_hartid();
 	struct sbi_dbtr_hart_triggers_state *hart_state;
 
-	if (dom && !sbi_domain_is_assigned_hart(dom, current_hartindex())) {
+	if (dom && !sbi_domain_is_assigned_hart(dom, hartid)) {
 		sbi_dprintf("%s: calling hart not assigned to this domain\n",
 			   __func__);
 		return SBI_ERR_DENIED;
@@ -506,7 +507,7 @@ int sbi_dbtr_read_trig(unsigned long smode,
 {
 	struct sbi_dbtr_data_msg *xmit;
 	struct sbi_dbtr_trigger *trig;
-	union sbi_dbtr_shmem_entry *entry;
+	struct sbi_dbtr_shmem_entry *entry;
 	void *shmem_base = NULL;
 	struct sbi_dbtr_hart_triggers_state *hs = NULL;
 
@@ -523,17 +524,16 @@ int sbi_dbtr_read_trig(unsigned long smode,
 
 	shmem_base = hart_shmem_base(hs);
 
-	sbi_hart_map_saddr((unsigned long)shmem_base,
-			   trig_count * sizeof(*entry));
 	for_each_trig_entry(shmem_base, trig_count, typeof(*entry), entry) {
+		sbi_hart_map_saddr((unsigned long)entry, sizeof(*entry));
 		xmit = &entry->data;
 		trig = INDEX_TO_TRIGGER((_idx + trig_idx_base));
 		xmit->tstate = cpu_to_lle(trig->state);
 		xmit->tdata1 = cpu_to_lle(trig->tdata1);
 		xmit->tdata2 = cpu_to_lle(trig->tdata2);
 		xmit->tdata3 = cpu_to_lle(trig->tdata3);
+		sbi_hart_unmap_saddr();
 	}
-	sbi_hart_unmap_saddr();
 
 	return SBI_SUCCESS;
 }
@@ -542,7 +542,7 @@ int sbi_dbtr_install_trig(unsigned long smode,
 			  unsigned long trig_count, unsigned long *out)
 {
 	void *shmem_base = NULL;
-	union sbi_dbtr_shmem_entry *entry;
+	struct sbi_dbtr_shmem_entry *entry;
 	struct sbi_dbtr_data_msg *recv;
 	struct sbi_dbtr_id_msg *xmit;
 	unsigned long ctrl;
@@ -557,11 +557,10 @@ int sbi_dbtr_install_trig(unsigned long smode,
 		return SBI_ERR_NO_SHMEM;
 
 	shmem_base = hart_shmem_base(hs);
-	sbi_hart_map_saddr((unsigned long)shmem_base,
-			   trig_count * sizeof(*entry));
 
 	/* Check requested triggers configuration */
 	for_each_trig_entry(shmem_base, trig_count, typeof(*entry), entry) {
+		sbi_hart_map_saddr((unsigned long)entry, sizeof(*entry));
 		recv = (struct sbi_dbtr_data_msg *)(&entry->data);
 		ctrl = recv->tdata1;
 
@@ -576,11 +575,11 @@ int sbi_dbtr_install_trig(unsigned long smode,
 			sbi_hart_unmap_saddr();
 			return SBI_ERR_FAILED;
 		}
+		sbi_hart_unmap_saddr();
 	}
 
 	if (hs->available_trigs < trig_count) {
 		*out = hs->available_trigs;
-		sbi_hart_unmap_saddr();
 		return SBI_ERR_FAILED;
 	}
 
@@ -592,15 +591,16 @@ int sbi_dbtr_install_trig(unsigned long smode,
 		 */
 		trig = sbi_alloc_trigger();
 
+		sbi_hart_map_saddr((unsigned long)entry, sizeof(*entry));
+
 		recv = (struct sbi_dbtr_data_msg *)(&entry->data);
 		xmit = (struct sbi_dbtr_id_msg *)(&entry->id);
 
 		dbtr_trigger_setup(trig,  recv);
 		dbtr_trigger_enable(trig);
 		xmit->idx = cpu_to_lle(trig->index);
-
+		sbi_hart_unmap_saddr();
 	}
-	sbi_hart_unmap_saddr();
 
 	return SBI_SUCCESS;
 }
@@ -652,11 +652,15 @@ int sbi_dbtr_enable_trig(unsigned long trig_idx_base,
 }
 
 int sbi_dbtr_update_trig(unsigned long smode,
-			 unsigned long trig_count)
+			 unsigned long trig_idx_base,
+			 unsigned long trig_idx_mask)
 {
-	unsigned long trig_idx;
+	unsigned long trig_mask = trig_idx_mask << trig_idx_base;
+	unsigned long idx = trig_idx_base;
+	struct sbi_dbtr_data_msg *recv;
+	unsigned long uidx = 0;
 	struct sbi_dbtr_trigger *trig;
-	union sbi_dbtr_shmem_entry *entry;
+	struct sbi_dbtr_shmem_entry *entry;
 	void *shmem_base = NULL;
 	struct sbi_dbtr_hart_triggers_state *hs = NULL;
 
@@ -669,28 +673,18 @@ int sbi_dbtr_update_trig(unsigned long smode,
 
 	shmem_base = hart_shmem_base(hs);
 
-	if (trig_count >= hs->total_trigs)
-		return SBI_ERR_BAD_RANGE;
+	for_each_set_bit_from(idx, &trig_mask, hs->total_trigs) {
+		trig = INDEX_TO_TRIGGER(idx);
 
-	for_each_trig_entry(shmem_base, trig_count, typeof(*entry), entry) {
-		sbi_hart_map_saddr((unsigned long)entry, sizeof(*entry));
-		trig_idx = entry->id.idx;
-
-		if (trig_idx >= hs->total_trigs) {
-			sbi_hart_unmap_saddr();
+		if (!(trig->state & RV_DBTR_BIT_MASK(TS, MAPPED)))
 			return SBI_ERR_INVALID_PARAM;
-		}
 
-		trig = INDEX_TO_TRIGGER(trig_idx);
+		entry = (shmem_base + uidx * sizeof(*entry));
+		recv = &entry->data;
 
-		if (!(trig->state & RV_DBTR_BIT_MASK(TS, MAPPED))) {
-			sbi_hart_unmap_saddr();
-			return SBI_ERR_FAILED;
-		}
-
-		dbtr_trigger_setup(trig, &entry->data);
-		sbi_hart_unmap_saddr();
+		trig->tdata2 = lle_to_cpu(recv->tdata2);
 		dbtr_trigger_enable(trig);
+		uidx++;
 	}
 
 	return SBI_SUCCESS;

lib/sbi/sbi_domain.c

@@ -13,18 +13,20 @@
 #include <sbi/sbi_hartmask.h>
 #include <sbi/sbi_heap.h>
 #include <sbi/sbi_hsm.h>
-#include <sbi/sbi_list.h>
 #include <sbi/sbi_math.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
 
-SBI_LIST_HEAD(domain_list);
-
+/*
+ * We allocate an extra element because sbi_domain_for_each() expects
+ * the array to be null-terminated.
+ */
+struct sbi_domain *domidx_to_domain_table[SBI_DOMAIN_MAX_INDEX + 1] = { 0 };
 static u32 domain_count = 0;
 static bool domain_finalized = false;
 
-#define ROOT_REGION_MAX	32
+#define ROOT_REGION_MAX	16
 static u32 root_memregs_count = 0;
 
 struct sbi_domain root = {
@@ -60,7 +62,7 @@ void sbi_update_hartindex_to_domain(u32 hartindex, struct sbi_domain *dom)
 	sbi_scratch_write_type(scratch, void *, domain_hart_ptr_offset, dom);
 }
 
-bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartindex)
+bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartid)
 {
 	bool ret;
 	struct sbi_domain *tdom = (struct sbi_domain *)dom;
@@ -69,25 +71,26 @@ bool sbi_domain_is_assigned_hart(const struct sbi_domain *dom, u32 hartindex)
 		return false;
 
 	spin_lock(&tdom->assigned_harts_lock);
-	ret = sbi_hartmask_test_hartindex(hartindex, &tdom->assigned_harts);
+	ret = sbi_hartmask_test_hartid(hartid, &tdom->assigned_harts);
 	spin_unlock(&tdom->assigned_harts_lock);
 
 	return ret;
 }
 
-int sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
-				     struct sbi_hartmask *mask)
+ulong sbi_domain_get_assigned_hartmask(const struct sbi_domain *dom,
+				       ulong hbase)
 {
 	ulong ret = 0;
 	struct sbi_domain *tdom = (struct sbi_domain *)dom;
 
-	if (!dom) {
-		sbi_hartmask_clear_all(mask);
+	if (!dom)
 		return 0;
-	}
 
 	spin_lock(&tdom->assigned_harts_lock);
-	sbi_hartmask_copy(mask, &tdom->assigned_harts);
+	for (int i = 0; i < 8 * sizeof(ret); i++) {
+		if (sbi_hartmask_test_hartid(hbase + i, &tdom->assigned_harts))
+			ret |= 1UL << i;
+	}
 	spin_unlock(&tdom->assigned_harts_lock);
 
 	return ret;
@@ -446,7 +449,7 @@ void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix)
 	sbi_hartmask_for_each_hartindex(i, dom->possible_harts) {
 		j = sbi_hartindex_to_hartid(i);
 		sbi_printf("%s%d%s", (k++) ? "," : "",
-			   j, sbi_domain_is_assigned_hart(dom, i) ? "*" : "");
+			   j, sbi_domain_is_assigned_hart(dom, j) ? "*" : "");
 	}
 	sbi_printf("\n");
 
@@ -516,9 +519,10 @@ void sbi_domain_dump(const struct sbi_domain *dom, const char *suffix)
 
 void sbi_domain_dump_all(const char *suffix)
 {
+	u32 i;
 	const struct sbi_domain *dom;
 
-	sbi_domain_for_each(dom) {
+	sbi_domain_for_each(i, dom) {
 		sbi_domain_dump(dom, suffix);
 		sbi_printf("\n");
 	}
@@ -537,11 +541,21 @@ int sbi_domain_register(struct sbi_domain *dom,
 		return SBI_EINVAL;
 
 	/* Check if domain already discovered */
-	sbi_domain_for_each(tdom) {
+	sbi_domain_for_each(i, tdom) {
 		if (tdom == dom)
 			return SBI_EALREADY;
 	}
 
+	/*
+	 * Ensure that we have room for Domain Index to
+	 * HART ID mapping
+	 */
+	if (SBI_DOMAIN_MAX_INDEX <= domain_count) {
+		sbi_printf("%s: No room for %s\n",
+			   __func__, dom->name);
+		return SBI_ENOSPC;
+	}
+
 	/* Sanitize discovered domain */
 	rc = sanitize_domain(dom);
 	if (rc) {
@@ -551,10 +565,9 @@ int sbi_domain_register(struct sbi_domain *dom,
 		return rc;
 	}
 
-	sbi_list_add_tail(&dom->node, &domain_list);
-
 	/* Assign index to domain */
 	dom->index = domain_count++;
+	domidx_to_domain_table[dom->index] = dom;
 
 	/* Initialize spinlock for dom->assigned_harts */
 	SPIN_LOCK_INIT(dom->assigned_harts_lock);
@@ -586,19 +599,10 @@ int sbi_domain_register(struct sbi_domain *dom,
 		}
 	}
 
-	/* Setup data for the discovered domain */
-	rc = sbi_domain_setup_data(dom);
-	if (rc) {
-		sbi_printf("%s: domain data setup failed for %s (error %d)\n",
-			   __func__, dom->name, rc);
-		sbi_list_del(&dom->node);
-		return rc;
-	}
-
 	return 0;
 }
 
-static int root_add_memregion(const struct sbi_domain_memregion *reg)
+int sbi_domain_root_add_memregion(const struct sbi_domain_memregion *reg)
 {
 	int rc;
 	bool reg_merged;
@@ -676,7 +680,7 @@ int sbi_domain_root_add_memrange(unsigned long addr, unsigned long size,
 				(end - pos) : align;
 
 		sbi_domain_memregion_init(pos, rsize, region_flags, &reg);
-		rc = root_add_memregion(&reg);
+		rc = sbi_domain_root_add_memregion(&reg);
 		if (rc)
 			return rc;
 		pos += rsize;
@@ -685,18 +689,23 @@ int sbi_domain_root_add_memrange(unsigned long addr, unsigned long size,
 	return 0;
 }
 
-int sbi_domain_startup(struct sbi_scratch *scratch, u32 cold_hartid)
+int sbi_domain_finalize(struct sbi_scratch *scratch, u32 cold_hartid)
 {
 	int rc;
-	u32 dhart;
+	u32 i, dhart;
 	struct sbi_domain *dom;
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
-	/* Sanity checks */
-	if (!domain_finalized)
-		return SBI_EINVAL;
+	/* Initialize and populate domains for the platform */
+	rc = sbi_platform_domains_init(plat);
+	if (rc) {
+		sbi_printf("%s: platform domains_init() failed (error %d)\n",
+			   __func__, rc);
+		return rc;
+	}
 
 	/* Startup boot HART of domains */
-	sbi_domain_for_each(dom) {
+	sbi_domain_for_each(i, dom) {
 		/* Domain boot HART index */
 		dhart = sbi_hartid_to_hartindex(dom->boot_hartid);
 
@@ -739,26 +748,6 @@ int sbi_domain_startup(struct sbi_scratch *scratch, u32 cold_hartid)
 		}
 	}
 
-	return 0;
-}
-
-int sbi_domain_finalize(struct sbi_scratch *scratch)
-{
-	int rc;
-	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
-
-	/* Sanity checks */
-	if (domain_finalized)
-		return SBI_EINVAL;
-
-	/* Initialize and populate domains for the platform */
-	rc = sbi_platform_domains_init(plat);
-	if (rc) {
-		sbi_printf("%s: platform domains_init() failed (error %d)\n",
-			   __func__, rc);
-		return rc;
-	}
-
 	/*
 	 * Set the finalized flag so that the root domain
 	 * regions can't be changed.
@@ -770,11 +759,11 @@ int sbi_domain_finalize(struct sbi_scratch *scratch)
 
 int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 {
+	u32 i;
 	int rc;
 	struct sbi_hartmask *root_hmask;
 	struct sbi_domain_memregion *root_memregs;
-
-	SBI_INIT_LIST_HEAD(&domain_list);
+	const struct sbi_platform *plat = sbi_platform_ptr(scratch);
 
 	if (scratch->fw_rw_offset == 0 ||
 	    (scratch->fw_rw_offset & (scratch->fw_rw_offset - 1)) != 0) {
@@ -793,16 +782,11 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	if (!domain_hart_ptr_offset)
 		return SBI_ENOMEM;
 
-	/* Initialize domain context support */
-	rc = sbi_domain_context_init();
-	if (rc)
-		goto fail_free_domain_hart_ptr_offset;
-
 	root_memregs = sbi_calloc(sizeof(*root_memregs), ROOT_REGION_MAX + 1);
 	if (!root_memregs) {
 		sbi_printf("%s: no memory for root regions\n", __func__);
 		rc = SBI_ENOMEM;
-		goto fail_deinit_context;
+		goto fail_free_domain_hart_ptr_offset;
 	}
 	root.regions = root_memregs;
 
@@ -853,7 +837,7 @@ int sbi_domain_init(struct sbi_scratch *scratch, u32 cold_hartid)
 	root.next_mode = scratch->next_mode;
 
 	/* Root domain possible and assigned HARTs */
-	sbi_for_each_hartindex(i)
+	for (i = 0; i < plat->hart_count; i++)
 		sbi_hartmask_set_hartindex(i, root_hmask);
 
 	/* Finally register the root domain */
@@ -867,8 +851,6 @@ fail_free_root_hmask:
 	sbi_free(root_hmask);
 fail_free_root_memregs:
 	sbi_free(root_memregs);
-fail_deinit_context:
-	sbi_domain_context_deinit();
 fail_free_domain_hart_ptr_offset:
 	sbi_scratch_free_offset(domain_hart_ptr_offset);
 	return rc;

lib/sbi/sbi_domain_context.c

@@ -13,77 +13,7 @@
 #include <sbi/sbi_heap.h>
 #include <sbi/sbi_scratch.h>
 #include <sbi/sbi_string.h>
-#include <sbi/sbi_domain.h>
 #include <sbi/sbi_domain_context.h>
-#include <sbi/sbi_platform.h>
-#include <sbi/sbi_trap.h>
-
-/** Context representation for a hart within a domain */
-struct hart_context {
-	/** Trap-related states such as GPRs, mepc, and mstatus */
-	struct sbi_trap_context trap_ctx;
-
-	/** Supervisor status register */
-	unsigned long sstatus;
-	/** Supervisor interrupt enable register */
-	unsigned long sie;
-	/** Supervisor trap vector base address register */
-	unsigned long stvec;
-	/** Supervisor scratch register for temporary storage */
-	unsigned long sscratch;
-	/** Supervisor exception program counter register */
-	unsigned long sepc;
-	/** Supervisor cause register */
-	unsigned long scause;
-	/** Supervisor trap value register */
-	unsigned long stval;
-	/** Supervisor interrupt pending register */
-	unsigned long sip;
-	/** Supervisor address translation and protection register */
-	unsigned long satp;
-	/** Counter-enable register */
-	unsigned long scounteren;
-	/** Supervisor environment configuration register */
-	unsigned long senvcfg;
-
-	/** Reference to the owning domain */
-	struct sbi_domain *dom;
-	/** Previous context (caller) to jump to during context exits */
-	struct hart_context *prev_ctx;
-	/** Is context initialized and runnable */
-	bool initialized;
-};
-
-static struct sbi_domain_data dcpriv;
-
-static inline struct hart_context *hart_context_get(struct sbi_domain *dom,
-						    u32 hartindex)
-{
-	struct hart_context **dom_hartindex_to_context_table;
-
-	dom_hartindex_to_context_table = sbi_domain_data_ptr(dom, &dcpriv);
-	if (!dom_hartindex_to_context_table || !sbi_hartindex_valid(hartindex))
-		return NULL;
-
-	return dom_hartindex_to_context_table[hartindex];
-}
-
-static void hart_context_set(struct sbi_domain *dom, u32 hartindex,
-			     struct hart_context *hc)
-{
-	struct hart_context **dom_hartindex_to_context_table;
-
-	dom_hartindex_to_context_table = sbi_domain_data_ptr(dom, &dcpriv);
-	if (!dom_hartindex_to_context_table || !sbi_hartindex_valid(hartindex))
-		return;
-
-	dom_hartindex_to_context_table[hartindex] = hc;
-}
-
-/** Macro to obtain the current hart's context pointer */
-#define hart_context_thishart_get()					\
-	hart_context_get(sbi_domain_thishart_ptr(),			\
-			 current_hartindex())
 
 /**
  * Switches the HART context from the current domain to the target domain.
@@ -93,10 +23,10 @@ static void hart_context_set(struct sbi_domain *dom, u32 hartindex,
  * @param ctx pointer to the current HART context
  * @param dom_ctx pointer to the target domain context
  */
-static void switch_to_next_domain_context(struct hart_context *ctx,
-					  struct hart_context *dom_ctx)
+static void switch_to_next_domain_context(struct sbi_context *ctx,
+					  struct sbi_context *dom_ctx)
 {
-	u32 hartindex = current_hartindex();
+	u32 hartindex = sbi_hartid_to_hartindex(current_hartid());
 	struct sbi_trap_context *trap_ctx;
 	struct sbi_domain *current_dom = ctx->dom;
 	struct sbi_domain *target_dom = dom_ctx->dom;
@@ -116,7 +46,6 @@ static void switch_to_next_domain_context(struct hart_context *ctx,
 
 	/* Reconfigure PMP settings for the new domain */
 	for (int i = 0; i < pmp_count; i++) {
-		sbi_platform_pmp_disable(sbi_platform_thishart_ptr(), i);
 		pmp_disable(i);
 	}
 	sbi_hart_pmp_configure(scratch);
@@ -160,8 +89,9 @@ static void switch_to_next_domain_context(struct hart_context *ctx,
 
 int sbi_domain_context_enter(struct sbi_domain *dom)
 {
-	struct hart_context *ctx = hart_context_thishart_get();
-	struct hart_context *dom_ctx = hart_context_get(dom, current_hartindex());
+	struct sbi_context *ctx = sbi_domain_context_thishart_ptr();
+	struct sbi_context *dom_ctx = sbi_hartindex_to_domain_context(
+		sbi_hartid_to_hartindex(current_hartid()), dom);
 
 	/* Validate the domain context existence */
 	if (!dom_ctx)
@@ -177,10 +107,10 @@ int sbi_domain_context_enter(struct sbi_domain *dom)
 
 int sbi_domain_context_exit(void)
 {
-	u32 hartindex = current_hartindex();
+	u32 i, hartindex = sbi_hartid_to_hartindex(current_hartid());
 	struct sbi_domain *dom;
-	struct hart_context *ctx = hart_context_thishart_get();
-	struct hart_context *dom_ctx, *tmp;
+	struct sbi_context *ctx = sbi_domain_context_thishart_ptr();
+	struct sbi_context *dom_ctx, *tmp;
 
 	/*
 	 * If it's first time to call `exit` on the current hart, no
@@ -188,21 +118,21 @@ int sbi_domain_context_exit(void)
 	 * its context on the current hart if valid.
 	 */
 	if (!ctx) {
-		sbi_domain_for_each(dom) {
+		sbi_domain_for_each(i, dom) {
 			if (!sbi_hartmask_test_hartindex(hartindex,
 							 dom->possible_harts))
 				continue;
 
-			dom_ctx = sbi_zalloc(sizeof(struct hart_context));
+			dom_ctx = sbi_zalloc(sizeof(struct sbi_context));
 			if (!dom_ctx)
 				return SBI_ENOMEM;
 
 			/* Bind context and domain */
-			dom_ctx->dom = dom;
-			hart_context_set(dom, hartindex, dom_ctx);
+			dom_ctx->dom				   = dom;
+			dom->hartindex_to_context_table[hartindex] = dom_ctx;
 		}
 
-		ctx = hart_context_thishart_get();
+		ctx = sbi_domain_context_thishart_ptr();
 	}
 
 	dom_ctx = ctx->prev_ctx;
@@ -210,11 +140,11 @@ int sbi_domain_context_exit(void)
 	/* If no previous caller context */
 	if (!dom_ctx) {
 		/* Try to find next uninitialized user-defined domain's context */
-		sbi_domain_for_each(dom) {
+		sbi_domain_for_each(i, dom) {
 			if (dom == &root || dom == sbi_domain_thishart_ptr())
 				continue;
 
-			tmp = hart_context_get(dom, hartindex);
+			tmp = sbi_hartindex_to_domain_context(hartindex, dom);
 			if (tmp && !tmp->initialized) {
 				dom_ctx = tmp;
 				break;
@@ -224,27 +154,9 @@ int sbi_domain_context_exit(void)
 
 	/* Take the root domain context if fail to find */
 	if (!dom_ctx)
-		dom_ctx = hart_context_get(&root, hartindex);
+		dom_ctx = sbi_hartindex_to_domain_context(hartindex, &root);
 
 	switch_to_next_domain_context(ctx, dom_ctx);
 
 	return 0;
 }
-
-int sbi_domain_context_init(void)
-{
-	/**
-	 * Allocate per-domain and per-hart context data.
-	 * The data type is "struct hart_context **" whose memory space will be
-	 * dynamically allocated by domain_setup_data_one(). Calculate needed
-	 * size of memory space here.
-	 */
-	dcpriv.data_size = sizeof(struct hart_context *) * sbi_hart_count();
-
-	return sbi_domain_register_data(&dcpriv);
-}
-
-void sbi_domain_context_deinit(void)
-{
-	sbi_domain_unregister_data(&dcpriv);
-}

lib/sbi/sbi_domain_data.c

@@ -1,138 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2024 Ventana Micro Systems Inc.
- */
-
-#include <sbi/sbi_bitmap.h>
-#include <sbi/sbi_domain.h>
-#include <sbi/sbi_error.h>
-#include <sbi/sbi_heap.h>
-
-static SBI_LIST_HEAD(data_list);
-static DECLARE_BITMAP(data_idx_bmap, SBI_DOMAIN_MAX_DATA_PTRS);
-
-void *sbi_domain_data_ptr(struct sbi_domain *dom, struct sbi_domain_data *data)
-{
-	if (dom && data && data->data_idx < SBI_DOMAIN_MAX_DATA_PTRS)
-		return dom->data_priv.idx_to_data_ptr[data->data_idx];
-
-	return NULL;
-}
-
-static int domain_setup_data_one(struct sbi_domain *dom,
-				 struct sbi_domain_data *data)
-{
-	struct sbi_domain_data_priv *priv = &dom->data_priv;
-	void *data_ptr;
-	int rc;
-
-	if (priv->idx_to_data_ptr[data->data_idx])
-		return SBI_EALREADY;
-
-	data_ptr = sbi_zalloc(data->data_size);
-	if (!data_ptr) {
-		sbi_domain_cleanup_data(dom);
-		return SBI_ENOMEM;
-	}
-
-	if (data->data_setup) {
-		rc = data->data_setup(dom, data, data_ptr);
-		if (rc) {
-			sbi_free(data_ptr);
-			return rc;
-		}
-	}
-
-	priv->idx_to_data_ptr[data->data_idx] = data_ptr;
-	return 0;
-}
-
-static void domain_cleanup_data_one(struct sbi_domain *dom,
-				    struct sbi_domain_data *data)
-{
-	struct sbi_domain_data_priv *priv = &dom->data_priv;
-	void *data_ptr;
-
-	data_ptr = priv->idx_to_data_ptr[data->data_idx];
-	if (!data_ptr)
-		return;
-
-	if (data->data_cleanup)
-		data->data_cleanup(dom, data, data_ptr);
-
-	sbi_free(data_ptr);
-	priv->idx_to_data_ptr[data->data_idx] = NULL;
-}
-
-int sbi_domain_setup_data(struct sbi_domain *dom)
-{
-	struct sbi_domain_data *data;
-	int rc;
-
-	if (!dom)
-		return SBI_EINVAL;
-
-	sbi_list_for_each_entry(data, &data_list, head) {
-		rc = domain_setup_data_one(dom, data);
-		if (rc) {
-			sbi_domain_cleanup_data(dom);
-			return rc;
-		}
-	}
-
-	return 0;
-}
-
-void sbi_domain_cleanup_data(struct sbi_domain *dom)
-{
-	struct sbi_domain_data *data;
-
-	if (!dom)
-		return;
-
-	sbi_list_for_each_entry(data, &data_list, head)
-		domain_cleanup_data_one(dom, data);
-}
-
-int sbi_domain_register_data(struct sbi_domain_data *data)
-{
-	struct sbi_domain *dom;
-	u32 data_idx;
-	int rc;
-
-	if (!data || !data->data_size)
-		return SBI_EINVAL;
-
-	for (data_idx = 0; data_idx < SBI_DOMAIN_MAX_DATA_PTRS; data_idx++) {
-		if (!bitmap_test(data_idx_bmap, data_idx))
-			break;
-	}
-	if (SBI_DOMAIN_MAX_DATA_PTRS <= data_idx)
-		return SBI_ENOSPC;
-	bitmap_set(data_idx_bmap, data_idx, 1);
-
-	data->data_idx = data_idx;
-	sbi_list_add_tail(&data->head, &data_list);
-
-	sbi_domain_for_each(dom) {
-		rc = domain_setup_data_one(dom, data);
-		if (rc) {
-			sbi_domain_unregister_data(data);
-			return rc;
-		}
-	}
-
-	return 0;
-}
-
-void sbi_domain_unregister_data(struct sbi_domain_data *data)
-{
-	struct sbi_domain *dom;
-
-	sbi_domain_for_each(dom)
-		domain_cleanup_data_one(dom, data);
-
-	sbi_list_del(&data->head);
-	bitmap_clear(data_idx_bmap, data->data_idx, 1);
-}

lib/sbi/sbi_double_trap.c

@@ -1,37 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2024 Rivos Inc.
- *
- * Authors:
- *   Clément Léger <clement.leger@rivosinc.com>
- */
-
-#include <sbi/sbi_console.h>
-#include <sbi/sbi_ecall_interface.h>
-#include <sbi/sbi_error.h>
-#include <sbi/sbi_hart.h>
-#include <sbi/sbi_sse.h>
-#include <sbi/sbi_trap.h>
-
-int sbi_double_trap_handler(struct sbi_trap_context *tcntx)
-{
-	struct sbi_trap_regs *regs = &tcntx->regs;
-	const struct sbi_trap_info *trap = &tcntx->trap;
-	bool prev_virt = sbi_regs_from_virt(regs);
-
-	if (sbi_mstatus_prev_mode(regs->mstatus) != PRV_S)
-		return SBI_ERR_INVALID_PARAM;
-
-	/* Exception was taken in VS-mode, redirect it to S-mode */
-	if (prev_virt)
-		return sbi_trap_redirect(regs, trap);
-
-	return sbi_sse_inject_event(SBI_SSE_EVENT_LOCAL_DOUBLE_TRAP);
-}
-
-void sbi_double_trap_init(struct sbi_scratch *scratch)
-{
-	if (sbi_hart_has_extension(scratch, SBI_HART_EXT_SSDBLTRP))
-		sbi_sse_add_event(SBI_SSE_EVENT_LOCAL_DOUBLE_TRAP, NULL);
-}

lib/sbi/sbi_ecall.c

@@ -11,10 +11,10 @@
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
-#include <sbi/sbi_string.h>
 #include <sbi/sbi_trap.h>
 
-extern struct sbi_ecall_extension *const sbi_ecall_exts[];
+extern struct sbi_ecall_extension *sbi_ecall_exts[];
+extern unsigned long sbi_ecall_exts_size;
 
 u16 sbi_ecall_version_major(void)
 {
@@ -54,29 +54,6 @@ struct sbi_ecall_extension *sbi_ecall_find_extension(unsigned long extid)
 	return ret;
 }
 
-void sbi_ecall_get_extensions_str(char *exts_str, int exts_str_size, bool experimental)
-{
-	struct sbi_ecall_extension *t;
-	int offset = 0;
-
-	if (!exts_str || exts_str_size <= 0)
-		return;
-	sbi_memset(exts_str, 0, exts_str_size);
-
-	sbi_list_for_each_entry(t, &ecall_exts_list, head) {
-		if (experimental != t->experimental)
-			continue;
-		sbi_snprintf(exts_str + offset, exts_str_size - offset,
-			     "%s,", t->name);
-		offset = offset + sbi_strlen(t->name) + 1;
-	}
-
-	if (offset)
-		exts_str[offset - 1] = '\0';
-	else
-		sbi_strncpy(exts_str, "none", exts_str_size);
-}
-
 int sbi_ecall_register_extension(struct sbi_ecall_extension *ext)
 {
 	struct sbi_ecall_extension *t;
@@ -93,6 +70,7 @@ int sbi_ecall_register_extension(struct sbi_ecall_extension *ext)
 			return SBI_EINVAL;
 	}
 
+	SBI_INIT_LIST_HEAD(&ext->head);
 	sbi_list_add_tail(&ext->head, &ecall_exts_list);
 
 	return 0;
@@ -170,7 +148,7 @@ int sbi_ecall_init(void)
 	struct sbi_ecall_extension *ext;
 	unsigned long i;
 
-	for (i = 0; sbi_ecall_exts[i]; i++) {
+	for (i = 0; i < sbi_ecall_exts_size; i++) {
 		ext = sbi_ecall_exts[i];
 		ret = SBI_ENODEV;
 

lib/sbi/sbi_ecall_base.c

@@ -79,7 +79,6 @@ static int sbi_ecall_base_register_extensions(void)
 }
 
 struct sbi_ecall_extension ecall_base = {
-	.name			= "base",
 	.extid_start		= SBI_EXT_BASE,
 	.extid_end		= SBI_EXT_BASE,
 	.register_extensions	= sbi_ecall_base_register_extensions,

lib/sbi/sbi_ecall_cppc.c

@@ -32,13 +32,7 @@ static int sbi_ecall_cppc_handler(unsigned long extid, unsigned long funcid,
 #endif
 		break;
 	case SBI_EXT_CPPC_WRITE:
-#if __riscv_xlen == 32
-		temp = regs->a2;
-		temp = (temp << 32) | regs->a1;
-#else
-		temp = regs->a1;
-#endif
-		ret = sbi_cppc_write(regs->a0, temp);
+		ret = sbi_cppc_write(regs->a0, regs->a1);
 		break;
 	case SBI_EXT_CPPC_PROBE:
 		ret = sbi_cppc_probe(regs->a0);
@@ -65,7 +59,6 @@ static int sbi_ecall_cppc_register_extensions(void)
 }
 
 struct sbi_ecall_extension ecall_cppc = {
-	.name			= "cppc",
 	.extid_start		= SBI_EXT_CPPC,
 	.extid_end		= SBI_EXT_CPPC,
 	.register_extensions	= sbi_ecall_cppc_register_extensions,

lib/sbi/sbi_ecall_dbcn.c

@@ -74,7 +74,6 @@ static int sbi_ecall_dbcn_register_extensions(void)
 }
 
 struct sbi_ecall_extension ecall_dbcn = {
-	.name			= "dbcn",
 	.extid_start		= SBI_EXT_DBCN,
 	.extid_end		= SBI_EXT_DBCN,
 	.register_extensions	= sbi_ecall_dbcn_register_extensions,

lib/sbi/sbi_ecall_dbtr.c

@@ -43,7 +43,7 @@ static int sbi_ecall_dbtr_handler(unsigned long extid, unsigned long funcid,
 		ret = sbi_dbtr_enable_trig(regs->a0, regs->a1);
 		break;
 	case SBI_EXT_DBTR_TRIGGER_UPDATE:
-		ret = sbi_dbtr_update_trig(smode, regs->a0);
+		ret = sbi_dbtr_update_trig(smode, regs->a0, regs->a1);
 		break;
 	case SBI_EXT_DBTR_TRIGGER_DISABLE:
 		ret = sbi_dbtr_disable_trig(regs->a0, regs->a1);
@@ -66,9 +66,8 @@ static int sbi_ecall_dbtr_register_extensions(void)
 }
 
 struct sbi_ecall_extension ecall_dbtr = {
-	.name			= "dbtr",
-	.extid_start		= SBI_EXT_DBTR,
-	.extid_end		= SBI_EXT_DBTR,
-	.handle			= sbi_ecall_dbtr_handler,
-	.register_extensions	= sbi_ecall_dbtr_register_extensions,
+	.extid_start = SBI_EXT_DBTR,
+	.extid_end = SBI_EXT_DBTR,
+	.handle = sbi_ecall_dbtr_handler,
+	.register_extensions = sbi_ecall_dbtr_register_extensions,
 };

lib/sbi/sbi_ecall_fwft.c

@@ -42,9 +42,8 @@ static int sbi_ecall_fwft_register_extensions(void)
 }
 
 struct sbi_ecall_extension ecall_fwft = {
-	.name			= "fwft",
-	.extid_start		= SBI_EXT_FWFT,
-	.extid_end		= SBI_EXT_FWFT,
-	.register_extensions	= sbi_ecall_fwft_register_extensions,
-	.handle			= sbi_ecall_fwft_handler,
+	.extid_start = SBI_EXT_FWFT,
+	.extid_end = SBI_EXT_FWFT,
+	.register_extensions = sbi_ecall_fwft_register_extensions,
+	.handle = sbi_ecall_fwft_handler,
 };

lib/sbi/sbi_ecall_hsm.c

@@ -61,7 +61,6 @@ static int sbi_ecall_hsm_register_extensions(void)
 }
 
 struct sbi_ecall_extension ecall_hsm = {
-	.name			= "hsm",
 	.extid_start		= SBI_EXT_HSM,
 	.extid_end		= SBI_EXT_HSM,
 	.register_extensions	= sbi_ecall_hsm_register_extensions,

lib/sbi/sbi_ecall_ipi.c

@@ -36,7 +36,6 @@ static int sbi_ecall_ipi_register_extensions(void)
 }
 
 struct sbi_ecall_extension ecall_ipi = {
-	.name			= "ipi",
 	.extid_start		= SBI_EXT_IPI,
 	.extid_end		= SBI_EXT_IPI,
 	.register_extensions	= sbi_ecall_ipi_register_extensions,

lib/sbi/sbi_ecall_legacy.c

@@ -14,6 +14,7 @@
 #include <sbi/sbi_ecall.h>
 #include <sbi/sbi_ecall_interface.h>
 #include <sbi/sbi_error.h>
+#include <sbi/sbi_hsm.h>
 #include <sbi/sbi_ipi.h>
 #include <sbi/sbi_platform.h>
 #include <sbi/sbi_system.h>
@@ -23,7 +24,7 @@
 #include <sbi/sbi_unpriv.h>
 #include <sbi/sbi_hart.h>
 
-static bool sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask, ulong *hbase,
+static bool sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask,
 				      struct sbi_trap_info *uptrap)
 {
 	ulong mask = 0;
@@ -32,9 +33,9 @@ static bool sbi_load_hart_mask_unpriv(ulong *pmask, ulong *hmask, ulong *hbase,
 		mask = sbi_load_ulong(pmask, uptrap);
 		if (uptrap->cause)
 			return false;
-		*hbase = 0;
 	} else {
-		*hbase = -1UL;
+		sbi_hsm_hart_interruptible_mask(sbi_domain_thishart_ptr(),
+						0, &mask);
 	}
 	*hmask = mask;
 
@@ -49,7 +50,7 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 	struct sbi_tlb_info tlb_info;
 	u32 source_hart = current_hartid();
 	struct sbi_trap_info trap = {0};
-	ulong hmask, hbase;
+	ulong hmask = 0;
 
 	switch (extid) {
 	case SBI_EXT_0_1_SET_TIMER:
@@ -70,8 +71,8 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		break;
 	case SBI_EXT_0_1_SEND_IPI:
 		if (sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-					      &hmask, &hbase, &trap)) {
-			ret = sbi_ipi_send_smode(hmask, hbase);
+						&hmask, &trap)) {
+			ret = sbi_ipi_send_smode(hmask, 0);
 		} else {
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;
@@ -79,10 +80,10 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		break;
 	case SBI_EXT_0_1_REMOTE_FENCE_I:
 		if (sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-					      &hmask, &hbase, &trap)) {
+						&hmask, &trap)) {
 			SBI_TLB_INFO_INIT(&tlb_info, 0, 0, 0, 0,
 					  SBI_TLB_FENCE_I, source_hart);
-			ret = sbi_tlb_request(hmask, hbase, &tlb_info);
+			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		} else {
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;
@@ -90,10 +91,10 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA:
 		if (sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-					      &hmask, &hbase, &trap)) {
+						&hmask, &trap)) {
 			SBI_TLB_INFO_INIT(&tlb_info, regs->a1, regs->a2, 0, 0,
 					  SBI_TLB_SFENCE_VMA, source_hart);
-			ret = sbi_tlb_request(hmask, hbase, &tlb_info);
+			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		} else {
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;
@@ -101,12 +102,12 @@ static int sbi_ecall_legacy_handler(unsigned long extid, unsigned long funcid,
 		break;
 	case SBI_EXT_0_1_REMOTE_SFENCE_VMA_ASID:
 		if (sbi_load_hart_mask_unpriv((ulong *)regs->a0,
-					      &hmask, &hbase, &trap)) {
+						&hmask, &trap)) {
 			SBI_TLB_INFO_INIT(&tlb_info, regs->a1,
 					  regs->a2, regs->a3, 0,
 					  SBI_TLB_SFENCE_VMA_ASID,
 					  source_hart);
-			ret = sbi_tlb_request(hmask, hbase, &tlb_info);
+			ret = sbi_tlb_request(hmask, 0, &tlb_info);
 		} else {
 			sbi_trap_redirect(regs, &trap);
 			out->skip_regs_update = true;
@@ -131,7 +132,6 @@ static int sbi_ecall_legacy_register_extensions(void)
 }
 
 struct sbi_ecall_extension ecall_legacy = {
-	.name			= "legacy",
 	.extid_start		= SBI_EXT_0_1_SET_TIMER,
 	.extid_end		= SBI_EXT_0_1_SHUTDOWN,
 	.register_extensions	= sbi_ecall_legacy_register_extensions,

lib/sbi/sbi_ecall_mpxy.c

@@ -1,72 +0,0 @@
-/*
- * SPDX-License-Identifier: BSD-2-Clause
- *
- * Copyright (c) 2024 Ventana Micro Systems Inc.
- *
- * Authors:
- *   Anup Patel <apatel@ventanamicro.com>
- */
-
-#include <sbi/sbi_ecall.h>
-#include <sbi/sbi_ecall_interface.h>
-#include <sbi/sbi_error.h>
-#include <sbi/sbi_trap.h>
-#include <sbi/sbi_mpxy.h>
-
-static int sbi_ecall_mpxy_handler(unsigned long extid, unsigned long funcid,
-				  struct sbi_trap_regs *regs,
-				  struct sbi_ecall_return *out)
-{
-	int ret = 0;
-
-	switch (funcid) {
-	case SBI_EXT_MPXY_GET_SHMEM_SIZE:
-		out->value = sbi_mpxy_get_shmem_size();
-		break;
-	case SBI_EXT_MPXY_SET_SHMEM:
-		ret = sbi_mpxy_set_shmem(regs->a0, regs->a1, regs->a2);
-		break;
-	case SBI_EXT_MPXY_GET_CHANNEL_IDS:
-		ret = sbi_mpxy_get_channel_ids(regs->a0);
-		break;
-	case SBI_EXT_MPXY_READ_ATTRS:
-		ret = sbi_mpxy_read_attrs(regs->a0, regs->a1, regs->a2);
-		break;
-	case SBI_EXT_MPXY_WRITE_ATTRS:
-		ret = sbi_mpxy_write_attrs(regs->a0, regs->a1, regs->a2);
-		break;
-	case SBI_EXT_MPXY_SEND_MSG_WITH_RESP:
-		ret = sbi_mpxy_send_message(regs->a0, regs->a1,
-					    regs->a2, &out->value);
-		break;
-	case SBI_EXT_MPXY_SEND_MSG_WITHOUT_RESP:
-		ret = sbi_mpxy_send_message(regs->a0, regs->a1, regs->a2,
-					    NULL);
-		break;
-	case SBI_EXT_MPXY_GET_NOTIFICATION_EVENTS:
-		ret = sbi_mpxy_get_notification_events(regs->a0, &out->value);
-		break;
-	default:
-		ret = SBI_ENOTSUPP;
-	}
-
-	return ret;
-}
-
-struct sbi_ecall_extension ecall_mpxy;
-
-static int sbi_ecall_mpxy_register_extensions(void)
-{
-	if (!sbi_mpxy_channel_available())
-		return 0;
-
-	return sbi_ecall_register_extension(&ecall_mpxy);
-}
-
-struct sbi_ecall_extension ecall_mpxy = {
-	.name			= "mpxy",
-	.extid_start		= SBI_EXT_MPXY,
-	.extid_end		= SBI_EXT_MPXY,
-	.register_extensions	= sbi_ecall_mpxy_register_extensions,
-	.handle			= sbi_ecall_mpxy_handler,
-};

lib/sbi/sbi_ecall_pmu.c

@@ -73,9 +73,6 @@ static int sbi_ecall_pmu_handler(unsigned long extid, unsigned long funcid,
 	case SBI_EXT_PMU_COUNTER_STOP:
 		ret = sbi_pmu_ctr_stop(regs->a0, regs->a1, regs->a2);
 		break;
-	case SBI_EXT_PMU_EVENT_GET_INFO:
-		ret = sbi_pmu_event_get_info(regs->a0, regs->a1, regs->a2, regs->a3);
-		break;
 	case SBI_EXT_PMU_SNAPSHOT_SET_SHMEM:
 		/* fallthrough as OpenSBI doesn't support snapshot yet */
 	default:
@@ -93,7 +90,6 @@ static int sbi_ecall_pmu_register_extensions(void)
 }
 
 struct sbi_ecall_extension ecall_pmu = {
-	.name			= "pmu",
 	.extid_start		= SBI_EXT_PMU,
 	.extid_end		= SBI_EXT_PMU,
 	.register_extensions	= sbi_ecall_pmu_register_extensions,

lib/sbi/sbi_ecall_rfence.c

@@ -84,7 +84,6 @@ static int sbi_ecall_rfence_register_extensions(void)
 }
 
 struct sbi_ecall_extension ecall_rfence = {
-	.name			= "rfnc",
 	.extid_start		= SBI_EXT_RFENCE,
 	.extid_end		= SBI_EXT_RFENCE,
 	.register_extensions	= sbi_ecall_rfence_register_extensions,

lib/sbi/sbi_ecall_srst.c

@@ -75,7 +75,6 @@ static int sbi_ecall_srst_register_extensions(void)
 }
 
 struct sbi_ecall_extension ecall_srst = {
-	.name			= "srst",
 	.extid_start		= SBI_EXT_SRST,
 	.extid_end		= SBI_EXT_SRST,
 	.register_extensions	= sbi_ecall_srst_register_extensions,

lib/sbi/sbi_ecall_sse.c

@@ -36,12 +36,6 @@ static int sbi_ecall_sse_handler(unsigned long extid, unsigned long funcid,
 	case SBI_EXT_SSE_INJECT:
 		ret = sbi_sse_inject_from_ecall(regs->a0, regs->a1, out);
 		break;
-	case SBI_EXT_SSE_HART_MASK:
-		ret = sbi_sse_hart_mask();
-		break;
-	case SBI_EXT_SSE_HART_UNMASK:
-		ret = sbi_sse_hart_unmask();
-		break;
 	default:
 		ret = SBI_ENOTSUPP;
 	}
@@ -56,7 +50,6 @@ static int sbi_ecall_sse_register_extensions(void)
 }
 
 struct sbi_ecall_extension ecall_sse = {
-	.name			= "sse",
 	.extid_start		= SBI_EXT_SSE,
 	.extid_end		= SBI_EXT_SSE,
 	.register_extensions	= sbi_ecall_sse_register_extensions,