firmware: fw_base.S: fix multi-core boot bug.

In a multi-core startup scenario, if both _try_lottery and
_wait_for_boot_hart use the data in the _boot_status address, when
a CPU enters OpenSBI later than boot hart set the _boot_status to
BOOT_STATUS_BOOT_HART_DONE, the CPU will modify _boot_status to 1
by amoswap.w and will never be awakened in _wait_for_boot_hart.
So let _try_lottery and _boot_status use data from two addresses.

Signed-off-by: dong.yang <dong.yang@sophgo.com>

.github/workflows/repo-lockdown.yml

@@ -1,26 +1,26 @@
-name: 'Repo Lockdown'
-
-on:
-  pull_request_target:
-    types: opened
-
-permissions:
-  pull-requests: write
-
-jobs:
-  action:
-    runs-on: ubuntu-latest
-    steps:
-      - uses: dessant/repo-lockdown@v4
-        with:
-          pr-comment: |
-            We have mailing list based patch review so it would be great if you can send these patchs to OpenSBI mailing list.
-
-            You need to join OpenSBI mailing list using following link
-            http://lists.infradead.org/mailman/listinfo/opensbi
-
-            Make sure you use "git send-email" to send the patches.
-
-            Thanks for your contribution to OpenSBI project.
-          lock-pr: true
-          close-pr: true
+#name: 'Repo Lockdown'
+#
+#on:
+#  pull_request_target:
+#    types: opened
+#
+#permissions:
+#  pull-requests: write
+#
+#jobs:
+#  action:
+#    runs-on: ubuntu-latest
+#    steps:
+#      - uses: dessant/repo-lockdown@v4
+#        with:
+#          pr-comment: |
+#            We have mailing list based patch review so it would be great if you can send these patchs to OpenSBI mailing list.
+#
+#            You need to join OpenSBI mailing list using following link
+#            http://lists.infradead.org/mailman/listinfo/opensbi
+#
+#            Make sure you use "git send-email" to send the patches.
+#
+#            Thanks for your contribution to OpenSBI project.
+#          lock-pr: true
+#          close-pr: true

firmware/fw_base.S

@@ -47,7 +47,7 @@ _start:
 	bne	a0, a6, _wait_for_boot_hart
 _try_lottery:
 	/* Jump to relocation wait loop if we don't get relocation lottery */
-	lla	a6, _boot_status
+	lla	a6, _relocate_lottery
 	li	a7, BOOT_STATUS_LOTTERY_DONE
 	amoswap.w a6, a7, (a6)
 	bnez	a6, _wait_for_boot_hart
@@ -371,6 +371,8 @@ _skip_trap_handler_hyp:
 
 	.data
 	.align 3
+_relocate_lottery:
+	RISCV_PTR   0
 _boot_status:
 	RISCV_PTR	0
 

include/sbi/sbi_platform.h

@@ -152,7 +152,7 @@ struct sbi_platform_operations {
 
 /** Platform default heap size */
 #define SBI_PLATFORM_DEFAULT_HEAP_SIZE(__num_hart)	\
-					(0x8000 + 0x800 * (__num_hart))
+					(0x8000 + 0x1000 * (__num_hart))
 
 /** Representation of a platform */
 struct sbi_platform {

lib/sbi/sbi_tlb.c

@@ -79,6 +79,7 @@ static void sbi_tlb_local_hfence_gvma(struct sbi_tlb_info *tinfo)
 
 static void sbi_tlb_local_sfence_vma(struct sbi_tlb_info *tinfo)
 {
+#ifndef CONFIG_THEAD_C9XX_ERRATA_JTLB
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
 	unsigned long i;
@@ -96,6 +97,11 @@ static void sbi_tlb_local_sfence_vma(struct sbi_tlb_info *tinfo)
 				     : "r"(start + i)
 				     : "memory");
 	}
+#else
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_RCVD);
+
+	tlb_flush_all();
+#endif
 }
 
 static void sbi_tlb_local_hfence_vvma_asid(struct sbi_tlb_info *tinfo)
@@ -145,6 +151,7 @@ static void sbi_tlb_local_hfence_gvma_vmid(struct sbi_tlb_info *tinfo)
 
 static void sbi_tlb_local_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 {
+#ifndef CONFIG_THEAD_C9XX_ERRATA_JTLB
 	unsigned long start = tinfo->start;
 	unsigned long size  = tinfo->size;
 	unsigned long asid  = tinfo->asid;
@@ -167,6 +174,16 @@ static void sbi_tlb_local_sfence_vma_asid(struct sbi_tlb_info *tinfo)
 				     : "r"(start + i), "r"(asid)
 				     : "memory");
 	}
+#else
+	unsigned long asid  = tinfo->asid;
+
+	sbi_pmu_ctr_incr_fw(SBI_PMU_FW_SFENCE_VMA_ASID_RCVD);
+
+	__asm__ __volatile__("sfence.vma x0, %0"
+			:
+			: "r"(asid)
+			: "memory");
+#endif
 }
 
 static void sbi_tlb_local_fence_i(struct sbi_tlb_info *tinfo)

lib/utils/ipi/fdt_ipi_mswi.c

@@ -56,6 +56,7 @@ static const struct fdt_match ipi_mswi_match[] = {
 	{ .compatible = "riscv,clint0", .data = &clint_offset },
 	{ .compatible = "sifive,clint0", .data = &clint_offset },
 	{ .compatible = "thead,c900-clint", .data = &clint_offset },
+	{ .compatible = "thead,c900-clint-mswi", .data = &clint_offset },
 	{ .compatible = "thead,c900-aclint-mswi" },
 	{ .compatible = "riscv,aclint-mswi" },
 	{ },

lib/utils/timer/fdt_timer_mtimer.c

@@ -156,6 +156,8 @@ static const struct fdt_match timer_mtimer_match[] = {
 	{ .compatible = "riscv,clint0", .data = &sifive_clint_quirks },
 	{ .compatible = "sifive,clint0", .data = &sifive_clint_quirks },
 	{ .compatible = "thead,c900-clint", .data = &thead_clint_quirks },
+	{ .compatible = "thead,c900-clint-mtimer",
+	  .data = &thead_clint_quirks },
 	{ .compatible = "thead,c900-aclint-mtimer",
 	  .data = &thead_aclint_quirks },
 	{ .compatible = "riscv,aclint-mtimer" },

platform/generic/Kconfig

@@ -58,6 +58,13 @@ config PLATFORM_SOPHGO_SG2042
 	select THEAD_C9XX_PMU
 	default n
 
+config PLATFORM_SOPHGO_SG2044
+	bool "Sophgo sg2044 support"
+	select THEAD_C9XX_ERRATA
+	select THEAD_C9XX_ERRATA_JTLB
+	select THEAD_C9XX_PMU
+	default n
+
 config PLATFORM_STARFIVE_JH7110
 	bool "StarFive JH7110 support"
 	default n

platform/generic/configs/defconfig

@@ -4,6 +4,7 @@ CONFIG_PLATFORM_RENESAS_RZFIVE=y
 CONFIG_PLATFORM_SIFIVE_FU540=y
 CONFIG_PLATFORM_SIFIVE_FU740=y
 CONFIG_PLATFORM_SOPHGO_SG2042=y
+CONFIG_PLATFORM_SOPHGO_SG2044=y
 CONFIG_PLATFORM_STARFIVE_JH7110=y
 CONFIG_PLATFORM_THEAD=y
 CONFIG_FDT_GPIO=y

platform/generic/platform.c

@@ -230,7 +230,11 @@ static int generic_early_init(bool cold_boot)
 			rc = semihosting_init();
 		else
 			rc = fdt_serial_init();
-		if (rc)
+
+		/* console is not a necessary device for tp scalar*/
+		if (rc == SBI_ENODEV)
+			return 0;
+		else if (rc)
 			return rc;
 	}
 

platform/generic/sophgo/objects.mk

@@ -7,3 +7,5 @@
 
 carray-platform_override_modules-$(CONFIG_PLATFORM_SOPHGO_SG2042) += sophgo_sg2042
 platform-objs-$(CONFIG_PLATFORM_SOPHGO_SG2042) += sophgo/sg2042.o
+carray-platform_override_modules-$(CONFIG_PLATFORM_SOPHGO_SG2044) += sophgo_sg2044
+platform-objs-$(CONFIG_PLATFORM_SOPHGO_SG2044) += sophgo/sg2044.o

platform/generic/sophgo/sg2044.c

@@ -0,0 +1,49 @@
+/*
+ * SPDX-License-Identifier: BSD-2-Clause
+ *
+ * Copyright (c)
+ *
+ * Authors:
+ *   Inochi Amaoto <inochiama@outlook.com>
+ *   YuQing Cai <caiyuqing_hz@163.com>
+ *   ZhenYu Zhang <1204122531@qq.com>
+ */
+
+#include <platform_override.h>
+#include <thead/c9xx_pmu.h>
+#include <sbi/riscv_asm.h>
+#include <sbi/riscv_encoding.h>
+#include <sbi/sbi_const.h>
+#include <sbi/sbi_ecall_interface.h>
+#include <sbi/sbi_pmu.h>
+#include <sbi/sbi_platform.h>
+#include <sbi_utils/fdt/fdt_helper.h>
+
+static u32 selected_hartid = -1;
+
+static bool sg2044_cold_boot_allowed(u32 hartid,
+                                   const struct fdt_match *match)
+{
+	if (selected_hartid != -1)
+		return (selected_hartid == hartid);
+
+	return true;
+}
+
+static int sg2044_extensions_init(const struct fdt_match *match,
+				  struct sbi_hart_features *hfeatures)
+{
+	thead_c9xx_register_pmu_device();
+	return 0;
+}
+
+static const struct fdt_match sophgo_sg2044_match[] = {
+	{ .compatible = "sophgo,sg2044" },
+	{ },
+};
+
+const struct platform_override sophgo_sg2044 = {
+	.match_table		= sophgo_sg2044_match,
+	.cold_boot_allowed 	= sg2044_cold_boot_allowed,
+	.extensions_init	= sg2044_extensions_init,
+};

platform/generic/thead/Kconfig

@@ -7,3 +7,7 @@ config THEAD_C9XX_PMU
 config THEAD_C9XX_ERRATA
 	bool "T-HEAD c9xx errata support"
 	default n
+
+config THEAD_C9XX_ERRATA_JTLB
+	bool "T-HEAD c9xx errata(JTLB) support"
+	default n