Commit Graph

804 Commits

Author SHA1 Message Date
f879119605 Обновить platform/generic/cvitek_riscv.c 2026-02-11 02:19:45 +07:00
aedef73d12 Обновить platform/generic/cvitek_riscv.c 2026-02-11 01:41:03 +07:00
92ee61dae4 Обновить platform/generic/cvitek_riscv.c 2026-02-11 01:34:56 +07:00
sophgo-forum-service
6766e9cc96 opensbi: weekly rls 2025.01.24
daa470, [fix](opensbi): add rls_info.txt
b21a54, [test](opensbi): opensbi tailoring (time optimizing)
6ff231, [fix](str): fix riscv suspend section which do not use varivales and functions beyond syspend section.
2025-01-24 14:50:56 +08:00
sophgo-forum-service
3b045ae374 opensbi: weekly rls 2025.01.10
daa470, [fix](opensbi): add rls_info.txt
b21a54, [test](opensbi): opensbi tailoring (time optimizing)
6ff231, [fix](str): fix riscv suspend section which do not use varivales and functions beyond syspend section.

Change-Id: I8c6e7698b475b2d14c02308121f621dafe9b9e36
2025-01-13 16:32:03 +08:00
sophgo-forum-service
fffb4754ee opensbi: weekly rls 2024.10.14
-0f5edb, [fix](str):fix chip id miss and fix suspend bug on rtc
-a068cd, [fix](str): refine rtc suspend/resume process

Change-Id: Ice28701d616192d7d6a6f13621d739dd07424571
2024-10-14 19:27:45 +08:00
sophgo-forum-service
ab9b8f8d10 opensbi: weekly rls 2024.07.20
-0aa741, support cv181x/cv180x suspend to ram.

Change-Id: I64dcb0ff942aa7238a88ef3bd1da2c67f5d089b4
v4.1.6
2024-07-20 21:40:47 +08:00
sophgo-forum-service
3fd99912a6 opensbi: weekly rls 2024.06.6
-2da720, Add rst/unrst/reset c906l ecall.

Change-Id: Id1b2de0c5cb4607d46fd4397a78e77109790cc49
2024-06-06 15:17:01 +08:00
sophgo-forum-service
216793f112 (opensbi): Init branch sg200x-dev
Change-Id: If4dd4f7d55a714cff21c4ead4376a4137ee03330
2024-02-14 16:36:52 +08:00
sophgo-forum-service
ba54b0038e note: sync patch from T-Head.
https://github.com/T-head-Semi/opensbi commit: 89182b257c8798e15e4c685c1af0c2862d528d2a
2024-02-14 16:31:42 +08:00
Guo Ren
ba85a8ec52 platform/generic/platform.c: Support qemu poweroff
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
2024-01-10 17:35:55 +08:00
Guo Ren
885df4577a utils: irqchip: Fixup priority init overwrite zero
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
2024-01-10 17:35:47 +08:00
Guo Ren
f67338cc74 thead PMU supported
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
2024-01-10 17:35:39 +08:00
Bin Meng
632e27bb91 docs/platform: sifive_fu540: Update U-Boot defconfig name
With latest U-Boot upstream (v2021.07 in development), the defconfig
name has been changed to sifive_unleashed_defconfig. Update the doc.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-29 15:11:24 +05:30
Anup Patel
e9a27ab8ea lib: sbi: Show devices provided by platform in boot prints
We extend the boot-time prints to show various devices provided
(or registered) by the platform support. This will help users
verify hardware devices available for OpenSBI firmwares.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-04-28 17:33:37 +05:30
Anup Patel
a84a1ddbba lib: sbi: Simplify HSM platform operations
Instead of having hsm_start(), hsm_stop() and hsm_suspend()
callbacks in platform operations, it will be much simpler for
HSM driver to directly register these operations as a device
to the sbi_hsm implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-04-28 17:31:07 +05:30
Anup Patel
043d088e39 lib: sbi: Simplify system reset platform operations
Instead of having system_reset_check() and system_reset() callbacks
in platform operations, it will be much simpler for reset driver to
directly register these operations as a device to the sbi_system
implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-04-28 17:25:00 +05:30
Anup Patel
dc39c7b630 lib: sbi: Simplify ipi platform operations
Instead of having ipi_send() and ipi_clear() callbacks in
platform operations, it will be much simpler for ipi driver
to directly register these operations as a device to sbi_ipi
implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-04-28 17:03:31 +05:30
Anup Patel
559a8f1d3b lib: sbi: Simplify timer platform operations
Instead of having timer_value(), timer_event_start(), and
timer_event_stop() callbacks in platform operations, it will
be much simpler for timer driver to directly register these
operations as device to the sbi_timer implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-04-28 17:00:49 +05:30
Anup Patel
068ca086af lib: sbi: Simplify console platform operations
Instead of having console_putc() and console_getc() callbacks in
platform operations, it will be much simpler for console driver to
directly register these operations as device to the sbi_console
implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-04-28 16:58:23 +05:30
Anup Patel
a3689db92a lib: sbi: Remove domains_root_regions() platform callback
We now have sbi_domain_root_add_memregion() which allows platform
support to add root domain regions at boot-time so let's remove
the domains_root_regions() platform callback which was added
for this purpose.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-04-28 16:56:58 +05:30
Guo Ren
6d1642f856 docs: generic: Add T-HEAD C9xx series processors
Add description and dts examples for T-HEAD C9xx platforms.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-28 16:12:02 +05:30
Guo Ren
1db843622a platform: Remove platform/thead
We could use platform/generic instead, and won't use
platform/thead/c910 again.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-28 15:43:04 +05:30
Guo Ren
bf3ef53bb7 firmware: Enable FW_PIC by default
Let's have FW_PIC enabled by default so that OpenSBI firmware
can by default run from any physical address.

Tested with qemu_rv32 & rv64, T-HEAD all hardwares.

Suggested-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Tested-by: Guo Ren <guoren@linux.alibaba.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-28 15:38:22 +05:30
Anup Patel
0d56293817 lib: sbi: Fix sbi_domain_root_add_memregion() for merging memregions
We should decrement root_memregs_count by one after merging two
memregions otherwise new memregion added after a merge will be
appended after last sentinel memregion of zero order.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-04-24 13:05:09 +05:30
Guo Ren
49e422c5ad lib: utils: reset: Add T-HEAD sample platform reset driver
This driver is for T-HEAD test chip, fpga. It could work with
all T-HEAD riscv processors: C9xx series.

example1: (Using io-regs for reset)
reset: reset-sample {
	compatible = "thead,reset-sample";
	plic-delegate = <0xff 0xd81ffffc>;
	entry-reg = <0xff 0xff019050>;
	entry-cnt = <4>;
	control-reg = <0xff 0xff015004>;
	control-val = <0x1c>;
	csr-copy = <0x7f3 0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc>;
};

example2: (Using csr-regs for reset)
reset: reset-sample {
	compatible = "thead,reset-sample";
	plic-delegate = <0xff 0xd81ffffc>;
	using-csr-reset;
	csr-copy = <0x7c0 0x7c1 0x7c2 0x7c3 0x7c5 0x7cc
		    0x3b0 0x3b1 0x3b2 0x3b3
		    0x3b4 0x3b5 0x3b6 0x3b7
		    0x3a0>;
};

example3: (Only delegate plic enable to S-mode)
reset: reset-sample {
	compatible = "thead,reset-sample";
	plic-delegate = <0xff 0xd81ffffc>;
};

After this patch, all T-HEAD c9xx would use platform/generic with fw_dynamic
as default:

CROSS_COMPILE=riscv64-linux-gnu- PLATFORM=generic FW_PIC=y /usr/bin/make

The platform/thead will be deprecated.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-22 15:13:53 +05:30
Guo Ren
c5d0645052 lib: utils: Implement "64bit-mmio" property parsing
Figure out CLINT has_64bit_mmio from DT node and using antonym for
compatibility.

Signed-off-by: Guo Ren <guoren@linux.alibaba.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-22 15:00:58 +05:30
Anup Patel
f41196a9d2 lib: sbi: Make sbi_domain_memregion_initfw() a local function
The sbi_domain_memregion_initfw() is no longer used outside
sbi_domain.c so let's make it a local function.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-04-13 10:56:51 +05:30
Anup Patel
e7e4bcd5b9 lib: utils: Copy over restricted root domain memregions to FDT domains
We should copy over all restricted memregions from the root domain
to the domains populated from FDT. These restricted root memregions
are typically firmware memregion and M-mode only mmio memregions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-04-13 10:56:48 +05:30
Anup Patel
fc37c9712d lib: sbi: Make the root domain instance global variable
We make the the root domain instance global variable so that
platform support and drivers can iterate over the root domain
regions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-04-13 10:56:45 +05:30
Anup Patel
8b56980347 lib: utils/sys: Add CLINT memregion in the root domain
The CLINT memory should not be accessed by the supervisor-mode
software so let's protect it by adding CLINT memregion to the
root domain.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-04-13 10:56:42 +05:30
Anup Patel
4dc0001b09 lib: sbi: Add sbi_domain_root_add_memregion() API
We should allow platform support to add more root memory regions
before domains are finalized. This will help platform support to
protect critical M-mode only resources.

This patch adds sbi_domain_root_add_memregion() API for above
described purpose.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-04-13 10:56:37 +05:30
Anup Patel
7495bce6f9 lib: sbi: Add sbi_domain_memregion_init() API
This patch adds sbi_domain_memregion_init() helper API which can
be used by platform support to initialize a domain memory region
before adding it to the root domain.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-04-13 10:56:35 +05:30
Anup Patel
b1df1acd20 lib: sbi: Domains can be registered only before finalizing domains
The domains are boot-time system-level partitions so we should
allow platform support to register domains only before hart
domain assignments are finalized.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-04-13 10:56:32 +05:30
hasheddan
27a16b1545 docs: fix link to OpenPiton documentation
Updates link in platforms documentation to point to the correct
OpenPiton document.

Signed-off-by: hasheddan <georgedanielmangum@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-12 13:36:08 +05:30
Xiang W
70ffc3e2e6 lib: sbi: fix atomic_add_return
The unsigned length may be 4 bytes or 8 bytes, amoadd.w only applies
to 4 bytes hence this patch.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-09 18:51:02 +05:30
Christoph Muellner
4d8e2f135d lib: sbi: Replace test-and-set locks by ticket locks
Replace the test-and-set spinlock implementation with ticket locks
in order to get fairness (in form of FIFO order).

The implementation uses a 32-bit wide struct, which consists of
two 16-bit counters (owner and next). This is inspired by similar
spinlock implementations on other architectures.
This allows that the code works for both, RV32 and RV64.

Signed-off-by: Christoph Muellner <cmuellner@linux.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-04-09 18:48:50 +05:30
Christoph Muellner
d0e406fa44 include: sbi: Allow direct initialization via SPIN_LOCK_INIT()
The current implementation of SPIN_LOCK_INIT() provides the spinlock
to be initialized as reference. This does not allow a direct
initialization of the spinlock object at the creation site.

Let's pass the spinlock directly instead (like Linux does as well)
and adjust all users of the macro (in fact there is only one user).

Signed-off-by: Christoph Muellner <cmuellner@linux.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-09 18:39:50 +05:30
Christoph Muellner
d4a94ea471 include: types: Add __aligned(x) to define the minimum alignement
The __aligned(x) macro is a common wrapper around compiler's
aligned attribute, which allow to define the minimum alignement
of a data type. Let's add this macro.

Signed-off-by: Christoph Muellner <cmuellner@linux.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-09 18:37:06 +05:30
Anup Patel
e71a7c10a9 firmware: Remove redundant add instruction from trap restore path
The "add sp, a0, zero" instruction in the trap restore path is redundant
and can be avoided if TRAP_RESTORE_xyz() assembly macros use a0 as the
base register instead of sp.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-04-05 15:39:28 +05:30
Xiang W
3d8a952737 lib: fix csr detect support
csr_read_allowed/csr_read_allowed requires trap.case to detect the results,
but if no exception occurs, the value of trap.case will remain unchanged,
which makes the detection results unreliable. Add code to initialize
trap.case to 0.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-05 13:43:08 +05:30
Xiang W
4ef2f5d3e6 firware: optimize the exception exit code
There are two copies of the same abnormal exit code, this patch deletes one

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-01 10:48:35 +05:30
Bin Meng
4edc822407 lib/utils: Support fixing up the official DT bindings of PLIC
Current fdt_plic_fixup() only does necessary fix-up against the legacy
"riscv,plic0" node. The upstream Linux kernel defines its official DT
bindings which uses "sifive,plic-1.0.0" as the compatible string and
we should check that first, and if not present fall back to legacy.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-01 10:31:11 +05:30
Bin Meng
ca3f35821b lib/utils: Drop the 'compat' parameter of fdt_plic_fixup()
At present fdt_plic_fixup() accepts a 'compat' parameter for PLIC
compatible string. In preparation to support the new DT bindings,
drop this and use "riscv,plic0" directly in fdt_plic_fixup().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-01 10:27:28 +05:30
Bin Meng
9190ad12f7 lib/utils: Support the official clint DT bindings
Linux kernel commit a2770b57d083 ("dt-bindings: timer: Add CLINT bindings")
adds the official DT bindings for CLINT, which uses "sifive,clint0"
as the compatible string. "riscv,clint0" is now legacy and has to
be kept for backward compatibility of legacy systems.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-01 10:26:41 +05:30
Marouene Boubakri
bfc85c70e7 include: headers: Replace __ASSEMBLY__ with __ASSEMBLER__
GCC has already a predefined macro __ASSEMBLER__ therefore, it can be
used without the need to define a new flag with -D__ASSEMBLY__.
This is useful when adding the library to projects having a build
system such one can build without the need to make changes.
THe build system does not use the Makefile in the sources tree.

Signed-off-by: Marouene Boubakri <marouene.boubakri@nxp.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
2021-03-22 16:02:48 +05:30
Heinrich Schuchardt
ddad02d625 lib: sbi: illegal CSR 0x306 access in hpm_allowed()
The trap handler sbi_emulate_csr_read() invokes hpm_allowed() which reads
CSR 0x306 (mcounteren). The K210 does not support CSR 0x306. While trying
to handle a trap occurring in S-mode code this creates an additional trap
in M-mode. This results in failure to redirect to S-mode and the system
hanging in sbi_hart_hang().

In hart_detect_features() we have already determined if CSR 0x306 is
available and stored that information in the scratch area. We can use this
information to decide if CSR 0x306 shall be accessed in hpm_allowed() and
thus avoid the M-mode trap.

Likewise if CSR scounteren is not available we have to avoid reading CSR
0x106.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-03-22 09:18:56 +05:30
Vincent Chen
0f20e8adcf firmware: Support position independent execution
Enable OpenSBI to support position independent execution. Because the
position independent code will cause an additional GOT reference when
accessing the global variables, it will reduce performance a bit. Therefore,
the position independent execution is disabled by default. Users can
through specifying "FW_PIC=y" on the make command to enable this feature.

In theory, after enabling position-independent execution, the OpenSBI
can run at arbitrary address with appropriate alignment. Therefore, the
original relocation mechanism will be skipped. In other words, OpenSBI will
directly run at the load address without any code movement.

Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-03-19 15:00:50 +05:30
Vincent Chen
22d8ee9758 firmware: Use lla to access all global symbols
When OpenSBI is compiled as fPIE mode, the assembler will translate "la"
to GOT reference pattern. It will cause to cost an additional load
instruction when obtaining the symbol address. However, if the symbol
locates within the positive or negative 2GB region, we can use "lla"
instead of "la" to avoid unneeded GOT references. This patch assumes that
the OpenSBI image excluding the payload does not exceed 2GB. Based on
this assumption, all "la" instructions are replaced by "lla" to avoid
performance degradation when compiling as fPIE mode.

Signed-off-by: Vincent Chen <vincent.chen@sifive.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-03-19 14:57:45 +05:30
Heinrich Schuchardt
ff5bd949d5 include: sbi: SBI function IDs for RFENCE extension
The SBI function IDs for RFENCE extension must match the SBI specification.

Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-03-12 09:32:53 +05:30