platform: generic: sophgo: add mango soc support
The mango cpu of sophgo is a 64 cores C920 CPU. The board with mango can have at most two sockets. The CPU have the following features: 1) support RV64GCV 2) one seperate timer each cluster 3) T-HEAD pmu device Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
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committed by
xingxg2022
parent
c6a092cd80
commit
35fb234d39
@@ -13,12 +13,13 @@
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#include <sbi_utils/timer/fdt_timer.h>
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#include <sbi_utils/timer/aclint_mtimer.h>
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#define MTIMER_MAX_NR 16
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#define MTIMER_MAX_NR 32
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struct timer_mtimer_quirks {
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unsigned int mtime_offset;
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bool has_64bit_mmio;
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bool without_mtime;
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bool use_extern_domain;
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};
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static unsigned long mtimer_count = 0;
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@@ -66,6 +67,7 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
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mt->mtimecmp_addr += quirks->mtime_offset;
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/* Apply additional CLINT quirks */
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mt->has_64bit_mmio = quirks->has_64bit_mmio;
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mt->use_extern_domain = quirks->use_extern_domain;
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} else { /* RISC-V ACLINT MTIMER */
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/* Set ACLINT MTIMER addresses */
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mt->mtime_addr = addr[0];
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@@ -129,10 +131,18 @@ static const struct timer_mtimer_quirks thead_clint_quirks = {
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.without_mtime = true,
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};
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static const struct timer_mtimer_quirks thead_clint_sep_quirks = {
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.mtime_offset = CLINT_MTIMER_OFFSET,
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.without_mtime = true,
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.use_extern_domain = true,
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};
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static const struct fdt_match timer_mtimer_match[] = {
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{ .compatible = "riscv,clint0", .data = &sifive_clint_quirks },
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{ .compatible = "sifive,clint0", .data = &sifive_clint_quirks },
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{ .compatible = "thead,c900-clint", .data = &thead_clint_quirks },
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{ .compatible = "thead,c900-clint-mtimer",
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.data = &thead_clint_sep_quirks },
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{ .compatible = "riscv,aclint-mtimer" },
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{ },
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};
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