platform: generic: sophgo: add mango soc support

The mango cpu of sophgo is a 64 cores C920 CPU. The board with mango can
have at most two sockets. The CPU have the following features:

 1) support RV64GCV
 2) one seperate timer each cluster
 3) T-HEAD pmu device

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
This commit is contained in:
Inochi Amaoto
2023-03-18 18:40:49 +08:00
committed by xingxg2022
parent c6a092cd80
commit 35fb234d39
10 changed files with 102 additions and 2 deletions

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@@ -35,6 +35,7 @@ struct aclint_mtimer_data {
u32 hart_count;
bool has_64bit_mmio;
bool has_shared_mtime;
bool use_extern_domain;
/* Private details (initialized and used by ACLINT MTIMER library) */
struct aclint_mtimer_data *time_delta_reference;
unsigned long time_delta_computed;

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@@ -274,6 +274,10 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
}
if (mcause & (1UL << (__riscv_xlen - 1))) {
if (misa_extension('S')) {
__asm__ __volatile__("sfence.vma");
}
if (sbi_hart_has_extension(sbi_scratch_thishart_ptr(),
SBI_HART_EXT_SMAIA))
rc = sbi_trap_aia_irq(regs, mcause);
@@ -318,6 +322,10 @@ struct sbi_trap_regs *sbi_trap_handler(struct sbi_trap_regs *regs)
trap.tinst = mtinst;
trap.gva = sbi_regs_gva(regs);
if (misa_extension('S')) {
__asm__ __volatile__("sfence.vma");
}
rc = sbi_trap_redirect(regs, &trap);
break;
};

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@@ -57,6 +57,7 @@ static const struct fdt_match ipi_mswi_match[] = {
{ .compatible = "riscv,clint0", .data = &clint_offset },
{ .compatible = "sifive,clint0", .data = &clint_offset },
{ .compatible = "thead,c900-clint", .data = &clint_offset },
{ .compatible = "thead,c900-clint-mswi", .data = &clint_offset },
{ .compatible = "riscv,aclint-mswi" },
{ },
};

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@@ -202,7 +202,7 @@ int aclint_mtimer_cold_init(struct aclint_mtimer_data *mt,
SBI_DOMAIN_MEMREGION_M_WRITABLE));
if (rc)
return rc;
} else {
} else if (!mt->use_extern_domain) {
rc = sbi_domain_root_add_memrange(mt->mtime_addr,
mt->mtime_size, MTIMER_REGION_ALIGN,
(SBI_DOMAIN_MEMREGION_MMIO |

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@@ -13,12 +13,13 @@
#include <sbi_utils/timer/fdt_timer.h>
#include <sbi_utils/timer/aclint_mtimer.h>
#define MTIMER_MAX_NR 16
#define MTIMER_MAX_NR 32
struct timer_mtimer_quirks {
unsigned int mtime_offset;
bool has_64bit_mmio;
bool without_mtime;
bool use_extern_domain;
};
static unsigned long mtimer_count = 0;
@@ -66,6 +67,7 @@ static int timer_mtimer_cold_init(void *fdt, int nodeoff,
mt->mtimecmp_addr += quirks->mtime_offset;
/* Apply additional CLINT quirks */
mt->has_64bit_mmio = quirks->has_64bit_mmio;
mt->use_extern_domain = quirks->use_extern_domain;
} else { /* RISC-V ACLINT MTIMER */
/* Set ACLINT MTIMER addresses */
mt->mtime_addr = addr[0];
@@ -129,10 +131,18 @@ static const struct timer_mtimer_quirks thead_clint_quirks = {
.without_mtime = true,
};
static const struct timer_mtimer_quirks thead_clint_sep_quirks = {
.mtime_offset = CLINT_MTIMER_OFFSET,
.without_mtime = true,
.use_extern_domain = true,
};
static const struct fdt_match timer_mtimer_match[] = {
{ .compatible = "riscv,clint0", .data = &sifive_clint_quirks },
{ .compatible = "sifive,clint0", .data = &sifive_clint_quirks },
{ .compatible = "thead,c900-clint", .data = &thead_clint_quirks },
{ .compatible = "thead,c900-clint-mtimer",
.data = &thead_clint_sep_quirks },
{ .compatible = "riscv,aclint-mtimer" },
{ },
};

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@@ -51,6 +51,10 @@ config PLATFORM_STARFIVE_JH7110
bool "StarFive JH7110 support"
default n
config PLATFORM_SOPHGO_MANGO
bool "Sophgo MANGO support"
default n
source "$(OPENSBI_SRC_DIR)/platform/generic/andes/Kconfig"
endif

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@@ -4,6 +4,7 @@ CONFIG_PLATFORM_RENESAS_RZFIVE=y
CONFIG_PLATFORM_SIFIVE_FU540=y
CONFIG_PLATFORM_SIFIVE_FU740=y
CONFIG_PLATFORM_STARFIVE_JH7110=y
CONFIG_PLATFORM_SOPHGO_MANGO=y
CONFIG_FDT_GPIO=y
CONFIG_FDT_GPIO_SIFIVE=y
CONFIG_FDT_GPIO_STARFIVE=y

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@@ -124,4 +124,6 @@
#define THEAD_C9XX_IRQ_PMU_OVF 17
#define THEAD_C9XX_MIP_MOIP (_UL(1) << THEAD_C9XX_IRQ_PMU_OVF)
extern const struct sbi_pmu_device thead_c9xx_pmu_device;
#endif

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@@ -0,0 +1,67 @@
/*
* SPDX-License-Identifier: BSD-2-Clause
*
* Copyright (c)
*
* Authors:
* Inochi Amaoto <inochiama@outlook.com>
* YuQing Cai <caiyuqing_hz@163.com>
* ZhenYu Zhang <1204122531@qq.com>
*/
#include <platform_override.h>
#include <thead_c9xx.h>
#include <sbi/riscv_asm.h>
#include <sbi/riscv_encoding.h>
#include <sbi/sbi_const.h>
#include <sbi/sbi_ecall_interface.h>
#include <sbi/sbi_pmu.h>
#include <sbi/sbi_domain.h>
#include <sbi/sbi_platform.h>
#include <sbi_utils/fdt/fdt_helper.h>
#include <sbi_utils/timer/aclint_mtimer.h>
#define SOPHGO_MANGO_TIMER_BASE 0x70ac000000UL
#define SOPHGO_MANGO_TIMER_OFFSET 0x10000UL
int mango_early_init(bool cold_boot, const struct fdt_match *match)
{
const struct sbi_platform * plat = sbi_platform_thishart_ptr();
/*
* Sophgo mango board use seperate 16/32 timers while initiating,
* merge them as a single domain to avoid wasting.
*/
if (cold_boot)
return sbi_domain_root_add_memrange(SOPHGO_MANGO_TIMER_BASE,
SOPHGO_MANGO_TIMER_OFFSET *
sbi_platform_hart_count(plat),
MTIMER_REGION_ALIGN,
(SBI_DOMAIN_MEMREGION_MMIO |
SBI_DOMAIN_MEMREGION_M_READABLE |
SBI_DOMAIN_MEMREGION_M_WRITABLE));
return 0;
}
static int mango_extensions_init(const struct fdt_match *match,
struct sbi_hart_features *hfeatures)
{
sbi_pmu_set_device(&thead_c9xx_pmu_device);
/* auto-detection doesn't work on t-head c9xx cores */
hfeatures->mhpm_count = 29;
hfeatures->mhpm_bits = 64;
return 0;
}
static const struct fdt_match sophgo_mango_match[] = {
{ .compatible = "sophgo,mango" },
{ },
};
const struct platform_override sophgo_mango = {
.match_table = sophgo_mango_match,
.early_init = mango_early_init,
.extensions_init = mango_extensions_init,
};

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@@ -0,0 +1,6 @@
#
# SPDX-License-Identifier: BSD-2-Clause
#
carray-platform_override_modules-$(CONFIG_PLATFORM_SOPHGO_MANGO) += sophgo_mango
platform-objs-$(CONFIG_PLATFORM_SOPHGO_MANGO) += sophgo/mango.o