6eef399cfc
Add a virtual global timer device driver. It uses a global timer
register as timer counter, and it uses mtimecmp CSR of clint as
interrupt source.
Using this virtul timer resolves dual way timer sync issue.
On dual way system, we should enable this driver and on single way
system, we should use standard risc-v clint timer.
1. Add a virtual global timer device driver, it is probed by fdt
sg2042-global-mtimer@70300101c0 {
compatible = "sophgo,sg2042-global-mtimer";
reg = < 0x00000070 0x300101c0 0x00000000 0x00000008
0x00000070 0xac000000 0x00000000 0x00200000>;
clock-frequency = <50000000 50000000>;
};
Its compatible should be "sophgo,sg2042-global-mtimer".
And the first region delcared in reg prop is the address of global
timer. The second region delcared in reg prop is the base of clint
timers.
The first clock in clock-frequency is the actual frequency of global
timer, the second clock is the actual frequency of clint timer.
2. Add a quirk in platform specific code.
Add a function sbi_platform_force_emulate_time_csr, it indicates if
opensbi should skip time CSR detection and make software in
supervisor and user mode use emulated time CSR.
Signed-off-by: Chao Wei <chao.wei@sophgo.com>
22 lines
508 B
C
22 lines
508 B
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2025 SOPHGO Corporation
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*
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* Authors:
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* Chao Wei <chao.wei@sophgo.com>
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*/
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#ifndef __SG2042_GMT_H__
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#define __SG2042_GMT_H__
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int sg2042gmt_cold_timer_init(unsigned long mtimer_base,
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unsigned long mtimecmp_base,
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unsigned long mtimecmp_size,
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unsigned long delcared_freq,
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unsigned long actual_freq,
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unsigned long timecmp_freq);
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int sg2042gmt_warm_timer_init(void);
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#endif /* __SG2042_GMT_H__ */
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