124 lines
2.9 KiB
C
124 lines
2.9 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2023 Sophgo
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*
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* Authors:
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* Chunzhi Lin <chunzhi.lin@sophgo.com>
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*/
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#include <libfdt.h>
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#include <sbi/riscv_io.h>
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#include <sbi/sbi_bitops.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_system.h>
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#include <sbi/sbi_timer.h>
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#include <sbi/sbi_console.h>
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#include <sbi_utils/fdt/fdt_helper.h>
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#include <sbi_utils/reset/fdt_reset.h>
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#define TOP_BASE 0x7030010000
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#define SOPHGO_TOP_CTRL_REG_OFFSET 0x008
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#define REG_BIT(offset) (1U << (offset))
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#define BIT_MASK_TOP_CTRL_SW_ROOT_RESET_EN REG_BIT(2)
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#define SOPHGO_WDT_CR_REG_OFFSET 0x00
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#define SOPHGO_WDT_TORR_REG_OFFSET 0x04
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#define SOPHGO_WDT_CRR_REG_OFFSET 0x0C
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static volatile char *sophgo_wdt_base;
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static volatile char *sophgo_top_base;
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static void sophgo_wdt_system_reset(u32 type, u32 reason)
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{
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u32 val;
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val = readl(sophgo_top_base + SOPHGO_TOP_CTRL_REG_OFFSET);
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writel((val | BIT_MASK_TOP_CTRL_SW_ROOT_RESET_EN),
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sophgo_top_base + SOPHGO_TOP_CTRL_REG_OFFSET);
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sbi_timer_udelay(1);
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/*next reset time = 2^(16 + 0x0b) / 100M = 1.34s */
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writel(0x0b, sophgo_wdt_base + SOPHGO_WDT_TORR_REG_OFFSET);
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sbi_timer_udelay(1);
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/* a safety feature for counter restart register */
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writel(0x76, sophgo_wdt_base + SOPHGO_WDT_CRR_REG_OFFSET);
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sbi_timer_udelay(1);
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/* reset pluse length: 32 pclk cycles; enable wdt */
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writel(0x11, sophgo_wdt_base + SOPHGO_WDT_CR_REG_OFFSET);
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return;
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}
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static int sophgo_wdt_system_reset_check(u32 type, u32 reason)
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{
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switch (type) {
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case SBI_SRST_RESET_TYPE_COLD_REBOOT:
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case SBI_SRST_RESET_TYPE_WARM_REBOOT:
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return 1;
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}
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return 0;
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}
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static int sophgo_wdt_system_get_top_base(void *fdt,
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int nodeoff, unsigned long *addr)
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{
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const fdt32_t *val;
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int len, noff;
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noff = 0;
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val = fdt_getprop(fdt, nodeoff, "subctrl-syscon", &len);
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if (val || len >= sizeof(fdt32_t)) {
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noff = fdt_node_offset_by_phandle(fdt, fdt32_to_cpu(*val));
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if (noff < 0)
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return noff;
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}
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return fdt_get_node_addr_size(fdt, noff, 0, addr, NULL);
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}
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static struct sbi_system_reset_device mango_reset_wdt = {
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.name = "mango-wdt",
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.system_reset_check = sophgo_wdt_system_reset_check,
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.system_reset = sophgo_wdt_system_reset,
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};
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static int mango_wdt_reset_init(void *fdt, int nodeoff,
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const struct fdt_match *match)
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{
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unsigned long wdt_addr, top_addr;
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int rc;
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rc = fdt_get_node_addr_size(fdt, nodeoff, 0, &wdt_addr, NULL);
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if (rc < 0 || !wdt_addr) {
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return SBI_ENODEV;
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}
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sophgo_wdt_base = (volatile char *)(unsigned long)wdt_addr;
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rc = sophgo_wdt_system_get_top_base(fdt, nodeoff, &top_addr);
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if (rc < 0 || !top_addr)
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return SBI_ENODEV;
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sophgo_top_base = (volatile char *)(unsigned long)top_addr;
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sbi_system_reset_add_device(&mango_reset_wdt);
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return 0;
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}
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static const struct fdt_match mango_wdt_reset_match[] = {
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{ .compatible = "mango,wdt-reset", .data = (void *)true},
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{ },
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};
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struct fdt_reset fdt_reset_sophgo_wdt = {
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.match_table = mango_wdt_reset_match,
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.init = mango_wdt_reset_init,
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};
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