Timer init failed with the following error message in Pisces. Add 16 timers memrange(the default number) in sg2042_early_init while Pisces pruduct has 32 timers.
sbi_domain_root_add_memrange: line 678, 0x70ac1b4000,0x1000,0x80000003
sbi_domain_root_add_memrange: line 678, 0x70ac1b5000,0x1000,0x80000003
sbi_domain_root_add_memrange: line 678, 0x70ac1b6000,0x1000,0x80000003
sbi_domain_root_add_memrange: line 678, 0x70ac1b7000,0x1000,0x80000003
sbi_domain_root_add_memrange: line 678, 0x70ac1b8000,0x1000,0x80000003
sbi_domain_root_add_memrange: line 678, 0x70ac1b9000,0x1000,0x80000003
sbi_domain_root_add_memrange: line 678, 0x70ac1ba000,0x1000,0x80000003
sbi_domain_root_add_memrange: line 678, 0x70ac1bb000,0x1000,0x80000003
fdt_driver_init_by_offset: timer@70ac1b4000 (thead,c900-aclint-mtimer) init failed: -3
init_coldboot: timer init failed (error -3)
Signed-off-by: chunzhi.lin <chunzhi.lin@sophgo.com>
Switch all existing platform overrides to use the helper pattern instead
of the platform hooks. After this commit, only the .match_table and
.init members of struct platform_override are used.
There are two minor behavioral differences:
- For Allwinner D1, fdt_add_cpu_idle_states() is now called before the
body of generic_final_init(). This should have no functional impact.
- For StarFive JH7110, if the /chosen/starfive,boot-hart-id property is
missing, the code now falls back to using generic_coldboot_harts,
instead of accepting any hart.
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20250325234342.711447-7-samuel.holland@sifive.com
Signed-off-by: Anup Patel <anup@brainfault.org>
Several of these override functions access the FDT blob. Explicitly
indicate which callbacks are allowed to modify the FDT blob by passing
the parameter as a possibly-const pointer. This also reduces code size
by deduplicating the call to fdt_get_address().
Signed-off-by: Samuel Holland <samuel.holland@sifive.com>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
